softfloat.c 246.8 KB
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/*
 * QEMU float support
 *
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 * The code in this source file is derived from release 2a of the SoftFloat
 * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
 * some later contributions) are provided under that license, as detailed below.
 * It has subsequently been modified by contributors to the QEMU Project,
 * so some portions are provided under:
 *  the SoftFloat-2a license
 *  the BSD license
 *  GPL-v2-or-later
 *
 * Any future contributions to this file after December 1st 2014 will be
 * taken to be licensed under the Softfloat-2a license unless specifically
 * indicated otherwise.
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 */
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/*
===============================================================================
This C source file is part of the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 2a.
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Written by John R. Hauser.  This work was made possible in part by the
International Computer Science Institute, located at Suite 600, 1947 Center
Street, Berkeley, California 94704.  Funding was partially provided by the
National Science Foundation under grant MIP-9311980.  The original version
of this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
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is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
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arithmetic/SoftFloat.html'.

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THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort
has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO
PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
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Derivative works are acceptable, even for commercial purposes, so long as
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(1) they include prominent notice that the work is derivative, and (2) they
include prominent notice akin to these four paragraphs for those parts of
this code that are retained.
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===============================================================================
*/
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/* BSD licensing:
 * Copyright (c) 2006, Fabrice Bellard
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 * this list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution.
 *
 * 3. Neither the name of the copyright holder nor the names of its contributors
 * may be used to endorse or promote products derived from this software without
 * specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 * THE POSSIBILITY OF SUCH DAMAGE.
 */

/* Portions of this work are licensed under the terms of the GNU GPL,
 * version 2 or later. See the COPYING file in the top-level directory.
 */

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/* softfloat (and in particular the code in softfloat-specialize.h) is
 * target-dependent and needs the TARGET_* macros.
 */
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#include "qemu/osdep.h"
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#include "qemu/bitops.h"
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#include "fpu/softfloat.h"
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/* We only need stdlib for abort() */

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/*----------------------------------------------------------------------------
| Primitive arithmetic functions, including multi-word arithmetic, and
| division and square root approximations.  (Can be specialized to target if
| desired.)
*----------------------------------------------------------------------------*/
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#include "fpu/softfloat-macros.h"
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/*----------------------------------------------------------------------------
| Returns the fraction bits of the half-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

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static inline uint32_t extractFloat16Frac(float16 a)
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{
    return float16_val(a) & 0x3ff;
}

/*----------------------------------------------------------------------------
| Returns the exponent bits of the half-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

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static inline int extractFloat16Exp(float16 a)
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{
    return (float16_val(a) >> 10) & 0x1f;
}

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/*----------------------------------------------------------------------------
| Returns the fraction bits of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline uint32_t extractFloat32Frac(float32 a)
{
    return float32_val(a) & 0x007FFFFF;
}

/*----------------------------------------------------------------------------
| Returns the exponent bits of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline int extractFloat32Exp(float32 a)
{
    return (float32_val(a) >> 23) & 0xFF;
}

/*----------------------------------------------------------------------------
| Returns the sign bit of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline flag extractFloat32Sign(float32 a)
{
    return float32_val(a) >> 31;
}

/*----------------------------------------------------------------------------
| Returns the fraction bits of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline uint64_t extractFloat64Frac(float64 a)
{
    return float64_val(a) & LIT64(0x000FFFFFFFFFFFFF);
}

/*----------------------------------------------------------------------------
| Returns the exponent bits of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline int extractFloat64Exp(float64 a)
{
    return (float64_val(a) >> 52) & 0x7FF;
}

/*----------------------------------------------------------------------------
| Returns the sign bit of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline flag extractFloat64Sign(float64 a)
{
    return float64_val(a) >> 63;
}

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/*
 * Classify a floating point number. Everything above float_class_qnan
 * is a NaN so cls >= float_class_qnan is any NaN.
 */

typedef enum __attribute__ ((__packed__)) {
    float_class_unclassified,
    float_class_zero,
    float_class_normal,
    float_class_inf,
    float_class_qnan,  /* all NaNs from here */
    float_class_snan,
} FloatClass;

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/* Simple helpers for checking if, or what kind of, NaN we have */
static inline __attribute__((unused)) bool is_nan(FloatClass c)
{
    return unlikely(c >= float_class_qnan);
}

static inline __attribute__((unused)) bool is_snan(FloatClass c)
{
    return c == float_class_snan;
}

static inline __attribute__((unused)) bool is_qnan(FloatClass c)
{
    return c == float_class_qnan;
}

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/*
 * Structure holding all of the decomposed parts of a float. The
 * exponent is unbiased and the fraction is normalized. All
 * calculations are done with a 64 bit fraction and then rounded as
 * appropriate for the final format.
 *
 * Thanks to the packed FloatClass a decent compiler should be able to
 * fit the whole structure into registers and avoid using the stack
 * for parameter passing.
 */

typedef struct {
    uint64_t frac;
    int32_t  exp;
    FloatClass cls;
    bool sign;
} FloatParts;

#define DECOMPOSED_BINARY_POINT    (64 - 2)
#define DECOMPOSED_IMPLICIT_BIT    (1ull << DECOMPOSED_BINARY_POINT)
#define DECOMPOSED_OVERFLOW_BIT    (DECOMPOSED_IMPLICIT_BIT << 1)

/* Structure holding all of the relevant parameters for a format.
 *   exp_size: the size of the exponent field
 *   exp_bias: the offset applied to the exponent field
 *   exp_max: the maximum normalised exponent
 *   frac_size: the size of the fraction field
 *   frac_shift: shift to normalise the fraction with DECOMPOSED_BINARY_POINT
 * The following are computed based the size of fraction
 *   frac_lsb: least significant bit of fraction
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 *   frac_lsbm1: the bit below the least significant bit (for rounding)
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 *   round_mask/roundeven_mask: masks used for rounding
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 * The following optional modifiers are available:
 *   arm_althp: handle ARM Alternative Half Precision
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 */
typedef struct {
    int exp_size;
    int exp_bias;
    int exp_max;
    int frac_size;
    int frac_shift;
    uint64_t frac_lsb;
    uint64_t frac_lsbm1;
    uint64_t round_mask;
    uint64_t roundeven_mask;
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    bool arm_althp;
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} FloatFmt;

/* Expand fields based on the size of exponent and fraction */
#define FLOAT_PARAMS(E, F)                                           \
    .exp_size       = E,                                             \
    .exp_bias       = ((1 << E) - 1) >> 1,                           \
    .exp_max        = (1 << E) - 1,                                  \
    .frac_size      = F,                                             \
    .frac_shift     = DECOMPOSED_BINARY_POINT - F,                   \
    .frac_lsb       = 1ull << (DECOMPOSED_BINARY_POINT - F),         \
    .frac_lsbm1     = 1ull << ((DECOMPOSED_BINARY_POINT - F) - 1),   \
    .round_mask     = (1ull << (DECOMPOSED_BINARY_POINT - F)) - 1,   \
    .roundeven_mask = (2ull << (DECOMPOSED_BINARY_POINT - F)) - 1

static const FloatFmt float16_params = {
    FLOAT_PARAMS(5, 10)
};

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static const FloatFmt float16_params_ahp = {
    FLOAT_PARAMS(5, 10),
    .arm_althp = true
};

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static const FloatFmt float32_params = {
    FLOAT_PARAMS(8, 23)
};

static const FloatFmt float64_params = {
    FLOAT_PARAMS(11, 52)
};

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/* Unpack a float to parts, but do not canonicalize.  */
static inline FloatParts unpack_raw(FloatFmt fmt, uint64_t raw)
{
    const int sign_pos = fmt.frac_size + fmt.exp_size;

    return (FloatParts) {
        .cls = float_class_unclassified,
        .sign = extract64(raw, sign_pos, 1),
        .exp = extract64(raw, fmt.frac_size, fmt.exp_size),
        .frac = extract64(raw, 0, fmt.frac_size),
    };
}

static inline FloatParts float16_unpack_raw(float16 f)
{
    return unpack_raw(float16_params, f);
}

static inline FloatParts float32_unpack_raw(float32 f)
{
    return unpack_raw(float32_params, f);
}

static inline FloatParts float64_unpack_raw(float64 f)
{
    return unpack_raw(float64_params, f);
}

/* Pack a float from parts, but do not canonicalize.  */
static inline uint64_t pack_raw(FloatFmt fmt, FloatParts p)
{
    const int sign_pos = fmt.frac_size + fmt.exp_size;
    uint64_t ret = deposit64(p.frac, fmt.frac_size, fmt.exp_size, p.exp);
    return deposit64(ret, sign_pos, 1, p.sign);
}

static inline float16 float16_pack_raw(FloatParts p)
{
    return make_float16(pack_raw(float16_params, p));
}

static inline float32 float32_pack_raw(FloatParts p)
{
    return make_float32(pack_raw(float32_params, p));
}

static inline float64 float64_pack_raw(FloatParts p)
{
    return make_float64(pack_raw(float64_params, p));
}

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/*----------------------------------------------------------------------------
| Functions and definitions to determine:  (1) whether tininess for underflow
| is detected before or after rounding by default, (2) what (if anything)
| happens when exceptions are raised, (3) how signaling NaNs are distinguished
| from quiet NaNs, (4) the default generated quiet NaNs, and (5) how NaNs
| are propagated from function inputs to output.  These details are target-
| specific.
*----------------------------------------------------------------------------*/
#include "softfloat-specialize.h"

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/* Canonicalize EXP and FRAC, setting CLS.  */
static FloatParts canonicalize(FloatParts part, const FloatFmt *parm,
                               float_status *status)
{
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    if (part.exp == parm->exp_max && !parm->arm_althp) {
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        if (part.frac == 0) {
            part.cls = float_class_inf;
        } else {
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            part.frac <<= parm->frac_shift;
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            part.cls = (parts_is_snan_frac(part.frac, status)
                        ? float_class_snan : float_class_qnan);
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        }
    } else if (part.exp == 0) {
        if (likely(part.frac == 0)) {
            part.cls = float_class_zero;
        } else if (status->flush_inputs_to_zero) {
            float_raise(float_flag_input_denormal, status);
            part.cls = float_class_zero;
            part.frac = 0;
        } else {
            int shift = clz64(part.frac) - 1;
            part.cls = float_class_normal;
            part.exp = parm->frac_shift - parm->exp_bias - shift + 1;
            part.frac <<= shift;
        }
    } else {
        part.cls = float_class_normal;
        part.exp -= parm->exp_bias;
        part.frac = DECOMPOSED_IMPLICIT_BIT + (part.frac << parm->frac_shift);
    }
    return part;
}

/* Round and uncanonicalize a floating-point number by parts. There
 * are FRAC_SHIFT bits that may require rounding at the bottom of the
 * fraction; these bits will be removed. The exponent will be biased
 * by EXP_BIAS and must be bounded by [EXP_MAX-1, 0].
 */

static FloatParts round_canonical(FloatParts p, float_status *s,
                                  const FloatFmt *parm)
{
    const uint64_t frac_lsbm1 = parm->frac_lsbm1;
    const uint64_t round_mask = parm->round_mask;
    const uint64_t roundeven_mask = parm->roundeven_mask;
    const int exp_max = parm->exp_max;
    const int frac_shift = parm->frac_shift;
    uint64_t frac, inc;
    int exp, flags = 0;
    bool overflow_norm;

    frac = p.frac;
    exp = p.exp;

    switch (p.cls) {
    case float_class_normal:
        switch (s->float_rounding_mode) {
        case float_round_nearest_even:
            overflow_norm = false;
            inc = ((frac & roundeven_mask) != frac_lsbm1 ? frac_lsbm1 : 0);
            break;
        case float_round_ties_away:
            overflow_norm = false;
            inc = frac_lsbm1;
            break;
        case float_round_to_zero:
            overflow_norm = true;
            inc = 0;
            break;
        case float_round_up:
            inc = p.sign ? 0 : round_mask;
            overflow_norm = p.sign;
            break;
        case float_round_down:
            inc = p.sign ? round_mask : 0;
            overflow_norm = !p.sign;
            break;
        default:
            g_assert_not_reached();
        }

        exp += parm->exp_bias;
        if (likely(exp > 0)) {
            if (frac & round_mask) {
                flags |= float_flag_inexact;
                frac += inc;
                if (frac & DECOMPOSED_OVERFLOW_BIT) {
                    frac >>= 1;
                    exp++;
                }
            }
            frac >>= frac_shift;

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            if (parm->arm_althp) {
                /* ARM Alt HP eschews Inf and NaN for a wider exponent.  */
                if (unlikely(exp > exp_max)) {
                    /* Overflow.  Return the maximum normal.  */
                    flags = float_flag_invalid;
                    exp = exp_max;
                    frac = -1;
                }
            } else if (unlikely(exp >= exp_max)) {
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                flags |= float_flag_overflow | float_flag_inexact;
                if (overflow_norm) {
                    exp = exp_max - 1;
                    frac = -1;
                } else {
                    p.cls = float_class_inf;
                    goto do_inf;
                }
            }
        } else if (s->flush_to_zero) {
            flags |= float_flag_output_denormal;
            p.cls = float_class_zero;
            goto do_zero;
        } else {
            bool is_tiny = (s->float_detect_tininess
                            == float_tininess_before_rounding)
                        || (exp < 0)
                        || !((frac + inc) & DECOMPOSED_OVERFLOW_BIT);

            shift64RightJamming(frac, 1 - exp, &frac);
            if (frac & round_mask) {
                /* Need to recompute round-to-even.  */
                if (s->float_rounding_mode == float_round_nearest_even) {
                    inc = ((frac & roundeven_mask) != frac_lsbm1
                           ? frac_lsbm1 : 0);
                }
                flags |= float_flag_inexact;
                frac += inc;
            }

            exp = (frac & DECOMPOSED_IMPLICIT_BIT ? 1 : 0);
            frac >>= frac_shift;

            if (is_tiny && (flags & float_flag_inexact)) {
                flags |= float_flag_underflow;
            }
            if (exp == 0 && frac == 0) {
                p.cls = float_class_zero;
            }
        }
        break;

    case float_class_zero:
    do_zero:
        exp = 0;
        frac = 0;
        break;

    case float_class_inf:
    do_inf:
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        assert(!parm->arm_althp);
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        exp = exp_max;
        frac = 0;
        break;

    case float_class_qnan:
    case float_class_snan:
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        assert(!parm->arm_althp);
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        exp = exp_max;
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        frac >>= parm->frac_shift;
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        break;

    default:
        g_assert_not_reached();
    }

    float_raise(flags, s);
    p.exp = exp;
    p.frac = frac;
    return p;
}

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/* Explicit FloatFmt version */
static FloatParts float16a_unpack_canonical(float16 f, float_status *s,
                                            const FloatFmt *params)
{
    return canonicalize(float16_unpack_raw(f), params, s);
}

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static FloatParts float16_unpack_canonical(float16 f, float_status *s)
{
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    return float16a_unpack_canonical(f, s, &float16_params);
}

static float16 float16a_round_pack_canonical(FloatParts p, float_status *s,
                                             const FloatFmt *params)
{
    return float16_pack_raw(round_canonical(p, s, params));
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}

static float16 float16_round_pack_canonical(FloatParts p, float_status *s)
{
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    return float16a_round_pack_canonical(p, s, &float16_params);
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}

static FloatParts float32_unpack_canonical(float32 f, float_status *s)
{
    return canonicalize(float32_unpack_raw(f), &float32_params, s);
}

static float32 float32_round_pack_canonical(FloatParts p, float_status *s)
{
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    return float32_pack_raw(round_canonical(p, s, &float32_params));
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}

static FloatParts float64_unpack_canonical(float64 f, float_status *s)
{
    return canonicalize(float64_unpack_raw(f), &float64_params, s);
}

static float64 float64_round_pack_canonical(FloatParts p, float_status *s)
{
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    return float64_pack_raw(round_canonical(p, s, &float64_params));
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}

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static FloatParts return_nan(FloatParts a, float_status *s)
{
    switch (a.cls) {
    case float_class_snan:
        s->float_exception_flags |= float_flag_invalid;
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        a = parts_silence_nan(a, s);
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        /* fall through */
    case float_class_qnan:
        if (s->default_nan_mode) {
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            return parts_default_nan(s);
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        }
        break;

    default:
        g_assert_not_reached();
    }
    return a;
}

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static FloatParts pick_nan(FloatParts a, FloatParts b, float_status *s)
{
    if (is_snan(a.cls) || is_snan(b.cls)) {
        s->float_exception_flags |= float_flag_invalid;
    }

    if (s->default_nan_mode) {
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        return parts_default_nan(s);
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    } else {
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        if (pickNaN(a.cls, b.cls,
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                    a.frac > b.frac ||
                    (a.frac == b.frac && a.sign < b.sign))) {
            a = b;
        }
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        if (is_snan(a.cls)) {
            return parts_silence_nan(a, s);
        }
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    }
    return a;
}

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static FloatParts pick_nan_muladd(FloatParts a, FloatParts b, FloatParts c,
                                  bool inf_zero, float_status *s)
{
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    int which;

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    if (is_snan(a.cls) || is_snan(b.cls) || is_snan(c.cls)) {
        s->float_exception_flags |= float_flag_invalid;
    }

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    which = pickNaNMulAdd(a.cls, b.cls, c.cls, inf_zero, s);
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    if (s->default_nan_mode) {
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        /* Note that this check is after pickNaNMulAdd so that function
         * has an opportunity to set the Invalid flag.
         */
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        which = 3;
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    }
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    switch (which) {
    case 0:
        break;
    case 1:
        a = b;
        break;
    case 2:
        a = c;
        break;
    case 3:
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        return parts_default_nan(s);
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    default:
        g_assert_not_reached();
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    }
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    if (is_snan(a.cls)) {
        return parts_silence_nan(a, s);
    }
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    return a;
}

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/*
 * Returns the result of adding or subtracting the values of the
 * floating-point values `a' and `b'. The operation is performed
 * according to the IEC/IEEE Standard for Binary Floating-Point
 * Arithmetic.
 */

static FloatParts addsub_floats(FloatParts a, FloatParts b, bool subtract,
                                float_status *s)
{
    bool a_sign = a.sign;
    bool b_sign = b.sign ^ subtract;

    if (a_sign != b_sign) {
        /* Subtraction */

        if (a.cls == float_class_normal && b.cls == float_class_normal) {
            if (a.exp > b.exp || (a.exp == b.exp && a.frac >= b.frac)) {
                shift64RightJamming(b.frac, a.exp - b.exp, &b.frac);
                a.frac = a.frac - b.frac;
            } else {
                shift64RightJamming(a.frac, b.exp - a.exp, &a.frac);
                a.frac = b.frac - a.frac;
                a.exp = b.exp;
                a_sign ^= 1;
            }

            if (a.frac == 0) {
                a.cls = float_class_zero;
                a.sign = s->float_rounding_mode == float_round_down;
            } else {
                int shift = clz64(a.frac) - 1;
                a.frac = a.frac << shift;
                a.exp = a.exp - shift;
                a.sign = a_sign;
            }
            return a;
        }
        if (is_nan(a.cls) || is_nan(b.cls)) {
            return pick_nan(a, b, s);
        }
        if (a.cls == float_class_inf) {
            if (b.cls == float_class_inf) {
                float_raise(float_flag_invalid, s);
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                return parts_default_nan(s);
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            }
            return a;
        }
        if (a.cls == float_class_zero && b.cls == float_class_zero) {
            a.sign = s->float_rounding_mode == float_round_down;
            return a;
        }
        if (a.cls == float_class_zero || b.cls == float_class_inf) {
            b.sign = a_sign ^ 1;
            return b;
        }
        if (b.cls == float_class_zero) {
            return a;
        }
    } else {
        /* Addition */
        if (a.cls == float_class_normal && b.cls == float_class_normal) {
            if (a.exp > b.exp) {
                shift64RightJamming(b.frac, a.exp - b.exp, &b.frac);
            } else if (a.exp < b.exp) {
                shift64RightJamming(a.frac, b.exp - a.exp, &a.frac);
                a.exp = b.exp;
            }
            a.frac += b.frac;
            if (a.frac & DECOMPOSED_OVERFLOW_BIT) {
704
                shift64RightJamming(a.frac, 1, &a.frac);
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                a.exp += 1;
            }
            return a;
        }
        if (is_nan(a.cls) || is_nan(b.cls)) {
            return pick_nan(a, b, s);
        }
        if (a.cls == float_class_inf || b.cls == float_class_zero) {
            return a;
        }
        if (b.cls == float_class_inf || a.cls == float_class_zero) {
            b.sign = b_sign;
            return b;
        }
    }
    g_assert_not_reached();
}

/*
 * Returns the result of adding or subtracting the floating-point
 * values `a' and `b'. The operation is performed according to the
 * IEC/IEEE Standard for Binary Floating-Point Arithmetic.
 */

float16  __attribute__((flatten)) float16_add(float16 a, float16 b,
                                              float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pb = float16_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, false, status);

    return float16_round_pack_canonical(pr, status);
}

float32 __attribute__((flatten)) float32_add(float32 a, float32 b,
                                             float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pb = float32_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, false, status);

    return float32_round_pack_canonical(pr, status);
}

float64 __attribute__((flatten)) float64_add(float64 a, float64 b,
                                             float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pb = float64_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, false, status);

    return float64_round_pack_canonical(pr, status);
}

float16 __attribute__((flatten)) float16_sub(float16 a, float16 b,
                                             float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pb = float16_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, true, status);

    return float16_round_pack_canonical(pr, status);
}

float32 __attribute__((flatten)) float32_sub(float32 a, float32 b,
                                             float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pb = float32_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, true, status);

    return float32_round_pack_canonical(pr, status);
}

float64 __attribute__((flatten)) float64_sub(float64 a, float64 b,
                                             float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pb = float64_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, true, status);

    return float64_round_pack_canonical(pr, status);
}

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/*
 * Returns the result of multiplying the floating-point values `a' and
 * `b'. The operation is performed according to the IEC/IEEE Standard
 * for Binary Floating-Point Arithmetic.
 */

static FloatParts mul_floats(FloatParts a, FloatParts b, float_status *s)
{
    bool sign = a.sign ^ b.sign;

    if (a.cls == float_class_normal && b.cls == float_class_normal) {
        uint64_t hi, lo;
        int exp = a.exp + b.exp;

        mul64To128(a.frac, b.frac, &hi, &lo);
        shift128RightJamming(hi, lo, DECOMPOSED_BINARY_POINT, &hi, &lo);
        if (lo & DECOMPOSED_OVERFLOW_BIT) {
            shift64RightJamming(lo, 1, &lo);
            exp += 1;
        }

        /* Re-use a */
        a.exp = exp;
        a.sign = sign;
        a.frac = lo;
        return a;
    }
    /* handle all the NaN cases */
    if (is_nan(a.cls) || is_nan(b.cls)) {
        return pick_nan(a, b, s);
    }
    /* Inf * Zero == NaN */
    if ((a.cls == float_class_inf && b.cls == float_class_zero) ||
        (a.cls == float_class_zero && b.cls == float_class_inf)) {
        s->float_exception_flags |= float_flag_invalid;
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        return parts_default_nan(s);
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    }
    /* Multiply by 0 or Inf */
    if (a.cls == float_class_inf || a.cls == float_class_zero) {
        a.sign = sign;
        return a;
    }
    if (b.cls == float_class_inf || b.cls == float_class_zero) {
        b.sign = sign;
        return b;
    }
    g_assert_not_reached();
}

float16 __attribute__((flatten)) float16_mul(float16 a, float16 b,
                                             float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pb = float16_unpack_canonical(b, status);
    FloatParts pr = mul_floats(pa, pb, status);

    return float16_round_pack_canonical(pr, status);
}

float32 __attribute__((flatten)) float32_mul(float32 a, float32 b,
                                             float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pb = float32_unpack_canonical(b, status);
    FloatParts pr = mul_floats(pa, pb, status);

    return float32_round_pack_canonical(pr, status);
}

float64 __attribute__((flatten)) float64_mul(float64 a, float64 b,
                                             float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pb = float64_unpack_canonical(b, status);
    FloatParts pr = mul_floats(pa, pb, status);

    return float64_round_pack_canonical(pr, status);
}

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/*
 * Returns the result of multiplying the floating-point values `a' and
 * `b' then adding 'c', with no intermediate rounding step after the
 * multiplication. The operation is performed according to the
 * IEC/IEEE Standard for Binary Floating-Point Arithmetic 754-2008.
 * The flags argument allows the caller to select negation of the
 * addend, the intermediate product, or the final result. (The
 * difference between this and having the caller do a separate
 * negation is that negating externally will flip the sign bit on
 * NaNs.)
 */

static FloatParts muladd_floats(FloatParts a, FloatParts b, FloatParts c,
                                int flags, float_status *s)
{
    bool inf_zero = ((1 << a.cls) | (1 << b.cls)) ==
                    ((1 << float_class_inf) | (1 << float_class_zero));
    bool p_sign;
    bool sign_flip = flags & float_muladd_negate_result;
    FloatClass p_class;
    uint64_t hi, lo;
    int p_exp;

    /* It is implementation-defined whether the cases of (0,inf,qnan)
     * and (inf,0,qnan) raise InvalidOperation or not (and what QNaN
     * they return if they do), so we have to hand this information
     * off to the target-specific pick-a-NaN routine.
     */
    if (is_nan(a.cls) || is_nan(b.cls) || is_nan(c.cls)) {
        return pick_nan_muladd(a, b, c, inf_zero, s);
    }

    if (inf_zero) {
        s->float_exception_flags |= float_flag_invalid;
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        return parts_default_nan(s);
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    }

    if (flags & float_muladd_negate_c) {
        c.sign ^= 1;
    }

    p_sign = a.sign ^ b.sign;

    if (flags & float_muladd_negate_product) {
        p_sign ^= 1;
    }

    if (a.cls == float_class_inf || b.cls == float_class_inf) {
        p_class = float_class_inf;
    } else if (a.cls == float_class_zero || b.cls == float_class_zero) {
        p_class = float_class_zero;
    } else {
        p_class = float_class_normal;
    }

    if (c.cls == float_class_inf) {
        if (p_class == float_class_inf && p_sign != c.sign) {
            s->float_exception_flags |= float_flag_invalid;
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            return parts_default_nan(s);
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        } else {
            a.cls = float_class_inf;
            a.sign = c.sign ^ sign_flip;
930
            return a;
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        }
    }

    if (p_class == float_class_inf) {
        a.cls = float_class_inf;
        a.sign = p_sign ^ sign_flip;
        return a;
    }

    if (p_class == float_class_zero) {
        if (c.cls == float_class_zero) {
            if (p_sign != c.sign) {
                p_sign = s->float_rounding_mode == float_round_down;
            }
            c.sign = p_sign;
        } else if (flags & float_muladd_halve_result) {
            c.exp -= 1;
        }
        c.sign ^= sign_flip;
        return c;
    }

    /* a & b should be normals now... */
    assert(a.cls == float_class_normal &&
           b.cls == float_class_normal);

    p_exp = a.exp + b.exp;

    /* Multiply of 2 62-bit numbers produces a (2*62) == 124-bit
     * result.
     */
    mul64To128(a.frac, b.frac, &hi, &lo);
    /* binary point now at bit 124 */

    /* check for overflow */
    if (hi & (1ULL << (DECOMPOSED_BINARY_POINT * 2 + 1 - 64))) {
        shift128RightJamming(hi, lo, 1, &hi, &lo);
        p_exp += 1;
    }

    /* + add/sub */
    if (c.cls == float_class_zero) {
        /* move binary point back to 62 */
        shift128RightJamming(hi, lo, DECOMPOSED_BINARY_POINT, &hi, &lo);
    } else {
        int exp_diff = p_exp - c.exp;
        if (p_sign == c.sign) {
            /* Addition */
            if (exp_diff <= 0) {
                shift128RightJamming(hi, lo,
                                     DECOMPOSED_BINARY_POINT - exp_diff,
                                     &hi, &lo);
                lo += c.frac;
                p_exp = c.exp;
            } else {
                uint64_t c_hi, c_lo;
                /* shift c to the same binary point as the product (124) */
                c_hi = c.frac >> 2;
                c_lo = 0;
                shift128RightJamming(c_hi, c_lo,
                                     exp_diff,
                                     &c_hi, &c_lo);
                add128(hi, lo, c_hi, c_lo, &hi, &lo);
                /* move binary point back to 62 */
                shift128RightJamming(hi, lo, DECOMPOSED_BINARY_POINT, &hi, &lo);
            }

            if (lo & DECOMPOSED_OVERFLOW_BIT) {
                shift64RightJamming(lo, 1, &lo);
                p_exp += 1;
            }

        } else {
            /* Subtraction */
            uint64_t c_hi, c_lo;
            /* make C binary point match product at bit 124 */
            c_hi = c.frac >> 2;
            c_lo = 0;

            if (exp_diff <= 0) {
                shift128RightJamming(hi, lo, -exp_diff, &hi, &lo);
                if (exp_diff == 0
                    &&
                    (hi > c_hi || (hi == c_hi && lo >= c_lo))) {
                    sub128(hi, lo, c_hi, c_lo, &hi, &lo);
                } else {
                    sub128(c_hi, c_lo, hi, lo, &hi, &lo);
                    p_sign ^= 1;
                    p_exp = c.exp;
                }
            } else {
                shift128RightJamming(c_hi, c_lo,
                                     exp_diff,
                                     &c_hi, &c_lo);
                sub128(hi, lo, c_hi, c_lo, &hi, &lo);
            }

            if (hi == 0 && lo == 0) {
                a.cls = float_class_zero;
                a.sign = s->float_rounding_mode == float_round_down;
                a.sign ^= sign_flip;
                return a;
            } else {
                int shift;
                if (hi != 0) {
                    shift = clz64(hi);
                } else {
                    shift = clz64(lo) + 64;
                }
                /* Normalizing to a binary point of 124 is the
                   correct adjust for the exponent.  However since we're
                   shifting, we might as well put the binary point back
                   at 62 where we really want it.  Therefore shift as
                   if we're leaving 1 bit at the top of the word, but
                   adjust the exponent as if we're leaving 3 bits.  */
                shift -= 1;
                if (shift >= 64) {
                    lo = lo << (shift - 64);
                } else {
                    hi = (hi << shift) | (lo >> (64 - shift));
                    lo = hi | ((lo << shift) != 0);
                }
                p_exp -= shift - 2;
            }
        }
    }

    if (flags & float_muladd_halve_result) {
        p_exp -= 1;
    }

    /* finally prepare our result */
    a.cls = float_class_normal;
    a.sign = p_sign ^ sign_flip;
    a.exp = p_exp;
    a.frac = lo;

    return a;
}

float16 __attribute__((flatten)) float16_muladd(float16 a, float16 b, float16 c,
                                                int flags, float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pb = float16_unpack_canonical(b, status);
    FloatParts pc = float16_unpack_canonical(c, status);
    FloatParts pr = muladd_floats(pa, pb, pc, flags, status);

    return float16_round_pack_canonical(pr, status);
}

float32 __attribute__((flatten)) float32_muladd(float32 a, float32 b, float32 c,
                                                int flags, float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pb = float32_unpack_canonical(b, status);
    FloatParts pc = float32_unpack_canonical(c, status);
    FloatParts pr = muladd_floats(pa, pb, pc, flags, status);

    return float32_round_pack_canonical(pr, status);
}

float64 __attribute__((flatten)) float64_muladd(float64 a, float64 b, float64 c,
                                                int flags, float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pb = float64_unpack_canonical(b, status);
    FloatParts pc = float64_unpack_canonical(c, status);
    FloatParts pr = muladd_floats(pa, pb, pc, flags, status);

    return float64_round_pack_canonical(pr, status);
}

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/*
 * Returns the result of dividing the floating-point value `a' by the
 * corresponding value `b'. The operation is performed according to
 * the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
 */

static FloatParts div_floats(FloatParts a, FloatParts b, float_status *s)
{
    bool sign = a.sign ^ b.sign;

    if (a.cls == float_class_normal && b.cls == float_class_normal) {
        uint64_t temp_lo, temp_hi;
        int exp = a.exp - b.exp;
        if (a.frac < b.frac) {
            exp -= 1;
            shortShift128Left(0, a.frac, DECOMPOSED_BINARY_POINT + 1,
                              &temp_hi, &temp_lo);
        } else {
            shortShift128Left(0, a.frac, DECOMPOSED_BINARY_POINT,
                              &temp_hi, &temp_lo);
        }
        /* LSB of quot is set if inexact which roundandpack will use
         * to set flags. Yet again we re-use a for the result */
        a.frac = div128To64(temp_lo, temp_hi, b.frac);
        a.sign = sign;
        a.exp = exp;
        return a;
    }
    /* handle all the NaN cases */
    if (is_nan(a.cls) || is_nan(b.cls)) {
        return pick_nan(a, b, s);
    }
    /* 0/0 or Inf/Inf */
    if (a.cls == b.cls
        &&
        (a.cls == float_class_inf || a.cls == float_class_zero)) {
        s->float_exception_flags |= float_flag_invalid;
1141
        return parts_default_nan(s);
1142
    }
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    /* Inf / x or 0 / x */
    if (a.cls == float_class_inf || a.cls == float_class_zero) {
        a.sign = sign;
        return a;
    }
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    /* Div 0 => Inf */
    if (b.cls == float_class_zero) {
        s->float_exception_flags |= float_flag_divbyzero;
        a.cls = float_class_inf;
        a.sign = sign;
        return a;
    }
    /* Div by Inf */
    if (b.cls == float_class_inf) {
        a.cls = float_class_zero;
        a.sign = sign;
        return a;
    }
    g_assert_not_reached();
}

float16 float16_div(float16 a, float16 b, float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pb = float16_unpack_canonical(b, status);
    FloatParts pr = div_floats(pa, pb, status);

    return float16_round_pack_canonical(pr, status);
}

float32 float32_div(float32 a, float32 b, float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pb = float32_unpack_canonical(b, status);
    FloatParts pr = div_floats(pa, pb, status);

    return float32_round_pack_canonical(pr, status);
}

float64 float64_div(float64 a, float64 b, float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pb = float64_unpack_canonical(b, status);
    FloatParts pr = div_floats(pa, pb, status);

    return float64_round_pack_canonical(pr, status);
}

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/*
 * Float to Float conversions
 *
 * Returns the result of converting one float format to another. The
 * conversion is performed according to the IEC/IEEE Standard for
 * Binary Floating-Point Arithmetic.
 *
 * The float_to_float helper only needs to take care of raising
 * invalid exceptions and handling the conversion on NaNs.
 */

static FloatParts float_to_float(FloatParts a, const FloatFmt *dstf,
                                 float_status *s)
{
    if (dstf->arm_althp) {
        switch (a.cls) {
        case float_class_qnan:
        case float_class_snan:
            /* There is no NaN in the destination format.  Raise Invalid
             * and return a zero with the sign of the input NaN.
             */
            s->float_exception_flags |= float_flag_invalid;
            a.cls = float_class_zero;
            a.frac = 0;
            a.exp = 0;
            break;

        case float_class_inf:
            /* There is no Inf in the destination format.  Raise Invalid
             * and return the maximum normal with the correct sign.
             */
            s->float_exception_flags |= float_flag_invalid;
            a.cls = float_class_normal;
            a.exp = dstf->exp_max;
            a.frac = ((1ull << dstf->frac_size) - 1) << dstf->frac_shift;
            break;

        default:
            break;
        }
    } else if (is_nan(a.cls)) {
        if (is_snan(a.cls)) {
            s->float_exception_flags |= float_flag_invalid;
            a = parts_silence_nan(a, s);
        }
        if (s->default_nan_mode) {
            return parts_default_nan(s);
        }
    }
    return a;
}

float32 float16_to_float32(float16 a, bool ieee, float_status *s)
{
    const FloatFmt *fmt16 = ieee ? &float16_params : &float16_params_ahp;
    FloatParts p = float16a_unpack_canonical(a, s, fmt16);
    FloatParts pr = float_to_float(p, &float32_params, s);
    return float32_round_pack_canonical(pr, s);
}

float64 float16_to_float64(float16 a, bool ieee, float_status *s)
{
    const FloatFmt *fmt16 = ieee ? &float16_params : &float16_params_ahp;
    FloatParts p = float16a_unpack_canonical(a, s, fmt16);
    FloatParts pr = float_to_float(p, &float64_params, s);
    return float64_round_pack_canonical(pr, s);
}

float16 float32_to_float16(float32 a, bool ieee, float_status *s)
{
    const FloatFmt *fmt16 = ieee ? &float16_params : &float16_params_ahp;
    FloatParts p = float32_unpack_canonical(a, s);
    FloatParts pr = float_to_float(p, fmt16, s);
    return float16a_round_pack_canonical(pr, s, fmt16);
}

float64 float32_to_float64(float32 a, float_status *s)
{
    FloatParts p = float32_unpack_canonical(a, s);
    FloatParts pr = float_to_float(p, &float64_params, s);
    return float64_round_pack_canonical(pr, s);
}

float16 float64_to_float16(float64 a, bool ieee, float_status *s)
{
    const FloatFmt *fmt16 = ieee ? &float16_params : &float16_params_ahp;
    FloatParts p = float64_unpack_canonical(a, s);
    FloatParts pr = float_to_float(p, fmt16, s);
    return float16a_round_pack_canonical(pr, s, fmt16);
}

float32 float64_to_float32(float64 a, float_status *s)
{
    FloatParts p = float64_unpack_canonical(a, s);
    FloatParts pr = float_to_float(p, &float32_params, s);
    return float32_round_pack_canonical(pr, s);
}

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/*
 * Rounds the floating-point value `a' to an integer, and returns the
 * result as a floating-point value. The operation is performed
 * according to the IEC/IEEE Standard for Binary Floating-Point
 * Arithmetic.
 */

1296 1297
static FloatParts round_to_int(FloatParts a, int rmode,
                               int scale, float_status *s)
1298
{
1299 1300 1301
    switch (a.cls) {
    case float_class_qnan:
    case float_class_snan:
1302 1303 1304 1305 1306 1307
        return return_nan(a, s);

    case float_class_zero:
    case float_class_inf:
        /* already "integral" */
        break;
1308

1309
    case float_class_normal:
1310 1311 1312
        scale = MIN(MAX(scale, -0x10000), 0x10000);
        a.exp += scale;

1313 1314 1315 1316 1317 1318 1319 1320
        if (a.exp >= DECOMPOSED_BINARY_POINT) {
            /* already integral */
            break;
        }
        if (a.exp < 0) {
            bool one;
            /* all fractional */
            s->float_exception_flags |= float_flag_inexact;
1321
            switch (rmode) {
1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353
            case float_round_nearest_even:
                one = a.exp == -1 && a.frac > DECOMPOSED_IMPLICIT_BIT;
                break;
            case float_round_ties_away:
                one = a.exp == -1 && a.frac >= DECOMPOSED_IMPLICIT_BIT;
                break;
            case float_round_to_zero:
                one = false;
                break;
            case float_round_up:
                one = !a.sign;
                break;
            case float_round_down:
                one = a.sign;
                break;
            default:
                g_assert_not_reached();
            }

            if (one) {
                a.frac = DECOMPOSED_IMPLICIT_BIT;
                a.exp = 0;
            } else {
                a.cls = float_class_zero;
            }
        } else {
            uint64_t frac_lsb = DECOMPOSED_IMPLICIT_BIT >> a.exp;
            uint64_t frac_lsbm1 = frac_lsb >> 1;
            uint64_t rnd_even_mask = (frac_lsb - 1) | frac_lsb;
            uint64_t rnd_mask = rnd_even_mask >> 1;
            uint64_t inc;

1354
            switch (rmode) {
1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393
            case float_round_nearest_even:
                inc = ((a.frac & rnd_even_mask) != frac_lsbm1 ? frac_lsbm1 : 0);
                break;
            case float_round_ties_away:
                inc = frac_lsbm1;
                break;
            case float_round_to_zero:
                inc = 0;
                break;
            case float_round_up:
                inc = a.sign ? 0 : rnd_mask;
                break;
            case float_round_down:
                inc = a.sign ? rnd_mask : 0;
                break;
            default:
                g_assert_not_reached();
            }

            if (a.frac & rnd_mask) {
                s->float_exception_flags |= float_flag_inexact;
                a.frac += inc;
                a.frac &= ~rnd_mask;
                if (a.frac & DECOMPOSED_OVERFLOW_BIT) {
                    a.frac >>= 1;
                    a.exp++;
                }
            }
        }
        break;
    default:
        g_assert_not_reached();
    }
    return a;
}

float16 float16_round_to_int(float16 a, float_status *s)
{
    FloatParts pa = float16_unpack_canonical(a, s);
1394
    FloatParts pr = round_to_int(pa, s->float_rounding_mode, 0, s);
1395 1396 1397 1398 1399 1400
    return float16_round_pack_canonical(pr, s);
}

float32 float32_round_to_int(float32 a, float_status *s)
{
    FloatParts pa = float32_unpack_canonical(a, s);
1401
    FloatParts pr = round_to_int(pa, s->float_rounding_mode, 0, s);
1402 1403 1404 1405 1406 1407
    return float32_round_pack_canonical(pr, s);
}

float64 float64_round_to_int(float64 a, float_status *s)
{
    FloatParts pa = float64_unpack_canonical(a, s);
1408
    FloatParts pr = round_to_int(pa, s->float_rounding_mode, 0, s);
1409 1410 1411 1412 1413 1414
    return float64_round_pack_canonical(pr, s);
}

float64 float64_trunc_to_int(float64 a, float_status *s)
{
    FloatParts pa = float64_unpack_canonical(a, s);
1415
    FloatParts pr = round_to_int(pa, float_round_to_zero, 0, s);
1416 1417 1418
    return float64_round_pack_canonical(pr, s);
}

1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429
/*
 * Returns the result of converting the floating-point value `a' to
 * the two's complement integer format. The conversion is performed
 * according to the IEC/IEEE Standard for Binary Floating-Point
 * Arithmetic---which means in particular that the conversion is
 * rounded according to the current rounding mode. If `a' is a NaN,
 * the largest positive integer is returned. Otherwise, if the
 * conversion overflows, the largest integer with the same sign as `a'
 * is returned.
*/

1430
static int64_t round_to_int_and_pack(FloatParts in, int rmode, int scale,
1431 1432 1433 1434 1435
                                     int64_t min, int64_t max,
                                     float_status *s)
{
    uint64_t r;
    int orig_flags = get_float_exception_flags(s);
1436
    FloatParts p = round_to_int(in, rmode, scale, s);
1437 1438 1439 1440

    switch (p.cls) {
    case float_class_snan:
    case float_class_qnan:
1441
        s->float_exception_flags = orig_flags | float_flag_invalid;
1442 1443
        return max;
    case float_class_inf:
1444
        s->float_exception_flags = orig_flags | float_flag_invalid;
1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456
        return p.sign ? min : max;
    case float_class_zero:
        return 0;
    case float_class_normal:
        if (p.exp < DECOMPOSED_BINARY_POINT) {
            r = p.frac >> (DECOMPOSED_BINARY_POINT - p.exp);
        } else if (p.exp - DECOMPOSED_BINARY_POINT < 2) {
            r = p.frac << (p.exp - DECOMPOSED_BINARY_POINT);
        } else {
            r = UINT64_MAX;
        }
        if (p.sign) {
1457
            if (r <= -(uint64_t) min) {
1458 1459 1460 1461 1462 1463
                return -r;
            } else {
                s->float_exception_flags = orig_flags | float_flag_invalid;
                return min;
            }
        } else {
1464
            if (r <= max) {
1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475
                return r;
            } else {
                s->float_exception_flags = orig_flags | float_flag_invalid;
                return max;
            }
        }
    default:
        g_assert_not_reached();
    }
}

1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596
int16_t float16_to_int16_scalbn(float16 a, int rmode, int scale,
                                float_status *s)
{
    return round_to_int_and_pack(float16_unpack_canonical(a, s),
                                 rmode, scale, INT16_MIN, INT16_MAX, s);
}

int32_t float16_to_int32_scalbn(float16 a, int rmode, int scale,
                                float_status *s)
{
    return round_to_int_and_pack(float16_unpack_canonical(a, s),
                                 rmode, scale, INT32_MIN, INT32_MAX, s);
}

int64_t float16_to_int64_scalbn(float16 a, int rmode, int scale,
                                float_status *s)
{
    return round_to_int_and_pack(float16_unpack_canonical(a, s),
                                 rmode, scale, INT64_MIN, INT64_MAX, s);
}

int16_t float32_to_int16_scalbn(float32 a, int rmode, int scale,
                                float_status *s)
{
    return round_to_int_and_pack(float32_unpack_canonical(a, s),
                                 rmode, scale, INT16_MIN, INT16_MAX, s);
}

int32_t float32_to_int32_scalbn(float32 a, int rmode, int scale,
                                float_status *s)
{
    return round_to_int_and_pack(float32_unpack_canonical(a, s),
                                 rmode, scale, INT32_MIN, INT32_MAX, s);
}

int64_t float32_to_int64_scalbn(float32 a, int rmode, int scale,
                                float_status *s)
{
    return round_to_int_and_pack(float32_unpack_canonical(a, s),
                                 rmode, scale, INT64_MIN, INT64_MAX, s);
}

int16_t float64_to_int16_scalbn(float64 a, int rmode, int scale,
                                float_status *s)
{
    return round_to_int_and_pack(float64_unpack_canonical(a, s),
                                 rmode, scale, INT16_MIN, INT16_MAX, s);
}

int32_t float64_to_int32_scalbn(float64 a, int rmode, int scale,
                                float_status *s)
{
    return round_to_int_and_pack(float64_unpack_canonical(a, s),
                                 rmode, scale, INT32_MIN, INT32_MAX, s);
}

int64_t float64_to_int64_scalbn(float64 a, int rmode, int scale,
                                float_status *s)
{
    return round_to_int_and_pack(float64_unpack_canonical(a, s),
                                 rmode, scale, INT64_MIN, INT64_MAX, s);
}

int16_t float16_to_int16(float16 a, float_status *s)
{
    return float16_to_int16_scalbn(a, s->float_rounding_mode, 0, s);
}

int32_t float16_to_int32(float16 a, float_status *s)
{
    return float16_to_int32_scalbn(a, s->float_rounding_mode, 0, s);
}

int64_t float16_to_int64(float16 a, float_status *s)
{
    return float16_to_int64_scalbn(a, s->float_rounding_mode, 0, s);
}

int16_t float32_to_int16(float32 a, float_status *s)
{
    return float32_to_int16_scalbn(a, s->float_rounding_mode, 0, s);
}

int32_t float32_to_int32(float32 a, float_status *s)
{
    return float32_to_int32_scalbn(a, s->float_rounding_mode, 0, s);
}

int64_t float32_to_int64(float32 a, float_status *s)
{
    return float32_to_int64_scalbn(a, s->float_rounding_mode, 0, s);
}

int16_t float64_to_int16(float64 a, float_status *s)
{
    return float64_to_int16_scalbn(a, s->float_rounding_mode, 0, s);
}

int32_t float64_to_int32(float64 a, float_status *s)
{
    return float64_to_int32_scalbn(a, s->float_rounding_mode, 0, s);
}

int64_t float64_to_int64(float64 a, float_status *s)
{
    return float64_to_int64_scalbn(a, s->float_rounding_mode, 0, s);
}

int16_t float16_to_int16_round_to_zero(float16 a, float_status *s)
{
    return float16_to_int16_scalbn(a, float_round_to_zero, 0, s);
}

int32_t float16_to_int32_round_to_zero(float16 a, float_status *s)
{
    return float16_to_int32_scalbn(a, float_round_to_zero, 0, s);
}

int64_t float16_to_int64_round_to_zero(float16 a, float_status *s)
{
    return float16_to_int64_scalbn(a, float_round_to_zero, 0, s);
1597 1598
}

1599 1600 1601 1602
int16_t float32_to_int16_round_to_zero(float32 a, float_status *s)
{
    return float32_to_int16_scalbn(a, float_round_to_zero, 0, s);
}
1603

1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617
int32_t float32_to_int32_round_to_zero(float32 a, float_status *s)
{
    return float32_to_int32_scalbn(a, float_round_to_zero, 0, s);
}

int64_t float32_to_int64_round_to_zero(float32 a, float_status *s)
{
    return float32_to_int64_scalbn(a, float_round_to_zero, 0, s);
}

int16_t float64_to_int16_round_to_zero(float64 a, float_status *s)
{
    return float64_to_int16_scalbn(a, float_round_to_zero, 0, s);
}
1618

1619 1620 1621 1622
int32_t float64_to_int32_round_to_zero(float64 a, float_status *s)
{
    return float64_to_int32_scalbn(a, float_round_to_zero, 0, s);
}
1623

1624 1625 1626 1627
int64_t float64_to_int64_round_to_zero(float64 a, float_status *s)
{
    return float64_to_int64_scalbn(a, float_round_to_zero, 0, s);
}
1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641

/*
 *  Returns the result of converting the floating-point value `a' to
 *  the unsigned integer format. The conversion is performed according
 *  to the IEC/IEEE Standard for Binary Floating-Point
 *  Arithmetic---which means in particular that the conversion is
 *  rounded according to the current rounding mode. If `a' is a NaN,
 *  the largest unsigned integer is returned. Otherwise, if the
 *  conversion overflows, the largest unsigned integer is returned. If
 *  the 'a' is negative, the result is rounded and zero is returned;
 *  values that do not round to zero will raise the inexact exception
 *  flag.
 */

1642 1643
static uint64_t round_to_uint_and_pack(FloatParts in, int rmode, int scale,
                                       uint64_t max, float_status *s)
1644 1645
{
    int orig_flags = get_float_exception_flags(s);
1646 1647
    FloatParts p = round_to_int(in, rmode, scale, s);
    uint64_t r;
1648 1649 1650 1651 1652 1653 1654

    switch (p.cls) {
    case float_class_snan:
    case float_class_qnan:
        s->float_exception_flags = orig_flags | float_flag_invalid;
        return max;
    case float_class_inf:
1655
        s->float_exception_flags = orig_flags | float_flag_invalid;
1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681
        return p.sign ? 0 : max;
    case float_class_zero:
        return 0;
    case float_class_normal:
        if (p.sign) {
            s->float_exception_flags = orig_flags | float_flag_invalid;
            return 0;
        }

        if (p.exp < DECOMPOSED_BINARY_POINT) {
            r = p.frac >> (DECOMPOSED_BINARY_POINT - p.exp);
        } else if (p.exp - DECOMPOSED_BINARY_POINT < 2) {
            r = p.frac << (p.exp - DECOMPOSED_BINARY_POINT);
        } else {
            s->float_exception_flags = orig_flags | float_flag_invalid;
            return max;
        }

        /* For uint64 this will never trip, but if p.exp is too large
         * to shift a decomposed fraction we shall have exited via the
         * 3rd leg above.
         */
        if (r > max) {
            s->float_exception_flags = orig_flags | float_flag_invalid;
            return max;
        }
1682
        return r;
1683 1684 1685 1686 1687
    default:
        g_assert_not_reached();
    }
}

1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839
uint16_t float16_to_uint16_scalbn(float16 a, int rmode, int scale,
                                  float_status *s)
{
    return round_to_uint_and_pack(float16_unpack_canonical(a, s),
                                  rmode, scale, UINT16_MAX, s);
}

uint32_t float16_to_uint32_scalbn(float16 a, int rmode, int scale,
                                  float_status *s)
{
    return round_to_uint_and_pack(float16_unpack_canonical(a, s),
                                  rmode, scale, UINT32_MAX, s);
}

uint64_t float16_to_uint64_scalbn(float16 a, int rmode, int scale,
                                  float_status *s)
{
    return round_to_uint_and_pack(float16_unpack_canonical(a, s),
                                  rmode, scale, UINT64_MAX, s);
}

uint16_t float32_to_uint16_scalbn(float32 a, int rmode, int scale,
                                  float_status *s)
{
    return round_to_uint_and_pack(float32_unpack_canonical(a, s),
                                  rmode, scale, UINT16_MAX, s);
}

uint32_t float32_to_uint32_scalbn(float32 a, int rmode, int scale,
                                  float_status *s)
{
    return round_to_uint_and_pack(float32_unpack_canonical(a, s),
                                  rmode, scale, UINT32_MAX, s);
}

uint64_t float32_to_uint64_scalbn(float32 a, int rmode, int scale,
                                  float_status *s)
{
    return round_to_uint_and_pack(float32_unpack_canonical(a, s),
                                  rmode, scale, UINT64_MAX, s);
}

uint16_t float64_to_uint16_scalbn(float64 a, int rmode, int scale,
                                  float_status *s)
{
    return round_to_uint_and_pack(float64_unpack_canonical(a, s),
                                  rmode, scale, UINT16_MAX, s);
}

uint32_t float64_to_uint32_scalbn(float64 a, int rmode, int scale,
                                  float_status *s)
{
    return round_to_uint_and_pack(float64_unpack_canonical(a, s),
                                  rmode, scale, UINT32_MAX, s);
}

uint64_t float64_to_uint64_scalbn(float64 a, int rmode, int scale,
                                  float_status *s)
{
    return round_to_uint_and_pack(float64_unpack_canonical(a, s),
                                  rmode, scale, UINT64_MAX, s);
}

uint16_t float16_to_uint16(float16 a, float_status *s)
{
    return float16_to_uint16_scalbn(a, s->float_rounding_mode, 0, s);
}

uint32_t float16_to_uint32(float16 a, float_status *s)
{
    return float16_to_uint32_scalbn(a, s->float_rounding_mode, 0, s);
}

uint64_t float16_to_uint64(float16 a, float_status *s)
{
    return float16_to_uint64_scalbn(a, s->float_rounding_mode, 0, s);
}

uint16_t float32_to_uint16(float32 a, float_status *s)
{
    return float32_to_uint16_scalbn(a, s->float_rounding_mode, 0, s);
}

uint32_t float32_to_uint32(float32 a, float_status *s)
{
    return float32_to_uint32_scalbn(a, s->float_rounding_mode, 0, s);
}

uint64_t float32_to_uint64(float32 a, float_status *s)
{
    return float32_to_uint64_scalbn(a, s->float_rounding_mode, 0, s);
}

uint16_t float64_to_uint16(float64 a, float_status *s)
{
    return float64_to_uint16_scalbn(a, s->float_rounding_mode, 0, s);
}

uint32_t float64_to_uint32(float64 a, float_status *s)
{
    return float64_to_uint32_scalbn(a, s->float_rounding_mode, 0, s);
}

uint64_t float64_to_uint64(float64 a, float_status *s)
{
    return float64_to_uint64_scalbn(a, s->float_rounding_mode, 0, s);
}

uint16_t float16_to_uint16_round_to_zero(float16 a, float_status *s)
{
    return float16_to_uint16_scalbn(a, float_round_to_zero, 0, s);
}

uint32_t float16_to_uint32_round_to_zero(float16 a, float_status *s)
{
    return float16_to_uint32_scalbn(a, float_round_to_zero, 0, s);
}

uint64_t float16_to_uint64_round_to_zero(float16 a, float_status *s)
{
    return float16_to_uint64_scalbn(a, float_round_to_zero, 0, s);
}

uint16_t float32_to_uint16_round_to_zero(float32 a, float_status *s)
{
    return float32_to_uint16_scalbn(a, float_round_to_zero, 0, s);
}

uint32_t float32_to_uint32_round_to_zero(float32 a, float_status *s)
{
    return float32_to_uint32_scalbn(a, float_round_to_zero, 0, s);
}

uint64_t float32_to_uint64_round_to_zero(float32 a, float_status *s)
{
    return float32_to_uint64_scalbn(a, float_round_to_zero, 0, s);
}

uint16_t float64_to_uint16_round_to_zero(float64 a, float_status *s)
{
    return float64_to_uint16_scalbn(a, float_round_to_zero, 0, s);
}

uint32_t float64_to_uint32_round_to_zero(float64 a, float_status *s)
{
    return float64_to_uint32_scalbn(a, float_round_to_zero, 0, s);
}

uint64_t float64_to_uint64_round_to_zero(float64 a, float_status *s)
{
    return float64_to_uint64_scalbn(a, float_round_to_zero, 0, s);
}
1840

1841 1842 1843 1844 1845 1846 1847 1848
/*
 * Integer to float conversions
 *
 * Returns the result of converting the two's complement integer `a'
 * to the floating-point format. The conversion is performed according
 * to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
 */

1849
static FloatParts int_to_float(int64_t a, int scale, float_status *status)
1850
{
1851 1852
    FloatParts r = { .sign = false };

1853 1854 1855
    if (a == 0) {
        r.cls = float_class_zero;
    } else {
1856 1857 1858 1859
        uint64_t f = a;
        int shift;

        r.cls = float_class_normal;
1860
        if (a < 0) {
1861
            f = -f;
1862 1863
            r.sign = true;
        }
1864 1865 1866 1867 1868
        shift = clz64(f) - 1;
        scale = MIN(MAX(scale, -0x10000), 0x10000);

        r.exp = DECOMPOSED_BINARY_POINT - shift + scale;
        r.frac = (shift < 0 ? DECOMPOSED_IMPLICIT_BIT : f << shift);
1869 1870 1871 1872 1873
    }

    return r;
}

1874
float16 int64_to_float16_scalbn(int64_t a, int scale, float_status *status)
1875
{
1876
    FloatParts pa = int_to_float(a, scale, status);
1877 1878 1879
    return float16_round_pack_canonical(pa, status);
}

1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894
float16 int32_to_float16_scalbn(int32_t a, int scale, float_status *status)
{
    return int64_to_float16_scalbn(a, scale, status);
}

float16 int16_to_float16_scalbn(int16_t a, int scale, float_status *status)
{
    return int64_to_float16_scalbn(a, scale, status);
}

float16 int64_to_float16(int64_t a, float_status *status)
{
    return int64_to_float16_scalbn(a, 0, status);
}

1895 1896
float16 int32_to_float16(int32_t a, float_status *status)
{
1897
    return int64_to_float16_scalbn(a, 0, status);
1898 1899 1900 1901
}

float16 int16_to_float16(int16_t a, float_status *status)
{
1902
    return int64_to_float16_scalbn(a, 0, status);
1903 1904
}

1905
float32 int64_to_float32_scalbn(int64_t a, int scale, float_status *status)
1906
{
1907
    FloatParts pa = int_to_float(a, scale, status);
1908 1909 1910
    return float32_round_pack_canonical(pa, status);
}

1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925
float32 int32_to_float32_scalbn(int32_t a, int scale, float_status *status)
{
    return int64_to_float32_scalbn(a, scale, status);
}

float32 int16_to_float32_scalbn(int16_t a, int scale, float_status *status)
{
    return int64_to_float32_scalbn(a, scale, status);
}

float32 int64_to_float32(int64_t a, float_status *status)
{
    return int64_to_float32_scalbn(a, 0, status);
}

1926 1927
float32 int32_to_float32(int32_t a, float_status *status)
{
1928
    return int64_to_float32_scalbn(a, 0, status);
1929 1930 1931 1932
}

float32 int16_to_float32(int16_t a, float_status *status)
{
1933
    return int64_to_float32_scalbn(a, 0, status);
1934 1935
}

1936
float64 int64_to_float64_scalbn(int64_t a, int scale, float_status *status)
1937
{
1938
    FloatParts pa = int_to_float(a, scale, status);
1939 1940 1941
    return float64_round_pack_canonical(pa, status);
}

1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956
float64 int32_to_float64_scalbn(int32_t a, int scale, float_status *status)
{
    return int64_to_float64_scalbn(a, scale, status);
}

float64 int16_to_float64_scalbn(int16_t a, int scale, float_status *status)
{
    return int64_to_float64_scalbn(a, scale, status);
}

float64 int64_to_float64(int64_t a, float_status *status)
{
    return int64_to_float64_scalbn(a, 0, status);
}

1957 1958
float64 int32_to_float64(int32_t a, float_status *status)
{
1959
    return int64_to_float64_scalbn(a, 0, status);
1960 1961 1962 1963
}

float64 int16_to_float64(int16_t a, float_status *status)
{
1964
    return int64_to_float64_scalbn(a, 0, status);
1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975
}


/*
 * Unsigned Integer to float conversions
 *
 * Returns the result of converting the unsigned integer `a' to the
 * floating-point format. The conversion is performed according to the
 * IEC/IEEE Standard for Binary Floating-Point Arithmetic.
 */

1976
static FloatParts uint_to_float(uint64_t a, int scale, float_status *status)
1977
{
1978
    FloatParts r = { .sign = false };
1979 1980 1981 1982

    if (a == 0) {
        r.cls = float_class_zero;
    } else {
1983
        scale = MIN(MAX(scale, -0x10000), 0x10000);
1984
        r.cls = float_class_normal;
1985 1986 1987
        if ((int64_t)a < 0) {
            r.exp = DECOMPOSED_BINARY_POINT + 1 + scale;
            shift64RightJamming(a, 1, &a);
1988 1989
            r.frac = a;
        } else {
1990 1991 1992
            int shift = clz64(a) - 1;
            r.exp = DECOMPOSED_BINARY_POINT - shift + scale;
            r.frac = a << shift;
1993 1994 1995 1996 1997 1998
        }
    }

    return r;
}

1999
float16 uint64_to_float16_scalbn(uint64_t a, int scale, float_status *status)
2000
{
2001
    FloatParts pa = uint_to_float(a, scale, status);
2002 2003 2004
    return float16_round_pack_canonical(pa, status);
}

2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019
float16 uint32_to_float16_scalbn(uint32_t a, int scale, float_status *status)
{
    return uint64_to_float16_scalbn(a, scale, status);
}

float16 uint16_to_float16_scalbn(uint16_t a, int scale, float_status *status)
{
    return uint64_to_float16_scalbn(a, scale, status);
}

float16 uint64_to_float16(uint64_t a, float_status *status)
{
    return uint64_to_float16_scalbn(a, 0, status);
}

2020 2021
float16 uint32_to_float16(uint32_t a, float_status *status)
{
2022
    return uint64_to_float16_scalbn(a, 0, status);
2023 2024 2025 2026
}

float16 uint16_to_float16(uint16_t a, float_status *status)
{
2027
    return uint64_to_float16_scalbn(a, 0, status);
2028 2029
}

2030
float32 uint64_to_float32_scalbn(uint64_t a, int scale, float_status *status)
2031
{
2032
    FloatParts pa = uint_to_float(a, scale, status);
2033 2034 2035
    return float32_round_pack_canonical(pa, status);
}

2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050
float32 uint32_to_float32_scalbn(uint32_t a, int scale, float_status *status)
{
    return uint64_to_float32_scalbn(a, scale, status);
}

float32 uint16_to_float32_scalbn(uint16_t a, int scale, float_status *status)
{
    return uint64_to_float32_scalbn(a, scale, status);
}

float32 uint64_to_float32(uint64_t a, float_status *status)
{
    return uint64_to_float32_scalbn(a, 0, status);
}

2051 2052
float32 uint32_to_float32(uint32_t a, float_status *status)
{
2053
    return uint64_to_float32_scalbn(a, 0, status);
2054 2055 2056 2057
}

float32 uint16_to_float32(uint16_t a, float_status *status)
{
2058
    return uint64_to_float32_scalbn(a, 0, status);
2059 2060
}

2061
float64 uint64_to_float64_scalbn(uint64_t a, int scale, float_status *status)
2062
{
2063
    FloatParts pa = uint_to_float(a, scale, status);
2064 2065 2066
    return float64_round_pack_canonical(pa, status);
}

2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081
float64 uint32_to_float64_scalbn(uint32_t a, int scale, float_status *status)
{
    return uint64_to_float64_scalbn(a, scale, status);
}

float64 uint16_to_float64_scalbn(uint16_t a, int scale, float_status *status)
{
    return uint64_to_float64_scalbn(a, scale, status);
}

float64 uint64_to_float64(uint64_t a, float_status *status)
{
    return uint64_to_float64_scalbn(a, 0, status);
}

2082 2083
float64 uint32_to_float64(uint32_t a, float_status *status)
{
2084
    return uint64_to_float64_scalbn(a, 0, status);
2085 2086 2087 2088
}

float64 uint16_to_float64(uint16_t a, float_status *status)
{
2089
    return uint64_to_float64_scalbn(a, 0, status);
2090 2091
}

2092 2093 2094 2095 2096 2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158
/* Float Min/Max */
/* min() and max() functions. These can't be implemented as
 * 'compare and pick one input' because that would mishandle
 * NaNs and +0 vs -0.
 *
 * minnum() and maxnum() functions. These are similar to the min()
 * and max() functions but if one of the arguments is a QNaN and
 * the other is numerical then the numerical argument is returned.
 * SNaNs will get quietened before being returned.
 * minnum() and maxnum correspond to the IEEE 754-2008 minNum()
 * and maxNum() operations. min() and max() are the typical min/max
 * semantics provided by many CPUs which predate that specification.
 *
 * minnummag() and maxnummag() functions correspond to minNumMag()
 * and minNumMag() from the IEEE-754 2008.
 */
static FloatParts minmax_floats(FloatParts a, FloatParts b, bool ismin,
                                bool ieee, bool ismag, float_status *s)
{
    if (unlikely(is_nan(a.cls) || is_nan(b.cls))) {
        if (ieee) {
            /* Takes two floating-point values `a' and `b', one of
             * which is a NaN, and returns the appropriate NaN
             * result. If either `a' or `b' is a signaling NaN,
             * the invalid exception is raised.
             */
            if (is_snan(a.cls) || is_snan(b.cls)) {
                return pick_nan(a, b, s);
            } else if (is_nan(a.cls) && !is_nan(b.cls)) {
                return b;
            } else if (is_nan(b.cls) && !is_nan(a.cls)) {
                return a;
            }
        }
        return pick_nan(a, b, s);
    } else {
        int a_exp, b_exp;

        switch (a.cls) {
        case float_class_normal:
            a_exp = a.exp;
            break;
        case float_class_inf:
            a_exp = INT_MAX;
            break;
        case float_class_zero:
            a_exp = INT_MIN;
            break;
        default:
            g_assert_not_reached();
            break;
        }
        switch (b.cls) {
        case float_class_normal:
            b_exp = b.exp;
            break;
        case float_class_inf:
            b_exp = INT_MAX;
            break;
        case float_class_zero:
            b_exp = INT_MIN;
            break;
        default:
            g_assert_not_reached();
            break;
        }

2159 2160 2161 2162 2163 2164
        if (ismag && (a_exp != b_exp || a.frac != b.frac)) {
            bool a_less = a_exp < b_exp;
            if (a_exp == b_exp) {
                a_less = a.frac < b.frac;
            }
            return a_less ^ ismin ? b : a;
2165 2166
        }

2167
        if (a.sign == b.sign) {
2168 2169 2170 2171
            bool a_less = a_exp < b_exp;
            if (a_exp == b_exp) {
                a_less = a.frac < b.frac;
            }
2172
            return a.sign ^ a_less ^ ismin ? b : a;
2173
        } else {
2174
            return a.sign ^ ismin ? b : a;
2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212
        }
    }
}

#define MINMAX(sz, name, ismin, isiee, ismag)                           \
float ## sz float ## sz ## _ ## name(float ## sz a, float ## sz b,      \
                                     float_status *s)                   \
{                                                                       \
    FloatParts pa = float ## sz ## _unpack_canonical(a, s);             \
    FloatParts pb = float ## sz ## _unpack_canonical(b, s);             \
    FloatParts pr = minmax_floats(pa, pb, ismin, isiee, ismag, s);      \
                                                                        \
    return float ## sz ## _round_pack_canonical(pr, s);                 \
}

MINMAX(16, min, true, false, false)
MINMAX(16, minnum, true, true, false)
MINMAX(16, minnummag, true, true, true)
MINMAX(16, max, false, false, false)
MINMAX(16, maxnum, false, true, false)
MINMAX(16, maxnummag, false, true, true)

MINMAX(32, min, true, false, false)
MINMAX(32, minnum, true, true, false)
MINMAX(32, minnummag, true, true, true)
MINMAX(32, max, false, false, false)
MINMAX(32, maxnum, false, true, false)
MINMAX(32, maxnummag, false, true, true)

MINMAX(64, min, true, false, false)
MINMAX(64, minnum, true, true, false)
MINMAX(64, minnummag, true, true, true)
MINMAX(64, max, false, false, false)
MINMAX(64, maxnum, false, true, false)
MINMAX(64, maxnummag, false, true, true)

#undef MINMAX

2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281 2282 2283 2284 2285 2286 2287 2288 2289 2290 2291 2292
/* Floating point compare */
static int compare_floats(FloatParts a, FloatParts b, bool is_quiet,
                          float_status *s)
{
    if (is_nan(a.cls) || is_nan(b.cls)) {
        if (!is_quiet ||
            a.cls == float_class_snan ||
            b.cls == float_class_snan) {
            s->float_exception_flags |= float_flag_invalid;
        }
        return float_relation_unordered;
    }

    if (a.cls == float_class_zero) {
        if (b.cls == float_class_zero) {
            return float_relation_equal;
        }
        return b.sign ? float_relation_greater : float_relation_less;
    } else if (b.cls == float_class_zero) {
        return a.sign ? float_relation_less : float_relation_greater;
    }

    /* The only really important thing about infinity is its sign. If
     * both are infinities the sign marks the smallest of the two.
     */
    if (a.cls == float_class_inf) {
        if ((b.cls == float_class_inf) && (a.sign == b.sign)) {
            return float_relation_equal;
        }
        return a.sign ? float_relation_less : float_relation_greater;
    } else if (b.cls == float_class_inf) {
        return b.sign ? float_relation_greater : float_relation_less;
    }

    if (a.sign != b.sign) {
        return a.sign ? float_relation_less : float_relation_greater;
    }

    if (a.exp == b.exp) {
        if (a.frac == b.frac) {
            return float_relation_equal;
        }
        if (a.sign) {
            return a.frac > b.frac ?
                float_relation_less : float_relation_greater;
        } else {
            return a.frac > b.frac ?
                float_relation_greater : float_relation_less;
        }
    } else {
        if (a.sign) {
            return a.exp > b.exp ? float_relation_less : float_relation_greater;
        } else {
            return a.exp > b.exp ? float_relation_greater : float_relation_less;
        }
    }
}

#define COMPARE(sz)                                                     \
int float ## sz ## _compare(float ## sz a, float ## sz b,               \
                            float_status *s)                            \
{                                                                       \
    FloatParts pa = float ## sz ## _unpack_canonical(a, s);             \
    FloatParts pb = float ## sz ## _unpack_canonical(b, s);             \
    return compare_floats(pa, pb, false, s);                            \
}                                                                       \
int float ## sz ## _compare_quiet(float ## sz a, float ## sz b,         \
                                  float_status *s)                      \
{                                                                       \
    FloatParts pa = float ## sz ## _unpack_canonical(a, s);             \
    FloatParts pb = float ## sz ## _unpack_canonical(b, s);             \
    return compare_floats(pa, pb, true, s);                             \
}

COMPARE(16)
COMPARE(32)
COMPARE(64)

#undef COMPARE

2293 2294 2295 2296 2297 2298 2299
/* Multiply A by 2 raised to the power N.  */
static FloatParts scalbn_decomposed(FloatParts a, int n, float_status *s)
{
    if (unlikely(is_nan(a.cls))) {
        return return_nan(a, s);
    }
    if (a.cls == float_class_normal) {
2300 2301 2302 2303 2304 2305
        /* The largest float type (even though not supported by FloatParts)
         * is float128, which has a 15 bit exponent.  Bounding N to 16 bits
         * still allows rounding to infinity, without allowing overflow
         * within the int32_t that backs FloatParts.exp.
         */
        n = MIN(MAX(n, -0x10000), 0x10000);
2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331
        a.exp += n;
    }
    return a;
}

float16 float16_scalbn(float16 a, int n, float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pr = scalbn_decomposed(pa, n, status);
    return float16_round_pack_canonical(pr, status);
}

float32 float32_scalbn(float32 a, int n, float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pr = scalbn_decomposed(pa, n, status);
    return float32_round_pack_canonical(pr, status);
}

float64 float64_scalbn(float64 a, int n, float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pr = scalbn_decomposed(pa, n, status);
    return float64_round_pack_canonical(pr, status);
}

2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356
/*
 * Square Root
 *
 * The old softfloat code did an approximation step before zeroing in
 * on the final result. However for simpleness we just compute the
 * square root by iterating down from the implicit bit to enough extra
 * bits to ensure we get a correctly rounded result.
 *
 * This does mean however the calculation is slower than before,
 * especially for 64 bit floats.
 */

static FloatParts sqrt_float(FloatParts a, float_status *s, const FloatFmt *p)
{
    uint64_t a_frac, r_frac, s_frac;
    int bit, last_bit;

    if (is_nan(a.cls)) {
        return return_nan(a, s);
    }
    if (a.cls == float_class_zero) {
        return a;  /* sqrt(+-0) = +-0 */
    }
    if (a.sign) {
        s->float_exception_flags |= float_flag_invalid;
2357
        return parts_default_nan(s);
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    }
    if (a.cls == float_class_inf) {
        return a;  /* sqrt(+inf) = +inf */
    }

    assert(a.cls == float_class_normal);

    /* We need two overflow bits at the top. Adding room for that is a
     * right shift. If the exponent is odd, we can discard the low bit
     * by multiplying the fraction by 2; that's a left shift. Combine
     * those and we shift right if the exponent is even.
     */
    a_frac = a.frac;
    if (!(a.exp & 1)) {
        a_frac >>= 1;
    }
    a.exp >>= 1;

    /* Bit-by-bit computation of sqrt.  */
    r_frac = 0;
    s_frac = 0;

    /* Iterate from implicit bit down to the 3 extra bits to compute a
     * properly rounded result. Remember we've inserted one more bit
     * at the top, so these positions are one less.
     */
    bit = DECOMPOSED_BINARY_POINT - 1;
    last_bit = MAX(p->frac_shift - 4, 0);
    do {
        uint64_t q = 1ULL << bit;
        uint64_t t_frac = s_frac + q;
        if (t_frac <= a_frac) {
            s_frac = t_frac + q;
            a_frac -= t_frac;
            r_frac += q;
        }
        a_frac <<= 1;
    } while (--bit >= last_bit);

    /* Undo the right shift done above. If there is any remaining
     * fraction, the result is inexact. Set the sticky bit.
     */
    a.frac = (r_frac << 1) + (a_frac != 0);

    return a;
}

float16 __attribute__((flatten)) float16_sqrt(float16 a, float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pr = sqrt_float(pa, status, &float16_params);
    return float16_round_pack_canonical(pr, status);
}

float32 __attribute__((flatten)) float32_sqrt(float32 a, float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pr = sqrt_float(pa, status, &float32_params);
    return float32_round_pack_canonical(pr, status);
}

float64 __attribute__((flatten)) float64_sqrt(float64 a, float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pr = sqrt_float(pa, status, &float64_params);
    return float64_round_pack_canonical(pr, status);
}

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/*----------------------------------------------------------------------------
| The pattern for a default generated NaN.
*----------------------------------------------------------------------------*/

float16 float16_default_nan(float_status *status)
{
    FloatParts p = parts_default_nan(status);
    p.frac >>= float16_params.frac_shift;
    return float16_pack_raw(p);
}

float32 float32_default_nan(float_status *status)
{
    FloatParts p = parts_default_nan(status);
    p.frac >>= float32_params.frac_shift;
    return float32_pack_raw(p);
}

float64 float64_default_nan(float_status *status)
{
    FloatParts p = parts_default_nan(status);
    p.frac >>= float64_params.frac_shift;
    return float64_pack_raw(p);
}

float128 float128_default_nan(float_status *status)
{
    FloatParts p = parts_default_nan(status);
    float128 r;

    /* Extrapolate from the choices made by parts_default_nan to fill
     * in the quad-floating format.  If the low bit is set, assume we
     * want to set all non-snan bits.
     */
    r.low = -(p.frac & 1);
    r.high = p.frac >> (DECOMPOSED_BINARY_POINT - 48);
    r.high |= LIT64(0x7FFF000000000000);
    r.high |= (uint64_t)p.sign << 63;

    return r;
}
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/*----------------------------------------------------------------------------
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| Returns a quiet NaN from a signalling NaN for the floating point value `a'.
*----------------------------------------------------------------------------*/

float16 float16_silence_nan(float16 a, float_status *status)
{
    FloatParts p = float16_unpack_raw(a);
    p.frac <<= float16_params.frac_shift;
    p = parts_silence_nan(p, status);
    p.frac >>= float16_params.frac_shift;
    return float16_pack_raw(p);
}

float32 float32_silence_nan(float32 a, float_status *status)
{
    FloatParts p = float32_unpack_raw(a);
    p.frac <<= float32_params.frac_shift;
    p = parts_silence_nan(p, status);
    p.frac >>= float32_params.frac_shift;
    return float32_pack_raw(p);
}

float64 float64_silence_nan(float64 a, float_status *status)
{
    FloatParts p = float64_unpack_raw(a);
    p.frac <<= float64_params.frac_shift;
    p = parts_silence_nan(p, status);
    p.frac >>= float64_params.frac_shift;
    return float64_pack_raw(p);
}

/*----------------------------------------------------------------------------
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2500 2501 2502 2503 2504 2505 2506 2507 2508 2509
| Takes a 64-bit fixed-point value `absZ' with binary point between bits 6
| and 7, and returns the properly rounded 32-bit integer corresponding to the
| input.  If `zSign' is 1, the input is negated before being converted to an
| integer.  Bit 63 of `absZ' must be zero.  Ordinarily, the fixed-point input
| is simply rounded to an integer, with the inexact exception raised if the
| input cannot be represented exactly as an integer.  However, if the fixed-
| point input is too large, the invalid exception is raised and the largest
| positive or negative integer is returned.
*----------------------------------------------------------------------------*/

2510
static int32_t roundAndPackInt32(flag zSign, uint64_t absZ, float_status *status)
B
bellard 已提交
2511
{
2512
    int8_t roundingMode;
B
bellard 已提交
2513
    flag roundNearestEven;
2514
    int8_t roundIncrement, roundBits;
2515
    int32_t z;
B
bellard 已提交
2516

2517
    roundingMode = status->float_rounding_mode;
B
bellard 已提交
2518
    roundNearestEven = ( roundingMode == float_round_nearest_even );
2519 2520
    switch (roundingMode) {
    case float_round_nearest_even:
2521
    case float_round_ties_away:
2522 2523 2524 2525 2526 2527 2528 2529 2530 2531 2532 2533 2534
        roundIncrement = 0x40;
        break;
    case float_round_to_zero:
        roundIncrement = 0;
        break;
    case float_round_up:
        roundIncrement = zSign ? 0 : 0x7f;
        break;
    case float_round_down:
        roundIncrement = zSign ? 0x7f : 0;
        break;
    default:
        abort();
B
bellard 已提交
2535 2536 2537 2538 2539 2540 2541
    }
    roundBits = absZ & 0x7F;
    absZ = ( absZ + roundIncrement )>>7;
    absZ &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
    z = absZ;
    if ( zSign ) z = - z;
    if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {
2542
        float_raise(float_flag_invalid, status);
2543
        return zSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
B
bellard 已提交
2544
    }
2545 2546 2547
    if (roundBits) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
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2548 2549 2550 2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563
    return z;

}

/*----------------------------------------------------------------------------
| Takes the 128-bit fixed-point value formed by concatenating `absZ0' and
| `absZ1', with binary point between bits 63 and 64 (between the input words),
| and returns the properly rounded 64-bit integer corresponding to the input.
| If `zSign' is 1, the input is negated before being converted to an integer.
| Ordinarily, the fixed-point input is simply rounded to an integer, with
| the inexact exception raised if the input cannot be represented exactly as
| an integer.  However, if the fixed-point input is too large, the invalid
| exception is raised and the largest positive or negative integer is
| returned.
*----------------------------------------------------------------------------*/

2564
static int64_t roundAndPackInt64(flag zSign, uint64_t absZ0, uint64_t absZ1,
2565
                               float_status *status)
B
bellard 已提交
2566
{
2567
    int8_t roundingMode;
B
bellard 已提交
2568
    flag roundNearestEven, increment;
2569
    int64_t z;
B
bellard 已提交
2570

2571
    roundingMode = status->float_rounding_mode;
B
bellard 已提交
2572
    roundNearestEven = ( roundingMode == float_round_nearest_even );
2573 2574
    switch (roundingMode) {
    case float_round_nearest_even:
2575
    case float_round_ties_away:
2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588
        increment = ((int64_t) absZ1 < 0);
        break;
    case float_round_to_zero:
        increment = 0;
        break;
    case float_round_up:
        increment = !zSign && absZ1;
        break;
    case float_round_down:
        increment = zSign && absZ1;
        break;
    default:
        abort();
B
bellard 已提交
2589 2590 2591 2592
    }
    if ( increment ) {
        ++absZ0;
        if ( absZ0 == 0 ) goto overflow;
2593
        absZ0 &= ~ ( ( (uint64_t) ( absZ1<<1 ) == 0 ) & roundNearestEven );
B
bellard 已提交
2594 2595 2596 2597 2598
    }
    z = absZ0;
    if ( zSign ) z = - z;
    if ( z && ( ( z < 0 ) ^ zSign ) ) {
 overflow:
2599
        float_raise(float_flag_invalid, status);
B
bellard 已提交
2600
        return
2601
              zSign ? (int64_t) LIT64( 0x8000000000000000 )
B
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2602 2603
            : LIT64( 0x7FFFFFFFFFFFFFFF );
    }
2604 2605 2606
    if (absZ1) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
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2607 2608 2609 2610
    return z;

}

2611 2612 2613 2614 2615 2616 2617 2618 2619 2620
/*----------------------------------------------------------------------------
| Takes the 128-bit fixed-point value formed by concatenating `absZ0' and
| `absZ1', with binary point between bits 63 and 64 (between the input words),
| and returns the properly rounded 64-bit unsigned integer corresponding to the
| input.  Ordinarily, the fixed-point input is simply rounded to an integer,
| with the inexact exception raised if the input cannot be represented exactly
| as an integer.  However, if the fixed-point input is too large, the invalid
| exception is raised and the largest unsigned integer is returned.
*----------------------------------------------------------------------------*/

2621
static int64_t roundAndPackUint64(flag zSign, uint64_t absZ0,
2622
                                uint64_t absZ1, float_status *status)
2623
{
2624
    int8_t roundingMode;
2625 2626
    flag roundNearestEven, increment;

2627
    roundingMode = status->float_rounding_mode;
2628
    roundNearestEven = (roundingMode == float_round_nearest_even);
2629 2630
    switch (roundingMode) {
    case float_round_nearest_even:
2631
    case float_round_ties_away:
2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644
        increment = ((int64_t)absZ1 < 0);
        break;
    case float_round_to_zero:
        increment = 0;
        break;
    case float_round_up:
        increment = !zSign && absZ1;
        break;
    case float_round_down:
        increment = zSign && absZ1;
        break;
    default:
        abort();
2645 2646 2647 2648
    }
    if (increment) {
        ++absZ0;
        if (absZ0 == 0) {
2649
            float_raise(float_flag_invalid, status);
2650 2651 2652 2653 2654 2655
            return LIT64(0xFFFFFFFFFFFFFFFF);
        }
        absZ0 &= ~(((uint64_t)(absZ1<<1) == 0) & roundNearestEven);
    }

    if (zSign && absZ0) {
2656
        float_raise(float_flag_invalid, status);
2657 2658 2659 2660
        return 0;
    }

    if (absZ1) {
2661
        status->float_exception_flags |= float_flag_inexact;
2662 2663 2664 2665
    }
    return absZ0;
}

2666 2667 2668 2669
/*----------------------------------------------------------------------------
| If `a' is denormal and we are in flush-to-zero mode then set the
| input-denormal exception and return zero. Otherwise just return the value.
*----------------------------------------------------------------------------*/
2670
float32 float32_squash_input_denormal(float32 a, float_status *status)
2671
{
2672
    if (status->flush_inputs_to_zero) {
2673
        if (extractFloat32Exp(a) == 0 && extractFloat32Frac(a) != 0) {
2674
            float_raise(float_flag_input_denormal, status);
2675 2676 2677 2678 2679 2680
            return make_float32(float32_val(a) & 0x80000000);
        }
    }
    return a;
}

B
bellard 已提交
2681 2682 2683 2684 2685 2686 2687 2688
/*----------------------------------------------------------------------------
| Normalizes the subnormal single-precision floating-point value represented
| by the denormalized significand `aSig'.  The normalized exponent and
| significand are stored at the locations pointed to by `zExpPtr' and
| `zSigPtr', respectively.
*----------------------------------------------------------------------------*/

static void
2689
 normalizeFloat32Subnormal(uint32_t aSig, int *zExpPtr, uint32_t *zSigPtr)
B
bellard 已提交
2690
{
2691
    int8_t shiftCount;
B
bellard 已提交
2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707 2708 2709 2710 2711 2712 2713 2714 2715 2716 2717 2718 2719 2720

    shiftCount = countLeadingZeros32( aSig ) - 8;
    *zSigPtr = aSig<<shiftCount;
    *zExpPtr = 1 - shiftCount;

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand `zSig', and returns the proper single-precision floating-
| point value corresponding to the abstract input.  Ordinarily, the abstract
| value is simply rounded and packed into the single-precision format, with
| the inexact exception raised if the abstract input cannot be represented
| exactly.  However, if the abstract value is too large, the overflow and
| inexact exceptions are raised and an infinity or maximal finite value is
| returned.  If the abstract value is too small, the input value is rounded to
| a subnormal number, and the underflow and inexact exceptions are raised if
| the abstract input cannot be represented exactly as a subnormal single-
| precision floating-point number.
|     The input significand `zSig' has its binary point between bits 30
| and 29, which is 7 bits to the left of the usual location.  This shifted
| significand must be normalized or smaller.  If `zSig' is not normalized,
| `zExp' must be 0; in that case, the result returned is a subnormal number,
| and it must not require rounding.  In the usual case that `zSig' is
| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.
| The handling of underflow and overflow follows the IEC/IEEE Standard for
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

2721
static float32 roundAndPackFloat32(flag zSign, int zExp, uint32_t zSig,
2722
                                   float_status *status)
B
bellard 已提交
2723
{
2724
    int8_t roundingMode;
B
bellard 已提交
2725
    flag roundNearestEven;
2726
    int8_t roundIncrement, roundBits;
B
bellard 已提交
2727 2728
    flag isTiny;

2729
    roundingMode = status->float_rounding_mode;
B
bellard 已提交
2730
    roundNearestEven = ( roundingMode == float_round_nearest_even );
2731 2732
    switch (roundingMode) {
    case float_round_nearest_even:
2733
    case float_round_ties_away:
2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746 2747
        roundIncrement = 0x40;
        break;
    case float_round_to_zero:
        roundIncrement = 0;
        break;
    case float_round_up:
        roundIncrement = zSign ? 0 : 0x7f;
        break;
    case float_round_down:
        roundIncrement = zSign ? 0x7f : 0;
        break;
    default:
        abort();
        break;
B
bellard 已提交
2748 2749
    }
    roundBits = zSig & 0x7F;
2750
    if ( 0xFD <= (uint16_t) zExp ) {
B
bellard 已提交
2751 2752
        if (    ( 0xFD < zExp )
             || (    ( zExp == 0xFD )
2753
                  && ( (int32_t) ( zSig + roundIncrement ) < 0 ) )
B
bellard 已提交
2754
           ) {
2755
            float_raise(float_flag_overflow | float_flag_inexact, status);
2756
            return packFloat32( zSign, 0xFF, - ( roundIncrement == 0 ));
B
bellard 已提交
2757 2758
        }
        if ( zExp < 0 ) {
2759
            if (status->flush_to_zero) {
2760
                float_raise(float_flag_output_denormal, status);
2761 2762
                return packFloat32(zSign, 0, 0);
            }
B
bellard 已提交
2763
            isTiny =
2764 2765
                (status->float_detect_tininess
                 == float_tininess_before_rounding)
B
bellard 已提交
2766 2767 2768 2769 2770
                || ( zExp < -1 )
                || ( zSig + roundIncrement < 0x80000000 );
            shift32RightJamming( zSig, - zExp, &zSig );
            zExp = 0;
            roundBits = zSig & 0x7F;
2771 2772 2773
            if (isTiny && roundBits) {
                float_raise(float_flag_underflow, status);
            }
B
bellard 已提交
2774 2775
        }
    }
2776 2777 2778
    if (roundBits) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
2779 2780 2781 2782 2783 2784 2785 2786 2787 2788 2789 2790 2791 2792 2793 2794 2795
    zSig = ( zSig + roundIncrement )>>7;
    zSig &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
    if ( zSig == 0 ) zExp = 0;
    return packFloat32( zSign, zExp, zSig );

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand `zSig', and returns the proper single-precision floating-
| point value corresponding to the abstract input.  This routine is just like
| `roundAndPackFloat32' except that `zSig' does not have to be normalized.
| Bit 31 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''
| floating-point exponent.
*----------------------------------------------------------------------------*/

static float32
2796
 normalizeRoundAndPackFloat32(flag zSign, int zExp, uint32_t zSig,
2797
                              float_status *status)
B
bellard 已提交
2798
{
2799
    int8_t shiftCount;
B
bellard 已提交
2800 2801

    shiftCount = countLeadingZeros32( zSig ) - 1;
2802 2803
    return roundAndPackFloat32(zSign, zExp - shiftCount, zSig<<shiftCount,
                               status);
B
bellard 已提交
2804 2805 2806

}

2807 2808 2809 2810
/*----------------------------------------------------------------------------
| If `a' is denormal and we are in flush-to-zero mode then set the
| input-denormal exception and return zero. Otherwise just return the value.
*----------------------------------------------------------------------------*/
2811
float64 float64_squash_input_denormal(float64 a, float_status *status)
2812
{
2813
    if (status->flush_inputs_to_zero) {
2814
        if (extractFloat64Exp(a) == 0 && extractFloat64Frac(a) != 0) {
2815
            float_raise(float_flag_input_denormal, status);
2816 2817 2818 2819 2820 2821
            return make_float64(float64_val(a) & (1ULL << 63));
        }
    }
    return a;
}

B
bellard 已提交
2822 2823 2824 2825 2826 2827 2828 2829
/*----------------------------------------------------------------------------
| Normalizes the subnormal double-precision floating-point value represented
| by the denormalized significand `aSig'.  The normalized exponent and
| significand are stored at the locations pointed to by `zExpPtr' and
| `zSigPtr', respectively.
*----------------------------------------------------------------------------*/

static void
2830
 normalizeFloat64Subnormal(uint64_t aSig, int *zExpPtr, uint64_t *zSigPtr)
B
bellard 已提交
2831
{
2832
    int8_t shiftCount;
B
bellard 已提交
2833 2834 2835 2836 2837 2838 2839 2840 2841 2842 2843 2844 2845 2846 2847 2848 2849 2850

    shiftCount = countLeadingZeros64( aSig ) - 11;
    *zSigPtr = aSig<<shiftCount;
    *zExpPtr = 1 - shiftCount;

}

/*----------------------------------------------------------------------------
| Packs the sign `zSign', exponent `zExp', and significand `zSig' into a
| double-precision floating-point value, returning the result.  After being
| shifted into the proper positions, the three fields are simply added
| together to form the result.  This means that any integer portion of `zSig'
| will be added into the exponent.  Since a properly normalized significand
| will have an integer portion equal to 1, the `zExp' input should be 1 less
| than the desired result exponent whenever `zSig' is a complete, normalized
| significand.
*----------------------------------------------------------------------------*/

2851
static inline float64 packFloat64(flag zSign, int zExp, uint64_t zSig)
B
bellard 已提交
2852 2853
{

2854
    return make_float64(
2855
        ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<52 ) + zSig);
B
bellard 已提交
2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand `zSig', and returns the proper double-precision floating-
| point value corresponding to the abstract input.  Ordinarily, the abstract
| value is simply rounded and packed into the double-precision format, with
| the inexact exception raised if the abstract input cannot be represented
| exactly.  However, if the abstract value is too large, the overflow and
| inexact exceptions are raised and an infinity or maximal finite value is
2867 2868 2869
| returned.  If the abstract value is too small, the input value is rounded to
| a subnormal number, and the underflow and inexact exceptions are raised if
| the abstract input cannot be represented exactly as a subnormal double-
B
bellard 已提交
2870 2871 2872 2873 2874 2875 2876 2877 2878 2879 2880
| precision floating-point number.
|     The input significand `zSig' has its binary point between bits 62
| and 61, which is 10 bits to the left of the usual location.  This shifted
| significand must be normalized or smaller.  If `zSig' is not normalized,
| `zExp' must be 0; in that case, the result returned is a subnormal number,
| and it must not require rounding.  In the usual case that `zSig' is
| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.
| The handling of underflow and overflow follows the IEC/IEEE Standard for
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

2881
static float64 roundAndPackFloat64(flag zSign, int zExp, uint64_t zSig,
2882
                                   float_status *status)
B
bellard 已提交
2883
{
2884
    int8_t roundingMode;
B
bellard 已提交
2885
    flag roundNearestEven;
2886
    int roundIncrement, roundBits;
B
bellard 已提交
2887 2888
    flag isTiny;

2889
    roundingMode = status->float_rounding_mode;
B
bellard 已提交
2890
    roundNearestEven = ( roundingMode == float_round_nearest_even );
2891 2892
    switch (roundingMode) {
    case float_round_nearest_even:
2893
    case float_round_ties_away:
2894 2895 2896 2897 2898 2899 2900 2901 2902 2903 2904
        roundIncrement = 0x200;
        break;
    case float_round_to_zero:
        roundIncrement = 0;
        break;
    case float_round_up:
        roundIncrement = zSign ? 0 : 0x3ff;
        break;
    case float_round_down:
        roundIncrement = zSign ? 0x3ff : 0;
        break;
2905 2906 2907
    case float_round_to_odd:
        roundIncrement = (zSig & 0x400) ? 0 : 0x3ff;
        break;
2908 2909
    default:
        abort();
B
bellard 已提交
2910 2911
    }
    roundBits = zSig & 0x3FF;
2912
    if ( 0x7FD <= (uint16_t) zExp ) {
B
bellard 已提交
2913 2914
        if (    ( 0x7FD < zExp )
             || (    ( zExp == 0x7FD )
2915
                  && ( (int64_t) ( zSig + roundIncrement ) < 0 ) )
B
bellard 已提交
2916
           ) {
2917 2918
            bool overflow_to_inf = roundingMode != float_round_to_odd &&
                                   roundIncrement != 0;
2919
            float_raise(float_flag_overflow | float_flag_inexact, status);
2920
            return packFloat64(zSign, 0x7FF, -(!overflow_to_inf));
B
bellard 已提交
2921 2922
        }
        if ( zExp < 0 ) {
2923
            if (status->flush_to_zero) {
2924
                float_raise(float_flag_output_denormal, status);
2925 2926
                return packFloat64(zSign, 0, 0);
            }
B
bellard 已提交
2927
            isTiny =
2928 2929
                   (status->float_detect_tininess
                    == float_tininess_before_rounding)
B
bellard 已提交
2930 2931 2932 2933 2934
                || ( zExp < -1 )
                || ( zSig + roundIncrement < LIT64( 0x8000000000000000 ) );
            shift64RightJamming( zSig, - zExp, &zSig );
            zExp = 0;
            roundBits = zSig & 0x3FF;
2935 2936 2937
            if (isTiny && roundBits) {
                float_raise(float_flag_underflow, status);
            }
2938 2939 2940 2941 2942 2943 2944
            if (roundingMode == float_round_to_odd) {
                /*
                 * For round-to-odd case, the roundIncrement depends on
                 * zSig which just changed.
                 */
                roundIncrement = (zSig & 0x400) ? 0 : 0x3ff;
            }
B
bellard 已提交
2945 2946
        }
    }
2947 2948 2949
    if (roundBits) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
2950 2951 2952 2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2964 2965 2966
    zSig = ( zSig + roundIncrement )>>10;
    zSig &= ~ ( ( ( roundBits ^ 0x200 ) == 0 ) & roundNearestEven );
    if ( zSig == 0 ) zExp = 0;
    return packFloat64( zSign, zExp, zSig );

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand `zSig', and returns the proper double-precision floating-
| point value corresponding to the abstract input.  This routine is just like
| `roundAndPackFloat64' except that `zSig' does not have to be normalized.
| Bit 63 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''
| floating-point exponent.
*----------------------------------------------------------------------------*/

static float64
2967
 normalizeRoundAndPackFloat64(flag zSign, int zExp, uint64_t zSig,
2968
                              float_status *status)
B
bellard 已提交
2969
{
2970
    int8_t shiftCount;
B
bellard 已提交
2971 2972

    shiftCount = countLeadingZeros64( zSig ) - 1;
2973 2974
    return roundAndPackFloat64(zSign, zExp - shiftCount, zSig<<shiftCount,
                               status);
B
bellard 已提交
2975 2976 2977 2978 2979 2980 2981 2982 2983 2984

}

/*----------------------------------------------------------------------------
| Normalizes the subnormal extended double-precision floating-point value
| represented by the denormalized significand `aSig'.  The normalized exponent
| and significand are stored at the locations pointed to by `zExpPtr' and
| `zSigPtr', respectively.
*----------------------------------------------------------------------------*/

2985 2986
void normalizeFloatx80Subnormal(uint64_t aSig, int32_t *zExpPtr,
                                uint64_t *zSigPtr)
B
bellard 已提交
2987
{
2988
    int8_t shiftCount;
B
bellard 已提交
2989 2990 2991 2992 2993 2994 2995 2996 2997 2998 2999 3000 3001 3002 3003 3004 3005 3006 3007 3008 3009 3010 3011 3012 3013 3014 3015 3016 3017 3018

    shiftCount = countLeadingZeros64( aSig );
    *zSigPtr = aSig<<shiftCount;
    *zExpPtr = 1 - shiftCount;
}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and extended significand formed by the concatenation of `zSig0' and `zSig1',
| and returns the proper extended double-precision floating-point value
| corresponding to the abstract input.  Ordinarily, the abstract value is
| rounded and packed into the extended double-precision format, with the
| inexact exception raised if the abstract input cannot be represented
| exactly.  However, if the abstract value is too large, the overflow and
| inexact exceptions are raised and an infinity or maximal finite value is
| returned.  If the abstract value is too small, the input value is rounded to
| a subnormal number, and the underflow and inexact exceptions are raised if
| the abstract input cannot be represented exactly as a subnormal extended
| double-precision floating-point number.
|     If `roundingPrecision' is 32 or 64, the result is rounded to the same
| number of bits as single or double precision, respectively.  Otherwise, the
| result is rounded to the full precision of the extended double-precision
| format.
|     The input significand must be normalized or smaller.  If the input
| significand is not normalized, `zExp' must be 0; in that case, the result
| returned is a subnormal number, and it must not require rounding.  The
| handling of underflow and overflow follows the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3019 3020 3021
floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign,
                              int32_t zExp, uint64_t zSig0, uint64_t zSig1,
                              float_status *status)
B
bellard 已提交
3022
{
3023
    int8_t roundingMode;
B
bellard 已提交
3024
    flag roundNearestEven, increment, isTiny;
3025
    int64_t roundIncrement, roundMask, roundBits;
B
bellard 已提交
3026

3027
    roundingMode = status->float_rounding_mode;
B
bellard 已提交
3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039 3040 3041
    roundNearestEven = ( roundingMode == float_round_nearest_even );
    if ( roundingPrecision == 80 ) goto precision80;
    if ( roundingPrecision == 64 ) {
        roundIncrement = LIT64( 0x0000000000000400 );
        roundMask = LIT64( 0x00000000000007FF );
    }
    else if ( roundingPrecision == 32 ) {
        roundIncrement = LIT64( 0x0000008000000000 );
        roundMask = LIT64( 0x000000FFFFFFFFFF );
    }
    else {
        goto precision80;
    }
    zSig0 |= ( zSig1 != 0 );
3042 3043
    switch (roundingMode) {
    case float_round_nearest_even:
3044
    case float_round_ties_away:
3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056
        break;
    case float_round_to_zero:
        roundIncrement = 0;
        break;
    case float_round_up:
        roundIncrement = zSign ? 0 : roundMask;
        break;
    case float_round_down:
        roundIncrement = zSign ? roundMask : 0;
        break;
    default:
        abort();
B
bellard 已提交
3057 3058
    }
    roundBits = zSig0 & roundMask;
3059
    if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) {
B
bellard 已提交
3060 3061 3062 3063 3064 3065
        if (    ( 0x7FFE < zExp )
             || ( ( zExp == 0x7FFE ) && ( zSig0 + roundIncrement < zSig0 ) )
           ) {
            goto overflow;
        }
        if ( zExp <= 0 ) {
3066
            if (status->flush_to_zero) {
3067
                float_raise(float_flag_output_denormal, status);
3068 3069
                return packFloatx80(zSign, 0, 0);
            }
B
bellard 已提交
3070
            isTiny =
3071 3072
                   (status->float_detect_tininess
                    == float_tininess_before_rounding)
B
bellard 已提交
3073 3074 3075 3076 3077
                || ( zExp < 0 )
                || ( zSig0 <= zSig0 + roundIncrement );
            shift64RightJamming( zSig0, 1 - zExp, &zSig0 );
            zExp = 0;
            roundBits = zSig0 & roundMask;
3078 3079 3080
            if (isTiny && roundBits) {
                float_raise(float_flag_underflow, status);
            }
3081 3082 3083
            if (roundBits) {
                status->float_exception_flags |= float_flag_inexact;
            }
B
bellard 已提交
3084
            zSig0 += roundIncrement;
3085
            if ( (int64_t) zSig0 < 0 ) zExp = 1;
B
bellard 已提交
3086 3087 3088 3089 3090 3091 3092 3093
            roundIncrement = roundMask + 1;
            if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {
                roundMask |= roundIncrement;
            }
            zSig0 &= ~ roundMask;
            return packFloatx80( zSign, zExp, zSig0 );
        }
    }
3094 3095 3096
    if (roundBits) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
3097 3098 3099 3100 3101 3102 3103 3104 3105 3106 3107 3108 3109
    zSig0 += roundIncrement;
    if ( zSig0 < roundIncrement ) {
        ++zExp;
        zSig0 = LIT64( 0x8000000000000000 );
    }
    roundIncrement = roundMask + 1;
    if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {
        roundMask |= roundIncrement;
    }
    zSig0 &= ~ roundMask;
    if ( zSig0 == 0 ) zExp = 0;
    return packFloatx80( zSign, zExp, zSig0 );
 precision80:
3110 3111
    switch (roundingMode) {
    case float_round_nearest_even:
3112
    case float_round_ties_away:
3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125
        increment = ((int64_t)zSig1 < 0);
        break;
    case float_round_to_zero:
        increment = 0;
        break;
    case float_round_up:
        increment = !zSign && zSig1;
        break;
    case float_round_down:
        increment = zSign && zSig1;
        break;
    default:
        abort();
B
bellard 已提交
3126
    }
3127
    if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) {
B
bellard 已提交
3128 3129 3130 3131 3132 3133 3134 3135
        if (    ( 0x7FFE < zExp )
             || (    ( zExp == 0x7FFE )
                  && ( zSig0 == LIT64( 0xFFFFFFFFFFFFFFFF ) )
                  && increment
                )
           ) {
            roundMask = 0;
 overflow:
3136
            float_raise(float_flag_overflow | float_flag_inexact, status);
B
bellard 已提交
3137 3138 3139 3140 3141 3142
            if (    ( roundingMode == float_round_to_zero )
                 || ( zSign && ( roundingMode == float_round_up ) )
                 || ( ! zSign && ( roundingMode == float_round_down ) )
               ) {
                return packFloatx80( zSign, 0x7FFE, ~ roundMask );
            }
3143 3144 3145
            return packFloatx80(zSign,
                                floatx80_infinity_high,
                                floatx80_infinity_low);
B
bellard 已提交
3146 3147 3148
        }
        if ( zExp <= 0 ) {
            isTiny =
3149 3150
                   (status->float_detect_tininess
                    == float_tininess_before_rounding)
B
bellard 已提交
3151 3152 3153 3154 3155
                || ( zExp < 0 )
                || ! increment
                || ( zSig0 < LIT64( 0xFFFFFFFFFFFFFFFF ) );
            shift64ExtraRightJamming( zSig0, zSig1, 1 - zExp, &zSig0, &zSig1 );
            zExp = 0;
3156 3157 3158
            if (isTiny && zSig1) {
                float_raise(float_flag_underflow, status);
            }
3159 3160 3161
            if (zSig1) {
                status->float_exception_flags |= float_flag_inexact;
            }
3162 3163
            switch (roundingMode) {
            case float_round_nearest_even:
3164
            case float_round_ties_away:
3165 3166 3167 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177
                increment = ((int64_t)zSig1 < 0);
                break;
            case float_round_to_zero:
                increment = 0;
                break;
            case float_round_up:
                increment = !zSign && zSig1;
                break;
            case float_round_down:
                increment = zSign && zSig1;
                break;
            default:
                abort();
B
bellard 已提交
3178 3179 3180 3181
            }
            if ( increment ) {
                ++zSig0;
                zSig0 &=
3182 3183
                    ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );
                if ( (int64_t) zSig0 < 0 ) zExp = 1;
B
bellard 已提交
3184 3185 3186 3187
            }
            return packFloatx80( zSign, zExp, zSig0 );
        }
    }
3188 3189 3190
    if (zSig1) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
3191 3192 3193 3194 3195 3196 3197
    if ( increment ) {
        ++zSig0;
        if ( zSig0 == 0 ) {
            ++zExp;
            zSig0 = LIT64( 0x8000000000000000 );
        }
        else {
3198
            zSig0 &= ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );
B
bellard 已提交
3199 3200 3201 3202 3203 3204 3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216
        }
    }
    else {
        if ( zSig0 == 0 ) zExp = 0;
    }
    return packFloatx80( zSign, zExp, zSig0 );

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent
| `zExp', and significand formed by the concatenation of `zSig0' and `zSig1',
| and returns the proper extended double-precision floating-point value
| corresponding to the abstract input.  This routine is just like
| `roundAndPackFloatx80' except that the input significand does not have to be
| normalized.
*----------------------------------------------------------------------------*/

3217 3218 3219 3220
floatx80 normalizeRoundAndPackFloatx80(int8_t roundingPrecision,
                                       flag zSign, int32_t zExp,
                                       uint64_t zSig0, uint64_t zSig1,
                                       float_status *status)
B
bellard 已提交
3221
{
3222
    int8_t shiftCount;
B
bellard 已提交
3223 3224 3225 3226 3227 3228 3229 3230 3231

    if ( zSig0 == 0 ) {
        zSig0 = zSig1;
        zSig1 = 0;
        zExp -= 64;
    }
    shiftCount = countLeadingZeros64( zSig0 );
    shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
    zExp -= shiftCount;
3232 3233
    return roundAndPackFloatx80(roundingPrecision, zSign, zExp,
                                zSig0, zSig1, status);
B
bellard 已提交
3234 3235 3236 3237 3238 3239 3240 3241

}

/*----------------------------------------------------------------------------
| Returns the least-significant 64 fraction bits of the quadruple-precision
| floating-point value `a'.
*----------------------------------------------------------------------------*/

3242
static inline uint64_t extractFloat128Frac1( float128 a )
B
bellard 已提交
3243 3244 3245 3246 3247 3248 3249 3250 3251 3252 3253
{

    return a.low;

}

/*----------------------------------------------------------------------------
| Returns the most-significant 48 fraction bits of the quadruple-precision
| floating-point value `a'.
*----------------------------------------------------------------------------*/

3254
static inline uint64_t extractFloat128Frac0( float128 a )
B
bellard 已提交
3255 3256 3257 3258 3259 3260 3261 3262 3263 3264 3265
{

    return a.high & LIT64( 0x0000FFFFFFFFFFFF );

}

/*----------------------------------------------------------------------------
| Returns the exponent bits of the quadruple-precision floating-point value
| `a'.
*----------------------------------------------------------------------------*/

3266
static inline int32_t extractFloat128Exp( float128 a )
B
bellard 已提交
3267 3268 3269 3270 3271 3272 3273 3274 3275 3276
{

    return ( a.high>>48 ) & 0x7FFF;

}

/*----------------------------------------------------------------------------
| Returns the sign bit of the quadruple-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

3277
static inline flag extractFloat128Sign( float128 a )
B
bellard 已提交
3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295
{

    return a.high>>63;

}

/*----------------------------------------------------------------------------
| Normalizes the subnormal quadruple-precision floating-point value
| represented by the denormalized significand formed by the concatenation of
| `aSig0' and `aSig1'.  The normalized exponent is stored at the location
| pointed to by `zExpPtr'.  The most significant 49 bits of the normalized
| significand are stored at the location pointed to by `zSig0Ptr', and the
| least significant 64 bits of the normalized significand are stored at the
| location pointed to by `zSig1Ptr'.
*----------------------------------------------------------------------------*/

static void
 normalizeFloat128Subnormal(
3296 3297
     uint64_t aSig0,
     uint64_t aSig1,
3298
     int32_t *zExpPtr,
3299 3300
     uint64_t *zSig0Ptr,
     uint64_t *zSig1Ptr
B
bellard 已提交
3301 3302
 )
{
3303
    int8_t shiftCount;
B
bellard 已提交
3304 3305 3306 3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337

    if ( aSig0 == 0 ) {
        shiftCount = countLeadingZeros64( aSig1 ) - 15;
        if ( shiftCount < 0 ) {
            *zSig0Ptr = aSig1>>( - shiftCount );
            *zSig1Ptr = aSig1<<( shiftCount & 63 );
        }
        else {
            *zSig0Ptr = aSig1<<shiftCount;
            *zSig1Ptr = 0;
        }
        *zExpPtr = - shiftCount - 63;
    }
    else {
        shiftCount = countLeadingZeros64( aSig0 ) - 15;
        shortShift128Left( aSig0, aSig1, shiftCount, zSig0Ptr, zSig1Ptr );
        *zExpPtr = 1 - shiftCount;
    }

}

/*----------------------------------------------------------------------------
| Packs the sign `zSign', the exponent `zExp', and the significand formed
| by the concatenation of `zSig0' and `zSig1' into a quadruple-precision
| floating-point value, returning the result.  After being shifted into the
| proper positions, the three fields `zSign', `zExp', and `zSig0' are simply
| added together to form the most significant 32 bits of the result.  This
| means that any integer portion of `zSig0' will be added into the exponent.
| Since a properly normalized significand will have an integer portion equal
| to 1, the `zExp' input should be 1 less than the desired result exponent
| whenever `zSig0' and `zSig1' concatenated form a complete, normalized
| significand.
*----------------------------------------------------------------------------*/

3338
static inline float128
3339
 packFloat128( flag zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1 )
B
bellard 已提交
3340 3341 3342 3343
{
    float128 z;

    z.low = zSig1;
3344
    z.high = ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<48 ) + zSig0;
B
bellard 已提交
3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356 3357 3358 3359 3360 3361 3362 3363 3364 3365 3366 3367 3368 3369
    return z;

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and extended significand formed by the concatenation of `zSig0', `zSig1',
| and `zSig2', and returns the proper quadruple-precision floating-point value
| corresponding to the abstract input.  Ordinarily, the abstract value is
| simply rounded and packed into the quadruple-precision format, with the
| inexact exception raised if the abstract input cannot be represented
| exactly.  However, if the abstract value is too large, the overflow and
| inexact exceptions are raised and an infinity or maximal finite value is
| returned.  If the abstract value is too small, the input value is rounded to
| a subnormal number, and the underflow and inexact exceptions are raised if
| the abstract input cannot be represented exactly as a subnormal quadruple-
| precision floating-point number.
|     The input significand must be normalized or smaller.  If the input
| significand is not normalized, `zExp' must be 0; in that case, the result
| returned is a subnormal number, and it must not require rounding.  In the
| usual case that the input significand is normalized, `zExp' must be 1 less
| than the ``true'' floating-point exponent.  The handling of underflow and
| overflow follows the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3370
static float128 roundAndPackFloat128(flag zSign, int32_t zExp,
3371 3372
                                     uint64_t zSig0, uint64_t zSig1,
                                     uint64_t zSig2, float_status *status)
B
bellard 已提交
3373
{
3374
    int8_t roundingMode;
B
bellard 已提交
3375 3376
    flag roundNearestEven, increment, isTiny;

3377
    roundingMode = status->float_rounding_mode;
B
bellard 已提交
3378
    roundNearestEven = ( roundingMode == float_round_nearest_even );
3379 3380
    switch (roundingMode) {
    case float_round_nearest_even:
3381
    case float_round_ties_away:
3382 3383 3384 3385 3386 3387 3388 3389 3390 3391 3392
        increment = ((int64_t)zSig2 < 0);
        break;
    case float_round_to_zero:
        increment = 0;
        break;
    case float_round_up:
        increment = !zSign && zSig2;
        break;
    case float_round_down:
        increment = zSign && zSig2;
        break;
3393 3394 3395
    case float_round_to_odd:
        increment = !(zSig1 & 0x1) && zSig2;
        break;
3396 3397
    default:
        abort();
B
bellard 已提交
3398
    }
3399
    if ( 0x7FFD <= (uint32_t) zExp ) {
B
bellard 已提交
3400 3401 3402 3403 3404 3405 3406 3407 3408 3409 3410
        if (    ( 0x7FFD < zExp )
             || (    ( zExp == 0x7FFD )
                  && eq128(
                         LIT64( 0x0001FFFFFFFFFFFF ),
                         LIT64( 0xFFFFFFFFFFFFFFFF ),
                         zSig0,
                         zSig1
                     )
                  && increment
                )
           ) {
3411
            float_raise(float_flag_overflow | float_flag_inexact, status);
B
bellard 已提交
3412 3413 3414
            if (    ( roundingMode == float_round_to_zero )
                 || ( zSign && ( roundingMode == float_round_up ) )
                 || ( ! zSign && ( roundingMode == float_round_down ) )
3415
                 || (roundingMode == float_round_to_odd)
B
bellard 已提交
3416 3417 3418 3419 3420 3421 3422 3423 3424 3425 3426 3427
               ) {
                return
                    packFloat128(
                        zSign,
                        0x7FFE,
                        LIT64( 0x0000FFFFFFFFFFFF ),
                        LIT64( 0xFFFFFFFFFFFFFFFF )
                    );
            }
            return packFloat128( zSign, 0x7FFF, 0, 0 );
        }
        if ( zExp < 0 ) {
3428
            if (status->flush_to_zero) {
3429
                float_raise(float_flag_output_denormal, status);
3430 3431
                return packFloat128(zSign, 0, 0, 0);
            }
B
bellard 已提交
3432
            isTiny =
3433 3434
                   (status->float_detect_tininess
                    == float_tininess_before_rounding)
B
bellard 已提交
3435 3436 3437 3438 3439 3440 3441 3442 3443 3444 3445
                || ( zExp < -1 )
                || ! increment
                || lt128(
                       zSig0,
                       zSig1,
                       LIT64( 0x0001FFFFFFFFFFFF ),
                       LIT64( 0xFFFFFFFFFFFFFFFF )
                   );
            shift128ExtraRightJamming(
                zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );
            zExp = 0;
3446 3447 3448
            if (isTiny && zSig2) {
                float_raise(float_flag_underflow, status);
            }
3449 3450
            switch (roundingMode) {
            case float_round_nearest_even:
3451
            case float_round_ties_away:
3452 3453 3454 3455 3456 3457 3458 3459 3460 3461 3462
                increment = ((int64_t)zSig2 < 0);
                break;
            case float_round_to_zero:
                increment = 0;
                break;
            case float_round_up:
                increment = !zSign && zSig2;
                break;
            case float_round_down:
                increment = zSign && zSig2;
                break;
3463 3464 3465
            case float_round_to_odd:
                increment = !(zSig1 & 0x1) && zSig2;
                break;
3466 3467
            default:
                abort();
B
bellard 已提交
3468 3469 3470
            }
        }
    }
3471 3472 3473
    if (zSig2) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
3474 3475 3476 3477 3478 3479 3480 3481 3482 3483 3484 3485 3486 3487 3488 3489 3490 3491 3492 3493 3494
    if ( increment ) {
        add128( zSig0, zSig1, 0, 1, &zSig0, &zSig1 );
        zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );
    }
    else {
        if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0;
    }
    return packFloat128( zSign, zExp, zSig0, zSig1 );

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand formed by the concatenation of `zSig0' and `zSig1', and
| returns the proper quadruple-precision floating-point value corresponding
| to the abstract input.  This routine is just like `roundAndPackFloat128'
| except that the input significand has fewer bits and does not have to be
| normalized.  In all cases, `zExp' must be 1 less than the ``true'' floating-
| point exponent.
*----------------------------------------------------------------------------*/

3495
static float128 normalizeRoundAndPackFloat128(flag zSign, int32_t zExp,
3496 3497
                                              uint64_t zSig0, uint64_t zSig1,
                                              float_status *status)
B
bellard 已提交
3498
{
3499
    int8_t shiftCount;
3500
    uint64_t zSig2;
B
bellard 已提交
3501 3502 3503 3504 3505 3506 3507 3508 3509 3510 3511 3512 3513 3514 3515 3516

    if ( zSig0 == 0 ) {
        zSig0 = zSig1;
        zSig1 = 0;
        zExp -= 64;
    }
    shiftCount = countLeadingZeros64( zSig0 ) - 15;
    if ( 0 <= shiftCount ) {
        zSig2 = 0;
        shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
    }
    else {
        shift128ExtraRightJamming(
            zSig0, zSig1, 0, - shiftCount, &zSig0, &zSig1, &zSig2 );
    }
    zExp -= shiftCount;
3517
    return roundAndPackFloat128(zSign, zExp, zSig0, zSig1, zSig2, status);
B
bellard 已提交
3518 3519 3520 3521 3522 3523 3524 3525 3526 3527 3528

}


/*----------------------------------------------------------------------------
| Returns the result of converting the 32-bit two's complement integer `a'
| to the extended double-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3529
floatx80 int32_to_floatx80(int32_t a, float_status *status)
B
bellard 已提交
3530 3531
{
    flag zSign;
3532
    uint32_t absA;
3533
    int8_t shiftCount;
3534
    uint64_t zSig;
B
bellard 已提交
3535 3536 3537 3538 3539 3540 3541 3542 3543 3544 3545 3546 3547 3548 3549 3550

    if ( a == 0 ) return packFloatx80( 0, 0, 0 );
    zSign = ( a < 0 );
    absA = zSign ? - a : a;
    shiftCount = countLeadingZeros32( absA ) + 32;
    zSig = absA;
    return packFloatx80( zSign, 0x403E - shiftCount, zSig<<shiftCount );

}

/*----------------------------------------------------------------------------
| Returns the result of converting the 32-bit two's complement integer `a' to
| the quadruple-precision floating-point format.  The conversion is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3551
float128 int32_to_float128(int32_t a, float_status *status)
B
bellard 已提交
3552 3553
{
    flag zSign;
3554
    uint32_t absA;
3555
    int8_t shiftCount;
3556
    uint64_t zSig0;
B
bellard 已提交
3557 3558 3559 3560 3561 3562 3563 3564 3565 3566 3567 3568 3569 3570 3571 3572 3573

    if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
    zSign = ( a < 0 );
    absA = zSign ? - a : a;
    shiftCount = countLeadingZeros32( absA ) + 17;
    zSig0 = absA;
    return packFloat128( zSign, 0x402E - shiftCount, zSig0<<shiftCount, 0 );

}

/*----------------------------------------------------------------------------
| Returns the result of converting the 64-bit two's complement integer `a'
| to the extended double-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3574
floatx80 int64_to_floatx80(int64_t a, float_status *status)
B
bellard 已提交
3575 3576
{
    flag zSign;
3577
    uint64_t absA;
3578
    int8_t shiftCount;
B
bellard 已提交
3579 3580 3581 3582 3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593

    if ( a == 0 ) return packFloatx80( 0, 0, 0 );
    zSign = ( a < 0 );
    absA = zSign ? - a : a;
    shiftCount = countLeadingZeros64( absA );
    return packFloatx80( zSign, 0x403E - shiftCount, absA<<shiftCount );

}

/*----------------------------------------------------------------------------
| Returns the result of converting the 64-bit two's complement integer `a' to
| the quadruple-precision floating-point format.  The conversion is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3594
float128 int64_to_float128(int64_t a, float_status *status)
B
bellard 已提交
3595 3596
{
    flag zSign;
3597
    uint64_t absA;
3598
    int8_t shiftCount;
3599
    int32_t zExp;
3600
    uint64_t zSig0, zSig1;
B
bellard 已提交
3601 3602 3603 3604 3605 3606 3607 3608 3609 3610 3611 3612 3613 3614 3615 3616 3617 3618 3619 3620

    if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
    zSign = ( a < 0 );
    absA = zSign ? - a : a;
    shiftCount = countLeadingZeros64( absA ) + 49;
    zExp = 0x406E - shiftCount;
    if ( 64 <= shiftCount ) {
        zSig1 = 0;
        zSig0 = absA;
        shiftCount -= 64;
    }
    else {
        zSig1 = absA;
        zSig0 = 0;
    }
    shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
    return packFloat128( zSign, zExp, zSig0, zSig1 );

}

3621 3622 3623 3624 3625 3626
/*----------------------------------------------------------------------------
| Returns the result of converting the 64-bit unsigned integer `a'
| to the quadruple-precision floating-point format.  The conversion is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3627
float128 uint64_to_float128(uint64_t a, float_status *status)
3628 3629 3630 3631
{
    if (a == 0) {
        return float128_zero;
    }
3632
    return normalizeRoundAndPackFloat128(0, 0x406E, 0, a, status);
3633 3634
}

B
bellard 已提交
3635 3636 3637 3638 3639 3640 3641
/*----------------------------------------------------------------------------
| Returns the result of converting the single-precision floating-point value
| `a' to the extended double-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3642
floatx80 float32_to_floatx80(float32 a, float_status *status)
B
bellard 已提交
3643 3644
{
    flag aSign;
3645
    int aExp;
3646
    uint32_t aSig;
B
bellard 已提交
3647

3648
    a = float32_squash_input_denormal(a, status);
B
bellard 已提交
3649 3650 3651 3652
    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );
    if ( aExp == 0xFF ) {
3653 3654 3655
        if (aSig) {
            return commonNaNToFloatx80(float32ToCommonNaN(a, status), status);
        }
3656 3657 3658
        return packFloatx80(aSign,
                            floatx80_infinity_high,
                            floatx80_infinity_low);
B
bellard 已提交
3659 3660 3661 3662 3663 3664
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
    }
    aSig |= 0x00800000;
3665
    return packFloatx80( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<40 );
B
bellard 已提交
3666 3667 3668 3669 3670 3671 3672 3673 3674 3675

}

/*----------------------------------------------------------------------------
| Returns the result of converting the single-precision floating-point value
| `a' to the double-precision floating-point format.  The conversion is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3676
float128 float32_to_float128(float32 a, float_status *status)
B
bellard 已提交
3677 3678
{
    flag aSign;
3679
    int aExp;
3680
    uint32_t aSig;
B
bellard 已提交
3681

3682
    a = float32_squash_input_denormal(a, status);
B
bellard 已提交
3683 3684 3685 3686
    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );
    if ( aExp == 0xFF ) {
3687 3688 3689
        if (aSig) {
            return commonNaNToFloat128(float32ToCommonNaN(a, status), status);
        }
B
bellard 已提交
3690 3691 3692 3693 3694 3695 3696
        return packFloat128( aSign, 0x7FFF, 0, 0 );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );
        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
        --aExp;
    }
3697
    return packFloat128( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<25, 0 );
B
bellard 已提交
3698 3699 3700 3701 3702 3703 3704 3705 3706

}

/*----------------------------------------------------------------------------
| Returns the remainder of the single-precision floating-point value `a'
| with respect to the corresponding value `b'.  The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3707
float32 float32_rem(float32 a, float32 b, float_status *status)
B
bellard 已提交
3708
{
3709
    flag aSign, zSign;
3710
    int aExp, bExp, expDiff;
3711 3712 3713 3714 3715
    uint32_t aSig, bSig;
    uint32_t q;
    uint64_t aSig64, bSig64, q64;
    uint32_t alternateASig;
    int32_t sigMean;
3716 3717
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3718 3719 3720 3721 3722 3723 3724 3725

    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );
    bSig = extractFloat32Frac( b );
    bExp = extractFloat32Exp( b );
    if ( aExp == 0xFF ) {
        if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {
3726
            return propagateFloat32NaN(a, b, status);
B
bellard 已提交
3727
        }
3728
        float_raise(float_flag_invalid, status);
3729
        return float32_default_nan(status);
B
bellard 已提交
3730 3731
    }
    if ( bExp == 0xFF ) {
3732 3733 3734
        if (bSig) {
            return propagateFloat32NaN(a, b, status);
        }
B
bellard 已提交
3735 3736 3737 3738
        return a;
    }
    if ( bExp == 0 ) {
        if ( bSig == 0 ) {
3739
            float_raise(float_flag_invalid, status);
3740
            return float32_default_nan(status);
B
bellard 已提交
3741 3742 3743 3744 3745 3746 3747 3748 3749 3750 3751 3752 3753 3754 3755 3756 3757 3758 3759 3760
        }
        normalizeFloat32Subnormal( bSig, &bExp, &bSig );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return a;
        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
    }
    expDiff = aExp - bExp;
    aSig |= 0x00800000;
    bSig |= 0x00800000;
    if ( expDiff < 32 ) {
        aSig <<= 8;
        bSig <<= 8;
        if ( expDiff < 0 ) {
            if ( expDiff < -1 ) return a;
            aSig >>= 1;
        }
        q = ( bSig <= aSig );
        if ( q ) aSig -= bSig;
        if ( 0 < expDiff ) {
3761
            q = ( ( (uint64_t) aSig )<<32 ) / bSig;
B
bellard 已提交
3762 3763 3764 3765 3766 3767 3768 3769 3770 3771 3772
            q >>= 32 - expDiff;
            bSig >>= 2;
            aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;
        }
        else {
            aSig >>= 2;
            bSig >>= 2;
        }
    }
    else {
        if ( bSig <= aSig ) aSig -= bSig;
3773 3774
        aSig64 = ( (uint64_t) aSig )<<40;
        bSig64 = ( (uint64_t) bSig )<<40;
B
bellard 已提交
3775 3776 3777 3778 3779 3780 3781 3782 3783 3784 3785 3786 3787 3788 3789 3790 3791 3792
        expDiff -= 64;
        while ( 0 < expDiff ) {
            q64 = estimateDiv128To64( aSig64, 0, bSig64 );
            q64 = ( 2 < q64 ) ? q64 - 2 : 0;
            aSig64 = - ( ( bSig * q64 )<<38 );
            expDiff -= 62;
        }
        expDiff += 64;
        q64 = estimateDiv128To64( aSig64, 0, bSig64 );
        q64 = ( 2 < q64 ) ? q64 - 2 : 0;
        q = q64>>( 64 - expDiff );
        bSig <<= 6;
        aSig = ( ( aSig64>>33 )<<( expDiff - 1 ) ) - bSig * q;
    }
    do {
        alternateASig = aSig;
        ++q;
        aSig -= bSig;
3793
    } while ( 0 <= (int32_t) aSig );
B
bellard 已提交
3794 3795 3796 3797
    sigMean = aSig + alternateASig;
    if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
        aSig = alternateASig;
    }
3798
    zSign = ( (int32_t) aSig < 0 );
B
bellard 已提交
3799
    if ( zSign ) aSig = - aSig;
3800
    return normalizeRoundAndPackFloat32(aSign ^ zSign, bExp, aSig, status);
B
bellard 已提交
3801 3802
}

3803

B
bellard 已提交
3804

3805 3806 3807 3808 3809 3810 3811 3812 3813 3814 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824
/*----------------------------------------------------------------------------
| Returns the binary exponential of the single-precision floating-point value
| `a'. The operation is performed according to the IEC/IEEE Standard for
| Binary Floating-Point Arithmetic.
|
| Uses the following identities:
|
| 1. -------------------------------------------------------------------------
|      x    x*ln(2)
|     2  = e
|
| 2. -------------------------------------------------------------------------
|                      2     3     4     5           n
|      x        x     x     x     x     x           x
|     e  = 1 + --- + --- + --- + --- + --- + ... + --- + ...
|               1!    2!    3!    4!    5!          n!
*----------------------------------------------------------------------------*/

static const float64 float32_exp2_coefficients[15] =
{
3825 3826 3827 3828 3829 3830 3831 3832 3833 3834 3835 3836 3837 3838 3839
    const_float64( 0x3ff0000000000000ll ), /*  1 */
    const_float64( 0x3fe0000000000000ll ), /*  2 */
    const_float64( 0x3fc5555555555555ll ), /*  3 */
    const_float64( 0x3fa5555555555555ll ), /*  4 */
    const_float64( 0x3f81111111111111ll ), /*  5 */
    const_float64( 0x3f56c16c16c16c17ll ), /*  6 */
    const_float64( 0x3f2a01a01a01a01all ), /*  7 */
    const_float64( 0x3efa01a01a01a01all ), /*  8 */
    const_float64( 0x3ec71de3a556c734ll ), /*  9 */
    const_float64( 0x3e927e4fb7789f5cll ), /* 10 */
    const_float64( 0x3e5ae64567f544e4ll ), /* 11 */
    const_float64( 0x3e21eed8eff8d898ll ), /* 12 */
    const_float64( 0x3de6124613a86d09ll ), /* 13 */
    const_float64( 0x3da93974a8c07c9dll ), /* 14 */
    const_float64( 0x3d6ae7f3e733b81fll ), /* 15 */
3840 3841
};

3842
float32 float32_exp2(float32 a, float_status *status)
3843 3844
{
    flag aSign;
3845
    int aExp;
3846
    uint32_t aSig;
3847 3848
    float64 r, x, xn;
    int i;
3849
    a = float32_squash_input_denormal(a, status);
3850 3851 3852 3853 3854 3855

    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );

    if ( aExp == 0xFF) {
3856 3857 3858
        if (aSig) {
            return propagateFloat32NaN(a, float32_zero, status);
        }
3859 3860 3861 3862 3863 3864
        return (aSign) ? float32_zero : a;
    }
    if (aExp == 0) {
        if (aSig == 0) return float32_one;
    }

3865
    float_raise(float_flag_inexact, status);
3866 3867 3868 3869

    /* ******************************* */
    /* using float64 for approximation */
    /* ******************************* */
3870 3871
    x = float32_to_float64(a, status);
    x = float64_mul(x, float64_ln2, status);
3872 3873 3874 3875 3876 3877

    xn = x;
    r = float64_one;
    for (i = 0 ; i < 15 ; i++) {
        float64 f;

3878 3879
        f = float64_mul(xn, float32_exp2_coefficients[i], status);
        r = float64_add(r, f, status);
3880

3881
        xn = float64_mul(xn, x, status);
3882 3883 3884 3885 3886
    }

    return float64_to_float32(r, status);
}

3887 3888 3889 3890 3891
/*----------------------------------------------------------------------------
| Returns the binary log of the single-precision floating-point value `a'.
| The operation is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
3892
float32 float32_log2(float32 a, float_status *status)
3893 3894
{
    flag aSign, zSign;
3895
    int aExp;
3896
    uint32_t aSig, zSig, i;
3897

3898
    a = float32_squash_input_denormal(a, status);
3899 3900 3901 3902 3903 3904 3905 3906 3907
    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );

    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloat32( 1, 0xFF, 0 );
        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
    }
    if ( aSign ) {
3908
        float_raise(float_flag_invalid, status);
3909
        return float32_default_nan(status);
3910 3911
    }
    if ( aExp == 0xFF ) {
3912 3913 3914
        if (aSig) {
            return propagateFloat32NaN(a, float32_zero, status);
        }
3915 3916 3917 3918 3919 3920 3921 3922 3923
        return a;
    }

    aExp -= 0x7F;
    aSig |= 0x00800000;
    zSign = aExp < 0;
    zSig = aExp << 23;

    for (i = 1 << 22; i > 0; i >>= 1) {
3924
        aSig = ( (uint64_t)aSig * aSig ) >> 23;
3925 3926 3927 3928 3929 3930 3931 3932 3933
        if ( aSig & 0x01000000 ) {
            aSig >>= 1;
            zSig |= i;
        }
    }

    if ( zSign )
        zSig = -zSig;

3934
    return normalizeRoundAndPackFloat32(zSign, 0x85, zSig, status);
3935 3936
}

B
bellard 已提交
3937 3938
/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is equal to
3939 3940
| the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  Otherwise, the comparison is performed
B
bellard 已提交
3941 3942 3943
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3944
int float32_eq(float32 a, float32 b, float_status *status)
B
bellard 已提交
3945
{
3946
    uint32_t av, bv;
3947 3948
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3949 3950 3951 3952

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
3953
        float_raise(float_flag_invalid, status);
B
bellard 已提交
3954 3955
        return 0;
    }
3956 3957 3958
    av = float32_val(a);
    bv = float32_val(b);
    return ( av == bv ) || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
B
bellard 已提交
3959 3960 3961 3962
}

/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is less than
3963 3964 3965
| or equal to the corresponding value `b', and 0 otherwise.  The invalid
| exception is raised if either operand is a NaN.  The comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
3966 3967
*----------------------------------------------------------------------------*/

3968
int float32_le(float32 a, float32 b, float_status *status)
B
bellard 已提交
3969 3970
{
    flag aSign, bSign;
3971
    uint32_t av, bv;
3972 3973
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3974 3975 3976 3977

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
3978
        float_raise(float_flag_invalid, status);
B
bellard 已提交
3979 3980 3981 3982
        return 0;
    }
    aSign = extractFloat32Sign( a );
    bSign = extractFloat32Sign( b );
3983 3984
    av = float32_val(a);
    bv = float32_val(b);
3985
    if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
3986
    return ( av == bv ) || ( aSign ^ ( av < bv ) );
B
bellard 已提交
3987 3988 3989 3990 3991

}

/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is less than
3992 3993 3994
| the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  The comparison is performed according
| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
3995 3996
*----------------------------------------------------------------------------*/

3997
int float32_lt(float32 a, float32 b, float_status *status)
B
bellard 已提交
3998 3999
{
    flag aSign, bSign;
4000
    uint32_t av, bv;
4001 4002
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
4003 4004 4005 4006

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
4007
        float_raise(float_flag_invalid, status);
B
bellard 已提交
4008 4009 4010 4011
        return 0;
    }
    aSign = extractFloat32Sign( a );
    bSign = extractFloat32Sign( b );
4012 4013
    av = float32_val(a);
    bv = float32_val(b);
4014
    if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 );
4015
    return ( av != bv ) && ( aSign ^ ( av < bv ) );
B
bellard 已提交
4016 4017 4018

}

4019 4020
/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point values `a' and `b' cannot
4021 4022 4023
| be compared, and 0 otherwise.  The invalid exception is raised if either
| operand is a NaN.  The comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
4024 4025
*----------------------------------------------------------------------------*/

4026
int float32_unordered(float32 a, float32 b, float_status *status)
4027
{
4028 4029
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
4030 4031 4032 4033

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
4034
        float_raise(float_flag_invalid, status);
4035 4036 4037 4038
        return 1;
    }
    return 0;
}
4039

B
bellard 已提交
4040 4041
/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is equal to
4042 4043 4044
| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.  The comparison is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
B
bellard 已提交
4045 4046
*----------------------------------------------------------------------------*/

4047
int float32_eq_quiet(float32 a, float32 b, float_status *status)
B
bellard 已提交
4048
{
4049 4050
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
4051 4052 4053 4054

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
4055 4056
        if (float32_is_signaling_nan(a, status)
         || float32_is_signaling_nan(b, status)) {
4057
            float_raise(float_flag_invalid, status);
4058
        }
B
bellard 已提交
4059 4060
        return 0;
    }
4061 4062
    return ( float32_val(a) == float32_val(b) ) ||
            ( (uint32_t) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 );
B
bellard 已提交
4063 4064 4065 4066 4067 4068 4069 4070 4071
}

/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is less than or
| equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs do not
| cause an exception.  Otherwise, the comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4072
int float32_le_quiet(float32 a, float32 b, float_status *status)
B
bellard 已提交
4073 4074
{
    flag aSign, bSign;
4075
    uint32_t av, bv;
4076 4077
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
4078 4079 4080 4081

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
4082 4083
        if (float32_is_signaling_nan(a, status)
         || float32_is_signaling_nan(b, status)) {
4084
            float_raise(float_flag_invalid, status);
B
bellard 已提交
4085 4086 4087 4088 4089
        }
        return 0;
    }
    aSign = extractFloat32Sign( a );
    bSign = extractFloat32Sign( b );
4090 4091
    av = float32_val(a);
    bv = float32_val(b);
4092
    if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
4093
    return ( av == bv ) || ( aSign ^ ( av < bv ) );
B
bellard 已提交
4094 4095 4096 4097 4098 4099 4100

}

/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is less than
| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.  Otherwise, the comparison is performed according to the IEC/IEEE
4101
| Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
4102 4103
*----------------------------------------------------------------------------*/

4104
int float32_lt_quiet(float32 a, float32 b, float_status *status)
B
bellard 已提交
4105
{
4106 4107 4108 4109
    flag aSign, bSign;
    uint32_t av, bv;
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
4110

4111 4112 4113 4114 4115
    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
        if (float32_is_signaling_nan(a, status)
         || float32_is_signaling_nan(b, status)) {
4116
            float_raise(float_flag_invalid, status);
B
bellard 已提交
4117
        }
4118
        return 0;
B
bellard 已提交
4119
    }
4120 4121 4122 4123 4124 4125
    aSign = extractFloat32Sign( a );
    bSign = extractFloat32Sign( b );
    av = float32_val(a);
    bv = float32_val(b);
    if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 );
    return ( av != bv ) && ( aSign ^ ( av < bv ) );
B
bellard 已提交
4126 4127 4128 4129

}

/*----------------------------------------------------------------------------
4130 4131 4132 4133
| Returns 1 if the single-precision floating-point values `a' and `b' cannot
| be compared, and 0 otherwise.  Quiet NaNs do not cause an exception.  The
| comparison is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
B
bellard 已提交
4134 4135
*----------------------------------------------------------------------------*/

4136
int float32_unordered_quiet(float32 a, float32 b, float_status *status)
B
bellard 已提交
4137
{
4138 4139
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
4140

4141 4142 4143 4144 4145 4146
    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
        if (float32_is_signaling_nan(a, status)
         || float32_is_signaling_nan(b, status)) {
            float_raise(float_flag_invalid, status);
B
bellard 已提交
4147
        }
4148
        return 1;
B
bellard 已提交
4149
    }
4150
    return 0;
B
bellard 已提交
4151 4152
}

4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167
/*----------------------------------------------------------------------------
| If `a' is denormal and we are in flush-to-zero mode then set the
| input-denormal exception and return zero. Otherwise just return the value.
*----------------------------------------------------------------------------*/
float16 float16_squash_input_denormal(float16 a, float_status *status)
{
    if (status->flush_inputs_to_zero) {
        if (extractFloat16Exp(a) == 0 && extractFloat16Frac(a) != 0) {
            float_raise(float_flag_input_denormal, status);
            return make_float16(float16_val(a) & 0x8000);
        }
    }
    return a;
}

B
bellard 已提交
4168 4169 4170 4171 4172 4173 4174
/*----------------------------------------------------------------------------
| Returns the result of converting the double-precision floating-point value
| `a' to the extended double-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

4175
floatx80 float64_to_floatx80(float64 a, float_status *status)
B
bellard 已提交
4176 4177
{
    flag aSign;
4178
    int aExp;
4179
    uint64_t aSig;
B
bellard 已提交
4180

4181
    a = float64_squash_input_denormal(a, status);
B
bellard 已提交
4182 4183 4184 4185
    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    if ( aExp == 0x7FF ) {
4186 4187 4188
        if (aSig) {
            return commonNaNToFloatx80(float64ToCommonNaN(a, status), status);
        }
4189 4190 4191
        return packFloatx80(aSign,
                            floatx80_infinity_high,
                            floatx80_infinity_low);
B
bellard 已提交
4192 4193 4194 4195 4196 4197 4198 4199 4200 4201 4202 4203 4204 4205 4206 4207 4208 4209
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
        normalizeFloat64Subnormal( aSig, &aExp, &aSig );
    }
    return
        packFloatx80(
            aSign, aExp + 0x3C00, ( aSig | LIT64( 0x0010000000000000 ) )<<11 );

}

/*----------------------------------------------------------------------------
| Returns the result of converting the double-precision floating-point value
| `a' to the quadruple-precision floating-point format.  The conversion is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

4210
float128 float64_to_float128(float64 a, float_status *status)
B
bellard 已提交
4211 4212
{
    flag aSign;
4213
    int aExp;
4214
    uint64_t aSig, zSig0, zSig1;
B
bellard 已提交
4215

4216
    a = float64_squash_input_denormal(a, status);
B
bellard 已提交
4217 4218 4219 4220
    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    if ( aExp == 0x7FF ) {
4221 4222 4223
        if (aSig) {
            return commonNaNToFloat128(float64ToCommonNaN(a, status), status);
        }
B
bellard 已提交
4224 4225 4226 4227 4228 4229 4230 4231 4232 4233 4234 4235 4236 4237 4238 4239 4240 4241 4242
        return packFloat128( aSign, 0x7FFF, 0, 0 );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );
        normalizeFloat64Subnormal( aSig, &aExp, &aSig );
        --aExp;
    }
    shift128Right( aSig, 0, 4, &zSig0, &zSig1 );
    return packFloat128( aSign, aExp + 0x3C00, zSig0, zSig1 );

}


/*----------------------------------------------------------------------------
| Returns the remainder of the double-precision floating-point value `a'
| with respect to the corresponding value `b'.  The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4243
float64 float64_rem(float64 a, float64 b, float_status *status)
B
bellard 已提交
4244
{
4245
    flag aSign, zSign;
4246
    int aExp, bExp, expDiff;
4247 4248 4249
    uint64_t aSig, bSig;
    uint64_t q, alternateASig;
    int64_t sigMean;
B
bellard 已提交
4250

4251 4252
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4253 4254 4255 4256 4257 4258 4259
    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    bSig = extractFloat64Frac( b );
    bExp = extractFloat64Exp( b );
    if ( aExp == 0x7FF ) {
        if ( aSig || ( ( bExp == 0x7FF ) && bSig ) ) {
4260
            return propagateFloat64NaN(a, b, status);
B
bellard 已提交
4261
        }
4262
        float_raise(float_flag_invalid, status);
4263
        return float64_default_nan(status);
B
bellard 已提交
4264 4265
    }
    if ( bExp == 0x7FF ) {
4266 4267 4268
        if (bSig) {
            return propagateFloat64NaN(a, b, status);
        }
B
bellard 已提交
4269 4270 4271 4272
        return a;
    }
    if ( bExp == 0 ) {
        if ( bSig == 0 ) {
4273
            float_raise(float_flag_invalid, status);
4274
            return float64_default_nan(status);
B
bellard 已提交
4275 4276 4277 4278 4279 4280 4281 4282 4283 4284 4285 4286 4287 4288 4289 4290 4291 4292 4293 4294 4295 4296 4297 4298 4299 4300 4301 4302 4303 4304 4305 4306 4307 4308 4309 4310 4311 4312 4313
        }
        normalizeFloat64Subnormal( bSig, &bExp, &bSig );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return a;
        normalizeFloat64Subnormal( aSig, &aExp, &aSig );
    }
    expDiff = aExp - bExp;
    aSig = ( aSig | LIT64( 0x0010000000000000 ) )<<11;
    bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;
    if ( expDiff < 0 ) {
        if ( expDiff < -1 ) return a;
        aSig >>= 1;
    }
    q = ( bSig <= aSig );
    if ( q ) aSig -= bSig;
    expDiff -= 64;
    while ( 0 < expDiff ) {
        q = estimateDiv128To64( aSig, 0, bSig );
        q = ( 2 < q ) ? q - 2 : 0;
        aSig = - ( ( bSig>>2 ) * q );
        expDiff -= 62;
    }
    expDiff += 64;
    if ( 0 < expDiff ) {
        q = estimateDiv128To64( aSig, 0, bSig );
        q = ( 2 < q ) ? q - 2 : 0;
        q >>= 64 - expDiff;
        bSig >>= 2;
        aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;
    }
    else {
        aSig >>= 2;
        bSig >>= 2;
    }
    do {
        alternateASig = aSig;
        ++q;
        aSig -= bSig;
4314
    } while ( 0 <= (int64_t) aSig );
B
bellard 已提交
4315 4316 4317 4318
    sigMean = aSig + alternateASig;
    if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
        aSig = alternateASig;
    }
4319
    zSign = ( (int64_t) aSig < 0 );
B
bellard 已提交
4320
    if ( zSign ) aSig = - aSig;
4321
    return normalizeRoundAndPackFloat64(aSign ^ zSign, bExp, aSig, status);
B
bellard 已提交
4322 4323 4324

}

4325 4326 4327 4328 4329
/*----------------------------------------------------------------------------
| Returns the binary log of the double-precision floating-point value `a'.
| The operation is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
4330
float64 float64_log2(float64 a, float_status *status)
4331 4332
{
    flag aSign, zSign;
4333
    int aExp;
4334
    uint64_t aSig, aSig0, aSig1, zSig, i;
4335
    a = float64_squash_input_denormal(a, status);
4336 4337 4338 4339 4340 4341 4342 4343 4344 4345

    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );

    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloat64( 1, 0x7FF, 0 );
        normalizeFloat64Subnormal( aSig, &aExp, &aSig );
    }
    if ( aSign ) {
4346
        float_raise(float_flag_invalid, status);
4347
        return float64_default_nan(status);
4348 4349
    }
    if ( aExp == 0x7FF ) {
4350 4351 4352
        if (aSig) {
            return propagateFloat64NaN(a, float64_zero, status);
        }
4353 4354 4355 4356 4357 4358
        return a;
    }

    aExp -= 0x3FF;
    aSig |= LIT64( 0x0010000000000000 );
    zSign = aExp < 0;
4359
    zSig = (uint64_t)aExp << 52;
4360 4361 4362 4363 4364 4365 4366 4367 4368 4369 4370
    for (i = 1LL << 51; i > 0; i >>= 1) {
        mul64To128( aSig, aSig, &aSig0, &aSig1 );
        aSig = ( aSig0 << 12 ) | ( aSig1 >> 52 );
        if ( aSig & LIT64( 0x0020000000000000 ) ) {
            aSig >>= 1;
            zSig |= i;
        }
    }

    if ( zSign )
        zSig = -zSig;
4371
    return normalizeRoundAndPackFloat64(zSign, 0x408, zSig, status);
4372 4373
}

B
bellard 已提交
4374 4375
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is equal to the
4376 4377
| corresponding value `b', and 0 otherwise.  The invalid exception is raised
| if either operand is a NaN.  Otherwise, the comparison is performed
B
bellard 已提交
4378 4379 4380
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4381
int float64_eq(float64 a, float64 b, float_status *status)
B
bellard 已提交
4382
{
4383
    uint64_t av, bv;
4384 4385
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4386 4387 4388 4389

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4390
        float_raise(float_flag_invalid, status);
B
bellard 已提交
4391 4392
        return 0;
    }
4393
    av = float64_val(a);
P
pbrook 已提交
4394
    bv = float64_val(b);
4395
    return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
B
bellard 已提交
4396 4397 4398 4399 4400

}

/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than or
4401 4402 4403
| equal to the corresponding value `b', and 0 otherwise.  The invalid
| exception is raised if either operand is a NaN.  The comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
4404 4405
*----------------------------------------------------------------------------*/

4406
int float64_le(float64 a, float64 b, float_status *status)
B
bellard 已提交
4407 4408
{
    flag aSign, bSign;
4409
    uint64_t av, bv;
4410 4411
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4412 4413 4414 4415

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4416
        float_raise(float_flag_invalid, status);
B
bellard 已提交
4417 4418 4419 4420
        return 0;
    }
    aSign = extractFloat64Sign( a );
    bSign = extractFloat64Sign( b );
4421
    av = float64_val(a);
P
pbrook 已提交
4422
    bv = float64_val(b);
4423
    if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
4424
    return ( av == bv ) || ( aSign ^ ( av < bv ) );
B
bellard 已提交
4425 4426 4427 4428 4429

}

/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than
4430 4431 4432
| the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  The comparison is performed according
| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
4433 4434
*----------------------------------------------------------------------------*/

4435
int float64_lt(float64 a, float64 b, float_status *status)
B
bellard 已提交
4436 4437
{
    flag aSign, bSign;
4438
    uint64_t av, bv;
B
bellard 已提交
4439

4440 4441
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4442 4443 4444
    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4445
        float_raise(float_flag_invalid, status);
B
bellard 已提交
4446 4447 4448 4449
        return 0;
    }
    aSign = extractFloat64Sign( a );
    bSign = extractFloat64Sign( b );
4450
    av = float64_val(a);
P
pbrook 已提交
4451
    bv = float64_val(b);
4452
    if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
4453
    return ( av != bv ) && ( aSign ^ ( av < bv ) );
B
bellard 已提交
4454 4455 4456

}

4457 4458
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point values `a' and `b' cannot
4459 4460 4461
| be compared, and 0 otherwise.  The invalid exception is raised if either
| operand is a NaN.  The comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
4462 4463
*----------------------------------------------------------------------------*/

4464
int float64_unordered(float64 a, float64 b, float_status *status)
4465
{
4466 4467
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
4468 4469 4470 4471

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4472
        float_raise(float_flag_invalid, status);
4473 4474 4475 4476 4477
        return 1;
    }
    return 0;
}

B
bellard 已提交
4478 4479
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is equal to the
4480 4481 4482
| corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.The comparison is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
B
bellard 已提交
4483 4484
*----------------------------------------------------------------------------*/

4485
int float64_eq_quiet(float64 a, float64 b, float_status *status)
B
bellard 已提交
4486
{
4487
    uint64_t av, bv;
4488 4489
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4490 4491 4492 4493

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4494 4495
        if (float64_is_signaling_nan(a, status)
         || float64_is_signaling_nan(b, status)) {
4496
            float_raise(float_flag_invalid, status);
4497
        }
B
bellard 已提交
4498 4499
        return 0;
    }
4500
    av = float64_val(a);
P
pbrook 已提交
4501
    bv = float64_val(b);
4502
    return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
B
bellard 已提交
4503 4504 4505 4506 4507 4508 4509 4510 4511 4512

}

/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than or
| equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs do not
| cause an exception.  Otherwise, the comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4513
int float64_le_quiet(float64 a, float64 b, float_status *status)
B
bellard 已提交
4514 4515
{
    flag aSign, bSign;
4516
    uint64_t av, bv;
4517 4518
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4519 4520 4521 4522

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4523 4524
        if (float64_is_signaling_nan(a, status)
         || float64_is_signaling_nan(b, status)) {
4525
            float_raise(float_flag_invalid, status);
B
bellard 已提交
4526 4527 4528 4529 4530
        }
        return 0;
    }
    aSign = extractFloat64Sign( a );
    bSign = extractFloat64Sign( b );
4531
    av = float64_val(a);
P
pbrook 已提交
4532
    bv = float64_val(b);
4533
    if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
4534
    return ( av == bv ) || ( aSign ^ ( av < bv ) );
B
bellard 已提交
4535 4536 4537 4538 4539 4540 4541 4542 4543 4544

}

/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than
| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.  Otherwise, the comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4545
int float64_lt_quiet(float64 a, float64 b, float_status *status)
B
bellard 已提交
4546 4547
{
    flag aSign, bSign;
4548
    uint64_t av, bv;
4549 4550
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4551 4552 4553 4554

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4555 4556
        if (float64_is_signaling_nan(a, status)
         || float64_is_signaling_nan(b, status)) {
4557
            float_raise(float_flag_invalid, status);
B
bellard 已提交
4558 4559 4560 4561 4562
        }
        return 0;
    }
    aSign = extractFloat64Sign( a );
    bSign = extractFloat64Sign( b );
4563
    av = float64_val(a);
P
pbrook 已提交
4564
    bv = float64_val(b);
4565
    if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
4566
    return ( av != bv ) && ( aSign ^ ( av < bv ) );
B
bellard 已提交
4567 4568 4569

}

4570 4571 4572 4573 4574 4575 4576
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point values `a' and `b' cannot
| be compared, and 0 otherwise.  Quiet NaNs do not cause an exception.  The
| comparison is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4577
int float64_unordered_quiet(float64 a, float64 b, float_status *status)
4578
{
4579 4580
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
4581 4582 4583 4584

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4585 4586
        if (float64_is_signaling_nan(a, status)
         || float64_is_signaling_nan(b, status)) {
4587
            float_raise(float_flag_invalid, status);
4588 4589 4590 4591 4592 4593
        }
        return 1;
    }
    return 0;
}

B
bellard 已提交
4594 4595 4596 4597 4598 4599 4600 4601 4602 4603
/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the 32-bit two's complement integer format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic---which means in particular that the conversion
| is rounded according to the current rounding mode.  If `a' is a NaN, the
| largest positive integer is returned.  Otherwise, if the conversion
| overflows, the largest integer with the same sign as `a' is returned.
*----------------------------------------------------------------------------*/

4604
int32_t floatx80_to_int32(floatx80 a, float_status *status)
B
bellard 已提交
4605 4606
{
    flag aSign;
4607
    int32_t aExp, shiftCount;
4608
    uint64_t aSig;
B
bellard 已提交
4609

4610 4611 4612 4613
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return 1 << 31;
    }
B
bellard 已提交
4614 4615 4616
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
4617
    if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0;
B
bellard 已提交
4618 4619 4620
    shiftCount = 0x4037 - aExp;
    if ( shiftCount <= 0 ) shiftCount = 1;
    shift64RightJamming( aSig, shiftCount, &aSig );
4621
    return roundAndPackInt32(aSign, aSig, status);
B
bellard 已提交
4622 4623 4624 4625 4626 4627 4628 4629 4630 4631 4632 4633 4634

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the 32-bit two's complement integer format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic, except that the conversion is always rounded
| toward zero.  If `a' is a NaN, the largest positive integer is returned.
| Otherwise, if the conversion overflows, the largest integer with the same
| sign as `a' is returned.
*----------------------------------------------------------------------------*/

4635
int32_t floatx80_to_int32_round_to_zero(floatx80 a, float_status *status)
B
bellard 已提交
4636 4637
{
    flag aSign;
4638
    int32_t aExp, shiftCount;
4639
    uint64_t aSig, savedASig;
4640
    int32_t z;
B
bellard 已提交
4641

4642 4643 4644 4645
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return 1 << 31;
    }
B
bellard 已提交
4646 4647 4648 4649
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    if ( 0x401E < aExp ) {
4650
        if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0;
B
bellard 已提交
4651 4652 4653
        goto invalid;
    }
    else if ( aExp < 0x3FFF ) {
4654 4655 4656
        if (aExp || aSig) {
            status->float_exception_flags |= float_flag_inexact;
        }
B
bellard 已提交
4657 4658 4659 4660 4661 4662 4663 4664 4665
        return 0;
    }
    shiftCount = 0x403E - aExp;
    savedASig = aSig;
    aSig >>= shiftCount;
    z = aSig;
    if ( aSign ) z = - z;
    if ( ( z < 0 ) ^ aSign ) {
 invalid:
4666
        float_raise(float_flag_invalid, status);
4667
        return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
B
bellard 已提交
4668 4669
    }
    if ( ( aSig<<shiftCount ) != savedASig ) {
4670
        status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
4671 4672 4673 4674 4675 4676 4677 4678 4679 4680 4681 4682 4683 4684 4685
    }
    return z;

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the 64-bit two's complement integer format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic---which means in particular that the conversion
| is rounded according to the current rounding mode.  If `a' is a NaN,
| the largest positive integer is returned.  Otherwise, if the conversion
| overflows, the largest integer with the same sign as `a' is returned.
*----------------------------------------------------------------------------*/

4686
int64_t floatx80_to_int64(floatx80 a, float_status *status)
B
bellard 已提交
4687 4688
{
    flag aSign;
4689
    int32_t aExp, shiftCount;
4690
    uint64_t aSig, aSigExtra;
B
bellard 已提交
4691

4692 4693 4694 4695
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return 1ULL << 63;
    }
B
bellard 已提交
4696 4697 4698 4699 4700 4701
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    shiftCount = 0x403E - aExp;
    if ( shiftCount <= 0 ) {
        if ( shiftCount ) {
4702
            float_raise(float_flag_invalid, status);
4703
            if (!aSign || floatx80_is_any_nan(a)) {
B
bellard 已提交
4704 4705
                return LIT64( 0x7FFFFFFFFFFFFFFF );
            }
4706
            return (int64_t) LIT64( 0x8000000000000000 );
B
bellard 已提交
4707 4708 4709 4710 4711 4712
        }
        aSigExtra = 0;
    }
    else {
        shift64ExtraRightJamming( aSig, 0, shiftCount, &aSig, &aSigExtra );
    }
4713
    return roundAndPackInt64(aSign, aSig, aSigExtra, status);
B
bellard 已提交
4714 4715 4716 4717 4718 4719 4720 4721 4722 4723 4724 4725 4726

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the 64-bit two's complement integer format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic, except that the conversion is always rounded
| toward zero.  If `a' is a NaN, the largest positive integer is returned.
| Otherwise, if the conversion overflows, the largest integer with the same
| sign as `a' is returned.
*----------------------------------------------------------------------------*/

4727
int64_t floatx80_to_int64_round_to_zero(floatx80 a, float_status *status)
B
bellard 已提交
4728 4729
{
    flag aSign;
4730
    int32_t aExp, shiftCount;
4731
    uint64_t aSig;
4732
    int64_t z;
B
bellard 已提交
4733

4734 4735 4736 4737
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return 1ULL << 63;
    }
B
bellard 已提交
4738 4739 4740 4741 4742 4743 4744
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    shiftCount = aExp - 0x403E;
    if ( 0 <= shiftCount ) {
        aSig &= LIT64( 0x7FFFFFFFFFFFFFFF );
        if ( ( a.high != 0xC03E ) || aSig ) {
4745
            float_raise(float_flag_invalid, status);
B
bellard 已提交
4746 4747 4748 4749
            if ( ! aSign || ( ( aExp == 0x7FFF ) && aSig ) ) {
                return LIT64( 0x7FFFFFFFFFFFFFFF );
            }
        }
4750
        return (int64_t) LIT64( 0x8000000000000000 );
B
bellard 已提交
4751 4752
    }
    else if ( aExp < 0x3FFF ) {
4753 4754 4755
        if (aExp | aSig) {
            status->float_exception_flags |= float_flag_inexact;
        }
B
bellard 已提交
4756 4757 4758
        return 0;
    }
    z = aSig>>( - shiftCount );
4759
    if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) {
4760
        status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
4761 4762 4763 4764 4765 4766 4767 4768 4769 4770 4771 4772 4773
    }
    if ( aSign ) z = - z;
    return z;

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the single-precision floating-point format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4774
float32 floatx80_to_float32(floatx80 a, float_status *status)
B
bellard 已提交
4775 4776
{
    flag aSign;
4777
    int32_t aExp;
4778
    uint64_t aSig;
B
bellard 已提交
4779

4780 4781 4782 4783
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return float32_default_nan(status);
    }
B
bellard 已提交
4784 4785 4786 4787
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    if ( aExp == 0x7FFF ) {
4788
        if ( (uint64_t) ( aSig<<1 ) ) {
4789
            return commonNaNToFloat32(floatx80ToCommonNaN(a, status), status);
B
bellard 已提交
4790 4791 4792 4793 4794
        }
        return packFloat32( aSign, 0xFF, 0 );
    }
    shift64RightJamming( aSig, 33, &aSig );
    if ( aExp || aSig ) aExp -= 0x3F81;
4795
    return roundAndPackFloat32(aSign, aExp, aSig, status);
B
bellard 已提交
4796 4797 4798 4799 4800 4801 4802 4803 4804 4805

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the double-precision floating-point format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4806
float64 floatx80_to_float64(floatx80 a, float_status *status)
B
bellard 已提交
4807 4808
{
    flag aSign;
4809
    int32_t aExp;
4810
    uint64_t aSig, zSig;
B
bellard 已提交
4811

4812 4813 4814 4815
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return float64_default_nan(status);
    }
B
bellard 已提交
4816 4817 4818 4819
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    if ( aExp == 0x7FFF ) {
4820
        if ( (uint64_t) ( aSig<<1 ) ) {
4821
            return commonNaNToFloat64(floatx80ToCommonNaN(a, status), status);
B
bellard 已提交
4822 4823 4824 4825 4826
        }
        return packFloat64( aSign, 0x7FF, 0 );
    }
    shift64RightJamming( aSig, 1, &zSig );
    if ( aExp || aSig ) aExp -= 0x3C01;
4827
    return roundAndPackFloat64(aSign, aExp, zSig, status);
B
bellard 已提交
4828 4829 4830 4831 4832 4833 4834 4835 4836 4837

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the quadruple-precision floating-point format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4838
float128 floatx80_to_float128(floatx80 a, float_status *status)
B
bellard 已提交
4839 4840
{
    flag aSign;
4841
    int aExp;
4842
    uint64_t aSig, zSig0, zSig1;
B
bellard 已提交
4843

4844 4845 4846 4847
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return float128_default_nan(status);
    }
B
bellard 已提交
4848 4849 4850
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
4851
    if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) {
4852
        return commonNaNToFloat128(floatx80ToCommonNaN(a, status), status);
B
bellard 已提交
4853 4854 4855 4856 4857 4858
    }
    shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 );
    return packFloat128( aSign, aExp, zSig0, zSig1 );

}

4859 4860 4861 4862 4863 4864 4865 4866 4867 4868 4869 4870 4871 4872 4873 4874
/*----------------------------------------------------------------------------
| Rounds the extended double-precision floating-point value `a'
| to the precision provided by floatx80_rounding_precision and returns the
| result as an extended double-precision floating-point value.
| The operation is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

floatx80 floatx80_round(floatx80 a, float_status *status)
{
    return roundAndPackFloatx80(status->floatx80_rounding_precision,
                                extractFloatx80Sign(a),
                                extractFloatx80Exp(a),
                                extractFloatx80Frac(a), 0, status);
}

B
bellard 已提交
4875 4876 4877 4878 4879 4880 4881
/*----------------------------------------------------------------------------
| Rounds the extended double-precision floating-point value `a' to an integer,
| and returns the result as an extended quadruple-precision floating-point
| value.  The operation is performed according to the IEC/IEEE Standard for
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4882
floatx80 floatx80_round_to_int(floatx80 a, float_status *status)
B
bellard 已提交
4883 4884
{
    flag aSign;
4885
    int32_t aExp;
4886
    uint64_t lastBitMask, roundBitsMask;
B
bellard 已提交
4887 4888
    floatx80 z;

4889 4890 4891 4892
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
4893 4894
    aExp = extractFloatx80Exp( a );
    if ( 0x403E <= aExp ) {
4895
        if ( ( aExp == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) {
4896
            return propagateFloatx80NaN(a, a, status);
B
bellard 已提交
4897 4898 4899 4900 4901
        }
        return a;
    }
    if ( aExp < 0x3FFF ) {
        if (    ( aExp == 0 )
4902
             && ( (uint64_t) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) {
B
bellard 已提交
4903 4904
            return a;
        }
4905
        status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
4906
        aSign = extractFloatx80Sign( a );
4907
        switch (status->float_rounding_mode) {
B
bellard 已提交
4908
         case float_round_nearest_even:
4909
            if ( ( aExp == 0x3FFE ) && (uint64_t) ( extractFloatx80Frac( a )<<1 )
B
bellard 已提交
4910 4911 4912 4913 4914
               ) {
                return
                    packFloatx80( aSign, 0x3FFF, LIT64( 0x8000000000000000 ) );
            }
            break;
4915 4916 4917 4918 4919
        case float_round_ties_away:
            if (aExp == 0x3FFE) {
                return packFloatx80(aSign, 0x3FFF, LIT64(0x8000000000000000));
            }
            break;
B
bellard 已提交
4920 4921 4922 4923 4924 4925 4926 4927 4928 4929 4930 4931 4932 4933 4934 4935
         case float_round_down:
            return
                  aSign ?
                      packFloatx80( 1, 0x3FFF, LIT64( 0x8000000000000000 ) )
                : packFloatx80( 0, 0, 0 );
         case float_round_up:
            return
                  aSign ? packFloatx80( 1, 0, 0 )
                : packFloatx80( 0, 0x3FFF, LIT64( 0x8000000000000000 ) );
        }
        return packFloatx80( aSign, 0, 0 );
    }
    lastBitMask = 1;
    lastBitMask <<= 0x403E - aExp;
    roundBitsMask = lastBitMask - 1;
    z = a;
4936
    switch (status->float_rounding_mode) {
4937
    case float_round_nearest_even:
B
bellard 已提交
4938
        z.low += lastBitMask>>1;
4939 4940 4941 4942
        if ((z.low & roundBitsMask) == 0) {
            z.low &= ~lastBitMask;
        }
        break;
4943 4944 4945
    case float_round_ties_away:
        z.low += lastBitMask >> 1;
        break;
4946 4947 4948 4949 4950 4951 4952 4953 4954
    case float_round_to_zero:
        break;
    case float_round_up:
        if (!extractFloatx80Sign(z)) {
            z.low += roundBitsMask;
        }
        break;
    case float_round_down:
        if (extractFloatx80Sign(z)) {
B
bellard 已提交
4955 4956
            z.low += roundBitsMask;
        }
4957 4958 4959
        break;
    default:
        abort();
B
bellard 已提交
4960 4961 4962 4963 4964 4965
    }
    z.low &= ~ roundBitsMask;
    if ( z.low == 0 ) {
        ++z.high;
        z.low = LIT64( 0x8000000000000000 );
    }
4966 4967 4968
    if (z.low != a.low) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
4969 4970 4971 4972 4973 4974 4975 4976 4977 4978 4979 4980
    return z;

}

/*----------------------------------------------------------------------------
| Returns the result of adding the absolute values of the extended double-
| precision floating-point values `a' and `b'.  If `zSign' is 1, the sum is
| negated before being returned.  `zSign' is ignored if the result is a NaN.
| The addition is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4981 4982
static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, flag zSign,
                                float_status *status)
B
bellard 已提交
4983
{
4984
    int32_t aExp, bExp, zExp;
4985
    uint64_t aSig, bSig, zSig0, zSig1;
4986
    int32_t expDiff;
B
bellard 已提交
4987 4988 4989 4990 4991 4992 4993 4994

    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    bSig = extractFloatx80Frac( b );
    bExp = extractFloatx80Exp( b );
    expDiff = aExp - bExp;
    if ( 0 < expDiff ) {
        if ( aExp == 0x7FFF ) {
4995 4996 4997
            if ((uint64_t)(aSig << 1)) {
                return propagateFloatx80NaN(a, b, status);
            }
B
bellard 已提交
4998 4999 5000 5001 5002 5003 5004 5005
            return a;
        }
        if ( bExp == 0 ) --expDiff;
        shift64ExtraRightJamming( bSig, 0, expDiff, &bSig, &zSig1 );
        zExp = aExp;
    }
    else if ( expDiff < 0 ) {
        if ( bExp == 0x7FFF ) {
5006 5007 5008
            if ((uint64_t)(bSig << 1)) {
                return propagateFloatx80NaN(a, b, status);
            }
5009 5010 5011
            return packFloatx80(zSign,
                                floatx80_infinity_high,
                                floatx80_infinity_low);
B
bellard 已提交
5012 5013 5014 5015 5016 5017 5018
        }
        if ( aExp == 0 ) ++expDiff;
        shift64ExtraRightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );
        zExp = bExp;
    }
    else {
        if ( aExp == 0x7FFF ) {
5019
            if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) {
5020
                return propagateFloatx80NaN(a, b, status);
B
bellard 已提交
5021 5022 5023 5024 5025 5026 5027 5028 5029 5030 5031 5032 5033
            }
            return a;
        }
        zSig1 = 0;
        zSig0 = aSig + bSig;
        if ( aExp == 0 ) {
            normalizeFloatx80Subnormal( zSig0, &zExp, &zSig0 );
            goto roundAndPack;
        }
        zExp = aExp;
        goto shiftRight1;
    }
    zSig0 = aSig + bSig;
5034
    if ( (int64_t) zSig0 < 0 ) goto roundAndPack;
B
bellard 已提交
5035 5036 5037 5038 5039
 shiftRight1:
    shift64ExtraRightJamming( zSig0, zSig1, 1, &zSig0, &zSig1 );
    zSig0 |= LIT64( 0x8000000000000000 );
    ++zExp;
 roundAndPack:
5040
    return roundAndPackFloatx80(status->floatx80_rounding_precision,
5041
                                zSign, zExp, zSig0, zSig1, status);
B
bellard 已提交
5042 5043 5044 5045 5046 5047 5048 5049 5050 5051
}

/*----------------------------------------------------------------------------
| Returns the result of subtracting the absolute values of the extended
| double-precision floating-point values `a' and `b'.  If `zSign' is 1, the
| difference is negated before being returned.  `zSign' is ignored if the
| result is a NaN.  The subtraction is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5052 5053
static floatx80 subFloatx80Sigs(floatx80 a, floatx80 b, flag zSign,
                                float_status *status)
B
bellard 已提交
5054
{
5055
    int32_t aExp, bExp, zExp;
5056
    uint64_t aSig, bSig, zSig0, zSig1;
5057
    int32_t expDiff;
B
bellard 已提交
5058 5059 5060 5061 5062 5063 5064 5065 5066

    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    bSig = extractFloatx80Frac( b );
    bExp = extractFloatx80Exp( b );
    expDiff = aExp - bExp;
    if ( 0 < expDiff ) goto aExpBigger;
    if ( expDiff < 0 ) goto bExpBigger;
    if ( aExp == 0x7FFF ) {
5067
        if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) {
5068
            return propagateFloatx80NaN(a, b, status);
B
bellard 已提交
5069
        }
5070
        float_raise(float_flag_invalid, status);
5071
        return floatx80_default_nan(status);
B
bellard 已提交
5072 5073 5074 5075 5076 5077 5078 5079
    }
    if ( aExp == 0 ) {
        aExp = 1;
        bExp = 1;
    }
    zSig1 = 0;
    if ( bSig < aSig ) goto aBigger;
    if ( aSig < bSig ) goto bBigger;
5080
    return packFloatx80(status->float_rounding_mode == float_round_down, 0, 0);
B
bellard 已提交
5081 5082
 bExpBigger:
    if ( bExp == 0x7FFF ) {
5083 5084 5085
        if ((uint64_t)(bSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
5086 5087
        return packFloatx80(zSign ^ 1, floatx80_infinity_high,
                            floatx80_infinity_low);
B
bellard 已提交
5088 5089 5090 5091 5092 5093 5094 5095 5096 5097
    }
    if ( aExp == 0 ) ++expDiff;
    shift128RightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );
 bBigger:
    sub128( bSig, 0, aSig, zSig1, &zSig0, &zSig1 );
    zExp = bExp;
    zSign ^= 1;
    goto normalizeRoundAndPack;
 aExpBigger:
    if ( aExp == 0x7FFF ) {
5098 5099 5100
        if ((uint64_t)(aSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
B
bellard 已提交
5101 5102 5103 5104 5105 5106 5107 5108
        return a;
    }
    if ( bExp == 0 ) --expDiff;
    shift128RightJamming( bSig, 0, expDiff, &bSig, &zSig1 );
 aBigger:
    sub128( aSig, 0, bSig, zSig1, &zSig0, &zSig1 );
    zExp = aExp;
 normalizeRoundAndPack:
5109
    return normalizeRoundAndPackFloatx80(status->floatx80_rounding_precision,
5110
                                         zSign, zExp, zSig0, zSig1, status);
B
bellard 已提交
5111 5112 5113 5114 5115 5116 5117 5118
}

/*----------------------------------------------------------------------------
| Returns the result of adding the extended double-precision floating-point
| values `a' and `b'.  The operation is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5119
floatx80 floatx80_add(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5120 5121 5122
{
    flag aSign, bSign;

5123 5124 5125 5126
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
5127 5128 5129
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign == bSign ) {
5130
        return addFloatx80Sigs(a, b, aSign, status);
B
bellard 已提交
5131 5132
    }
    else {
5133
        return subFloatx80Sigs(a, b, aSign, status);
B
bellard 已提交
5134 5135 5136 5137 5138 5139 5140 5141 5142 5143
    }

}

/*----------------------------------------------------------------------------
| Returns the result of subtracting the extended double-precision floating-
| point values `a' and `b'.  The operation is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5144
floatx80 floatx80_sub(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5145 5146 5147
{
    flag aSign, bSign;

5148 5149 5150 5151
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
5152 5153 5154
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign == bSign ) {
5155
        return subFloatx80Sigs(a, b, aSign, status);
B
bellard 已提交
5156 5157
    }
    else {
5158
        return addFloatx80Sigs(a, b, aSign, status);
B
bellard 已提交
5159 5160 5161 5162 5163 5164 5165 5166 5167 5168
    }

}

/*----------------------------------------------------------------------------
| Returns the result of multiplying the extended double-precision floating-
| point values `a' and `b'.  The operation is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5169
floatx80 floatx80_mul(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5170 5171
{
    flag aSign, bSign, zSign;
5172
    int32_t aExp, bExp, zExp;
5173
    uint64_t aSig, bSig, zSig0, zSig1;
B
bellard 已提交
5174

5175 5176 5177 5178
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
5179 5180 5181 5182 5183 5184 5185 5186
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    bSig = extractFloatx80Frac( b );
    bExp = extractFloatx80Exp( b );
    bSign = extractFloatx80Sign( b );
    zSign = aSign ^ bSign;
    if ( aExp == 0x7FFF ) {
5187 5188
        if (    (uint64_t) ( aSig<<1 )
             || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) {
5189
            return propagateFloatx80NaN(a, b, status);
B
bellard 已提交
5190 5191
        }
        if ( ( bExp | bSig ) == 0 ) goto invalid;
5192 5193
        return packFloatx80(zSign, floatx80_infinity_high,
                                   floatx80_infinity_low);
B
bellard 已提交
5194 5195
    }
    if ( bExp == 0x7FFF ) {
5196 5197 5198
        if ((uint64_t)(bSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
B
bellard 已提交
5199 5200
        if ( ( aExp | aSig ) == 0 ) {
 invalid:
5201
            float_raise(float_flag_invalid, status);
5202
            return floatx80_default_nan(status);
B
bellard 已提交
5203
        }
5204 5205
        return packFloatx80(zSign, floatx80_infinity_high,
                                   floatx80_infinity_low);
B
bellard 已提交
5206 5207 5208 5209 5210 5211 5212 5213 5214 5215 5216
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloatx80( zSign, 0, 0 );
        normalizeFloatx80Subnormal( aSig, &aExp, &aSig );
    }
    if ( bExp == 0 ) {
        if ( bSig == 0 ) return packFloatx80( zSign, 0, 0 );
        normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
    }
    zExp = aExp + bExp - 0x3FFE;
    mul64To128( aSig, bSig, &zSig0, &zSig1 );
5217
    if ( 0 < (int64_t) zSig0 ) {
B
bellard 已提交
5218 5219 5220
        shortShift128Left( zSig0, zSig1, 1, &zSig0, &zSig1 );
        --zExp;
    }
5221
    return roundAndPackFloatx80(status->floatx80_rounding_precision,
5222
                                zSign, zExp, zSig0, zSig1, status);
B
bellard 已提交
5223 5224 5225 5226 5227 5228 5229 5230
}

/*----------------------------------------------------------------------------
| Returns the result of dividing the extended double-precision floating-point
| value `a' by the corresponding value `b'.  The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5231
floatx80 floatx80_div(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5232 5233
{
    flag aSign, bSign, zSign;
5234
    int32_t aExp, bExp, zExp;
5235 5236
    uint64_t aSig, bSig, zSig0, zSig1;
    uint64_t rem0, rem1, rem2, term0, term1, term2;
B
bellard 已提交
5237

5238 5239 5240 5241
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
5242 5243 5244 5245 5246 5247 5248 5249
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    bSig = extractFloatx80Frac( b );
    bExp = extractFloatx80Exp( b );
    bSign = extractFloatx80Sign( b );
    zSign = aSign ^ bSign;
    if ( aExp == 0x7FFF ) {
5250 5251 5252
        if ((uint64_t)(aSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
B
bellard 已提交
5253
        if ( bExp == 0x7FFF ) {
5254 5255 5256
            if ((uint64_t)(bSig << 1)) {
                return propagateFloatx80NaN(a, b, status);
            }
B
bellard 已提交
5257 5258
            goto invalid;
        }
5259 5260
        return packFloatx80(zSign, floatx80_infinity_high,
                                   floatx80_infinity_low);
B
bellard 已提交
5261 5262
    }
    if ( bExp == 0x7FFF ) {
5263 5264 5265
        if ((uint64_t)(bSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
B
bellard 已提交
5266 5267 5268 5269 5270 5271
        return packFloatx80( zSign, 0, 0 );
    }
    if ( bExp == 0 ) {
        if ( bSig == 0 ) {
            if ( ( aExp | aSig ) == 0 ) {
 invalid:
5272
                float_raise(float_flag_invalid, status);
5273
                return floatx80_default_nan(status);
B
bellard 已提交
5274
            }
5275
            float_raise(float_flag_divbyzero, status);
5276 5277
            return packFloatx80(zSign, floatx80_infinity_high,
                                       floatx80_infinity_low);
B
bellard 已提交
5278 5279 5280 5281 5282 5283 5284 5285 5286 5287 5288 5289 5290 5291 5292 5293
        }
        normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloatx80( zSign, 0, 0 );
        normalizeFloatx80Subnormal( aSig, &aExp, &aSig );
    }
    zExp = aExp - bExp + 0x3FFE;
    rem1 = 0;
    if ( bSig <= aSig ) {
        shift128Right( aSig, 0, 1, &aSig, &rem1 );
        ++zExp;
    }
    zSig0 = estimateDiv128To64( aSig, rem1, bSig );
    mul64To128( bSig, zSig0, &term0, &term1 );
    sub128( aSig, rem1, term0, term1, &rem0, &rem1 );
5294
    while ( (int64_t) rem0 < 0 ) {
B
bellard 已提交
5295 5296 5297 5298
        --zSig0;
        add128( rem0, rem1, 0, bSig, &rem0, &rem1 );
    }
    zSig1 = estimateDiv128To64( rem1, 0, bSig );
5299
    if ( (uint64_t) ( zSig1<<1 ) <= 8 ) {
B
bellard 已提交
5300 5301
        mul64To128( bSig, zSig1, &term1, &term2 );
        sub128( rem1, 0, term1, term2, &rem1, &rem2 );
5302
        while ( (int64_t) rem1 < 0 ) {
B
bellard 已提交
5303 5304 5305 5306 5307
            --zSig1;
            add128( rem1, rem2, 0, bSig, &rem1, &rem2 );
        }
        zSig1 |= ( ( rem1 | rem2 ) != 0 );
    }
5308
    return roundAndPackFloatx80(status->floatx80_rounding_precision,
5309
                                zSign, zExp, zSig0, zSig1, status);
B
bellard 已提交
5310 5311 5312 5313 5314 5315 5316 5317
}

/*----------------------------------------------------------------------------
| Returns the remainder of the extended double-precision floating-point value
| `a' with respect to the corresponding value `b'.  The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5318
floatx80 floatx80_rem(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5319
{
5320
    flag aSign, zSign;
5321
    int32_t aExp, bExp, expDiff;
5322 5323
    uint64_t aSig0, aSig1, bSig;
    uint64_t q, term0, term1, alternateASig0, alternateASig1;
B
bellard 已提交
5324

5325 5326 5327 5328
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
5329 5330 5331 5332 5333 5334
    aSig0 = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    bSig = extractFloatx80Frac( b );
    bExp = extractFloatx80Exp( b );
    if ( aExp == 0x7FFF ) {
5335 5336
        if (    (uint64_t) ( aSig0<<1 )
             || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) {
5337
            return propagateFloatx80NaN(a, b, status);
B
bellard 已提交
5338 5339 5340 5341
        }
        goto invalid;
    }
    if ( bExp == 0x7FFF ) {
5342 5343 5344
        if ((uint64_t)(bSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
B
bellard 已提交
5345 5346 5347 5348 5349
        return a;
    }
    if ( bExp == 0 ) {
        if ( bSig == 0 ) {
 invalid:
5350
            float_raise(float_flag_invalid, status);
5351
            return floatx80_default_nan(status);
B
bellard 已提交
5352 5353 5354 5355
        }
        normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
    }
    if ( aExp == 0 ) {
5356
        if ( (uint64_t) ( aSig0<<1 ) == 0 ) return a;
B
bellard 已提交
5357 5358 5359 5360 5361 5362 5363 5364 5365 5366 5367 5368 5369 5370 5371 5372 5373 5374 5375 5376 5377 5378 5379 5380 5381 5382 5383 5384 5385 5386 5387 5388 5389 5390 5391 5392 5393 5394 5395 5396 5397 5398 5399 5400 5401 5402 5403 5404 5405 5406
        normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 );
    }
    bSig |= LIT64( 0x8000000000000000 );
    zSign = aSign;
    expDiff = aExp - bExp;
    aSig1 = 0;
    if ( expDiff < 0 ) {
        if ( expDiff < -1 ) return a;
        shift128Right( aSig0, 0, 1, &aSig0, &aSig1 );
        expDiff = 0;
    }
    q = ( bSig <= aSig0 );
    if ( q ) aSig0 -= bSig;
    expDiff -= 64;
    while ( 0 < expDiff ) {
        q = estimateDiv128To64( aSig0, aSig1, bSig );
        q = ( 2 < q ) ? q - 2 : 0;
        mul64To128( bSig, q, &term0, &term1 );
        sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );
        shortShift128Left( aSig0, aSig1, 62, &aSig0, &aSig1 );
        expDiff -= 62;
    }
    expDiff += 64;
    if ( 0 < expDiff ) {
        q = estimateDiv128To64( aSig0, aSig1, bSig );
        q = ( 2 < q ) ? q - 2 : 0;
        q >>= 64 - expDiff;
        mul64To128( bSig, q<<( 64 - expDiff ), &term0, &term1 );
        sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );
        shortShift128Left( 0, bSig, 64 - expDiff, &term0, &term1 );
        while ( le128( term0, term1, aSig0, aSig1 ) ) {
            ++q;
            sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );
        }
    }
    else {
        term1 = 0;
        term0 = bSig;
    }
    sub128( term0, term1, aSig0, aSig1, &alternateASig0, &alternateASig1 );
    if (    lt128( alternateASig0, alternateASig1, aSig0, aSig1 )
         || (    eq128( alternateASig0, alternateASig1, aSig0, aSig1 )
              && ( q & 1 ) )
       ) {
        aSig0 = alternateASig0;
        aSig1 = alternateASig1;
        zSign = ! zSign;
    }
    return
        normalizeRoundAndPackFloatx80(
5407
            80, zSign, bExp + expDiff, aSig0, aSig1, status);
B
bellard 已提交
5408 5409 5410 5411 5412 5413 5414 5415 5416

}

/*----------------------------------------------------------------------------
| Returns the square root of the extended double-precision floating-point
| value `a'.  The operation is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5417
floatx80 floatx80_sqrt(floatx80 a, float_status *status)
B
bellard 已提交
5418 5419
{
    flag aSign;
5420
    int32_t aExp, zExp;
5421 5422
    uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0;
    uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
B
bellard 已提交
5423

5424 5425 5426 5427
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
5428 5429 5430 5431
    aSig0 = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    if ( aExp == 0x7FFF ) {
5432 5433 5434
        if ((uint64_t)(aSig0 << 1)) {
            return propagateFloatx80NaN(a, a, status);
        }
B
bellard 已提交
5435 5436 5437 5438 5439 5440
        if ( ! aSign ) return a;
        goto invalid;
    }
    if ( aSign ) {
        if ( ( aExp | aSig0 ) == 0 ) return a;
 invalid:
5441
        float_raise(float_flag_invalid, status);
5442
        return floatx80_default_nan(status);
B
bellard 已提交
5443 5444 5445 5446 5447 5448 5449 5450 5451 5452 5453 5454
    }
    if ( aExp == 0 ) {
        if ( aSig0 == 0 ) return packFloatx80( 0, 0, 0 );
        normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 );
    }
    zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFF;
    zSig0 = estimateSqrt32( aExp, aSig0>>32 );
    shift128Right( aSig0, 0, 2 + ( aExp & 1 ), &aSig0, &aSig1 );
    zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );
    doubleZSig0 = zSig0<<1;
    mul64To128( zSig0, zSig0, &term0, &term1 );
    sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
5455
    while ( (int64_t) rem0 < 0 ) {
B
bellard 已提交
5456 5457 5458 5459 5460 5461 5462 5463 5464 5465 5466
        --zSig0;
        doubleZSig0 -= 2;
        add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
    }
    zSig1 = estimateDiv128To64( rem1, 0, doubleZSig0 );
    if ( ( zSig1 & LIT64( 0x3FFFFFFFFFFFFFFF ) ) <= 5 ) {
        if ( zSig1 == 0 ) zSig1 = 1;
        mul64To128( doubleZSig0, zSig1, &term1, &term2 );
        sub128( rem1, 0, term1, term2, &rem1, &rem2 );
        mul64To128( zSig1, zSig1, &term2, &term3 );
        sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
5467
        while ( (int64_t) rem1 < 0 ) {
B
bellard 已提交
5468 5469 5470 5471 5472 5473 5474 5475 5476 5477
            --zSig1;
            shortShift128Left( 0, zSig1, 1, &term2, &term3 );
            term3 |= 1;
            term2 |= doubleZSig0;
            add192( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );
        }
        zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
    }
    shortShift128Left( 0, zSig1, 1, &zSig0, &zSig1 );
    zSig0 |= doubleZSig0;
5478 5479
    return roundAndPackFloatx80(status->floatx80_rounding_precision,
                                0, zExp, zSig0, zSig1, status);
B
bellard 已提交
5480 5481 5482
}

/*----------------------------------------------------------------------------
5483 5484 5485 5486
| Returns 1 if the extended double-precision floating-point value `a' is equal
| to the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  Otherwise, the comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
5487 5488
*----------------------------------------------------------------------------*/

5489
int floatx80_eq(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5490 5491
{

5492 5493 5494 5495 5496
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
        || (extractFloatx80Exp(a) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(a) << 1))
        || (extractFloatx80Exp(b) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(b) << 1))
B
bellard 已提交
5497
       ) {
5498
        float_raise(float_flag_invalid, status);
B
bellard 已提交
5499 5500 5501 5502 5503 5504
        return 0;
    }
    return
           ( a.low == b.low )
        && (    ( a.high == b.high )
             || (    ( a.low == 0 )
5505
                  && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) )
B
bellard 已提交
5506 5507 5508 5509 5510 5511 5512
           );

}

/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is
| less than or equal to the corresponding value `b', and 0 otherwise.  The
5513 5514 5515
| invalid exception is raised if either operand is a NaN.  The comparison is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
B
bellard 已提交
5516 5517
*----------------------------------------------------------------------------*/

5518
int floatx80_le(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5519 5520 5521
{
    flag aSign, bSign;

5522 5523 5524 5525 5526
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
        || (extractFloatx80Exp(a) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(a) << 1))
        || (extractFloatx80Exp(b) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(b) << 1))
B
bellard 已提交
5527
       ) {
5528
        float_raise(float_flag_invalid, status);
B
bellard 已提交
5529 5530 5531 5532 5533 5534 5535
        return 0;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
5536
            || (    ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
5537 5538 5539 5540 5541 5542 5543 5544 5545 5546
                 == 0 );
    }
    return
          aSign ? le128( b.high, b.low, a.high, a.low )
        : le128( a.high, a.low, b.high, b.low );

}

/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is
5547 5548 5549
| less than the corresponding value `b', and 0 otherwise.  The invalid
| exception is raised if either operand is a NaN.  The comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
5550 5551
*----------------------------------------------------------------------------*/

5552
int floatx80_lt(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5553 5554 5555
{
    flag aSign, bSign;

5556 5557 5558 5559 5560
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
        || (extractFloatx80Exp(a) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(a) << 1))
        || (extractFloatx80Exp(b) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(b) << 1))
B
bellard 已提交
5561
       ) {
5562
        float_raise(float_flag_invalid, status);
B
bellard 已提交
5563 5564 5565 5566 5567 5568 5569
        return 0;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
5570
            && (    ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
5571 5572 5573 5574 5575 5576 5577 5578
                 != 0 );
    }
    return
          aSign ? lt128( b.high, b.low, a.high, a.low )
        : lt128( a.high, a.low, b.high, b.low );

}

5579 5580
/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point values `a' and `b'
5581 5582 5583
| cannot be compared, and 0 otherwise.  The invalid exception is raised if
| either operand is a NaN.   The comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
5584
*----------------------------------------------------------------------------*/
5585
int floatx80_unordered(floatx80 a, floatx80 b, float_status *status)
5586
{
5587 5588 5589 5590 5591
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
        || (extractFloatx80Exp(a) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(a) << 1))
        || (extractFloatx80Exp(b) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(b) << 1))
5592
       ) {
5593
        float_raise(float_flag_invalid, status);
5594 5595 5596 5597 5598
        return 1;
    }
    return 0;
}

B
bellard 已提交
5599
/*----------------------------------------------------------------------------
5600
| Returns 1 if the extended double-precision floating-point value `a' is
5601 5602 5603
| equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs do not
| cause an exception.  The comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
5604 5605
*----------------------------------------------------------------------------*/

5606
int floatx80_eq_quiet(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5607 5608
{

5609 5610 5611 5612
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return 0;
    }
B
bellard 已提交
5613
    if (    (    ( extractFloatx80Exp( a ) == 0x7FFF )
5614
              && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
B
bellard 已提交
5615
         || (    ( extractFloatx80Exp( b ) == 0x7FFF )
5616
              && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
B
bellard 已提交
5617
       ) {
5618 5619
        if (floatx80_is_signaling_nan(a, status)
         || floatx80_is_signaling_nan(b, status)) {
5620
            float_raise(float_flag_invalid, status);
5621
        }
B
bellard 已提交
5622 5623 5624 5625 5626 5627
        return 0;
    }
    return
           ( a.low == b.low )
        && (    ( a.high == b.high )
             || (    ( a.low == 0 )
5628
                  && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) )
B
bellard 已提交
5629 5630 5631 5632 5633 5634 5635 5636 5637 5638 5639
           );

}

/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is less
| than or equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs
| do not cause an exception.  Otherwise, the comparison is performed according
| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5640
int floatx80_le_quiet(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5641 5642 5643
{
    flag aSign, bSign;

5644 5645 5646 5647
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return 0;
    }
B
bellard 已提交
5648
    if (    (    ( extractFloatx80Exp( a ) == 0x7FFF )
5649
              && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
B
bellard 已提交
5650
         || (    ( extractFloatx80Exp( b ) == 0x7FFF )
5651
              && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
B
bellard 已提交
5652
       ) {
5653 5654
        if (floatx80_is_signaling_nan(a, status)
         || floatx80_is_signaling_nan(b, status)) {
5655
            float_raise(float_flag_invalid, status);
B
bellard 已提交
5656 5657 5658 5659 5660 5661 5662 5663
        }
        return 0;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
5664
            || (    ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
5665 5666 5667 5668 5669 5670 5671 5672 5673 5674 5675 5676 5677 5678 5679
                 == 0 );
    }
    return
          aSign ? le128( b.high, b.low, a.high, a.low )
        : le128( a.high, a.low, b.high, b.low );

}

/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is less
| than the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause
| an exception.  Otherwise, the comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5680
int floatx80_lt_quiet(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5681 5682 5683
{
    flag aSign, bSign;

5684 5685 5686 5687
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return 0;
    }
B
bellard 已提交
5688
    if (    (    ( extractFloatx80Exp( a ) == 0x7FFF )
5689
              && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
B
bellard 已提交
5690
         || (    ( extractFloatx80Exp( b ) == 0x7FFF )
5691
              && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
B
bellard 已提交
5692
       ) {
5693 5694
        if (floatx80_is_signaling_nan(a, status)
         || floatx80_is_signaling_nan(b, status)) {
5695
            float_raise(float_flag_invalid, status);
B
bellard 已提交
5696 5697 5698 5699 5700 5701 5702 5703
        }
        return 0;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
5704
            && (    ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
5705 5706 5707 5708 5709 5710 5711 5712
                 != 0 );
    }
    return
          aSign ? lt128( b.high, b.low, a.high, a.low )
        : lt128( a.high, a.low, b.high, b.low );

}

5713 5714 5715 5716 5717 5718
/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point values `a' and `b'
| cannot be compared, and 0 otherwise.  Quiet NaNs do not cause an exception.
| The comparison is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
5719
int floatx80_unordered_quiet(floatx80 a, floatx80 b, float_status *status)
5720
{
5721 5722 5723 5724
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return 1;
    }
5725 5726 5727 5728 5729
    if (    (    ( extractFloatx80Exp( a ) == 0x7FFF )
              && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
         || (    ( extractFloatx80Exp( b ) == 0x7FFF )
              && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
       ) {
5730 5731
        if (floatx80_is_signaling_nan(a, status)
         || floatx80_is_signaling_nan(b, status)) {
5732
            float_raise(float_flag_invalid, status);
5733 5734 5735 5736 5737 5738
        }
        return 1;
    }
    return 0;
}

B
bellard 已提交
5739 5740 5741 5742 5743 5744 5745 5746 5747 5748
/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the 32-bit two's complement integer format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic---which means in particular that the conversion is rounded
| according to the current rounding mode.  If `a' is a NaN, the largest
| positive integer is returned.  Otherwise, if the conversion overflows, the
| largest integer with the same sign as `a' is returned.
*----------------------------------------------------------------------------*/

5749
int32_t float128_to_int32(float128 a, float_status *status)
B
bellard 已提交
5750 5751
{
    flag aSign;
5752
    int32_t aExp, shiftCount;
5753
    uint64_t aSig0, aSig1;
B
bellard 已提交
5754 5755 5756 5757 5758 5759 5760 5761 5762 5763

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) aSign = 0;
    if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
    aSig0 |= ( aSig1 != 0 );
    shiftCount = 0x4028 - aExp;
    if ( 0 < shiftCount ) shift64RightJamming( aSig0, shiftCount, &aSig0 );
5764
    return roundAndPackInt32(aSign, aSig0, status);
B
bellard 已提交
5765 5766 5767 5768 5769 5770 5771 5772 5773 5774 5775 5776 5777

}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the 32-bit two's complement integer format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic, except that the conversion is always rounded toward zero.  If
| `a' is a NaN, the largest positive integer is returned.  Otherwise, if the
| conversion overflows, the largest integer with the same sign as `a' is
| returned.
*----------------------------------------------------------------------------*/

5778
int32_t float128_to_int32_round_to_zero(float128 a, float_status *status)
B
bellard 已提交
5779 5780
{
    flag aSign;
5781
    int32_t aExp, shiftCount;
5782
    uint64_t aSig0, aSig1, savedASig;
5783
    int32_t z;
B
bellard 已提交
5784 5785 5786 5787 5788 5789 5790 5791 5792 5793 5794

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    aSig0 |= ( aSig1 != 0 );
    if ( 0x401E < aExp ) {
        if ( ( aExp == 0x7FFF ) && aSig0 ) aSign = 0;
        goto invalid;
    }
    else if ( aExp < 0x3FFF ) {
5795 5796 5797
        if (aExp || aSig0) {
            status->float_exception_flags |= float_flag_inexact;
        }
B
bellard 已提交
5798 5799 5800 5801 5802 5803 5804 5805 5806 5807
        return 0;
    }
    aSig0 |= LIT64( 0x0001000000000000 );
    shiftCount = 0x402F - aExp;
    savedASig = aSig0;
    aSig0 >>= shiftCount;
    z = aSig0;
    if ( aSign ) z = - z;
    if ( ( z < 0 ) ^ aSign ) {
 invalid:
5808
        float_raise(float_flag_invalid, status);
5809
        return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
B
bellard 已提交
5810 5811
    }
    if ( ( aSig0<<shiftCount ) != savedASig ) {
5812
        status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
5813 5814 5815 5816 5817 5818 5819 5820 5821 5822 5823 5824 5825 5826 5827
    }
    return z;

}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the 64-bit two's complement integer format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic---which means in particular that the conversion is rounded
| according to the current rounding mode.  If `a' is a NaN, the largest
| positive integer is returned.  Otherwise, if the conversion overflows, the
| largest integer with the same sign as `a' is returned.
*----------------------------------------------------------------------------*/

5828
int64_t float128_to_int64(float128 a, float_status *status)
B
bellard 已提交
5829 5830
{
    flag aSign;
5831
    int32_t aExp, shiftCount;
5832
    uint64_t aSig0, aSig1;
B
bellard 已提交
5833 5834 5835 5836 5837 5838 5839 5840 5841

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
    shiftCount = 0x402F - aExp;
    if ( shiftCount <= 0 ) {
        if ( 0x403E < aExp ) {
5842
            float_raise(float_flag_invalid, status);
B
bellard 已提交
5843 5844 5845 5846 5847 5848 5849
            if (    ! aSign
                 || (    ( aExp == 0x7FFF )
                      && ( aSig1 || ( aSig0 != LIT64( 0x0001000000000000 ) ) )
                    )
               ) {
                return LIT64( 0x7FFFFFFFFFFFFFFF );
            }
5850
            return (int64_t) LIT64( 0x8000000000000000 );
B
bellard 已提交
5851 5852 5853 5854 5855 5856
        }
        shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 );
    }
    else {
        shift64ExtraRightJamming( aSig0, aSig1, shiftCount, &aSig0, &aSig1 );
    }
5857
    return roundAndPackInt64(aSign, aSig0, aSig1, status);
B
bellard 已提交
5858 5859 5860 5861 5862 5863 5864 5865 5866 5867 5868 5869 5870

}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the 64-bit two's complement integer format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic, except that the conversion is always rounded toward zero.
| If `a' is a NaN, the largest positive integer is returned.  Otherwise, if
| the conversion overflows, the largest integer with the same sign as `a' is
| returned.
*----------------------------------------------------------------------------*/

5871
int64_t float128_to_int64_round_to_zero(float128 a, float_status *status)
B
bellard 已提交
5872 5873
{
    flag aSign;
5874
    int32_t aExp, shiftCount;
5875
    uint64_t aSig0, aSig1;
5876
    int64_t z;
B
bellard 已提交
5877 5878 5879 5880 5881 5882 5883 5884 5885 5886 5887 5888

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
    shiftCount = aExp - 0x402F;
    if ( 0 < shiftCount ) {
        if ( 0x403E <= aExp ) {
            aSig0 &= LIT64( 0x0000FFFFFFFFFFFF );
            if (    ( a.high == LIT64( 0xC03E000000000000 ) )
                 && ( aSig1 < LIT64( 0x0002000000000000 ) ) ) {
5889 5890 5891
                if (aSig1) {
                    status->float_exception_flags |= float_flag_inexact;
                }
B
bellard 已提交
5892 5893
            }
            else {
5894
                float_raise(float_flag_invalid, status);
B
bellard 已提交
5895 5896 5897 5898
                if ( ! aSign || ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) ) {
                    return LIT64( 0x7FFFFFFFFFFFFFFF );
                }
            }
5899
            return (int64_t) LIT64( 0x8000000000000000 );
B
bellard 已提交
5900 5901
        }
        z = ( aSig0<<shiftCount ) | ( aSig1>>( ( - shiftCount ) & 63 ) );
5902
        if ( (uint64_t) ( aSig1<<shiftCount ) ) {
5903
            status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
5904 5905 5906 5907 5908
        }
    }
    else {
        if ( aExp < 0x3FFF ) {
            if ( aExp | aSig0 | aSig1 ) {
5909
                status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
5910 5911 5912 5913 5914
            }
            return 0;
        }
        z = aSig0>>( - shiftCount );
        if (    aSig1
5915
             || ( shiftCount && (uint64_t) ( aSig0<<( shiftCount & 63 ) ) ) ) {
5916
            status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
5917 5918 5919 5920 5921 5922 5923
        }
    }
    if ( aSign ) z = - z;
    return z;

}

5924 5925 5926 5927 5928 5929 5930 5931 5932 5933 5934 5935 5936 5937 5938 5939 5940 5941 5942 5943 5944 5945 5946 5947 5948 5949 5950 5951 5952 5953 5954 5955 5956 5957 5958 5959 5960 5961 5962 5963 5964 5965 5966 5967 5968 5969 5970 5971 5972 5973 5974 5975 5976 5977 5978 5979 5980 5981 5982
/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point value
| `a' to the 64-bit unsigned integer format.  The conversion is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic---which means in particular that the conversion is rounded
| according to the current rounding mode.  If `a' is a NaN, the largest
| positive integer is returned.  If the conversion overflows, the
| largest unsigned integer is returned.  If 'a' is negative, the value is
| rounded and zero is returned; negative values that do not round to zero
| will raise the inexact exception.
*----------------------------------------------------------------------------*/

uint64_t float128_to_uint64(float128 a, float_status *status)
{
    flag aSign;
    int aExp;
    int shiftCount;
    uint64_t aSig0, aSig1;

    aSig0 = extractFloat128Frac0(a);
    aSig1 = extractFloat128Frac1(a);
    aExp = extractFloat128Exp(a);
    aSign = extractFloat128Sign(a);
    if (aSign && (aExp > 0x3FFE)) {
        float_raise(float_flag_invalid, status);
        if (float128_is_any_nan(a)) {
            return LIT64(0xFFFFFFFFFFFFFFFF);
        } else {
            return 0;
        }
    }
    if (aExp) {
        aSig0 |= LIT64(0x0001000000000000);
    }
    shiftCount = 0x402F - aExp;
    if (shiftCount <= 0) {
        if (0x403E < aExp) {
            float_raise(float_flag_invalid, status);
            return LIT64(0xFFFFFFFFFFFFFFFF);
        }
        shortShift128Left(aSig0, aSig1, -shiftCount, &aSig0, &aSig1);
    } else {
        shift64ExtraRightJamming(aSig0, aSig1, shiftCount, &aSig0, &aSig1);
    }
    return roundAndPackUint64(aSign, aSig0, aSig1, status);
}

uint64_t float128_to_uint64_round_to_zero(float128 a, float_status *status)
{
    uint64_t v;
    signed char current_rounding_mode = status->float_rounding_mode;

    set_float_rounding_mode(float_round_to_zero, status);
    v = float128_to_uint64(a, status);
    set_float_rounding_mode(current_rounding_mode, status);

    return v;
}

B
bellard 已提交
5983 5984
/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
5985 5986 5987 5988 5989 5990 5991 5992 5993 5994 5995 5996 5997 5998 5999 6000 6001 6002 6003 6004 6005 6006 6007 6008 6009 6010 6011 6012
| value `a' to the 32-bit unsigned integer format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic except that the conversion is always rounded toward zero.
| If `a' is a NaN, the largest positive integer is returned.  Otherwise,
| if the conversion overflows, the largest unsigned integer is returned.
| If 'a' is negative, the value is rounded and zero is returned; negative
| values that do not round to zero will raise the inexact exception.
*----------------------------------------------------------------------------*/

uint32_t float128_to_uint32_round_to_zero(float128 a, float_status *status)
{
    uint64_t v;
    uint32_t res;
    int old_exc_flags = get_float_exception_flags(status);

    v = float128_to_uint64_round_to_zero(a, status);
    if (v > 0xffffffff) {
        res = 0xffffffff;
    } else {
        return v;
    }
    set_float_exception_flags(old_exc_flags, status);
    float_raise(float_flag_invalid, status);
    return res;
}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
B
bellard 已提交
6013 6014 6015 6016 6017
| value `a' to the single-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

6018
float32 float128_to_float32(float128 a, float_status *status)
B
bellard 已提交
6019 6020
{
    flag aSign;
6021
    int32_t aExp;
6022 6023
    uint64_t aSig0, aSig1;
    uint32_t zSig;
B
bellard 已提交
6024 6025 6026 6027 6028 6029 6030

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
        if ( aSig0 | aSig1 ) {
6031
            return commonNaNToFloat32(float128ToCommonNaN(a, status), status);
B
bellard 已提交
6032 6033 6034 6035 6036 6037 6038 6039 6040 6041
        }
        return packFloat32( aSign, 0xFF, 0 );
    }
    aSig0 |= ( aSig1 != 0 );
    shift64RightJamming( aSig0, 18, &aSig0 );
    zSig = aSig0;
    if ( aExp || zSig ) {
        zSig |= 0x40000000;
        aExp -= 0x3F81;
    }
6042
    return roundAndPackFloat32(aSign, aExp, zSig, status);
B
bellard 已提交
6043 6044 6045 6046 6047 6048 6049 6050 6051 6052

}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the double-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

6053
float64 float128_to_float64(float128 a, float_status *status)
B
bellard 已提交
6054 6055
{
    flag aSign;
6056
    int32_t aExp;
6057
    uint64_t aSig0, aSig1;
B
bellard 已提交
6058 6059 6060 6061 6062 6063 6064

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
        if ( aSig0 | aSig1 ) {
6065
            return commonNaNToFloat64(float128ToCommonNaN(a, status), status);
B
bellard 已提交
6066 6067 6068 6069 6070 6071 6072 6073 6074
        }
        return packFloat64( aSign, 0x7FF, 0 );
    }
    shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );
    aSig0 |= ( aSig1 != 0 );
    if ( aExp || aSig0 ) {
        aSig0 |= LIT64( 0x4000000000000000 );
        aExp -= 0x3C01;
    }
6075
    return roundAndPackFloat64(aSign, aExp, aSig0, status);
B
bellard 已提交
6076 6077 6078 6079 6080 6081 6082 6083 6084 6085

}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the extended double-precision floating-point format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6086
floatx80 float128_to_floatx80(float128 a, float_status *status)
B
bellard 已提交
6087 6088
{
    flag aSign;
6089
    int32_t aExp;
6090
    uint64_t aSig0, aSig1;
B
bellard 已提交
6091 6092 6093 6094 6095 6096 6097

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
        if ( aSig0 | aSig1 ) {
6098
            return commonNaNToFloatx80(float128ToCommonNaN(a, status), status);
B
bellard 已提交
6099
        }
6100 6101
        return packFloatx80(aSign, floatx80_infinity_high,
                                   floatx80_infinity_low);
B
bellard 已提交
6102 6103 6104 6105 6106 6107 6108 6109 6110
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return packFloatx80( aSign, 0, 0 );
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    else {
        aSig0 |= LIT64( 0x0001000000000000 );
    }
    shortShift128Left( aSig0, aSig1, 15, &aSig0, &aSig1 );
6111
    return roundAndPackFloatx80(80, aSign, aExp, aSig0, aSig1, status);
B
bellard 已提交
6112 6113 6114 6115 6116 6117 6118 6119 6120 6121

}

/*----------------------------------------------------------------------------
| Rounds the quadruple-precision floating-point value `a' to an integer, and
| returns the result as a quadruple-precision floating-point value.  The
| operation is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6122
float128 float128_round_to_int(float128 a, float_status *status)
B
bellard 已提交
6123 6124
{
    flag aSign;
6125
    int32_t aExp;
6126
    uint64_t lastBitMask, roundBitsMask;
B
bellard 已提交
6127 6128 6129 6130 6131 6132 6133 6134
    float128 z;

    aExp = extractFloat128Exp( a );
    if ( 0x402F <= aExp ) {
        if ( 0x406F <= aExp ) {
            if (    ( aExp == 0x7FFF )
                 && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )
               ) {
6135
                return propagateFloat128NaN(a, a, status);
B
bellard 已提交
6136 6137 6138 6139 6140 6141 6142
            }
            return a;
        }
        lastBitMask = 1;
        lastBitMask = ( lastBitMask<<( 0x406E - aExp ) )<<1;
        roundBitsMask = lastBitMask - 1;
        z = a;
6143
        switch (status->float_rounding_mode) {
6144
        case float_round_nearest_even:
B
bellard 已提交
6145 6146 6147 6148 6149
            if ( lastBitMask ) {
                add128( z.high, z.low, 0, lastBitMask>>1, &z.high, &z.low );
                if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask;
            }
            else {
6150
                if ( (int64_t) z.low < 0 ) {
B
bellard 已提交
6151
                    ++z.high;
6152
                    if ( (uint64_t) ( z.low<<1 ) == 0 ) z.high &= ~1;
B
bellard 已提交
6153 6154
                }
            }
6155
            break;
6156 6157 6158 6159 6160 6161 6162 6163 6164
        case float_round_ties_away:
            if (lastBitMask) {
                add128(z.high, z.low, 0, lastBitMask >> 1, &z.high, &z.low);
            } else {
                if ((int64_t) z.low < 0) {
                    ++z.high;
                }
            }
            break;
6165 6166 6167 6168 6169 6170 6171 6172 6173 6174
        case float_round_to_zero:
            break;
        case float_round_up:
            if (!extractFloat128Sign(z)) {
                add128(z.high, z.low, 0, roundBitsMask, &z.high, &z.low);
            }
            break;
        case float_round_down:
            if (extractFloat128Sign(z)) {
                add128(z.high, z.low, 0, roundBitsMask, &z.high, &z.low);
B
bellard 已提交
6175
            }
6176 6177 6178
            break;
        default:
            abort();
B
bellard 已提交
6179 6180 6181 6182 6183
        }
        z.low &= ~ roundBitsMask;
    }
    else {
        if ( aExp < 0x3FFF ) {
6184
            if ( ( ( (uint64_t) ( a.high<<1 ) ) | a.low ) == 0 ) return a;
6185
            status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
6186
            aSign = extractFloat128Sign( a );
6187
            switch (status->float_rounding_mode) {
B
bellard 已提交
6188 6189 6190 6191 6192 6193 6194 6195
             case float_round_nearest_even:
                if (    ( aExp == 0x3FFE )
                     && (   extractFloat128Frac0( a )
                          | extractFloat128Frac1( a ) )
                   ) {
                    return packFloat128( aSign, 0x3FFF, 0, 0 );
                }
                break;
6196 6197 6198 6199 6200
            case float_round_ties_away:
                if (aExp == 0x3FFE) {
                    return packFloat128(aSign, 0x3FFF, 0, 0);
                }
                break;
B
bellard 已提交
6201 6202 6203 6204 6205 6206 6207 6208 6209 6210 6211 6212 6213 6214 6215 6216
             case float_round_down:
                return
                      aSign ? packFloat128( 1, 0x3FFF, 0, 0 )
                    : packFloat128( 0, 0, 0, 0 );
             case float_round_up:
                return
                      aSign ? packFloat128( 1, 0, 0, 0 )
                    : packFloat128( 0, 0x3FFF, 0, 0 );
            }
            return packFloat128( aSign, 0, 0, 0 );
        }
        lastBitMask = 1;
        lastBitMask <<= 0x402F - aExp;
        roundBitsMask = lastBitMask - 1;
        z.low = 0;
        z.high = a.high;
6217
        switch (status->float_rounding_mode) {
6218
        case float_round_nearest_even:
B
bellard 已提交
6219 6220 6221 6222
            z.high += lastBitMask>>1;
            if ( ( ( z.high & roundBitsMask ) | a.low ) == 0 ) {
                z.high &= ~ lastBitMask;
            }
6223
            break;
6224 6225 6226
        case float_round_ties_away:
            z.high += lastBitMask>>1;
            break;
6227 6228 6229 6230
        case float_round_to_zero:
            break;
        case float_round_up:
            if (!extractFloat128Sign(z)) {
B
bellard 已提交
6231 6232 6233
                z.high |= ( a.low != 0 );
                z.high += roundBitsMask;
            }
6234 6235 6236 6237 6238 6239 6240 6241 6242
            break;
        case float_round_down:
            if (extractFloat128Sign(z)) {
                z.high |= (a.low != 0);
                z.high += roundBitsMask;
            }
            break;
        default:
            abort();
B
bellard 已提交
6243 6244 6245 6246
        }
        z.high &= ~ roundBitsMask;
    }
    if ( ( z.low != a.low ) || ( z.high != a.high ) ) {
6247
        status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
6248 6249 6250 6251 6252 6253 6254 6255 6256 6257 6258 6259 6260
    }
    return z;

}

/*----------------------------------------------------------------------------
| Returns the result of adding the absolute values of the quadruple-precision
| floating-point values `a' and `b'.  If `zSign' is 1, the sum is negated
| before being returned.  `zSign' is ignored if the result is a NaN.
| The addition is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6261 6262
static float128 addFloat128Sigs(float128 a, float128 b, flag zSign,
                                float_status *status)
B
bellard 已提交
6263
{
6264
    int32_t aExp, bExp, zExp;
6265
    uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
6266
    int32_t expDiff;
B
bellard 已提交
6267 6268 6269 6270 6271 6272 6273 6274 6275 6276

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    bSig1 = extractFloat128Frac1( b );
    bSig0 = extractFloat128Frac0( b );
    bExp = extractFloat128Exp( b );
    expDiff = aExp - bExp;
    if ( 0 < expDiff ) {
        if ( aExp == 0x7FFF ) {
6277 6278 6279
            if (aSig0 | aSig1) {
                return propagateFloat128NaN(a, b, status);
            }
B
bellard 已提交
6280 6281 6282 6283 6284 6285 6286 6287 6288 6289 6290 6291 6292 6293
            return a;
        }
        if ( bExp == 0 ) {
            --expDiff;
        }
        else {
            bSig0 |= LIT64( 0x0001000000000000 );
        }
        shift128ExtraRightJamming(
            bSig0, bSig1, 0, expDiff, &bSig0, &bSig1, &zSig2 );
        zExp = aExp;
    }
    else if ( expDiff < 0 ) {
        if ( bExp == 0x7FFF ) {
6294 6295 6296
            if (bSig0 | bSig1) {
                return propagateFloat128NaN(a, b, status);
            }
B
bellard 已提交
6297 6298 6299 6300 6301 6302 6303 6304 6305 6306 6307 6308 6309 6310 6311
            return packFloat128( zSign, 0x7FFF, 0, 0 );
        }
        if ( aExp == 0 ) {
            ++expDiff;
        }
        else {
            aSig0 |= LIT64( 0x0001000000000000 );
        }
        shift128ExtraRightJamming(
            aSig0, aSig1, 0, - expDiff, &aSig0, &aSig1, &zSig2 );
        zExp = bExp;
    }
    else {
        if ( aExp == 0x7FFF ) {
            if ( aSig0 | aSig1 | bSig0 | bSig1 ) {
6312
                return propagateFloat128NaN(a, b, status);
B
bellard 已提交
6313 6314 6315 6316
            }
            return a;
        }
        add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
6317
        if ( aExp == 0 ) {
6318
            if (status->flush_to_zero) {
6319
                if (zSig0 | zSig1) {
6320
                    float_raise(float_flag_output_denormal, status);
6321 6322 6323
                }
                return packFloat128(zSign, 0, 0, 0);
            }
6324 6325
            return packFloat128( zSign, 0, zSig0, zSig1 );
        }
B
bellard 已提交
6326 6327 6328 6329 6330 6331 6332 6333 6334 6335 6336 6337 6338 6339
        zSig2 = 0;
        zSig0 |= LIT64( 0x0002000000000000 );
        zExp = aExp;
        goto shiftRight1;
    }
    aSig0 |= LIT64( 0x0001000000000000 );
    add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
    --zExp;
    if ( zSig0 < LIT64( 0x0002000000000000 ) ) goto roundAndPack;
    ++zExp;
 shiftRight1:
    shift128ExtraRightJamming(
        zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );
 roundAndPack:
6340
    return roundAndPackFloat128(zSign, zExp, zSig0, zSig1, zSig2, status);
B
bellard 已提交
6341 6342 6343 6344 6345 6346 6347 6348 6349 6350 6351

}

/*----------------------------------------------------------------------------
| Returns the result of subtracting the absolute values of the quadruple-
| precision floating-point values `a' and `b'.  If `zSign' is 1, the
| difference is negated before being returned.  `zSign' is ignored if the
| result is a NaN.  The subtraction is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6352 6353
static float128 subFloat128Sigs(float128 a, float128 b, flag zSign,
                                float_status *status)
B
bellard 已提交
6354
{
6355
    int32_t aExp, bExp, zExp;
6356
    uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;
6357
    int32_t expDiff;
B
bellard 已提交
6358 6359 6360 6361 6362 6363 6364 6365 6366 6367 6368 6369 6370 6371

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    bSig1 = extractFloat128Frac1( b );
    bSig0 = extractFloat128Frac0( b );
    bExp = extractFloat128Exp( b );
    expDiff = aExp - bExp;
    shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );
    shortShift128Left( bSig0, bSig1, 14, &bSig0, &bSig1 );
    if ( 0 < expDiff ) goto aExpBigger;
    if ( expDiff < 0 ) goto bExpBigger;
    if ( aExp == 0x7FFF ) {
        if ( aSig0 | aSig1 | bSig0 | bSig1 ) {
6372
            return propagateFloat128NaN(a, b, status);
B
bellard 已提交
6373
        }
6374
        float_raise(float_flag_invalid, status);
6375
        return float128_default_nan(status);
B
bellard 已提交
6376 6377 6378 6379 6380 6381 6382 6383 6384
    }
    if ( aExp == 0 ) {
        aExp = 1;
        bExp = 1;
    }
    if ( bSig0 < aSig0 ) goto aBigger;
    if ( aSig0 < bSig0 ) goto bBigger;
    if ( bSig1 < aSig1 ) goto aBigger;
    if ( aSig1 < bSig1 ) goto bBigger;
6385 6386
    return packFloat128(status->float_rounding_mode == float_round_down,
                        0, 0, 0);
B
bellard 已提交
6387 6388
 bExpBigger:
    if ( bExp == 0x7FFF ) {
6389 6390 6391
        if (bSig0 | bSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6392 6393 6394 6395 6396 6397 6398 6399 6400 6401 6402 6403 6404 6405 6406 6407 6408
        return packFloat128( zSign ^ 1, 0x7FFF, 0, 0 );
    }
    if ( aExp == 0 ) {
        ++expDiff;
    }
    else {
        aSig0 |= LIT64( 0x4000000000000000 );
    }
    shift128RightJamming( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );
    bSig0 |= LIT64( 0x4000000000000000 );
 bBigger:
    sub128( bSig0, bSig1, aSig0, aSig1, &zSig0, &zSig1 );
    zExp = bExp;
    zSign ^= 1;
    goto normalizeRoundAndPack;
 aExpBigger:
    if ( aExp == 0x7FFF ) {
6409 6410 6411
        if (aSig0 | aSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6412 6413 6414 6415 6416 6417 6418 6419 6420 6421 6422 6423 6424 6425 6426
        return a;
    }
    if ( bExp == 0 ) {
        --expDiff;
    }
    else {
        bSig0 |= LIT64( 0x4000000000000000 );
    }
    shift128RightJamming( bSig0, bSig1, expDiff, &bSig0, &bSig1 );
    aSig0 |= LIT64( 0x4000000000000000 );
 aBigger:
    sub128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
    zExp = aExp;
 normalizeRoundAndPack:
    --zExp;
6427 6428
    return normalizeRoundAndPackFloat128(zSign, zExp - 14, zSig0, zSig1,
                                         status);
B
bellard 已提交
6429 6430 6431 6432 6433 6434 6435 6436 6437

}

/*----------------------------------------------------------------------------
| Returns the result of adding the quadruple-precision floating-point values
| `a' and `b'.  The operation is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6438
float128 float128_add(float128 a, float128 b, float_status *status)
B
bellard 已提交
6439 6440 6441 6442 6443 6444
{
    flag aSign, bSign;

    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign == bSign ) {
6445
        return addFloat128Sigs(a, b, aSign, status);
B
bellard 已提交
6446 6447
    }
    else {
6448
        return subFloat128Sigs(a, b, aSign, status);
B
bellard 已提交
6449 6450 6451 6452 6453 6454 6455 6456 6457 6458
    }

}

/*----------------------------------------------------------------------------
| Returns the result of subtracting the quadruple-precision floating-point
| values `a' and `b'.  The operation is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6459
float128 float128_sub(float128 a, float128 b, float_status *status)
B
bellard 已提交
6460 6461 6462 6463 6464 6465
{
    flag aSign, bSign;

    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign == bSign ) {
6466
        return subFloat128Sigs(a, b, aSign, status);
B
bellard 已提交
6467 6468
    }
    else {
6469
        return addFloat128Sigs(a, b, aSign, status);
B
bellard 已提交
6470 6471 6472 6473 6474 6475 6476 6477 6478 6479
    }

}

/*----------------------------------------------------------------------------
| Returns the result of multiplying the quadruple-precision floating-point
| values `a' and `b'.  The operation is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6480
float128 float128_mul(float128 a, float128 b, float_status *status)
B
bellard 已提交
6481 6482
{
    flag aSign, bSign, zSign;
6483
    int32_t aExp, bExp, zExp;
6484
    uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;
B
bellard 已提交
6485 6486 6487 6488 6489 6490 6491 6492 6493 6494 6495 6496 6497

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    bSig1 = extractFloat128Frac1( b );
    bSig0 = extractFloat128Frac0( b );
    bExp = extractFloat128Exp( b );
    bSign = extractFloat128Sign( b );
    zSign = aSign ^ bSign;
    if ( aExp == 0x7FFF ) {
        if (    ( aSig0 | aSig1 )
             || ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {
6498
            return propagateFloat128NaN(a, b, status);
B
bellard 已提交
6499 6500 6501 6502 6503
        }
        if ( ( bExp | bSig0 | bSig1 ) == 0 ) goto invalid;
        return packFloat128( zSign, 0x7FFF, 0, 0 );
    }
    if ( bExp == 0x7FFF ) {
6504 6505 6506
        if (bSig0 | bSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6507 6508
        if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
 invalid:
6509
            float_raise(float_flag_invalid, status);
6510
            return float128_default_nan(status);
B
bellard 已提交
6511 6512 6513 6514 6515 6516 6517 6518 6519 6520 6521 6522 6523 6524 6525 6526 6527 6528 6529 6530 6531 6532
        }
        return packFloat128( zSign, 0x7FFF, 0, 0 );
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    if ( bExp == 0 ) {
        if ( ( bSig0 | bSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
        normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
    }
    zExp = aExp + bExp - 0x4000;
    aSig0 |= LIT64( 0x0001000000000000 );
    shortShift128Left( bSig0, bSig1, 16, &bSig0, &bSig1 );
    mul128To256( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1, &zSig2, &zSig3 );
    add128( zSig0, zSig1, aSig0, aSig1, &zSig0, &zSig1 );
    zSig2 |= ( zSig3 != 0 );
    if ( LIT64( 0x0002000000000000 ) <= zSig0 ) {
        shift128ExtraRightJamming(
            zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );
        ++zExp;
    }
6533
    return roundAndPackFloat128(zSign, zExp, zSig0, zSig1, zSig2, status);
B
bellard 已提交
6534 6535 6536 6537 6538 6539 6540 6541 6542

}

/*----------------------------------------------------------------------------
| Returns the result of dividing the quadruple-precision floating-point value
| `a' by the corresponding value `b'.  The operation is performed according to
| the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6543
float128 float128_div(float128 a, float128 b, float_status *status)
B
bellard 已提交
6544 6545
{
    flag aSign, bSign, zSign;
6546
    int32_t aExp, bExp, zExp;
6547 6548
    uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
    uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
B
bellard 已提交
6549 6550 6551 6552 6553 6554 6555 6556 6557 6558 6559

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    bSig1 = extractFloat128Frac1( b );
    bSig0 = extractFloat128Frac0( b );
    bExp = extractFloat128Exp( b );
    bSign = extractFloat128Sign( b );
    zSign = aSign ^ bSign;
    if ( aExp == 0x7FFF ) {
6560 6561 6562
        if (aSig0 | aSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6563
        if ( bExp == 0x7FFF ) {
6564 6565 6566
            if (bSig0 | bSig1) {
                return propagateFloat128NaN(a, b, status);
            }
B
bellard 已提交
6567 6568 6569 6570 6571
            goto invalid;
        }
        return packFloat128( zSign, 0x7FFF, 0, 0 );
    }
    if ( bExp == 0x7FFF ) {
6572 6573 6574
        if (bSig0 | bSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6575 6576 6577 6578 6579 6580
        return packFloat128( zSign, 0, 0, 0 );
    }
    if ( bExp == 0 ) {
        if ( ( bSig0 | bSig1 ) == 0 ) {
            if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
 invalid:
6581
                float_raise(float_flag_invalid, status);
6582
                return float128_default_nan(status);
B
bellard 已提交
6583
            }
6584
            float_raise(float_flag_divbyzero, status);
B
bellard 已提交
6585 6586 6587 6588 6589 6590 6591 6592 6593 6594 6595 6596 6597 6598 6599 6600 6601 6602 6603 6604
            return packFloat128( zSign, 0x7FFF, 0, 0 );
        }
        normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    zExp = aExp - bExp + 0x3FFD;
    shortShift128Left(
        aSig0 | LIT64( 0x0001000000000000 ), aSig1, 15, &aSig0, &aSig1 );
    shortShift128Left(
        bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );
    if ( le128( bSig0, bSig1, aSig0, aSig1 ) ) {
        shift128Right( aSig0, aSig1, 1, &aSig0, &aSig1 );
        ++zExp;
    }
    zSig0 = estimateDiv128To64( aSig0, aSig1, bSig0 );
    mul128By64To192( bSig0, bSig1, zSig0, &term0, &term1, &term2 );
    sub192( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 );
6605
    while ( (int64_t) rem0 < 0 ) {
B
bellard 已提交
6606 6607 6608 6609 6610 6611 6612
        --zSig0;
        add192( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 );
    }
    zSig1 = estimateDiv128To64( rem1, rem2, bSig0 );
    if ( ( zSig1 & 0x3FFF ) <= 4 ) {
        mul128By64To192( bSig0, bSig1, zSig1, &term1, &term2, &term3 );
        sub192( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 );
6613
        while ( (int64_t) rem1 < 0 ) {
B
bellard 已提交
6614 6615 6616 6617 6618 6619
            --zSig1;
            add192( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 );
        }
        zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
    }
    shift128ExtraRightJamming( zSig0, zSig1, 0, 15, &zSig0, &zSig1, &zSig2 );
6620
    return roundAndPackFloat128(zSign, zExp, zSig0, zSig1, zSig2, status);
B
bellard 已提交
6621 6622 6623 6624 6625 6626 6627 6628 6629

}

/*----------------------------------------------------------------------------
| Returns the remainder of the quadruple-precision floating-point value `a'
| with respect to the corresponding value `b'.  The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6630
float128 float128_rem(float128 a, float128 b, float_status *status)
B
bellard 已提交
6631
{
6632
    flag aSign, zSign;
6633
    int32_t aExp, bExp, expDiff;
6634 6635 6636
    uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;
    uint64_t allZero, alternateASig0, alternateASig1, sigMean1;
    int64_t sigMean0;
B
bellard 已提交
6637 6638 6639 6640 6641 6642 6643 6644 6645 6646 6647

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    bSig1 = extractFloat128Frac1( b );
    bSig0 = extractFloat128Frac0( b );
    bExp = extractFloat128Exp( b );
    if ( aExp == 0x7FFF ) {
        if (    ( aSig0 | aSig1 )
             || ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {
6648
            return propagateFloat128NaN(a, b, status);
B
bellard 已提交
6649 6650 6651 6652
        }
        goto invalid;
    }
    if ( bExp == 0x7FFF ) {
6653 6654 6655
        if (bSig0 | bSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6656 6657 6658 6659 6660
        return a;
    }
    if ( bExp == 0 ) {
        if ( ( bSig0 | bSig1 ) == 0 ) {
 invalid:
6661
            float_raise(float_flag_invalid, status);
6662
            return float128_default_nan(status);
B
bellard 已提交
6663 6664 6665 6666 6667 6668 6669 6670 6671 6672 6673 6674 6675 6676 6677 6678 6679 6680 6681 6682 6683 6684 6685 6686 6687 6688 6689 6690 6691 6692 6693 6694 6695 6696 6697 6698 6699 6700 6701 6702 6703 6704 6705 6706 6707 6708 6709 6710 6711 6712 6713 6714 6715 6716
        }
        normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return a;
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    expDiff = aExp - bExp;
    if ( expDiff < -1 ) return a;
    shortShift128Left(
        aSig0 | LIT64( 0x0001000000000000 ),
        aSig1,
        15 - ( expDiff < 0 ),
        &aSig0,
        &aSig1
    );
    shortShift128Left(
        bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );
    q = le128( bSig0, bSig1, aSig0, aSig1 );
    if ( q ) sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
    expDiff -= 64;
    while ( 0 < expDiff ) {
        q = estimateDiv128To64( aSig0, aSig1, bSig0 );
        q = ( 4 < q ) ? q - 4 : 0;
        mul128By64To192( bSig0, bSig1, q, &term0, &term1, &term2 );
        shortShift192Left( term0, term1, term2, 61, &term1, &term2, &allZero );
        shortShift128Left( aSig0, aSig1, 61, &aSig0, &allZero );
        sub128( aSig0, 0, term1, term2, &aSig0, &aSig1 );
        expDiff -= 61;
    }
    if ( -64 < expDiff ) {
        q = estimateDiv128To64( aSig0, aSig1, bSig0 );
        q = ( 4 < q ) ? q - 4 : 0;
        q >>= - expDiff;
        shift128Right( bSig0, bSig1, 12, &bSig0, &bSig1 );
        expDiff += 52;
        if ( expDiff < 0 ) {
            shift128Right( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );
        }
        else {
            shortShift128Left( aSig0, aSig1, expDiff, &aSig0, &aSig1 );
        }
        mul128By64To192( bSig0, bSig1, q, &term0, &term1, &term2 );
        sub128( aSig0, aSig1, term1, term2, &aSig0, &aSig1 );
    }
    else {
        shift128Right( aSig0, aSig1, 12, &aSig0, &aSig1 );
        shift128Right( bSig0, bSig1, 12, &bSig0, &bSig1 );
    }
    do {
        alternateASig0 = aSig0;
        alternateASig1 = aSig1;
        ++q;
        sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
6717
    } while ( 0 <= (int64_t) aSig0 );
B
bellard 已提交
6718
    add128(
6719
        aSig0, aSig1, alternateASig0, alternateASig1, (uint64_t *)&sigMean0, &sigMean1 );
B
bellard 已提交
6720 6721 6722 6723 6724
    if (    ( sigMean0 < 0 )
         || ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) {
        aSig0 = alternateASig0;
        aSig1 = alternateASig1;
    }
6725
    zSign = ( (int64_t) aSig0 < 0 );
B
bellard 已提交
6726
    if ( zSign ) sub128( 0, 0, aSig0, aSig1, &aSig0, &aSig1 );
6727 6728
    return normalizeRoundAndPackFloat128(aSign ^ zSign, bExp - 4, aSig0, aSig1,
                                         status);
B
bellard 已提交
6729 6730 6731 6732 6733 6734 6735 6736
}

/*----------------------------------------------------------------------------
| Returns the square root of the quadruple-precision floating-point value `a'.
| The operation is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6737
float128 float128_sqrt(float128 a, float_status *status)
B
bellard 已提交
6738 6739
{
    flag aSign;
6740
    int32_t aExp, zExp;
6741 6742
    uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;
    uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
B
bellard 已提交
6743 6744 6745 6746 6747 6748

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
6749 6750 6751
        if (aSig0 | aSig1) {
            return propagateFloat128NaN(a, a, status);
        }
B
bellard 已提交
6752 6753 6754 6755 6756 6757
        if ( ! aSign ) return a;
        goto invalid;
    }
    if ( aSign ) {
        if ( ( aExp | aSig0 | aSig1 ) == 0 ) return a;
 invalid:
6758
        float_raise(float_flag_invalid, status);
6759
        return float128_default_nan(status);
B
bellard 已提交
6760 6761 6762 6763 6764 6765 6766 6767 6768 6769 6770 6771 6772
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( 0, 0, 0, 0 );
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFE;
    aSig0 |= LIT64( 0x0001000000000000 );
    zSig0 = estimateSqrt32( aExp, aSig0>>17 );
    shortShift128Left( aSig0, aSig1, 13 - ( aExp & 1 ), &aSig0, &aSig1 );
    zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );
    doubleZSig0 = zSig0<<1;
    mul64To128( zSig0, zSig0, &term0, &term1 );
    sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
6773
    while ( (int64_t) rem0 < 0 ) {
B
bellard 已提交
6774 6775 6776 6777 6778 6779 6780 6781 6782 6783 6784
        --zSig0;
        doubleZSig0 -= 2;
        add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
    }
    zSig1 = estimateDiv128To64( rem1, 0, doubleZSig0 );
    if ( ( zSig1 & 0x1FFF ) <= 5 ) {
        if ( zSig1 == 0 ) zSig1 = 1;
        mul64To128( doubleZSig0, zSig1, &term1, &term2 );
        sub128( rem1, 0, term1, term2, &rem1, &rem2 );
        mul64To128( zSig1, zSig1, &term2, &term3 );
        sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
6785
        while ( (int64_t) rem1 < 0 ) {
B
bellard 已提交
6786 6787 6788 6789 6790 6791 6792 6793 6794
            --zSig1;
            shortShift128Left( 0, zSig1, 1, &term2, &term3 );
            term3 |= 1;
            term2 |= doubleZSig0;
            add192( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );
        }
        zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
    }
    shift128ExtraRightJamming( zSig0, zSig1, 0, 14, &zSig0, &zSig1, &zSig2 );
6795
    return roundAndPackFloat128(0, zExp, zSig0, zSig1, zSig2, status);
B
bellard 已提交
6796 6797 6798 6799 6800

}

/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is equal to
6801 6802
| the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  Otherwise, the comparison is performed
B
bellard 已提交
6803 6804 6805
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6806
int float128_eq(float128 a, float128 b, float_status *status)
B
bellard 已提交
6807 6808 6809 6810 6811 6812 6813
{

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6814
        float_raise(float_flag_invalid, status);
B
bellard 已提交
6815 6816 6817 6818 6819 6820
        return 0;
    }
    return
           ( a.low == b.low )
        && (    ( a.high == b.high )
             || (    ( a.low == 0 )
6821
                  && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
B
bellard 已提交
6822 6823 6824 6825 6826 6827
           );

}

/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is less than
6828 6829 6830
| or equal to the corresponding value `b', and 0 otherwise.  The invalid
| exception is raised if either operand is a NaN.  The comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
6831 6832
*----------------------------------------------------------------------------*/

6833
int float128_le(float128 a, float128 b, float_status *status)
B
bellard 已提交
6834 6835 6836 6837 6838 6839 6840 6841
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6842
        float_raise(float_flag_invalid, status);
B
bellard 已提交
6843 6844 6845 6846 6847 6848 6849
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
6850
            || (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
6851 6852 6853 6854 6855 6856 6857 6858 6859 6860
                 == 0 );
    }
    return
          aSign ? le128( b.high, b.low, a.high, a.low )
        : le128( a.high, a.low, b.high, b.low );

}

/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is less than
6861 6862 6863
| the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  The comparison is performed according
| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
6864 6865
*----------------------------------------------------------------------------*/

6866
int float128_lt(float128 a, float128 b, float_status *status)
B
bellard 已提交
6867 6868 6869 6870 6871 6872 6873 6874
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6875
        float_raise(float_flag_invalid, status);
B
bellard 已提交
6876 6877 6878 6879 6880 6881 6882
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
6883
            && (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
6884 6885 6886 6887 6888 6889 6890 6891
                 != 0 );
    }
    return
          aSign ? lt128( b.high, b.low, a.high, a.low )
        : lt128( a.high, a.low, b.high, b.low );

}

6892 6893
/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point values `a' and `b' cannot
6894 6895 6896
| be compared, and 0 otherwise.  The invalid exception is raised if either
| operand is a NaN. The comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
6897 6898
*----------------------------------------------------------------------------*/

6899
int float128_unordered(float128 a, float128 b, float_status *status)
6900 6901 6902 6903 6904 6905
{
    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6906
        float_raise(float_flag_invalid, status);
6907 6908 6909 6910 6911
        return 1;
    }
    return 0;
}

B
bellard 已提交
6912 6913
/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is equal to
6914 6915 6916
| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.  The comparison is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
B
bellard 已提交
6917 6918
*----------------------------------------------------------------------------*/

6919
int float128_eq_quiet(float128 a, float128 b, float_status *status)
B
bellard 已提交
6920 6921 6922 6923 6924 6925 6926
{

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6927 6928
        if (float128_is_signaling_nan(a, status)
         || float128_is_signaling_nan(b, status)) {
6929
            float_raise(float_flag_invalid, status);
6930
        }
B
bellard 已提交
6931 6932 6933 6934 6935 6936
        return 0;
    }
    return
           ( a.low == b.low )
        && (    ( a.high == b.high )
             || (    ( a.low == 0 )
6937
                  && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
B
bellard 已提交
6938 6939 6940 6941 6942 6943 6944 6945 6946 6947 6948
           );

}

/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is less than
| or equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs do not
| cause an exception.  Otherwise, the comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6949
int float128_le_quiet(float128 a, float128 b, float_status *status)
B
bellard 已提交
6950 6951 6952 6953 6954 6955 6956 6957
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6958 6959
        if (float128_is_signaling_nan(a, status)
         || float128_is_signaling_nan(b, status)) {
6960
            float_raise(float_flag_invalid, status);
B
bellard 已提交
6961 6962 6963 6964 6965 6966 6967 6968
        }
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
6969
            || (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
6970 6971 6972 6973 6974 6975 6976 6977 6978 6979 6980 6981 6982 6983 6984
                 == 0 );
    }
    return
          aSign ? le128( b.high, b.low, a.high, a.low )
        : le128( a.high, a.low, b.high, b.low );

}

/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is less than
| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.  Otherwise, the comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6985
int float128_lt_quiet(float128 a, float128 b, float_status *status)
B
bellard 已提交
6986 6987 6988 6989 6990 6991 6992 6993
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6994 6995
        if (float128_is_signaling_nan(a, status)
         || float128_is_signaling_nan(b, status)) {
6996
            float_raise(float_flag_invalid, status);
B
bellard 已提交
6997 6998 6999 7000 7001 7002 7003 7004
        }
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
7005
            && (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
7006 7007 7008 7009 7010 7011 7012 7013
                 != 0 );
    }
    return
          aSign ? lt128( b.high, b.low, a.high, a.low )
        : lt128( a.high, a.low, b.high, b.low );

}

7014 7015 7016 7017 7018 7019 7020
/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point values `a' and `b' cannot
| be compared, and 0 otherwise.  Quiet NaNs do not cause an exception.  The
| comparison is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

7021
int float128_unordered_quiet(float128 a, float128 b, float_status *status)
7022 7023 7024 7025 7026 7027
{
    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
7028 7029
        if (float128_is_signaling_nan(a, status)
         || float128_is_signaling_nan(b, status)) {
7030
            float_raise(float_flag_invalid, status);
7031 7032 7033 7034 7035 7036
        }
        return 1;
    }
    return 0;
}

7037 7038
static inline int floatx80_compare_internal(floatx80 a, floatx80 b,
                                            int is_quiet, float_status *status)
7039 7040 7041
{
    flag aSign, bSign;

7042 7043 7044 7045
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return float_relation_unordered;
    }
7046 7047 7048 7049 7050
    if (( ( extractFloatx80Exp( a ) == 0x7fff ) &&
          ( extractFloatx80Frac( a )<<1 ) ) ||
        ( ( extractFloatx80Exp( b ) == 0x7fff ) &&
          ( extractFloatx80Frac( b )<<1 ) )) {
        if (!is_quiet ||
7051 7052
            floatx80_is_signaling_nan(a, status) ||
            floatx80_is_signaling_nan(b, status)) {
7053
            float_raise(float_flag_invalid, status);
7054 7055 7056 7057 7058 7059 7060 7061 7062 7063 7064 7065 7066 7067 7068 7069 7070 7071 7072 7073 7074 7075 7076
        }
        return float_relation_unordered;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {

        if ( ( ( (uint16_t) ( ( a.high | b.high ) << 1 ) ) == 0) &&
             ( ( a.low | b.low ) == 0 ) ) {
            /* zero case */
            return float_relation_equal;
        } else {
            return 1 - (2 * aSign);
        }
    } else {
        if (a.low == b.low && a.high == b.high) {
            return float_relation_equal;
        } else {
            return 1 - 2 * (aSign ^ ( lt128( a.high, a.low, b.high, b.low ) ));
        }
    }
}

7077
int floatx80_compare(floatx80 a, floatx80 b, float_status *status)
7078
{
7079
    return floatx80_compare_internal(a, b, 0, status);
7080 7081
}

7082
int floatx80_compare_quiet(floatx80 a, floatx80 b, float_status *status)
7083
{
7084
    return floatx80_compare_internal(a, b, 1, status);
7085 7086
}

7087 7088
static inline int float128_compare_internal(float128 a, float128 b,
                                            int is_quiet, float_status *status)
7089 7090 7091 7092 7093 7094 7095 7096
{
    flag aSign, bSign;

    if (( ( extractFloat128Exp( a ) == 0x7fff ) &&
          ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) ) ||
        ( ( extractFloat128Exp( b ) == 0x7fff ) &&
          ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )) {
        if (!is_quiet ||
7097 7098
            float128_is_signaling_nan(a, status) ||
            float128_is_signaling_nan(b, status)) {
7099
            float_raise(float_flag_invalid, status);
7100 7101 7102 7103 7104 7105 7106 7107 7108 7109 7110 7111 7112 7113 7114 7115 7116 7117 7118 7119 7120
        }
        return float_relation_unordered;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        if ( ( ( ( a.high | b.high )<<1 ) | a.low | b.low ) == 0 ) {
            /* zero case */
            return float_relation_equal;
        } else {
            return 1 - (2 * aSign);
        }
    } else {
        if (a.low == b.low && a.high == b.high) {
            return float_relation_equal;
        } else {
            return 1 - 2 * (aSign ^ ( lt128( a.high, a.low, b.high, b.low ) ));
        }
    }
}

7121
int float128_compare(float128 a, float128 b, float_status *status)
7122
{
7123
    return float128_compare_internal(a, b, 0, status);
7124 7125
}

7126
int float128_compare_quiet(float128 a, float128 b, float_status *status)
7127
{
7128
    return float128_compare_internal(a, b, 1, status);
7129 7130
}

7131
floatx80 floatx80_scalbn(floatx80 a, int n, float_status *status)
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7132 7133
{
    flag aSign;
7134
    int32_t aExp;
7135
    uint64_t aSig;
P
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7136

7137 7138 7139 7140
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
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7141 7142 7143 7144
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );

7145 7146
    if ( aExp == 0x7FFF ) {
        if ( aSig<<1 ) {
7147
            return propagateFloatx80NaN(a, a, status);
7148
        }
P
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7149 7150
        return a;
    }
7151

7152 7153 7154 7155 7156 7157
    if (aExp == 0) {
        if (aSig == 0) {
            return a;
        }
        aExp++;
    }
7158

7159 7160 7161 7162 7163 7164
    if (n > 0x10000) {
        n = 0x10000;
    } else if (n < -0x10000) {
        n = -0x10000;
    }

P
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7165
    aExp += n;
7166 7167
    return normalizeRoundAndPackFloatx80(status->floatx80_rounding_precision,
                                         aSign, aExp, aSig, 0, status);
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7168 7169
}

7170
float128 float128_scalbn(float128 a, int n, float_status *status)
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7171 7172
{
    flag aSign;
7173
    int32_t aExp;
7174
    uint64_t aSig0, aSig1;
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7175 7176 7177 7178 7179 7180

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
7181
        if ( aSig0 | aSig1 ) {
7182
            return propagateFloat128NaN(a, a, status);
7183
        }
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7184 7185
        return a;
    }
7186
    if (aExp != 0) {
7187
        aSig0 |= LIT64( 0x0001000000000000 );
7188
    } else if (aSig0 == 0 && aSig1 == 0) {
7189
        return a;
7190 7191 7192
    } else {
        aExp++;
    }
7193

7194 7195 7196 7197 7198 7199
    if (n > 0x10000) {
        n = 0x10000;
    } else if (n < -0x10000) {
        n = -0x10000;
    }

7200 7201
    aExp += n - 1;
    return normalizeRoundAndPackFloat128( aSign, aExp, aSig0, aSig1
7202
                                         , status);
P
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7203 7204

}
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