提交 ed086f3d 编写于 作者: B Blue Swirl

softfloat: remove dead assignments, spotted by clang

Value stored to 'bSign' is never read.
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
上级 b0e04867
master openEuler-20.03-LTS openEuler-20.09 openEuler-RISCV stable-0.13 stable-0.14 stable-0.15 stable-1.0 stable-1.1 stable-1.2 stable-1.3 stable-1.4 stable-1.5 stable-1.6 stable-1.7 stable-2.0 stable-2.1 stable-2.10 stable-2.11 stable-2.12 stable-2.2 stable-2.3 stable-2.4 stable-2.5 stable-2.6 stable-2.7 stable-2.8 stable-2.9 stable-3.0 stable-3.1 stable-4.0 stable-4.1 stable-4.2 v5.1.0-rc2 v5.1.0-rc1 v5.1.0-rc0 v5.0.0 v5.0.0-rc4 v5.0.0-rc3 v5.0.0-rc2 v5.0.0-rc1 v5.0.0-rc0 v4.2.1 v4.2.0 v4.2.0-rc5 v4.2.0-rc4 v4.2.0-rc3 v4.2.0-rc2 v4.2.0-rc1 v4.2.0-rc0 v4.1.1 v4.1.0 v4.1.0-rc5 v4.1.0-rc4 v4.1.0-rc3 v4.1.0-rc2 v4.1.0-rc1 v4.1.0-rc0 v4.0.1 v4.0.0 v4.0.0-rc4 v4.0.0-rc3 v4.0.0-rc2 v4.0.0-rc1 v4.0.0-rc0 v3.1.1.1 v3.1.1 v3.1.0 v3.1.0-rc5 v3.1.0-rc4 v3.1.0-rc3 v3.1.0-rc2 v3.1.0-rc1 v3.1.0-rc0 v3.0.1 v3.0.0 v3.0.0-rc4 v3.0.0-rc3 v3.0.0-rc2 v3.0.0-rc1 v3.0.0-rc0 v2.12.1 v2.12.0 v2.12.0-rc4 v2.12.0-rc3 v2.12.0-rc2 v2.12.0-rc1 v2.12.0-rc0 v2.11.2 v2.11.1 v2.11.0 v2.11.0-rc5 v2.11.0-rc4 v2.11.0-rc3 v2.11.0-rc2 v2.11.0-rc1 v2.11.0-rc0 v2.10.2 v2.10.1 v2.10.0 v2.10.0-rc4 v2.10.0-rc3 v2.10.0-rc2 v2.10.0-rc1 v2.10.0-rc0 v2.9.1 v2.9.0 v2.9.0-rc5 v2.9.0-rc4 v2.9.0-rc3 v2.9.0-rc2 v2.9.0-rc1 v2.9.0-rc0 v2.8.1.1 v2.8.1 v2.8.0 v2.8.0-rc4 v2.8.0-rc3 v2.8.0-rc2 v2.8.0-rc1 v2.8.0-rc0 v2.7.1 v2.7.0 v2.7.0-rc5 v2.7.0-rc4 v2.7.0-rc3 v2.7.0-rc2 v2.7.0-rc1 v2.7.0-rc0 v2.6.2 v2.6.1 v2.6.0 v2.6.0-rc5 v2.6.0-rc4 v2.6.0-rc3 v2.6.0-rc2 v2.6.0-rc1 v2.6.0-rc0 v2.5.1.1 v2.5.1 v2.5.0 v2.5.0-rc4 v2.5.0-rc3 v2.5.0-rc2 v2.5.0-rc1 v2.5.0-rc0 v2.4.1 v2.4.0.1 v2.4.0 v2.4.0-rc4 v2.4.0-rc3 v2.4.0-rc2 v2.4.0-rc1 v2.4.0-rc0 v2.3.1 v2.3.0 v2.3.0-rc4 v2.3.0-rc3 v2.3.0-rc2 v2.3.0-rc1 v2.3.0-rc0 v2.2.1 v2.2.0 v2.2.0-rc5 v2.2.0-rc4 v2.2.0-rc3 v2.2.0-rc2 v2.2.0-rc1 v2.2.0-rc0 v2.1.3 v2.1.2 v2.1.1 v2.1.0 v2.1.0-rc5 v2.1.0-rc4 v2.1.0-rc3 v2.1.0-rc2 v2.1.0-rc1 v2.1.0-rc0 v2.0.2 v2.0.1 v2.0.0 v2.0.0-rc3 v2.0.0-rc2 v2.0.0-rc1 v2.0.0-rc0 v1.7.2 v1.7.1 v1.7.0 v1.7.0-rc2 v1.7.0-rc1 v1.7.0-rc0 v1.6.2 v1.6.1 v1.6.0 v1.6.0-rc3 v1.6.0-rc2 v1.6.0-rc1 v1.6.0-rc0 v1.5.3 v1.5.2 v1.5.1 v1.5.0 v1.5.0-rc3 v1.5.0-rc2 v1.5.0-rc1 v1.5.0-rc0 v1.4.2 v1.4.1 v1.4.0 v1.4.0-rc2 v1.4.0-rc1 v1.4.0-rc0 v1.3.1 v1.3.0 v1.3.0-rc2 v1.3.0-rc1 v1.3.0-rc0 v1.2.2 v1.2.1 v1.2.0 v1.2.0-rc3 v1.2.0-rc2 v1.2.0-rc1 v1.2.0-rc0 v1.1.2 v1.1.1 v1.1.0 v1.1.0-rc4 v1.1.0-rc3 v1.1.0-rc2 v1.1-rc2 v1.1-rc1 v1.1-rc0 v1.0.1 v1.0 v1.0-rc4 v1.0-rc3 v1.0-rc2 v1.0-rc1 v1.0-rc0 v0.15.1 v0.15.0 v0.15.0-rc2 v0.15.0-rc1 v0.15.0-rc0 v0.14.1 v0.14.0 v0.14.0-rc2 v0.14.0-rc1 v0.14.0-rc0 v0.13.0 v0.13.0-rc3 v0.13.0-rc2 v0.13.0-rc1 v0.13.0-rc0
无相关合并请求
......@@ -1910,7 +1910,7 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM )
float32 float32_rem( float32 a, float32 b STATUS_PARAM )
{
flag aSign, bSign, zSign;
flag aSign, zSign;
int16 aExp, bExp, expDiff;
bits32 aSig, bSig;
bits32 q;
......@@ -1923,7 +1923,6 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM )
aSign = extractFloat32Sign( a );
bSig = extractFloat32Frac( b );
bExp = extractFloat32Exp( b );
bSign = extractFloat32Sign( b );
if ( aExp == 0xFF ) {
if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {
return propagateFloat32NaN( a, b STATUS_VAR );
......@@ -3062,7 +3061,7 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM )
float64 float64_rem( float64 a, float64 b STATUS_PARAM )
{
flag aSign, bSign, zSign;
flag aSign, zSign;
int16 aExp, bExp, expDiff;
bits64 aSig, bSig;
bits64 q, alternateASig;
......@@ -3073,7 +3072,6 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM )
aSign = extractFloat64Sign( a );
bSig = extractFloat64Frac( b );
bExp = extractFloat64Exp( b );
bSign = extractFloat64Sign( b );
if ( aExp == 0x7FF ) {
if ( aSig || ( ( bExp == 0x7FF ) && bSig ) ) {
return propagateFloat64NaN( a, b STATUS_VAR );
......@@ -4032,7 +4030,7 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM )
floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM )
{
flag aSign, bSign, zSign;
flag aSign, zSign;
int32 aExp, bExp, expDiff;
bits64 aSig0, aSig1, bSig;
bits64 q, term0, term1, alternateASig0, alternateASig1;
......@@ -4043,7 +4041,6 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM )
aSign = extractFloatx80Sign( a );
bSig = extractFloatx80Frac( b );
bExp = extractFloatx80Exp( b );
bSign = extractFloatx80Sign( b );
if ( aExp == 0x7FFF ) {
if ( (bits64) ( aSig0<<1 )
|| ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) {
......@@ -5144,7 +5141,7 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM )
float128 float128_rem( float128 a, float128 b STATUS_PARAM )
{
flag aSign, bSign, zSign;
flag aSign, zSign;
int32 aExp, bExp, expDiff;
bits64 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;
bits64 allZero, alternateASig0, alternateASig1, sigMean1;
......@@ -5158,7 +5155,6 @@ float128 float128_rem( float128 a, float128 b STATUS_PARAM )
bSig1 = extractFloat128Frac1( b );
bSig0 = extractFloat128Frac0( b );
bExp = extractFloat128Exp( b );
bSign = extractFloat128Sign( b );
if ( aExp == 0x7FFF ) {
if ( ( aSig0 | aSig1 )
|| ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {
......
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