softfloat.c 243.3 KB
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/*
 * QEMU float support
 *
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 * The code in this source file is derived from release 2a of the SoftFloat
 * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
 * some later contributions) are provided under that license, as detailed below.
 * It has subsequently been modified by contributors to the QEMU Project,
 * so some portions are provided under:
 *  the SoftFloat-2a license
 *  the BSD license
 *  GPL-v2-or-later
 *
 * Any future contributions to this file after December 1st 2014 will be
 * taken to be licensed under the Softfloat-2a license unless specifically
 * indicated otherwise.
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 */
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/*
===============================================================================
This C source file is part of the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 2a.
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Written by John R. Hauser.  This work was made possible in part by the
International Computer Science Institute, located at Suite 600, 1947 Center
Street, Berkeley, California 94704.  Funding was partially provided by the
National Science Foundation under grant MIP-9311980.  The original version
of this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
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is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
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arithmetic/SoftFloat.html'.

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THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort
has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO
PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
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Derivative works are acceptable, even for commercial purposes, so long as
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(1) they include prominent notice that the work is derivative, and (2) they
include prominent notice akin to these four paragraphs for those parts of
this code that are retained.
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===============================================================================
*/
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/* BSD licensing:
 * Copyright (c) 2006, Fabrice Bellard
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 * this list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution.
 *
 * 3. Neither the name of the copyright holder nor the names of its contributors
 * may be used to endorse or promote products derived from this software without
 * specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 * THE POSSIBILITY OF SUCH DAMAGE.
 */

/* Portions of this work are licensed under the terms of the GNU GPL,
 * version 2 or later. See the COPYING file in the top-level directory.
 */

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/* softfloat (and in particular the code in softfloat-specialize.h) is
 * target-dependent and needs the TARGET_* macros.
 */
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#include "qemu/osdep.h"
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#include "qemu/bitops.h"
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#include "fpu/softfloat.h"
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/* We only need stdlib for abort() */

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/*----------------------------------------------------------------------------
| Primitive arithmetic functions, including multi-word arithmetic, and
| division and square root approximations.  (Can be specialized to target if
| desired.)
*----------------------------------------------------------------------------*/
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#include "fpu/softfloat-macros.h"
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/*----------------------------------------------------------------------------
| Returns the fraction bits of the half-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

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static inline uint32_t extractFloat16Frac(float16 a)
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{
    return float16_val(a) & 0x3ff;
}

/*----------------------------------------------------------------------------
| Returns the exponent bits of the half-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

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static inline int extractFloat16Exp(float16 a)
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{
    return (float16_val(a) >> 10) & 0x1f;
}

/*----------------------------------------------------------------------------
| Returns the sign bit of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

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static inline flag extractFloat16Sign(float16 a)
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{
    return float16_val(a)>>15;
}

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/*----------------------------------------------------------------------------
| Returns the fraction bits of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline uint32_t extractFloat32Frac(float32 a)
{
    return float32_val(a) & 0x007FFFFF;
}

/*----------------------------------------------------------------------------
| Returns the exponent bits of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline int extractFloat32Exp(float32 a)
{
    return (float32_val(a) >> 23) & 0xFF;
}

/*----------------------------------------------------------------------------
| Returns the sign bit of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline flag extractFloat32Sign(float32 a)
{
    return float32_val(a) >> 31;
}

/*----------------------------------------------------------------------------
| Returns the fraction bits of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline uint64_t extractFloat64Frac(float64 a)
{
    return float64_val(a) & LIT64(0x000FFFFFFFFFFFFF);
}

/*----------------------------------------------------------------------------
| Returns the exponent bits of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline int extractFloat64Exp(float64 a)
{
    return (float64_val(a) >> 52) & 0x7FF;
}

/*----------------------------------------------------------------------------
| Returns the sign bit of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline flag extractFloat64Sign(float64 a)
{
    return float64_val(a) >> 63;
}

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/*
 * Classify a floating point number. Everything above float_class_qnan
 * is a NaN so cls >= float_class_qnan is any NaN.
 */

typedef enum __attribute__ ((__packed__)) {
    float_class_unclassified,
    float_class_zero,
    float_class_normal,
    float_class_inf,
    float_class_qnan,  /* all NaNs from here */
    float_class_snan,
} FloatClass;

/*
 * Structure holding all of the decomposed parts of a float. The
 * exponent is unbiased and the fraction is normalized. All
 * calculations are done with a 64 bit fraction and then rounded as
 * appropriate for the final format.
 *
 * Thanks to the packed FloatClass a decent compiler should be able to
 * fit the whole structure into registers and avoid using the stack
 * for parameter passing.
 */

typedef struct {
    uint64_t frac;
    int32_t  exp;
    FloatClass cls;
    bool sign;
} FloatParts;

#define DECOMPOSED_BINARY_POINT    (64 - 2)
#define DECOMPOSED_IMPLICIT_BIT    (1ull << DECOMPOSED_BINARY_POINT)
#define DECOMPOSED_OVERFLOW_BIT    (DECOMPOSED_IMPLICIT_BIT << 1)

/* Structure holding all of the relevant parameters for a format.
 *   exp_size: the size of the exponent field
 *   exp_bias: the offset applied to the exponent field
 *   exp_max: the maximum normalised exponent
 *   frac_size: the size of the fraction field
 *   frac_shift: shift to normalise the fraction with DECOMPOSED_BINARY_POINT
 * The following are computed based the size of fraction
 *   frac_lsb: least significant bit of fraction
 *   fram_lsbm1: the bit bellow the least significant bit (for rounding)
 *   round_mask/roundeven_mask: masks used for rounding
 */
typedef struct {
    int exp_size;
    int exp_bias;
    int exp_max;
    int frac_size;
    int frac_shift;
    uint64_t frac_lsb;
    uint64_t frac_lsbm1;
    uint64_t round_mask;
    uint64_t roundeven_mask;
} FloatFmt;

/* Expand fields based on the size of exponent and fraction */
#define FLOAT_PARAMS(E, F)                                           \
    .exp_size       = E,                                             \
    .exp_bias       = ((1 << E) - 1) >> 1,                           \
    .exp_max        = (1 << E) - 1,                                  \
    .frac_size      = F,                                             \
    .frac_shift     = DECOMPOSED_BINARY_POINT - F,                   \
    .frac_lsb       = 1ull << (DECOMPOSED_BINARY_POINT - F),         \
    .frac_lsbm1     = 1ull << ((DECOMPOSED_BINARY_POINT - F) - 1),   \
    .round_mask     = (1ull << (DECOMPOSED_BINARY_POINT - F)) - 1,   \
    .roundeven_mask = (2ull << (DECOMPOSED_BINARY_POINT - F)) - 1

static const FloatFmt float16_params = {
    FLOAT_PARAMS(5, 10)
};

static const FloatFmt float32_params = {
    FLOAT_PARAMS(8, 23)
};

static const FloatFmt float64_params = {
    FLOAT_PARAMS(11, 52)
};

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/* Unpack a float to parts, but do not canonicalize.  */
static inline FloatParts unpack_raw(FloatFmt fmt, uint64_t raw)
{
    const int sign_pos = fmt.frac_size + fmt.exp_size;

    return (FloatParts) {
        .cls = float_class_unclassified,
        .sign = extract64(raw, sign_pos, 1),
        .exp = extract64(raw, fmt.frac_size, fmt.exp_size),
        .frac = extract64(raw, 0, fmt.frac_size),
    };
}

static inline FloatParts float16_unpack_raw(float16 f)
{
    return unpack_raw(float16_params, f);
}

static inline FloatParts float32_unpack_raw(float32 f)
{
    return unpack_raw(float32_params, f);
}

static inline FloatParts float64_unpack_raw(float64 f)
{
    return unpack_raw(float64_params, f);
}

/* Pack a float from parts, but do not canonicalize.  */
static inline uint64_t pack_raw(FloatFmt fmt, FloatParts p)
{
    const int sign_pos = fmt.frac_size + fmt.exp_size;
    uint64_t ret = deposit64(p.frac, fmt.frac_size, fmt.exp_size, p.exp);
    return deposit64(ret, sign_pos, 1, p.sign);
}

static inline float16 float16_pack_raw(FloatParts p)
{
    return make_float16(pack_raw(float16_params, p));
}

static inline float32 float32_pack_raw(FloatParts p)
{
    return make_float32(pack_raw(float32_params, p));
}

static inline float64 float64_pack_raw(FloatParts p)
{
    return make_float64(pack_raw(float64_params, p));
}

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/*----------------------------------------------------------------------------
| Functions and definitions to determine:  (1) whether tininess for underflow
| is detected before or after rounding by default, (2) what (if anything)
| happens when exceptions are raised, (3) how signaling NaNs are distinguished
| from quiet NaNs, (4) the default generated quiet NaNs, and (5) how NaNs
| are propagated from function inputs to output.  These details are target-
| specific.
*----------------------------------------------------------------------------*/
#include "softfloat-specialize.h"

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/* Canonicalize EXP and FRAC, setting CLS.  */
static FloatParts canonicalize(FloatParts part, const FloatFmt *parm,
                               float_status *status)
{
    if (part.exp == parm->exp_max) {
        if (part.frac == 0) {
            part.cls = float_class_inf;
        } else {
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            part.frac <<= parm->frac_shift;
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            part.cls = (parts_is_snan_frac(part.frac, status)
                        ? float_class_snan : float_class_qnan);
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        }
    } else if (part.exp == 0) {
        if (likely(part.frac == 0)) {
            part.cls = float_class_zero;
        } else if (status->flush_inputs_to_zero) {
            float_raise(float_flag_input_denormal, status);
            part.cls = float_class_zero;
            part.frac = 0;
        } else {
            int shift = clz64(part.frac) - 1;
            part.cls = float_class_normal;
            part.exp = parm->frac_shift - parm->exp_bias - shift + 1;
            part.frac <<= shift;
        }
    } else {
        part.cls = float_class_normal;
        part.exp -= parm->exp_bias;
        part.frac = DECOMPOSED_IMPLICIT_BIT + (part.frac << parm->frac_shift);
    }
    return part;
}

/* Round and uncanonicalize a floating-point number by parts. There
 * are FRAC_SHIFT bits that may require rounding at the bottom of the
 * fraction; these bits will be removed. The exponent will be biased
 * by EXP_BIAS and must be bounded by [EXP_MAX-1, 0].
 */

static FloatParts round_canonical(FloatParts p, float_status *s,
                                  const FloatFmt *parm)
{
    const uint64_t frac_lsbm1 = parm->frac_lsbm1;
    const uint64_t round_mask = parm->round_mask;
    const uint64_t roundeven_mask = parm->roundeven_mask;
    const int exp_max = parm->exp_max;
    const int frac_shift = parm->frac_shift;
    uint64_t frac, inc;
    int exp, flags = 0;
    bool overflow_norm;

    frac = p.frac;
    exp = p.exp;

    switch (p.cls) {
    case float_class_normal:
        switch (s->float_rounding_mode) {
        case float_round_nearest_even:
            overflow_norm = false;
            inc = ((frac & roundeven_mask) != frac_lsbm1 ? frac_lsbm1 : 0);
            break;
        case float_round_ties_away:
            overflow_norm = false;
            inc = frac_lsbm1;
            break;
        case float_round_to_zero:
            overflow_norm = true;
            inc = 0;
            break;
        case float_round_up:
            inc = p.sign ? 0 : round_mask;
            overflow_norm = p.sign;
            break;
        case float_round_down:
            inc = p.sign ? round_mask : 0;
            overflow_norm = !p.sign;
            break;
        default:
            g_assert_not_reached();
        }

        exp += parm->exp_bias;
        if (likely(exp > 0)) {
            if (frac & round_mask) {
                flags |= float_flag_inexact;
                frac += inc;
                if (frac & DECOMPOSED_OVERFLOW_BIT) {
                    frac >>= 1;
                    exp++;
                }
            }
            frac >>= frac_shift;

            if (unlikely(exp >= exp_max)) {
                flags |= float_flag_overflow | float_flag_inexact;
                if (overflow_norm) {
                    exp = exp_max - 1;
                    frac = -1;
                } else {
                    p.cls = float_class_inf;
                    goto do_inf;
                }
            }
        } else if (s->flush_to_zero) {
            flags |= float_flag_output_denormal;
            p.cls = float_class_zero;
            goto do_zero;
        } else {
            bool is_tiny = (s->float_detect_tininess
                            == float_tininess_before_rounding)
                        || (exp < 0)
                        || !((frac + inc) & DECOMPOSED_OVERFLOW_BIT);

            shift64RightJamming(frac, 1 - exp, &frac);
            if (frac & round_mask) {
                /* Need to recompute round-to-even.  */
                if (s->float_rounding_mode == float_round_nearest_even) {
                    inc = ((frac & roundeven_mask) != frac_lsbm1
                           ? frac_lsbm1 : 0);
                }
                flags |= float_flag_inexact;
                frac += inc;
            }

            exp = (frac & DECOMPOSED_IMPLICIT_BIT ? 1 : 0);
            frac >>= frac_shift;

            if (is_tiny && (flags & float_flag_inexact)) {
                flags |= float_flag_underflow;
            }
            if (exp == 0 && frac == 0) {
                p.cls = float_class_zero;
            }
        }
        break;

    case float_class_zero:
    do_zero:
        exp = 0;
        frac = 0;
        break;

    case float_class_inf:
    do_inf:
        exp = exp_max;
        frac = 0;
        break;

    case float_class_qnan:
    case float_class_snan:
        exp = exp_max;
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        frac >>= parm->frac_shift;
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        break;

    default:
        g_assert_not_reached();
    }

    float_raise(flags, s);
    p.exp = exp;
    p.frac = frac;
    return p;
}

static FloatParts float16_unpack_canonical(float16 f, float_status *s)
{
    return canonicalize(float16_unpack_raw(f), &float16_params, s);
}

static float16 float16_round_pack_canonical(FloatParts p, float_status *s)
{
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    return float16_pack_raw(round_canonical(p, s, &float16_params));
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}

static FloatParts float32_unpack_canonical(float32 f, float_status *s)
{
    return canonicalize(float32_unpack_raw(f), &float32_params, s);
}

static float32 float32_round_pack_canonical(FloatParts p, float_status *s)
{
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    return float32_pack_raw(round_canonical(p, s, &float32_params));
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}

static FloatParts float64_unpack_canonical(float64 f, float_status *s)
{
    return canonicalize(float64_unpack_raw(f), &float64_params, s);
}

static float64 float64_round_pack_canonical(FloatParts p, float_status *s)
{
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    return float64_pack_raw(round_canonical(p, s, &float64_params));
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}

/* Simple helpers for checking if what NaN we have */
static bool is_nan(FloatClass c)
{
    return unlikely(c >= float_class_qnan);
}
static bool is_snan(FloatClass c)
{
    return c == float_class_snan;
}
static bool is_qnan(FloatClass c)
{
    return c == float_class_qnan;
}

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static FloatParts return_nan(FloatParts a, float_status *s)
{
    switch (a.cls) {
    case float_class_snan:
        s->float_exception_flags |= float_flag_invalid;
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        a = parts_silence_nan(a, s);
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        /* fall through */
    case float_class_qnan:
        if (s->default_nan_mode) {
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            return parts_default_nan(s);
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        }
        break;

    default:
        g_assert_not_reached();
    }
    return a;
}

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static FloatParts pick_nan(FloatParts a, FloatParts b, float_status *s)
{
    if (is_snan(a.cls) || is_snan(b.cls)) {
        s->float_exception_flags |= float_flag_invalid;
    }

    if (s->default_nan_mode) {
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        return parts_default_nan(s);
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    } else {
        if (pickNaN(is_qnan(a.cls), is_snan(a.cls),
                    is_qnan(b.cls), is_snan(b.cls),
                    a.frac > b.frac ||
                    (a.frac == b.frac && a.sign < b.sign))) {
            a = b;
        }
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        if (is_snan(a.cls)) {
            return parts_silence_nan(a, s);
        }
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    }
    return a;
}

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static FloatParts pick_nan_muladd(FloatParts a, FloatParts b, FloatParts c,
                                  bool inf_zero, float_status *s)
{
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    int which;

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    if (is_snan(a.cls) || is_snan(b.cls) || is_snan(c.cls)) {
        s->float_exception_flags |= float_flag_invalid;
    }

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    which = pickNaNMulAdd(is_qnan(a.cls), is_snan(a.cls),
                          is_qnan(b.cls), is_snan(b.cls),
                          is_qnan(c.cls), is_snan(c.cls),
                          inf_zero, s);

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    if (s->default_nan_mode) {
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        /* Note that this check is after pickNaNMulAdd so that function
         * has an opportunity to set the Invalid flag.
         */
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        which = 3;
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    }
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    switch (which) {
    case 0:
        break;
    case 1:
        a = b;
        break;
    case 2:
        a = c;
        break;
    case 3:
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        return parts_default_nan(s);
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    default:
        g_assert_not_reached();
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    }
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    if (is_snan(a.cls)) {
        return parts_silence_nan(a, s);
    }
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    return a;
}

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/*
 * Returns the result of adding or subtracting the values of the
 * floating-point values `a' and `b'. The operation is performed
 * according to the IEC/IEEE Standard for Binary Floating-Point
 * Arithmetic.
 */

static FloatParts addsub_floats(FloatParts a, FloatParts b, bool subtract,
                                float_status *s)
{
    bool a_sign = a.sign;
    bool b_sign = b.sign ^ subtract;

    if (a_sign != b_sign) {
        /* Subtraction */

        if (a.cls == float_class_normal && b.cls == float_class_normal) {
            if (a.exp > b.exp || (a.exp == b.exp && a.frac >= b.frac)) {
                shift64RightJamming(b.frac, a.exp - b.exp, &b.frac);
                a.frac = a.frac - b.frac;
            } else {
                shift64RightJamming(a.frac, b.exp - a.exp, &a.frac);
                a.frac = b.frac - a.frac;
                a.exp = b.exp;
                a_sign ^= 1;
            }

            if (a.frac == 0) {
                a.cls = float_class_zero;
                a.sign = s->float_rounding_mode == float_round_down;
            } else {
                int shift = clz64(a.frac) - 1;
                a.frac = a.frac << shift;
                a.exp = a.exp - shift;
                a.sign = a_sign;
            }
            return a;
        }
        if (is_nan(a.cls) || is_nan(b.cls)) {
            return pick_nan(a, b, s);
        }
        if (a.cls == float_class_inf) {
            if (b.cls == float_class_inf) {
                float_raise(float_flag_invalid, s);
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                return parts_default_nan(s);
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            }
            return a;
        }
        if (a.cls == float_class_zero && b.cls == float_class_zero) {
            a.sign = s->float_rounding_mode == float_round_down;
            return a;
        }
        if (a.cls == float_class_zero || b.cls == float_class_inf) {
            b.sign = a_sign ^ 1;
            return b;
        }
        if (b.cls == float_class_zero) {
            return a;
        }
    } else {
        /* Addition */
        if (a.cls == float_class_normal && b.cls == float_class_normal) {
            if (a.exp > b.exp) {
                shift64RightJamming(b.frac, a.exp - b.exp, &b.frac);
            } else if (a.exp < b.exp) {
                shift64RightJamming(a.frac, b.exp - a.exp, &a.frac);
                a.exp = b.exp;
            }
            a.frac += b.frac;
            if (a.frac & DECOMPOSED_OVERFLOW_BIT) {
                a.frac >>= 1;
                a.exp += 1;
            }
            return a;
        }
        if (is_nan(a.cls) || is_nan(b.cls)) {
            return pick_nan(a, b, s);
        }
        if (a.cls == float_class_inf || b.cls == float_class_zero) {
            return a;
        }
        if (b.cls == float_class_inf || a.cls == float_class_zero) {
            b.sign = b_sign;
            return b;
        }
    }
    g_assert_not_reached();
}

/*
 * Returns the result of adding or subtracting the floating-point
 * values `a' and `b'. The operation is performed according to the
 * IEC/IEEE Standard for Binary Floating-Point Arithmetic.
 */

float16  __attribute__((flatten)) float16_add(float16 a, float16 b,
                                              float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pb = float16_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, false, status);

    return float16_round_pack_canonical(pr, status);
}

float32 __attribute__((flatten)) float32_add(float32 a, float32 b,
                                             float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pb = float32_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, false, status);

    return float32_round_pack_canonical(pr, status);
}

float64 __attribute__((flatten)) float64_add(float64 a, float64 b,
                                             float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pb = float64_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, false, status);

    return float64_round_pack_canonical(pr, status);
}

float16 __attribute__((flatten)) float16_sub(float16 a, float16 b,
                                             float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pb = float16_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, true, status);

    return float16_round_pack_canonical(pr, status);
}

float32 __attribute__((flatten)) float32_sub(float32 a, float32 b,
                                             float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pb = float32_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, true, status);

    return float32_round_pack_canonical(pr, status);
}

float64 __attribute__((flatten)) float64_sub(float64 a, float64 b,
                                             float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pb = float64_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, true, status);

    return float64_round_pack_canonical(pr, status);
}

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/*
 * Returns the result of multiplying the floating-point values `a' and
 * `b'. The operation is performed according to the IEC/IEEE Standard
 * for Binary Floating-Point Arithmetic.
 */

static FloatParts mul_floats(FloatParts a, FloatParts b, float_status *s)
{
    bool sign = a.sign ^ b.sign;

    if (a.cls == float_class_normal && b.cls == float_class_normal) {
        uint64_t hi, lo;
        int exp = a.exp + b.exp;

        mul64To128(a.frac, b.frac, &hi, &lo);
        shift128RightJamming(hi, lo, DECOMPOSED_BINARY_POINT, &hi, &lo);
        if (lo & DECOMPOSED_OVERFLOW_BIT) {
            shift64RightJamming(lo, 1, &lo);
            exp += 1;
        }

        /* Re-use a */
        a.exp = exp;
        a.sign = sign;
        a.frac = lo;
        return a;
    }
    /* handle all the NaN cases */
    if (is_nan(a.cls) || is_nan(b.cls)) {
        return pick_nan(a, b, s);
    }
    /* Inf * Zero == NaN */
    if ((a.cls == float_class_inf && b.cls == float_class_zero) ||
        (a.cls == float_class_zero && b.cls == float_class_inf)) {
        s->float_exception_flags |= float_flag_invalid;
804
        return parts_default_nan(s);
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    }
    /* Multiply by 0 or Inf */
    if (a.cls == float_class_inf || a.cls == float_class_zero) {
        a.sign = sign;
        return a;
    }
    if (b.cls == float_class_inf || b.cls == float_class_zero) {
        b.sign = sign;
        return b;
    }
    g_assert_not_reached();
}

float16 __attribute__((flatten)) float16_mul(float16 a, float16 b,
                                             float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pb = float16_unpack_canonical(b, status);
    FloatParts pr = mul_floats(pa, pb, status);

    return float16_round_pack_canonical(pr, status);
}

float32 __attribute__((flatten)) float32_mul(float32 a, float32 b,
                                             float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pb = float32_unpack_canonical(b, status);
    FloatParts pr = mul_floats(pa, pb, status);

    return float32_round_pack_canonical(pr, status);
}

float64 __attribute__((flatten)) float64_mul(float64 a, float64 b,
                                             float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pb = float64_unpack_canonical(b, status);
    FloatParts pr = mul_floats(pa, pb, status);

    return float64_round_pack_canonical(pr, status);
}

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/*
 * Returns the result of multiplying the floating-point values `a' and
 * `b' then adding 'c', with no intermediate rounding step after the
 * multiplication. The operation is performed according to the
 * IEC/IEEE Standard for Binary Floating-Point Arithmetic 754-2008.
 * The flags argument allows the caller to select negation of the
 * addend, the intermediate product, or the final result. (The
 * difference between this and having the caller do a separate
 * negation is that negating externally will flip the sign bit on
 * NaNs.)
 */

static FloatParts muladd_floats(FloatParts a, FloatParts b, FloatParts c,
                                int flags, float_status *s)
{
    bool inf_zero = ((1 << a.cls) | (1 << b.cls)) ==
                    ((1 << float_class_inf) | (1 << float_class_zero));
    bool p_sign;
    bool sign_flip = flags & float_muladd_negate_result;
    FloatClass p_class;
    uint64_t hi, lo;
    int p_exp;

    /* It is implementation-defined whether the cases of (0,inf,qnan)
     * and (inf,0,qnan) raise InvalidOperation or not (and what QNaN
     * they return if they do), so we have to hand this information
     * off to the target-specific pick-a-NaN routine.
     */
    if (is_nan(a.cls) || is_nan(b.cls) || is_nan(c.cls)) {
        return pick_nan_muladd(a, b, c, inf_zero, s);
    }

    if (inf_zero) {
        s->float_exception_flags |= float_flag_invalid;
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        return parts_default_nan(s);
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    }

    if (flags & float_muladd_negate_c) {
        c.sign ^= 1;
    }

    p_sign = a.sign ^ b.sign;

    if (flags & float_muladd_negate_product) {
        p_sign ^= 1;
    }

    if (a.cls == float_class_inf || b.cls == float_class_inf) {
        p_class = float_class_inf;
    } else if (a.cls == float_class_zero || b.cls == float_class_zero) {
        p_class = float_class_zero;
    } else {
        p_class = float_class_normal;
    }

    if (c.cls == float_class_inf) {
        if (p_class == float_class_inf && p_sign != c.sign) {
            s->float_exception_flags |= float_flag_invalid;
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            return parts_default_nan(s);
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        } else {
            a.cls = float_class_inf;
            a.sign = c.sign ^ sign_flip;
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            return a;
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        }
    }

    if (p_class == float_class_inf) {
        a.cls = float_class_inf;
        a.sign = p_sign ^ sign_flip;
        return a;
    }

    if (p_class == float_class_zero) {
        if (c.cls == float_class_zero) {
            if (p_sign != c.sign) {
                p_sign = s->float_rounding_mode == float_round_down;
            }
            c.sign = p_sign;
        } else if (flags & float_muladd_halve_result) {
            c.exp -= 1;
        }
        c.sign ^= sign_flip;
        return c;
    }

    /* a & b should be normals now... */
    assert(a.cls == float_class_normal &&
           b.cls == float_class_normal);

    p_exp = a.exp + b.exp;

    /* Multiply of 2 62-bit numbers produces a (2*62) == 124-bit
     * result.
     */
    mul64To128(a.frac, b.frac, &hi, &lo);
    /* binary point now at bit 124 */

    /* check for overflow */
    if (hi & (1ULL << (DECOMPOSED_BINARY_POINT * 2 + 1 - 64))) {
        shift128RightJamming(hi, lo, 1, &hi, &lo);
        p_exp += 1;
    }

    /* + add/sub */
    if (c.cls == float_class_zero) {
        /* move binary point back to 62 */
        shift128RightJamming(hi, lo, DECOMPOSED_BINARY_POINT, &hi, &lo);
    } else {
        int exp_diff = p_exp - c.exp;
        if (p_sign == c.sign) {
            /* Addition */
            if (exp_diff <= 0) {
                shift128RightJamming(hi, lo,
                                     DECOMPOSED_BINARY_POINT - exp_diff,
                                     &hi, &lo);
                lo += c.frac;
                p_exp = c.exp;
            } else {
                uint64_t c_hi, c_lo;
                /* shift c to the same binary point as the product (124) */
                c_hi = c.frac >> 2;
                c_lo = 0;
                shift128RightJamming(c_hi, c_lo,
                                     exp_diff,
                                     &c_hi, &c_lo);
                add128(hi, lo, c_hi, c_lo, &hi, &lo);
                /* move binary point back to 62 */
                shift128RightJamming(hi, lo, DECOMPOSED_BINARY_POINT, &hi, &lo);
            }

            if (lo & DECOMPOSED_OVERFLOW_BIT) {
                shift64RightJamming(lo, 1, &lo);
                p_exp += 1;
            }

        } else {
            /* Subtraction */
            uint64_t c_hi, c_lo;
            /* make C binary point match product at bit 124 */
            c_hi = c.frac >> 2;
            c_lo = 0;

            if (exp_diff <= 0) {
                shift128RightJamming(hi, lo, -exp_diff, &hi, &lo);
                if (exp_diff == 0
                    &&
                    (hi > c_hi || (hi == c_hi && lo >= c_lo))) {
                    sub128(hi, lo, c_hi, c_lo, &hi, &lo);
                } else {
                    sub128(c_hi, c_lo, hi, lo, &hi, &lo);
                    p_sign ^= 1;
                    p_exp = c.exp;
                }
            } else {
                shift128RightJamming(c_hi, c_lo,
                                     exp_diff,
                                     &c_hi, &c_lo);
                sub128(hi, lo, c_hi, c_lo, &hi, &lo);
            }

            if (hi == 0 && lo == 0) {
                a.cls = float_class_zero;
                a.sign = s->float_rounding_mode == float_round_down;
                a.sign ^= sign_flip;
                return a;
            } else {
                int shift;
                if (hi != 0) {
                    shift = clz64(hi);
                } else {
                    shift = clz64(lo) + 64;
                }
                /* Normalizing to a binary point of 124 is the
                   correct adjust for the exponent.  However since we're
                   shifting, we might as well put the binary point back
                   at 62 where we really want it.  Therefore shift as
                   if we're leaving 1 bit at the top of the word, but
                   adjust the exponent as if we're leaving 3 bits.  */
                shift -= 1;
                if (shift >= 64) {
                    lo = lo << (shift - 64);
                } else {
                    hi = (hi << shift) | (lo >> (64 - shift));
                    lo = hi | ((lo << shift) != 0);
                }
                p_exp -= shift - 2;
            }
        }
    }

    if (flags & float_muladd_halve_result) {
        p_exp -= 1;
    }

    /* finally prepare our result */
    a.cls = float_class_normal;
    a.sign = p_sign ^ sign_flip;
    a.exp = p_exp;
    a.frac = lo;

    return a;
}

float16 __attribute__((flatten)) float16_muladd(float16 a, float16 b, float16 c,
                                                int flags, float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pb = float16_unpack_canonical(b, status);
    FloatParts pc = float16_unpack_canonical(c, status);
    FloatParts pr = muladd_floats(pa, pb, pc, flags, status);

    return float16_round_pack_canonical(pr, status);
}

float32 __attribute__((flatten)) float32_muladd(float32 a, float32 b, float32 c,
                                                int flags, float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pb = float32_unpack_canonical(b, status);
    FloatParts pc = float32_unpack_canonical(c, status);
    FloatParts pr = muladd_floats(pa, pb, pc, flags, status);

    return float32_round_pack_canonical(pr, status);
}

float64 __attribute__((flatten)) float64_muladd(float64 a, float64 b, float64 c,
                                                int flags, float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pb = float64_unpack_canonical(b, status);
    FloatParts pc = float64_unpack_canonical(c, status);
    FloatParts pr = muladd_floats(pa, pb, pc, flags, status);

    return float64_round_pack_canonical(pr, status);
}

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/*
 * Returns the result of dividing the floating-point value `a' by the
 * corresponding value `b'. The operation is performed according to
 * the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
 */

static FloatParts div_floats(FloatParts a, FloatParts b, float_status *s)
{
    bool sign = a.sign ^ b.sign;

    if (a.cls == float_class_normal && b.cls == float_class_normal) {
        uint64_t temp_lo, temp_hi;
        int exp = a.exp - b.exp;
        if (a.frac < b.frac) {
            exp -= 1;
            shortShift128Left(0, a.frac, DECOMPOSED_BINARY_POINT + 1,
                              &temp_hi, &temp_lo);
        } else {
            shortShift128Left(0, a.frac, DECOMPOSED_BINARY_POINT,
                              &temp_hi, &temp_lo);
        }
        /* LSB of quot is set if inexact which roundandpack will use
         * to set flags. Yet again we re-use a for the result */
        a.frac = div128To64(temp_lo, temp_hi, b.frac);
        a.sign = sign;
        a.exp = exp;
        return a;
    }
    /* handle all the NaN cases */
    if (is_nan(a.cls) || is_nan(b.cls)) {
        return pick_nan(a, b, s);
    }
    /* 0/0 or Inf/Inf */
    if (a.cls == b.cls
        &&
        (a.cls == float_class_inf || a.cls == float_class_zero)) {
        s->float_exception_flags |= float_flag_invalid;
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        return parts_default_nan(s);
1122
    }
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    /* Inf / x or 0 / x */
    if (a.cls == float_class_inf || a.cls == float_class_zero) {
        a.sign = sign;
        return a;
    }
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    /* Div 0 => Inf */
    if (b.cls == float_class_zero) {
        s->float_exception_flags |= float_flag_divbyzero;
        a.cls = float_class_inf;
        a.sign = sign;
        return a;
    }
    /* Div by Inf */
    if (b.cls == float_class_inf) {
        a.cls = float_class_zero;
        a.sign = sign;
        return a;
    }
    g_assert_not_reached();
}

float16 float16_div(float16 a, float16 b, float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pb = float16_unpack_canonical(b, status);
    FloatParts pr = div_floats(pa, pb, status);

    return float16_round_pack_canonical(pr, status);
}

float32 float32_div(float32 a, float32 b, float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pb = float32_unpack_canonical(b, status);
    FloatParts pr = div_floats(pa, pb, status);

    return float32_round_pack_canonical(pr, status);
}

float64 float64_div(float64 a, float64 b, float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pb = float64_unpack_canonical(b, status);
    FloatParts pr = div_floats(pa, pb, status);

    return float64_round_pack_canonical(pr, status);
}

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/*
 * Rounds the floating-point value `a' to an integer, and returns the
 * result as a floating-point value. The operation is performed
 * according to the IEC/IEEE Standard for Binary Floating-Point
 * Arithmetic.
 */

static FloatParts round_to_int(FloatParts a, int rounding_mode, float_status *s)
{
    if (is_nan(a.cls)) {
        return return_nan(a, s);
    }

    switch (a.cls) {
    case float_class_zero:
    case float_class_inf:
    case float_class_qnan:
        /* already "integral" */
        break;
    case float_class_normal:
        if (a.exp >= DECOMPOSED_BINARY_POINT) {
            /* already integral */
            break;
        }
        if (a.exp < 0) {
            bool one;
            /* all fractional */
            s->float_exception_flags |= float_flag_inexact;
            switch (rounding_mode) {
            case float_round_nearest_even:
                one = a.exp == -1 && a.frac > DECOMPOSED_IMPLICIT_BIT;
                break;
            case float_round_ties_away:
                one = a.exp == -1 && a.frac >= DECOMPOSED_IMPLICIT_BIT;
                break;
            case float_round_to_zero:
                one = false;
                break;
            case float_round_up:
                one = !a.sign;
                break;
            case float_round_down:
                one = a.sign;
                break;
            default:
                g_assert_not_reached();
            }

            if (one) {
                a.frac = DECOMPOSED_IMPLICIT_BIT;
                a.exp = 0;
            } else {
                a.cls = float_class_zero;
            }
        } else {
            uint64_t frac_lsb = DECOMPOSED_IMPLICIT_BIT >> a.exp;
            uint64_t frac_lsbm1 = frac_lsb >> 1;
            uint64_t rnd_even_mask = (frac_lsb - 1) | frac_lsb;
            uint64_t rnd_mask = rnd_even_mask >> 1;
            uint64_t inc;

            switch (rounding_mode) {
            case float_round_nearest_even:
                inc = ((a.frac & rnd_even_mask) != frac_lsbm1 ? frac_lsbm1 : 0);
                break;
            case float_round_ties_away:
                inc = frac_lsbm1;
                break;
            case float_round_to_zero:
                inc = 0;
                break;
            case float_round_up:
                inc = a.sign ? 0 : rnd_mask;
                break;
            case float_round_down:
                inc = a.sign ? rnd_mask : 0;
                break;
            default:
                g_assert_not_reached();
            }

            if (a.frac & rnd_mask) {
                s->float_exception_flags |= float_flag_inexact;
                a.frac += inc;
                a.frac &= ~rnd_mask;
                if (a.frac & DECOMPOSED_OVERFLOW_BIT) {
                    a.frac >>= 1;
                    a.exp++;
                }
            }
        }
        break;
    default:
        g_assert_not_reached();
    }
    return a;
}

float16 float16_round_to_int(float16 a, float_status *s)
{
    FloatParts pa = float16_unpack_canonical(a, s);
    FloatParts pr = round_to_int(pa, s->float_rounding_mode, s);
    return float16_round_pack_canonical(pr, s);
}

float32 float32_round_to_int(float32 a, float_status *s)
{
    FloatParts pa = float32_unpack_canonical(a, s);
    FloatParts pr = round_to_int(pa, s->float_rounding_mode, s);
    return float32_round_pack_canonical(pr, s);
}

float64 float64_round_to_int(float64 a, float_status *s)
{
    FloatParts pa = float64_unpack_canonical(a, s);
    FloatParts pr = round_to_int(pa, s->float_rounding_mode, s);
    return float64_round_pack_canonical(pr, s);
}

float64 float64_trunc_to_int(float64 a, float_status *s)
{
    FloatParts pa = float64_unpack_canonical(a, s);
    FloatParts pr = round_to_int(pa, float_round_to_zero, s);
    return float64_round_pack_canonical(pr, s);
}

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/*
 * Returns the result of converting the floating-point value `a' to
 * the two's complement integer format. The conversion is performed
 * according to the IEC/IEEE Standard for Binary Floating-Point
 * Arithmetic---which means in particular that the conversion is
 * rounded according to the current rounding mode. If `a' is a NaN,
 * the largest positive integer is returned. Otherwise, if the
 * conversion overflows, the largest integer with the same sign as `a'
 * is returned.
*/

static int64_t round_to_int_and_pack(FloatParts in, int rmode,
                                     int64_t min, int64_t max,
                                     float_status *s)
{
    uint64_t r;
    int orig_flags = get_float_exception_flags(s);
    FloatParts p = round_to_int(in, rmode, s);

    switch (p.cls) {
    case float_class_snan:
    case float_class_qnan:
1319
        s->float_exception_flags = orig_flags | float_flag_invalid;
1320 1321
        return max;
    case float_class_inf:
1322
        s->float_exception_flags = orig_flags | float_flag_invalid;
1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334
        return p.sign ? min : max;
    case float_class_zero:
        return 0;
    case float_class_normal:
        if (p.exp < DECOMPOSED_BINARY_POINT) {
            r = p.frac >> (DECOMPOSED_BINARY_POINT - p.exp);
        } else if (p.exp - DECOMPOSED_BINARY_POINT < 2) {
            r = p.frac << (p.exp - DECOMPOSED_BINARY_POINT);
        } else {
            r = UINT64_MAX;
        }
        if (p.sign) {
1335
            if (r <= -(uint64_t) min) {
1336 1337 1338 1339 1340 1341
                return -r;
            } else {
                s->float_exception_flags = orig_flags | float_flag_invalid;
                return min;
            }
        } else {
1342
            if (r <= max) {
1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411
                return r;
            } else {
                s->float_exception_flags = orig_flags | float_flag_invalid;
                return max;
            }
        }
    default:
        g_assert_not_reached();
    }
}

#define FLOAT_TO_INT(fsz, isz)                                          \
int ## isz ## _t float ## fsz ## _to_int ## isz(float ## fsz a,         \
                                                float_status *s)        \
{                                                                       \
    FloatParts p = float ## fsz ## _unpack_canonical(a, s);             \
    return round_to_int_and_pack(p, s->float_rounding_mode,             \
                                 INT ## isz ## _MIN, INT ## isz ## _MAX,\
                                 s);                                    \
}                                                                       \
                                                                        \
int ## isz ## _t float ## fsz ## _to_int ## isz ## _round_to_zero       \
 (float ## fsz a, float_status *s)                                      \
{                                                                       \
    FloatParts p = float ## fsz ## _unpack_canonical(a, s);             \
    return round_to_int_and_pack(p, float_round_to_zero,                \
                                 INT ## isz ## _MIN, INT ## isz ## _MAX,\
                                 s);                                    \
}

FLOAT_TO_INT(16, 16)
FLOAT_TO_INT(16, 32)
FLOAT_TO_INT(16, 64)

FLOAT_TO_INT(32, 16)
FLOAT_TO_INT(32, 32)
FLOAT_TO_INT(32, 64)

FLOAT_TO_INT(64, 16)
FLOAT_TO_INT(64, 32)
FLOAT_TO_INT(64, 64)

#undef FLOAT_TO_INT

/*
 *  Returns the result of converting the floating-point value `a' to
 *  the unsigned integer format. The conversion is performed according
 *  to the IEC/IEEE Standard for Binary Floating-Point
 *  Arithmetic---which means in particular that the conversion is
 *  rounded according to the current rounding mode. If `a' is a NaN,
 *  the largest unsigned integer is returned. Otherwise, if the
 *  conversion overflows, the largest unsigned integer is returned. If
 *  the 'a' is negative, the result is rounded and zero is returned;
 *  values that do not round to zero will raise the inexact exception
 *  flag.
 */

static uint64_t round_to_uint_and_pack(FloatParts in, int rmode, uint64_t max,
                                       float_status *s)
{
    int orig_flags = get_float_exception_flags(s);
    FloatParts p = round_to_int(in, rmode, s);

    switch (p.cls) {
    case float_class_snan:
    case float_class_qnan:
        s->float_exception_flags = orig_flags | float_flag_invalid;
        return max;
    case float_class_inf:
1412
        s->float_exception_flags = orig_flags | float_flag_invalid;
1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461
        return p.sign ? 0 : max;
    case float_class_zero:
        return 0;
    case float_class_normal:
    {
        uint64_t r;
        if (p.sign) {
            s->float_exception_flags = orig_flags | float_flag_invalid;
            return 0;
        }

        if (p.exp < DECOMPOSED_BINARY_POINT) {
            r = p.frac >> (DECOMPOSED_BINARY_POINT - p.exp);
        } else if (p.exp - DECOMPOSED_BINARY_POINT < 2) {
            r = p.frac << (p.exp - DECOMPOSED_BINARY_POINT);
        } else {
            s->float_exception_flags = orig_flags | float_flag_invalid;
            return max;
        }

        /* For uint64 this will never trip, but if p.exp is too large
         * to shift a decomposed fraction we shall have exited via the
         * 3rd leg above.
         */
        if (r > max) {
            s->float_exception_flags = orig_flags | float_flag_invalid;
            return max;
        } else {
            return r;
        }
    }
    default:
        g_assert_not_reached();
    }
}

#define FLOAT_TO_UINT(fsz, isz) \
uint ## isz ## _t float ## fsz ## _to_uint ## isz(float ## fsz a,       \
                                                  float_status *s)      \
{                                                                       \
    FloatParts p = float ## fsz ## _unpack_canonical(a, s);             \
    return round_to_uint_and_pack(p, s->float_rounding_mode,            \
                                 UINT ## isz ## _MAX, s);               \
}                                                                       \
                                                                        \
uint ## isz ## _t float ## fsz ## _to_uint ## isz ## _round_to_zero     \
 (float ## fsz a, float_status *s)                                      \
{                                                                       \
    FloatParts p = float ## fsz ## _unpack_canonical(a, s);             \
1462 1463
    return round_to_uint_and_pack(p, float_round_to_zero,               \
                                  UINT ## isz ## _MAX, s);              \
1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479
}

FLOAT_TO_UINT(16, 16)
FLOAT_TO_UINT(16, 32)
FLOAT_TO_UINT(16, 64)

FLOAT_TO_UINT(32, 16)
FLOAT_TO_UINT(32, 32)
FLOAT_TO_UINT(32, 64)

FLOAT_TO_UINT(64, 16)
FLOAT_TO_UINT(64, 32)
FLOAT_TO_UINT(64, 64)

#undef FLOAT_TO_UINT

1480 1481 1482 1483 1484 1485 1486 1487 1488 1489
/*
 * Integer to float conversions
 *
 * Returns the result of converting the two's complement integer `a'
 * to the floating-point format. The conversion is performed according
 * to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
 */

static FloatParts int_to_float(int64_t a, float_status *status)
{
1490
    FloatParts r = {};
1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642
    if (a == 0) {
        r.cls = float_class_zero;
        r.sign = false;
    } else if (a == (1ULL << 63)) {
        r.cls = float_class_normal;
        r.sign = true;
        r.frac = DECOMPOSED_IMPLICIT_BIT;
        r.exp = 63;
    } else {
        uint64_t f;
        if (a < 0) {
            f = -a;
            r.sign = true;
        } else {
            f = a;
            r.sign = false;
        }
        int shift = clz64(f) - 1;
        r.cls = float_class_normal;
        r.exp = (DECOMPOSED_BINARY_POINT - shift);
        r.frac = f << shift;
    }

    return r;
}

float16 int64_to_float16(int64_t a, float_status *status)
{
    FloatParts pa = int_to_float(a, status);
    return float16_round_pack_canonical(pa, status);
}

float16 int32_to_float16(int32_t a, float_status *status)
{
    return int64_to_float16(a, status);
}

float16 int16_to_float16(int16_t a, float_status *status)
{
    return int64_to_float16(a, status);
}

float32 int64_to_float32(int64_t a, float_status *status)
{
    FloatParts pa = int_to_float(a, status);
    return float32_round_pack_canonical(pa, status);
}

float32 int32_to_float32(int32_t a, float_status *status)
{
    return int64_to_float32(a, status);
}

float32 int16_to_float32(int16_t a, float_status *status)
{
    return int64_to_float32(a, status);
}

float64 int64_to_float64(int64_t a, float_status *status)
{
    FloatParts pa = int_to_float(a, status);
    return float64_round_pack_canonical(pa, status);
}

float64 int32_to_float64(int32_t a, float_status *status)
{
    return int64_to_float64(a, status);
}

float64 int16_to_float64(int16_t a, float_status *status)
{
    return int64_to_float64(a, status);
}


/*
 * Unsigned Integer to float conversions
 *
 * Returns the result of converting the unsigned integer `a' to the
 * floating-point format. The conversion is performed according to the
 * IEC/IEEE Standard for Binary Floating-Point Arithmetic.
 */

static FloatParts uint_to_float(uint64_t a, float_status *status)
{
    FloatParts r = { .sign = false};

    if (a == 0) {
        r.cls = float_class_zero;
    } else {
        int spare_bits = clz64(a) - 1;
        r.cls = float_class_normal;
        r.exp = DECOMPOSED_BINARY_POINT - spare_bits;
        if (spare_bits < 0) {
            shift64RightJamming(a, -spare_bits, &a);
            r.frac = a;
        } else {
            r.frac = a << spare_bits;
        }
    }

    return r;
}

float16 uint64_to_float16(uint64_t a, float_status *status)
{
    FloatParts pa = uint_to_float(a, status);
    return float16_round_pack_canonical(pa, status);
}

float16 uint32_to_float16(uint32_t a, float_status *status)
{
    return uint64_to_float16(a, status);
}

float16 uint16_to_float16(uint16_t a, float_status *status)
{
    return uint64_to_float16(a, status);
}

float32 uint64_to_float32(uint64_t a, float_status *status)
{
    FloatParts pa = uint_to_float(a, status);
    return float32_round_pack_canonical(pa, status);
}

float32 uint32_to_float32(uint32_t a, float_status *status)
{
    return uint64_to_float32(a, status);
}

float32 uint16_to_float32(uint16_t a, float_status *status)
{
    return uint64_to_float32(a, status);
}

float64 uint64_to_float64(uint64_t a, float_status *status)
{
    FloatParts pa = uint_to_float(a, status);
    return float64_round_pack_canonical(pa, status);
}

float64 uint32_to_float64(uint32_t a, float_status *status)
{
    return uint64_to_float64(a, status);
}

float64 uint16_to_float64(uint16_t a, float_status *status)
{
    return uint64_to_float64(a, status);
}

1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709
/* Float Min/Max */
/* min() and max() functions. These can't be implemented as
 * 'compare and pick one input' because that would mishandle
 * NaNs and +0 vs -0.
 *
 * minnum() and maxnum() functions. These are similar to the min()
 * and max() functions but if one of the arguments is a QNaN and
 * the other is numerical then the numerical argument is returned.
 * SNaNs will get quietened before being returned.
 * minnum() and maxnum correspond to the IEEE 754-2008 minNum()
 * and maxNum() operations. min() and max() are the typical min/max
 * semantics provided by many CPUs which predate that specification.
 *
 * minnummag() and maxnummag() functions correspond to minNumMag()
 * and minNumMag() from the IEEE-754 2008.
 */
static FloatParts minmax_floats(FloatParts a, FloatParts b, bool ismin,
                                bool ieee, bool ismag, float_status *s)
{
    if (unlikely(is_nan(a.cls) || is_nan(b.cls))) {
        if (ieee) {
            /* Takes two floating-point values `a' and `b', one of
             * which is a NaN, and returns the appropriate NaN
             * result. If either `a' or `b' is a signaling NaN,
             * the invalid exception is raised.
             */
            if (is_snan(a.cls) || is_snan(b.cls)) {
                return pick_nan(a, b, s);
            } else if (is_nan(a.cls) && !is_nan(b.cls)) {
                return b;
            } else if (is_nan(b.cls) && !is_nan(a.cls)) {
                return a;
            }
        }
        return pick_nan(a, b, s);
    } else {
        int a_exp, b_exp;

        switch (a.cls) {
        case float_class_normal:
            a_exp = a.exp;
            break;
        case float_class_inf:
            a_exp = INT_MAX;
            break;
        case float_class_zero:
            a_exp = INT_MIN;
            break;
        default:
            g_assert_not_reached();
            break;
        }
        switch (b.cls) {
        case float_class_normal:
            b_exp = b.exp;
            break;
        case float_class_inf:
            b_exp = INT_MAX;
            break;
        case float_class_zero:
            b_exp = INT_MIN;
            break;
        default:
            g_assert_not_reached();
            break;
        }

1710 1711 1712 1713 1714 1715
        if (ismag && (a_exp != b_exp || a.frac != b.frac)) {
            bool a_less = a_exp < b_exp;
            if (a_exp == b_exp) {
                a_less = a.frac < b.frac;
            }
            return a_less ^ ismin ? b : a;
1716 1717
        }

1718
        if (a.sign == b.sign) {
1719 1720 1721 1722
            bool a_less = a_exp < b_exp;
            if (a_exp == b_exp) {
                a_less = a.frac < b.frac;
            }
1723
            return a.sign ^ a_less ^ ismin ? b : a;
1724
        } else {
1725
            return a.sign ^ ismin ? b : a;
1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763
        }
    }
}

#define MINMAX(sz, name, ismin, isiee, ismag)                           \
float ## sz float ## sz ## _ ## name(float ## sz a, float ## sz b,      \
                                     float_status *s)                   \
{                                                                       \
    FloatParts pa = float ## sz ## _unpack_canonical(a, s);             \
    FloatParts pb = float ## sz ## _unpack_canonical(b, s);             \
    FloatParts pr = minmax_floats(pa, pb, ismin, isiee, ismag, s);      \
                                                                        \
    return float ## sz ## _round_pack_canonical(pr, s);                 \
}

MINMAX(16, min, true, false, false)
MINMAX(16, minnum, true, true, false)
MINMAX(16, minnummag, true, true, true)
MINMAX(16, max, false, false, false)
MINMAX(16, maxnum, false, true, false)
MINMAX(16, maxnummag, false, true, true)

MINMAX(32, min, true, false, false)
MINMAX(32, minnum, true, true, false)
MINMAX(32, minnummag, true, true, true)
MINMAX(32, max, false, false, false)
MINMAX(32, maxnum, false, true, false)
MINMAX(32, maxnummag, false, true, true)

MINMAX(64, min, true, false, false)
MINMAX(64, minnum, true, true, false)
MINMAX(64, minnummag, true, true, true)
MINMAX(64, max, false, false, false)
MINMAX(64, maxnum, false, true, false)
MINMAX(64, maxnummag, false, true, true)

#undef MINMAX

1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843
/* Floating point compare */
static int compare_floats(FloatParts a, FloatParts b, bool is_quiet,
                          float_status *s)
{
    if (is_nan(a.cls) || is_nan(b.cls)) {
        if (!is_quiet ||
            a.cls == float_class_snan ||
            b.cls == float_class_snan) {
            s->float_exception_flags |= float_flag_invalid;
        }
        return float_relation_unordered;
    }

    if (a.cls == float_class_zero) {
        if (b.cls == float_class_zero) {
            return float_relation_equal;
        }
        return b.sign ? float_relation_greater : float_relation_less;
    } else if (b.cls == float_class_zero) {
        return a.sign ? float_relation_less : float_relation_greater;
    }

    /* The only really important thing about infinity is its sign. If
     * both are infinities the sign marks the smallest of the two.
     */
    if (a.cls == float_class_inf) {
        if ((b.cls == float_class_inf) && (a.sign == b.sign)) {
            return float_relation_equal;
        }
        return a.sign ? float_relation_less : float_relation_greater;
    } else if (b.cls == float_class_inf) {
        return b.sign ? float_relation_greater : float_relation_less;
    }

    if (a.sign != b.sign) {
        return a.sign ? float_relation_less : float_relation_greater;
    }

    if (a.exp == b.exp) {
        if (a.frac == b.frac) {
            return float_relation_equal;
        }
        if (a.sign) {
            return a.frac > b.frac ?
                float_relation_less : float_relation_greater;
        } else {
            return a.frac > b.frac ?
                float_relation_greater : float_relation_less;
        }
    } else {
        if (a.sign) {
            return a.exp > b.exp ? float_relation_less : float_relation_greater;
        } else {
            return a.exp > b.exp ? float_relation_greater : float_relation_less;
        }
    }
}

#define COMPARE(sz)                                                     \
int float ## sz ## _compare(float ## sz a, float ## sz b,               \
                            float_status *s)                            \
{                                                                       \
    FloatParts pa = float ## sz ## _unpack_canonical(a, s);             \
    FloatParts pb = float ## sz ## _unpack_canonical(b, s);             \
    return compare_floats(pa, pb, false, s);                            \
}                                                                       \
int float ## sz ## _compare_quiet(float ## sz a, float ## sz b,         \
                                  float_status *s)                      \
{                                                                       \
    FloatParts pa = float ## sz ## _unpack_canonical(a, s);             \
    FloatParts pb = float ## sz ## _unpack_canonical(b, s);             \
    return compare_floats(pa, pb, true, s);                             \
}

COMPARE(16)
COMPARE(32)
COMPARE(64)

#undef COMPARE

1844 1845 1846 1847 1848 1849 1850
/* Multiply A by 2 raised to the power N.  */
static FloatParts scalbn_decomposed(FloatParts a, int n, float_status *s)
{
    if (unlikely(is_nan(a.cls))) {
        return return_nan(a, s);
    }
    if (a.cls == float_class_normal) {
1851 1852 1853 1854 1855 1856
        /* The largest float type (even though not supported by FloatParts)
         * is float128, which has a 15 bit exponent.  Bounding N to 16 bits
         * still allows rounding to infinity, without allowing overflow
         * within the int32_t that backs FloatParts.exp.
         */
        n = MIN(MAX(n, -0x10000), 0x10000);
1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882
        a.exp += n;
    }
    return a;
}

float16 float16_scalbn(float16 a, int n, float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pr = scalbn_decomposed(pa, n, status);
    return float16_round_pack_canonical(pr, status);
}

float32 float32_scalbn(float32 a, int n, float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pr = scalbn_decomposed(pa, n, status);
    return float32_round_pack_canonical(pr, status);
}

float64 float64_scalbn(float64 a, int n, float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pr = scalbn_decomposed(pa, n, status);
    return float64_round_pack_canonical(pr, status);
}

1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907
/*
 * Square Root
 *
 * The old softfloat code did an approximation step before zeroing in
 * on the final result. However for simpleness we just compute the
 * square root by iterating down from the implicit bit to enough extra
 * bits to ensure we get a correctly rounded result.
 *
 * This does mean however the calculation is slower than before,
 * especially for 64 bit floats.
 */

static FloatParts sqrt_float(FloatParts a, float_status *s, const FloatFmt *p)
{
    uint64_t a_frac, r_frac, s_frac;
    int bit, last_bit;

    if (is_nan(a.cls)) {
        return return_nan(a, s);
    }
    if (a.cls == float_class_zero) {
        return a;  /* sqrt(+-0) = +-0 */
    }
    if (a.sign) {
        s->float_exception_flags |= float_flag_invalid;
1908
        return parts_default_nan(s);
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    }
    if (a.cls == float_class_inf) {
        return a;  /* sqrt(+inf) = +inf */
    }

    assert(a.cls == float_class_normal);

    /* We need two overflow bits at the top. Adding room for that is a
     * right shift. If the exponent is odd, we can discard the low bit
     * by multiplying the fraction by 2; that's a left shift. Combine
     * those and we shift right if the exponent is even.
     */
    a_frac = a.frac;
    if (!(a.exp & 1)) {
        a_frac >>= 1;
    }
    a.exp >>= 1;

    /* Bit-by-bit computation of sqrt.  */
    r_frac = 0;
    s_frac = 0;

    /* Iterate from implicit bit down to the 3 extra bits to compute a
     * properly rounded result. Remember we've inserted one more bit
     * at the top, so these positions are one less.
     */
    bit = DECOMPOSED_BINARY_POINT - 1;
    last_bit = MAX(p->frac_shift - 4, 0);
    do {
        uint64_t q = 1ULL << bit;
        uint64_t t_frac = s_frac + q;
        if (t_frac <= a_frac) {
            s_frac = t_frac + q;
            a_frac -= t_frac;
            r_frac += q;
        }
        a_frac <<= 1;
    } while (--bit >= last_bit);

    /* Undo the right shift done above. If there is any remaining
     * fraction, the result is inexact. Set the sticky bit.
     */
    a.frac = (r_frac << 1) + (a_frac != 0);

    return a;
}

float16 __attribute__((flatten)) float16_sqrt(float16 a, float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pr = sqrt_float(pa, status, &float16_params);
    return float16_round_pack_canonical(pr, status);
}

float32 __attribute__((flatten)) float32_sqrt(float32 a, float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pr = sqrt_float(pa, status, &float32_params);
    return float32_round_pack_canonical(pr, status);
}

float64 __attribute__((flatten)) float64_sqrt(float64 a, float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pr = sqrt_float(pa, status, &float64_params);
    return float64_round_pack_canonical(pr, status);
}


B
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1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988
/*----------------------------------------------------------------------------
| Takes a 64-bit fixed-point value `absZ' with binary point between bits 6
| and 7, and returns the properly rounded 32-bit integer corresponding to the
| input.  If `zSign' is 1, the input is negated before being converted to an
| integer.  Bit 63 of `absZ' must be zero.  Ordinarily, the fixed-point input
| is simply rounded to an integer, with the inexact exception raised if the
| input cannot be represented exactly as an integer.  However, if the fixed-
| point input is too large, the invalid exception is raised and the largest
| positive or negative integer is returned.
*----------------------------------------------------------------------------*/

1989
static int32_t roundAndPackInt32(flag zSign, uint64_t absZ, float_status *status)
B
bellard 已提交
1990
{
1991
    int8_t roundingMode;
B
bellard 已提交
1992
    flag roundNearestEven;
1993
    int8_t roundIncrement, roundBits;
1994
    int32_t z;
B
bellard 已提交
1995

1996
    roundingMode = status->float_rounding_mode;
B
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1997
    roundNearestEven = ( roundingMode == float_round_nearest_even );
1998 1999
    switch (roundingMode) {
    case float_round_nearest_even:
2000
    case float_round_ties_away:
2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013
        roundIncrement = 0x40;
        break;
    case float_round_to_zero:
        roundIncrement = 0;
        break;
    case float_round_up:
        roundIncrement = zSign ? 0 : 0x7f;
        break;
    case float_round_down:
        roundIncrement = zSign ? 0x7f : 0;
        break;
    default:
        abort();
B
bellard 已提交
2014 2015 2016 2017 2018 2019 2020
    }
    roundBits = absZ & 0x7F;
    absZ = ( absZ + roundIncrement )>>7;
    absZ &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
    z = absZ;
    if ( zSign ) z = - z;
    if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {
2021
        float_raise(float_flag_invalid, status);
2022
        return zSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
B
bellard 已提交
2023
    }
2024 2025 2026
    if (roundBits) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
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2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042
    return z;

}

/*----------------------------------------------------------------------------
| Takes the 128-bit fixed-point value formed by concatenating `absZ0' and
| `absZ1', with binary point between bits 63 and 64 (between the input words),
| and returns the properly rounded 64-bit integer corresponding to the input.
| If `zSign' is 1, the input is negated before being converted to an integer.
| Ordinarily, the fixed-point input is simply rounded to an integer, with
| the inexact exception raised if the input cannot be represented exactly as
| an integer.  However, if the fixed-point input is too large, the invalid
| exception is raised and the largest positive or negative integer is
| returned.
*----------------------------------------------------------------------------*/

2043
static int64_t roundAndPackInt64(flag zSign, uint64_t absZ0, uint64_t absZ1,
2044
                               float_status *status)
B
bellard 已提交
2045
{
2046
    int8_t roundingMode;
B
bellard 已提交
2047
    flag roundNearestEven, increment;
2048
    int64_t z;
B
bellard 已提交
2049

2050
    roundingMode = status->float_rounding_mode;
B
bellard 已提交
2051
    roundNearestEven = ( roundingMode == float_round_nearest_even );
2052 2053
    switch (roundingMode) {
    case float_round_nearest_even:
2054
    case float_round_ties_away:
2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067
        increment = ((int64_t) absZ1 < 0);
        break;
    case float_round_to_zero:
        increment = 0;
        break;
    case float_round_up:
        increment = !zSign && absZ1;
        break;
    case float_round_down:
        increment = zSign && absZ1;
        break;
    default:
        abort();
B
bellard 已提交
2068 2069 2070 2071
    }
    if ( increment ) {
        ++absZ0;
        if ( absZ0 == 0 ) goto overflow;
2072
        absZ0 &= ~ ( ( (uint64_t) ( absZ1<<1 ) == 0 ) & roundNearestEven );
B
bellard 已提交
2073 2074 2075 2076 2077
    }
    z = absZ0;
    if ( zSign ) z = - z;
    if ( z && ( ( z < 0 ) ^ zSign ) ) {
 overflow:
2078
        float_raise(float_flag_invalid, status);
B
bellard 已提交
2079
        return
2080
              zSign ? (int64_t) LIT64( 0x8000000000000000 )
B
bellard 已提交
2081 2082
            : LIT64( 0x7FFFFFFFFFFFFFFF );
    }
2083 2084 2085
    if (absZ1) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
2086 2087 2088 2089
    return z;

}

2090 2091 2092 2093 2094 2095 2096 2097 2098 2099
/*----------------------------------------------------------------------------
| Takes the 128-bit fixed-point value formed by concatenating `absZ0' and
| `absZ1', with binary point between bits 63 and 64 (between the input words),
| and returns the properly rounded 64-bit unsigned integer corresponding to the
| input.  Ordinarily, the fixed-point input is simply rounded to an integer,
| with the inexact exception raised if the input cannot be represented exactly
| as an integer.  However, if the fixed-point input is too large, the invalid
| exception is raised and the largest unsigned integer is returned.
*----------------------------------------------------------------------------*/

2100
static int64_t roundAndPackUint64(flag zSign, uint64_t absZ0,
2101
                                uint64_t absZ1, float_status *status)
2102
{
2103
    int8_t roundingMode;
2104 2105
    flag roundNearestEven, increment;

2106
    roundingMode = status->float_rounding_mode;
2107
    roundNearestEven = (roundingMode == float_round_nearest_even);
2108 2109
    switch (roundingMode) {
    case float_round_nearest_even:
2110
    case float_round_ties_away:
2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123
        increment = ((int64_t)absZ1 < 0);
        break;
    case float_round_to_zero:
        increment = 0;
        break;
    case float_round_up:
        increment = !zSign && absZ1;
        break;
    case float_round_down:
        increment = zSign && absZ1;
        break;
    default:
        abort();
2124 2125 2126 2127
    }
    if (increment) {
        ++absZ0;
        if (absZ0 == 0) {
2128
            float_raise(float_flag_invalid, status);
2129 2130 2131 2132 2133 2134
            return LIT64(0xFFFFFFFFFFFFFFFF);
        }
        absZ0 &= ~(((uint64_t)(absZ1<<1) == 0) & roundNearestEven);
    }

    if (zSign && absZ0) {
2135
        float_raise(float_flag_invalid, status);
2136 2137 2138 2139
        return 0;
    }

    if (absZ1) {
2140
        status->float_exception_flags |= float_flag_inexact;
2141 2142 2143 2144
    }
    return absZ0;
}

2145 2146 2147 2148
/*----------------------------------------------------------------------------
| If `a' is denormal and we are in flush-to-zero mode then set the
| input-denormal exception and return zero. Otherwise just return the value.
*----------------------------------------------------------------------------*/
2149
float32 float32_squash_input_denormal(float32 a, float_status *status)
2150
{
2151
    if (status->flush_inputs_to_zero) {
2152
        if (extractFloat32Exp(a) == 0 && extractFloat32Frac(a) != 0) {
2153
            float_raise(float_flag_input_denormal, status);
2154 2155 2156 2157 2158 2159
            return make_float32(float32_val(a) & 0x80000000);
        }
    }
    return a;
}

B
bellard 已提交
2160 2161 2162 2163 2164 2165 2166 2167
/*----------------------------------------------------------------------------
| Normalizes the subnormal single-precision floating-point value represented
| by the denormalized significand `aSig'.  The normalized exponent and
| significand are stored at the locations pointed to by `zExpPtr' and
| `zSigPtr', respectively.
*----------------------------------------------------------------------------*/

static void
2168
 normalizeFloat32Subnormal(uint32_t aSig, int *zExpPtr, uint32_t *zSigPtr)
B
bellard 已提交
2169
{
2170
    int8_t shiftCount;
B
bellard 已提交
2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198 2199

    shiftCount = countLeadingZeros32( aSig ) - 8;
    *zSigPtr = aSig<<shiftCount;
    *zExpPtr = 1 - shiftCount;

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand `zSig', and returns the proper single-precision floating-
| point value corresponding to the abstract input.  Ordinarily, the abstract
| value is simply rounded and packed into the single-precision format, with
| the inexact exception raised if the abstract input cannot be represented
| exactly.  However, if the abstract value is too large, the overflow and
| inexact exceptions are raised and an infinity or maximal finite value is
| returned.  If the abstract value is too small, the input value is rounded to
| a subnormal number, and the underflow and inexact exceptions are raised if
| the abstract input cannot be represented exactly as a subnormal single-
| precision floating-point number.
|     The input significand `zSig' has its binary point between bits 30
| and 29, which is 7 bits to the left of the usual location.  This shifted
| significand must be normalized or smaller.  If `zSig' is not normalized,
| `zExp' must be 0; in that case, the result returned is a subnormal number,
| and it must not require rounding.  In the usual case that `zSig' is
| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.
| The handling of underflow and overflow follows the IEC/IEEE Standard for
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

2200
static float32 roundAndPackFloat32(flag zSign, int zExp, uint32_t zSig,
2201
                                   float_status *status)
B
bellard 已提交
2202
{
2203
    int8_t roundingMode;
B
bellard 已提交
2204
    flag roundNearestEven;
2205
    int8_t roundIncrement, roundBits;
B
bellard 已提交
2206 2207
    flag isTiny;

2208
    roundingMode = status->float_rounding_mode;
B
bellard 已提交
2209
    roundNearestEven = ( roundingMode == float_round_nearest_even );
2210 2211
    switch (roundingMode) {
    case float_round_nearest_even:
2212
    case float_round_ties_away:
2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226
        roundIncrement = 0x40;
        break;
    case float_round_to_zero:
        roundIncrement = 0;
        break;
    case float_round_up:
        roundIncrement = zSign ? 0 : 0x7f;
        break;
    case float_round_down:
        roundIncrement = zSign ? 0x7f : 0;
        break;
    default:
        abort();
        break;
B
bellard 已提交
2227 2228
    }
    roundBits = zSig & 0x7F;
2229
    if ( 0xFD <= (uint16_t) zExp ) {
B
bellard 已提交
2230 2231
        if (    ( 0xFD < zExp )
             || (    ( zExp == 0xFD )
2232
                  && ( (int32_t) ( zSig + roundIncrement ) < 0 ) )
B
bellard 已提交
2233
           ) {
2234
            float_raise(float_flag_overflow | float_flag_inexact, status);
2235
            return packFloat32( zSign, 0xFF, - ( roundIncrement == 0 ));
B
bellard 已提交
2236 2237
        }
        if ( zExp < 0 ) {
2238
            if (status->flush_to_zero) {
2239
                float_raise(float_flag_output_denormal, status);
2240 2241
                return packFloat32(zSign, 0, 0);
            }
B
bellard 已提交
2242
            isTiny =
2243 2244
                (status->float_detect_tininess
                 == float_tininess_before_rounding)
B
bellard 已提交
2245 2246 2247 2248 2249
                || ( zExp < -1 )
                || ( zSig + roundIncrement < 0x80000000 );
            shift32RightJamming( zSig, - zExp, &zSig );
            zExp = 0;
            roundBits = zSig & 0x7F;
2250 2251 2252
            if (isTiny && roundBits) {
                float_raise(float_flag_underflow, status);
            }
B
bellard 已提交
2253 2254
        }
    }
2255 2256 2257
    if (roundBits) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 2271 2272 2273 2274
    zSig = ( zSig + roundIncrement )>>7;
    zSig &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
    if ( zSig == 0 ) zExp = 0;
    return packFloat32( zSign, zExp, zSig );

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand `zSig', and returns the proper single-precision floating-
| point value corresponding to the abstract input.  This routine is just like
| `roundAndPackFloat32' except that `zSig' does not have to be normalized.
| Bit 31 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''
| floating-point exponent.
*----------------------------------------------------------------------------*/

static float32
2275
 normalizeRoundAndPackFloat32(flag zSign, int zExp, uint32_t zSig,
2276
                              float_status *status)
B
bellard 已提交
2277
{
2278
    int8_t shiftCount;
B
bellard 已提交
2279 2280

    shiftCount = countLeadingZeros32( zSig ) - 1;
2281 2282
    return roundAndPackFloat32(zSign, zExp - shiftCount, zSig<<shiftCount,
                               status);
B
bellard 已提交
2283 2284 2285

}

2286 2287 2288 2289
/*----------------------------------------------------------------------------
| If `a' is denormal and we are in flush-to-zero mode then set the
| input-denormal exception and return zero. Otherwise just return the value.
*----------------------------------------------------------------------------*/
2290
float64 float64_squash_input_denormal(float64 a, float_status *status)
2291
{
2292
    if (status->flush_inputs_to_zero) {
2293
        if (extractFloat64Exp(a) == 0 && extractFloat64Frac(a) != 0) {
2294
            float_raise(float_flag_input_denormal, status);
2295 2296 2297 2298 2299 2300
            return make_float64(float64_val(a) & (1ULL << 63));
        }
    }
    return a;
}

B
bellard 已提交
2301 2302 2303 2304 2305 2306 2307 2308
/*----------------------------------------------------------------------------
| Normalizes the subnormal double-precision floating-point value represented
| by the denormalized significand `aSig'.  The normalized exponent and
| significand are stored at the locations pointed to by `zExpPtr' and
| `zSigPtr', respectively.
*----------------------------------------------------------------------------*/

static void
2309
 normalizeFloat64Subnormal(uint64_t aSig, int *zExpPtr, uint64_t *zSigPtr)
B
bellard 已提交
2310
{
2311
    int8_t shiftCount;
B
bellard 已提交
2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329

    shiftCount = countLeadingZeros64( aSig ) - 11;
    *zSigPtr = aSig<<shiftCount;
    *zExpPtr = 1 - shiftCount;

}

/*----------------------------------------------------------------------------
| Packs the sign `zSign', exponent `zExp', and significand `zSig' into a
| double-precision floating-point value, returning the result.  After being
| shifted into the proper positions, the three fields are simply added
| together to form the result.  This means that any integer portion of `zSig'
| will be added into the exponent.  Since a properly normalized significand
| will have an integer portion equal to 1, the `zExp' input should be 1 less
| than the desired result exponent whenever `zSig' is a complete, normalized
| significand.
*----------------------------------------------------------------------------*/

2330
static inline float64 packFloat64(flag zSign, int zExp, uint64_t zSig)
B
bellard 已提交
2331 2332
{

2333
    return make_float64(
2334
        ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<52 ) + zSig);
B
bellard 已提交
2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand `zSig', and returns the proper double-precision floating-
| point value corresponding to the abstract input.  Ordinarily, the abstract
| value is simply rounded and packed into the double-precision format, with
| the inexact exception raised if the abstract input cannot be represented
| exactly.  However, if the abstract value is too large, the overflow and
| inexact exceptions are raised and an infinity or maximal finite value is
2346 2347 2348
| returned.  If the abstract value is too small, the input value is rounded to
| a subnormal number, and the underflow and inexact exceptions are raised if
| the abstract input cannot be represented exactly as a subnormal double-
B
bellard 已提交
2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359
| precision floating-point number.
|     The input significand `zSig' has its binary point between bits 62
| and 61, which is 10 bits to the left of the usual location.  This shifted
| significand must be normalized or smaller.  If `zSig' is not normalized,
| `zExp' must be 0; in that case, the result returned is a subnormal number,
| and it must not require rounding.  In the usual case that `zSig' is
| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.
| The handling of underflow and overflow follows the IEC/IEEE Standard for
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

2360
static float64 roundAndPackFloat64(flag zSign, int zExp, uint64_t zSig,
2361
                                   float_status *status)
B
bellard 已提交
2362
{
2363
    int8_t roundingMode;
B
bellard 已提交
2364
    flag roundNearestEven;
2365
    int roundIncrement, roundBits;
B
bellard 已提交
2366 2367
    flag isTiny;

2368
    roundingMode = status->float_rounding_mode;
B
bellard 已提交
2369
    roundNearestEven = ( roundingMode == float_round_nearest_even );
2370 2371
    switch (roundingMode) {
    case float_round_nearest_even:
2372
    case float_round_ties_away:
2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383
        roundIncrement = 0x200;
        break;
    case float_round_to_zero:
        roundIncrement = 0;
        break;
    case float_round_up:
        roundIncrement = zSign ? 0 : 0x3ff;
        break;
    case float_round_down:
        roundIncrement = zSign ? 0x3ff : 0;
        break;
2384 2385 2386
    case float_round_to_odd:
        roundIncrement = (zSig & 0x400) ? 0 : 0x3ff;
        break;
2387 2388
    default:
        abort();
B
bellard 已提交
2389 2390
    }
    roundBits = zSig & 0x3FF;
2391
    if ( 0x7FD <= (uint16_t) zExp ) {
B
bellard 已提交
2392 2393
        if (    ( 0x7FD < zExp )
             || (    ( zExp == 0x7FD )
2394
                  && ( (int64_t) ( zSig + roundIncrement ) < 0 ) )
B
bellard 已提交
2395
           ) {
2396 2397
            bool overflow_to_inf = roundingMode != float_round_to_odd &&
                                   roundIncrement != 0;
2398
            float_raise(float_flag_overflow | float_flag_inexact, status);
2399
            return packFloat64(zSign, 0x7FF, -(!overflow_to_inf));
B
bellard 已提交
2400 2401
        }
        if ( zExp < 0 ) {
2402
            if (status->flush_to_zero) {
2403
                float_raise(float_flag_output_denormal, status);
2404 2405
                return packFloat64(zSign, 0, 0);
            }
B
bellard 已提交
2406
            isTiny =
2407 2408
                   (status->float_detect_tininess
                    == float_tininess_before_rounding)
B
bellard 已提交
2409 2410 2411 2412 2413
                || ( zExp < -1 )
                || ( zSig + roundIncrement < LIT64( 0x8000000000000000 ) );
            shift64RightJamming( zSig, - zExp, &zSig );
            zExp = 0;
            roundBits = zSig & 0x3FF;
2414 2415 2416
            if (isTiny && roundBits) {
                float_raise(float_flag_underflow, status);
            }
2417 2418 2419 2420 2421 2422 2423
            if (roundingMode == float_round_to_odd) {
                /*
                 * For round-to-odd case, the roundIncrement depends on
                 * zSig which just changed.
                 */
                roundIncrement = (zSig & 0x400) ? 0 : 0x3ff;
            }
B
bellard 已提交
2424 2425
        }
    }
2426 2427 2428
    if (roundBits) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
2429 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439 2440 2441 2442 2443 2444 2445
    zSig = ( zSig + roundIncrement )>>10;
    zSig &= ~ ( ( ( roundBits ^ 0x200 ) == 0 ) & roundNearestEven );
    if ( zSig == 0 ) zExp = 0;
    return packFloat64( zSign, zExp, zSig );

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand `zSig', and returns the proper double-precision floating-
| point value corresponding to the abstract input.  This routine is just like
| `roundAndPackFloat64' except that `zSig' does not have to be normalized.
| Bit 63 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''
| floating-point exponent.
*----------------------------------------------------------------------------*/

static float64
2446
 normalizeRoundAndPackFloat64(flag zSign, int zExp, uint64_t zSig,
2447
                              float_status *status)
B
bellard 已提交
2448
{
2449
    int8_t shiftCount;
B
bellard 已提交
2450 2451

    shiftCount = countLeadingZeros64( zSig ) - 1;
2452 2453
    return roundAndPackFloat64(zSign, zExp - shiftCount, zSig<<shiftCount,
                               status);
B
bellard 已提交
2454 2455 2456 2457 2458 2459 2460 2461 2462 2463

}

/*----------------------------------------------------------------------------
| Normalizes the subnormal extended double-precision floating-point value
| represented by the denormalized significand `aSig'.  The normalized exponent
| and significand are stored at the locations pointed to by `zExpPtr' and
| `zSigPtr', respectively.
*----------------------------------------------------------------------------*/

2464 2465
void normalizeFloatx80Subnormal(uint64_t aSig, int32_t *zExpPtr,
                                uint64_t *zSigPtr)
B
bellard 已提交
2466
{
2467
    int8_t shiftCount;
B
bellard 已提交
2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492 2493 2494 2495 2496 2497

    shiftCount = countLeadingZeros64( aSig );
    *zSigPtr = aSig<<shiftCount;
    *zExpPtr = 1 - shiftCount;
}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and extended significand formed by the concatenation of `zSig0' and `zSig1',
| and returns the proper extended double-precision floating-point value
| corresponding to the abstract input.  Ordinarily, the abstract value is
| rounded and packed into the extended double-precision format, with the
| inexact exception raised if the abstract input cannot be represented
| exactly.  However, if the abstract value is too large, the overflow and
| inexact exceptions are raised and an infinity or maximal finite value is
| returned.  If the abstract value is too small, the input value is rounded to
| a subnormal number, and the underflow and inexact exceptions are raised if
| the abstract input cannot be represented exactly as a subnormal extended
| double-precision floating-point number.
|     If `roundingPrecision' is 32 or 64, the result is rounded to the same
| number of bits as single or double precision, respectively.  Otherwise, the
| result is rounded to the full precision of the extended double-precision
| format.
|     The input significand must be normalized or smaller.  If the input
| significand is not normalized, `zExp' must be 0; in that case, the result
| returned is a subnormal number, and it must not require rounding.  The
| handling of underflow and overflow follows the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

2498 2499 2500
floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign,
                              int32_t zExp, uint64_t zSig0, uint64_t zSig1,
                              float_status *status)
B
bellard 已提交
2501
{
2502
    int8_t roundingMode;
B
bellard 已提交
2503
    flag roundNearestEven, increment, isTiny;
2504
    int64_t roundIncrement, roundMask, roundBits;
B
bellard 已提交
2505

2506
    roundingMode = status->float_rounding_mode;
B
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2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519 2520
    roundNearestEven = ( roundingMode == float_round_nearest_even );
    if ( roundingPrecision == 80 ) goto precision80;
    if ( roundingPrecision == 64 ) {
        roundIncrement = LIT64( 0x0000000000000400 );
        roundMask = LIT64( 0x00000000000007FF );
    }
    else if ( roundingPrecision == 32 ) {
        roundIncrement = LIT64( 0x0000008000000000 );
        roundMask = LIT64( 0x000000FFFFFFFFFF );
    }
    else {
        goto precision80;
    }
    zSig0 |= ( zSig1 != 0 );
2521 2522
    switch (roundingMode) {
    case float_round_nearest_even:
2523
    case float_round_ties_away:
2524 2525 2526 2527 2528 2529 2530 2531 2532 2533 2534 2535
        break;
    case float_round_to_zero:
        roundIncrement = 0;
        break;
    case float_round_up:
        roundIncrement = zSign ? 0 : roundMask;
        break;
    case float_round_down:
        roundIncrement = zSign ? roundMask : 0;
        break;
    default:
        abort();
B
bellard 已提交
2536 2537
    }
    roundBits = zSig0 & roundMask;
2538
    if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) {
B
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2539 2540 2541 2542 2543 2544
        if (    ( 0x7FFE < zExp )
             || ( ( zExp == 0x7FFE ) && ( zSig0 + roundIncrement < zSig0 ) )
           ) {
            goto overflow;
        }
        if ( zExp <= 0 ) {
2545
            if (status->flush_to_zero) {
2546
                float_raise(float_flag_output_denormal, status);
2547 2548
                return packFloatx80(zSign, 0, 0);
            }
B
bellard 已提交
2549
            isTiny =
2550 2551
                   (status->float_detect_tininess
                    == float_tininess_before_rounding)
B
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2552 2553 2554 2555 2556
                || ( zExp < 0 )
                || ( zSig0 <= zSig0 + roundIncrement );
            shift64RightJamming( zSig0, 1 - zExp, &zSig0 );
            zExp = 0;
            roundBits = zSig0 & roundMask;
2557 2558 2559
            if (isTiny && roundBits) {
                float_raise(float_flag_underflow, status);
            }
2560 2561 2562
            if (roundBits) {
                status->float_exception_flags |= float_flag_inexact;
            }
B
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2563
            zSig0 += roundIncrement;
2564
            if ( (int64_t) zSig0 < 0 ) zExp = 1;
B
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2565 2566 2567 2568 2569 2570 2571 2572
            roundIncrement = roundMask + 1;
            if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {
                roundMask |= roundIncrement;
            }
            zSig0 &= ~ roundMask;
            return packFloatx80( zSign, zExp, zSig0 );
        }
    }
2573 2574 2575
    if (roundBits) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
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2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588
    zSig0 += roundIncrement;
    if ( zSig0 < roundIncrement ) {
        ++zExp;
        zSig0 = LIT64( 0x8000000000000000 );
    }
    roundIncrement = roundMask + 1;
    if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {
        roundMask |= roundIncrement;
    }
    zSig0 &= ~ roundMask;
    if ( zSig0 == 0 ) zExp = 0;
    return packFloatx80( zSign, zExp, zSig0 );
 precision80:
2589 2590
    switch (roundingMode) {
    case float_round_nearest_even:
2591
    case float_round_ties_away:
2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604
        increment = ((int64_t)zSig1 < 0);
        break;
    case float_round_to_zero:
        increment = 0;
        break;
    case float_round_up:
        increment = !zSign && zSig1;
        break;
    case float_round_down:
        increment = zSign && zSig1;
        break;
    default:
        abort();
B
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2605
    }
2606
    if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) {
B
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2607 2608 2609 2610 2611 2612 2613 2614
        if (    ( 0x7FFE < zExp )
             || (    ( zExp == 0x7FFE )
                  && ( zSig0 == LIT64( 0xFFFFFFFFFFFFFFFF ) )
                  && increment
                )
           ) {
            roundMask = 0;
 overflow:
2615
            float_raise(float_flag_overflow | float_flag_inexact, status);
B
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2616 2617 2618 2619 2620 2621
            if (    ( roundingMode == float_round_to_zero )
                 || ( zSign && ( roundingMode == float_round_up ) )
                 || ( ! zSign && ( roundingMode == float_round_down ) )
               ) {
                return packFloatx80( zSign, 0x7FFE, ~ roundMask );
            }
2622 2623 2624
            return packFloatx80(zSign,
                                floatx80_infinity_high,
                                floatx80_infinity_low);
B
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2625 2626 2627
        }
        if ( zExp <= 0 ) {
            isTiny =
2628 2629
                   (status->float_detect_tininess
                    == float_tininess_before_rounding)
B
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2630 2631 2632 2633 2634
                || ( zExp < 0 )
                || ! increment
                || ( zSig0 < LIT64( 0xFFFFFFFFFFFFFFFF ) );
            shift64ExtraRightJamming( zSig0, zSig1, 1 - zExp, &zSig0, &zSig1 );
            zExp = 0;
2635 2636 2637
            if (isTiny && zSig1) {
                float_raise(float_flag_underflow, status);
            }
2638 2639 2640
            if (zSig1) {
                status->float_exception_flags |= float_flag_inexact;
            }
2641 2642
            switch (roundingMode) {
            case float_round_nearest_even:
2643
            case float_round_ties_away:
2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655 2656
                increment = ((int64_t)zSig1 < 0);
                break;
            case float_round_to_zero:
                increment = 0;
                break;
            case float_round_up:
                increment = !zSign && zSig1;
                break;
            case float_round_down:
                increment = zSign && zSig1;
                break;
            default:
                abort();
B
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2657 2658 2659 2660
            }
            if ( increment ) {
                ++zSig0;
                zSig0 &=
2661 2662
                    ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );
                if ( (int64_t) zSig0 < 0 ) zExp = 1;
B
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2663 2664 2665 2666
            }
            return packFloatx80( zSign, zExp, zSig0 );
        }
    }
2667 2668 2669
    if (zSig1) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
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2670 2671 2672 2673 2674 2675 2676
    if ( increment ) {
        ++zSig0;
        if ( zSig0 == 0 ) {
            ++zExp;
            zSig0 = LIT64( 0x8000000000000000 );
        }
        else {
2677
            zSig0 &= ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );
B
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2678 2679 2680 2681 2682 2683 2684 2685 2686 2687 2688 2689 2690 2691 2692 2693 2694 2695
        }
    }
    else {
        if ( zSig0 == 0 ) zExp = 0;
    }
    return packFloatx80( zSign, zExp, zSig0 );

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent
| `zExp', and significand formed by the concatenation of `zSig0' and `zSig1',
| and returns the proper extended double-precision floating-point value
| corresponding to the abstract input.  This routine is just like
| `roundAndPackFloatx80' except that the input significand does not have to be
| normalized.
*----------------------------------------------------------------------------*/

2696 2697 2698 2699
floatx80 normalizeRoundAndPackFloatx80(int8_t roundingPrecision,
                                       flag zSign, int32_t zExp,
                                       uint64_t zSig0, uint64_t zSig1,
                                       float_status *status)
B
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2700
{
2701
    int8_t shiftCount;
B
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2702 2703 2704 2705 2706 2707 2708 2709 2710

    if ( zSig0 == 0 ) {
        zSig0 = zSig1;
        zSig1 = 0;
        zExp -= 64;
    }
    shiftCount = countLeadingZeros64( zSig0 );
    shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
    zExp -= shiftCount;
2711 2712
    return roundAndPackFloatx80(roundingPrecision, zSign, zExp,
                                zSig0, zSig1, status);
B
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2713 2714 2715 2716 2717 2718 2719 2720

}

/*----------------------------------------------------------------------------
| Returns the least-significant 64 fraction bits of the quadruple-precision
| floating-point value `a'.
*----------------------------------------------------------------------------*/

2721
static inline uint64_t extractFloat128Frac1( float128 a )
B
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2722 2723 2724 2725 2726 2727 2728 2729 2730 2731 2732
{

    return a.low;

}

/*----------------------------------------------------------------------------
| Returns the most-significant 48 fraction bits of the quadruple-precision
| floating-point value `a'.
*----------------------------------------------------------------------------*/

2733
static inline uint64_t extractFloat128Frac0( float128 a )
B
bellard 已提交
2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744
{

    return a.high & LIT64( 0x0000FFFFFFFFFFFF );

}

/*----------------------------------------------------------------------------
| Returns the exponent bits of the quadruple-precision floating-point value
| `a'.
*----------------------------------------------------------------------------*/

2745
static inline int32_t extractFloat128Exp( float128 a )
B
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2746 2747 2748 2749 2750 2751 2752 2753 2754 2755
{

    return ( a.high>>48 ) & 0x7FFF;

}

/*----------------------------------------------------------------------------
| Returns the sign bit of the quadruple-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

2756
static inline flag extractFloat128Sign( float128 a )
B
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2757 2758 2759 2760 2761 2762 2763 2764 2765 2766 2767 2768 2769 2770 2771 2772 2773 2774
{

    return a.high>>63;

}

/*----------------------------------------------------------------------------
| Normalizes the subnormal quadruple-precision floating-point value
| represented by the denormalized significand formed by the concatenation of
| `aSig0' and `aSig1'.  The normalized exponent is stored at the location
| pointed to by `zExpPtr'.  The most significant 49 bits of the normalized
| significand are stored at the location pointed to by `zSig0Ptr', and the
| least significant 64 bits of the normalized significand are stored at the
| location pointed to by `zSig1Ptr'.
*----------------------------------------------------------------------------*/

static void
 normalizeFloat128Subnormal(
2775 2776
     uint64_t aSig0,
     uint64_t aSig1,
2777
     int32_t *zExpPtr,
2778 2779
     uint64_t *zSig0Ptr,
     uint64_t *zSig1Ptr
B
bellard 已提交
2780 2781
 )
{
2782
    int8_t shiftCount;
B
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2783 2784 2785 2786 2787 2788 2789 2790 2791 2792 2793 2794 2795 2796 2797 2798 2799 2800 2801 2802 2803 2804 2805 2806 2807 2808 2809 2810 2811 2812 2813 2814 2815 2816

    if ( aSig0 == 0 ) {
        shiftCount = countLeadingZeros64( aSig1 ) - 15;
        if ( shiftCount < 0 ) {
            *zSig0Ptr = aSig1>>( - shiftCount );
            *zSig1Ptr = aSig1<<( shiftCount & 63 );
        }
        else {
            *zSig0Ptr = aSig1<<shiftCount;
            *zSig1Ptr = 0;
        }
        *zExpPtr = - shiftCount - 63;
    }
    else {
        shiftCount = countLeadingZeros64( aSig0 ) - 15;
        shortShift128Left( aSig0, aSig1, shiftCount, zSig0Ptr, zSig1Ptr );
        *zExpPtr = 1 - shiftCount;
    }

}

/*----------------------------------------------------------------------------
| Packs the sign `zSign', the exponent `zExp', and the significand formed
| by the concatenation of `zSig0' and `zSig1' into a quadruple-precision
| floating-point value, returning the result.  After being shifted into the
| proper positions, the three fields `zSign', `zExp', and `zSig0' are simply
| added together to form the most significant 32 bits of the result.  This
| means that any integer portion of `zSig0' will be added into the exponent.
| Since a properly normalized significand will have an integer portion equal
| to 1, the `zExp' input should be 1 less than the desired result exponent
| whenever `zSig0' and `zSig1' concatenated form a complete, normalized
| significand.
*----------------------------------------------------------------------------*/

2817
static inline float128
2818
 packFloat128( flag zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1 )
B
bellard 已提交
2819 2820 2821 2822
{
    float128 z;

    z.low = zSig1;
2823
    z.high = ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<48 ) + zSig0;
B
bellard 已提交
2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836 2837 2838 2839 2840 2841 2842 2843 2844 2845 2846 2847 2848
    return z;

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and extended significand formed by the concatenation of `zSig0', `zSig1',
| and `zSig2', and returns the proper quadruple-precision floating-point value
| corresponding to the abstract input.  Ordinarily, the abstract value is
| simply rounded and packed into the quadruple-precision format, with the
| inexact exception raised if the abstract input cannot be represented
| exactly.  However, if the abstract value is too large, the overflow and
| inexact exceptions are raised and an infinity or maximal finite value is
| returned.  If the abstract value is too small, the input value is rounded to
| a subnormal number, and the underflow and inexact exceptions are raised if
| the abstract input cannot be represented exactly as a subnormal quadruple-
| precision floating-point number.
|     The input significand must be normalized or smaller.  If the input
| significand is not normalized, `zExp' must be 0; in that case, the result
| returned is a subnormal number, and it must not require rounding.  In the
| usual case that the input significand is normalized, `zExp' must be 1 less
| than the ``true'' floating-point exponent.  The handling of underflow and
| overflow follows the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

2849
static float128 roundAndPackFloat128(flag zSign, int32_t zExp,
2850 2851
                                     uint64_t zSig0, uint64_t zSig1,
                                     uint64_t zSig2, float_status *status)
B
bellard 已提交
2852
{
2853
    int8_t roundingMode;
B
bellard 已提交
2854 2855
    flag roundNearestEven, increment, isTiny;

2856
    roundingMode = status->float_rounding_mode;
B
bellard 已提交
2857
    roundNearestEven = ( roundingMode == float_round_nearest_even );
2858 2859
    switch (roundingMode) {
    case float_round_nearest_even:
2860
    case float_round_ties_away:
2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871
        increment = ((int64_t)zSig2 < 0);
        break;
    case float_round_to_zero:
        increment = 0;
        break;
    case float_round_up:
        increment = !zSign && zSig2;
        break;
    case float_round_down:
        increment = zSign && zSig2;
        break;
2872 2873 2874
    case float_round_to_odd:
        increment = !(zSig1 & 0x1) && zSig2;
        break;
2875 2876
    default:
        abort();
B
bellard 已提交
2877
    }
2878
    if ( 0x7FFD <= (uint32_t) zExp ) {
B
bellard 已提交
2879 2880 2881 2882 2883 2884 2885 2886 2887 2888 2889
        if (    ( 0x7FFD < zExp )
             || (    ( zExp == 0x7FFD )
                  && eq128(
                         LIT64( 0x0001FFFFFFFFFFFF ),
                         LIT64( 0xFFFFFFFFFFFFFFFF ),
                         zSig0,
                         zSig1
                     )
                  && increment
                )
           ) {
2890
            float_raise(float_flag_overflow | float_flag_inexact, status);
B
bellard 已提交
2891 2892 2893
            if (    ( roundingMode == float_round_to_zero )
                 || ( zSign && ( roundingMode == float_round_up ) )
                 || ( ! zSign && ( roundingMode == float_round_down ) )
2894
                 || (roundingMode == float_round_to_odd)
B
bellard 已提交
2895 2896 2897 2898 2899 2900 2901 2902 2903 2904 2905 2906
               ) {
                return
                    packFloat128(
                        zSign,
                        0x7FFE,
                        LIT64( 0x0000FFFFFFFFFFFF ),
                        LIT64( 0xFFFFFFFFFFFFFFFF )
                    );
            }
            return packFloat128( zSign, 0x7FFF, 0, 0 );
        }
        if ( zExp < 0 ) {
2907
            if (status->flush_to_zero) {
2908
                float_raise(float_flag_output_denormal, status);
2909 2910
                return packFloat128(zSign, 0, 0, 0);
            }
B
bellard 已提交
2911
            isTiny =
2912 2913
                   (status->float_detect_tininess
                    == float_tininess_before_rounding)
B
bellard 已提交
2914 2915 2916 2917 2918 2919 2920 2921 2922 2923 2924
                || ( zExp < -1 )
                || ! increment
                || lt128(
                       zSig0,
                       zSig1,
                       LIT64( 0x0001FFFFFFFFFFFF ),
                       LIT64( 0xFFFFFFFFFFFFFFFF )
                   );
            shift128ExtraRightJamming(
                zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );
            zExp = 0;
2925 2926 2927
            if (isTiny && zSig2) {
                float_raise(float_flag_underflow, status);
            }
2928 2929
            switch (roundingMode) {
            case float_round_nearest_even:
2930
            case float_round_ties_away:
2931 2932 2933 2934 2935 2936 2937 2938 2939 2940 2941
                increment = ((int64_t)zSig2 < 0);
                break;
            case float_round_to_zero:
                increment = 0;
                break;
            case float_round_up:
                increment = !zSign && zSig2;
                break;
            case float_round_down:
                increment = zSign && zSig2;
                break;
2942 2943 2944
            case float_round_to_odd:
                increment = !(zSig1 & 0x1) && zSig2;
                break;
2945 2946
            default:
                abort();
B
bellard 已提交
2947 2948 2949
            }
        }
    }
2950 2951 2952
    if (zSig2) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972 2973
    if ( increment ) {
        add128( zSig0, zSig1, 0, 1, &zSig0, &zSig1 );
        zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );
    }
    else {
        if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0;
    }
    return packFloat128( zSign, zExp, zSig0, zSig1 );

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand formed by the concatenation of `zSig0' and `zSig1', and
| returns the proper quadruple-precision floating-point value corresponding
| to the abstract input.  This routine is just like `roundAndPackFloat128'
| except that the input significand has fewer bits and does not have to be
| normalized.  In all cases, `zExp' must be 1 less than the ``true'' floating-
| point exponent.
*----------------------------------------------------------------------------*/

2974
static float128 normalizeRoundAndPackFloat128(flag zSign, int32_t zExp,
2975 2976
                                              uint64_t zSig0, uint64_t zSig1,
                                              float_status *status)
B
bellard 已提交
2977
{
2978
    int8_t shiftCount;
2979
    uint64_t zSig2;
B
bellard 已提交
2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995

    if ( zSig0 == 0 ) {
        zSig0 = zSig1;
        zSig1 = 0;
        zExp -= 64;
    }
    shiftCount = countLeadingZeros64( zSig0 ) - 15;
    if ( 0 <= shiftCount ) {
        zSig2 = 0;
        shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
    }
    else {
        shift128ExtraRightJamming(
            zSig0, zSig1, 0, - shiftCount, &zSig0, &zSig1, &zSig2 );
    }
    zExp -= shiftCount;
2996
    return roundAndPackFloat128(zSign, zExp, zSig0, zSig1, zSig2, status);
B
bellard 已提交
2997 2998 2999 3000 3001 3002 3003 3004 3005 3006 3007

}


/*----------------------------------------------------------------------------
| Returns the result of converting the 32-bit two's complement integer `a'
| to the extended double-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3008
floatx80 int32_to_floatx80(int32_t a, float_status *status)
B
bellard 已提交
3009 3010
{
    flag zSign;
3011
    uint32_t absA;
3012
    int8_t shiftCount;
3013
    uint64_t zSig;
B
bellard 已提交
3014 3015 3016 3017 3018 3019 3020 3021 3022 3023 3024 3025 3026 3027 3028 3029

    if ( a == 0 ) return packFloatx80( 0, 0, 0 );
    zSign = ( a < 0 );
    absA = zSign ? - a : a;
    shiftCount = countLeadingZeros32( absA ) + 32;
    zSig = absA;
    return packFloatx80( zSign, 0x403E - shiftCount, zSig<<shiftCount );

}

/*----------------------------------------------------------------------------
| Returns the result of converting the 32-bit two's complement integer `a' to
| the quadruple-precision floating-point format.  The conversion is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3030
float128 int32_to_float128(int32_t a, float_status *status)
B
bellard 已提交
3031 3032
{
    flag zSign;
3033
    uint32_t absA;
3034
    int8_t shiftCount;
3035
    uint64_t zSig0;
B
bellard 已提交
3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052

    if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
    zSign = ( a < 0 );
    absA = zSign ? - a : a;
    shiftCount = countLeadingZeros32( absA ) + 17;
    zSig0 = absA;
    return packFloat128( zSign, 0x402E - shiftCount, zSig0<<shiftCount, 0 );

}

/*----------------------------------------------------------------------------
| Returns the result of converting the 64-bit two's complement integer `a'
| to the extended double-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3053
floatx80 int64_to_floatx80(int64_t a, float_status *status)
B
bellard 已提交
3054 3055
{
    flag zSign;
3056
    uint64_t absA;
3057
    int8_t shiftCount;
B
bellard 已提交
3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072

    if ( a == 0 ) return packFloatx80( 0, 0, 0 );
    zSign = ( a < 0 );
    absA = zSign ? - a : a;
    shiftCount = countLeadingZeros64( absA );
    return packFloatx80( zSign, 0x403E - shiftCount, absA<<shiftCount );

}

/*----------------------------------------------------------------------------
| Returns the result of converting the 64-bit two's complement integer `a' to
| the quadruple-precision floating-point format.  The conversion is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3073
float128 int64_to_float128(int64_t a, float_status *status)
B
bellard 已提交
3074 3075
{
    flag zSign;
3076
    uint64_t absA;
3077
    int8_t shiftCount;
3078
    int32_t zExp;
3079
    uint64_t zSig0, zSig1;
B
bellard 已提交
3080 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 3097 3098 3099

    if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
    zSign = ( a < 0 );
    absA = zSign ? - a : a;
    shiftCount = countLeadingZeros64( absA ) + 49;
    zExp = 0x406E - shiftCount;
    if ( 64 <= shiftCount ) {
        zSig1 = 0;
        zSig0 = absA;
        shiftCount -= 64;
    }
    else {
        zSig1 = absA;
        zSig0 = 0;
    }
    shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
    return packFloat128( zSign, zExp, zSig0, zSig1 );

}

3100 3101 3102 3103 3104 3105
/*----------------------------------------------------------------------------
| Returns the result of converting the 64-bit unsigned integer `a'
| to the quadruple-precision floating-point format.  The conversion is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3106
float128 uint64_to_float128(uint64_t a, float_status *status)
3107 3108 3109 3110
{
    if (a == 0) {
        return float128_zero;
    }
3111
    return normalizeRoundAndPackFloat128(0, 0x406E, 0, a, status);
3112 3113
}

B
bellard 已提交
3114 3115 3116 3117 3118 3119 3120 3121 3122 3123



/*----------------------------------------------------------------------------
| Returns the result of converting the single-precision floating-point value
| `a' to the double-precision floating-point format.  The conversion is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3124
float64 float32_to_float64(float32 a, float_status *status)
B
bellard 已提交
3125 3126
{
    flag aSign;
3127
    int aExp;
3128
    uint32_t aSig;
3129
    a = float32_squash_input_denormal(a, status);
B
bellard 已提交
3130 3131 3132 3133 3134

    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );
    if ( aExp == 0xFF ) {
3135 3136 3137
        if (aSig) {
            return commonNaNToFloat64(float32ToCommonNaN(a, status), status);
        }
B
bellard 已提交
3138 3139 3140 3141 3142 3143 3144
        return packFloat64( aSign, 0x7FF, 0 );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloat64( aSign, 0, 0 );
        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
        --aExp;
    }
3145
    return packFloat64( aSign, aExp + 0x380, ( (uint64_t) aSig )<<29 );
B
bellard 已提交
3146 3147 3148 3149 3150 3151 3152 3153 3154 3155

}

/*----------------------------------------------------------------------------
| Returns the result of converting the single-precision floating-point value
| `a' to the extended double-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3156
floatx80 float32_to_floatx80(float32 a, float_status *status)
B
bellard 已提交
3157 3158
{
    flag aSign;
3159
    int aExp;
3160
    uint32_t aSig;
B
bellard 已提交
3161

3162
    a = float32_squash_input_denormal(a, status);
B
bellard 已提交
3163 3164 3165 3166
    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );
    if ( aExp == 0xFF ) {
3167 3168 3169
        if (aSig) {
            return commonNaNToFloatx80(float32ToCommonNaN(a, status), status);
        }
3170 3171 3172
        return packFloatx80(aSign,
                            floatx80_infinity_high,
                            floatx80_infinity_low);
B
bellard 已提交
3173 3174 3175 3176 3177 3178
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
    }
    aSig |= 0x00800000;
3179
    return packFloatx80( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<40 );
B
bellard 已提交
3180 3181 3182 3183 3184 3185 3186 3187 3188 3189

}

/*----------------------------------------------------------------------------
| Returns the result of converting the single-precision floating-point value
| `a' to the double-precision floating-point format.  The conversion is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3190
float128 float32_to_float128(float32 a, float_status *status)
B
bellard 已提交
3191 3192
{
    flag aSign;
3193
    int aExp;
3194
    uint32_t aSig;
B
bellard 已提交
3195

3196
    a = float32_squash_input_denormal(a, status);
B
bellard 已提交
3197 3198 3199 3200
    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );
    if ( aExp == 0xFF ) {
3201 3202 3203
        if (aSig) {
            return commonNaNToFloat128(float32ToCommonNaN(a, status), status);
        }
B
bellard 已提交
3204 3205 3206 3207 3208 3209 3210
        return packFloat128( aSign, 0x7FFF, 0, 0 );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );
        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
        --aExp;
    }
3211
    return packFloat128( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<25, 0 );
B
bellard 已提交
3212 3213 3214 3215 3216 3217 3218 3219 3220

}

/*----------------------------------------------------------------------------
| Returns the remainder of the single-precision floating-point value `a'
| with respect to the corresponding value `b'.  The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3221
float32 float32_rem(float32 a, float32 b, float_status *status)
B
bellard 已提交
3222
{
3223
    flag aSign, zSign;
3224
    int aExp, bExp, expDiff;
3225 3226 3227 3228 3229
    uint32_t aSig, bSig;
    uint32_t q;
    uint64_t aSig64, bSig64, q64;
    uint32_t alternateASig;
    int32_t sigMean;
3230 3231
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3232 3233 3234 3235 3236 3237 3238 3239

    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );
    bSig = extractFloat32Frac( b );
    bExp = extractFloat32Exp( b );
    if ( aExp == 0xFF ) {
        if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {
3240
            return propagateFloat32NaN(a, b, status);
B
bellard 已提交
3241
        }
3242
        float_raise(float_flag_invalid, status);
3243
        return float32_default_nan(status);
B
bellard 已提交
3244 3245
    }
    if ( bExp == 0xFF ) {
3246 3247 3248
        if (bSig) {
            return propagateFloat32NaN(a, b, status);
        }
B
bellard 已提交
3249 3250 3251 3252
        return a;
    }
    if ( bExp == 0 ) {
        if ( bSig == 0 ) {
3253
            float_raise(float_flag_invalid, status);
3254
            return float32_default_nan(status);
B
bellard 已提交
3255 3256 3257 3258 3259 3260 3261 3262 3263 3264 3265 3266 3267 3268 3269 3270 3271 3272 3273 3274
        }
        normalizeFloat32Subnormal( bSig, &bExp, &bSig );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return a;
        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
    }
    expDiff = aExp - bExp;
    aSig |= 0x00800000;
    bSig |= 0x00800000;
    if ( expDiff < 32 ) {
        aSig <<= 8;
        bSig <<= 8;
        if ( expDiff < 0 ) {
            if ( expDiff < -1 ) return a;
            aSig >>= 1;
        }
        q = ( bSig <= aSig );
        if ( q ) aSig -= bSig;
        if ( 0 < expDiff ) {
3275
            q = ( ( (uint64_t) aSig )<<32 ) / bSig;
B
bellard 已提交
3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286
            q >>= 32 - expDiff;
            bSig >>= 2;
            aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;
        }
        else {
            aSig >>= 2;
            bSig >>= 2;
        }
    }
    else {
        if ( bSig <= aSig ) aSig -= bSig;
3287 3288
        aSig64 = ( (uint64_t) aSig )<<40;
        bSig64 = ( (uint64_t) bSig )<<40;
B
bellard 已提交
3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306
        expDiff -= 64;
        while ( 0 < expDiff ) {
            q64 = estimateDiv128To64( aSig64, 0, bSig64 );
            q64 = ( 2 < q64 ) ? q64 - 2 : 0;
            aSig64 = - ( ( bSig * q64 )<<38 );
            expDiff -= 62;
        }
        expDiff += 64;
        q64 = estimateDiv128To64( aSig64, 0, bSig64 );
        q64 = ( 2 < q64 ) ? q64 - 2 : 0;
        q = q64>>( 64 - expDiff );
        bSig <<= 6;
        aSig = ( ( aSig64>>33 )<<( expDiff - 1 ) ) - bSig * q;
    }
    do {
        alternateASig = aSig;
        ++q;
        aSig -= bSig;
3307
    } while ( 0 <= (int32_t) aSig );
B
bellard 已提交
3308 3309 3310 3311
    sigMean = aSig + alternateASig;
    if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
        aSig = alternateASig;
    }
3312
    zSign = ( (int32_t) aSig < 0 );
B
bellard 已提交
3313
    if ( zSign ) aSig = - aSig;
3314
    return normalizeRoundAndPackFloat32(aSign ^ zSign, bExp, aSig, status);
B
bellard 已提交
3315 3316
}

3317

B
bellard 已提交
3318

3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338
/*----------------------------------------------------------------------------
| Returns the binary exponential of the single-precision floating-point value
| `a'. The operation is performed according to the IEC/IEEE Standard for
| Binary Floating-Point Arithmetic.
|
| Uses the following identities:
|
| 1. -------------------------------------------------------------------------
|      x    x*ln(2)
|     2  = e
|
| 2. -------------------------------------------------------------------------
|                      2     3     4     5           n
|      x        x     x     x     x     x           x
|     e  = 1 + --- + --- + --- + --- + --- + ... + --- + ...
|               1!    2!    3!    4!    5!          n!
*----------------------------------------------------------------------------*/

static const float64 float32_exp2_coefficients[15] =
{
3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353
    const_float64( 0x3ff0000000000000ll ), /*  1 */
    const_float64( 0x3fe0000000000000ll ), /*  2 */
    const_float64( 0x3fc5555555555555ll ), /*  3 */
    const_float64( 0x3fa5555555555555ll ), /*  4 */
    const_float64( 0x3f81111111111111ll ), /*  5 */
    const_float64( 0x3f56c16c16c16c17ll ), /*  6 */
    const_float64( 0x3f2a01a01a01a01all ), /*  7 */
    const_float64( 0x3efa01a01a01a01all ), /*  8 */
    const_float64( 0x3ec71de3a556c734ll ), /*  9 */
    const_float64( 0x3e927e4fb7789f5cll ), /* 10 */
    const_float64( 0x3e5ae64567f544e4ll ), /* 11 */
    const_float64( 0x3e21eed8eff8d898ll ), /* 12 */
    const_float64( 0x3de6124613a86d09ll ), /* 13 */
    const_float64( 0x3da93974a8c07c9dll ), /* 14 */
    const_float64( 0x3d6ae7f3e733b81fll ), /* 15 */
3354 3355
};

3356
float32 float32_exp2(float32 a, float_status *status)
3357 3358
{
    flag aSign;
3359
    int aExp;
3360
    uint32_t aSig;
3361 3362
    float64 r, x, xn;
    int i;
3363
    a = float32_squash_input_denormal(a, status);
3364 3365 3366 3367 3368 3369

    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );

    if ( aExp == 0xFF) {
3370 3371 3372
        if (aSig) {
            return propagateFloat32NaN(a, float32_zero, status);
        }
3373 3374 3375 3376 3377 3378
        return (aSign) ? float32_zero : a;
    }
    if (aExp == 0) {
        if (aSig == 0) return float32_one;
    }

3379
    float_raise(float_flag_inexact, status);
3380 3381 3382 3383

    /* ******************************* */
    /* using float64 for approximation */
    /* ******************************* */
3384 3385
    x = float32_to_float64(a, status);
    x = float64_mul(x, float64_ln2, status);
3386 3387 3388 3389 3390 3391

    xn = x;
    r = float64_one;
    for (i = 0 ; i < 15 ; i++) {
        float64 f;

3392 3393
        f = float64_mul(xn, float32_exp2_coefficients[i], status);
        r = float64_add(r, f, status);
3394

3395
        xn = float64_mul(xn, x, status);
3396 3397 3398 3399 3400
    }

    return float64_to_float32(r, status);
}

3401 3402 3403 3404 3405
/*----------------------------------------------------------------------------
| Returns the binary log of the single-precision floating-point value `a'.
| The operation is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
3406
float32 float32_log2(float32 a, float_status *status)
3407 3408
{
    flag aSign, zSign;
3409
    int aExp;
3410
    uint32_t aSig, zSig, i;
3411

3412
    a = float32_squash_input_denormal(a, status);
3413 3414 3415 3416 3417 3418 3419 3420 3421
    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );

    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloat32( 1, 0xFF, 0 );
        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
    }
    if ( aSign ) {
3422
        float_raise(float_flag_invalid, status);
3423
        return float32_default_nan(status);
3424 3425
    }
    if ( aExp == 0xFF ) {
3426 3427 3428
        if (aSig) {
            return propagateFloat32NaN(a, float32_zero, status);
        }
3429 3430 3431 3432 3433 3434 3435 3436 3437
        return a;
    }

    aExp -= 0x7F;
    aSig |= 0x00800000;
    zSign = aExp < 0;
    zSig = aExp << 23;

    for (i = 1 << 22; i > 0; i >>= 1) {
3438
        aSig = ( (uint64_t)aSig * aSig ) >> 23;
3439 3440 3441 3442 3443 3444 3445 3446 3447
        if ( aSig & 0x01000000 ) {
            aSig >>= 1;
            zSig |= i;
        }
    }

    if ( zSign )
        zSig = -zSig;

3448
    return normalizeRoundAndPackFloat32(zSign, 0x85, zSig, status);
3449 3450
}

B
bellard 已提交
3451 3452
/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is equal to
3453 3454
| the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  Otherwise, the comparison is performed
B
bellard 已提交
3455 3456 3457
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3458
int float32_eq(float32 a, float32 b, float_status *status)
B
bellard 已提交
3459
{
3460
    uint32_t av, bv;
3461 3462
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3463 3464 3465 3466

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
3467
        float_raise(float_flag_invalid, status);
B
bellard 已提交
3468 3469
        return 0;
    }
3470 3471 3472
    av = float32_val(a);
    bv = float32_val(b);
    return ( av == bv ) || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
B
bellard 已提交
3473 3474 3475 3476
}

/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is less than
3477 3478 3479
| or equal to the corresponding value `b', and 0 otherwise.  The invalid
| exception is raised if either operand is a NaN.  The comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
3480 3481
*----------------------------------------------------------------------------*/

3482
int float32_le(float32 a, float32 b, float_status *status)
B
bellard 已提交
3483 3484
{
    flag aSign, bSign;
3485
    uint32_t av, bv;
3486 3487
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3488 3489 3490 3491

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
3492
        float_raise(float_flag_invalid, status);
B
bellard 已提交
3493 3494 3495 3496
        return 0;
    }
    aSign = extractFloat32Sign( a );
    bSign = extractFloat32Sign( b );
3497 3498
    av = float32_val(a);
    bv = float32_val(b);
3499
    if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
3500
    return ( av == bv ) || ( aSign ^ ( av < bv ) );
B
bellard 已提交
3501 3502 3503 3504 3505

}

/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is less than
3506 3507 3508
| the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  The comparison is performed according
| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
3509 3510
*----------------------------------------------------------------------------*/

3511
int float32_lt(float32 a, float32 b, float_status *status)
B
bellard 已提交
3512 3513
{
    flag aSign, bSign;
3514
    uint32_t av, bv;
3515 3516
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3517 3518 3519 3520

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
3521
        float_raise(float_flag_invalid, status);
B
bellard 已提交
3522 3523 3524 3525
        return 0;
    }
    aSign = extractFloat32Sign( a );
    bSign = extractFloat32Sign( b );
3526 3527
    av = float32_val(a);
    bv = float32_val(b);
3528
    if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 );
3529
    return ( av != bv ) && ( aSign ^ ( av < bv ) );
B
bellard 已提交
3530 3531 3532

}

3533 3534
/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point values `a' and `b' cannot
3535 3536 3537
| be compared, and 0 otherwise.  The invalid exception is raised if either
| operand is a NaN.  The comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
3538 3539
*----------------------------------------------------------------------------*/

3540
int float32_unordered(float32 a, float32 b, float_status *status)
3541
{
3542 3543
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
3544 3545 3546 3547

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
3548
        float_raise(float_flag_invalid, status);
3549 3550 3551 3552
        return 1;
    }
    return 0;
}
3553

B
bellard 已提交
3554 3555
/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is equal to
3556 3557 3558
| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.  The comparison is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
B
bellard 已提交
3559 3560
*----------------------------------------------------------------------------*/

3561
int float32_eq_quiet(float32 a, float32 b, float_status *status)
B
bellard 已提交
3562
{
3563 3564
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3565 3566 3567 3568

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
3569 3570
        if (float32_is_signaling_nan(a, status)
         || float32_is_signaling_nan(b, status)) {
3571
            float_raise(float_flag_invalid, status);
3572
        }
B
bellard 已提交
3573 3574
        return 0;
    }
3575 3576
    return ( float32_val(a) == float32_val(b) ) ||
            ( (uint32_t) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 );
B
bellard 已提交
3577 3578 3579 3580 3581 3582 3583 3584 3585
}

/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is less than or
| equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs do not
| cause an exception.  Otherwise, the comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3586
int float32_le_quiet(float32 a, float32 b, float_status *status)
B
bellard 已提交
3587 3588
{
    flag aSign, bSign;
3589
    uint32_t av, bv;
3590 3591
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3592 3593 3594 3595

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
3596 3597
        if (float32_is_signaling_nan(a, status)
         || float32_is_signaling_nan(b, status)) {
3598
            float_raise(float_flag_invalid, status);
B
bellard 已提交
3599 3600 3601 3602 3603
        }
        return 0;
    }
    aSign = extractFloat32Sign( a );
    bSign = extractFloat32Sign( b );
3604 3605
    av = float32_val(a);
    bv = float32_val(b);
3606
    if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
3607
    return ( av == bv ) || ( aSign ^ ( av < bv ) );
B
bellard 已提交
3608 3609 3610 3611 3612 3613 3614

}

/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is less than
| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.  Otherwise, the comparison is performed according to the IEC/IEEE
3615
| Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
3616 3617
*----------------------------------------------------------------------------*/

3618
int float32_lt_quiet(float32 a, float32 b, float_status *status)
B
bellard 已提交
3619
{
3620 3621 3622 3623
    flag aSign, bSign;
    uint32_t av, bv;
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3624

3625 3626 3627 3628 3629
    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
        if (float32_is_signaling_nan(a, status)
         || float32_is_signaling_nan(b, status)) {
3630
            float_raise(float_flag_invalid, status);
B
bellard 已提交
3631
        }
3632
        return 0;
B
bellard 已提交
3633
    }
3634 3635 3636 3637 3638 3639
    aSign = extractFloat32Sign( a );
    bSign = extractFloat32Sign( b );
    av = float32_val(a);
    bv = float32_val(b);
    if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 );
    return ( av != bv ) && ( aSign ^ ( av < bv ) );
B
bellard 已提交
3640 3641 3642 3643

}

/*----------------------------------------------------------------------------
3644 3645 3646 3647
| Returns 1 if the single-precision floating-point values `a' and `b' cannot
| be compared, and 0 otherwise.  Quiet NaNs do not cause an exception.  The
| comparison is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
B
bellard 已提交
3648 3649
*----------------------------------------------------------------------------*/

3650
int float32_unordered_quiet(float32 a, float32 b, float_status *status)
B
bellard 已提交
3651
{
3652 3653
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3654

3655 3656 3657 3658 3659 3660
    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
        if (float32_is_signaling_nan(a, status)
         || float32_is_signaling_nan(b, status)) {
            float_raise(float_flag_invalid, status);
B
bellard 已提交
3661
        }
3662
        return 1;
B
bellard 已提交
3663
    }
3664
    return 0;
B
bellard 已提交
3665 3666
}

3667

B
bellard 已提交
3668 3669 3670 3671 3672 3673 3674
/*----------------------------------------------------------------------------
| Returns the result of converting the double-precision floating-point value
| `a' to the single-precision floating-point format.  The conversion is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3675
float32 float64_to_float32(float64 a, float_status *status)
B
bellard 已提交
3676 3677
{
    flag aSign;
3678
    int aExp;
3679 3680
    uint64_t aSig;
    uint32_t zSig;
3681
    a = float64_squash_input_denormal(a, status);
B
bellard 已提交
3682 3683 3684 3685 3686

    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    if ( aExp == 0x7FF ) {
3687 3688 3689
        if (aSig) {
            return commonNaNToFloat32(float64ToCommonNaN(a, status), status);
        }
B
bellard 已提交
3690 3691 3692 3693 3694 3695 3696 3697
        return packFloat32( aSign, 0xFF, 0 );
    }
    shift64RightJamming( aSig, 22, &aSig );
    zSig = aSig;
    if ( aExp || zSig ) {
        zSig |= 0x40000000;
        aExp -= 0x381;
    }
3698
    return roundAndPackFloat32(aSign, aExp, zSig, status);
B
bellard 已提交
3699 3700 3701

}

P
Paul Brook 已提交
3702 3703 3704 3705 3706 3707 3708 3709 3710 3711 3712

/*----------------------------------------------------------------------------
| Packs the sign `zSign', exponent `zExp', and significand `zSig' into a
| half-precision floating-point value, returning the result.  After being
| shifted into the proper positions, the three fields are simply added
| together to form the result.  This means that any integer portion of `zSig'
| will be added into the exponent.  Since a properly normalized significand
| will have an integer portion equal to 1, the `zExp' input should be 1 less
| than the desired result exponent whenever `zSig' is a complete, normalized
| significand.
*----------------------------------------------------------------------------*/
3713
static float16 packFloat16(flag zSign, int zExp, uint16_t zSig)
P
Paul Brook 已提交
3714
{
3715
    return make_float16(
3716
        (((uint32_t)zSign) << 15) + (((uint32_t)zExp) << 10) + zSig);
P
Paul Brook 已提交
3717 3718
}

3719 3720 3721 3722 3723 3724 3725 3726 3727 3728 3729 3730 3731 3732 3733 3734 3735 3736 3737 3738 3739 3740 3741 3742 3743 3744 3745 3746
/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand `zSig', and returns the proper half-precision floating-
| point value corresponding to the abstract input.  Ordinarily, the abstract
| value is simply rounded and packed into the half-precision format, with
| the inexact exception raised if the abstract input cannot be represented
| exactly.  However, if the abstract value is too large, the overflow and
| inexact exceptions are raised and an infinity or maximal finite value is
| returned.  If the abstract value is too small, the input value is rounded to
| a subnormal number, and the underflow and inexact exceptions are raised if
| the abstract input cannot be represented exactly as a subnormal half-
| precision floating-point number.
| The `ieee' flag indicates whether to use IEEE standard half precision, or
| ARM-style "alternative representation", which omits the NaN and Inf
| encodings in order to raise the maximum representable exponent by one.
|     The input significand `zSig' has its binary point between bits 22
| and 23, which is 13 bits to the left of the usual location.  This shifted
| significand must be normalized or smaller.  If `zSig' is not normalized,
| `zExp' must be 0; in that case, the result returned is a subnormal number,
| and it must not require rounding.  In the usual case that `zSig' is
| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.
| Note the slightly odd position of the binary point in zSig compared with the
| other roundAndPackFloat functions. This should probably be fixed if we
| need to implement more float16 routines than just conversion.
| The handling of underflow and overflow follows the IEC/IEEE Standard for
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3747
static float16 roundAndPackFloat16(flag zSign, int zExp,
3748 3749
                                   uint32_t zSig, flag ieee,
                                   float_status *status)
3750 3751 3752 3753 3754 3755 3756 3757 3758 3759 3760 3761 3762 3763 3764 3765 3766 3767 3768 3769 3770
{
    int maxexp = ieee ? 29 : 30;
    uint32_t mask;
    uint32_t increment;
    bool rounding_bumps_exp;
    bool is_tiny = false;

    /* Calculate the mask of bits of the mantissa which are not
     * representable in half-precision and will be lost.
     */
    if (zExp < 1) {
        /* Will be denormal in halfprec */
        mask = 0x00ffffff;
        if (zExp >= -11) {
            mask >>= 11 + zExp;
        }
    } else {
        /* Normal number in halfprec */
        mask = 0x00001fff;
    }

3771
    switch (status->float_rounding_mode) {
3772 3773 3774 3775 3776 3777
    case float_round_nearest_even:
        increment = (mask + 1) >> 1;
        if ((zSig & mask) == increment) {
            increment = zSig & (increment << 1);
        }
        break;
3778 3779 3780
    case float_round_ties_away:
        increment = (mask + 1) >> 1;
        break;
3781 3782 3783 3784 3785 3786 3787 3788 3789 3790 3791 3792 3793 3794 3795
    case float_round_up:
        increment = zSign ? 0 : mask;
        break;
    case float_round_down:
        increment = zSign ? mask : 0;
        break;
    default: /* round_to_zero */
        increment = 0;
        break;
    }

    rounding_bumps_exp = (zSig + increment >= 0x01000000);

    if (zExp > maxexp || (zExp == maxexp && rounding_bumps_exp)) {
        if (ieee) {
3796
            float_raise(float_flag_overflow | float_flag_inexact, status);
3797 3798
            return packFloat16(zSign, 0x1f, 0);
        } else {
3799
            float_raise(float_flag_invalid, status);
3800 3801 3802 3803 3804 3805 3806
            return packFloat16(zSign, 0x1f, 0x3ff);
        }
    }

    if (zExp < 0) {
        /* Note that flush-to-zero does not affect half-precision results */
        is_tiny =
3807
            (status->float_detect_tininess == float_tininess_before_rounding)
3808 3809 3810 3811
            || (zExp < -1)
            || (!rounding_bumps_exp);
    }
    if (zSig & mask) {
3812
        float_raise(float_flag_inexact, status);
3813
        if (is_tiny) {
3814
            float_raise(float_flag_underflow, status);
3815 3816 3817 3818 3819 3820 3821 3822 3823 3824 3825 3826 3827 3828 3829 3830 3831 3832 3833
        }
    }

    zSig += increment;
    if (rounding_bumps_exp) {
        zSig >>= 1;
        zExp++;
    }

    if (zExp < -10) {
        return packFloat16(zSign, 0, 0);
    }
    if (zExp < 0) {
        zSig >>= -zExp;
        zExp = 0;
    }
    return packFloat16(zSign, zExp, zSig >> 13);
}

3834 3835 3836 3837 3838 3839 3840 3841 3842 3843 3844 3845 3846 3847 3848
/*----------------------------------------------------------------------------
| If `a' is denormal and we are in flush-to-zero mode then set the
| input-denormal exception and return zero. Otherwise just return the value.
*----------------------------------------------------------------------------*/
float16 float16_squash_input_denormal(float16 a, float_status *status)
{
    if (status->flush_inputs_to_zero) {
        if (extractFloat16Exp(a) == 0 && extractFloat16Frac(a) != 0) {
            float_raise(float_flag_input_denormal, status);
            return make_float16(float16_val(a) & 0x8000);
        }
    }
    return a;
}

3849
static void normalizeFloat16Subnormal(uint32_t aSig, int *zExpPtr,
3850 3851 3852 3853 3854 3855 3856
                                      uint32_t *zSigPtr)
{
    int8_t shiftCount = countLeadingZeros32(aSig) - 21;
    *zSigPtr = aSig << shiftCount;
    *zExpPtr = 1 - shiftCount;
}

P
Paul Brook 已提交
3857 3858
/* Half precision floats come in two formats: standard IEEE and "ARM" format.
   The latter gains extra exponent range by omitting the NaN/Inf encodings.  */
3859

3860
float32 float16_to_float32(float16 a, flag ieee, float_status *status)
P
Paul Brook 已提交
3861 3862
{
    flag aSign;
3863
    int aExp;
3864
    uint32_t aSig;
P
Paul Brook 已提交
3865

3866 3867 3868
    aSign = extractFloat16Sign(a);
    aExp = extractFloat16Exp(a);
    aSig = extractFloat16Frac(a);
P
Paul Brook 已提交
3869 3870 3871

    if (aExp == 0x1f && ieee) {
        if (aSig) {
3872
            return commonNaNToFloat32(float16ToCommonNaN(a, status), status);
P
Paul Brook 已提交
3873
        }
3874
        return packFloat32(aSign, 0xff, 0);
P
Paul Brook 已提交
3875 3876 3877 3878 3879 3880
    }
    if (aExp == 0) {
        if (aSig == 0) {
            return packFloat32(aSign, 0, 0);
        }

3881 3882
        normalizeFloat16Subnormal(aSig, &aExp, &aSig);
        aExp--;
P
Paul Brook 已提交
3883 3884 3885 3886
    }
    return packFloat32( aSign, aExp + 0x70, aSig << 13);
}

3887
float16 float32_to_float16(float32 a, flag ieee, float_status *status)
P
Paul Brook 已提交
3888 3889
{
    flag aSign;
3890
    int aExp;
3891
    uint32_t aSig;
3892

3893
    a = float32_squash_input_denormal(a, status);
P
Paul Brook 已提交
3894 3895 3896 3897 3898 3899

    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );
    if ( aExp == 0xFF ) {
        if (aSig) {
3900 3901
            /* Input is a NaN */
            if (!ieee) {
3902
                float_raise(float_flag_invalid, status);
3903 3904
                return packFloat16(aSign, 0, 0);
            }
3905
            return commonNaNToFloat16(
3906
                float32ToCommonNaN(a, status), status);
P
Paul Brook 已提交
3907
        }
3908 3909
        /* Infinity */
        if (!ieee) {
3910
            float_raise(float_flag_invalid, status);
3911 3912 3913
            return packFloat16(aSign, 0x1f, 0x3ff);
        }
        return packFloat16(aSign, 0x1f, 0);
P
Paul Brook 已提交
3914
    }
3915
    if (aExp == 0 && aSig == 0) {
P
Paul Brook 已提交
3916 3917
        return packFloat16(aSign, 0, 0);
    }
3918 3919 3920 3921 3922 3923 3924
    /* Decimal point between bits 22 and 23. Note that we add the 1 bit
     * even if the input is denormal; however this is harmless because
     * the largest possible single-precision denormal is still smaller
     * than the smallest representable half-precision denormal, and so we
     * will end up ignoring aSig and returning via the "always return zero"
     * codepath.
     */
P
Paul Brook 已提交
3925
    aSig |= 0x00800000;
3926
    aExp -= 0x71;
P
Paul Brook 已提交
3927

3928
    return roundAndPackFloat16(aSign, aExp, aSig, ieee, status);
P
Paul Brook 已提交
3929 3930
}

3931
float64 float16_to_float64(float16 a, flag ieee, float_status *status)
3932 3933
{
    flag aSign;
3934
    int aExp;
3935 3936 3937 3938 3939 3940 3941 3942 3943
    uint32_t aSig;

    aSign = extractFloat16Sign(a);
    aExp = extractFloat16Exp(a);
    aSig = extractFloat16Frac(a);

    if (aExp == 0x1f && ieee) {
        if (aSig) {
            return commonNaNToFloat64(
3944
                float16ToCommonNaN(a, status), status);
3945 3946 3947 3948 3949 3950 3951 3952 3953 3954 3955 3956 3957 3958
        }
        return packFloat64(aSign, 0x7ff, 0);
    }
    if (aExp == 0) {
        if (aSig == 0) {
            return packFloat64(aSign, 0, 0);
        }

        normalizeFloat16Subnormal(aSig, &aExp, &aSig);
        aExp--;
    }
    return packFloat64(aSign, aExp + 0x3f0, ((uint64_t)aSig) << 42);
}

3959
float16 float64_to_float16(float64 a, flag ieee, float_status *status)
3960 3961
{
    flag aSign;
3962
    int aExp;
3963 3964 3965
    uint64_t aSig;
    uint32_t zSig;

3966
    a = float64_squash_input_denormal(a, status);
3967 3968 3969 3970 3971 3972 3973 3974

    aSig = extractFloat64Frac(a);
    aExp = extractFloat64Exp(a);
    aSign = extractFloat64Sign(a);
    if (aExp == 0x7FF) {
        if (aSig) {
            /* Input is a NaN */
            if (!ieee) {
3975
                float_raise(float_flag_invalid, status);
3976 3977 3978
                return packFloat16(aSign, 0, 0);
            }
            return commonNaNToFloat16(
3979
                float64ToCommonNaN(a, status), status);
3980 3981 3982
        }
        /* Infinity */
        if (!ieee) {
3983
            float_raise(float_flag_invalid, status);
3984 3985 3986 3987 3988 3989 3990 3991 3992 3993 3994 3995 3996 3997 3998 3999 4000 4001 4002
            return packFloat16(aSign, 0x1f, 0x3ff);
        }
        return packFloat16(aSign, 0x1f, 0);
    }
    shift64RightJamming(aSig, 29, &aSig);
    zSig = aSig;
    if (aExp == 0 && zSig == 0) {
        return packFloat16(aSign, 0, 0);
    }
    /* Decimal point between bits 22 and 23. Note that we add the 1 bit
     * even if the input is denormal; however this is harmless because
     * the largest possible single-precision denormal is still smaller
     * than the smallest representable half-precision denormal, and so we
     * will end up ignoring aSig and returning via the "always return zero"
     * codepath.
     */
    zSig |= 0x00800000;
    aExp -= 0x3F1;

4003
    return roundAndPackFloat16(aSign, aExp, zSig, ieee, status);
4004 4005
}

B
bellard 已提交
4006 4007 4008 4009 4010 4011 4012
/*----------------------------------------------------------------------------
| Returns the result of converting the double-precision floating-point value
| `a' to the extended double-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

4013
floatx80 float64_to_floatx80(float64 a, float_status *status)
B
bellard 已提交
4014 4015
{
    flag aSign;
4016
    int aExp;
4017
    uint64_t aSig;
B
bellard 已提交
4018

4019
    a = float64_squash_input_denormal(a, status);
B
bellard 已提交
4020 4021 4022 4023
    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    if ( aExp == 0x7FF ) {
4024 4025 4026
        if (aSig) {
            return commonNaNToFloatx80(float64ToCommonNaN(a, status), status);
        }
4027 4028 4029
        return packFloatx80(aSign,
                            floatx80_infinity_high,
                            floatx80_infinity_low);
B
bellard 已提交
4030 4031 4032 4033 4034 4035 4036 4037 4038 4039 4040 4041 4042 4043 4044 4045 4046 4047
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
        normalizeFloat64Subnormal( aSig, &aExp, &aSig );
    }
    return
        packFloatx80(
            aSign, aExp + 0x3C00, ( aSig | LIT64( 0x0010000000000000 ) )<<11 );

}

/*----------------------------------------------------------------------------
| Returns the result of converting the double-precision floating-point value
| `a' to the quadruple-precision floating-point format.  The conversion is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

4048
float128 float64_to_float128(float64 a, float_status *status)
B
bellard 已提交
4049 4050
{
    flag aSign;
4051
    int aExp;
4052
    uint64_t aSig, zSig0, zSig1;
B
bellard 已提交
4053

4054
    a = float64_squash_input_denormal(a, status);
B
bellard 已提交
4055 4056 4057 4058
    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    if ( aExp == 0x7FF ) {
4059 4060 4061
        if (aSig) {
            return commonNaNToFloat128(float64ToCommonNaN(a, status), status);
        }
B
bellard 已提交
4062 4063 4064 4065 4066 4067 4068 4069 4070 4071 4072 4073 4074 4075 4076 4077 4078 4079 4080
        return packFloat128( aSign, 0x7FFF, 0, 0 );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );
        normalizeFloat64Subnormal( aSig, &aExp, &aSig );
        --aExp;
    }
    shift128Right( aSig, 0, 4, &zSig0, &zSig1 );
    return packFloat128( aSign, aExp + 0x3C00, zSig0, zSig1 );

}


/*----------------------------------------------------------------------------
| Returns the remainder of the double-precision floating-point value `a'
| with respect to the corresponding value `b'.  The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4081
float64 float64_rem(float64 a, float64 b, float_status *status)
B
bellard 已提交
4082
{
4083
    flag aSign, zSign;
4084
    int aExp, bExp, expDiff;
4085 4086 4087
    uint64_t aSig, bSig;
    uint64_t q, alternateASig;
    int64_t sigMean;
B
bellard 已提交
4088

4089 4090
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4091 4092 4093 4094 4095 4096 4097
    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    bSig = extractFloat64Frac( b );
    bExp = extractFloat64Exp( b );
    if ( aExp == 0x7FF ) {
        if ( aSig || ( ( bExp == 0x7FF ) && bSig ) ) {
4098
            return propagateFloat64NaN(a, b, status);
B
bellard 已提交
4099
        }
4100
        float_raise(float_flag_invalid, status);
4101
        return float64_default_nan(status);
B
bellard 已提交
4102 4103
    }
    if ( bExp == 0x7FF ) {
4104 4105 4106
        if (bSig) {
            return propagateFloat64NaN(a, b, status);
        }
B
bellard 已提交
4107 4108 4109 4110
        return a;
    }
    if ( bExp == 0 ) {
        if ( bSig == 0 ) {
4111
            float_raise(float_flag_invalid, status);
4112
            return float64_default_nan(status);
B
bellard 已提交
4113 4114 4115 4116 4117 4118 4119 4120 4121 4122 4123 4124 4125 4126 4127 4128 4129 4130 4131 4132 4133 4134 4135 4136 4137 4138 4139 4140 4141 4142 4143 4144 4145 4146 4147 4148 4149 4150 4151
        }
        normalizeFloat64Subnormal( bSig, &bExp, &bSig );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return a;
        normalizeFloat64Subnormal( aSig, &aExp, &aSig );
    }
    expDiff = aExp - bExp;
    aSig = ( aSig | LIT64( 0x0010000000000000 ) )<<11;
    bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;
    if ( expDiff < 0 ) {
        if ( expDiff < -1 ) return a;
        aSig >>= 1;
    }
    q = ( bSig <= aSig );
    if ( q ) aSig -= bSig;
    expDiff -= 64;
    while ( 0 < expDiff ) {
        q = estimateDiv128To64( aSig, 0, bSig );
        q = ( 2 < q ) ? q - 2 : 0;
        aSig = - ( ( bSig>>2 ) * q );
        expDiff -= 62;
    }
    expDiff += 64;
    if ( 0 < expDiff ) {
        q = estimateDiv128To64( aSig, 0, bSig );
        q = ( 2 < q ) ? q - 2 : 0;
        q >>= 64 - expDiff;
        bSig >>= 2;
        aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;
    }
    else {
        aSig >>= 2;
        bSig >>= 2;
    }
    do {
        alternateASig = aSig;
        ++q;
        aSig -= bSig;
4152
    } while ( 0 <= (int64_t) aSig );
B
bellard 已提交
4153 4154 4155 4156
    sigMean = aSig + alternateASig;
    if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
        aSig = alternateASig;
    }
4157
    zSign = ( (int64_t) aSig < 0 );
B
bellard 已提交
4158
    if ( zSign ) aSig = - aSig;
4159
    return normalizeRoundAndPackFloat64(aSign ^ zSign, bExp, aSig, status);
B
bellard 已提交
4160 4161 4162

}

4163 4164 4165 4166 4167
/*----------------------------------------------------------------------------
| Returns the binary log of the double-precision floating-point value `a'.
| The operation is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
4168
float64 float64_log2(float64 a, float_status *status)
4169 4170
{
    flag aSign, zSign;
4171
    int aExp;
4172
    uint64_t aSig, aSig0, aSig1, zSig, i;
4173
    a = float64_squash_input_denormal(a, status);
4174 4175 4176 4177 4178 4179 4180 4181 4182 4183

    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );

    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloat64( 1, 0x7FF, 0 );
        normalizeFloat64Subnormal( aSig, &aExp, &aSig );
    }
    if ( aSign ) {
4184
        float_raise(float_flag_invalid, status);
4185
        return float64_default_nan(status);
4186 4187
    }
    if ( aExp == 0x7FF ) {
4188 4189 4190
        if (aSig) {
            return propagateFloat64NaN(a, float64_zero, status);
        }
4191 4192 4193 4194 4195 4196
        return a;
    }

    aExp -= 0x3FF;
    aSig |= LIT64( 0x0010000000000000 );
    zSign = aExp < 0;
4197
    zSig = (uint64_t)aExp << 52;
4198 4199 4200 4201 4202 4203 4204 4205 4206 4207 4208
    for (i = 1LL << 51; i > 0; i >>= 1) {
        mul64To128( aSig, aSig, &aSig0, &aSig1 );
        aSig = ( aSig0 << 12 ) | ( aSig1 >> 52 );
        if ( aSig & LIT64( 0x0020000000000000 ) ) {
            aSig >>= 1;
            zSig |= i;
        }
    }

    if ( zSign )
        zSig = -zSig;
4209
    return normalizeRoundAndPackFloat64(zSign, 0x408, zSig, status);
4210 4211
}

B
bellard 已提交
4212 4213
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is equal to the
4214 4215
| corresponding value `b', and 0 otherwise.  The invalid exception is raised
| if either operand is a NaN.  Otherwise, the comparison is performed
B
bellard 已提交
4216 4217 4218
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4219
int float64_eq(float64 a, float64 b, float_status *status)
B
bellard 已提交
4220
{
4221
    uint64_t av, bv;
4222 4223
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4224 4225 4226 4227

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4228
        float_raise(float_flag_invalid, status);
B
bellard 已提交
4229 4230
        return 0;
    }
4231
    av = float64_val(a);
P
pbrook 已提交
4232
    bv = float64_val(b);
4233
    return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
B
bellard 已提交
4234 4235 4236 4237 4238

}

/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than or
4239 4240 4241
| equal to the corresponding value `b', and 0 otherwise.  The invalid
| exception is raised if either operand is a NaN.  The comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
4242 4243
*----------------------------------------------------------------------------*/

4244
int float64_le(float64 a, float64 b, float_status *status)
B
bellard 已提交
4245 4246
{
    flag aSign, bSign;
4247
    uint64_t av, bv;
4248 4249
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4250 4251 4252 4253

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4254
        float_raise(float_flag_invalid, status);
B
bellard 已提交
4255 4256 4257 4258
        return 0;
    }
    aSign = extractFloat64Sign( a );
    bSign = extractFloat64Sign( b );
4259
    av = float64_val(a);
P
pbrook 已提交
4260
    bv = float64_val(b);
4261
    if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
4262
    return ( av == bv ) || ( aSign ^ ( av < bv ) );
B
bellard 已提交
4263 4264 4265 4266 4267

}

/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than
4268 4269 4270
| the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  The comparison is performed according
| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
4271 4272
*----------------------------------------------------------------------------*/

4273
int float64_lt(float64 a, float64 b, float_status *status)
B
bellard 已提交
4274 4275
{
    flag aSign, bSign;
4276
    uint64_t av, bv;
B
bellard 已提交
4277

4278 4279
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4280 4281 4282
    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4283
        float_raise(float_flag_invalid, status);
B
bellard 已提交
4284 4285 4286 4287
        return 0;
    }
    aSign = extractFloat64Sign( a );
    bSign = extractFloat64Sign( b );
4288
    av = float64_val(a);
P
pbrook 已提交
4289
    bv = float64_val(b);
4290
    if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
4291
    return ( av != bv ) && ( aSign ^ ( av < bv ) );
B
bellard 已提交
4292 4293 4294

}

4295 4296
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point values `a' and `b' cannot
4297 4298 4299
| be compared, and 0 otherwise.  The invalid exception is raised if either
| operand is a NaN.  The comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
4300 4301
*----------------------------------------------------------------------------*/

4302
int float64_unordered(float64 a, float64 b, float_status *status)
4303
{
4304 4305
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
4306 4307 4308 4309

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4310
        float_raise(float_flag_invalid, status);
4311 4312 4313 4314 4315
        return 1;
    }
    return 0;
}

B
bellard 已提交
4316 4317
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is equal to the
4318 4319 4320
| corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.The comparison is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
B
bellard 已提交
4321 4322
*----------------------------------------------------------------------------*/

4323
int float64_eq_quiet(float64 a, float64 b, float_status *status)
B
bellard 已提交
4324
{
4325
    uint64_t av, bv;
4326 4327
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4328 4329 4330 4331

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4332 4333
        if (float64_is_signaling_nan(a, status)
         || float64_is_signaling_nan(b, status)) {
4334
            float_raise(float_flag_invalid, status);
4335
        }
B
bellard 已提交
4336 4337
        return 0;
    }
4338
    av = float64_val(a);
P
pbrook 已提交
4339
    bv = float64_val(b);
4340
    return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
B
bellard 已提交
4341 4342 4343 4344 4345 4346 4347 4348 4349 4350

}

/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than or
| equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs do not
| cause an exception.  Otherwise, the comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4351
int float64_le_quiet(float64 a, float64 b, float_status *status)
B
bellard 已提交
4352 4353
{
    flag aSign, bSign;
4354
    uint64_t av, bv;
4355 4356
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4357 4358 4359 4360

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4361 4362
        if (float64_is_signaling_nan(a, status)
         || float64_is_signaling_nan(b, status)) {
4363
            float_raise(float_flag_invalid, status);
B
bellard 已提交
4364 4365 4366 4367 4368
        }
        return 0;
    }
    aSign = extractFloat64Sign( a );
    bSign = extractFloat64Sign( b );
4369
    av = float64_val(a);
P
pbrook 已提交
4370
    bv = float64_val(b);
4371
    if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
4372
    return ( av == bv ) || ( aSign ^ ( av < bv ) );
B
bellard 已提交
4373 4374 4375 4376 4377 4378 4379 4380 4381 4382

}

/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than
| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.  Otherwise, the comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4383
int float64_lt_quiet(float64 a, float64 b, float_status *status)
B
bellard 已提交
4384 4385
{
    flag aSign, bSign;
4386
    uint64_t av, bv;
4387 4388
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4389 4390 4391 4392

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4393 4394
        if (float64_is_signaling_nan(a, status)
         || float64_is_signaling_nan(b, status)) {
4395
            float_raise(float_flag_invalid, status);
B
bellard 已提交
4396 4397 4398 4399 4400
        }
        return 0;
    }
    aSign = extractFloat64Sign( a );
    bSign = extractFloat64Sign( b );
4401
    av = float64_val(a);
P
pbrook 已提交
4402
    bv = float64_val(b);
4403
    if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
4404
    return ( av != bv ) && ( aSign ^ ( av < bv ) );
B
bellard 已提交
4405 4406 4407

}

4408 4409 4410 4411 4412 4413 4414
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point values `a' and `b' cannot
| be compared, and 0 otherwise.  Quiet NaNs do not cause an exception.  The
| comparison is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4415
int float64_unordered_quiet(float64 a, float64 b, float_status *status)
4416
{
4417 4418
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
4419 4420 4421 4422

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4423 4424
        if (float64_is_signaling_nan(a, status)
         || float64_is_signaling_nan(b, status)) {
4425
            float_raise(float_flag_invalid, status);
4426 4427 4428 4429 4430 4431
        }
        return 1;
    }
    return 0;
}

B
bellard 已提交
4432 4433 4434 4435 4436 4437 4438 4439 4440 4441
/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the 32-bit two's complement integer format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic---which means in particular that the conversion
| is rounded according to the current rounding mode.  If `a' is a NaN, the
| largest positive integer is returned.  Otherwise, if the conversion
| overflows, the largest integer with the same sign as `a' is returned.
*----------------------------------------------------------------------------*/

4442
int32_t floatx80_to_int32(floatx80 a, float_status *status)
B
bellard 已提交
4443 4444
{
    flag aSign;
4445
    int32_t aExp, shiftCount;
4446
    uint64_t aSig;
B
bellard 已提交
4447

4448 4449 4450 4451
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return 1 << 31;
    }
B
bellard 已提交
4452 4453 4454
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
4455
    if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0;
B
bellard 已提交
4456 4457 4458
    shiftCount = 0x4037 - aExp;
    if ( shiftCount <= 0 ) shiftCount = 1;
    shift64RightJamming( aSig, shiftCount, &aSig );
4459
    return roundAndPackInt32(aSign, aSig, status);
B
bellard 已提交
4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the 32-bit two's complement integer format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic, except that the conversion is always rounded
| toward zero.  If `a' is a NaN, the largest positive integer is returned.
| Otherwise, if the conversion overflows, the largest integer with the same
| sign as `a' is returned.
*----------------------------------------------------------------------------*/

4473
int32_t floatx80_to_int32_round_to_zero(floatx80 a, float_status *status)
B
bellard 已提交
4474 4475
{
    flag aSign;
4476
    int32_t aExp, shiftCount;
4477
    uint64_t aSig, savedASig;
4478
    int32_t z;
B
bellard 已提交
4479

4480 4481 4482 4483
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return 1 << 31;
    }
B
bellard 已提交
4484 4485 4486 4487
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    if ( 0x401E < aExp ) {
4488
        if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0;
B
bellard 已提交
4489 4490 4491
        goto invalid;
    }
    else if ( aExp < 0x3FFF ) {
4492 4493 4494
        if (aExp || aSig) {
            status->float_exception_flags |= float_flag_inexact;
        }
B
bellard 已提交
4495 4496 4497 4498 4499 4500 4501 4502 4503
        return 0;
    }
    shiftCount = 0x403E - aExp;
    savedASig = aSig;
    aSig >>= shiftCount;
    z = aSig;
    if ( aSign ) z = - z;
    if ( ( z < 0 ) ^ aSign ) {
 invalid:
4504
        float_raise(float_flag_invalid, status);
4505
        return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
B
bellard 已提交
4506 4507
    }
    if ( ( aSig<<shiftCount ) != savedASig ) {
4508
        status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519 4520 4521 4522 4523
    }
    return z;

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the 64-bit two's complement integer format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic---which means in particular that the conversion
| is rounded according to the current rounding mode.  If `a' is a NaN,
| the largest positive integer is returned.  Otherwise, if the conversion
| overflows, the largest integer with the same sign as `a' is returned.
*----------------------------------------------------------------------------*/

4524
int64_t floatx80_to_int64(floatx80 a, float_status *status)
B
bellard 已提交
4525 4526
{
    flag aSign;
4527
    int32_t aExp, shiftCount;
4528
    uint64_t aSig, aSigExtra;
B
bellard 已提交
4529

4530 4531 4532 4533
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return 1ULL << 63;
    }
B
bellard 已提交
4534 4535 4536 4537 4538 4539
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    shiftCount = 0x403E - aExp;
    if ( shiftCount <= 0 ) {
        if ( shiftCount ) {
4540
            float_raise(float_flag_invalid, status);
4541
            if (!aSign || floatx80_is_any_nan(a)) {
B
bellard 已提交
4542 4543
                return LIT64( 0x7FFFFFFFFFFFFFFF );
            }
4544
            return (int64_t) LIT64( 0x8000000000000000 );
B
bellard 已提交
4545 4546 4547 4548 4549 4550
        }
        aSigExtra = 0;
    }
    else {
        shift64ExtraRightJamming( aSig, 0, shiftCount, &aSig, &aSigExtra );
    }
4551
    return roundAndPackInt64(aSign, aSig, aSigExtra, status);
B
bellard 已提交
4552 4553 4554 4555 4556 4557 4558 4559 4560 4561 4562 4563 4564

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the 64-bit two's complement integer format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic, except that the conversion is always rounded
| toward zero.  If `a' is a NaN, the largest positive integer is returned.
| Otherwise, if the conversion overflows, the largest integer with the same
| sign as `a' is returned.
*----------------------------------------------------------------------------*/

4565
int64_t floatx80_to_int64_round_to_zero(floatx80 a, float_status *status)
B
bellard 已提交
4566 4567
{
    flag aSign;
4568
    int32_t aExp, shiftCount;
4569
    uint64_t aSig;
4570
    int64_t z;
B
bellard 已提交
4571

4572 4573 4574 4575
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return 1ULL << 63;
    }
B
bellard 已提交
4576 4577 4578 4579 4580 4581 4582
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    shiftCount = aExp - 0x403E;
    if ( 0 <= shiftCount ) {
        aSig &= LIT64( 0x7FFFFFFFFFFFFFFF );
        if ( ( a.high != 0xC03E ) || aSig ) {
4583
            float_raise(float_flag_invalid, status);
B
bellard 已提交
4584 4585 4586 4587
            if ( ! aSign || ( ( aExp == 0x7FFF ) && aSig ) ) {
                return LIT64( 0x7FFFFFFFFFFFFFFF );
            }
        }
4588
        return (int64_t) LIT64( 0x8000000000000000 );
B
bellard 已提交
4589 4590
    }
    else if ( aExp < 0x3FFF ) {
4591 4592 4593
        if (aExp | aSig) {
            status->float_exception_flags |= float_flag_inexact;
        }
B
bellard 已提交
4594 4595 4596
        return 0;
    }
    z = aSig>>( - shiftCount );
4597
    if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) {
4598
        status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
4599 4600 4601 4602 4603 4604 4605 4606 4607 4608 4609 4610 4611
    }
    if ( aSign ) z = - z;
    return z;

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the single-precision floating-point format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4612
float32 floatx80_to_float32(floatx80 a, float_status *status)
B
bellard 已提交
4613 4614
{
    flag aSign;
4615
    int32_t aExp;
4616
    uint64_t aSig;
B
bellard 已提交
4617

4618 4619 4620 4621
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return float32_default_nan(status);
    }
B
bellard 已提交
4622 4623 4624 4625
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    if ( aExp == 0x7FFF ) {
4626
        if ( (uint64_t) ( aSig<<1 ) ) {
4627
            return commonNaNToFloat32(floatx80ToCommonNaN(a, status), status);
B
bellard 已提交
4628 4629 4630 4631 4632
        }
        return packFloat32( aSign, 0xFF, 0 );
    }
    shift64RightJamming( aSig, 33, &aSig );
    if ( aExp || aSig ) aExp -= 0x3F81;
4633
    return roundAndPackFloat32(aSign, aExp, aSig, status);
B
bellard 已提交
4634 4635 4636 4637 4638 4639 4640 4641 4642 4643

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the double-precision floating-point format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4644
float64 floatx80_to_float64(floatx80 a, float_status *status)
B
bellard 已提交
4645 4646
{
    flag aSign;
4647
    int32_t aExp;
4648
    uint64_t aSig, zSig;
B
bellard 已提交
4649

4650 4651 4652 4653
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return float64_default_nan(status);
    }
B
bellard 已提交
4654 4655 4656 4657
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    if ( aExp == 0x7FFF ) {
4658
        if ( (uint64_t) ( aSig<<1 ) ) {
4659
            return commonNaNToFloat64(floatx80ToCommonNaN(a, status), status);
B
bellard 已提交
4660 4661 4662 4663 4664
        }
        return packFloat64( aSign, 0x7FF, 0 );
    }
    shift64RightJamming( aSig, 1, &zSig );
    if ( aExp || aSig ) aExp -= 0x3C01;
4665
    return roundAndPackFloat64(aSign, aExp, zSig, status);
B
bellard 已提交
4666 4667 4668 4669 4670 4671 4672 4673 4674 4675

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the quadruple-precision floating-point format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4676
float128 floatx80_to_float128(floatx80 a, float_status *status)
B
bellard 已提交
4677 4678
{
    flag aSign;
4679
    int aExp;
4680
    uint64_t aSig, zSig0, zSig1;
B
bellard 已提交
4681

4682 4683 4684 4685
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return float128_default_nan(status);
    }
B
bellard 已提交
4686 4687 4688
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
4689
    if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) {
4690
        return commonNaNToFloat128(floatx80ToCommonNaN(a, status), status);
B
bellard 已提交
4691 4692 4693 4694 4695 4696
    }
    shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 );
    return packFloat128( aSign, aExp, zSig0, zSig1 );

}

4697 4698 4699 4700 4701 4702 4703 4704 4705 4706 4707 4708 4709 4710 4711 4712
/*----------------------------------------------------------------------------
| Rounds the extended double-precision floating-point value `a'
| to the precision provided by floatx80_rounding_precision and returns the
| result as an extended double-precision floating-point value.
| The operation is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

floatx80 floatx80_round(floatx80 a, float_status *status)
{
    return roundAndPackFloatx80(status->floatx80_rounding_precision,
                                extractFloatx80Sign(a),
                                extractFloatx80Exp(a),
                                extractFloatx80Frac(a), 0, status);
}

B
bellard 已提交
4713 4714 4715 4716 4717 4718 4719
/*----------------------------------------------------------------------------
| Rounds the extended double-precision floating-point value `a' to an integer,
| and returns the result as an extended quadruple-precision floating-point
| value.  The operation is performed according to the IEC/IEEE Standard for
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4720
floatx80 floatx80_round_to_int(floatx80 a, float_status *status)
B
bellard 已提交
4721 4722
{
    flag aSign;
4723
    int32_t aExp;
4724
    uint64_t lastBitMask, roundBitsMask;
B
bellard 已提交
4725 4726
    floatx80 z;

4727 4728 4729 4730
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
4731 4732
    aExp = extractFloatx80Exp( a );
    if ( 0x403E <= aExp ) {
4733
        if ( ( aExp == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) {
4734
            return propagateFloatx80NaN(a, a, status);
B
bellard 已提交
4735 4736 4737 4738 4739
        }
        return a;
    }
    if ( aExp < 0x3FFF ) {
        if (    ( aExp == 0 )
4740
             && ( (uint64_t) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) {
B
bellard 已提交
4741 4742
            return a;
        }
4743
        status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
4744
        aSign = extractFloatx80Sign( a );
4745
        switch (status->float_rounding_mode) {
B
bellard 已提交
4746
         case float_round_nearest_even:
4747
            if ( ( aExp == 0x3FFE ) && (uint64_t) ( extractFloatx80Frac( a )<<1 )
B
bellard 已提交
4748 4749 4750 4751 4752
               ) {
                return
                    packFloatx80( aSign, 0x3FFF, LIT64( 0x8000000000000000 ) );
            }
            break;
4753 4754 4755 4756 4757
        case float_round_ties_away:
            if (aExp == 0x3FFE) {
                return packFloatx80(aSign, 0x3FFF, LIT64(0x8000000000000000));
            }
            break;
B
bellard 已提交
4758 4759 4760 4761 4762 4763 4764 4765 4766 4767 4768 4769 4770 4771 4772 4773
         case float_round_down:
            return
                  aSign ?
                      packFloatx80( 1, 0x3FFF, LIT64( 0x8000000000000000 ) )
                : packFloatx80( 0, 0, 0 );
         case float_round_up:
            return
                  aSign ? packFloatx80( 1, 0, 0 )
                : packFloatx80( 0, 0x3FFF, LIT64( 0x8000000000000000 ) );
        }
        return packFloatx80( aSign, 0, 0 );
    }
    lastBitMask = 1;
    lastBitMask <<= 0x403E - aExp;
    roundBitsMask = lastBitMask - 1;
    z = a;
4774
    switch (status->float_rounding_mode) {
4775
    case float_round_nearest_even:
B
bellard 已提交
4776
        z.low += lastBitMask>>1;
4777 4778 4779 4780
        if ((z.low & roundBitsMask) == 0) {
            z.low &= ~lastBitMask;
        }
        break;
4781 4782 4783
    case float_round_ties_away:
        z.low += lastBitMask >> 1;
        break;
4784 4785 4786 4787 4788 4789 4790 4791 4792
    case float_round_to_zero:
        break;
    case float_round_up:
        if (!extractFloatx80Sign(z)) {
            z.low += roundBitsMask;
        }
        break;
    case float_round_down:
        if (extractFloatx80Sign(z)) {
B
bellard 已提交
4793 4794
            z.low += roundBitsMask;
        }
4795 4796 4797
        break;
    default:
        abort();
B
bellard 已提交
4798 4799 4800 4801 4802 4803
    }
    z.low &= ~ roundBitsMask;
    if ( z.low == 0 ) {
        ++z.high;
        z.low = LIT64( 0x8000000000000000 );
    }
4804 4805 4806
    if (z.low != a.low) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
4807 4808 4809 4810 4811 4812 4813 4814 4815 4816 4817 4818
    return z;

}

/*----------------------------------------------------------------------------
| Returns the result of adding the absolute values of the extended double-
| precision floating-point values `a' and `b'.  If `zSign' is 1, the sum is
| negated before being returned.  `zSign' is ignored if the result is a NaN.
| The addition is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4819 4820
static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, flag zSign,
                                float_status *status)
B
bellard 已提交
4821
{
4822
    int32_t aExp, bExp, zExp;
4823
    uint64_t aSig, bSig, zSig0, zSig1;
4824
    int32_t expDiff;
B
bellard 已提交
4825 4826 4827 4828 4829 4830 4831 4832

    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    bSig = extractFloatx80Frac( b );
    bExp = extractFloatx80Exp( b );
    expDiff = aExp - bExp;
    if ( 0 < expDiff ) {
        if ( aExp == 0x7FFF ) {
4833 4834 4835
            if ((uint64_t)(aSig << 1)) {
                return propagateFloatx80NaN(a, b, status);
            }
B
bellard 已提交
4836 4837 4838 4839 4840 4841 4842 4843
            return a;
        }
        if ( bExp == 0 ) --expDiff;
        shift64ExtraRightJamming( bSig, 0, expDiff, &bSig, &zSig1 );
        zExp = aExp;
    }
    else if ( expDiff < 0 ) {
        if ( bExp == 0x7FFF ) {
4844 4845 4846
            if ((uint64_t)(bSig << 1)) {
                return propagateFloatx80NaN(a, b, status);
            }
4847 4848 4849
            return packFloatx80(zSign,
                                floatx80_infinity_high,
                                floatx80_infinity_low);
B
bellard 已提交
4850 4851 4852 4853 4854 4855 4856
        }
        if ( aExp == 0 ) ++expDiff;
        shift64ExtraRightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );
        zExp = bExp;
    }
    else {
        if ( aExp == 0x7FFF ) {
4857
            if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) {
4858
                return propagateFloatx80NaN(a, b, status);
B
bellard 已提交
4859 4860 4861 4862 4863 4864 4865 4866 4867 4868 4869 4870 4871
            }
            return a;
        }
        zSig1 = 0;
        zSig0 = aSig + bSig;
        if ( aExp == 0 ) {
            normalizeFloatx80Subnormal( zSig0, &zExp, &zSig0 );
            goto roundAndPack;
        }
        zExp = aExp;
        goto shiftRight1;
    }
    zSig0 = aSig + bSig;
4872
    if ( (int64_t) zSig0 < 0 ) goto roundAndPack;
B
bellard 已提交
4873 4874 4875 4876 4877
 shiftRight1:
    shift64ExtraRightJamming( zSig0, zSig1, 1, &zSig0, &zSig1 );
    zSig0 |= LIT64( 0x8000000000000000 );
    ++zExp;
 roundAndPack:
4878
    return roundAndPackFloatx80(status->floatx80_rounding_precision,
4879
                                zSign, zExp, zSig0, zSig1, status);
B
bellard 已提交
4880 4881 4882 4883 4884 4885 4886 4887 4888 4889
}

/*----------------------------------------------------------------------------
| Returns the result of subtracting the absolute values of the extended
| double-precision floating-point values `a' and `b'.  If `zSign' is 1, the
| difference is negated before being returned.  `zSign' is ignored if the
| result is a NaN.  The subtraction is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4890 4891
static floatx80 subFloatx80Sigs(floatx80 a, floatx80 b, flag zSign,
                                float_status *status)
B
bellard 已提交
4892
{
4893
    int32_t aExp, bExp, zExp;
4894
    uint64_t aSig, bSig, zSig0, zSig1;
4895
    int32_t expDiff;
B
bellard 已提交
4896 4897 4898 4899 4900 4901 4902 4903 4904

    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    bSig = extractFloatx80Frac( b );
    bExp = extractFloatx80Exp( b );
    expDiff = aExp - bExp;
    if ( 0 < expDiff ) goto aExpBigger;
    if ( expDiff < 0 ) goto bExpBigger;
    if ( aExp == 0x7FFF ) {
4905
        if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) {
4906
            return propagateFloatx80NaN(a, b, status);
B
bellard 已提交
4907
        }
4908
        float_raise(float_flag_invalid, status);
4909
        return floatx80_default_nan(status);
B
bellard 已提交
4910 4911 4912 4913 4914 4915 4916 4917
    }
    if ( aExp == 0 ) {
        aExp = 1;
        bExp = 1;
    }
    zSig1 = 0;
    if ( bSig < aSig ) goto aBigger;
    if ( aSig < bSig ) goto bBigger;
4918
    return packFloatx80(status->float_rounding_mode == float_round_down, 0, 0);
B
bellard 已提交
4919 4920
 bExpBigger:
    if ( bExp == 0x7FFF ) {
4921 4922 4923
        if ((uint64_t)(bSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
4924 4925
        return packFloatx80(zSign ^ 1, floatx80_infinity_high,
                            floatx80_infinity_low);
B
bellard 已提交
4926 4927 4928 4929 4930 4931 4932 4933 4934 4935
    }
    if ( aExp == 0 ) ++expDiff;
    shift128RightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );
 bBigger:
    sub128( bSig, 0, aSig, zSig1, &zSig0, &zSig1 );
    zExp = bExp;
    zSign ^= 1;
    goto normalizeRoundAndPack;
 aExpBigger:
    if ( aExp == 0x7FFF ) {
4936 4937 4938
        if ((uint64_t)(aSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
B
bellard 已提交
4939 4940 4941 4942 4943 4944 4945 4946
        return a;
    }
    if ( bExp == 0 ) --expDiff;
    shift128RightJamming( bSig, 0, expDiff, &bSig, &zSig1 );
 aBigger:
    sub128( aSig, 0, bSig, zSig1, &zSig0, &zSig1 );
    zExp = aExp;
 normalizeRoundAndPack:
4947
    return normalizeRoundAndPackFloatx80(status->floatx80_rounding_precision,
4948
                                         zSign, zExp, zSig0, zSig1, status);
B
bellard 已提交
4949 4950 4951 4952 4953 4954 4955 4956
}

/*----------------------------------------------------------------------------
| Returns the result of adding the extended double-precision floating-point
| values `a' and `b'.  The operation is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4957
floatx80 floatx80_add(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
4958 4959 4960
{
    flag aSign, bSign;

4961 4962 4963 4964
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
4965 4966 4967
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign == bSign ) {
4968
        return addFloatx80Sigs(a, b, aSign, status);
B
bellard 已提交
4969 4970
    }
    else {
4971
        return subFloatx80Sigs(a, b, aSign, status);
B
bellard 已提交
4972 4973 4974 4975 4976 4977 4978 4979 4980 4981
    }

}

/*----------------------------------------------------------------------------
| Returns the result of subtracting the extended double-precision floating-
| point values `a' and `b'.  The operation is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4982
floatx80 floatx80_sub(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
4983 4984 4985
{
    flag aSign, bSign;

4986 4987 4988 4989
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
4990 4991 4992
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign == bSign ) {
4993
        return subFloatx80Sigs(a, b, aSign, status);
B
bellard 已提交
4994 4995
    }
    else {
4996
        return addFloatx80Sigs(a, b, aSign, status);
B
bellard 已提交
4997 4998 4999 5000 5001 5002 5003 5004 5005 5006
    }

}

/*----------------------------------------------------------------------------
| Returns the result of multiplying the extended double-precision floating-
| point values `a' and `b'.  The operation is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5007
floatx80 floatx80_mul(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5008 5009
{
    flag aSign, bSign, zSign;
5010
    int32_t aExp, bExp, zExp;
5011
    uint64_t aSig, bSig, zSig0, zSig1;
B
bellard 已提交
5012

5013 5014 5015 5016
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
5017 5018 5019 5020 5021 5022 5023 5024
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    bSig = extractFloatx80Frac( b );
    bExp = extractFloatx80Exp( b );
    bSign = extractFloatx80Sign( b );
    zSign = aSign ^ bSign;
    if ( aExp == 0x7FFF ) {
5025 5026
        if (    (uint64_t) ( aSig<<1 )
             || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) {
5027
            return propagateFloatx80NaN(a, b, status);
B
bellard 已提交
5028 5029
        }
        if ( ( bExp | bSig ) == 0 ) goto invalid;
5030 5031
        return packFloatx80(zSign, floatx80_infinity_high,
                                   floatx80_infinity_low);
B
bellard 已提交
5032 5033
    }
    if ( bExp == 0x7FFF ) {
5034 5035 5036
        if ((uint64_t)(bSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
B
bellard 已提交
5037 5038
        if ( ( aExp | aSig ) == 0 ) {
 invalid:
5039
            float_raise(float_flag_invalid, status);
5040
            return floatx80_default_nan(status);
B
bellard 已提交
5041
        }
5042 5043
        return packFloatx80(zSign, floatx80_infinity_high,
                                   floatx80_infinity_low);
B
bellard 已提交
5044 5045 5046 5047 5048 5049 5050 5051 5052 5053 5054
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloatx80( zSign, 0, 0 );
        normalizeFloatx80Subnormal( aSig, &aExp, &aSig );
    }
    if ( bExp == 0 ) {
        if ( bSig == 0 ) return packFloatx80( zSign, 0, 0 );
        normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
    }
    zExp = aExp + bExp - 0x3FFE;
    mul64To128( aSig, bSig, &zSig0, &zSig1 );
5055
    if ( 0 < (int64_t) zSig0 ) {
B
bellard 已提交
5056 5057 5058
        shortShift128Left( zSig0, zSig1, 1, &zSig0, &zSig1 );
        --zExp;
    }
5059
    return roundAndPackFloatx80(status->floatx80_rounding_precision,
5060
                                zSign, zExp, zSig0, zSig1, status);
B
bellard 已提交
5061 5062 5063 5064 5065 5066 5067 5068
}

/*----------------------------------------------------------------------------
| Returns the result of dividing the extended double-precision floating-point
| value `a' by the corresponding value `b'.  The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5069
floatx80 floatx80_div(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5070 5071
{
    flag aSign, bSign, zSign;
5072
    int32_t aExp, bExp, zExp;
5073 5074
    uint64_t aSig, bSig, zSig0, zSig1;
    uint64_t rem0, rem1, rem2, term0, term1, term2;
B
bellard 已提交
5075

5076 5077 5078 5079
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
5080 5081 5082 5083 5084 5085 5086 5087
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    bSig = extractFloatx80Frac( b );
    bExp = extractFloatx80Exp( b );
    bSign = extractFloatx80Sign( b );
    zSign = aSign ^ bSign;
    if ( aExp == 0x7FFF ) {
5088 5089 5090
        if ((uint64_t)(aSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
B
bellard 已提交
5091
        if ( bExp == 0x7FFF ) {
5092 5093 5094
            if ((uint64_t)(bSig << 1)) {
                return propagateFloatx80NaN(a, b, status);
            }
B
bellard 已提交
5095 5096
            goto invalid;
        }
5097 5098
        return packFloatx80(zSign, floatx80_infinity_high,
                                   floatx80_infinity_low);
B
bellard 已提交
5099 5100
    }
    if ( bExp == 0x7FFF ) {
5101 5102 5103
        if ((uint64_t)(bSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
B
bellard 已提交
5104 5105 5106 5107 5108 5109
        return packFloatx80( zSign, 0, 0 );
    }
    if ( bExp == 0 ) {
        if ( bSig == 0 ) {
            if ( ( aExp | aSig ) == 0 ) {
 invalid:
5110
                float_raise(float_flag_invalid, status);
5111
                return floatx80_default_nan(status);
B
bellard 已提交
5112
            }
5113
            float_raise(float_flag_divbyzero, status);
5114 5115
            return packFloatx80(zSign, floatx80_infinity_high,
                                       floatx80_infinity_low);
B
bellard 已提交
5116 5117 5118 5119 5120 5121 5122 5123 5124 5125 5126 5127 5128 5129 5130 5131
        }
        normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloatx80( zSign, 0, 0 );
        normalizeFloatx80Subnormal( aSig, &aExp, &aSig );
    }
    zExp = aExp - bExp + 0x3FFE;
    rem1 = 0;
    if ( bSig <= aSig ) {
        shift128Right( aSig, 0, 1, &aSig, &rem1 );
        ++zExp;
    }
    zSig0 = estimateDiv128To64( aSig, rem1, bSig );
    mul64To128( bSig, zSig0, &term0, &term1 );
    sub128( aSig, rem1, term0, term1, &rem0, &rem1 );
5132
    while ( (int64_t) rem0 < 0 ) {
B
bellard 已提交
5133 5134 5135 5136
        --zSig0;
        add128( rem0, rem1, 0, bSig, &rem0, &rem1 );
    }
    zSig1 = estimateDiv128To64( rem1, 0, bSig );
5137
    if ( (uint64_t) ( zSig1<<1 ) <= 8 ) {
B
bellard 已提交
5138 5139
        mul64To128( bSig, zSig1, &term1, &term2 );
        sub128( rem1, 0, term1, term2, &rem1, &rem2 );
5140
        while ( (int64_t) rem1 < 0 ) {
B
bellard 已提交
5141 5142 5143 5144 5145
            --zSig1;
            add128( rem1, rem2, 0, bSig, &rem1, &rem2 );
        }
        zSig1 |= ( ( rem1 | rem2 ) != 0 );
    }
5146
    return roundAndPackFloatx80(status->floatx80_rounding_precision,
5147
                                zSign, zExp, zSig0, zSig1, status);
B
bellard 已提交
5148 5149 5150 5151 5152 5153 5154 5155
}

/*----------------------------------------------------------------------------
| Returns the remainder of the extended double-precision floating-point value
| `a' with respect to the corresponding value `b'.  The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5156
floatx80 floatx80_rem(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5157
{
5158
    flag aSign, zSign;
5159
    int32_t aExp, bExp, expDiff;
5160 5161
    uint64_t aSig0, aSig1, bSig;
    uint64_t q, term0, term1, alternateASig0, alternateASig1;
B
bellard 已提交
5162

5163 5164 5165 5166
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
5167 5168 5169 5170 5171 5172
    aSig0 = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    bSig = extractFloatx80Frac( b );
    bExp = extractFloatx80Exp( b );
    if ( aExp == 0x7FFF ) {
5173 5174
        if (    (uint64_t) ( aSig0<<1 )
             || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) {
5175
            return propagateFloatx80NaN(a, b, status);
B
bellard 已提交
5176 5177 5178 5179
        }
        goto invalid;
    }
    if ( bExp == 0x7FFF ) {
5180 5181 5182
        if ((uint64_t)(bSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
B
bellard 已提交
5183 5184 5185 5186 5187
        return a;
    }
    if ( bExp == 0 ) {
        if ( bSig == 0 ) {
 invalid:
5188
            float_raise(float_flag_invalid, status);
5189
            return floatx80_default_nan(status);
B
bellard 已提交
5190 5191 5192 5193
        }
        normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
    }
    if ( aExp == 0 ) {
5194
        if ( (uint64_t) ( aSig0<<1 ) == 0 ) return a;
B
bellard 已提交
5195 5196 5197 5198 5199 5200 5201 5202 5203 5204 5205 5206 5207 5208 5209 5210 5211 5212 5213 5214 5215 5216 5217 5218 5219 5220 5221 5222 5223 5224 5225 5226 5227 5228 5229 5230 5231 5232 5233 5234 5235 5236 5237 5238 5239 5240 5241 5242 5243 5244
        normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 );
    }
    bSig |= LIT64( 0x8000000000000000 );
    zSign = aSign;
    expDiff = aExp - bExp;
    aSig1 = 0;
    if ( expDiff < 0 ) {
        if ( expDiff < -1 ) return a;
        shift128Right( aSig0, 0, 1, &aSig0, &aSig1 );
        expDiff = 0;
    }
    q = ( bSig <= aSig0 );
    if ( q ) aSig0 -= bSig;
    expDiff -= 64;
    while ( 0 < expDiff ) {
        q = estimateDiv128To64( aSig0, aSig1, bSig );
        q = ( 2 < q ) ? q - 2 : 0;
        mul64To128( bSig, q, &term0, &term1 );
        sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );
        shortShift128Left( aSig0, aSig1, 62, &aSig0, &aSig1 );
        expDiff -= 62;
    }
    expDiff += 64;
    if ( 0 < expDiff ) {
        q = estimateDiv128To64( aSig0, aSig1, bSig );
        q = ( 2 < q ) ? q - 2 : 0;
        q >>= 64 - expDiff;
        mul64To128( bSig, q<<( 64 - expDiff ), &term0, &term1 );
        sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );
        shortShift128Left( 0, bSig, 64 - expDiff, &term0, &term1 );
        while ( le128( term0, term1, aSig0, aSig1 ) ) {
            ++q;
            sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );
        }
    }
    else {
        term1 = 0;
        term0 = bSig;
    }
    sub128( term0, term1, aSig0, aSig1, &alternateASig0, &alternateASig1 );
    if (    lt128( alternateASig0, alternateASig1, aSig0, aSig1 )
         || (    eq128( alternateASig0, alternateASig1, aSig0, aSig1 )
              && ( q & 1 ) )
       ) {
        aSig0 = alternateASig0;
        aSig1 = alternateASig1;
        zSign = ! zSign;
    }
    return
        normalizeRoundAndPackFloatx80(
5245
            80, zSign, bExp + expDiff, aSig0, aSig1, status);
B
bellard 已提交
5246 5247 5248 5249 5250 5251 5252 5253 5254

}

/*----------------------------------------------------------------------------
| Returns the square root of the extended double-precision floating-point
| value `a'.  The operation is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5255
floatx80 floatx80_sqrt(floatx80 a, float_status *status)
B
bellard 已提交
5256 5257
{
    flag aSign;
5258
    int32_t aExp, zExp;
5259 5260
    uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0;
    uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
B
bellard 已提交
5261

5262 5263 5264 5265
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
5266 5267 5268 5269
    aSig0 = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    if ( aExp == 0x7FFF ) {
5270 5271 5272
        if ((uint64_t)(aSig0 << 1)) {
            return propagateFloatx80NaN(a, a, status);
        }
B
bellard 已提交
5273 5274 5275 5276 5277 5278
        if ( ! aSign ) return a;
        goto invalid;
    }
    if ( aSign ) {
        if ( ( aExp | aSig0 ) == 0 ) return a;
 invalid:
5279
        float_raise(float_flag_invalid, status);
5280
        return floatx80_default_nan(status);
B
bellard 已提交
5281 5282 5283 5284 5285 5286 5287 5288 5289 5290 5291 5292
    }
    if ( aExp == 0 ) {
        if ( aSig0 == 0 ) return packFloatx80( 0, 0, 0 );
        normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 );
    }
    zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFF;
    zSig0 = estimateSqrt32( aExp, aSig0>>32 );
    shift128Right( aSig0, 0, 2 + ( aExp & 1 ), &aSig0, &aSig1 );
    zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );
    doubleZSig0 = zSig0<<1;
    mul64To128( zSig0, zSig0, &term0, &term1 );
    sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
5293
    while ( (int64_t) rem0 < 0 ) {
B
bellard 已提交
5294 5295 5296 5297 5298 5299 5300 5301 5302 5303 5304
        --zSig0;
        doubleZSig0 -= 2;
        add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
    }
    zSig1 = estimateDiv128To64( rem1, 0, doubleZSig0 );
    if ( ( zSig1 & LIT64( 0x3FFFFFFFFFFFFFFF ) ) <= 5 ) {
        if ( zSig1 == 0 ) zSig1 = 1;
        mul64To128( doubleZSig0, zSig1, &term1, &term2 );
        sub128( rem1, 0, term1, term2, &rem1, &rem2 );
        mul64To128( zSig1, zSig1, &term2, &term3 );
        sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
5305
        while ( (int64_t) rem1 < 0 ) {
B
bellard 已提交
5306 5307 5308 5309 5310 5311 5312 5313 5314 5315
            --zSig1;
            shortShift128Left( 0, zSig1, 1, &term2, &term3 );
            term3 |= 1;
            term2 |= doubleZSig0;
            add192( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );
        }
        zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
    }
    shortShift128Left( 0, zSig1, 1, &zSig0, &zSig1 );
    zSig0 |= doubleZSig0;
5316 5317
    return roundAndPackFloatx80(status->floatx80_rounding_precision,
                                0, zExp, zSig0, zSig1, status);
B
bellard 已提交
5318 5319 5320
}

/*----------------------------------------------------------------------------
5321 5322 5323 5324
| Returns 1 if the extended double-precision floating-point value `a' is equal
| to the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  Otherwise, the comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
5325 5326
*----------------------------------------------------------------------------*/

5327
int floatx80_eq(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5328 5329
{

5330 5331 5332 5333 5334
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
        || (extractFloatx80Exp(a) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(a) << 1))
        || (extractFloatx80Exp(b) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(b) << 1))
B
bellard 已提交
5335
       ) {
5336
        float_raise(float_flag_invalid, status);
B
bellard 已提交
5337 5338 5339 5340 5341 5342
        return 0;
    }
    return
           ( a.low == b.low )
        && (    ( a.high == b.high )
             || (    ( a.low == 0 )
5343
                  && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) )
B
bellard 已提交
5344 5345 5346 5347 5348 5349 5350
           );

}

/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is
| less than or equal to the corresponding value `b', and 0 otherwise.  The
5351 5352 5353
| invalid exception is raised if either operand is a NaN.  The comparison is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
B
bellard 已提交
5354 5355
*----------------------------------------------------------------------------*/

5356
int floatx80_le(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5357 5358 5359
{
    flag aSign, bSign;

5360 5361 5362 5363 5364
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
        || (extractFloatx80Exp(a) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(a) << 1))
        || (extractFloatx80Exp(b) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(b) << 1))
B
bellard 已提交
5365
       ) {
5366
        float_raise(float_flag_invalid, status);
B
bellard 已提交
5367 5368 5369 5370 5371 5372 5373
        return 0;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
5374
            || (    ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
5375 5376 5377 5378 5379 5380 5381 5382 5383 5384
                 == 0 );
    }
    return
          aSign ? le128( b.high, b.low, a.high, a.low )
        : le128( a.high, a.low, b.high, b.low );

}

/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is
5385 5386 5387
| less than the corresponding value `b', and 0 otherwise.  The invalid
| exception is raised if either operand is a NaN.  The comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
5388 5389
*----------------------------------------------------------------------------*/

5390
int floatx80_lt(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5391 5392 5393
{
    flag aSign, bSign;

5394 5395 5396 5397 5398
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
        || (extractFloatx80Exp(a) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(a) << 1))
        || (extractFloatx80Exp(b) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(b) << 1))
B
bellard 已提交
5399
       ) {
5400
        float_raise(float_flag_invalid, status);
B
bellard 已提交
5401 5402 5403 5404 5405 5406 5407
        return 0;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
5408
            && (    ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
5409 5410 5411 5412 5413 5414 5415 5416
                 != 0 );
    }
    return
          aSign ? lt128( b.high, b.low, a.high, a.low )
        : lt128( a.high, a.low, b.high, b.low );

}

5417 5418
/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point values `a' and `b'
5419 5420 5421
| cannot be compared, and 0 otherwise.  The invalid exception is raised if
| either operand is a NaN.   The comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
5422
*----------------------------------------------------------------------------*/
5423
int floatx80_unordered(floatx80 a, floatx80 b, float_status *status)
5424
{
5425 5426 5427 5428 5429
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
        || (extractFloatx80Exp(a) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(a) << 1))
        || (extractFloatx80Exp(b) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(b) << 1))
5430
       ) {
5431
        float_raise(float_flag_invalid, status);
5432 5433 5434 5435 5436
        return 1;
    }
    return 0;
}

B
bellard 已提交
5437
/*----------------------------------------------------------------------------
5438
| Returns 1 if the extended double-precision floating-point value `a' is
5439 5440 5441
| equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs do not
| cause an exception.  The comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
5442 5443
*----------------------------------------------------------------------------*/

5444
int floatx80_eq_quiet(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5445 5446
{

5447 5448 5449 5450
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return 0;
    }
B
bellard 已提交
5451
    if (    (    ( extractFloatx80Exp( a ) == 0x7FFF )
5452
              && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
B
bellard 已提交
5453
         || (    ( extractFloatx80Exp( b ) == 0x7FFF )
5454
              && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
B
bellard 已提交
5455
       ) {
5456 5457
        if (floatx80_is_signaling_nan(a, status)
         || floatx80_is_signaling_nan(b, status)) {
5458
            float_raise(float_flag_invalid, status);
5459
        }
B
bellard 已提交
5460 5461 5462 5463 5464 5465
        return 0;
    }
    return
           ( a.low == b.low )
        && (    ( a.high == b.high )
             || (    ( a.low == 0 )
5466
                  && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) )
B
bellard 已提交
5467 5468 5469 5470 5471 5472 5473 5474 5475 5476 5477
           );

}

/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is less
| than or equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs
| do not cause an exception.  Otherwise, the comparison is performed according
| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5478
int floatx80_le_quiet(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5479 5480 5481
{
    flag aSign, bSign;

5482 5483 5484 5485
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return 0;
    }
B
bellard 已提交
5486
    if (    (    ( extractFloatx80Exp( a ) == 0x7FFF )
5487
              && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
B
bellard 已提交
5488
         || (    ( extractFloatx80Exp( b ) == 0x7FFF )
5489
              && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
B
bellard 已提交
5490
       ) {
5491 5492
        if (floatx80_is_signaling_nan(a, status)
         || floatx80_is_signaling_nan(b, status)) {
5493
            float_raise(float_flag_invalid, status);
B
bellard 已提交
5494 5495 5496 5497 5498 5499 5500 5501
        }
        return 0;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
5502
            || (    ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
5503 5504 5505 5506 5507 5508 5509 5510 5511 5512 5513 5514 5515 5516 5517
                 == 0 );
    }
    return
          aSign ? le128( b.high, b.low, a.high, a.low )
        : le128( a.high, a.low, b.high, b.low );

}

/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is less
| than the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause
| an exception.  Otherwise, the comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5518
int floatx80_lt_quiet(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5519 5520 5521
{
    flag aSign, bSign;

5522 5523 5524 5525
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return 0;
    }
B
bellard 已提交
5526
    if (    (    ( extractFloatx80Exp( a ) == 0x7FFF )
5527
              && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
B
bellard 已提交
5528
         || (    ( extractFloatx80Exp( b ) == 0x7FFF )
5529
              && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
B
bellard 已提交
5530
       ) {
5531 5532
        if (floatx80_is_signaling_nan(a, status)
         || floatx80_is_signaling_nan(b, status)) {
5533
            float_raise(float_flag_invalid, status);
B
bellard 已提交
5534 5535 5536 5537 5538 5539 5540 5541
        }
        return 0;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
5542
            && (    ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
5543 5544 5545 5546 5547 5548 5549 5550
                 != 0 );
    }
    return
          aSign ? lt128( b.high, b.low, a.high, a.low )
        : lt128( a.high, a.low, b.high, b.low );

}

5551 5552 5553 5554 5555 5556
/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point values `a' and `b'
| cannot be compared, and 0 otherwise.  Quiet NaNs do not cause an exception.
| The comparison is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
5557
int floatx80_unordered_quiet(floatx80 a, floatx80 b, float_status *status)
5558
{
5559 5560 5561 5562
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return 1;
    }
5563 5564 5565 5566 5567
    if (    (    ( extractFloatx80Exp( a ) == 0x7FFF )
              && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
         || (    ( extractFloatx80Exp( b ) == 0x7FFF )
              && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
       ) {
5568 5569
        if (floatx80_is_signaling_nan(a, status)
         || floatx80_is_signaling_nan(b, status)) {
5570
            float_raise(float_flag_invalid, status);
5571 5572 5573 5574 5575 5576
        }
        return 1;
    }
    return 0;
}

B
bellard 已提交
5577 5578 5579 5580 5581 5582 5583 5584 5585 5586
/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the 32-bit two's complement integer format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic---which means in particular that the conversion is rounded
| according to the current rounding mode.  If `a' is a NaN, the largest
| positive integer is returned.  Otherwise, if the conversion overflows, the
| largest integer with the same sign as `a' is returned.
*----------------------------------------------------------------------------*/

5587
int32_t float128_to_int32(float128 a, float_status *status)
B
bellard 已提交
5588 5589
{
    flag aSign;
5590
    int32_t aExp, shiftCount;
5591
    uint64_t aSig0, aSig1;
B
bellard 已提交
5592 5593 5594 5595 5596 5597 5598 5599 5600 5601

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) aSign = 0;
    if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
    aSig0 |= ( aSig1 != 0 );
    shiftCount = 0x4028 - aExp;
    if ( 0 < shiftCount ) shift64RightJamming( aSig0, shiftCount, &aSig0 );
5602
    return roundAndPackInt32(aSign, aSig0, status);
B
bellard 已提交
5603 5604 5605 5606 5607 5608 5609 5610 5611 5612 5613 5614 5615

}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the 32-bit two's complement integer format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic, except that the conversion is always rounded toward zero.  If
| `a' is a NaN, the largest positive integer is returned.  Otherwise, if the
| conversion overflows, the largest integer with the same sign as `a' is
| returned.
*----------------------------------------------------------------------------*/

5616
int32_t float128_to_int32_round_to_zero(float128 a, float_status *status)
B
bellard 已提交
5617 5618
{
    flag aSign;
5619
    int32_t aExp, shiftCount;
5620
    uint64_t aSig0, aSig1, savedASig;
5621
    int32_t z;
B
bellard 已提交
5622 5623 5624 5625 5626 5627 5628 5629 5630 5631 5632

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    aSig0 |= ( aSig1 != 0 );
    if ( 0x401E < aExp ) {
        if ( ( aExp == 0x7FFF ) && aSig0 ) aSign = 0;
        goto invalid;
    }
    else if ( aExp < 0x3FFF ) {
5633 5634 5635
        if (aExp || aSig0) {
            status->float_exception_flags |= float_flag_inexact;
        }
B
bellard 已提交
5636 5637 5638 5639 5640 5641 5642 5643 5644 5645
        return 0;
    }
    aSig0 |= LIT64( 0x0001000000000000 );
    shiftCount = 0x402F - aExp;
    savedASig = aSig0;
    aSig0 >>= shiftCount;
    z = aSig0;
    if ( aSign ) z = - z;
    if ( ( z < 0 ) ^ aSign ) {
 invalid:
5646
        float_raise(float_flag_invalid, status);
5647
        return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
B
bellard 已提交
5648 5649
    }
    if ( ( aSig0<<shiftCount ) != savedASig ) {
5650
        status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
5651 5652 5653 5654 5655 5656 5657 5658 5659 5660 5661 5662 5663 5664 5665
    }
    return z;

}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the 64-bit two's complement integer format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic---which means in particular that the conversion is rounded
| according to the current rounding mode.  If `a' is a NaN, the largest
| positive integer is returned.  Otherwise, if the conversion overflows, the
| largest integer with the same sign as `a' is returned.
*----------------------------------------------------------------------------*/

5666
int64_t float128_to_int64(float128 a, float_status *status)
B
bellard 已提交
5667 5668
{
    flag aSign;
5669
    int32_t aExp, shiftCount;
5670
    uint64_t aSig0, aSig1;
B
bellard 已提交
5671 5672 5673 5674 5675 5676 5677 5678 5679

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
    shiftCount = 0x402F - aExp;
    if ( shiftCount <= 0 ) {
        if ( 0x403E < aExp ) {
5680
            float_raise(float_flag_invalid, status);
B
bellard 已提交
5681 5682 5683 5684 5685 5686 5687
            if (    ! aSign
                 || (    ( aExp == 0x7FFF )
                      && ( aSig1 || ( aSig0 != LIT64( 0x0001000000000000 ) ) )
                    )
               ) {
                return LIT64( 0x7FFFFFFFFFFFFFFF );
            }
5688
            return (int64_t) LIT64( 0x8000000000000000 );
B
bellard 已提交
5689 5690 5691 5692 5693 5694
        }
        shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 );
    }
    else {
        shift64ExtraRightJamming( aSig0, aSig1, shiftCount, &aSig0, &aSig1 );
    }
5695
    return roundAndPackInt64(aSign, aSig0, aSig1, status);
B
bellard 已提交
5696 5697 5698 5699 5700 5701 5702 5703 5704 5705 5706 5707 5708

}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the 64-bit two's complement integer format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic, except that the conversion is always rounded toward zero.
| If `a' is a NaN, the largest positive integer is returned.  Otherwise, if
| the conversion overflows, the largest integer with the same sign as `a' is
| returned.
*----------------------------------------------------------------------------*/

5709
int64_t float128_to_int64_round_to_zero(float128 a, float_status *status)
B
bellard 已提交
5710 5711
{
    flag aSign;
5712
    int32_t aExp, shiftCount;
5713
    uint64_t aSig0, aSig1;
5714
    int64_t z;
B
bellard 已提交
5715 5716 5717 5718 5719 5720 5721 5722 5723 5724 5725 5726

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
    shiftCount = aExp - 0x402F;
    if ( 0 < shiftCount ) {
        if ( 0x403E <= aExp ) {
            aSig0 &= LIT64( 0x0000FFFFFFFFFFFF );
            if (    ( a.high == LIT64( 0xC03E000000000000 ) )
                 && ( aSig1 < LIT64( 0x0002000000000000 ) ) ) {
5727 5728 5729
                if (aSig1) {
                    status->float_exception_flags |= float_flag_inexact;
                }
B
bellard 已提交
5730 5731
            }
            else {
5732
                float_raise(float_flag_invalid, status);
B
bellard 已提交
5733 5734 5735 5736
                if ( ! aSign || ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) ) {
                    return LIT64( 0x7FFFFFFFFFFFFFFF );
                }
            }
5737
            return (int64_t) LIT64( 0x8000000000000000 );
B
bellard 已提交
5738 5739
        }
        z = ( aSig0<<shiftCount ) | ( aSig1>>( ( - shiftCount ) & 63 ) );
5740
        if ( (uint64_t) ( aSig1<<shiftCount ) ) {
5741
            status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
5742 5743 5744 5745 5746
        }
    }
    else {
        if ( aExp < 0x3FFF ) {
            if ( aExp | aSig0 | aSig1 ) {
5747
                status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
5748 5749 5750 5751 5752
            }
            return 0;
        }
        z = aSig0>>( - shiftCount );
        if (    aSig1
5753
             || ( shiftCount && (uint64_t) ( aSig0<<( shiftCount & 63 ) ) ) ) {
5754
            status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
5755 5756 5757 5758 5759 5760 5761
        }
    }
    if ( aSign ) z = - z;
    return z;

}

5762 5763 5764 5765 5766 5767 5768 5769 5770 5771 5772 5773 5774 5775 5776 5777 5778 5779 5780 5781 5782 5783 5784 5785 5786 5787 5788 5789 5790 5791 5792 5793 5794 5795 5796 5797 5798 5799 5800 5801 5802 5803 5804 5805 5806 5807 5808 5809 5810 5811 5812 5813 5814 5815 5816 5817 5818 5819 5820
/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point value
| `a' to the 64-bit unsigned integer format.  The conversion is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic---which means in particular that the conversion is rounded
| according to the current rounding mode.  If `a' is a NaN, the largest
| positive integer is returned.  If the conversion overflows, the
| largest unsigned integer is returned.  If 'a' is negative, the value is
| rounded and zero is returned; negative values that do not round to zero
| will raise the inexact exception.
*----------------------------------------------------------------------------*/

uint64_t float128_to_uint64(float128 a, float_status *status)
{
    flag aSign;
    int aExp;
    int shiftCount;
    uint64_t aSig0, aSig1;

    aSig0 = extractFloat128Frac0(a);
    aSig1 = extractFloat128Frac1(a);
    aExp = extractFloat128Exp(a);
    aSign = extractFloat128Sign(a);
    if (aSign && (aExp > 0x3FFE)) {
        float_raise(float_flag_invalid, status);
        if (float128_is_any_nan(a)) {
            return LIT64(0xFFFFFFFFFFFFFFFF);
        } else {
            return 0;
        }
    }
    if (aExp) {
        aSig0 |= LIT64(0x0001000000000000);
    }
    shiftCount = 0x402F - aExp;
    if (shiftCount <= 0) {
        if (0x403E < aExp) {
            float_raise(float_flag_invalid, status);
            return LIT64(0xFFFFFFFFFFFFFFFF);
        }
        shortShift128Left(aSig0, aSig1, -shiftCount, &aSig0, &aSig1);
    } else {
        shift64ExtraRightJamming(aSig0, aSig1, shiftCount, &aSig0, &aSig1);
    }
    return roundAndPackUint64(aSign, aSig0, aSig1, status);
}

uint64_t float128_to_uint64_round_to_zero(float128 a, float_status *status)
{
    uint64_t v;
    signed char current_rounding_mode = status->float_rounding_mode;

    set_float_rounding_mode(float_round_to_zero, status);
    v = float128_to_uint64(a, status);
    set_float_rounding_mode(current_rounding_mode, status);

    return v;
}

B
bellard 已提交
5821 5822
/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
5823 5824 5825 5826 5827 5828 5829 5830 5831 5832 5833 5834 5835 5836 5837 5838 5839 5840 5841 5842 5843 5844 5845 5846 5847 5848 5849 5850
| value `a' to the 32-bit unsigned integer format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic except that the conversion is always rounded toward zero.
| If `a' is a NaN, the largest positive integer is returned.  Otherwise,
| if the conversion overflows, the largest unsigned integer is returned.
| If 'a' is negative, the value is rounded and zero is returned; negative
| values that do not round to zero will raise the inexact exception.
*----------------------------------------------------------------------------*/

uint32_t float128_to_uint32_round_to_zero(float128 a, float_status *status)
{
    uint64_t v;
    uint32_t res;
    int old_exc_flags = get_float_exception_flags(status);

    v = float128_to_uint64_round_to_zero(a, status);
    if (v > 0xffffffff) {
        res = 0xffffffff;
    } else {
        return v;
    }
    set_float_exception_flags(old_exc_flags, status);
    float_raise(float_flag_invalid, status);
    return res;
}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
B
bellard 已提交
5851 5852 5853 5854 5855
| value `a' to the single-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

5856
float32 float128_to_float32(float128 a, float_status *status)
B
bellard 已提交
5857 5858
{
    flag aSign;
5859
    int32_t aExp;
5860 5861
    uint64_t aSig0, aSig1;
    uint32_t zSig;
B
bellard 已提交
5862 5863 5864 5865 5866 5867 5868

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
        if ( aSig0 | aSig1 ) {
5869
            return commonNaNToFloat32(float128ToCommonNaN(a, status), status);
B
bellard 已提交
5870 5871 5872 5873 5874 5875 5876 5877 5878 5879
        }
        return packFloat32( aSign, 0xFF, 0 );
    }
    aSig0 |= ( aSig1 != 0 );
    shift64RightJamming( aSig0, 18, &aSig0 );
    zSig = aSig0;
    if ( aExp || zSig ) {
        zSig |= 0x40000000;
        aExp -= 0x3F81;
    }
5880
    return roundAndPackFloat32(aSign, aExp, zSig, status);
B
bellard 已提交
5881 5882 5883 5884 5885 5886 5887 5888 5889 5890

}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the double-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

5891
float64 float128_to_float64(float128 a, float_status *status)
B
bellard 已提交
5892 5893
{
    flag aSign;
5894
    int32_t aExp;
5895
    uint64_t aSig0, aSig1;
B
bellard 已提交
5896 5897 5898 5899 5900 5901 5902

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
        if ( aSig0 | aSig1 ) {
5903
            return commonNaNToFloat64(float128ToCommonNaN(a, status), status);
B
bellard 已提交
5904 5905 5906 5907 5908 5909 5910 5911 5912
        }
        return packFloat64( aSign, 0x7FF, 0 );
    }
    shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );
    aSig0 |= ( aSig1 != 0 );
    if ( aExp || aSig0 ) {
        aSig0 |= LIT64( 0x4000000000000000 );
        aExp -= 0x3C01;
    }
5913
    return roundAndPackFloat64(aSign, aExp, aSig0, status);
B
bellard 已提交
5914 5915 5916 5917 5918 5919 5920 5921 5922 5923

}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the extended double-precision floating-point format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5924
floatx80 float128_to_floatx80(float128 a, float_status *status)
B
bellard 已提交
5925 5926
{
    flag aSign;
5927
    int32_t aExp;
5928
    uint64_t aSig0, aSig1;
B
bellard 已提交
5929 5930 5931 5932 5933 5934 5935

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
        if ( aSig0 | aSig1 ) {
5936
            return commonNaNToFloatx80(float128ToCommonNaN(a, status), status);
B
bellard 已提交
5937
        }
5938 5939
        return packFloatx80(aSign, floatx80_infinity_high,
                                   floatx80_infinity_low);
B
bellard 已提交
5940 5941 5942 5943 5944 5945 5946 5947 5948
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return packFloatx80( aSign, 0, 0 );
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    else {
        aSig0 |= LIT64( 0x0001000000000000 );
    }
    shortShift128Left( aSig0, aSig1, 15, &aSig0, &aSig1 );
5949
    return roundAndPackFloatx80(80, aSign, aExp, aSig0, aSig1, status);
B
bellard 已提交
5950 5951 5952 5953 5954 5955 5956 5957 5958 5959

}

/*----------------------------------------------------------------------------
| Rounds the quadruple-precision floating-point value `a' to an integer, and
| returns the result as a quadruple-precision floating-point value.  The
| operation is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5960
float128 float128_round_to_int(float128 a, float_status *status)
B
bellard 已提交
5961 5962
{
    flag aSign;
5963
    int32_t aExp;
5964
    uint64_t lastBitMask, roundBitsMask;
B
bellard 已提交
5965 5966 5967 5968 5969 5970 5971 5972
    float128 z;

    aExp = extractFloat128Exp( a );
    if ( 0x402F <= aExp ) {
        if ( 0x406F <= aExp ) {
            if (    ( aExp == 0x7FFF )
                 && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )
               ) {
5973
                return propagateFloat128NaN(a, a, status);
B
bellard 已提交
5974 5975 5976 5977 5978 5979 5980
            }
            return a;
        }
        lastBitMask = 1;
        lastBitMask = ( lastBitMask<<( 0x406E - aExp ) )<<1;
        roundBitsMask = lastBitMask - 1;
        z = a;
5981
        switch (status->float_rounding_mode) {
5982
        case float_round_nearest_even:
B
bellard 已提交
5983 5984 5985 5986 5987
            if ( lastBitMask ) {
                add128( z.high, z.low, 0, lastBitMask>>1, &z.high, &z.low );
                if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask;
            }
            else {
5988
                if ( (int64_t) z.low < 0 ) {
B
bellard 已提交
5989
                    ++z.high;
5990
                    if ( (uint64_t) ( z.low<<1 ) == 0 ) z.high &= ~1;
B
bellard 已提交
5991 5992
                }
            }
5993
            break;
5994 5995 5996 5997 5998 5999 6000 6001 6002
        case float_round_ties_away:
            if (lastBitMask) {
                add128(z.high, z.low, 0, lastBitMask >> 1, &z.high, &z.low);
            } else {
                if ((int64_t) z.low < 0) {
                    ++z.high;
                }
            }
            break;
6003 6004 6005 6006 6007 6008 6009 6010 6011 6012
        case float_round_to_zero:
            break;
        case float_round_up:
            if (!extractFloat128Sign(z)) {
                add128(z.high, z.low, 0, roundBitsMask, &z.high, &z.low);
            }
            break;
        case float_round_down:
            if (extractFloat128Sign(z)) {
                add128(z.high, z.low, 0, roundBitsMask, &z.high, &z.low);
B
bellard 已提交
6013
            }
6014 6015 6016
            break;
        default:
            abort();
B
bellard 已提交
6017 6018 6019 6020 6021
        }
        z.low &= ~ roundBitsMask;
    }
    else {
        if ( aExp < 0x3FFF ) {
6022
            if ( ( ( (uint64_t) ( a.high<<1 ) ) | a.low ) == 0 ) return a;
6023
            status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
6024
            aSign = extractFloat128Sign( a );
6025
            switch (status->float_rounding_mode) {
B
bellard 已提交
6026 6027 6028 6029 6030 6031 6032 6033
             case float_round_nearest_even:
                if (    ( aExp == 0x3FFE )
                     && (   extractFloat128Frac0( a )
                          | extractFloat128Frac1( a ) )
                   ) {
                    return packFloat128( aSign, 0x3FFF, 0, 0 );
                }
                break;
6034 6035 6036 6037 6038
            case float_round_ties_away:
                if (aExp == 0x3FFE) {
                    return packFloat128(aSign, 0x3FFF, 0, 0);
                }
                break;
B
bellard 已提交
6039 6040 6041 6042 6043 6044 6045 6046 6047 6048 6049 6050 6051 6052 6053 6054
             case float_round_down:
                return
                      aSign ? packFloat128( 1, 0x3FFF, 0, 0 )
                    : packFloat128( 0, 0, 0, 0 );
             case float_round_up:
                return
                      aSign ? packFloat128( 1, 0, 0, 0 )
                    : packFloat128( 0, 0x3FFF, 0, 0 );
            }
            return packFloat128( aSign, 0, 0, 0 );
        }
        lastBitMask = 1;
        lastBitMask <<= 0x402F - aExp;
        roundBitsMask = lastBitMask - 1;
        z.low = 0;
        z.high = a.high;
6055
        switch (status->float_rounding_mode) {
6056
        case float_round_nearest_even:
B
bellard 已提交
6057 6058 6059 6060
            z.high += lastBitMask>>1;
            if ( ( ( z.high & roundBitsMask ) | a.low ) == 0 ) {
                z.high &= ~ lastBitMask;
            }
6061
            break;
6062 6063 6064
        case float_round_ties_away:
            z.high += lastBitMask>>1;
            break;
6065 6066 6067 6068
        case float_round_to_zero:
            break;
        case float_round_up:
            if (!extractFloat128Sign(z)) {
B
bellard 已提交
6069 6070 6071
                z.high |= ( a.low != 0 );
                z.high += roundBitsMask;
            }
6072 6073 6074 6075 6076 6077 6078 6079 6080
            break;
        case float_round_down:
            if (extractFloat128Sign(z)) {
                z.high |= (a.low != 0);
                z.high += roundBitsMask;
            }
            break;
        default:
            abort();
B
bellard 已提交
6081 6082 6083 6084
        }
        z.high &= ~ roundBitsMask;
    }
    if ( ( z.low != a.low ) || ( z.high != a.high ) ) {
6085
        status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
6086 6087 6088 6089 6090 6091 6092 6093 6094 6095 6096 6097 6098
    }
    return z;

}

/*----------------------------------------------------------------------------
| Returns the result of adding the absolute values of the quadruple-precision
| floating-point values `a' and `b'.  If `zSign' is 1, the sum is negated
| before being returned.  `zSign' is ignored if the result is a NaN.
| The addition is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6099 6100
static float128 addFloat128Sigs(float128 a, float128 b, flag zSign,
                                float_status *status)
B
bellard 已提交
6101
{
6102
    int32_t aExp, bExp, zExp;
6103
    uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
6104
    int32_t expDiff;
B
bellard 已提交
6105 6106 6107 6108 6109 6110 6111 6112 6113 6114

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    bSig1 = extractFloat128Frac1( b );
    bSig0 = extractFloat128Frac0( b );
    bExp = extractFloat128Exp( b );
    expDiff = aExp - bExp;
    if ( 0 < expDiff ) {
        if ( aExp == 0x7FFF ) {
6115 6116 6117
            if (aSig0 | aSig1) {
                return propagateFloat128NaN(a, b, status);
            }
B
bellard 已提交
6118 6119 6120 6121 6122 6123 6124 6125 6126 6127 6128 6129 6130 6131
            return a;
        }
        if ( bExp == 0 ) {
            --expDiff;
        }
        else {
            bSig0 |= LIT64( 0x0001000000000000 );
        }
        shift128ExtraRightJamming(
            bSig0, bSig1, 0, expDiff, &bSig0, &bSig1, &zSig2 );
        zExp = aExp;
    }
    else if ( expDiff < 0 ) {
        if ( bExp == 0x7FFF ) {
6132 6133 6134
            if (bSig0 | bSig1) {
                return propagateFloat128NaN(a, b, status);
            }
B
bellard 已提交
6135 6136 6137 6138 6139 6140 6141 6142 6143 6144 6145 6146 6147 6148 6149
            return packFloat128( zSign, 0x7FFF, 0, 0 );
        }
        if ( aExp == 0 ) {
            ++expDiff;
        }
        else {
            aSig0 |= LIT64( 0x0001000000000000 );
        }
        shift128ExtraRightJamming(
            aSig0, aSig1, 0, - expDiff, &aSig0, &aSig1, &zSig2 );
        zExp = bExp;
    }
    else {
        if ( aExp == 0x7FFF ) {
            if ( aSig0 | aSig1 | bSig0 | bSig1 ) {
6150
                return propagateFloat128NaN(a, b, status);
B
bellard 已提交
6151 6152 6153 6154
            }
            return a;
        }
        add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
6155
        if ( aExp == 0 ) {
6156
            if (status->flush_to_zero) {
6157
                if (zSig0 | zSig1) {
6158
                    float_raise(float_flag_output_denormal, status);
6159 6160 6161
                }
                return packFloat128(zSign, 0, 0, 0);
            }
6162 6163
            return packFloat128( zSign, 0, zSig0, zSig1 );
        }
B
bellard 已提交
6164 6165 6166 6167 6168 6169 6170 6171 6172 6173 6174 6175 6176 6177
        zSig2 = 0;
        zSig0 |= LIT64( 0x0002000000000000 );
        zExp = aExp;
        goto shiftRight1;
    }
    aSig0 |= LIT64( 0x0001000000000000 );
    add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
    --zExp;
    if ( zSig0 < LIT64( 0x0002000000000000 ) ) goto roundAndPack;
    ++zExp;
 shiftRight1:
    shift128ExtraRightJamming(
        zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );
 roundAndPack:
6178
    return roundAndPackFloat128(zSign, zExp, zSig0, zSig1, zSig2, status);
B
bellard 已提交
6179 6180 6181 6182 6183 6184 6185 6186 6187 6188 6189

}

/*----------------------------------------------------------------------------
| Returns the result of subtracting the absolute values of the quadruple-
| precision floating-point values `a' and `b'.  If `zSign' is 1, the
| difference is negated before being returned.  `zSign' is ignored if the
| result is a NaN.  The subtraction is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6190 6191
static float128 subFloat128Sigs(float128 a, float128 b, flag zSign,
                                float_status *status)
B
bellard 已提交
6192
{
6193
    int32_t aExp, bExp, zExp;
6194
    uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;
6195
    int32_t expDiff;
B
bellard 已提交
6196 6197 6198 6199 6200 6201 6202 6203 6204 6205 6206 6207 6208 6209

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    bSig1 = extractFloat128Frac1( b );
    bSig0 = extractFloat128Frac0( b );
    bExp = extractFloat128Exp( b );
    expDiff = aExp - bExp;
    shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );
    shortShift128Left( bSig0, bSig1, 14, &bSig0, &bSig1 );
    if ( 0 < expDiff ) goto aExpBigger;
    if ( expDiff < 0 ) goto bExpBigger;
    if ( aExp == 0x7FFF ) {
        if ( aSig0 | aSig1 | bSig0 | bSig1 ) {
6210
            return propagateFloat128NaN(a, b, status);
B
bellard 已提交
6211
        }
6212
        float_raise(float_flag_invalid, status);
6213
        return float128_default_nan(status);
B
bellard 已提交
6214 6215 6216 6217 6218 6219 6220 6221 6222
    }
    if ( aExp == 0 ) {
        aExp = 1;
        bExp = 1;
    }
    if ( bSig0 < aSig0 ) goto aBigger;
    if ( aSig0 < bSig0 ) goto bBigger;
    if ( bSig1 < aSig1 ) goto aBigger;
    if ( aSig1 < bSig1 ) goto bBigger;
6223 6224
    return packFloat128(status->float_rounding_mode == float_round_down,
                        0, 0, 0);
B
bellard 已提交
6225 6226
 bExpBigger:
    if ( bExp == 0x7FFF ) {
6227 6228 6229
        if (bSig0 | bSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6230 6231 6232 6233 6234 6235 6236 6237 6238 6239 6240 6241 6242 6243 6244 6245 6246
        return packFloat128( zSign ^ 1, 0x7FFF, 0, 0 );
    }
    if ( aExp == 0 ) {
        ++expDiff;
    }
    else {
        aSig0 |= LIT64( 0x4000000000000000 );
    }
    shift128RightJamming( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );
    bSig0 |= LIT64( 0x4000000000000000 );
 bBigger:
    sub128( bSig0, bSig1, aSig0, aSig1, &zSig0, &zSig1 );
    zExp = bExp;
    zSign ^= 1;
    goto normalizeRoundAndPack;
 aExpBigger:
    if ( aExp == 0x7FFF ) {
6247 6248 6249
        if (aSig0 | aSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6250 6251 6252 6253 6254 6255 6256 6257 6258 6259 6260 6261 6262 6263 6264
        return a;
    }
    if ( bExp == 0 ) {
        --expDiff;
    }
    else {
        bSig0 |= LIT64( 0x4000000000000000 );
    }
    shift128RightJamming( bSig0, bSig1, expDiff, &bSig0, &bSig1 );
    aSig0 |= LIT64( 0x4000000000000000 );
 aBigger:
    sub128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
    zExp = aExp;
 normalizeRoundAndPack:
    --zExp;
6265 6266
    return normalizeRoundAndPackFloat128(zSign, zExp - 14, zSig0, zSig1,
                                         status);
B
bellard 已提交
6267 6268 6269 6270 6271 6272 6273 6274 6275

}

/*----------------------------------------------------------------------------
| Returns the result of adding the quadruple-precision floating-point values
| `a' and `b'.  The operation is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6276
float128 float128_add(float128 a, float128 b, float_status *status)
B
bellard 已提交
6277 6278 6279 6280 6281 6282
{
    flag aSign, bSign;

    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign == bSign ) {
6283
        return addFloat128Sigs(a, b, aSign, status);
B
bellard 已提交
6284 6285
    }
    else {
6286
        return subFloat128Sigs(a, b, aSign, status);
B
bellard 已提交
6287 6288 6289 6290 6291 6292 6293 6294 6295 6296
    }

}

/*----------------------------------------------------------------------------
| Returns the result of subtracting the quadruple-precision floating-point
| values `a' and `b'.  The operation is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6297
float128 float128_sub(float128 a, float128 b, float_status *status)
B
bellard 已提交
6298 6299 6300 6301 6302 6303
{
    flag aSign, bSign;

    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign == bSign ) {
6304
        return subFloat128Sigs(a, b, aSign, status);
B
bellard 已提交
6305 6306
    }
    else {
6307
        return addFloat128Sigs(a, b, aSign, status);
B
bellard 已提交
6308 6309 6310 6311 6312 6313 6314 6315 6316 6317
    }

}

/*----------------------------------------------------------------------------
| Returns the result of multiplying the quadruple-precision floating-point
| values `a' and `b'.  The operation is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6318
float128 float128_mul(float128 a, float128 b, float_status *status)
B
bellard 已提交
6319 6320
{
    flag aSign, bSign, zSign;
6321
    int32_t aExp, bExp, zExp;
6322
    uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;
B
bellard 已提交
6323 6324 6325 6326 6327 6328 6329 6330 6331 6332 6333 6334 6335

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    bSig1 = extractFloat128Frac1( b );
    bSig0 = extractFloat128Frac0( b );
    bExp = extractFloat128Exp( b );
    bSign = extractFloat128Sign( b );
    zSign = aSign ^ bSign;
    if ( aExp == 0x7FFF ) {
        if (    ( aSig0 | aSig1 )
             || ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {
6336
            return propagateFloat128NaN(a, b, status);
B
bellard 已提交
6337 6338 6339 6340 6341
        }
        if ( ( bExp | bSig0 | bSig1 ) == 0 ) goto invalid;
        return packFloat128( zSign, 0x7FFF, 0, 0 );
    }
    if ( bExp == 0x7FFF ) {
6342 6343 6344
        if (bSig0 | bSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6345 6346
        if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
 invalid:
6347
            float_raise(float_flag_invalid, status);
6348
            return float128_default_nan(status);
B
bellard 已提交
6349 6350 6351 6352 6353 6354 6355 6356 6357 6358 6359 6360 6361 6362 6363 6364 6365 6366 6367 6368 6369 6370
        }
        return packFloat128( zSign, 0x7FFF, 0, 0 );
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    if ( bExp == 0 ) {
        if ( ( bSig0 | bSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
        normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
    }
    zExp = aExp + bExp - 0x4000;
    aSig0 |= LIT64( 0x0001000000000000 );
    shortShift128Left( bSig0, bSig1, 16, &bSig0, &bSig1 );
    mul128To256( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1, &zSig2, &zSig3 );
    add128( zSig0, zSig1, aSig0, aSig1, &zSig0, &zSig1 );
    zSig2 |= ( zSig3 != 0 );
    if ( LIT64( 0x0002000000000000 ) <= zSig0 ) {
        shift128ExtraRightJamming(
            zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );
        ++zExp;
    }
6371
    return roundAndPackFloat128(zSign, zExp, zSig0, zSig1, zSig2, status);
B
bellard 已提交
6372 6373 6374 6375 6376 6377 6378 6379 6380

}

/*----------------------------------------------------------------------------
| Returns the result of dividing the quadruple-precision floating-point value
| `a' by the corresponding value `b'.  The operation is performed according to
| the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6381
float128 float128_div(float128 a, float128 b, float_status *status)
B
bellard 已提交
6382 6383
{
    flag aSign, bSign, zSign;
6384
    int32_t aExp, bExp, zExp;
6385 6386
    uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
    uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
B
bellard 已提交
6387 6388 6389 6390 6391 6392 6393 6394 6395 6396 6397

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    bSig1 = extractFloat128Frac1( b );
    bSig0 = extractFloat128Frac0( b );
    bExp = extractFloat128Exp( b );
    bSign = extractFloat128Sign( b );
    zSign = aSign ^ bSign;
    if ( aExp == 0x7FFF ) {
6398 6399 6400
        if (aSig0 | aSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6401
        if ( bExp == 0x7FFF ) {
6402 6403 6404
            if (bSig0 | bSig1) {
                return propagateFloat128NaN(a, b, status);
            }
B
bellard 已提交
6405 6406 6407 6408 6409
            goto invalid;
        }
        return packFloat128( zSign, 0x7FFF, 0, 0 );
    }
    if ( bExp == 0x7FFF ) {
6410 6411 6412
        if (bSig0 | bSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6413 6414 6415 6416 6417 6418
        return packFloat128( zSign, 0, 0, 0 );
    }
    if ( bExp == 0 ) {
        if ( ( bSig0 | bSig1 ) == 0 ) {
            if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
 invalid:
6419
                float_raise(float_flag_invalid, status);
6420
                return float128_default_nan(status);
B
bellard 已提交
6421
            }
6422
            float_raise(float_flag_divbyzero, status);
B
bellard 已提交
6423 6424 6425 6426 6427 6428 6429 6430 6431 6432 6433 6434 6435 6436 6437 6438 6439 6440 6441 6442
            return packFloat128( zSign, 0x7FFF, 0, 0 );
        }
        normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    zExp = aExp - bExp + 0x3FFD;
    shortShift128Left(
        aSig0 | LIT64( 0x0001000000000000 ), aSig1, 15, &aSig0, &aSig1 );
    shortShift128Left(
        bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );
    if ( le128( bSig0, bSig1, aSig0, aSig1 ) ) {
        shift128Right( aSig0, aSig1, 1, &aSig0, &aSig1 );
        ++zExp;
    }
    zSig0 = estimateDiv128To64( aSig0, aSig1, bSig0 );
    mul128By64To192( bSig0, bSig1, zSig0, &term0, &term1, &term2 );
    sub192( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 );
6443
    while ( (int64_t) rem0 < 0 ) {
B
bellard 已提交
6444 6445 6446 6447 6448 6449 6450
        --zSig0;
        add192( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 );
    }
    zSig1 = estimateDiv128To64( rem1, rem2, bSig0 );
    if ( ( zSig1 & 0x3FFF ) <= 4 ) {
        mul128By64To192( bSig0, bSig1, zSig1, &term1, &term2, &term3 );
        sub192( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 );
6451
        while ( (int64_t) rem1 < 0 ) {
B
bellard 已提交
6452 6453 6454 6455 6456 6457
            --zSig1;
            add192( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 );
        }
        zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
    }
    shift128ExtraRightJamming( zSig0, zSig1, 0, 15, &zSig0, &zSig1, &zSig2 );
6458
    return roundAndPackFloat128(zSign, zExp, zSig0, zSig1, zSig2, status);
B
bellard 已提交
6459 6460 6461 6462 6463 6464 6465 6466 6467

}

/*----------------------------------------------------------------------------
| Returns the remainder of the quadruple-precision floating-point value `a'
| with respect to the corresponding value `b'.  The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6468
float128 float128_rem(float128 a, float128 b, float_status *status)
B
bellard 已提交
6469
{
6470
    flag aSign, zSign;
6471
    int32_t aExp, bExp, expDiff;
6472 6473 6474
    uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;
    uint64_t allZero, alternateASig0, alternateASig1, sigMean1;
    int64_t sigMean0;
B
bellard 已提交
6475 6476 6477 6478 6479 6480 6481 6482 6483 6484 6485

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    bSig1 = extractFloat128Frac1( b );
    bSig0 = extractFloat128Frac0( b );
    bExp = extractFloat128Exp( b );
    if ( aExp == 0x7FFF ) {
        if (    ( aSig0 | aSig1 )
             || ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {
6486
            return propagateFloat128NaN(a, b, status);
B
bellard 已提交
6487 6488 6489 6490
        }
        goto invalid;
    }
    if ( bExp == 0x7FFF ) {
6491 6492 6493
        if (bSig0 | bSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6494 6495 6496 6497 6498
        return a;
    }
    if ( bExp == 0 ) {
        if ( ( bSig0 | bSig1 ) == 0 ) {
 invalid:
6499
            float_raise(float_flag_invalid, status);
6500
            return float128_default_nan(status);
B
bellard 已提交
6501 6502 6503 6504 6505 6506 6507 6508 6509 6510 6511 6512 6513 6514 6515 6516 6517 6518 6519 6520 6521 6522 6523 6524 6525 6526 6527 6528 6529 6530 6531 6532 6533 6534 6535 6536 6537 6538 6539 6540 6541 6542 6543 6544 6545 6546 6547 6548 6549 6550 6551 6552 6553 6554
        }
        normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return a;
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    expDiff = aExp - bExp;
    if ( expDiff < -1 ) return a;
    shortShift128Left(
        aSig0 | LIT64( 0x0001000000000000 ),
        aSig1,
        15 - ( expDiff < 0 ),
        &aSig0,
        &aSig1
    );
    shortShift128Left(
        bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );
    q = le128( bSig0, bSig1, aSig0, aSig1 );
    if ( q ) sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
    expDiff -= 64;
    while ( 0 < expDiff ) {
        q = estimateDiv128To64( aSig0, aSig1, bSig0 );
        q = ( 4 < q ) ? q - 4 : 0;
        mul128By64To192( bSig0, bSig1, q, &term0, &term1, &term2 );
        shortShift192Left( term0, term1, term2, 61, &term1, &term2, &allZero );
        shortShift128Left( aSig0, aSig1, 61, &aSig0, &allZero );
        sub128( aSig0, 0, term1, term2, &aSig0, &aSig1 );
        expDiff -= 61;
    }
    if ( -64 < expDiff ) {
        q = estimateDiv128To64( aSig0, aSig1, bSig0 );
        q = ( 4 < q ) ? q - 4 : 0;
        q >>= - expDiff;
        shift128Right( bSig0, bSig1, 12, &bSig0, &bSig1 );
        expDiff += 52;
        if ( expDiff < 0 ) {
            shift128Right( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );
        }
        else {
            shortShift128Left( aSig0, aSig1, expDiff, &aSig0, &aSig1 );
        }
        mul128By64To192( bSig0, bSig1, q, &term0, &term1, &term2 );
        sub128( aSig0, aSig1, term1, term2, &aSig0, &aSig1 );
    }
    else {
        shift128Right( aSig0, aSig1, 12, &aSig0, &aSig1 );
        shift128Right( bSig0, bSig1, 12, &bSig0, &bSig1 );
    }
    do {
        alternateASig0 = aSig0;
        alternateASig1 = aSig1;
        ++q;
        sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
6555
    } while ( 0 <= (int64_t) aSig0 );
B
bellard 已提交
6556
    add128(
6557
        aSig0, aSig1, alternateASig0, alternateASig1, (uint64_t *)&sigMean0, &sigMean1 );
B
bellard 已提交
6558 6559 6560 6561 6562
    if (    ( sigMean0 < 0 )
         || ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) {
        aSig0 = alternateASig0;
        aSig1 = alternateASig1;
    }
6563
    zSign = ( (int64_t) aSig0 < 0 );
B
bellard 已提交
6564
    if ( zSign ) sub128( 0, 0, aSig0, aSig1, &aSig0, &aSig1 );
6565 6566
    return normalizeRoundAndPackFloat128(aSign ^ zSign, bExp - 4, aSig0, aSig1,
                                         status);
B
bellard 已提交
6567 6568 6569 6570 6571 6572 6573 6574
}

/*----------------------------------------------------------------------------
| Returns the square root of the quadruple-precision floating-point value `a'.
| The operation is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6575
float128 float128_sqrt(float128 a, float_status *status)
B
bellard 已提交
6576 6577
{
    flag aSign;
6578
    int32_t aExp, zExp;
6579 6580
    uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;
    uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
B
bellard 已提交
6581 6582 6583 6584 6585 6586

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
6587 6588 6589
        if (aSig0 | aSig1) {
            return propagateFloat128NaN(a, a, status);
        }
B
bellard 已提交
6590 6591 6592 6593 6594 6595
        if ( ! aSign ) return a;
        goto invalid;
    }
    if ( aSign ) {
        if ( ( aExp | aSig0 | aSig1 ) == 0 ) return a;
 invalid:
6596
        float_raise(float_flag_invalid, status);
6597
        return float128_default_nan(status);
B
bellard 已提交
6598 6599 6600 6601 6602 6603 6604 6605 6606 6607 6608 6609 6610
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( 0, 0, 0, 0 );
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFE;
    aSig0 |= LIT64( 0x0001000000000000 );
    zSig0 = estimateSqrt32( aExp, aSig0>>17 );
    shortShift128Left( aSig0, aSig1, 13 - ( aExp & 1 ), &aSig0, &aSig1 );
    zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );
    doubleZSig0 = zSig0<<1;
    mul64To128( zSig0, zSig0, &term0, &term1 );
    sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
6611
    while ( (int64_t) rem0 < 0 ) {
B
bellard 已提交
6612 6613 6614 6615 6616 6617 6618 6619 6620 6621 6622
        --zSig0;
        doubleZSig0 -= 2;
        add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
    }
    zSig1 = estimateDiv128To64( rem1, 0, doubleZSig0 );
    if ( ( zSig1 & 0x1FFF ) <= 5 ) {
        if ( zSig1 == 0 ) zSig1 = 1;
        mul64To128( doubleZSig0, zSig1, &term1, &term2 );
        sub128( rem1, 0, term1, term2, &rem1, &rem2 );
        mul64To128( zSig1, zSig1, &term2, &term3 );
        sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
6623
        while ( (int64_t) rem1 < 0 ) {
B
bellard 已提交
6624 6625 6626 6627 6628 6629 6630 6631 6632
            --zSig1;
            shortShift128Left( 0, zSig1, 1, &term2, &term3 );
            term3 |= 1;
            term2 |= doubleZSig0;
            add192( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );
        }
        zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
    }
    shift128ExtraRightJamming( zSig0, zSig1, 0, 14, &zSig0, &zSig1, &zSig2 );
6633
    return roundAndPackFloat128(0, zExp, zSig0, zSig1, zSig2, status);
B
bellard 已提交
6634 6635 6636 6637 6638

}

/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is equal to
6639 6640
| the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  Otherwise, the comparison is performed
B
bellard 已提交
6641 6642 6643
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6644
int float128_eq(float128 a, float128 b, float_status *status)
B
bellard 已提交
6645 6646 6647 6648 6649 6650 6651
{

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6652
        float_raise(float_flag_invalid, status);
B
bellard 已提交
6653 6654 6655 6656 6657 6658
        return 0;
    }
    return
           ( a.low == b.low )
        && (    ( a.high == b.high )
             || (    ( a.low == 0 )
6659
                  && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
B
bellard 已提交
6660 6661 6662 6663 6664 6665
           );

}

/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is less than
6666 6667 6668
| or equal to the corresponding value `b', and 0 otherwise.  The invalid
| exception is raised if either operand is a NaN.  The comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
6669 6670
*----------------------------------------------------------------------------*/

6671
int float128_le(float128 a, float128 b, float_status *status)
B
bellard 已提交
6672 6673 6674 6675 6676 6677 6678 6679
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6680
        float_raise(float_flag_invalid, status);
B
bellard 已提交
6681 6682 6683 6684 6685 6686 6687
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
6688
            || (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
6689 6690 6691 6692 6693 6694 6695 6696 6697 6698
                 == 0 );
    }
    return
          aSign ? le128( b.high, b.low, a.high, a.low )
        : le128( a.high, a.low, b.high, b.low );

}

/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is less than
6699 6700 6701
| the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  The comparison is performed according
| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
6702 6703
*----------------------------------------------------------------------------*/

6704
int float128_lt(float128 a, float128 b, float_status *status)
B
bellard 已提交
6705 6706 6707 6708 6709 6710 6711 6712
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6713
        float_raise(float_flag_invalid, status);
B
bellard 已提交
6714 6715 6716 6717 6718 6719 6720
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
6721
            && (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
6722 6723 6724 6725 6726 6727 6728 6729
                 != 0 );
    }
    return
          aSign ? lt128( b.high, b.low, a.high, a.low )
        : lt128( a.high, a.low, b.high, b.low );

}

6730 6731
/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point values `a' and `b' cannot
6732 6733 6734
| be compared, and 0 otherwise.  The invalid exception is raised if either
| operand is a NaN. The comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
6735 6736
*----------------------------------------------------------------------------*/

6737
int float128_unordered(float128 a, float128 b, float_status *status)
6738 6739 6740 6741 6742 6743
{
    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6744
        float_raise(float_flag_invalid, status);
6745 6746 6747 6748 6749
        return 1;
    }
    return 0;
}

B
bellard 已提交
6750 6751
/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is equal to
6752 6753 6754
| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.  The comparison is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
B
bellard 已提交
6755 6756
*----------------------------------------------------------------------------*/

6757
int float128_eq_quiet(float128 a, float128 b, float_status *status)
B
bellard 已提交
6758 6759 6760 6761 6762 6763 6764
{

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6765 6766
        if (float128_is_signaling_nan(a, status)
         || float128_is_signaling_nan(b, status)) {
6767
            float_raise(float_flag_invalid, status);
6768
        }
B
bellard 已提交
6769 6770 6771 6772 6773 6774
        return 0;
    }
    return
           ( a.low == b.low )
        && (    ( a.high == b.high )
             || (    ( a.low == 0 )
6775
                  && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
B
bellard 已提交
6776 6777 6778 6779 6780 6781 6782 6783 6784 6785 6786
           );

}

/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is less than
| or equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs do not
| cause an exception.  Otherwise, the comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6787
int float128_le_quiet(float128 a, float128 b, float_status *status)
B
bellard 已提交
6788 6789 6790 6791 6792 6793 6794 6795
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6796 6797
        if (float128_is_signaling_nan(a, status)
         || float128_is_signaling_nan(b, status)) {
6798
            float_raise(float_flag_invalid, status);
B
bellard 已提交
6799 6800 6801 6802 6803 6804 6805 6806
        }
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
6807
            || (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
6808 6809 6810 6811 6812 6813 6814 6815 6816 6817 6818 6819 6820 6821 6822
                 == 0 );
    }
    return
          aSign ? le128( b.high, b.low, a.high, a.low )
        : le128( a.high, a.low, b.high, b.low );

}

/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is less than
| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.  Otherwise, the comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6823
int float128_lt_quiet(float128 a, float128 b, float_status *status)
B
bellard 已提交
6824 6825 6826 6827 6828 6829 6830 6831
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6832 6833
        if (float128_is_signaling_nan(a, status)
         || float128_is_signaling_nan(b, status)) {
6834
            float_raise(float_flag_invalid, status);
B
bellard 已提交
6835 6836 6837 6838 6839 6840 6841 6842
        }
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
6843
            && (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
6844 6845 6846 6847 6848 6849 6850 6851
                 != 0 );
    }
    return
          aSign ? lt128( b.high, b.low, a.high, a.low )
        : lt128( a.high, a.low, b.high, b.low );

}

6852 6853 6854 6855 6856 6857 6858
/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point values `a' and `b' cannot
| be compared, and 0 otherwise.  Quiet NaNs do not cause an exception.  The
| comparison is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6859
int float128_unordered_quiet(float128 a, float128 b, float_status *status)
6860 6861 6862 6863 6864 6865
{
    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6866 6867
        if (float128_is_signaling_nan(a, status)
         || float128_is_signaling_nan(b, status)) {
6868
            float_raise(float_flag_invalid, status);
6869 6870 6871 6872 6873 6874
        }
        return 1;
    }
    return 0;
}

6875 6876
static inline int floatx80_compare_internal(floatx80 a, floatx80 b,
                                            int is_quiet, float_status *status)
6877 6878 6879
{
    flag aSign, bSign;

6880 6881 6882 6883
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return float_relation_unordered;
    }
6884 6885 6886 6887 6888
    if (( ( extractFloatx80Exp( a ) == 0x7fff ) &&
          ( extractFloatx80Frac( a )<<1 ) ) ||
        ( ( extractFloatx80Exp( b ) == 0x7fff ) &&
          ( extractFloatx80Frac( b )<<1 ) )) {
        if (!is_quiet ||
6889 6890
            floatx80_is_signaling_nan(a, status) ||
            floatx80_is_signaling_nan(b, status)) {
6891
            float_raise(float_flag_invalid, status);
6892 6893 6894 6895 6896 6897 6898 6899 6900 6901 6902 6903 6904 6905 6906 6907 6908 6909 6910 6911 6912 6913 6914
        }
        return float_relation_unordered;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {

        if ( ( ( (uint16_t) ( ( a.high | b.high ) << 1 ) ) == 0) &&
             ( ( a.low | b.low ) == 0 ) ) {
            /* zero case */
            return float_relation_equal;
        } else {
            return 1 - (2 * aSign);
        }
    } else {
        if (a.low == b.low && a.high == b.high) {
            return float_relation_equal;
        } else {
            return 1 - 2 * (aSign ^ ( lt128( a.high, a.low, b.high, b.low ) ));
        }
    }
}

6915
int floatx80_compare(floatx80 a, floatx80 b, float_status *status)
6916
{
6917
    return floatx80_compare_internal(a, b, 0, status);
6918 6919
}

6920
int floatx80_compare_quiet(floatx80 a, floatx80 b, float_status *status)
6921
{
6922
    return floatx80_compare_internal(a, b, 1, status);
6923 6924
}

6925 6926
static inline int float128_compare_internal(float128 a, float128 b,
                                            int is_quiet, float_status *status)
6927 6928 6929 6930 6931 6932 6933 6934
{
    flag aSign, bSign;

    if (( ( extractFloat128Exp( a ) == 0x7fff ) &&
          ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) ) ||
        ( ( extractFloat128Exp( b ) == 0x7fff ) &&
          ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )) {
        if (!is_quiet ||
6935 6936
            float128_is_signaling_nan(a, status) ||
            float128_is_signaling_nan(b, status)) {
6937
            float_raise(float_flag_invalid, status);
6938 6939 6940 6941 6942 6943 6944 6945 6946 6947 6948 6949 6950 6951 6952 6953 6954 6955 6956 6957 6958
        }
        return float_relation_unordered;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        if ( ( ( ( a.high | b.high )<<1 ) | a.low | b.low ) == 0 ) {
            /* zero case */
            return float_relation_equal;
        } else {
            return 1 - (2 * aSign);
        }
    } else {
        if (a.low == b.low && a.high == b.high) {
            return float_relation_equal;
        } else {
            return 1 - 2 * (aSign ^ ( lt128( a.high, a.low, b.high, b.low ) ));
        }
    }
}

6959
int float128_compare(float128 a, float128 b, float_status *status)
6960
{
6961
    return float128_compare_internal(a, b, 0, status);
6962 6963
}

6964
int float128_compare_quiet(float128 a, float128 b, float_status *status)
6965
{
6966
    return float128_compare_internal(a, b, 1, status);
6967 6968
}

6969
floatx80 floatx80_scalbn(floatx80 a, int n, float_status *status)
P
pbrook 已提交
6970 6971
{
    flag aSign;
6972
    int32_t aExp;
6973
    uint64_t aSig;
P
pbrook 已提交
6974

6975 6976 6977 6978
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
P
pbrook 已提交
6979 6980 6981 6982
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );

6983 6984
    if ( aExp == 0x7FFF ) {
        if ( aSig<<1 ) {
6985
            return propagateFloatx80NaN(a, a, status);
6986
        }
P
pbrook 已提交
6987 6988
        return a;
    }
6989

6990 6991 6992 6993 6994 6995
    if (aExp == 0) {
        if (aSig == 0) {
            return a;
        }
        aExp++;
    }
6996

6997 6998 6999 7000 7001 7002
    if (n > 0x10000) {
        n = 0x10000;
    } else if (n < -0x10000) {
        n = -0x10000;
    }

P
pbrook 已提交
7003
    aExp += n;
7004 7005
    return normalizeRoundAndPackFloatx80(status->floatx80_rounding_precision,
                                         aSign, aExp, aSig, 0, status);
P
pbrook 已提交
7006 7007
}

7008
float128 float128_scalbn(float128 a, int n, float_status *status)
P
pbrook 已提交
7009 7010
{
    flag aSign;
7011
    int32_t aExp;
7012
    uint64_t aSig0, aSig1;
P
pbrook 已提交
7013 7014 7015 7016 7017 7018

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
7019
        if ( aSig0 | aSig1 ) {
7020
            return propagateFloat128NaN(a, a, status);
7021
        }
P
pbrook 已提交
7022 7023
        return a;
    }
7024
    if (aExp != 0) {
7025
        aSig0 |= LIT64( 0x0001000000000000 );
7026
    } else if (aSig0 == 0 && aSig1 == 0) {
7027
        return a;
7028 7029 7030
    } else {
        aExp++;
    }
7031

7032 7033 7034 7035 7036 7037
    if (n > 0x10000) {
        n = 0x10000;
    } else if (n < -0x10000) {
        n = -0x10000;
    }

7038 7039
    aExp += n - 1;
    return normalizeRoundAndPackFloat128( aSign, aExp, aSig0, aSig1
7040
                                         , status);
P
pbrook 已提交
7041 7042

}
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