softfloat.c 244.1 KB
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/*
 * QEMU float support
 *
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 * The code in this source file is derived from release 2a of the SoftFloat
 * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
 * some later contributions) are provided under that license, as detailed below.
 * It has subsequently been modified by contributors to the QEMU Project,
 * so some portions are provided under:
 *  the SoftFloat-2a license
 *  the BSD license
 *  GPL-v2-or-later
 *
 * Any future contributions to this file after December 1st 2014 will be
 * taken to be licensed under the Softfloat-2a license unless specifically
 * indicated otherwise.
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 */
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/*
===============================================================================
This C source file is part of the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 2a.
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Written by John R. Hauser.  This work was made possible in part by the
International Computer Science Institute, located at Suite 600, 1947 Center
Street, Berkeley, California 94704.  Funding was partially provided by the
National Science Foundation under grant MIP-9311980.  The original version
of this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
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is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
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arithmetic/SoftFloat.html'.

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THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort
has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO
PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
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Derivative works are acceptable, even for commercial purposes, so long as
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(1) they include prominent notice that the work is derivative, and (2) they
include prominent notice akin to these four paragraphs for those parts of
this code that are retained.
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===============================================================================
*/
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/* BSD licensing:
 * Copyright (c) 2006, Fabrice Bellard
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 * this list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution.
 *
 * 3. Neither the name of the copyright holder nor the names of its contributors
 * may be used to endorse or promote products derived from this software without
 * specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 * THE POSSIBILITY OF SUCH DAMAGE.
 */

/* Portions of this work are licensed under the terms of the GNU GPL,
 * version 2 or later. See the COPYING file in the top-level directory.
 */

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/* softfloat (and in particular the code in softfloat-specialize.h) is
 * target-dependent and needs the TARGET_* macros.
 */
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#include "qemu/osdep.h"
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#include "qemu/bitops.h"
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#include "fpu/softfloat.h"
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/* We only need stdlib for abort() */

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/*----------------------------------------------------------------------------
| Primitive arithmetic functions, including multi-word arithmetic, and
| division and square root approximations.  (Can be specialized to target if
| desired.)
*----------------------------------------------------------------------------*/
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#include "fpu/softfloat-macros.h"
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/*----------------------------------------------------------------------------
| Functions and definitions to determine:  (1) whether tininess for underflow
| is detected before or after rounding by default, (2) what (if anything)
| happens when exceptions are raised, (3) how signaling NaNs are distinguished
| from quiet NaNs, (4) the default generated quiet NaNs, and (5) how NaNs
| are propagated from function inputs to output.  These details are target-
| specific.
*----------------------------------------------------------------------------*/
#include "softfloat-specialize.h"

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/*----------------------------------------------------------------------------
| Returns the fraction bits of the half-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

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static inline uint32_t extractFloat16Frac(float16 a)
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{
    return float16_val(a) & 0x3ff;
}

/*----------------------------------------------------------------------------
| Returns the exponent bits of the half-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

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static inline int extractFloat16Exp(float16 a)
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{
    return (float16_val(a) >> 10) & 0x1f;
}

/*----------------------------------------------------------------------------
| Returns the sign bit of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

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static inline flag extractFloat16Sign(float16 a)
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{
    return float16_val(a)>>15;
}

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/*----------------------------------------------------------------------------
| Returns the fraction bits of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline uint32_t extractFloat32Frac(float32 a)
{
    return float32_val(a) & 0x007FFFFF;
}

/*----------------------------------------------------------------------------
| Returns the exponent bits of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline int extractFloat32Exp(float32 a)
{
    return (float32_val(a) >> 23) & 0xFF;
}

/*----------------------------------------------------------------------------
| Returns the sign bit of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline flag extractFloat32Sign(float32 a)
{
    return float32_val(a) >> 31;
}

/*----------------------------------------------------------------------------
| Returns the fraction bits of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline uint64_t extractFloat64Frac(float64 a)
{
    return float64_val(a) & LIT64(0x000FFFFFFFFFFFFF);
}

/*----------------------------------------------------------------------------
| Returns the exponent bits of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline int extractFloat64Exp(float64 a)
{
    return (float64_val(a) >> 52) & 0x7FF;
}

/*----------------------------------------------------------------------------
| Returns the sign bit of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

static inline flag extractFloat64Sign(float64 a)
{
    return float64_val(a) >> 63;
}

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/*
 * Classify a floating point number. Everything above float_class_qnan
 * is a NaN so cls >= float_class_qnan is any NaN.
 */

typedef enum __attribute__ ((__packed__)) {
    float_class_unclassified,
    float_class_zero,
    float_class_normal,
    float_class_inf,
    float_class_qnan,  /* all NaNs from here */
    float_class_snan,
    float_class_dnan,
    float_class_msnan, /* maybe silenced */
} FloatClass;

/*
 * Structure holding all of the decomposed parts of a float. The
 * exponent is unbiased and the fraction is normalized. All
 * calculations are done with a 64 bit fraction and then rounded as
 * appropriate for the final format.
 *
 * Thanks to the packed FloatClass a decent compiler should be able to
 * fit the whole structure into registers and avoid using the stack
 * for parameter passing.
 */

typedef struct {
    uint64_t frac;
    int32_t  exp;
    FloatClass cls;
    bool sign;
} FloatParts;

#define DECOMPOSED_BINARY_POINT    (64 - 2)
#define DECOMPOSED_IMPLICIT_BIT    (1ull << DECOMPOSED_BINARY_POINT)
#define DECOMPOSED_OVERFLOW_BIT    (DECOMPOSED_IMPLICIT_BIT << 1)

/* Structure holding all of the relevant parameters for a format.
 *   exp_size: the size of the exponent field
 *   exp_bias: the offset applied to the exponent field
 *   exp_max: the maximum normalised exponent
 *   frac_size: the size of the fraction field
 *   frac_shift: shift to normalise the fraction with DECOMPOSED_BINARY_POINT
 * The following are computed based the size of fraction
 *   frac_lsb: least significant bit of fraction
 *   fram_lsbm1: the bit bellow the least significant bit (for rounding)
 *   round_mask/roundeven_mask: masks used for rounding
 */
typedef struct {
    int exp_size;
    int exp_bias;
    int exp_max;
    int frac_size;
    int frac_shift;
    uint64_t frac_lsb;
    uint64_t frac_lsbm1;
    uint64_t round_mask;
    uint64_t roundeven_mask;
} FloatFmt;

/* Expand fields based on the size of exponent and fraction */
#define FLOAT_PARAMS(E, F)                                           \
    .exp_size       = E,                                             \
    .exp_bias       = ((1 << E) - 1) >> 1,                           \
    .exp_max        = (1 << E) - 1,                                  \
    .frac_size      = F,                                             \
    .frac_shift     = DECOMPOSED_BINARY_POINT - F,                   \
    .frac_lsb       = 1ull << (DECOMPOSED_BINARY_POINT - F),         \
    .frac_lsbm1     = 1ull << ((DECOMPOSED_BINARY_POINT - F) - 1),   \
    .round_mask     = (1ull << (DECOMPOSED_BINARY_POINT - F)) - 1,   \
    .roundeven_mask = (2ull << (DECOMPOSED_BINARY_POINT - F)) - 1

static const FloatFmt float16_params = {
    FLOAT_PARAMS(5, 10)
};

static const FloatFmt float32_params = {
    FLOAT_PARAMS(8, 23)
};

static const FloatFmt float64_params = {
    FLOAT_PARAMS(11, 52)
};

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/* Unpack a float to parts, but do not canonicalize.  */
static inline FloatParts unpack_raw(FloatFmt fmt, uint64_t raw)
{
    const int sign_pos = fmt.frac_size + fmt.exp_size;

    return (FloatParts) {
        .cls = float_class_unclassified,
        .sign = extract64(raw, sign_pos, 1),
        .exp = extract64(raw, fmt.frac_size, fmt.exp_size),
        .frac = extract64(raw, 0, fmt.frac_size),
    };
}

static inline FloatParts float16_unpack_raw(float16 f)
{
    return unpack_raw(float16_params, f);
}

static inline FloatParts float32_unpack_raw(float32 f)
{
    return unpack_raw(float32_params, f);
}

static inline FloatParts float64_unpack_raw(float64 f)
{
    return unpack_raw(float64_params, f);
}

/* Pack a float from parts, but do not canonicalize.  */
static inline uint64_t pack_raw(FloatFmt fmt, FloatParts p)
{
    const int sign_pos = fmt.frac_size + fmt.exp_size;
    uint64_t ret = deposit64(p.frac, fmt.frac_size, fmt.exp_size, p.exp);
    return deposit64(ret, sign_pos, 1, p.sign);
}

static inline float16 float16_pack_raw(FloatParts p)
{
    return make_float16(pack_raw(float16_params, p));
}

static inline float32 float32_pack_raw(FloatParts p)
{
    return make_float32(pack_raw(float32_params, p));
}

static inline float64 float64_pack_raw(FloatParts p)
{
    return make_float64(pack_raw(float64_params, p));
}

/* Canonicalize EXP and FRAC, setting CLS.  */
static FloatParts canonicalize(FloatParts part, const FloatFmt *parm,
                               float_status *status)
{
    if (part.exp == parm->exp_max) {
        if (part.frac == 0) {
            part.cls = float_class_inf;
        } else {
#ifdef NO_SIGNALING_NANS
            part.cls = float_class_qnan;
#else
            int64_t msb = part.frac << (parm->frac_shift + 2);
            if ((msb < 0) == status->snan_bit_is_one) {
                part.cls = float_class_snan;
            } else {
                part.cls = float_class_qnan;
            }
#endif
        }
    } else if (part.exp == 0) {
        if (likely(part.frac == 0)) {
            part.cls = float_class_zero;
        } else if (status->flush_inputs_to_zero) {
            float_raise(float_flag_input_denormal, status);
            part.cls = float_class_zero;
            part.frac = 0;
        } else {
            int shift = clz64(part.frac) - 1;
            part.cls = float_class_normal;
            part.exp = parm->frac_shift - parm->exp_bias - shift + 1;
            part.frac <<= shift;
        }
    } else {
        part.cls = float_class_normal;
        part.exp -= parm->exp_bias;
        part.frac = DECOMPOSED_IMPLICIT_BIT + (part.frac << parm->frac_shift);
    }
    return part;
}

/* Round and uncanonicalize a floating-point number by parts. There
 * are FRAC_SHIFT bits that may require rounding at the bottom of the
 * fraction; these bits will be removed. The exponent will be biased
 * by EXP_BIAS and must be bounded by [EXP_MAX-1, 0].
 */

static FloatParts round_canonical(FloatParts p, float_status *s,
                                  const FloatFmt *parm)
{
    const uint64_t frac_lsbm1 = parm->frac_lsbm1;
    const uint64_t round_mask = parm->round_mask;
    const uint64_t roundeven_mask = parm->roundeven_mask;
    const int exp_max = parm->exp_max;
    const int frac_shift = parm->frac_shift;
    uint64_t frac, inc;
    int exp, flags = 0;
    bool overflow_norm;

    frac = p.frac;
    exp = p.exp;

    switch (p.cls) {
    case float_class_normal:
        switch (s->float_rounding_mode) {
        case float_round_nearest_even:
            overflow_norm = false;
            inc = ((frac & roundeven_mask) != frac_lsbm1 ? frac_lsbm1 : 0);
            break;
        case float_round_ties_away:
            overflow_norm = false;
            inc = frac_lsbm1;
            break;
        case float_round_to_zero:
            overflow_norm = true;
            inc = 0;
            break;
        case float_round_up:
            inc = p.sign ? 0 : round_mask;
            overflow_norm = p.sign;
            break;
        case float_round_down:
            inc = p.sign ? round_mask : 0;
            overflow_norm = !p.sign;
            break;
        default:
            g_assert_not_reached();
        }

        exp += parm->exp_bias;
        if (likely(exp > 0)) {
            if (frac & round_mask) {
                flags |= float_flag_inexact;
                frac += inc;
                if (frac & DECOMPOSED_OVERFLOW_BIT) {
                    frac >>= 1;
                    exp++;
                }
            }
            frac >>= frac_shift;

            if (unlikely(exp >= exp_max)) {
                flags |= float_flag_overflow | float_flag_inexact;
                if (overflow_norm) {
                    exp = exp_max - 1;
                    frac = -1;
                } else {
                    p.cls = float_class_inf;
                    goto do_inf;
                }
            }
        } else if (s->flush_to_zero) {
            flags |= float_flag_output_denormal;
            p.cls = float_class_zero;
            goto do_zero;
        } else {
            bool is_tiny = (s->float_detect_tininess
                            == float_tininess_before_rounding)
                        || (exp < 0)
                        || !((frac + inc) & DECOMPOSED_OVERFLOW_BIT);

            shift64RightJamming(frac, 1 - exp, &frac);
            if (frac & round_mask) {
                /* Need to recompute round-to-even.  */
                if (s->float_rounding_mode == float_round_nearest_even) {
                    inc = ((frac & roundeven_mask) != frac_lsbm1
                           ? frac_lsbm1 : 0);
                }
                flags |= float_flag_inexact;
                frac += inc;
            }

            exp = (frac & DECOMPOSED_IMPLICIT_BIT ? 1 : 0);
            frac >>= frac_shift;

            if (is_tiny && (flags & float_flag_inexact)) {
                flags |= float_flag_underflow;
            }
            if (exp == 0 && frac == 0) {
                p.cls = float_class_zero;
            }
        }
        break;

    case float_class_zero:
    do_zero:
        exp = 0;
        frac = 0;
        break;

    case float_class_inf:
    do_inf:
        exp = exp_max;
        frac = 0;
        break;

    case float_class_qnan:
    case float_class_snan:
        exp = exp_max;
        break;

    default:
        g_assert_not_reached();
    }

    float_raise(flags, s);
    p.exp = exp;
    p.frac = frac;
    return p;
}

static FloatParts float16_unpack_canonical(float16 f, float_status *s)
{
    return canonicalize(float16_unpack_raw(f), &float16_params, s);
}

static float16 float16_round_pack_canonical(FloatParts p, float_status *s)
{
    switch (p.cls) {
    case float_class_dnan:
        return float16_default_nan(s);
    case float_class_msnan:
        return float16_maybe_silence_nan(float16_pack_raw(p), s);
    default:
        p = round_canonical(p, s, &float16_params);
        return float16_pack_raw(p);
    }
}

static FloatParts float32_unpack_canonical(float32 f, float_status *s)
{
    return canonicalize(float32_unpack_raw(f), &float32_params, s);
}

static float32 float32_round_pack_canonical(FloatParts p, float_status *s)
{
    switch (p.cls) {
    case float_class_dnan:
        return float32_default_nan(s);
    case float_class_msnan:
        return float32_maybe_silence_nan(float32_pack_raw(p), s);
    default:
        p = round_canonical(p, s, &float32_params);
        return float32_pack_raw(p);
    }
}

static FloatParts float64_unpack_canonical(float64 f, float_status *s)
{
    return canonicalize(float64_unpack_raw(f), &float64_params, s);
}

static float64 float64_round_pack_canonical(FloatParts p, float_status *s)
{
    switch (p.cls) {
    case float_class_dnan:
        return float64_default_nan(s);
    case float_class_msnan:
        return float64_maybe_silence_nan(float64_pack_raw(p), s);
    default:
        p = round_canonical(p, s, &float64_params);
        return float64_pack_raw(p);
    }
}

/* Simple helpers for checking if what NaN we have */
static bool is_nan(FloatClass c)
{
    return unlikely(c >= float_class_qnan);
}
static bool is_snan(FloatClass c)
{
    return c == float_class_snan;
}
static bool is_qnan(FloatClass c)
{
    return c == float_class_qnan;
}

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static FloatParts return_nan(FloatParts a, float_status *s)
{
    switch (a.cls) {
    case float_class_snan:
        s->float_exception_flags |= float_flag_invalid;
        a.cls = float_class_msnan;
        /* fall through */
    case float_class_qnan:
        if (s->default_nan_mode) {
            a.cls = float_class_dnan;
        }
        break;

    default:
        g_assert_not_reached();
    }
    return a;
}

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static FloatParts pick_nan(FloatParts a, FloatParts b, float_status *s)
{
    if (is_snan(a.cls) || is_snan(b.cls)) {
        s->float_exception_flags |= float_flag_invalid;
    }

    if (s->default_nan_mode) {
        a.cls = float_class_dnan;
    } else {
        if (pickNaN(is_qnan(a.cls), is_snan(a.cls),
                    is_qnan(b.cls), is_snan(b.cls),
                    a.frac > b.frac ||
                    (a.frac == b.frac && a.sign < b.sign))) {
            a = b;
        }
        a.cls = float_class_msnan;
    }
    return a;
}

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static FloatParts pick_nan_muladd(FloatParts a, FloatParts b, FloatParts c,
                                  bool inf_zero, float_status *s)
{
    if (is_snan(a.cls) || is_snan(b.cls) || is_snan(c.cls)) {
        s->float_exception_flags |= float_flag_invalid;
    }

    if (s->default_nan_mode) {
        a.cls = float_class_dnan;
    } else {
        switch (pickNaNMulAdd(is_qnan(a.cls), is_snan(a.cls),
                              is_qnan(b.cls), is_snan(b.cls),
                              is_qnan(c.cls), is_snan(c.cls),
                              inf_zero, s)) {
        case 0:
            break;
        case 1:
            a = b;
            break;
        case 2:
            a = c;
            break;
        case 3:
            a.cls = float_class_dnan;
            return a;
        default:
            g_assert_not_reached();
        }

        a.cls = float_class_msnan;
    }
    return a;
}

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/*
 * Returns the result of adding or subtracting the values of the
 * floating-point values `a' and `b'. The operation is performed
 * according to the IEC/IEEE Standard for Binary Floating-Point
 * Arithmetic.
 */

static FloatParts addsub_floats(FloatParts a, FloatParts b, bool subtract,
                                float_status *s)
{
    bool a_sign = a.sign;
    bool b_sign = b.sign ^ subtract;

    if (a_sign != b_sign) {
        /* Subtraction */

        if (a.cls == float_class_normal && b.cls == float_class_normal) {
            if (a.exp > b.exp || (a.exp == b.exp && a.frac >= b.frac)) {
                shift64RightJamming(b.frac, a.exp - b.exp, &b.frac);
                a.frac = a.frac - b.frac;
            } else {
                shift64RightJamming(a.frac, b.exp - a.exp, &a.frac);
                a.frac = b.frac - a.frac;
                a.exp = b.exp;
                a_sign ^= 1;
            }

            if (a.frac == 0) {
                a.cls = float_class_zero;
                a.sign = s->float_rounding_mode == float_round_down;
            } else {
                int shift = clz64(a.frac) - 1;
                a.frac = a.frac << shift;
                a.exp = a.exp - shift;
                a.sign = a_sign;
            }
            return a;
        }
        if (is_nan(a.cls) || is_nan(b.cls)) {
            return pick_nan(a, b, s);
        }
        if (a.cls == float_class_inf) {
            if (b.cls == float_class_inf) {
                float_raise(float_flag_invalid, s);
                a.cls = float_class_dnan;
            }
            return a;
        }
        if (a.cls == float_class_zero && b.cls == float_class_zero) {
            a.sign = s->float_rounding_mode == float_round_down;
            return a;
        }
        if (a.cls == float_class_zero || b.cls == float_class_inf) {
            b.sign = a_sign ^ 1;
            return b;
        }
        if (b.cls == float_class_zero) {
            return a;
        }
    } else {
        /* Addition */
        if (a.cls == float_class_normal && b.cls == float_class_normal) {
            if (a.exp > b.exp) {
                shift64RightJamming(b.frac, a.exp - b.exp, &b.frac);
            } else if (a.exp < b.exp) {
                shift64RightJamming(a.frac, b.exp - a.exp, &a.frac);
                a.exp = b.exp;
            }
            a.frac += b.frac;
            if (a.frac & DECOMPOSED_OVERFLOW_BIT) {
                a.frac >>= 1;
                a.exp += 1;
            }
            return a;
        }
        if (is_nan(a.cls) || is_nan(b.cls)) {
            return pick_nan(a, b, s);
        }
        if (a.cls == float_class_inf || b.cls == float_class_zero) {
            return a;
        }
        if (b.cls == float_class_inf || a.cls == float_class_zero) {
            b.sign = b_sign;
            return b;
        }
    }
    g_assert_not_reached();
}

/*
 * Returns the result of adding or subtracting the floating-point
 * values `a' and `b'. The operation is performed according to the
 * IEC/IEEE Standard for Binary Floating-Point Arithmetic.
 */

float16  __attribute__((flatten)) float16_add(float16 a, float16 b,
                                              float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pb = float16_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, false, status);

    return float16_round_pack_canonical(pr, status);
}

float32 __attribute__((flatten)) float32_add(float32 a, float32 b,
                                             float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pb = float32_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, false, status);

    return float32_round_pack_canonical(pr, status);
}

float64 __attribute__((flatten)) float64_add(float64 a, float64 b,
                                             float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pb = float64_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, false, status);

    return float64_round_pack_canonical(pr, status);
}

float16 __attribute__((flatten)) float16_sub(float16 a, float16 b,
                                             float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pb = float16_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, true, status);

    return float16_round_pack_canonical(pr, status);
}

float32 __attribute__((flatten)) float32_sub(float32 a, float32 b,
                                             float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pb = float32_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, true, status);

    return float32_round_pack_canonical(pr, status);
}

float64 __attribute__((flatten)) float64_sub(float64 a, float64 b,
                                             float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pb = float64_unpack_canonical(b, status);
    FloatParts pr = addsub_floats(pa, pb, true, status);

    return float64_round_pack_canonical(pr, status);
}

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/*
 * Returns the result of multiplying the floating-point values `a' and
 * `b'. The operation is performed according to the IEC/IEEE Standard
 * for Binary Floating-Point Arithmetic.
 */

static FloatParts mul_floats(FloatParts a, FloatParts b, float_status *s)
{
    bool sign = a.sign ^ b.sign;

    if (a.cls == float_class_normal && b.cls == float_class_normal) {
        uint64_t hi, lo;
        int exp = a.exp + b.exp;

        mul64To128(a.frac, b.frac, &hi, &lo);
        shift128RightJamming(hi, lo, DECOMPOSED_BINARY_POINT, &hi, &lo);
        if (lo & DECOMPOSED_OVERFLOW_BIT) {
            shift64RightJamming(lo, 1, &lo);
            exp += 1;
        }

        /* Re-use a */
        a.exp = exp;
        a.sign = sign;
        a.frac = lo;
        return a;
    }
    /* handle all the NaN cases */
    if (is_nan(a.cls) || is_nan(b.cls)) {
        return pick_nan(a, b, s);
    }
    /* Inf * Zero == NaN */
    if ((a.cls == float_class_inf && b.cls == float_class_zero) ||
        (a.cls == float_class_zero && b.cls == float_class_inf)) {
        s->float_exception_flags |= float_flag_invalid;
        a.cls = float_class_dnan;
        a.sign = sign;
        return a;
    }
    /* Multiply by 0 or Inf */
    if (a.cls == float_class_inf || a.cls == float_class_zero) {
        a.sign = sign;
        return a;
    }
    if (b.cls == float_class_inf || b.cls == float_class_zero) {
        b.sign = sign;
        return b;
    }
    g_assert_not_reached();
}

float16 __attribute__((flatten)) float16_mul(float16 a, float16 b,
                                             float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pb = float16_unpack_canonical(b, status);
    FloatParts pr = mul_floats(pa, pb, status);

    return float16_round_pack_canonical(pr, status);
}

float32 __attribute__((flatten)) float32_mul(float32 a, float32 b,
                                             float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pb = float32_unpack_canonical(b, status);
    FloatParts pr = mul_floats(pa, pb, status);

    return float32_round_pack_canonical(pr, status);
}

float64 __attribute__((flatten)) float64_mul(float64 a, float64 b,
                                             float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pb = float64_unpack_canonical(b, status);
    FloatParts pr = mul_floats(pa, pb, status);

    return float64_round_pack_canonical(pr, status);
}

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/*
 * Returns the result of multiplying the floating-point values `a' and
 * `b' then adding 'c', with no intermediate rounding step after the
 * multiplication. The operation is performed according to the
 * IEC/IEEE Standard for Binary Floating-Point Arithmetic 754-2008.
 * The flags argument allows the caller to select negation of the
 * addend, the intermediate product, or the final result. (The
 * difference between this and having the caller do a separate
 * negation is that negating externally will flip the sign bit on
 * NaNs.)
 */

static FloatParts muladd_floats(FloatParts a, FloatParts b, FloatParts c,
                                int flags, float_status *s)
{
    bool inf_zero = ((1 << a.cls) | (1 << b.cls)) ==
                    ((1 << float_class_inf) | (1 << float_class_zero));
    bool p_sign;
    bool sign_flip = flags & float_muladd_negate_result;
    FloatClass p_class;
    uint64_t hi, lo;
    int p_exp;

    /* It is implementation-defined whether the cases of (0,inf,qnan)
     * and (inf,0,qnan) raise InvalidOperation or not (and what QNaN
     * they return if they do), so we have to hand this information
     * off to the target-specific pick-a-NaN routine.
     */
    if (is_nan(a.cls) || is_nan(b.cls) || is_nan(c.cls)) {
        return pick_nan_muladd(a, b, c, inf_zero, s);
    }

    if (inf_zero) {
        s->float_exception_flags |= float_flag_invalid;
        a.cls = float_class_dnan;
        return a;
    }

    if (flags & float_muladd_negate_c) {
        c.sign ^= 1;
    }

    p_sign = a.sign ^ b.sign;

    if (flags & float_muladd_negate_product) {
        p_sign ^= 1;
    }

    if (a.cls == float_class_inf || b.cls == float_class_inf) {
        p_class = float_class_inf;
    } else if (a.cls == float_class_zero || b.cls == float_class_zero) {
        p_class = float_class_zero;
    } else {
        p_class = float_class_normal;
    }

    if (c.cls == float_class_inf) {
        if (p_class == float_class_inf && p_sign != c.sign) {
            s->float_exception_flags |= float_flag_invalid;
            a.cls = float_class_dnan;
        } else {
            a.cls = float_class_inf;
            a.sign = c.sign ^ sign_flip;
        }
        return a;
    }

    if (p_class == float_class_inf) {
        a.cls = float_class_inf;
        a.sign = p_sign ^ sign_flip;
        return a;
    }

    if (p_class == float_class_zero) {
        if (c.cls == float_class_zero) {
            if (p_sign != c.sign) {
                p_sign = s->float_rounding_mode == float_round_down;
            }
            c.sign = p_sign;
        } else if (flags & float_muladd_halve_result) {
            c.exp -= 1;
        }
        c.sign ^= sign_flip;
        return c;
    }

    /* a & b should be normals now... */
    assert(a.cls == float_class_normal &&
           b.cls == float_class_normal);

    p_exp = a.exp + b.exp;

    /* Multiply of 2 62-bit numbers produces a (2*62) == 124-bit
     * result.
     */
    mul64To128(a.frac, b.frac, &hi, &lo);
    /* binary point now at bit 124 */

    /* check for overflow */
    if (hi & (1ULL << (DECOMPOSED_BINARY_POINT * 2 + 1 - 64))) {
        shift128RightJamming(hi, lo, 1, &hi, &lo);
        p_exp += 1;
    }

    /* + add/sub */
    if (c.cls == float_class_zero) {
        /* move binary point back to 62 */
        shift128RightJamming(hi, lo, DECOMPOSED_BINARY_POINT, &hi, &lo);
    } else {
        int exp_diff = p_exp - c.exp;
        if (p_sign == c.sign) {
            /* Addition */
            if (exp_diff <= 0) {
                shift128RightJamming(hi, lo,
                                     DECOMPOSED_BINARY_POINT - exp_diff,
                                     &hi, &lo);
                lo += c.frac;
                p_exp = c.exp;
            } else {
                uint64_t c_hi, c_lo;
                /* shift c to the same binary point as the product (124) */
                c_hi = c.frac >> 2;
                c_lo = 0;
                shift128RightJamming(c_hi, c_lo,
                                     exp_diff,
                                     &c_hi, &c_lo);
                add128(hi, lo, c_hi, c_lo, &hi, &lo);
                /* move binary point back to 62 */
                shift128RightJamming(hi, lo, DECOMPOSED_BINARY_POINT, &hi, &lo);
            }

            if (lo & DECOMPOSED_OVERFLOW_BIT) {
                shift64RightJamming(lo, 1, &lo);
                p_exp += 1;
            }

        } else {
            /* Subtraction */
            uint64_t c_hi, c_lo;
            /* make C binary point match product at bit 124 */
            c_hi = c.frac >> 2;
            c_lo = 0;

            if (exp_diff <= 0) {
                shift128RightJamming(hi, lo, -exp_diff, &hi, &lo);
                if (exp_diff == 0
                    &&
                    (hi > c_hi || (hi == c_hi && lo >= c_lo))) {
                    sub128(hi, lo, c_hi, c_lo, &hi, &lo);
                } else {
                    sub128(c_hi, c_lo, hi, lo, &hi, &lo);
                    p_sign ^= 1;
                    p_exp = c.exp;
                }
            } else {
                shift128RightJamming(c_hi, c_lo,
                                     exp_diff,
                                     &c_hi, &c_lo);
                sub128(hi, lo, c_hi, c_lo, &hi, &lo);
            }

            if (hi == 0 && lo == 0) {
                a.cls = float_class_zero;
                a.sign = s->float_rounding_mode == float_round_down;
                a.sign ^= sign_flip;
                return a;
            } else {
                int shift;
                if (hi != 0) {
                    shift = clz64(hi);
                } else {
                    shift = clz64(lo) + 64;
                }
                /* Normalizing to a binary point of 124 is the
                   correct adjust for the exponent.  However since we're
                   shifting, we might as well put the binary point back
                   at 62 where we really want it.  Therefore shift as
                   if we're leaving 1 bit at the top of the word, but
                   adjust the exponent as if we're leaving 3 bits.  */
                shift -= 1;
                if (shift >= 64) {
                    lo = lo << (shift - 64);
                } else {
                    hi = (hi << shift) | (lo >> (64 - shift));
                    lo = hi | ((lo << shift) != 0);
                }
                p_exp -= shift - 2;
            }
        }
    }

    if (flags & float_muladd_halve_result) {
        p_exp -= 1;
    }

    /* finally prepare our result */
    a.cls = float_class_normal;
    a.sign = p_sign ^ sign_flip;
    a.exp = p_exp;
    a.frac = lo;

    return a;
}

float16 __attribute__((flatten)) float16_muladd(float16 a, float16 b, float16 c,
                                                int flags, float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pb = float16_unpack_canonical(b, status);
    FloatParts pc = float16_unpack_canonical(c, status);
    FloatParts pr = muladd_floats(pa, pb, pc, flags, status);

    return float16_round_pack_canonical(pr, status);
}

float32 __attribute__((flatten)) float32_muladd(float32 a, float32 b, float32 c,
                                                int flags, float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pb = float32_unpack_canonical(b, status);
    FloatParts pc = float32_unpack_canonical(c, status);
    FloatParts pr = muladd_floats(pa, pb, pc, flags, status);

    return float32_round_pack_canonical(pr, status);
}

float64 __attribute__((flatten)) float64_muladd(float64 a, float64 b, float64 c,
                                                int flags, float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pb = float64_unpack_canonical(b, status);
    FloatParts pc = float64_unpack_canonical(c, status);
    FloatParts pr = muladd_floats(pa, pb, pc, flags, status);

    return float64_round_pack_canonical(pr, status);
}

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/*
 * Returns the result of dividing the floating-point value `a' by the
 * corresponding value `b'. The operation is performed according to
 * the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
 */

static FloatParts div_floats(FloatParts a, FloatParts b, float_status *s)
{
    bool sign = a.sign ^ b.sign;

    if (a.cls == float_class_normal && b.cls == float_class_normal) {
        uint64_t temp_lo, temp_hi;
        int exp = a.exp - b.exp;
        if (a.frac < b.frac) {
            exp -= 1;
            shortShift128Left(0, a.frac, DECOMPOSED_BINARY_POINT + 1,
                              &temp_hi, &temp_lo);
        } else {
            shortShift128Left(0, a.frac, DECOMPOSED_BINARY_POINT,
                              &temp_hi, &temp_lo);
        }
        /* LSB of quot is set if inexact which roundandpack will use
         * to set flags. Yet again we re-use a for the result */
        a.frac = div128To64(temp_lo, temp_hi, b.frac);
        a.sign = sign;
        a.exp = exp;
        return a;
    }
    /* handle all the NaN cases */
    if (is_nan(a.cls) || is_nan(b.cls)) {
        return pick_nan(a, b, s);
    }
    /* 0/0 or Inf/Inf */
    if (a.cls == b.cls
        &&
        (a.cls == float_class_inf || a.cls == float_class_zero)) {
        s->float_exception_flags |= float_flag_invalid;
        a.cls = float_class_dnan;
        return a;
    }
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    /* Inf / x or 0 / x */
    if (a.cls == float_class_inf || a.cls == float_class_zero) {
        a.sign = sign;
        return a;
    }
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    /* Div 0 => Inf */
    if (b.cls == float_class_zero) {
        s->float_exception_flags |= float_flag_divbyzero;
        a.cls = float_class_inf;
        a.sign = sign;
        return a;
    }
    /* Div by Inf */
    if (b.cls == float_class_inf) {
        a.cls = float_class_zero;
        a.sign = sign;
        return a;
    }
    g_assert_not_reached();
}

float16 float16_div(float16 a, float16 b, float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pb = float16_unpack_canonical(b, status);
    FloatParts pr = div_floats(pa, pb, status);

    return float16_round_pack_canonical(pr, status);
}

float32 float32_div(float32 a, float32 b, float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pb = float32_unpack_canonical(b, status);
    FloatParts pr = div_floats(pa, pb, status);

    return float32_round_pack_canonical(pr, status);
}

float64 float64_div(float64 a, float64 b, float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pb = float64_unpack_canonical(b, status);
    FloatParts pr = div_floats(pa, pb, status);

    return float64_round_pack_canonical(pr, status);
}

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/*
 * Rounds the floating-point value `a' to an integer, and returns the
 * result as a floating-point value. The operation is performed
 * according to the IEC/IEEE Standard for Binary Floating-Point
 * Arithmetic.
 */

static FloatParts round_to_int(FloatParts a, int rounding_mode, float_status *s)
{
    if (is_nan(a.cls)) {
        return return_nan(a, s);
    }

    switch (a.cls) {
    case float_class_zero:
    case float_class_inf:
    case float_class_qnan:
        /* already "integral" */
        break;
    case float_class_normal:
        if (a.exp >= DECOMPOSED_BINARY_POINT) {
            /* already integral */
            break;
        }
        if (a.exp < 0) {
            bool one;
            /* all fractional */
            s->float_exception_flags |= float_flag_inexact;
            switch (rounding_mode) {
            case float_round_nearest_even:
                one = a.exp == -1 && a.frac > DECOMPOSED_IMPLICIT_BIT;
                break;
            case float_round_ties_away:
                one = a.exp == -1 && a.frac >= DECOMPOSED_IMPLICIT_BIT;
                break;
            case float_round_to_zero:
                one = false;
                break;
            case float_round_up:
                one = !a.sign;
                break;
            case float_round_down:
                one = a.sign;
                break;
            default:
                g_assert_not_reached();
            }

            if (one) {
                a.frac = DECOMPOSED_IMPLICIT_BIT;
                a.exp = 0;
            } else {
                a.cls = float_class_zero;
            }
        } else {
            uint64_t frac_lsb = DECOMPOSED_IMPLICIT_BIT >> a.exp;
            uint64_t frac_lsbm1 = frac_lsb >> 1;
            uint64_t rnd_even_mask = (frac_lsb - 1) | frac_lsb;
            uint64_t rnd_mask = rnd_even_mask >> 1;
            uint64_t inc;

            switch (rounding_mode) {
            case float_round_nearest_even:
                inc = ((a.frac & rnd_even_mask) != frac_lsbm1 ? frac_lsbm1 : 0);
                break;
            case float_round_ties_away:
                inc = frac_lsbm1;
                break;
            case float_round_to_zero:
                inc = 0;
                break;
            case float_round_up:
                inc = a.sign ? 0 : rnd_mask;
                break;
            case float_round_down:
                inc = a.sign ? rnd_mask : 0;
                break;
            default:
                g_assert_not_reached();
            }

            if (a.frac & rnd_mask) {
                s->float_exception_flags |= float_flag_inexact;
                a.frac += inc;
                a.frac &= ~rnd_mask;
                if (a.frac & DECOMPOSED_OVERFLOW_BIT) {
                    a.frac >>= 1;
                    a.exp++;
                }
            }
        }
        break;
    default:
        g_assert_not_reached();
    }
    return a;
}

float16 float16_round_to_int(float16 a, float_status *s)
{
    FloatParts pa = float16_unpack_canonical(a, s);
    FloatParts pr = round_to_int(pa, s->float_rounding_mode, s);
    return float16_round_pack_canonical(pr, s);
}

float32 float32_round_to_int(float32 a, float_status *s)
{
    FloatParts pa = float32_unpack_canonical(a, s);
    FloatParts pr = round_to_int(pa, s->float_rounding_mode, s);
    return float32_round_pack_canonical(pr, s);
}

float64 float64_round_to_int(float64 a, float_status *s)
{
    FloatParts pa = float64_unpack_canonical(a, s);
    FloatParts pr = round_to_int(pa, s->float_rounding_mode, s);
    return float64_round_pack_canonical(pr, s);
}

float64 float64_trunc_to_int(float64 a, float_status *s)
{
    FloatParts pa = float64_unpack_canonical(a, s);
    FloatParts pr = round_to_int(pa, float_round_to_zero, s);
    return float64_round_pack_canonical(pr, s);
}

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/*
 * Returns the result of converting the floating-point value `a' to
 * the two's complement integer format. The conversion is performed
 * according to the IEC/IEEE Standard for Binary Floating-Point
 * Arithmetic---which means in particular that the conversion is
 * rounded according to the current rounding mode. If `a' is a NaN,
 * the largest positive integer is returned. Otherwise, if the
 * conversion overflows, the largest integer with the same sign as `a'
 * is returned.
*/

static int64_t round_to_int_and_pack(FloatParts in, int rmode,
                                     int64_t min, int64_t max,
                                     float_status *s)
{
    uint64_t r;
    int orig_flags = get_float_exception_flags(s);
    FloatParts p = round_to_int(in, rmode, s);

    switch (p.cls) {
    case float_class_snan:
    case float_class_qnan:
1345 1346
    case float_class_dnan:
    case float_class_msnan:
1347
        s->float_exception_flags = orig_flags | float_flag_invalid;
1348 1349
        return max;
    case float_class_inf:
1350
        s->float_exception_flags = orig_flags | float_flag_invalid;
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        return p.sign ? min : max;
    case float_class_zero:
        return 0;
    case float_class_normal:
        if (p.exp < DECOMPOSED_BINARY_POINT) {
            r = p.frac >> (DECOMPOSED_BINARY_POINT - p.exp);
        } else if (p.exp - DECOMPOSED_BINARY_POINT < 2) {
            r = p.frac << (p.exp - DECOMPOSED_BINARY_POINT);
        } else {
            r = UINT64_MAX;
        }
        if (p.sign) {
            if (r < -(uint64_t) min) {
                return -r;
            } else {
                s->float_exception_flags = orig_flags | float_flag_invalid;
                return min;
            }
        } else {
            if (r < max) {
                return r;
            } else {
                s->float_exception_flags = orig_flags | float_flag_invalid;
                return max;
            }
        }
    default:
        g_assert_not_reached();
    }
}

#define FLOAT_TO_INT(fsz, isz)                                          \
int ## isz ## _t float ## fsz ## _to_int ## isz(float ## fsz a,         \
                                                float_status *s)        \
{                                                                       \
    FloatParts p = float ## fsz ## _unpack_canonical(a, s);             \
    return round_to_int_and_pack(p, s->float_rounding_mode,             \
                                 INT ## isz ## _MIN, INT ## isz ## _MAX,\
                                 s);                                    \
}                                                                       \
                                                                        \
int ## isz ## _t float ## fsz ## _to_int ## isz ## _round_to_zero       \
 (float ## fsz a, float_status *s)                                      \
{                                                                       \
    FloatParts p = float ## fsz ## _unpack_canonical(a, s);             \
    return round_to_int_and_pack(p, float_round_to_zero,                \
                                 INT ## isz ## _MIN, INT ## isz ## _MAX,\
                                 s);                                    \
}

FLOAT_TO_INT(16, 16)
FLOAT_TO_INT(16, 32)
FLOAT_TO_INT(16, 64)

FLOAT_TO_INT(32, 16)
FLOAT_TO_INT(32, 32)
FLOAT_TO_INT(32, 64)

FLOAT_TO_INT(64, 16)
FLOAT_TO_INT(64, 32)
FLOAT_TO_INT(64, 64)

#undef FLOAT_TO_INT

/*
 *  Returns the result of converting the floating-point value `a' to
 *  the unsigned integer format. The conversion is performed according
 *  to the IEC/IEEE Standard for Binary Floating-Point
 *  Arithmetic---which means in particular that the conversion is
 *  rounded according to the current rounding mode. If `a' is a NaN,
 *  the largest unsigned integer is returned. Otherwise, if the
 *  conversion overflows, the largest unsigned integer is returned. If
 *  the 'a' is negative, the result is rounded and zero is returned;
 *  values that do not round to zero will raise the inexact exception
 *  flag.
 */

static uint64_t round_to_uint_and_pack(FloatParts in, int rmode, uint64_t max,
                                       float_status *s)
{
    int orig_flags = get_float_exception_flags(s);
    FloatParts p = round_to_int(in, rmode, s);

    switch (p.cls) {
    case float_class_snan:
    case float_class_qnan:
1437 1438
    case float_class_dnan:
    case float_class_msnan:
1439 1440 1441
        s->float_exception_flags = orig_flags | float_flag_invalid;
        return max;
    case float_class_inf:
1442
        s->float_exception_flags = orig_flags | float_flag_invalid;
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        return p.sign ? 0 : max;
    case float_class_zero:
        return 0;
    case float_class_normal:
    {
        uint64_t r;
        if (p.sign) {
            s->float_exception_flags = orig_flags | float_flag_invalid;
            return 0;
        }

        if (p.exp < DECOMPOSED_BINARY_POINT) {
            r = p.frac >> (DECOMPOSED_BINARY_POINT - p.exp);
        } else if (p.exp - DECOMPOSED_BINARY_POINT < 2) {
            r = p.frac << (p.exp - DECOMPOSED_BINARY_POINT);
        } else {
            s->float_exception_flags = orig_flags | float_flag_invalid;
            return max;
        }

        /* For uint64 this will never trip, but if p.exp is too large
         * to shift a decomposed fraction we shall have exited via the
         * 3rd leg above.
         */
        if (r > max) {
            s->float_exception_flags = orig_flags | float_flag_invalid;
            return max;
        } else {
            return r;
        }
    }
    default:
        g_assert_not_reached();
    }
}

#define FLOAT_TO_UINT(fsz, isz) \
uint ## isz ## _t float ## fsz ## _to_uint ## isz(float ## fsz a,       \
                                                  float_status *s)      \
{                                                                       \
    FloatParts p = float ## fsz ## _unpack_canonical(a, s);             \
    return round_to_uint_and_pack(p, s->float_rounding_mode,            \
                                 UINT ## isz ## _MAX, s);               \
}                                                                       \
                                                                        \
uint ## isz ## _t float ## fsz ## _to_uint ## isz ## _round_to_zero     \
 (float ## fsz a, float_status *s)                                      \
{                                                                       \
    FloatParts p = float ## fsz ## _unpack_canonical(a, s);             \
1492 1493
    return round_to_uint_and_pack(p, float_round_to_zero,               \
                                  UINT ## isz ## _MAX, s);              \
1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509
}

FLOAT_TO_UINT(16, 16)
FLOAT_TO_UINT(16, 32)
FLOAT_TO_UINT(16, 64)

FLOAT_TO_UINT(32, 16)
FLOAT_TO_UINT(32, 32)
FLOAT_TO_UINT(32, 64)

FLOAT_TO_UINT(64, 16)
FLOAT_TO_UINT(64, 32)
FLOAT_TO_UINT(64, 64)

#undef FLOAT_TO_UINT

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/*
 * Integer to float conversions
 *
 * Returns the result of converting the two's complement integer `a'
 * to the floating-point format. The conversion is performed according
 * to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
 */

static FloatParts int_to_float(int64_t a, float_status *status)
{
    FloatParts r;
    if (a == 0) {
        r.cls = float_class_zero;
        r.sign = false;
    } else if (a == (1ULL << 63)) {
        r.cls = float_class_normal;
        r.sign = true;
        r.frac = DECOMPOSED_IMPLICIT_BIT;
        r.exp = 63;
    } else {
        uint64_t f;
        if (a < 0) {
            f = -a;
            r.sign = true;
        } else {
            f = a;
            r.sign = false;
        }
        int shift = clz64(f) - 1;
        r.cls = float_class_normal;
        r.exp = (DECOMPOSED_BINARY_POINT - shift);
        r.frac = f << shift;
    }

    return r;
}

float16 int64_to_float16(int64_t a, float_status *status)
{
    FloatParts pa = int_to_float(a, status);
    return float16_round_pack_canonical(pa, status);
}

float16 int32_to_float16(int32_t a, float_status *status)
{
    return int64_to_float16(a, status);
}

float16 int16_to_float16(int16_t a, float_status *status)
{
    return int64_to_float16(a, status);
}

float32 int64_to_float32(int64_t a, float_status *status)
{
    FloatParts pa = int_to_float(a, status);
    return float32_round_pack_canonical(pa, status);
}

float32 int32_to_float32(int32_t a, float_status *status)
{
    return int64_to_float32(a, status);
}

float32 int16_to_float32(int16_t a, float_status *status)
{
    return int64_to_float32(a, status);
}

float64 int64_to_float64(int64_t a, float_status *status)
{
    FloatParts pa = int_to_float(a, status);
    return float64_round_pack_canonical(pa, status);
}

float64 int32_to_float64(int32_t a, float_status *status)
{
    return int64_to_float64(a, status);
}

float64 int16_to_float64(int16_t a, float_status *status)
{
    return int64_to_float64(a, status);
}


/*
 * Unsigned Integer to float conversions
 *
 * Returns the result of converting the unsigned integer `a' to the
 * floating-point format. The conversion is performed according to the
 * IEC/IEEE Standard for Binary Floating-Point Arithmetic.
 */

static FloatParts uint_to_float(uint64_t a, float_status *status)
{
    FloatParts r = { .sign = false};

    if (a == 0) {
        r.cls = float_class_zero;
    } else {
        int spare_bits = clz64(a) - 1;
        r.cls = float_class_normal;
        r.exp = DECOMPOSED_BINARY_POINT - spare_bits;
        if (spare_bits < 0) {
            shift64RightJamming(a, -spare_bits, &a);
            r.frac = a;
        } else {
            r.frac = a << spare_bits;
        }
    }

    return r;
}

float16 uint64_to_float16(uint64_t a, float_status *status)
{
    FloatParts pa = uint_to_float(a, status);
    return float16_round_pack_canonical(pa, status);
}

float16 uint32_to_float16(uint32_t a, float_status *status)
{
    return uint64_to_float16(a, status);
}

float16 uint16_to_float16(uint16_t a, float_status *status)
{
    return uint64_to_float16(a, status);
}

float32 uint64_to_float32(uint64_t a, float_status *status)
{
    FloatParts pa = uint_to_float(a, status);
    return float32_round_pack_canonical(pa, status);
}

float32 uint32_to_float32(uint32_t a, float_status *status)
{
    return uint64_to_float32(a, status);
}

float32 uint16_to_float32(uint16_t a, float_status *status)
{
    return uint64_to_float32(a, status);
}

float64 uint64_to_float64(uint64_t a, float_status *status)
{
    FloatParts pa = uint_to_float(a, status);
    return float64_round_pack_canonical(pa, status);
}

float64 uint32_to_float64(uint32_t a, float_status *status)
{
    return uint64_to_float64(a, status);
}

float64 uint16_to_float64(uint16_t a, float_status *status)
{
    return uint64_to_float64(a, status);
}

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/* Float Min/Max */
/* min() and max() functions. These can't be implemented as
 * 'compare and pick one input' because that would mishandle
 * NaNs and +0 vs -0.
 *
 * minnum() and maxnum() functions. These are similar to the min()
 * and max() functions but if one of the arguments is a QNaN and
 * the other is numerical then the numerical argument is returned.
 * SNaNs will get quietened before being returned.
 * minnum() and maxnum correspond to the IEEE 754-2008 minNum()
 * and maxNum() operations. min() and max() are the typical min/max
 * semantics provided by many CPUs which predate that specification.
 *
 * minnummag() and maxnummag() functions correspond to minNumMag()
 * and minNumMag() from the IEEE-754 2008.
 */
static FloatParts minmax_floats(FloatParts a, FloatParts b, bool ismin,
                                bool ieee, bool ismag, float_status *s)
{
    if (unlikely(is_nan(a.cls) || is_nan(b.cls))) {
        if (ieee) {
            /* Takes two floating-point values `a' and `b', one of
             * which is a NaN, and returns the appropriate NaN
             * result. If either `a' or `b' is a signaling NaN,
             * the invalid exception is raised.
             */
            if (is_snan(a.cls) || is_snan(b.cls)) {
                return pick_nan(a, b, s);
            } else if (is_nan(a.cls) && !is_nan(b.cls)) {
                return b;
            } else if (is_nan(b.cls) && !is_nan(a.cls)) {
                return a;
            }
        }
        return pick_nan(a, b, s);
    } else {
        int a_exp, b_exp;

        switch (a.cls) {
        case float_class_normal:
            a_exp = a.exp;
            break;
        case float_class_inf:
            a_exp = INT_MAX;
            break;
        case float_class_zero:
            a_exp = INT_MIN;
            break;
        default:
            g_assert_not_reached();
            break;
        }
        switch (b.cls) {
        case float_class_normal:
            b_exp = b.exp;
            break;
        case float_class_inf:
            b_exp = INT_MAX;
            break;
        case float_class_zero:
            b_exp = INT_MIN;
            break;
        default:
            g_assert_not_reached();
            break;
        }

1740 1741 1742 1743 1744 1745
        if (ismag && (a_exp != b_exp || a.frac != b.frac)) {
            bool a_less = a_exp < b_exp;
            if (a_exp == b_exp) {
                a_less = a.frac < b.frac;
            }
            return a_less ^ ismin ? b : a;
1746 1747
        }

1748
        if (a.sign == b.sign) {
1749 1750 1751 1752
            bool a_less = a_exp < b_exp;
            if (a_exp == b_exp) {
                a_less = a.frac < b.frac;
            }
1753
            return a.sign ^ a_less ^ ismin ? b : a;
1754
        } else {
1755
            return a.sign ^ ismin ? b : a;
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        }
    }
}

#define MINMAX(sz, name, ismin, isiee, ismag)                           \
float ## sz float ## sz ## _ ## name(float ## sz a, float ## sz b,      \
                                     float_status *s)                   \
{                                                                       \
    FloatParts pa = float ## sz ## _unpack_canonical(a, s);             \
    FloatParts pb = float ## sz ## _unpack_canonical(b, s);             \
    FloatParts pr = minmax_floats(pa, pb, ismin, isiee, ismag, s);      \
                                                                        \
    return float ## sz ## _round_pack_canonical(pr, s);                 \
}

MINMAX(16, min, true, false, false)
MINMAX(16, minnum, true, true, false)
MINMAX(16, minnummag, true, true, true)
MINMAX(16, max, false, false, false)
MINMAX(16, maxnum, false, true, false)
MINMAX(16, maxnummag, false, true, true)

MINMAX(32, min, true, false, false)
MINMAX(32, minnum, true, true, false)
MINMAX(32, minnummag, true, true, true)
MINMAX(32, max, false, false, false)
MINMAX(32, maxnum, false, true, false)
MINMAX(32, maxnummag, false, true, true)

MINMAX(64, min, true, false, false)
MINMAX(64, minnum, true, true, false)
MINMAX(64, minnummag, true, true, true)
MINMAX(64, max, false, false, false)
MINMAX(64, maxnum, false, true, false)
MINMAX(64, maxnummag, false, true, true)

#undef MINMAX

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/* Floating point compare */
static int compare_floats(FloatParts a, FloatParts b, bool is_quiet,
                          float_status *s)
{
    if (is_nan(a.cls) || is_nan(b.cls)) {
        if (!is_quiet ||
            a.cls == float_class_snan ||
            b.cls == float_class_snan) {
            s->float_exception_flags |= float_flag_invalid;
        }
        return float_relation_unordered;
    }

    if (a.cls == float_class_zero) {
        if (b.cls == float_class_zero) {
            return float_relation_equal;
        }
        return b.sign ? float_relation_greater : float_relation_less;
    } else if (b.cls == float_class_zero) {
        return a.sign ? float_relation_less : float_relation_greater;
    }

    /* The only really important thing about infinity is its sign. If
     * both are infinities the sign marks the smallest of the two.
     */
    if (a.cls == float_class_inf) {
        if ((b.cls == float_class_inf) && (a.sign == b.sign)) {
            return float_relation_equal;
        }
        return a.sign ? float_relation_less : float_relation_greater;
    } else if (b.cls == float_class_inf) {
        return b.sign ? float_relation_greater : float_relation_less;
    }

    if (a.sign != b.sign) {
        return a.sign ? float_relation_less : float_relation_greater;
    }

    if (a.exp == b.exp) {
        if (a.frac == b.frac) {
            return float_relation_equal;
        }
        if (a.sign) {
            return a.frac > b.frac ?
                float_relation_less : float_relation_greater;
        } else {
            return a.frac > b.frac ?
                float_relation_greater : float_relation_less;
        }
    } else {
        if (a.sign) {
            return a.exp > b.exp ? float_relation_less : float_relation_greater;
        } else {
            return a.exp > b.exp ? float_relation_greater : float_relation_less;
        }
    }
}

#define COMPARE(sz)                                                     \
int float ## sz ## _compare(float ## sz a, float ## sz b,               \
                            float_status *s)                            \
{                                                                       \
    FloatParts pa = float ## sz ## _unpack_canonical(a, s);             \
    FloatParts pb = float ## sz ## _unpack_canonical(b, s);             \
    return compare_floats(pa, pb, false, s);                            \
}                                                                       \
int float ## sz ## _compare_quiet(float ## sz a, float ## sz b,         \
                                  float_status *s)                      \
{                                                                       \
    FloatParts pa = float ## sz ## _unpack_canonical(a, s);             \
    FloatParts pb = float ## sz ## _unpack_canonical(b, s);             \
    return compare_floats(pa, pb, true, s);                             \
}

COMPARE(16)
COMPARE(32)
COMPARE(64)

#undef COMPARE

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/* Multiply A by 2 raised to the power N.  */
static FloatParts scalbn_decomposed(FloatParts a, int n, float_status *s)
{
    if (unlikely(is_nan(a.cls))) {
        return return_nan(a, s);
    }
    if (a.cls == float_class_normal) {
1881 1882 1883 1884 1885 1886
        /* The largest float type (even though not supported by FloatParts)
         * is float128, which has a 15 bit exponent.  Bounding N to 16 bits
         * still allows rounding to infinity, without allowing overflow
         * within the int32_t that backs FloatParts.exp.
         */
        n = MIN(MAX(n, -0x10000), 0x10000);
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        a.exp += n;
    }
    return a;
}

float16 float16_scalbn(float16 a, int n, float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pr = scalbn_decomposed(pa, n, status);
    return float16_round_pack_canonical(pr, status);
}

float32 float32_scalbn(float32 a, int n, float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pr = scalbn_decomposed(pa, n, status);
    return float32_round_pack_canonical(pr, status);
}

float64 float64_scalbn(float64 a, int n, float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pr = scalbn_decomposed(pa, n, status);
    return float64_round_pack_canonical(pr, status);
}

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/*
 * Square Root
 *
 * The old softfloat code did an approximation step before zeroing in
 * on the final result. However for simpleness we just compute the
 * square root by iterating down from the implicit bit to enough extra
 * bits to ensure we get a correctly rounded result.
 *
 * This does mean however the calculation is slower than before,
 * especially for 64 bit floats.
 */

static FloatParts sqrt_float(FloatParts a, float_status *s, const FloatFmt *p)
{
    uint64_t a_frac, r_frac, s_frac;
    int bit, last_bit;

    if (is_nan(a.cls)) {
        return return_nan(a, s);
    }
    if (a.cls == float_class_zero) {
        return a;  /* sqrt(+-0) = +-0 */
    }
    if (a.sign) {
        s->float_exception_flags |= float_flag_invalid;
        a.cls = float_class_dnan;
        return a;
    }
    if (a.cls == float_class_inf) {
        return a;  /* sqrt(+inf) = +inf */
    }

    assert(a.cls == float_class_normal);

    /* We need two overflow bits at the top. Adding room for that is a
     * right shift. If the exponent is odd, we can discard the low bit
     * by multiplying the fraction by 2; that's a left shift. Combine
     * those and we shift right if the exponent is even.
     */
    a_frac = a.frac;
    if (!(a.exp & 1)) {
        a_frac >>= 1;
    }
    a.exp >>= 1;

    /* Bit-by-bit computation of sqrt.  */
    r_frac = 0;
    s_frac = 0;

    /* Iterate from implicit bit down to the 3 extra bits to compute a
     * properly rounded result. Remember we've inserted one more bit
     * at the top, so these positions are one less.
     */
    bit = DECOMPOSED_BINARY_POINT - 1;
    last_bit = MAX(p->frac_shift - 4, 0);
    do {
        uint64_t q = 1ULL << bit;
        uint64_t t_frac = s_frac + q;
        if (t_frac <= a_frac) {
            s_frac = t_frac + q;
            a_frac -= t_frac;
            r_frac += q;
        }
        a_frac <<= 1;
    } while (--bit >= last_bit);

    /* Undo the right shift done above. If there is any remaining
     * fraction, the result is inexact. Set the sticky bit.
     */
    a.frac = (r_frac << 1) + (a_frac != 0);

    return a;
}

float16 __attribute__((flatten)) float16_sqrt(float16 a, float_status *status)
{
    FloatParts pa = float16_unpack_canonical(a, status);
    FloatParts pr = sqrt_float(pa, status, &float16_params);
    return float16_round_pack_canonical(pr, status);
}

float32 __attribute__((flatten)) float32_sqrt(float32 a, float_status *status)
{
    FloatParts pa = float32_unpack_canonical(a, status);
    FloatParts pr = sqrt_float(pa, status, &float32_params);
    return float32_round_pack_canonical(pr, status);
}

float64 __attribute__((flatten)) float64_sqrt(float64 a, float_status *status)
{
    FloatParts pa = float64_unpack_canonical(a, status);
    FloatParts pr = sqrt_float(pa, status, &float64_params);
    return float64_round_pack_canonical(pr, status);
}


B
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2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019
/*----------------------------------------------------------------------------
| Takes a 64-bit fixed-point value `absZ' with binary point between bits 6
| and 7, and returns the properly rounded 32-bit integer corresponding to the
| input.  If `zSign' is 1, the input is negated before being converted to an
| integer.  Bit 63 of `absZ' must be zero.  Ordinarily, the fixed-point input
| is simply rounded to an integer, with the inexact exception raised if the
| input cannot be represented exactly as an integer.  However, if the fixed-
| point input is too large, the invalid exception is raised and the largest
| positive or negative integer is returned.
*----------------------------------------------------------------------------*/

2020
static int32_t roundAndPackInt32(flag zSign, uint64_t absZ, float_status *status)
B
bellard 已提交
2021
{
2022
    int8_t roundingMode;
B
bellard 已提交
2023
    flag roundNearestEven;
2024
    int8_t roundIncrement, roundBits;
2025
    int32_t z;
B
bellard 已提交
2026

2027
    roundingMode = status->float_rounding_mode;
B
bellard 已提交
2028
    roundNearestEven = ( roundingMode == float_round_nearest_even );
2029 2030
    switch (roundingMode) {
    case float_round_nearest_even:
2031
    case float_round_ties_away:
2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044
        roundIncrement = 0x40;
        break;
    case float_round_to_zero:
        roundIncrement = 0;
        break;
    case float_round_up:
        roundIncrement = zSign ? 0 : 0x7f;
        break;
    case float_round_down:
        roundIncrement = zSign ? 0x7f : 0;
        break;
    default:
        abort();
B
bellard 已提交
2045 2046 2047 2048 2049 2050 2051
    }
    roundBits = absZ & 0x7F;
    absZ = ( absZ + roundIncrement )>>7;
    absZ &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
    z = absZ;
    if ( zSign ) z = - z;
    if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {
2052
        float_raise(float_flag_invalid, status);
2053
        return zSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
B
bellard 已提交
2054
    }
2055 2056 2057
    if (roundBits) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
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2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073
    return z;

}

/*----------------------------------------------------------------------------
| Takes the 128-bit fixed-point value formed by concatenating `absZ0' and
| `absZ1', with binary point between bits 63 and 64 (between the input words),
| and returns the properly rounded 64-bit integer corresponding to the input.
| If `zSign' is 1, the input is negated before being converted to an integer.
| Ordinarily, the fixed-point input is simply rounded to an integer, with
| the inexact exception raised if the input cannot be represented exactly as
| an integer.  However, if the fixed-point input is too large, the invalid
| exception is raised and the largest positive or negative integer is
| returned.
*----------------------------------------------------------------------------*/

2074
static int64_t roundAndPackInt64(flag zSign, uint64_t absZ0, uint64_t absZ1,
2075
                               float_status *status)
B
bellard 已提交
2076
{
2077
    int8_t roundingMode;
B
bellard 已提交
2078
    flag roundNearestEven, increment;
2079
    int64_t z;
B
bellard 已提交
2080

2081
    roundingMode = status->float_rounding_mode;
B
bellard 已提交
2082
    roundNearestEven = ( roundingMode == float_round_nearest_even );
2083 2084
    switch (roundingMode) {
    case float_round_nearest_even:
2085
    case float_round_ties_away:
2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098
        increment = ((int64_t) absZ1 < 0);
        break;
    case float_round_to_zero:
        increment = 0;
        break;
    case float_round_up:
        increment = !zSign && absZ1;
        break;
    case float_round_down:
        increment = zSign && absZ1;
        break;
    default:
        abort();
B
bellard 已提交
2099 2100 2101 2102
    }
    if ( increment ) {
        ++absZ0;
        if ( absZ0 == 0 ) goto overflow;
2103
        absZ0 &= ~ ( ( (uint64_t) ( absZ1<<1 ) == 0 ) & roundNearestEven );
B
bellard 已提交
2104 2105 2106 2107 2108
    }
    z = absZ0;
    if ( zSign ) z = - z;
    if ( z && ( ( z < 0 ) ^ zSign ) ) {
 overflow:
2109
        float_raise(float_flag_invalid, status);
B
bellard 已提交
2110
        return
2111
              zSign ? (int64_t) LIT64( 0x8000000000000000 )
B
bellard 已提交
2112 2113
            : LIT64( 0x7FFFFFFFFFFFFFFF );
    }
2114 2115 2116
    if (absZ1) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
2117 2118 2119 2120
    return z;

}

2121 2122 2123 2124 2125 2126 2127 2128 2129 2130
/*----------------------------------------------------------------------------
| Takes the 128-bit fixed-point value formed by concatenating `absZ0' and
| `absZ1', with binary point between bits 63 and 64 (between the input words),
| and returns the properly rounded 64-bit unsigned integer corresponding to the
| input.  Ordinarily, the fixed-point input is simply rounded to an integer,
| with the inexact exception raised if the input cannot be represented exactly
| as an integer.  However, if the fixed-point input is too large, the invalid
| exception is raised and the largest unsigned integer is returned.
*----------------------------------------------------------------------------*/

2131
static int64_t roundAndPackUint64(flag zSign, uint64_t absZ0,
2132
                                uint64_t absZ1, float_status *status)
2133
{
2134
    int8_t roundingMode;
2135 2136
    flag roundNearestEven, increment;

2137
    roundingMode = status->float_rounding_mode;
2138
    roundNearestEven = (roundingMode == float_round_nearest_even);
2139 2140
    switch (roundingMode) {
    case float_round_nearest_even:
2141
    case float_round_ties_away:
2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154
        increment = ((int64_t)absZ1 < 0);
        break;
    case float_round_to_zero:
        increment = 0;
        break;
    case float_round_up:
        increment = !zSign && absZ1;
        break;
    case float_round_down:
        increment = zSign && absZ1;
        break;
    default:
        abort();
2155 2156 2157 2158
    }
    if (increment) {
        ++absZ0;
        if (absZ0 == 0) {
2159
            float_raise(float_flag_invalid, status);
2160 2161 2162 2163 2164 2165
            return LIT64(0xFFFFFFFFFFFFFFFF);
        }
        absZ0 &= ~(((uint64_t)(absZ1<<1) == 0) & roundNearestEven);
    }

    if (zSign && absZ0) {
2166
        float_raise(float_flag_invalid, status);
2167 2168 2169 2170
        return 0;
    }

    if (absZ1) {
2171
        status->float_exception_flags |= float_flag_inexact;
2172 2173 2174 2175
    }
    return absZ0;
}

2176 2177 2178 2179
/*----------------------------------------------------------------------------
| If `a' is denormal and we are in flush-to-zero mode then set the
| input-denormal exception and return zero. Otherwise just return the value.
*----------------------------------------------------------------------------*/
2180
float32 float32_squash_input_denormal(float32 a, float_status *status)
2181
{
2182
    if (status->flush_inputs_to_zero) {
2183
        if (extractFloat32Exp(a) == 0 && extractFloat32Frac(a) != 0) {
2184
            float_raise(float_flag_input_denormal, status);
2185 2186 2187 2188 2189 2190
            return make_float32(float32_val(a) & 0x80000000);
        }
    }
    return a;
}

B
bellard 已提交
2191 2192 2193 2194 2195 2196 2197 2198
/*----------------------------------------------------------------------------
| Normalizes the subnormal single-precision floating-point value represented
| by the denormalized significand `aSig'.  The normalized exponent and
| significand are stored at the locations pointed to by `zExpPtr' and
| `zSigPtr', respectively.
*----------------------------------------------------------------------------*/

static void
2199
 normalizeFloat32Subnormal(uint32_t aSig, int *zExpPtr, uint32_t *zSigPtr)
B
bellard 已提交
2200
{
2201
    int8_t shiftCount;
B
bellard 已提交
2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230

    shiftCount = countLeadingZeros32( aSig ) - 8;
    *zSigPtr = aSig<<shiftCount;
    *zExpPtr = 1 - shiftCount;

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand `zSig', and returns the proper single-precision floating-
| point value corresponding to the abstract input.  Ordinarily, the abstract
| value is simply rounded and packed into the single-precision format, with
| the inexact exception raised if the abstract input cannot be represented
| exactly.  However, if the abstract value is too large, the overflow and
| inexact exceptions are raised and an infinity or maximal finite value is
| returned.  If the abstract value is too small, the input value is rounded to
| a subnormal number, and the underflow and inexact exceptions are raised if
| the abstract input cannot be represented exactly as a subnormal single-
| precision floating-point number.
|     The input significand `zSig' has its binary point between bits 30
| and 29, which is 7 bits to the left of the usual location.  This shifted
| significand must be normalized or smaller.  If `zSig' is not normalized,
| `zExp' must be 0; in that case, the result returned is a subnormal number,
| and it must not require rounding.  In the usual case that `zSig' is
| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.
| The handling of underflow and overflow follows the IEC/IEEE Standard for
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

2231
static float32 roundAndPackFloat32(flag zSign, int zExp, uint32_t zSig,
2232
                                   float_status *status)
B
bellard 已提交
2233
{
2234
    int8_t roundingMode;
B
bellard 已提交
2235
    flag roundNearestEven;
2236
    int8_t roundIncrement, roundBits;
B
bellard 已提交
2237 2238
    flag isTiny;

2239
    roundingMode = status->float_rounding_mode;
B
bellard 已提交
2240
    roundNearestEven = ( roundingMode == float_round_nearest_even );
2241 2242
    switch (roundingMode) {
    case float_round_nearest_even:
2243
    case float_round_ties_away:
2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257
        roundIncrement = 0x40;
        break;
    case float_round_to_zero:
        roundIncrement = 0;
        break;
    case float_round_up:
        roundIncrement = zSign ? 0 : 0x7f;
        break;
    case float_round_down:
        roundIncrement = zSign ? 0x7f : 0;
        break;
    default:
        abort();
        break;
B
bellard 已提交
2258 2259
    }
    roundBits = zSig & 0x7F;
2260
    if ( 0xFD <= (uint16_t) zExp ) {
B
bellard 已提交
2261 2262
        if (    ( 0xFD < zExp )
             || (    ( zExp == 0xFD )
2263
                  && ( (int32_t) ( zSig + roundIncrement ) < 0 ) )
B
bellard 已提交
2264
           ) {
2265
            float_raise(float_flag_overflow | float_flag_inexact, status);
2266
            return packFloat32( zSign, 0xFF, - ( roundIncrement == 0 ));
B
bellard 已提交
2267 2268
        }
        if ( zExp < 0 ) {
2269
            if (status->flush_to_zero) {
2270
                float_raise(float_flag_output_denormal, status);
2271 2272
                return packFloat32(zSign, 0, 0);
            }
B
bellard 已提交
2273
            isTiny =
2274 2275
                (status->float_detect_tininess
                 == float_tininess_before_rounding)
B
bellard 已提交
2276 2277 2278 2279 2280
                || ( zExp < -1 )
                || ( zSig + roundIncrement < 0x80000000 );
            shift32RightJamming( zSig, - zExp, &zSig );
            zExp = 0;
            roundBits = zSig & 0x7F;
2281 2282 2283
            if (isTiny && roundBits) {
                float_raise(float_flag_underflow, status);
            }
B
bellard 已提交
2284 2285
        }
    }
2286 2287 2288
    if (roundBits) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305
    zSig = ( zSig + roundIncrement )>>7;
    zSig &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
    if ( zSig == 0 ) zExp = 0;
    return packFloat32( zSign, zExp, zSig );

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand `zSig', and returns the proper single-precision floating-
| point value corresponding to the abstract input.  This routine is just like
| `roundAndPackFloat32' except that `zSig' does not have to be normalized.
| Bit 31 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''
| floating-point exponent.
*----------------------------------------------------------------------------*/

static float32
2306
 normalizeRoundAndPackFloat32(flag zSign, int zExp, uint32_t zSig,
2307
                              float_status *status)
B
bellard 已提交
2308
{
2309
    int8_t shiftCount;
B
bellard 已提交
2310 2311

    shiftCount = countLeadingZeros32( zSig ) - 1;
2312 2313
    return roundAndPackFloat32(zSign, zExp - shiftCount, zSig<<shiftCount,
                               status);
B
bellard 已提交
2314 2315 2316

}

2317 2318 2319 2320
/*----------------------------------------------------------------------------
| If `a' is denormal and we are in flush-to-zero mode then set the
| input-denormal exception and return zero. Otherwise just return the value.
*----------------------------------------------------------------------------*/
2321
float64 float64_squash_input_denormal(float64 a, float_status *status)
2322
{
2323
    if (status->flush_inputs_to_zero) {
2324
        if (extractFloat64Exp(a) == 0 && extractFloat64Frac(a) != 0) {
2325
            float_raise(float_flag_input_denormal, status);
2326 2327 2328 2329 2330 2331
            return make_float64(float64_val(a) & (1ULL << 63));
        }
    }
    return a;
}

B
bellard 已提交
2332 2333 2334 2335 2336 2337 2338 2339
/*----------------------------------------------------------------------------
| Normalizes the subnormal double-precision floating-point value represented
| by the denormalized significand `aSig'.  The normalized exponent and
| significand are stored at the locations pointed to by `zExpPtr' and
| `zSigPtr', respectively.
*----------------------------------------------------------------------------*/

static void
2340
 normalizeFloat64Subnormal(uint64_t aSig, int *zExpPtr, uint64_t *zSigPtr)
B
bellard 已提交
2341
{
2342
    int8_t shiftCount;
B
bellard 已提交
2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360

    shiftCount = countLeadingZeros64( aSig ) - 11;
    *zSigPtr = aSig<<shiftCount;
    *zExpPtr = 1 - shiftCount;

}

/*----------------------------------------------------------------------------
| Packs the sign `zSign', exponent `zExp', and significand `zSig' into a
| double-precision floating-point value, returning the result.  After being
| shifted into the proper positions, the three fields are simply added
| together to form the result.  This means that any integer portion of `zSig'
| will be added into the exponent.  Since a properly normalized significand
| will have an integer portion equal to 1, the `zExp' input should be 1 less
| than the desired result exponent whenever `zSig' is a complete, normalized
| significand.
*----------------------------------------------------------------------------*/

2361
static inline float64 packFloat64(flag zSign, int zExp, uint64_t zSig)
B
bellard 已提交
2362 2363
{

2364
    return make_float64(
2365
        ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<52 ) + zSig);
B
bellard 已提交
2366 2367 2368 2369 2370 2371 2372 2373 2374 2375 2376

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand `zSig', and returns the proper double-precision floating-
| point value corresponding to the abstract input.  Ordinarily, the abstract
| value is simply rounded and packed into the double-precision format, with
| the inexact exception raised if the abstract input cannot be represented
| exactly.  However, if the abstract value is too large, the overflow and
| inexact exceptions are raised and an infinity or maximal finite value is
2377 2378 2379
| returned.  If the abstract value is too small, the input value is rounded to
| a subnormal number, and the underflow and inexact exceptions are raised if
| the abstract input cannot be represented exactly as a subnormal double-
B
bellard 已提交
2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390
| precision floating-point number.
|     The input significand `zSig' has its binary point between bits 62
| and 61, which is 10 bits to the left of the usual location.  This shifted
| significand must be normalized or smaller.  If `zSig' is not normalized,
| `zExp' must be 0; in that case, the result returned is a subnormal number,
| and it must not require rounding.  In the usual case that `zSig' is
| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.
| The handling of underflow and overflow follows the IEC/IEEE Standard for
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

2391
static float64 roundAndPackFloat64(flag zSign, int zExp, uint64_t zSig,
2392
                                   float_status *status)
B
bellard 已提交
2393
{
2394
    int8_t roundingMode;
B
bellard 已提交
2395
    flag roundNearestEven;
2396
    int roundIncrement, roundBits;
B
bellard 已提交
2397 2398
    flag isTiny;

2399
    roundingMode = status->float_rounding_mode;
B
bellard 已提交
2400
    roundNearestEven = ( roundingMode == float_round_nearest_even );
2401 2402
    switch (roundingMode) {
    case float_round_nearest_even:
2403
    case float_round_ties_away:
2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414
        roundIncrement = 0x200;
        break;
    case float_round_to_zero:
        roundIncrement = 0;
        break;
    case float_round_up:
        roundIncrement = zSign ? 0 : 0x3ff;
        break;
    case float_round_down:
        roundIncrement = zSign ? 0x3ff : 0;
        break;
2415 2416 2417
    case float_round_to_odd:
        roundIncrement = (zSig & 0x400) ? 0 : 0x3ff;
        break;
2418 2419
    default:
        abort();
B
bellard 已提交
2420 2421
    }
    roundBits = zSig & 0x3FF;
2422
    if ( 0x7FD <= (uint16_t) zExp ) {
B
bellard 已提交
2423 2424
        if (    ( 0x7FD < zExp )
             || (    ( zExp == 0x7FD )
2425
                  && ( (int64_t) ( zSig + roundIncrement ) < 0 ) )
B
bellard 已提交
2426
           ) {
2427 2428
            bool overflow_to_inf = roundingMode != float_round_to_odd &&
                                   roundIncrement != 0;
2429
            float_raise(float_flag_overflow | float_flag_inexact, status);
2430
            return packFloat64(zSign, 0x7FF, -(!overflow_to_inf));
B
bellard 已提交
2431 2432
        }
        if ( zExp < 0 ) {
2433
            if (status->flush_to_zero) {
2434
                float_raise(float_flag_output_denormal, status);
2435 2436
                return packFloat64(zSign, 0, 0);
            }
B
bellard 已提交
2437
            isTiny =
2438 2439
                   (status->float_detect_tininess
                    == float_tininess_before_rounding)
B
bellard 已提交
2440 2441 2442 2443 2444
                || ( zExp < -1 )
                || ( zSig + roundIncrement < LIT64( 0x8000000000000000 ) );
            shift64RightJamming( zSig, - zExp, &zSig );
            zExp = 0;
            roundBits = zSig & 0x3FF;
2445 2446 2447
            if (isTiny && roundBits) {
                float_raise(float_flag_underflow, status);
            }
2448 2449 2450 2451 2452 2453 2454
            if (roundingMode == float_round_to_odd) {
                /*
                 * For round-to-odd case, the roundIncrement depends on
                 * zSig which just changed.
                 */
                roundIncrement = (zSig & 0x400) ? 0 : 0x3ff;
            }
B
bellard 已提交
2455 2456
        }
    }
2457 2458 2459
    if (roundBits) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476
    zSig = ( zSig + roundIncrement )>>10;
    zSig &= ~ ( ( ( roundBits ^ 0x200 ) == 0 ) & roundNearestEven );
    if ( zSig == 0 ) zExp = 0;
    return packFloat64( zSign, zExp, zSig );

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand `zSig', and returns the proper double-precision floating-
| point value corresponding to the abstract input.  This routine is just like
| `roundAndPackFloat64' except that `zSig' does not have to be normalized.
| Bit 63 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''
| floating-point exponent.
*----------------------------------------------------------------------------*/

static float64
2477
 normalizeRoundAndPackFloat64(flag zSign, int zExp, uint64_t zSig,
2478
                              float_status *status)
B
bellard 已提交
2479
{
2480
    int8_t shiftCount;
B
bellard 已提交
2481 2482

    shiftCount = countLeadingZeros64( zSig ) - 1;
2483 2484
    return roundAndPackFloat64(zSign, zExp - shiftCount, zSig<<shiftCount,
                               status);
B
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2485 2486 2487 2488 2489 2490 2491 2492 2493 2494

}

/*----------------------------------------------------------------------------
| Normalizes the subnormal extended double-precision floating-point value
| represented by the denormalized significand `aSig'.  The normalized exponent
| and significand are stored at the locations pointed to by `zExpPtr' and
| `zSigPtr', respectively.
*----------------------------------------------------------------------------*/

2495 2496
void normalizeFloatx80Subnormal(uint64_t aSig, int32_t *zExpPtr,
                                uint64_t *zSigPtr)
B
bellard 已提交
2497
{
2498
    int8_t shiftCount;
B
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2499 2500 2501 2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519 2520 2521 2522 2523 2524 2525 2526 2527 2528

    shiftCount = countLeadingZeros64( aSig );
    *zSigPtr = aSig<<shiftCount;
    *zExpPtr = 1 - shiftCount;
}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and extended significand formed by the concatenation of `zSig0' and `zSig1',
| and returns the proper extended double-precision floating-point value
| corresponding to the abstract input.  Ordinarily, the abstract value is
| rounded and packed into the extended double-precision format, with the
| inexact exception raised if the abstract input cannot be represented
| exactly.  However, if the abstract value is too large, the overflow and
| inexact exceptions are raised and an infinity or maximal finite value is
| returned.  If the abstract value is too small, the input value is rounded to
| a subnormal number, and the underflow and inexact exceptions are raised if
| the abstract input cannot be represented exactly as a subnormal extended
| double-precision floating-point number.
|     If `roundingPrecision' is 32 or 64, the result is rounded to the same
| number of bits as single or double precision, respectively.  Otherwise, the
| result is rounded to the full precision of the extended double-precision
| format.
|     The input significand must be normalized or smaller.  If the input
| significand is not normalized, `zExp' must be 0; in that case, the result
| returned is a subnormal number, and it must not require rounding.  The
| handling of underflow and overflow follows the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

2529 2530 2531
floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign,
                              int32_t zExp, uint64_t zSig0, uint64_t zSig1,
                              float_status *status)
B
bellard 已提交
2532
{
2533
    int8_t roundingMode;
B
bellard 已提交
2534
    flag roundNearestEven, increment, isTiny;
2535
    int64_t roundIncrement, roundMask, roundBits;
B
bellard 已提交
2536

2537
    roundingMode = status->float_rounding_mode;
B
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2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551
    roundNearestEven = ( roundingMode == float_round_nearest_even );
    if ( roundingPrecision == 80 ) goto precision80;
    if ( roundingPrecision == 64 ) {
        roundIncrement = LIT64( 0x0000000000000400 );
        roundMask = LIT64( 0x00000000000007FF );
    }
    else if ( roundingPrecision == 32 ) {
        roundIncrement = LIT64( 0x0000008000000000 );
        roundMask = LIT64( 0x000000FFFFFFFFFF );
    }
    else {
        goto precision80;
    }
    zSig0 |= ( zSig1 != 0 );
2552 2553
    switch (roundingMode) {
    case float_round_nearest_even:
2554
    case float_round_ties_away:
2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566
        break;
    case float_round_to_zero:
        roundIncrement = 0;
        break;
    case float_round_up:
        roundIncrement = zSign ? 0 : roundMask;
        break;
    case float_round_down:
        roundIncrement = zSign ? roundMask : 0;
        break;
    default:
        abort();
B
bellard 已提交
2567 2568
    }
    roundBits = zSig0 & roundMask;
2569
    if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) {
B
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2570 2571 2572 2573 2574 2575
        if (    ( 0x7FFE < zExp )
             || ( ( zExp == 0x7FFE ) && ( zSig0 + roundIncrement < zSig0 ) )
           ) {
            goto overflow;
        }
        if ( zExp <= 0 ) {
2576
            if (status->flush_to_zero) {
2577
                float_raise(float_flag_output_denormal, status);
2578 2579
                return packFloatx80(zSign, 0, 0);
            }
B
bellard 已提交
2580
            isTiny =
2581 2582
                   (status->float_detect_tininess
                    == float_tininess_before_rounding)
B
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2583 2584 2585 2586 2587
                || ( zExp < 0 )
                || ( zSig0 <= zSig0 + roundIncrement );
            shift64RightJamming( zSig0, 1 - zExp, &zSig0 );
            zExp = 0;
            roundBits = zSig0 & roundMask;
2588 2589 2590
            if (isTiny && roundBits) {
                float_raise(float_flag_underflow, status);
            }
2591 2592 2593
            if (roundBits) {
                status->float_exception_flags |= float_flag_inexact;
            }
B
bellard 已提交
2594
            zSig0 += roundIncrement;
2595
            if ( (int64_t) zSig0 < 0 ) zExp = 1;
B
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2596 2597 2598 2599 2600 2601 2602 2603
            roundIncrement = roundMask + 1;
            if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {
                roundMask |= roundIncrement;
            }
            zSig0 &= ~ roundMask;
            return packFloatx80( zSign, zExp, zSig0 );
        }
    }
2604 2605 2606
    if (roundBits) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
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2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618 2619
    zSig0 += roundIncrement;
    if ( zSig0 < roundIncrement ) {
        ++zExp;
        zSig0 = LIT64( 0x8000000000000000 );
    }
    roundIncrement = roundMask + 1;
    if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {
        roundMask |= roundIncrement;
    }
    zSig0 &= ~ roundMask;
    if ( zSig0 == 0 ) zExp = 0;
    return packFloatx80( zSign, zExp, zSig0 );
 precision80:
2620 2621
    switch (roundingMode) {
    case float_round_nearest_even:
2622
    case float_round_ties_away:
2623 2624 2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635
        increment = ((int64_t)zSig1 < 0);
        break;
    case float_round_to_zero:
        increment = 0;
        break;
    case float_round_up:
        increment = !zSign && zSig1;
        break;
    case float_round_down:
        increment = zSign && zSig1;
        break;
    default:
        abort();
B
bellard 已提交
2636
    }
2637
    if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) {
B
bellard 已提交
2638 2639 2640 2641 2642 2643 2644 2645
        if (    ( 0x7FFE < zExp )
             || (    ( zExp == 0x7FFE )
                  && ( zSig0 == LIT64( 0xFFFFFFFFFFFFFFFF ) )
                  && increment
                )
           ) {
            roundMask = 0;
 overflow:
2646
            float_raise(float_flag_overflow | float_flag_inexact, status);
B
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2647 2648 2649 2650 2651 2652
            if (    ( roundingMode == float_round_to_zero )
                 || ( zSign && ( roundingMode == float_round_up ) )
                 || ( ! zSign && ( roundingMode == float_round_down ) )
               ) {
                return packFloatx80( zSign, 0x7FFE, ~ roundMask );
            }
2653 2654 2655
            return packFloatx80(zSign,
                                floatx80_infinity_high,
                                floatx80_infinity_low);
B
bellard 已提交
2656 2657 2658
        }
        if ( zExp <= 0 ) {
            isTiny =
2659 2660
                   (status->float_detect_tininess
                    == float_tininess_before_rounding)
B
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2661 2662 2663 2664 2665
                || ( zExp < 0 )
                || ! increment
                || ( zSig0 < LIT64( 0xFFFFFFFFFFFFFFFF ) );
            shift64ExtraRightJamming( zSig0, zSig1, 1 - zExp, &zSig0, &zSig1 );
            zExp = 0;
2666 2667 2668
            if (isTiny && zSig1) {
                float_raise(float_flag_underflow, status);
            }
2669 2670 2671
            if (zSig1) {
                status->float_exception_flags |= float_flag_inexact;
            }
2672 2673
            switch (roundingMode) {
            case float_round_nearest_even:
2674
            case float_round_ties_away:
2675 2676 2677 2678 2679 2680 2681 2682 2683 2684 2685 2686 2687
                increment = ((int64_t)zSig1 < 0);
                break;
            case float_round_to_zero:
                increment = 0;
                break;
            case float_round_up:
                increment = !zSign && zSig1;
                break;
            case float_round_down:
                increment = zSign && zSig1;
                break;
            default:
                abort();
B
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2688 2689 2690 2691
            }
            if ( increment ) {
                ++zSig0;
                zSig0 &=
2692 2693
                    ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );
                if ( (int64_t) zSig0 < 0 ) zExp = 1;
B
bellard 已提交
2694 2695 2696 2697
            }
            return packFloatx80( zSign, zExp, zSig0 );
        }
    }
2698 2699 2700
    if (zSig1) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
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2701 2702 2703 2704 2705 2706 2707
    if ( increment ) {
        ++zSig0;
        if ( zSig0 == 0 ) {
            ++zExp;
            zSig0 = LIT64( 0x8000000000000000 );
        }
        else {
2708
            zSig0 &= ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );
B
bellard 已提交
2709 2710 2711 2712 2713 2714 2715 2716 2717 2718 2719 2720 2721 2722 2723 2724 2725 2726
        }
    }
    else {
        if ( zSig0 == 0 ) zExp = 0;
    }
    return packFloatx80( zSign, zExp, zSig0 );

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent
| `zExp', and significand formed by the concatenation of `zSig0' and `zSig1',
| and returns the proper extended double-precision floating-point value
| corresponding to the abstract input.  This routine is just like
| `roundAndPackFloatx80' except that the input significand does not have to be
| normalized.
*----------------------------------------------------------------------------*/

2727 2728 2729 2730
floatx80 normalizeRoundAndPackFloatx80(int8_t roundingPrecision,
                                       flag zSign, int32_t zExp,
                                       uint64_t zSig0, uint64_t zSig1,
                                       float_status *status)
B
bellard 已提交
2731
{
2732
    int8_t shiftCount;
B
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2733 2734 2735 2736 2737 2738 2739 2740 2741

    if ( zSig0 == 0 ) {
        zSig0 = zSig1;
        zSig1 = 0;
        zExp -= 64;
    }
    shiftCount = countLeadingZeros64( zSig0 );
    shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
    zExp -= shiftCount;
2742 2743
    return roundAndPackFloatx80(roundingPrecision, zSign, zExp,
                                zSig0, zSig1, status);
B
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2744 2745 2746 2747 2748 2749 2750 2751

}

/*----------------------------------------------------------------------------
| Returns the least-significant 64 fraction bits of the quadruple-precision
| floating-point value `a'.
*----------------------------------------------------------------------------*/

2752
static inline uint64_t extractFloat128Frac1( float128 a )
B
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2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763
{

    return a.low;

}

/*----------------------------------------------------------------------------
| Returns the most-significant 48 fraction bits of the quadruple-precision
| floating-point value `a'.
*----------------------------------------------------------------------------*/

2764
static inline uint64_t extractFloat128Frac0( float128 a )
B
bellard 已提交
2765 2766 2767 2768 2769 2770 2771 2772 2773 2774 2775
{

    return a.high & LIT64( 0x0000FFFFFFFFFFFF );

}

/*----------------------------------------------------------------------------
| Returns the exponent bits of the quadruple-precision floating-point value
| `a'.
*----------------------------------------------------------------------------*/

2776
static inline int32_t extractFloat128Exp( float128 a )
B
bellard 已提交
2777 2778 2779 2780 2781 2782 2783 2784 2785 2786
{

    return ( a.high>>48 ) & 0x7FFF;

}

/*----------------------------------------------------------------------------
| Returns the sign bit of the quadruple-precision floating-point value `a'.
*----------------------------------------------------------------------------*/

2787
static inline flag extractFloat128Sign( float128 a )
B
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2788 2789 2790 2791 2792 2793 2794 2795 2796 2797 2798 2799 2800 2801 2802 2803 2804 2805
{

    return a.high>>63;

}

/*----------------------------------------------------------------------------
| Normalizes the subnormal quadruple-precision floating-point value
| represented by the denormalized significand formed by the concatenation of
| `aSig0' and `aSig1'.  The normalized exponent is stored at the location
| pointed to by `zExpPtr'.  The most significant 49 bits of the normalized
| significand are stored at the location pointed to by `zSig0Ptr', and the
| least significant 64 bits of the normalized significand are stored at the
| location pointed to by `zSig1Ptr'.
*----------------------------------------------------------------------------*/

static void
 normalizeFloat128Subnormal(
2806 2807
     uint64_t aSig0,
     uint64_t aSig1,
2808
     int32_t *zExpPtr,
2809 2810
     uint64_t *zSig0Ptr,
     uint64_t *zSig1Ptr
B
bellard 已提交
2811 2812
 )
{
2813
    int8_t shiftCount;
B
bellard 已提交
2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836 2837 2838 2839 2840 2841 2842 2843 2844 2845 2846 2847

    if ( aSig0 == 0 ) {
        shiftCount = countLeadingZeros64( aSig1 ) - 15;
        if ( shiftCount < 0 ) {
            *zSig0Ptr = aSig1>>( - shiftCount );
            *zSig1Ptr = aSig1<<( shiftCount & 63 );
        }
        else {
            *zSig0Ptr = aSig1<<shiftCount;
            *zSig1Ptr = 0;
        }
        *zExpPtr = - shiftCount - 63;
    }
    else {
        shiftCount = countLeadingZeros64( aSig0 ) - 15;
        shortShift128Left( aSig0, aSig1, shiftCount, zSig0Ptr, zSig1Ptr );
        *zExpPtr = 1 - shiftCount;
    }

}

/*----------------------------------------------------------------------------
| Packs the sign `zSign', the exponent `zExp', and the significand formed
| by the concatenation of `zSig0' and `zSig1' into a quadruple-precision
| floating-point value, returning the result.  After being shifted into the
| proper positions, the three fields `zSign', `zExp', and `zSig0' are simply
| added together to form the most significant 32 bits of the result.  This
| means that any integer portion of `zSig0' will be added into the exponent.
| Since a properly normalized significand will have an integer portion equal
| to 1, the `zExp' input should be 1 less than the desired result exponent
| whenever `zSig0' and `zSig1' concatenated form a complete, normalized
| significand.
*----------------------------------------------------------------------------*/

2848
static inline float128
2849
 packFloat128( flag zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1 )
B
bellard 已提交
2850 2851 2852 2853
{
    float128 z;

    z.low = zSig1;
2854
    z.high = ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<48 ) + zSig0;
B
bellard 已提交
2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872 2873 2874 2875 2876 2877 2878 2879
    return z;

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and extended significand formed by the concatenation of `zSig0', `zSig1',
| and `zSig2', and returns the proper quadruple-precision floating-point value
| corresponding to the abstract input.  Ordinarily, the abstract value is
| simply rounded and packed into the quadruple-precision format, with the
| inexact exception raised if the abstract input cannot be represented
| exactly.  However, if the abstract value is too large, the overflow and
| inexact exceptions are raised and an infinity or maximal finite value is
| returned.  If the abstract value is too small, the input value is rounded to
| a subnormal number, and the underflow and inexact exceptions are raised if
| the abstract input cannot be represented exactly as a subnormal quadruple-
| precision floating-point number.
|     The input significand must be normalized or smaller.  If the input
| significand is not normalized, `zExp' must be 0; in that case, the result
| returned is a subnormal number, and it must not require rounding.  In the
| usual case that the input significand is normalized, `zExp' must be 1 less
| than the ``true'' floating-point exponent.  The handling of underflow and
| overflow follows the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

2880
static float128 roundAndPackFloat128(flag zSign, int32_t zExp,
2881 2882
                                     uint64_t zSig0, uint64_t zSig1,
                                     uint64_t zSig2, float_status *status)
B
bellard 已提交
2883
{
2884
    int8_t roundingMode;
B
bellard 已提交
2885 2886
    flag roundNearestEven, increment, isTiny;

2887
    roundingMode = status->float_rounding_mode;
B
bellard 已提交
2888
    roundNearestEven = ( roundingMode == float_round_nearest_even );
2889 2890
    switch (roundingMode) {
    case float_round_nearest_even:
2891
    case float_round_ties_away:
2892 2893 2894 2895 2896 2897 2898 2899 2900 2901 2902
        increment = ((int64_t)zSig2 < 0);
        break;
    case float_round_to_zero:
        increment = 0;
        break;
    case float_round_up:
        increment = !zSign && zSig2;
        break;
    case float_round_down:
        increment = zSign && zSig2;
        break;
2903 2904 2905
    case float_round_to_odd:
        increment = !(zSig1 & 0x1) && zSig2;
        break;
2906 2907
    default:
        abort();
B
bellard 已提交
2908
    }
2909
    if ( 0x7FFD <= (uint32_t) zExp ) {
B
bellard 已提交
2910 2911 2912 2913 2914 2915 2916 2917 2918 2919 2920
        if (    ( 0x7FFD < zExp )
             || (    ( zExp == 0x7FFD )
                  && eq128(
                         LIT64( 0x0001FFFFFFFFFFFF ),
                         LIT64( 0xFFFFFFFFFFFFFFFF ),
                         zSig0,
                         zSig1
                     )
                  && increment
                )
           ) {
2921
            float_raise(float_flag_overflow | float_flag_inexact, status);
B
bellard 已提交
2922 2923 2924
            if (    ( roundingMode == float_round_to_zero )
                 || ( zSign && ( roundingMode == float_round_up ) )
                 || ( ! zSign && ( roundingMode == float_round_down ) )
2925
                 || (roundingMode == float_round_to_odd)
B
bellard 已提交
2926 2927 2928 2929 2930 2931 2932 2933 2934 2935 2936 2937
               ) {
                return
                    packFloat128(
                        zSign,
                        0x7FFE,
                        LIT64( 0x0000FFFFFFFFFFFF ),
                        LIT64( 0xFFFFFFFFFFFFFFFF )
                    );
            }
            return packFloat128( zSign, 0x7FFF, 0, 0 );
        }
        if ( zExp < 0 ) {
2938
            if (status->flush_to_zero) {
2939
                float_raise(float_flag_output_denormal, status);
2940 2941
                return packFloat128(zSign, 0, 0, 0);
            }
B
bellard 已提交
2942
            isTiny =
2943 2944
                   (status->float_detect_tininess
                    == float_tininess_before_rounding)
B
bellard 已提交
2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955
                || ( zExp < -1 )
                || ! increment
                || lt128(
                       zSig0,
                       zSig1,
                       LIT64( 0x0001FFFFFFFFFFFF ),
                       LIT64( 0xFFFFFFFFFFFFFFFF )
                   );
            shift128ExtraRightJamming(
                zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );
            zExp = 0;
2956 2957 2958
            if (isTiny && zSig2) {
                float_raise(float_flag_underflow, status);
            }
2959 2960
            switch (roundingMode) {
            case float_round_nearest_even:
2961
            case float_round_ties_away:
2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972
                increment = ((int64_t)zSig2 < 0);
                break;
            case float_round_to_zero:
                increment = 0;
                break;
            case float_round_up:
                increment = !zSign && zSig2;
                break;
            case float_round_down:
                increment = zSign && zSig2;
                break;
2973 2974 2975
            case float_round_to_odd:
                increment = !(zSig1 & 0x1) && zSig2;
                break;
2976 2977
            default:
                abort();
B
bellard 已提交
2978 2979 2980
            }
        }
    }
2981 2982 2983
    if (zSig2) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995 2996 2997 2998 2999 3000 3001 3002 3003 3004
    if ( increment ) {
        add128( zSig0, zSig1, 0, 1, &zSig0, &zSig1 );
        zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );
    }
    else {
        if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0;
    }
    return packFloat128( zSign, zExp, zSig0, zSig1 );

}

/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand formed by the concatenation of `zSig0' and `zSig1', and
| returns the proper quadruple-precision floating-point value corresponding
| to the abstract input.  This routine is just like `roundAndPackFloat128'
| except that the input significand has fewer bits and does not have to be
| normalized.  In all cases, `zExp' must be 1 less than the ``true'' floating-
| point exponent.
*----------------------------------------------------------------------------*/

3005
static float128 normalizeRoundAndPackFloat128(flag zSign, int32_t zExp,
3006 3007
                                              uint64_t zSig0, uint64_t zSig1,
                                              float_status *status)
B
bellard 已提交
3008
{
3009
    int8_t shiftCount;
3010
    uint64_t zSig2;
B
bellard 已提交
3011 3012 3013 3014 3015 3016 3017 3018 3019 3020 3021 3022 3023 3024 3025 3026

    if ( zSig0 == 0 ) {
        zSig0 = zSig1;
        zSig1 = 0;
        zExp -= 64;
    }
    shiftCount = countLeadingZeros64( zSig0 ) - 15;
    if ( 0 <= shiftCount ) {
        zSig2 = 0;
        shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
    }
    else {
        shift128ExtraRightJamming(
            zSig0, zSig1, 0, - shiftCount, &zSig0, &zSig1, &zSig2 );
    }
    zExp -= shiftCount;
3027
    return roundAndPackFloat128(zSign, zExp, zSig0, zSig1, zSig2, status);
B
bellard 已提交
3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038

}


/*----------------------------------------------------------------------------
| Returns the result of converting the 32-bit two's complement integer `a'
| to the extended double-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3039
floatx80 int32_to_floatx80(int32_t a, float_status *status)
B
bellard 已提交
3040 3041
{
    flag zSign;
3042
    uint32_t absA;
3043
    int8_t shiftCount;
3044
    uint64_t zSig;
B
bellard 已提交
3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060

    if ( a == 0 ) return packFloatx80( 0, 0, 0 );
    zSign = ( a < 0 );
    absA = zSign ? - a : a;
    shiftCount = countLeadingZeros32( absA ) + 32;
    zSig = absA;
    return packFloatx80( zSign, 0x403E - shiftCount, zSig<<shiftCount );

}

/*----------------------------------------------------------------------------
| Returns the result of converting the 32-bit two's complement integer `a' to
| the quadruple-precision floating-point format.  The conversion is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3061
float128 int32_to_float128(int32_t a, float_status *status)
B
bellard 已提交
3062 3063
{
    flag zSign;
3064
    uint32_t absA;
3065
    int8_t shiftCount;
3066
    uint64_t zSig0;
B
bellard 已提交
3067 3068 3069 3070 3071 3072 3073 3074 3075 3076 3077 3078 3079 3080 3081 3082 3083

    if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
    zSign = ( a < 0 );
    absA = zSign ? - a : a;
    shiftCount = countLeadingZeros32( absA ) + 17;
    zSig0 = absA;
    return packFloat128( zSign, 0x402E - shiftCount, zSig0<<shiftCount, 0 );

}

/*----------------------------------------------------------------------------
| Returns the result of converting the 64-bit two's complement integer `a'
| to the extended double-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3084
floatx80 int64_to_floatx80(int64_t a, float_status *status)
B
bellard 已提交
3085 3086
{
    flag zSign;
3087
    uint64_t absA;
3088
    int8_t shiftCount;
B
bellard 已提交
3089 3090 3091 3092 3093 3094 3095 3096 3097 3098 3099 3100 3101 3102 3103

    if ( a == 0 ) return packFloatx80( 0, 0, 0 );
    zSign = ( a < 0 );
    absA = zSign ? - a : a;
    shiftCount = countLeadingZeros64( absA );
    return packFloatx80( zSign, 0x403E - shiftCount, absA<<shiftCount );

}

/*----------------------------------------------------------------------------
| Returns the result of converting the 64-bit two's complement integer `a' to
| the quadruple-precision floating-point format.  The conversion is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3104
float128 int64_to_float128(int64_t a, float_status *status)
B
bellard 已提交
3105 3106
{
    flag zSign;
3107
    uint64_t absA;
3108
    int8_t shiftCount;
3109
    int32_t zExp;
3110
    uint64_t zSig0, zSig1;
B
bellard 已提交
3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125 3126 3127 3128 3129 3130

    if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
    zSign = ( a < 0 );
    absA = zSign ? - a : a;
    shiftCount = countLeadingZeros64( absA ) + 49;
    zExp = 0x406E - shiftCount;
    if ( 64 <= shiftCount ) {
        zSig1 = 0;
        zSig0 = absA;
        shiftCount -= 64;
    }
    else {
        zSig1 = absA;
        zSig0 = 0;
    }
    shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
    return packFloat128( zSign, zExp, zSig0, zSig1 );

}

3131 3132 3133 3134 3135 3136
/*----------------------------------------------------------------------------
| Returns the result of converting the 64-bit unsigned integer `a'
| to the quadruple-precision floating-point format.  The conversion is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3137
float128 uint64_to_float128(uint64_t a, float_status *status)
3138 3139 3140 3141
{
    if (a == 0) {
        return float128_zero;
    }
3142
    return normalizeRoundAndPackFloat128(0, 0x406E, a, 0, status);
3143 3144
}

B
bellard 已提交
3145 3146 3147 3148 3149 3150 3151 3152 3153 3154



/*----------------------------------------------------------------------------
| Returns the result of converting the single-precision floating-point value
| `a' to the double-precision floating-point format.  The conversion is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3155
float64 float32_to_float64(float32 a, float_status *status)
B
bellard 已提交
3156 3157
{
    flag aSign;
3158
    int aExp;
3159
    uint32_t aSig;
3160
    a = float32_squash_input_denormal(a, status);
B
bellard 已提交
3161 3162 3163 3164 3165

    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );
    if ( aExp == 0xFF ) {
3166 3167 3168
        if (aSig) {
            return commonNaNToFloat64(float32ToCommonNaN(a, status), status);
        }
B
bellard 已提交
3169 3170 3171 3172 3173 3174 3175
        return packFloat64( aSign, 0x7FF, 0 );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloat64( aSign, 0, 0 );
        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
        --aExp;
    }
3176
    return packFloat64( aSign, aExp + 0x380, ( (uint64_t) aSig )<<29 );
B
bellard 已提交
3177 3178 3179 3180 3181 3182 3183 3184 3185 3186

}

/*----------------------------------------------------------------------------
| Returns the result of converting the single-precision floating-point value
| `a' to the extended double-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3187
floatx80 float32_to_floatx80(float32 a, float_status *status)
B
bellard 已提交
3188 3189
{
    flag aSign;
3190
    int aExp;
3191
    uint32_t aSig;
B
bellard 已提交
3192

3193
    a = float32_squash_input_denormal(a, status);
B
bellard 已提交
3194 3195 3196 3197
    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );
    if ( aExp == 0xFF ) {
3198 3199 3200
        if (aSig) {
            return commonNaNToFloatx80(float32ToCommonNaN(a, status), status);
        }
3201 3202 3203
        return packFloatx80(aSign,
                            floatx80_infinity_high,
                            floatx80_infinity_low);
B
bellard 已提交
3204 3205 3206 3207 3208 3209
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
    }
    aSig |= 0x00800000;
3210
    return packFloatx80( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<40 );
B
bellard 已提交
3211 3212 3213 3214 3215 3216 3217 3218 3219 3220

}

/*----------------------------------------------------------------------------
| Returns the result of converting the single-precision floating-point value
| `a' to the double-precision floating-point format.  The conversion is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3221
float128 float32_to_float128(float32 a, float_status *status)
B
bellard 已提交
3222 3223
{
    flag aSign;
3224
    int aExp;
3225
    uint32_t aSig;
B
bellard 已提交
3226

3227
    a = float32_squash_input_denormal(a, status);
B
bellard 已提交
3228 3229 3230 3231
    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );
    if ( aExp == 0xFF ) {
3232 3233 3234
        if (aSig) {
            return commonNaNToFloat128(float32ToCommonNaN(a, status), status);
        }
B
bellard 已提交
3235 3236 3237 3238 3239 3240 3241
        return packFloat128( aSign, 0x7FFF, 0, 0 );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );
        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
        --aExp;
    }
3242
    return packFloat128( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<25, 0 );
B
bellard 已提交
3243 3244 3245 3246 3247 3248 3249 3250 3251

}

/*----------------------------------------------------------------------------
| Returns the remainder of the single-precision floating-point value `a'
| with respect to the corresponding value `b'.  The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3252
float32 float32_rem(float32 a, float32 b, float_status *status)
B
bellard 已提交
3253
{
3254
    flag aSign, zSign;
3255
    int aExp, bExp, expDiff;
3256 3257 3258 3259 3260
    uint32_t aSig, bSig;
    uint32_t q;
    uint64_t aSig64, bSig64, q64;
    uint32_t alternateASig;
    int32_t sigMean;
3261 3262
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3263 3264 3265 3266 3267 3268 3269 3270

    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );
    bSig = extractFloat32Frac( b );
    bExp = extractFloat32Exp( b );
    if ( aExp == 0xFF ) {
        if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {
3271
            return propagateFloat32NaN(a, b, status);
B
bellard 已提交
3272
        }
3273
        float_raise(float_flag_invalid, status);
3274
        return float32_default_nan(status);
B
bellard 已提交
3275 3276
    }
    if ( bExp == 0xFF ) {
3277 3278 3279
        if (bSig) {
            return propagateFloat32NaN(a, b, status);
        }
B
bellard 已提交
3280 3281 3282 3283
        return a;
    }
    if ( bExp == 0 ) {
        if ( bSig == 0 ) {
3284
            float_raise(float_flag_invalid, status);
3285
            return float32_default_nan(status);
B
bellard 已提交
3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305
        }
        normalizeFloat32Subnormal( bSig, &bExp, &bSig );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return a;
        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
    }
    expDiff = aExp - bExp;
    aSig |= 0x00800000;
    bSig |= 0x00800000;
    if ( expDiff < 32 ) {
        aSig <<= 8;
        bSig <<= 8;
        if ( expDiff < 0 ) {
            if ( expDiff < -1 ) return a;
            aSig >>= 1;
        }
        q = ( bSig <= aSig );
        if ( q ) aSig -= bSig;
        if ( 0 < expDiff ) {
3306
            q = ( ( (uint64_t) aSig )<<32 ) / bSig;
B
bellard 已提交
3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317
            q >>= 32 - expDiff;
            bSig >>= 2;
            aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;
        }
        else {
            aSig >>= 2;
            bSig >>= 2;
        }
    }
    else {
        if ( bSig <= aSig ) aSig -= bSig;
3318 3319
        aSig64 = ( (uint64_t) aSig )<<40;
        bSig64 = ( (uint64_t) bSig )<<40;
B
bellard 已提交
3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337
        expDiff -= 64;
        while ( 0 < expDiff ) {
            q64 = estimateDiv128To64( aSig64, 0, bSig64 );
            q64 = ( 2 < q64 ) ? q64 - 2 : 0;
            aSig64 = - ( ( bSig * q64 )<<38 );
            expDiff -= 62;
        }
        expDiff += 64;
        q64 = estimateDiv128To64( aSig64, 0, bSig64 );
        q64 = ( 2 < q64 ) ? q64 - 2 : 0;
        q = q64>>( 64 - expDiff );
        bSig <<= 6;
        aSig = ( ( aSig64>>33 )<<( expDiff - 1 ) ) - bSig * q;
    }
    do {
        alternateASig = aSig;
        ++q;
        aSig -= bSig;
3338
    } while ( 0 <= (int32_t) aSig );
B
bellard 已提交
3339 3340 3341 3342
    sigMean = aSig + alternateASig;
    if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
        aSig = alternateASig;
    }
3343
    zSign = ( (int32_t) aSig < 0 );
B
bellard 已提交
3344
    if ( zSign ) aSig = - aSig;
3345
    return normalizeRoundAndPackFloat32(aSign ^ zSign, bExp, aSig, status);
B
bellard 已提交
3346 3347
}

3348

B
bellard 已提交
3349

3350 3351 3352 3353 3354 3355 3356 3357 3358 3359 3360 3361 3362 3363 3364 3365 3366 3367 3368 3369
/*----------------------------------------------------------------------------
| Returns the binary exponential of the single-precision floating-point value
| `a'. The operation is performed according to the IEC/IEEE Standard for
| Binary Floating-Point Arithmetic.
|
| Uses the following identities:
|
| 1. -------------------------------------------------------------------------
|      x    x*ln(2)
|     2  = e
|
| 2. -------------------------------------------------------------------------
|                      2     3     4     5           n
|      x        x     x     x     x     x           x
|     e  = 1 + --- + --- + --- + --- + --- + ... + --- + ...
|               1!    2!    3!    4!    5!          n!
*----------------------------------------------------------------------------*/

static const float64 float32_exp2_coefficients[15] =
{
3370 3371 3372 3373 3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384
    const_float64( 0x3ff0000000000000ll ), /*  1 */
    const_float64( 0x3fe0000000000000ll ), /*  2 */
    const_float64( 0x3fc5555555555555ll ), /*  3 */
    const_float64( 0x3fa5555555555555ll ), /*  4 */
    const_float64( 0x3f81111111111111ll ), /*  5 */
    const_float64( 0x3f56c16c16c16c17ll ), /*  6 */
    const_float64( 0x3f2a01a01a01a01all ), /*  7 */
    const_float64( 0x3efa01a01a01a01all ), /*  8 */
    const_float64( 0x3ec71de3a556c734ll ), /*  9 */
    const_float64( 0x3e927e4fb7789f5cll ), /* 10 */
    const_float64( 0x3e5ae64567f544e4ll ), /* 11 */
    const_float64( 0x3e21eed8eff8d898ll ), /* 12 */
    const_float64( 0x3de6124613a86d09ll ), /* 13 */
    const_float64( 0x3da93974a8c07c9dll ), /* 14 */
    const_float64( 0x3d6ae7f3e733b81fll ), /* 15 */
3385 3386
};

3387
float32 float32_exp2(float32 a, float_status *status)
3388 3389
{
    flag aSign;
3390
    int aExp;
3391
    uint32_t aSig;
3392 3393
    float64 r, x, xn;
    int i;
3394
    a = float32_squash_input_denormal(a, status);
3395 3396 3397 3398 3399 3400

    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );

    if ( aExp == 0xFF) {
3401 3402 3403
        if (aSig) {
            return propagateFloat32NaN(a, float32_zero, status);
        }
3404 3405 3406 3407 3408 3409
        return (aSign) ? float32_zero : a;
    }
    if (aExp == 0) {
        if (aSig == 0) return float32_one;
    }

3410
    float_raise(float_flag_inexact, status);
3411 3412 3413 3414

    /* ******************************* */
    /* using float64 for approximation */
    /* ******************************* */
3415 3416
    x = float32_to_float64(a, status);
    x = float64_mul(x, float64_ln2, status);
3417 3418 3419 3420 3421 3422

    xn = x;
    r = float64_one;
    for (i = 0 ; i < 15 ; i++) {
        float64 f;

3423 3424
        f = float64_mul(xn, float32_exp2_coefficients[i], status);
        r = float64_add(r, f, status);
3425

3426
        xn = float64_mul(xn, x, status);
3427 3428 3429 3430 3431
    }

    return float64_to_float32(r, status);
}

3432 3433 3434 3435 3436
/*----------------------------------------------------------------------------
| Returns the binary log of the single-precision floating-point value `a'.
| The operation is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
3437
float32 float32_log2(float32 a, float_status *status)
3438 3439
{
    flag aSign, zSign;
3440
    int aExp;
3441
    uint32_t aSig, zSig, i;
3442

3443
    a = float32_squash_input_denormal(a, status);
3444 3445 3446 3447 3448 3449 3450 3451 3452
    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );

    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloat32( 1, 0xFF, 0 );
        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
    }
    if ( aSign ) {
3453
        float_raise(float_flag_invalid, status);
3454
        return float32_default_nan(status);
3455 3456
    }
    if ( aExp == 0xFF ) {
3457 3458 3459
        if (aSig) {
            return propagateFloat32NaN(a, float32_zero, status);
        }
3460 3461 3462 3463 3464 3465 3466 3467 3468
        return a;
    }

    aExp -= 0x7F;
    aSig |= 0x00800000;
    zSign = aExp < 0;
    zSig = aExp << 23;

    for (i = 1 << 22; i > 0; i >>= 1) {
3469
        aSig = ( (uint64_t)aSig * aSig ) >> 23;
3470 3471 3472 3473 3474 3475 3476 3477 3478
        if ( aSig & 0x01000000 ) {
            aSig >>= 1;
            zSig |= i;
        }
    }

    if ( zSign )
        zSig = -zSig;

3479
    return normalizeRoundAndPackFloat32(zSign, 0x85, zSig, status);
3480 3481
}

B
bellard 已提交
3482 3483
/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is equal to
3484 3485
| the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  Otherwise, the comparison is performed
B
bellard 已提交
3486 3487 3488
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3489
int float32_eq(float32 a, float32 b, float_status *status)
B
bellard 已提交
3490
{
3491
    uint32_t av, bv;
3492 3493
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3494 3495 3496 3497

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
3498
        float_raise(float_flag_invalid, status);
B
bellard 已提交
3499 3500
        return 0;
    }
3501 3502 3503
    av = float32_val(a);
    bv = float32_val(b);
    return ( av == bv ) || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
B
bellard 已提交
3504 3505 3506 3507
}

/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is less than
3508 3509 3510
| or equal to the corresponding value `b', and 0 otherwise.  The invalid
| exception is raised if either operand is a NaN.  The comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
3511 3512
*----------------------------------------------------------------------------*/

3513
int float32_le(float32 a, float32 b, float_status *status)
B
bellard 已提交
3514 3515
{
    flag aSign, bSign;
3516
    uint32_t av, bv;
3517 3518
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3519 3520 3521 3522

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
3523
        float_raise(float_flag_invalid, status);
B
bellard 已提交
3524 3525 3526 3527
        return 0;
    }
    aSign = extractFloat32Sign( a );
    bSign = extractFloat32Sign( b );
3528 3529
    av = float32_val(a);
    bv = float32_val(b);
3530
    if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
3531
    return ( av == bv ) || ( aSign ^ ( av < bv ) );
B
bellard 已提交
3532 3533 3534 3535 3536

}

/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is less than
3537 3538 3539
| the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  The comparison is performed according
| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
3540 3541
*----------------------------------------------------------------------------*/

3542
int float32_lt(float32 a, float32 b, float_status *status)
B
bellard 已提交
3543 3544
{
    flag aSign, bSign;
3545
    uint32_t av, bv;
3546 3547
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3548 3549 3550 3551

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
3552
        float_raise(float_flag_invalid, status);
B
bellard 已提交
3553 3554 3555 3556
        return 0;
    }
    aSign = extractFloat32Sign( a );
    bSign = extractFloat32Sign( b );
3557 3558
    av = float32_val(a);
    bv = float32_val(b);
3559
    if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 );
3560
    return ( av != bv ) && ( aSign ^ ( av < bv ) );
B
bellard 已提交
3561 3562 3563

}

3564 3565
/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point values `a' and `b' cannot
3566 3567 3568
| be compared, and 0 otherwise.  The invalid exception is raised if either
| operand is a NaN.  The comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
3569 3570
*----------------------------------------------------------------------------*/

3571
int float32_unordered(float32 a, float32 b, float_status *status)
3572
{
3573 3574
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
3575 3576 3577 3578

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
3579
        float_raise(float_flag_invalid, status);
3580 3581 3582 3583
        return 1;
    }
    return 0;
}
3584

B
bellard 已提交
3585 3586
/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is equal to
3587 3588 3589
| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.  The comparison is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
B
bellard 已提交
3590 3591
*----------------------------------------------------------------------------*/

3592
int float32_eq_quiet(float32 a, float32 b, float_status *status)
B
bellard 已提交
3593
{
3594 3595
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3596 3597 3598 3599

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
3600 3601
        if (float32_is_signaling_nan(a, status)
         || float32_is_signaling_nan(b, status)) {
3602
            float_raise(float_flag_invalid, status);
3603
        }
B
bellard 已提交
3604 3605
        return 0;
    }
3606 3607
    return ( float32_val(a) == float32_val(b) ) ||
            ( (uint32_t) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 );
B
bellard 已提交
3608 3609 3610 3611 3612 3613 3614 3615 3616
}

/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is less than or
| equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs do not
| cause an exception.  Otherwise, the comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3617
int float32_le_quiet(float32 a, float32 b, float_status *status)
B
bellard 已提交
3618 3619
{
    flag aSign, bSign;
3620
    uint32_t av, bv;
3621 3622
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3623 3624 3625 3626

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
3627 3628
        if (float32_is_signaling_nan(a, status)
         || float32_is_signaling_nan(b, status)) {
3629
            float_raise(float_flag_invalid, status);
B
bellard 已提交
3630 3631 3632 3633 3634
        }
        return 0;
    }
    aSign = extractFloat32Sign( a );
    bSign = extractFloat32Sign( b );
3635 3636
    av = float32_val(a);
    bv = float32_val(b);
3637
    if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
3638
    return ( av == bv ) || ( aSign ^ ( av < bv ) );
B
bellard 已提交
3639 3640 3641 3642 3643 3644 3645

}

/*----------------------------------------------------------------------------
| Returns 1 if the single-precision floating-point value `a' is less than
| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.  Otherwise, the comparison is performed according to the IEC/IEEE
3646
| Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
3647 3648
*----------------------------------------------------------------------------*/

3649
int float32_lt_quiet(float32 a, float32 b, float_status *status)
B
bellard 已提交
3650
{
3651 3652 3653 3654
    flag aSign, bSign;
    uint32_t av, bv;
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3655

3656 3657 3658 3659 3660
    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
        if (float32_is_signaling_nan(a, status)
         || float32_is_signaling_nan(b, status)) {
3661
            float_raise(float_flag_invalid, status);
B
bellard 已提交
3662
        }
3663
        return 0;
B
bellard 已提交
3664
    }
3665 3666 3667 3668 3669 3670
    aSign = extractFloat32Sign( a );
    bSign = extractFloat32Sign( b );
    av = float32_val(a);
    bv = float32_val(b);
    if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 );
    return ( av != bv ) && ( aSign ^ ( av < bv ) );
B
bellard 已提交
3671 3672 3673 3674

}

/*----------------------------------------------------------------------------
3675 3676 3677 3678
| Returns 1 if the single-precision floating-point values `a' and `b' cannot
| be compared, and 0 otherwise.  Quiet NaNs do not cause an exception.  The
| comparison is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
B
bellard 已提交
3679 3680
*----------------------------------------------------------------------------*/

3681
int float32_unordered_quiet(float32 a, float32 b, float_status *status)
B
bellard 已提交
3682
{
3683 3684
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
B
bellard 已提交
3685

3686 3687 3688 3689 3690 3691
    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
        if (float32_is_signaling_nan(a, status)
         || float32_is_signaling_nan(b, status)) {
            float_raise(float_flag_invalid, status);
B
bellard 已提交
3692
        }
3693
        return 1;
B
bellard 已提交
3694
    }
3695
    return 0;
B
bellard 已提交
3696 3697
}

3698

B
bellard 已提交
3699 3700 3701 3702 3703 3704 3705
/*----------------------------------------------------------------------------
| Returns the result of converting the double-precision floating-point value
| `a' to the single-precision floating-point format.  The conversion is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

3706
float32 float64_to_float32(float64 a, float_status *status)
B
bellard 已提交
3707 3708
{
    flag aSign;
3709
    int aExp;
3710 3711
    uint64_t aSig;
    uint32_t zSig;
3712
    a = float64_squash_input_denormal(a, status);
B
bellard 已提交
3713 3714 3715 3716 3717

    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    if ( aExp == 0x7FF ) {
3718 3719 3720
        if (aSig) {
            return commonNaNToFloat32(float64ToCommonNaN(a, status), status);
        }
B
bellard 已提交
3721 3722 3723 3724 3725 3726 3727 3728
        return packFloat32( aSign, 0xFF, 0 );
    }
    shift64RightJamming( aSig, 22, &aSig );
    zSig = aSig;
    if ( aExp || zSig ) {
        zSig |= 0x40000000;
        aExp -= 0x381;
    }
3729
    return roundAndPackFloat32(aSign, aExp, zSig, status);
B
bellard 已提交
3730 3731 3732

}

P
Paul Brook 已提交
3733 3734 3735 3736 3737 3738 3739 3740 3741 3742 3743

/*----------------------------------------------------------------------------
| Packs the sign `zSign', exponent `zExp', and significand `zSig' into a
| half-precision floating-point value, returning the result.  After being
| shifted into the proper positions, the three fields are simply added
| together to form the result.  This means that any integer portion of `zSig'
| will be added into the exponent.  Since a properly normalized significand
| will have an integer portion equal to 1, the `zExp' input should be 1 less
| than the desired result exponent whenever `zSig' is a complete, normalized
| significand.
*----------------------------------------------------------------------------*/
3744
static float16 packFloat16(flag zSign, int zExp, uint16_t zSig)
P
Paul Brook 已提交
3745
{
3746
    return make_float16(
3747
        (((uint32_t)zSign) << 15) + (((uint32_t)zExp) << 10) + zSig);
P
Paul Brook 已提交
3748 3749
}

3750 3751 3752 3753 3754 3755 3756 3757 3758 3759 3760 3761 3762 3763 3764 3765 3766 3767 3768 3769 3770 3771 3772 3773 3774 3775 3776 3777
/*----------------------------------------------------------------------------
| Takes an abstract floating-point value having sign `zSign', exponent `zExp',
| and significand `zSig', and returns the proper half-precision floating-
| point value corresponding to the abstract input.  Ordinarily, the abstract
| value is simply rounded and packed into the half-precision format, with
| the inexact exception raised if the abstract input cannot be represented
| exactly.  However, if the abstract value is too large, the overflow and
| inexact exceptions are raised and an infinity or maximal finite value is
| returned.  If the abstract value is too small, the input value is rounded to
| a subnormal number, and the underflow and inexact exceptions are raised if
| the abstract input cannot be represented exactly as a subnormal half-
| precision floating-point number.
| The `ieee' flag indicates whether to use IEEE standard half precision, or
| ARM-style "alternative representation", which omits the NaN and Inf
| encodings in order to raise the maximum representable exponent by one.
|     The input significand `zSig' has its binary point between bits 22
| and 23, which is 13 bits to the left of the usual location.  This shifted
| significand must be normalized or smaller.  If `zSig' is not normalized,
| `zExp' must be 0; in that case, the result returned is a subnormal number,
| and it must not require rounding.  In the usual case that `zSig' is
| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.
| Note the slightly odd position of the binary point in zSig compared with the
| other roundAndPackFloat functions. This should probably be fixed if we
| need to implement more float16 routines than just conversion.
| The handling of underflow and overflow follows the IEC/IEEE Standard for
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

3778
static float16 roundAndPackFloat16(flag zSign, int zExp,
3779 3780
                                   uint32_t zSig, flag ieee,
                                   float_status *status)
3781 3782 3783 3784 3785 3786 3787 3788 3789 3790 3791 3792 3793 3794 3795 3796 3797 3798 3799 3800 3801
{
    int maxexp = ieee ? 29 : 30;
    uint32_t mask;
    uint32_t increment;
    bool rounding_bumps_exp;
    bool is_tiny = false;

    /* Calculate the mask of bits of the mantissa which are not
     * representable in half-precision and will be lost.
     */
    if (zExp < 1) {
        /* Will be denormal in halfprec */
        mask = 0x00ffffff;
        if (zExp >= -11) {
            mask >>= 11 + zExp;
        }
    } else {
        /* Normal number in halfprec */
        mask = 0x00001fff;
    }

3802
    switch (status->float_rounding_mode) {
3803 3804 3805 3806 3807 3808
    case float_round_nearest_even:
        increment = (mask + 1) >> 1;
        if ((zSig & mask) == increment) {
            increment = zSig & (increment << 1);
        }
        break;
3809 3810 3811
    case float_round_ties_away:
        increment = (mask + 1) >> 1;
        break;
3812 3813 3814 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824 3825 3826
    case float_round_up:
        increment = zSign ? 0 : mask;
        break;
    case float_round_down:
        increment = zSign ? mask : 0;
        break;
    default: /* round_to_zero */
        increment = 0;
        break;
    }

    rounding_bumps_exp = (zSig + increment >= 0x01000000);

    if (zExp > maxexp || (zExp == maxexp && rounding_bumps_exp)) {
        if (ieee) {
3827
            float_raise(float_flag_overflow | float_flag_inexact, status);
3828 3829
            return packFloat16(zSign, 0x1f, 0);
        } else {
3830
            float_raise(float_flag_invalid, status);
3831 3832 3833 3834 3835 3836 3837
            return packFloat16(zSign, 0x1f, 0x3ff);
        }
    }

    if (zExp < 0) {
        /* Note that flush-to-zero does not affect half-precision results */
        is_tiny =
3838
            (status->float_detect_tininess == float_tininess_before_rounding)
3839 3840 3841 3842
            || (zExp < -1)
            || (!rounding_bumps_exp);
    }
    if (zSig & mask) {
3843
        float_raise(float_flag_inexact, status);
3844
        if (is_tiny) {
3845
            float_raise(float_flag_underflow, status);
3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856 3857 3858 3859 3860 3861 3862 3863 3864
        }
    }

    zSig += increment;
    if (rounding_bumps_exp) {
        zSig >>= 1;
        zExp++;
    }

    if (zExp < -10) {
        return packFloat16(zSign, 0, 0);
    }
    if (zExp < 0) {
        zSig >>= -zExp;
        zExp = 0;
    }
    return packFloat16(zSign, zExp, zSig >> 13);
}

3865 3866 3867 3868 3869 3870 3871 3872 3873 3874 3875 3876 3877 3878 3879
/*----------------------------------------------------------------------------
| If `a' is denormal and we are in flush-to-zero mode then set the
| input-denormal exception and return zero. Otherwise just return the value.
*----------------------------------------------------------------------------*/
float16 float16_squash_input_denormal(float16 a, float_status *status)
{
    if (status->flush_inputs_to_zero) {
        if (extractFloat16Exp(a) == 0 && extractFloat16Frac(a) != 0) {
            float_raise(float_flag_input_denormal, status);
            return make_float16(float16_val(a) & 0x8000);
        }
    }
    return a;
}

3880
static void normalizeFloat16Subnormal(uint32_t aSig, int *zExpPtr,
3881 3882 3883 3884 3885 3886 3887
                                      uint32_t *zSigPtr)
{
    int8_t shiftCount = countLeadingZeros32(aSig) - 21;
    *zSigPtr = aSig << shiftCount;
    *zExpPtr = 1 - shiftCount;
}

P
Paul Brook 已提交
3888 3889
/* Half precision floats come in two formats: standard IEEE and "ARM" format.
   The latter gains extra exponent range by omitting the NaN/Inf encodings.  */
3890

3891
float32 float16_to_float32(float16 a, flag ieee, float_status *status)
P
Paul Brook 已提交
3892 3893
{
    flag aSign;
3894
    int aExp;
3895
    uint32_t aSig;
P
Paul Brook 已提交
3896

3897 3898 3899
    aSign = extractFloat16Sign(a);
    aExp = extractFloat16Exp(a);
    aSig = extractFloat16Frac(a);
P
Paul Brook 已提交
3900 3901 3902

    if (aExp == 0x1f && ieee) {
        if (aSig) {
3903
            return commonNaNToFloat32(float16ToCommonNaN(a, status), status);
P
Paul Brook 已提交
3904
        }
3905
        return packFloat32(aSign, 0xff, 0);
P
Paul Brook 已提交
3906 3907 3908 3909 3910 3911
    }
    if (aExp == 0) {
        if (aSig == 0) {
            return packFloat32(aSign, 0, 0);
        }

3912 3913
        normalizeFloat16Subnormal(aSig, &aExp, &aSig);
        aExp--;
P
Paul Brook 已提交
3914 3915 3916 3917
    }
    return packFloat32( aSign, aExp + 0x70, aSig << 13);
}

3918
float16 float32_to_float16(float32 a, flag ieee, float_status *status)
P
Paul Brook 已提交
3919 3920
{
    flag aSign;
3921
    int aExp;
3922
    uint32_t aSig;
3923

3924
    a = float32_squash_input_denormal(a, status);
P
Paul Brook 已提交
3925 3926 3927 3928 3929 3930

    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );
    if ( aExp == 0xFF ) {
        if (aSig) {
3931 3932
            /* Input is a NaN */
            if (!ieee) {
3933
                float_raise(float_flag_invalid, status);
3934 3935
                return packFloat16(aSign, 0, 0);
            }
3936
            return commonNaNToFloat16(
3937
                float32ToCommonNaN(a, status), status);
P
Paul Brook 已提交
3938
        }
3939 3940
        /* Infinity */
        if (!ieee) {
3941
            float_raise(float_flag_invalid, status);
3942 3943 3944
            return packFloat16(aSign, 0x1f, 0x3ff);
        }
        return packFloat16(aSign, 0x1f, 0);
P
Paul Brook 已提交
3945
    }
3946
    if (aExp == 0 && aSig == 0) {
P
Paul Brook 已提交
3947 3948
        return packFloat16(aSign, 0, 0);
    }
3949 3950 3951 3952 3953 3954 3955
    /* Decimal point between bits 22 and 23. Note that we add the 1 bit
     * even if the input is denormal; however this is harmless because
     * the largest possible single-precision denormal is still smaller
     * than the smallest representable half-precision denormal, and so we
     * will end up ignoring aSig and returning via the "always return zero"
     * codepath.
     */
P
Paul Brook 已提交
3956
    aSig |= 0x00800000;
3957
    aExp -= 0x71;
P
Paul Brook 已提交
3958

3959
    return roundAndPackFloat16(aSign, aExp, aSig, ieee, status);
P
Paul Brook 已提交
3960 3961
}

3962
float64 float16_to_float64(float16 a, flag ieee, float_status *status)
3963 3964
{
    flag aSign;
3965
    int aExp;
3966 3967 3968 3969 3970 3971 3972 3973 3974
    uint32_t aSig;

    aSign = extractFloat16Sign(a);
    aExp = extractFloat16Exp(a);
    aSig = extractFloat16Frac(a);

    if (aExp == 0x1f && ieee) {
        if (aSig) {
            return commonNaNToFloat64(
3975
                float16ToCommonNaN(a, status), status);
3976 3977 3978 3979 3980 3981 3982 3983 3984 3985 3986 3987 3988 3989
        }
        return packFloat64(aSign, 0x7ff, 0);
    }
    if (aExp == 0) {
        if (aSig == 0) {
            return packFloat64(aSign, 0, 0);
        }

        normalizeFloat16Subnormal(aSig, &aExp, &aSig);
        aExp--;
    }
    return packFloat64(aSign, aExp + 0x3f0, ((uint64_t)aSig) << 42);
}

3990
float16 float64_to_float16(float64 a, flag ieee, float_status *status)
3991 3992
{
    flag aSign;
3993
    int aExp;
3994 3995 3996
    uint64_t aSig;
    uint32_t zSig;

3997
    a = float64_squash_input_denormal(a, status);
3998 3999 4000 4001 4002 4003 4004 4005

    aSig = extractFloat64Frac(a);
    aExp = extractFloat64Exp(a);
    aSign = extractFloat64Sign(a);
    if (aExp == 0x7FF) {
        if (aSig) {
            /* Input is a NaN */
            if (!ieee) {
4006
                float_raise(float_flag_invalid, status);
4007 4008 4009
                return packFloat16(aSign, 0, 0);
            }
            return commonNaNToFloat16(
4010
                float64ToCommonNaN(a, status), status);
4011 4012 4013
        }
        /* Infinity */
        if (!ieee) {
4014
            float_raise(float_flag_invalid, status);
4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4032 4033
            return packFloat16(aSign, 0x1f, 0x3ff);
        }
        return packFloat16(aSign, 0x1f, 0);
    }
    shift64RightJamming(aSig, 29, &aSig);
    zSig = aSig;
    if (aExp == 0 && zSig == 0) {
        return packFloat16(aSign, 0, 0);
    }
    /* Decimal point between bits 22 and 23. Note that we add the 1 bit
     * even if the input is denormal; however this is harmless because
     * the largest possible single-precision denormal is still smaller
     * than the smallest representable half-precision denormal, and so we
     * will end up ignoring aSig and returning via the "always return zero"
     * codepath.
     */
    zSig |= 0x00800000;
    aExp -= 0x3F1;

4034
    return roundAndPackFloat16(aSign, aExp, zSig, ieee, status);
4035 4036
}

B
bellard 已提交
4037 4038 4039 4040 4041 4042 4043
/*----------------------------------------------------------------------------
| Returns the result of converting the double-precision floating-point value
| `a' to the extended double-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

4044
floatx80 float64_to_floatx80(float64 a, float_status *status)
B
bellard 已提交
4045 4046
{
    flag aSign;
4047
    int aExp;
4048
    uint64_t aSig;
B
bellard 已提交
4049

4050
    a = float64_squash_input_denormal(a, status);
B
bellard 已提交
4051 4052 4053 4054
    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    if ( aExp == 0x7FF ) {
4055 4056 4057
        if (aSig) {
            return commonNaNToFloatx80(float64ToCommonNaN(a, status), status);
        }
4058 4059 4060
        return packFloatx80(aSign,
                            floatx80_infinity_high,
                            floatx80_infinity_low);
B
bellard 已提交
4061 4062 4063 4064 4065 4066 4067 4068 4069 4070 4071 4072 4073 4074 4075 4076 4077 4078
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
        normalizeFloat64Subnormal( aSig, &aExp, &aSig );
    }
    return
        packFloatx80(
            aSign, aExp + 0x3C00, ( aSig | LIT64( 0x0010000000000000 ) )<<11 );

}

/*----------------------------------------------------------------------------
| Returns the result of converting the double-precision floating-point value
| `a' to the quadruple-precision floating-point format.  The conversion is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

4079
float128 float64_to_float128(float64 a, float_status *status)
B
bellard 已提交
4080 4081
{
    flag aSign;
4082
    int aExp;
4083
    uint64_t aSig, zSig0, zSig1;
B
bellard 已提交
4084

4085
    a = float64_squash_input_denormal(a, status);
B
bellard 已提交
4086 4087 4088 4089
    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    if ( aExp == 0x7FF ) {
4090 4091 4092
        if (aSig) {
            return commonNaNToFloat128(float64ToCommonNaN(a, status), status);
        }
B
bellard 已提交
4093 4094 4095 4096 4097 4098 4099 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 4110 4111
        return packFloat128( aSign, 0x7FFF, 0, 0 );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );
        normalizeFloat64Subnormal( aSig, &aExp, &aSig );
        --aExp;
    }
    shift128Right( aSig, 0, 4, &zSig0, &zSig1 );
    return packFloat128( aSign, aExp + 0x3C00, zSig0, zSig1 );

}


/*----------------------------------------------------------------------------
| Returns the remainder of the double-precision floating-point value `a'
| with respect to the corresponding value `b'.  The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4112
float64 float64_rem(float64 a, float64 b, float_status *status)
B
bellard 已提交
4113
{
4114
    flag aSign, zSign;
4115
    int aExp, bExp, expDiff;
4116 4117 4118
    uint64_t aSig, bSig;
    uint64_t q, alternateASig;
    int64_t sigMean;
B
bellard 已提交
4119

4120 4121
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4122 4123 4124 4125 4126 4127 4128
    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    bSig = extractFloat64Frac( b );
    bExp = extractFloat64Exp( b );
    if ( aExp == 0x7FF ) {
        if ( aSig || ( ( bExp == 0x7FF ) && bSig ) ) {
4129
            return propagateFloat64NaN(a, b, status);
B
bellard 已提交
4130
        }
4131
        float_raise(float_flag_invalid, status);
4132
        return float64_default_nan(status);
B
bellard 已提交
4133 4134
    }
    if ( bExp == 0x7FF ) {
4135 4136 4137
        if (bSig) {
            return propagateFloat64NaN(a, b, status);
        }
B
bellard 已提交
4138 4139 4140 4141
        return a;
    }
    if ( bExp == 0 ) {
        if ( bSig == 0 ) {
4142
            float_raise(float_flag_invalid, status);
4143
            return float64_default_nan(status);
B
bellard 已提交
4144 4145 4146 4147 4148 4149 4150 4151 4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167 4168 4169 4170 4171 4172 4173 4174 4175 4176 4177 4178 4179 4180 4181 4182
        }
        normalizeFloat64Subnormal( bSig, &bExp, &bSig );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return a;
        normalizeFloat64Subnormal( aSig, &aExp, &aSig );
    }
    expDiff = aExp - bExp;
    aSig = ( aSig | LIT64( 0x0010000000000000 ) )<<11;
    bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;
    if ( expDiff < 0 ) {
        if ( expDiff < -1 ) return a;
        aSig >>= 1;
    }
    q = ( bSig <= aSig );
    if ( q ) aSig -= bSig;
    expDiff -= 64;
    while ( 0 < expDiff ) {
        q = estimateDiv128To64( aSig, 0, bSig );
        q = ( 2 < q ) ? q - 2 : 0;
        aSig = - ( ( bSig>>2 ) * q );
        expDiff -= 62;
    }
    expDiff += 64;
    if ( 0 < expDiff ) {
        q = estimateDiv128To64( aSig, 0, bSig );
        q = ( 2 < q ) ? q - 2 : 0;
        q >>= 64 - expDiff;
        bSig >>= 2;
        aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;
    }
    else {
        aSig >>= 2;
        bSig >>= 2;
    }
    do {
        alternateASig = aSig;
        ++q;
        aSig -= bSig;
4183
    } while ( 0 <= (int64_t) aSig );
B
bellard 已提交
4184 4185 4186 4187
    sigMean = aSig + alternateASig;
    if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
        aSig = alternateASig;
    }
4188
    zSign = ( (int64_t) aSig < 0 );
B
bellard 已提交
4189
    if ( zSign ) aSig = - aSig;
4190
    return normalizeRoundAndPackFloat64(aSign ^ zSign, bExp, aSig, status);
B
bellard 已提交
4191 4192 4193

}

4194 4195 4196 4197 4198
/*----------------------------------------------------------------------------
| Returns the binary log of the double-precision floating-point value `a'.
| The operation is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
4199
float64 float64_log2(float64 a, float_status *status)
4200 4201
{
    flag aSign, zSign;
4202
    int aExp;
4203
    uint64_t aSig, aSig0, aSig1, zSig, i;
4204
    a = float64_squash_input_denormal(a, status);
4205 4206 4207 4208 4209 4210 4211 4212 4213 4214

    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );

    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloat64( 1, 0x7FF, 0 );
        normalizeFloat64Subnormal( aSig, &aExp, &aSig );
    }
    if ( aSign ) {
4215
        float_raise(float_flag_invalid, status);
4216
        return float64_default_nan(status);
4217 4218
    }
    if ( aExp == 0x7FF ) {
4219 4220 4221
        if (aSig) {
            return propagateFloat64NaN(a, float64_zero, status);
        }
4222 4223 4224 4225 4226 4227
        return a;
    }

    aExp -= 0x3FF;
    aSig |= LIT64( 0x0010000000000000 );
    zSign = aExp < 0;
4228
    zSig = (uint64_t)aExp << 52;
4229 4230 4231 4232 4233 4234 4235 4236 4237 4238 4239
    for (i = 1LL << 51; i > 0; i >>= 1) {
        mul64To128( aSig, aSig, &aSig0, &aSig1 );
        aSig = ( aSig0 << 12 ) | ( aSig1 >> 52 );
        if ( aSig & LIT64( 0x0020000000000000 ) ) {
            aSig >>= 1;
            zSig |= i;
        }
    }

    if ( zSign )
        zSig = -zSig;
4240
    return normalizeRoundAndPackFloat64(zSign, 0x408, zSig, status);
4241 4242
}

B
bellard 已提交
4243 4244
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is equal to the
4245 4246
| corresponding value `b', and 0 otherwise.  The invalid exception is raised
| if either operand is a NaN.  Otherwise, the comparison is performed
B
bellard 已提交
4247 4248 4249
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4250
int float64_eq(float64 a, float64 b, float_status *status)
B
bellard 已提交
4251
{
4252
    uint64_t av, bv;
4253 4254
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4255 4256 4257 4258

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4259
        float_raise(float_flag_invalid, status);
B
bellard 已提交
4260 4261
        return 0;
    }
4262
    av = float64_val(a);
P
pbrook 已提交
4263
    bv = float64_val(b);
4264
    return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
B
bellard 已提交
4265 4266 4267 4268 4269

}

/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than or
4270 4271 4272
| equal to the corresponding value `b', and 0 otherwise.  The invalid
| exception is raised if either operand is a NaN.  The comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
4273 4274
*----------------------------------------------------------------------------*/

4275
int float64_le(float64 a, float64 b, float_status *status)
B
bellard 已提交
4276 4277
{
    flag aSign, bSign;
4278
    uint64_t av, bv;
4279 4280
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4281 4282 4283 4284

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4285
        float_raise(float_flag_invalid, status);
B
bellard 已提交
4286 4287 4288 4289
        return 0;
    }
    aSign = extractFloat64Sign( a );
    bSign = extractFloat64Sign( b );
4290
    av = float64_val(a);
P
pbrook 已提交
4291
    bv = float64_val(b);
4292
    if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
4293
    return ( av == bv ) || ( aSign ^ ( av < bv ) );
B
bellard 已提交
4294 4295 4296 4297 4298

}

/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than
4299 4300 4301
| the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  The comparison is performed according
| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
4302 4303
*----------------------------------------------------------------------------*/

4304
int float64_lt(float64 a, float64 b, float_status *status)
B
bellard 已提交
4305 4306
{
    flag aSign, bSign;
4307
    uint64_t av, bv;
B
bellard 已提交
4308

4309 4310
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4311 4312 4313
    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4314
        float_raise(float_flag_invalid, status);
B
bellard 已提交
4315 4316 4317 4318
        return 0;
    }
    aSign = extractFloat64Sign( a );
    bSign = extractFloat64Sign( b );
4319
    av = float64_val(a);
P
pbrook 已提交
4320
    bv = float64_val(b);
4321
    if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
4322
    return ( av != bv ) && ( aSign ^ ( av < bv ) );
B
bellard 已提交
4323 4324 4325

}

4326 4327
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point values `a' and `b' cannot
4328 4329 4330
| be compared, and 0 otherwise.  The invalid exception is raised if either
| operand is a NaN.  The comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
4331 4332
*----------------------------------------------------------------------------*/

4333
int float64_unordered(float64 a, float64 b, float_status *status)
4334
{
4335 4336
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
4337 4338 4339 4340

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4341
        float_raise(float_flag_invalid, status);
4342 4343 4344 4345 4346
        return 1;
    }
    return 0;
}

B
bellard 已提交
4347 4348
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is equal to the
4349 4350 4351
| corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.The comparison is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
B
bellard 已提交
4352 4353
*----------------------------------------------------------------------------*/

4354
int float64_eq_quiet(float64 a, float64 b, float_status *status)
B
bellard 已提交
4355
{
4356
    uint64_t av, bv;
4357 4358
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4359 4360 4361 4362

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4363 4364
        if (float64_is_signaling_nan(a, status)
         || float64_is_signaling_nan(b, status)) {
4365
            float_raise(float_flag_invalid, status);
4366
        }
B
bellard 已提交
4367 4368
        return 0;
    }
4369
    av = float64_val(a);
P
pbrook 已提交
4370
    bv = float64_val(b);
4371
    return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
B
bellard 已提交
4372 4373 4374 4375 4376 4377 4378 4379 4380 4381

}

/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than or
| equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs do not
| cause an exception.  Otherwise, the comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4382
int float64_le_quiet(float64 a, float64 b, float_status *status)
B
bellard 已提交
4383 4384
{
    flag aSign, bSign;
4385
    uint64_t av, bv;
4386 4387
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4388 4389 4390 4391

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4392 4393
        if (float64_is_signaling_nan(a, status)
         || float64_is_signaling_nan(b, status)) {
4394
            float_raise(float_flag_invalid, status);
B
bellard 已提交
4395 4396 4397 4398 4399
        }
        return 0;
    }
    aSign = extractFloat64Sign( a );
    bSign = extractFloat64Sign( b );
4400
    av = float64_val(a);
P
pbrook 已提交
4401
    bv = float64_val(b);
4402
    if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
4403
    return ( av == bv ) || ( aSign ^ ( av < bv ) );
B
bellard 已提交
4404 4405 4406 4407 4408 4409 4410 4411 4412 4413

}

/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point value `a' is less than
| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.  Otherwise, the comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4414
int float64_lt_quiet(float64 a, float64 b, float_status *status)
B
bellard 已提交
4415 4416
{
    flag aSign, bSign;
4417
    uint64_t av, bv;
4418 4419
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
B
bellard 已提交
4420 4421 4422 4423

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4424 4425
        if (float64_is_signaling_nan(a, status)
         || float64_is_signaling_nan(b, status)) {
4426
            float_raise(float_flag_invalid, status);
B
bellard 已提交
4427 4428 4429 4430 4431
        }
        return 0;
    }
    aSign = extractFloat64Sign( a );
    bSign = extractFloat64Sign( b );
4432
    av = float64_val(a);
P
pbrook 已提交
4433
    bv = float64_val(b);
4434
    if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
4435
    return ( av != bv ) && ( aSign ^ ( av < bv ) );
B
bellard 已提交
4436 4437 4438

}

4439 4440 4441 4442 4443 4444 4445
/*----------------------------------------------------------------------------
| Returns 1 if the double-precision floating-point values `a' and `b' cannot
| be compared, and 0 otherwise.  Quiet NaNs do not cause an exception.  The
| comparison is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4446
int float64_unordered_quiet(float64 a, float64 b, float_status *status)
4447
{
4448 4449
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);
4450 4451 4452 4453

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
4454 4455
        if (float64_is_signaling_nan(a, status)
         || float64_is_signaling_nan(b, status)) {
4456
            float_raise(float_flag_invalid, status);
4457 4458 4459 4460 4461 4462
        }
        return 1;
    }
    return 0;
}

B
bellard 已提交
4463 4464 4465 4466 4467 4468 4469 4470 4471 4472
/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the 32-bit two's complement integer format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic---which means in particular that the conversion
| is rounded according to the current rounding mode.  If `a' is a NaN, the
| largest positive integer is returned.  Otherwise, if the conversion
| overflows, the largest integer with the same sign as `a' is returned.
*----------------------------------------------------------------------------*/

4473
int32_t floatx80_to_int32(floatx80 a, float_status *status)
B
bellard 已提交
4474 4475
{
    flag aSign;
4476
    int32_t aExp, shiftCount;
4477
    uint64_t aSig;
B
bellard 已提交
4478

4479 4480 4481 4482
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return 1 << 31;
    }
B
bellard 已提交
4483 4484 4485
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
4486
    if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0;
B
bellard 已提交
4487 4488 4489
    shiftCount = 0x4037 - aExp;
    if ( shiftCount <= 0 ) shiftCount = 1;
    shift64RightJamming( aSig, shiftCount, &aSig );
4490
    return roundAndPackInt32(aSign, aSig, status);
B
bellard 已提交
4491 4492 4493 4494 4495 4496 4497 4498 4499 4500 4501 4502 4503

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the 32-bit two's complement integer format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic, except that the conversion is always rounded
| toward zero.  If `a' is a NaN, the largest positive integer is returned.
| Otherwise, if the conversion overflows, the largest integer with the same
| sign as `a' is returned.
*----------------------------------------------------------------------------*/

4504
int32_t floatx80_to_int32_round_to_zero(floatx80 a, float_status *status)
B
bellard 已提交
4505 4506
{
    flag aSign;
4507
    int32_t aExp, shiftCount;
4508
    uint64_t aSig, savedASig;
4509
    int32_t z;
B
bellard 已提交
4510

4511 4512 4513 4514
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return 1 << 31;
    }
B
bellard 已提交
4515 4516 4517 4518
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    if ( 0x401E < aExp ) {
4519
        if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0;
B
bellard 已提交
4520 4521 4522
        goto invalid;
    }
    else if ( aExp < 0x3FFF ) {
4523 4524 4525
        if (aExp || aSig) {
            status->float_exception_flags |= float_flag_inexact;
        }
B
bellard 已提交
4526 4527 4528 4529 4530 4531 4532 4533 4534
        return 0;
    }
    shiftCount = 0x403E - aExp;
    savedASig = aSig;
    aSig >>= shiftCount;
    z = aSig;
    if ( aSign ) z = - z;
    if ( ( z < 0 ) ^ aSign ) {
 invalid:
4535
        float_raise(float_flag_invalid, status);
4536
        return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
B
bellard 已提交
4537 4538
    }
    if ( ( aSig<<shiftCount ) != savedASig ) {
4539
        status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
4540 4541 4542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554
    }
    return z;

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the 64-bit two's complement integer format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic---which means in particular that the conversion
| is rounded according to the current rounding mode.  If `a' is a NaN,
| the largest positive integer is returned.  Otherwise, if the conversion
| overflows, the largest integer with the same sign as `a' is returned.
*----------------------------------------------------------------------------*/

4555
int64_t floatx80_to_int64(floatx80 a, float_status *status)
B
bellard 已提交
4556 4557
{
    flag aSign;
4558
    int32_t aExp, shiftCount;
4559
    uint64_t aSig, aSigExtra;
B
bellard 已提交
4560

4561 4562 4563 4564
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return 1ULL << 63;
    }
B
bellard 已提交
4565 4566 4567 4568 4569 4570
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    shiftCount = 0x403E - aExp;
    if ( shiftCount <= 0 ) {
        if ( shiftCount ) {
4571
            float_raise(float_flag_invalid, status);
4572
            if (!aSign || floatx80_is_any_nan(a)) {
B
bellard 已提交
4573 4574
                return LIT64( 0x7FFFFFFFFFFFFFFF );
            }
4575
            return (int64_t) LIT64( 0x8000000000000000 );
B
bellard 已提交
4576 4577 4578 4579 4580 4581
        }
        aSigExtra = 0;
    }
    else {
        shift64ExtraRightJamming( aSig, 0, shiftCount, &aSig, &aSigExtra );
    }
4582
    return roundAndPackInt64(aSign, aSig, aSigExtra, status);
B
bellard 已提交
4583 4584 4585 4586 4587 4588 4589 4590 4591 4592 4593 4594 4595

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the 64-bit two's complement integer format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic, except that the conversion is always rounded
| toward zero.  If `a' is a NaN, the largest positive integer is returned.
| Otherwise, if the conversion overflows, the largest integer with the same
| sign as `a' is returned.
*----------------------------------------------------------------------------*/

4596
int64_t floatx80_to_int64_round_to_zero(floatx80 a, float_status *status)
B
bellard 已提交
4597 4598
{
    flag aSign;
4599
    int32_t aExp, shiftCount;
4600
    uint64_t aSig;
4601
    int64_t z;
B
bellard 已提交
4602

4603 4604 4605 4606
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return 1ULL << 63;
    }
B
bellard 已提交
4607 4608 4609 4610 4611 4612 4613
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    shiftCount = aExp - 0x403E;
    if ( 0 <= shiftCount ) {
        aSig &= LIT64( 0x7FFFFFFFFFFFFFFF );
        if ( ( a.high != 0xC03E ) || aSig ) {
4614
            float_raise(float_flag_invalid, status);
B
bellard 已提交
4615 4616 4617 4618
            if ( ! aSign || ( ( aExp == 0x7FFF ) && aSig ) ) {
                return LIT64( 0x7FFFFFFFFFFFFFFF );
            }
        }
4619
        return (int64_t) LIT64( 0x8000000000000000 );
B
bellard 已提交
4620 4621
    }
    else if ( aExp < 0x3FFF ) {
4622 4623 4624
        if (aExp | aSig) {
            status->float_exception_flags |= float_flag_inexact;
        }
B
bellard 已提交
4625 4626 4627
        return 0;
    }
    z = aSig>>( - shiftCount );
4628
    if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) {
4629
        status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
4630 4631 4632 4633 4634 4635 4636 4637 4638 4639 4640 4641 4642
    }
    if ( aSign ) z = - z;
    return z;

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the single-precision floating-point format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4643
float32 floatx80_to_float32(floatx80 a, float_status *status)
B
bellard 已提交
4644 4645
{
    flag aSign;
4646
    int32_t aExp;
4647
    uint64_t aSig;
B
bellard 已提交
4648

4649 4650 4651 4652
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return float32_default_nan(status);
    }
B
bellard 已提交
4653 4654 4655 4656
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    if ( aExp == 0x7FFF ) {
4657
        if ( (uint64_t) ( aSig<<1 ) ) {
4658
            return commonNaNToFloat32(floatx80ToCommonNaN(a, status), status);
B
bellard 已提交
4659 4660 4661 4662 4663
        }
        return packFloat32( aSign, 0xFF, 0 );
    }
    shift64RightJamming( aSig, 33, &aSig );
    if ( aExp || aSig ) aExp -= 0x3F81;
4664
    return roundAndPackFloat32(aSign, aExp, aSig, status);
B
bellard 已提交
4665 4666 4667 4668 4669 4670 4671 4672 4673 4674

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the double-precision floating-point format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4675
float64 floatx80_to_float64(floatx80 a, float_status *status)
B
bellard 已提交
4676 4677
{
    flag aSign;
4678
    int32_t aExp;
4679
    uint64_t aSig, zSig;
B
bellard 已提交
4680

4681 4682 4683 4684
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return float64_default_nan(status);
    }
B
bellard 已提交
4685 4686 4687 4688
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    if ( aExp == 0x7FFF ) {
4689
        if ( (uint64_t) ( aSig<<1 ) ) {
4690
            return commonNaNToFloat64(floatx80ToCommonNaN(a, status), status);
B
bellard 已提交
4691 4692 4693 4694 4695
        }
        return packFloat64( aSign, 0x7FF, 0 );
    }
    shift64RightJamming( aSig, 1, &zSig );
    if ( aExp || aSig ) aExp -= 0x3C01;
4696
    return roundAndPackFloat64(aSign, aExp, zSig, status);
B
bellard 已提交
4697 4698 4699 4700 4701 4702 4703 4704 4705 4706

}

/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the quadruple-precision floating-point format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4707
float128 floatx80_to_float128(floatx80 a, float_status *status)
B
bellard 已提交
4708 4709
{
    flag aSign;
4710
    int aExp;
4711
    uint64_t aSig, zSig0, zSig1;
B
bellard 已提交
4712

4713 4714 4715 4716
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return float128_default_nan(status);
    }
B
bellard 已提交
4717 4718 4719
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
4720
    if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) {
4721
        return commonNaNToFloat128(floatx80ToCommonNaN(a, status), status);
B
bellard 已提交
4722 4723 4724 4725 4726 4727
    }
    shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 );
    return packFloat128( aSign, aExp, zSig0, zSig1 );

}

4728 4729 4730 4731 4732 4733 4734 4735 4736 4737 4738 4739 4740 4741 4742 4743
/*----------------------------------------------------------------------------
| Rounds the extended double-precision floating-point value `a'
| to the precision provided by floatx80_rounding_precision and returns the
| result as an extended double-precision floating-point value.
| The operation is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

floatx80 floatx80_round(floatx80 a, float_status *status)
{
    return roundAndPackFloatx80(status->floatx80_rounding_precision,
                                extractFloatx80Sign(a),
                                extractFloatx80Exp(a),
                                extractFloatx80Frac(a), 0, status);
}

B
bellard 已提交
4744 4745 4746 4747 4748 4749 4750
/*----------------------------------------------------------------------------
| Rounds the extended double-precision floating-point value `a' to an integer,
| and returns the result as an extended quadruple-precision floating-point
| value.  The operation is performed according to the IEC/IEEE Standard for
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4751
floatx80 floatx80_round_to_int(floatx80 a, float_status *status)
B
bellard 已提交
4752 4753
{
    flag aSign;
4754
    int32_t aExp;
4755
    uint64_t lastBitMask, roundBitsMask;
B
bellard 已提交
4756 4757
    floatx80 z;

4758 4759 4760 4761
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
4762 4763
    aExp = extractFloatx80Exp( a );
    if ( 0x403E <= aExp ) {
4764
        if ( ( aExp == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) {
4765
            return propagateFloatx80NaN(a, a, status);
B
bellard 已提交
4766 4767 4768 4769 4770
        }
        return a;
    }
    if ( aExp < 0x3FFF ) {
        if (    ( aExp == 0 )
4771
             && ( (uint64_t) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) {
B
bellard 已提交
4772 4773
            return a;
        }
4774
        status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
4775
        aSign = extractFloatx80Sign( a );
4776
        switch (status->float_rounding_mode) {
B
bellard 已提交
4777
         case float_round_nearest_even:
4778
            if ( ( aExp == 0x3FFE ) && (uint64_t) ( extractFloatx80Frac( a )<<1 )
B
bellard 已提交
4779 4780 4781 4782 4783
               ) {
                return
                    packFloatx80( aSign, 0x3FFF, LIT64( 0x8000000000000000 ) );
            }
            break;
4784 4785 4786 4787 4788
        case float_round_ties_away:
            if (aExp == 0x3FFE) {
                return packFloatx80(aSign, 0x3FFF, LIT64(0x8000000000000000));
            }
            break;
B
bellard 已提交
4789 4790 4791 4792 4793 4794 4795 4796 4797 4798 4799 4800 4801 4802 4803 4804
         case float_round_down:
            return
                  aSign ?
                      packFloatx80( 1, 0x3FFF, LIT64( 0x8000000000000000 ) )
                : packFloatx80( 0, 0, 0 );
         case float_round_up:
            return
                  aSign ? packFloatx80( 1, 0, 0 )
                : packFloatx80( 0, 0x3FFF, LIT64( 0x8000000000000000 ) );
        }
        return packFloatx80( aSign, 0, 0 );
    }
    lastBitMask = 1;
    lastBitMask <<= 0x403E - aExp;
    roundBitsMask = lastBitMask - 1;
    z = a;
4805
    switch (status->float_rounding_mode) {
4806
    case float_round_nearest_even:
B
bellard 已提交
4807
        z.low += lastBitMask>>1;
4808 4809 4810 4811
        if ((z.low & roundBitsMask) == 0) {
            z.low &= ~lastBitMask;
        }
        break;
4812 4813 4814
    case float_round_ties_away:
        z.low += lastBitMask >> 1;
        break;
4815 4816 4817 4818 4819 4820 4821 4822 4823
    case float_round_to_zero:
        break;
    case float_round_up:
        if (!extractFloatx80Sign(z)) {
            z.low += roundBitsMask;
        }
        break;
    case float_round_down:
        if (extractFloatx80Sign(z)) {
B
bellard 已提交
4824 4825
            z.low += roundBitsMask;
        }
4826 4827 4828
        break;
    default:
        abort();
B
bellard 已提交
4829 4830 4831 4832 4833 4834
    }
    z.low &= ~ roundBitsMask;
    if ( z.low == 0 ) {
        ++z.high;
        z.low = LIT64( 0x8000000000000000 );
    }
4835 4836 4837
    if (z.low != a.low) {
        status->float_exception_flags |= float_flag_inexact;
    }
B
bellard 已提交
4838 4839 4840 4841 4842 4843 4844 4845 4846 4847 4848 4849
    return z;

}

/*----------------------------------------------------------------------------
| Returns the result of adding the absolute values of the extended double-
| precision floating-point values `a' and `b'.  If `zSign' is 1, the sum is
| negated before being returned.  `zSign' is ignored if the result is a NaN.
| The addition is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4850 4851
static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, flag zSign,
                                float_status *status)
B
bellard 已提交
4852
{
4853
    int32_t aExp, bExp, zExp;
4854
    uint64_t aSig, bSig, zSig0, zSig1;
4855
    int32_t expDiff;
B
bellard 已提交
4856 4857 4858 4859 4860 4861 4862 4863

    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    bSig = extractFloatx80Frac( b );
    bExp = extractFloatx80Exp( b );
    expDiff = aExp - bExp;
    if ( 0 < expDiff ) {
        if ( aExp == 0x7FFF ) {
4864 4865 4866
            if ((uint64_t)(aSig << 1)) {
                return propagateFloatx80NaN(a, b, status);
            }
B
bellard 已提交
4867 4868 4869 4870 4871 4872 4873 4874
            return a;
        }
        if ( bExp == 0 ) --expDiff;
        shift64ExtraRightJamming( bSig, 0, expDiff, &bSig, &zSig1 );
        zExp = aExp;
    }
    else if ( expDiff < 0 ) {
        if ( bExp == 0x7FFF ) {
4875 4876 4877
            if ((uint64_t)(bSig << 1)) {
                return propagateFloatx80NaN(a, b, status);
            }
4878 4879 4880
            return packFloatx80(zSign,
                                floatx80_infinity_high,
                                floatx80_infinity_low);
B
bellard 已提交
4881 4882 4883 4884 4885 4886 4887
        }
        if ( aExp == 0 ) ++expDiff;
        shift64ExtraRightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );
        zExp = bExp;
    }
    else {
        if ( aExp == 0x7FFF ) {
4888
            if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) {
4889
                return propagateFloatx80NaN(a, b, status);
B
bellard 已提交
4890 4891 4892 4893 4894 4895 4896 4897 4898 4899 4900 4901 4902
            }
            return a;
        }
        zSig1 = 0;
        zSig0 = aSig + bSig;
        if ( aExp == 0 ) {
            normalizeFloatx80Subnormal( zSig0, &zExp, &zSig0 );
            goto roundAndPack;
        }
        zExp = aExp;
        goto shiftRight1;
    }
    zSig0 = aSig + bSig;
4903
    if ( (int64_t) zSig0 < 0 ) goto roundAndPack;
B
bellard 已提交
4904 4905 4906 4907 4908
 shiftRight1:
    shift64ExtraRightJamming( zSig0, zSig1, 1, &zSig0, &zSig1 );
    zSig0 |= LIT64( 0x8000000000000000 );
    ++zExp;
 roundAndPack:
4909
    return roundAndPackFloatx80(status->floatx80_rounding_precision,
4910
                                zSign, zExp, zSig0, zSig1, status);
B
bellard 已提交
4911 4912 4913 4914 4915 4916 4917 4918 4919 4920
}

/*----------------------------------------------------------------------------
| Returns the result of subtracting the absolute values of the extended
| double-precision floating-point values `a' and `b'.  If `zSign' is 1, the
| difference is negated before being returned.  `zSign' is ignored if the
| result is a NaN.  The subtraction is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4921 4922
static floatx80 subFloatx80Sigs(floatx80 a, floatx80 b, flag zSign,
                                float_status *status)
B
bellard 已提交
4923
{
4924
    int32_t aExp, bExp, zExp;
4925
    uint64_t aSig, bSig, zSig0, zSig1;
4926
    int32_t expDiff;
B
bellard 已提交
4927 4928 4929 4930 4931 4932 4933 4934 4935

    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    bSig = extractFloatx80Frac( b );
    bExp = extractFloatx80Exp( b );
    expDiff = aExp - bExp;
    if ( 0 < expDiff ) goto aExpBigger;
    if ( expDiff < 0 ) goto bExpBigger;
    if ( aExp == 0x7FFF ) {
4936
        if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) {
4937
            return propagateFloatx80NaN(a, b, status);
B
bellard 已提交
4938
        }
4939
        float_raise(float_flag_invalid, status);
4940
        return floatx80_default_nan(status);
B
bellard 已提交
4941 4942 4943 4944 4945 4946 4947 4948
    }
    if ( aExp == 0 ) {
        aExp = 1;
        bExp = 1;
    }
    zSig1 = 0;
    if ( bSig < aSig ) goto aBigger;
    if ( aSig < bSig ) goto bBigger;
4949
    return packFloatx80(status->float_rounding_mode == float_round_down, 0, 0);
B
bellard 已提交
4950 4951
 bExpBigger:
    if ( bExp == 0x7FFF ) {
4952 4953 4954
        if ((uint64_t)(bSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
4955 4956
        return packFloatx80(zSign ^ 1, floatx80_infinity_high,
                            floatx80_infinity_low);
B
bellard 已提交
4957 4958 4959 4960 4961 4962 4963 4964 4965 4966
    }
    if ( aExp == 0 ) ++expDiff;
    shift128RightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );
 bBigger:
    sub128( bSig, 0, aSig, zSig1, &zSig0, &zSig1 );
    zExp = bExp;
    zSign ^= 1;
    goto normalizeRoundAndPack;
 aExpBigger:
    if ( aExp == 0x7FFF ) {
4967 4968 4969
        if ((uint64_t)(aSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
B
bellard 已提交
4970 4971 4972 4973 4974 4975 4976 4977
        return a;
    }
    if ( bExp == 0 ) --expDiff;
    shift128RightJamming( bSig, 0, expDiff, &bSig, &zSig1 );
 aBigger:
    sub128( aSig, 0, bSig, zSig1, &zSig0, &zSig1 );
    zExp = aExp;
 normalizeRoundAndPack:
4978
    return normalizeRoundAndPackFloatx80(status->floatx80_rounding_precision,
4979
                                         zSign, zExp, zSig0, zSig1, status);
B
bellard 已提交
4980 4981 4982 4983 4984 4985 4986 4987
}

/*----------------------------------------------------------------------------
| Returns the result of adding the extended double-precision floating-point
| values `a' and `b'.  The operation is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

4988
floatx80 floatx80_add(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
4989 4990 4991
{
    flag aSign, bSign;

4992 4993 4994 4995
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
4996 4997 4998
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign == bSign ) {
4999
        return addFloatx80Sigs(a, b, aSign, status);
B
bellard 已提交
5000 5001
    }
    else {
5002
        return subFloatx80Sigs(a, b, aSign, status);
B
bellard 已提交
5003 5004 5005 5006 5007 5008 5009 5010 5011 5012
    }

}

/*----------------------------------------------------------------------------
| Returns the result of subtracting the extended double-precision floating-
| point values `a' and `b'.  The operation is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5013
floatx80 floatx80_sub(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5014 5015 5016
{
    flag aSign, bSign;

5017 5018 5019 5020
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
5021 5022 5023
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign == bSign ) {
5024
        return subFloatx80Sigs(a, b, aSign, status);
B
bellard 已提交
5025 5026
    }
    else {
5027
        return addFloatx80Sigs(a, b, aSign, status);
B
bellard 已提交
5028 5029 5030 5031 5032 5033 5034 5035 5036 5037
    }

}

/*----------------------------------------------------------------------------
| Returns the result of multiplying the extended double-precision floating-
| point values `a' and `b'.  The operation is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5038
floatx80 floatx80_mul(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5039 5040
{
    flag aSign, bSign, zSign;
5041
    int32_t aExp, bExp, zExp;
5042
    uint64_t aSig, bSig, zSig0, zSig1;
B
bellard 已提交
5043

5044 5045 5046 5047
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
5048 5049 5050 5051 5052 5053 5054 5055
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    bSig = extractFloatx80Frac( b );
    bExp = extractFloatx80Exp( b );
    bSign = extractFloatx80Sign( b );
    zSign = aSign ^ bSign;
    if ( aExp == 0x7FFF ) {
5056 5057
        if (    (uint64_t) ( aSig<<1 )
             || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) {
5058
            return propagateFloatx80NaN(a, b, status);
B
bellard 已提交
5059 5060
        }
        if ( ( bExp | bSig ) == 0 ) goto invalid;
5061 5062
        return packFloatx80(zSign, floatx80_infinity_high,
                                   floatx80_infinity_low);
B
bellard 已提交
5063 5064
    }
    if ( bExp == 0x7FFF ) {
5065 5066 5067
        if ((uint64_t)(bSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
B
bellard 已提交
5068 5069
        if ( ( aExp | aSig ) == 0 ) {
 invalid:
5070
            float_raise(float_flag_invalid, status);
5071
            return floatx80_default_nan(status);
B
bellard 已提交
5072
        }
5073 5074
        return packFloatx80(zSign, floatx80_infinity_high,
                                   floatx80_infinity_low);
B
bellard 已提交
5075 5076 5077 5078 5079 5080 5081 5082 5083 5084 5085
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloatx80( zSign, 0, 0 );
        normalizeFloatx80Subnormal( aSig, &aExp, &aSig );
    }
    if ( bExp == 0 ) {
        if ( bSig == 0 ) return packFloatx80( zSign, 0, 0 );
        normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
    }
    zExp = aExp + bExp - 0x3FFE;
    mul64To128( aSig, bSig, &zSig0, &zSig1 );
5086
    if ( 0 < (int64_t) zSig0 ) {
B
bellard 已提交
5087 5088 5089
        shortShift128Left( zSig0, zSig1, 1, &zSig0, &zSig1 );
        --zExp;
    }
5090
    return roundAndPackFloatx80(status->floatx80_rounding_precision,
5091
                                zSign, zExp, zSig0, zSig1, status);
B
bellard 已提交
5092 5093 5094 5095 5096 5097 5098 5099
}

/*----------------------------------------------------------------------------
| Returns the result of dividing the extended double-precision floating-point
| value `a' by the corresponding value `b'.  The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5100
floatx80 floatx80_div(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5101 5102
{
    flag aSign, bSign, zSign;
5103
    int32_t aExp, bExp, zExp;
5104 5105
    uint64_t aSig, bSig, zSig0, zSig1;
    uint64_t rem0, rem1, rem2, term0, term1, term2;
B
bellard 已提交
5106

5107 5108 5109 5110
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
5111 5112 5113 5114 5115 5116 5117 5118
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    bSig = extractFloatx80Frac( b );
    bExp = extractFloatx80Exp( b );
    bSign = extractFloatx80Sign( b );
    zSign = aSign ^ bSign;
    if ( aExp == 0x7FFF ) {
5119 5120 5121
        if ((uint64_t)(aSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
B
bellard 已提交
5122
        if ( bExp == 0x7FFF ) {
5123 5124 5125
            if ((uint64_t)(bSig << 1)) {
                return propagateFloatx80NaN(a, b, status);
            }
B
bellard 已提交
5126 5127
            goto invalid;
        }
5128 5129
        return packFloatx80(zSign, floatx80_infinity_high,
                                   floatx80_infinity_low);
B
bellard 已提交
5130 5131
    }
    if ( bExp == 0x7FFF ) {
5132 5133 5134
        if ((uint64_t)(bSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
B
bellard 已提交
5135 5136 5137 5138 5139 5140
        return packFloatx80( zSign, 0, 0 );
    }
    if ( bExp == 0 ) {
        if ( bSig == 0 ) {
            if ( ( aExp | aSig ) == 0 ) {
 invalid:
5141
                float_raise(float_flag_invalid, status);
5142
                return floatx80_default_nan(status);
B
bellard 已提交
5143
            }
5144
            float_raise(float_flag_divbyzero, status);
5145 5146
            return packFloatx80(zSign, floatx80_infinity_high,
                                       floatx80_infinity_low);
B
bellard 已提交
5147 5148 5149 5150 5151 5152 5153 5154 5155 5156 5157 5158 5159 5160 5161 5162
        }
        normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloatx80( zSign, 0, 0 );
        normalizeFloatx80Subnormal( aSig, &aExp, &aSig );
    }
    zExp = aExp - bExp + 0x3FFE;
    rem1 = 0;
    if ( bSig <= aSig ) {
        shift128Right( aSig, 0, 1, &aSig, &rem1 );
        ++zExp;
    }
    zSig0 = estimateDiv128To64( aSig, rem1, bSig );
    mul64To128( bSig, zSig0, &term0, &term1 );
    sub128( aSig, rem1, term0, term1, &rem0, &rem1 );
5163
    while ( (int64_t) rem0 < 0 ) {
B
bellard 已提交
5164 5165 5166 5167
        --zSig0;
        add128( rem0, rem1, 0, bSig, &rem0, &rem1 );
    }
    zSig1 = estimateDiv128To64( rem1, 0, bSig );
5168
    if ( (uint64_t) ( zSig1<<1 ) <= 8 ) {
B
bellard 已提交
5169 5170
        mul64To128( bSig, zSig1, &term1, &term2 );
        sub128( rem1, 0, term1, term2, &rem1, &rem2 );
5171
        while ( (int64_t) rem1 < 0 ) {
B
bellard 已提交
5172 5173 5174 5175 5176
            --zSig1;
            add128( rem1, rem2, 0, bSig, &rem1, &rem2 );
        }
        zSig1 |= ( ( rem1 | rem2 ) != 0 );
    }
5177
    return roundAndPackFloatx80(status->floatx80_rounding_precision,
5178
                                zSign, zExp, zSig0, zSig1, status);
B
bellard 已提交
5179 5180 5181 5182 5183 5184 5185 5186
}

/*----------------------------------------------------------------------------
| Returns the remainder of the extended double-precision floating-point value
| `a' with respect to the corresponding value `b'.  The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5187
floatx80 floatx80_rem(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5188
{
5189
    flag aSign, zSign;
5190
    int32_t aExp, bExp, expDiff;
5191 5192
    uint64_t aSig0, aSig1, bSig;
    uint64_t q, term0, term1, alternateASig0, alternateASig1;
B
bellard 已提交
5193

5194 5195 5196 5197
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
5198 5199 5200 5201 5202 5203
    aSig0 = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    bSig = extractFloatx80Frac( b );
    bExp = extractFloatx80Exp( b );
    if ( aExp == 0x7FFF ) {
5204 5205
        if (    (uint64_t) ( aSig0<<1 )
             || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) {
5206
            return propagateFloatx80NaN(a, b, status);
B
bellard 已提交
5207 5208 5209 5210
        }
        goto invalid;
    }
    if ( bExp == 0x7FFF ) {
5211 5212 5213
        if ((uint64_t)(bSig << 1)) {
            return propagateFloatx80NaN(a, b, status);
        }
B
bellard 已提交
5214 5215 5216 5217 5218
        return a;
    }
    if ( bExp == 0 ) {
        if ( bSig == 0 ) {
 invalid:
5219
            float_raise(float_flag_invalid, status);
5220
            return floatx80_default_nan(status);
B
bellard 已提交
5221 5222 5223 5224
        }
        normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
    }
    if ( aExp == 0 ) {
5225
        if ( (uint64_t) ( aSig0<<1 ) == 0 ) return a;
B
bellard 已提交
5226 5227 5228 5229 5230 5231 5232 5233 5234 5235 5236 5237 5238 5239 5240 5241 5242 5243 5244 5245 5246 5247 5248 5249 5250 5251 5252 5253 5254 5255 5256 5257 5258 5259 5260 5261 5262 5263 5264 5265 5266 5267 5268 5269 5270 5271 5272 5273 5274 5275
        normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 );
    }
    bSig |= LIT64( 0x8000000000000000 );
    zSign = aSign;
    expDiff = aExp - bExp;
    aSig1 = 0;
    if ( expDiff < 0 ) {
        if ( expDiff < -1 ) return a;
        shift128Right( aSig0, 0, 1, &aSig0, &aSig1 );
        expDiff = 0;
    }
    q = ( bSig <= aSig0 );
    if ( q ) aSig0 -= bSig;
    expDiff -= 64;
    while ( 0 < expDiff ) {
        q = estimateDiv128To64( aSig0, aSig1, bSig );
        q = ( 2 < q ) ? q - 2 : 0;
        mul64To128( bSig, q, &term0, &term1 );
        sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );
        shortShift128Left( aSig0, aSig1, 62, &aSig0, &aSig1 );
        expDiff -= 62;
    }
    expDiff += 64;
    if ( 0 < expDiff ) {
        q = estimateDiv128To64( aSig0, aSig1, bSig );
        q = ( 2 < q ) ? q - 2 : 0;
        q >>= 64 - expDiff;
        mul64To128( bSig, q<<( 64 - expDiff ), &term0, &term1 );
        sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );
        shortShift128Left( 0, bSig, 64 - expDiff, &term0, &term1 );
        while ( le128( term0, term1, aSig0, aSig1 ) ) {
            ++q;
            sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );
        }
    }
    else {
        term1 = 0;
        term0 = bSig;
    }
    sub128( term0, term1, aSig0, aSig1, &alternateASig0, &alternateASig1 );
    if (    lt128( alternateASig0, alternateASig1, aSig0, aSig1 )
         || (    eq128( alternateASig0, alternateASig1, aSig0, aSig1 )
              && ( q & 1 ) )
       ) {
        aSig0 = alternateASig0;
        aSig1 = alternateASig1;
        zSign = ! zSign;
    }
    return
        normalizeRoundAndPackFloatx80(
5276
            80, zSign, bExp + expDiff, aSig0, aSig1, status);
B
bellard 已提交
5277 5278 5279 5280 5281 5282 5283 5284 5285

}

/*----------------------------------------------------------------------------
| Returns the square root of the extended double-precision floating-point
| value `a'.  The operation is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5286
floatx80 floatx80_sqrt(floatx80 a, float_status *status)
B
bellard 已提交
5287 5288
{
    flag aSign;
5289
    int32_t aExp, zExp;
5290 5291
    uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0;
    uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
B
bellard 已提交
5292

5293 5294 5295 5296
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
B
bellard 已提交
5297 5298 5299 5300
    aSig0 = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    if ( aExp == 0x7FFF ) {
5301 5302 5303
        if ((uint64_t)(aSig0 << 1)) {
            return propagateFloatx80NaN(a, a, status);
        }
B
bellard 已提交
5304 5305 5306 5307 5308 5309
        if ( ! aSign ) return a;
        goto invalid;
    }
    if ( aSign ) {
        if ( ( aExp | aSig0 ) == 0 ) return a;
 invalid:
5310
        float_raise(float_flag_invalid, status);
5311
        return floatx80_default_nan(status);
B
bellard 已提交
5312 5313 5314 5315 5316 5317 5318 5319 5320 5321 5322 5323
    }
    if ( aExp == 0 ) {
        if ( aSig0 == 0 ) return packFloatx80( 0, 0, 0 );
        normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 );
    }
    zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFF;
    zSig0 = estimateSqrt32( aExp, aSig0>>32 );
    shift128Right( aSig0, 0, 2 + ( aExp & 1 ), &aSig0, &aSig1 );
    zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );
    doubleZSig0 = zSig0<<1;
    mul64To128( zSig0, zSig0, &term0, &term1 );
    sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
5324
    while ( (int64_t) rem0 < 0 ) {
B
bellard 已提交
5325 5326 5327 5328 5329 5330 5331 5332 5333 5334 5335
        --zSig0;
        doubleZSig0 -= 2;
        add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
    }
    zSig1 = estimateDiv128To64( rem1, 0, doubleZSig0 );
    if ( ( zSig1 & LIT64( 0x3FFFFFFFFFFFFFFF ) ) <= 5 ) {
        if ( zSig1 == 0 ) zSig1 = 1;
        mul64To128( doubleZSig0, zSig1, &term1, &term2 );
        sub128( rem1, 0, term1, term2, &rem1, &rem2 );
        mul64To128( zSig1, zSig1, &term2, &term3 );
        sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
5336
        while ( (int64_t) rem1 < 0 ) {
B
bellard 已提交
5337 5338 5339 5340 5341 5342 5343 5344 5345 5346
            --zSig1;
            shortShift128Left( 0, zSig1, 1, &term2, &term3 );
            term3 |= 1;
            term2 |= doubleZSig0;
            add192( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );
        }
        zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
    }
    shortShift128Left( 0, zSig1, 1, &zSig0, &zSig1 );
    zSig0 |= doubleZSig0;
5347 5348
    return roundAndPackFloatx80(status->floatx80_rounding_precision,
                                0, zExp, zSig0, zSig1, status);
B
bellard 已提交
5349 5350 5351
}

/*----------------------------------------------------------------------------
5352 5353 5354 5355
| Returns 1 if the extended double-precision floating-point value `a' is equal
| to the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  Otherwise, the comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
5356 5357
*----------------------------------------------------------------------------*/

5358
int floatx80_eq(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5359 5360
{

5361 5362 5363 5364 5365
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
        || (extractFloatx80Exp(a) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(a) << 1))
        || (extractFloatx80Exp(b) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(b) << 1))
B
bellard 已提交
5366
       ) {
5367
        float_raise(float_flag_invalid, status);
B
bellard 已提交
5368 5369 5370 5371 5372 5373
        return 0;
    }
    return
           ( a.low == b.low )
        && (    ( a.high == b.high )
             || (    ( a.low == 0 )
5374
                  && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) )
B
bellard 已提交
5375 5376 5377 5378 5379 5380 5381
           );

}

/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is
| less than or equal to the corresponding value `b', and 0 otherwise.  The
5382 5383 5384
| invalid exception is raised if either operand is a NaN.  The comparison is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
B
bellard 已提交
5385 5386
*----------------------------------------------------------------------------*/

5387
int floatx80_le(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5388 5389 5390
{
    flag aSign, bSign;

5391 5392 5393 5394 5395
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
        || (extractFloatx80Exp(a) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(a) << 1))
        || (extractFloatx80Exp(b) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(b) << 1))
B
bellard 已提交
5396
       ) {
5397
        float_raise(float_flag_invalid, status);
B
bellard 已提交
5398 5399 5400 5401 5402 5403 5404
        return 0;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
5405
            || (    ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
5406 5407 5408 5409 5410 5411 5412 5413 5414 5415
                 == 0 );
    }
    return
          aSign ? le128( b.high, b.low, a.high, a.low )
        : le128( a.high, a.low, b.high, b.low );

}

/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is
5416 5417 5418
| less than the corresponding value `b', and 0 otherwise.  The invalid
| exception is raised if either operand is a NaN.  The comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
5419 5420
*----------------------------------------------------------------------------*/

5421
int floatx80_lt(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5422 5423 5424
{
    flag aSign, bSign;

5425 5426 5427 5428 5429
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
        || (extractFloatx80Exp(a) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(a) << 1))
        || (extractFloatx80Exp(b) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(b) << 1))
B
bellard 已提交
5430
       ) {
5431
        float_raise(float_flag_invalid, status);
B
bellard 已提交
5432 5433 5434 5435 5436 5437 5438
        return 0;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
5439
            && (    ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
5440 5441 5442 5443 5444 5445 5446 5447
                 != 0 );
    }
    return
          aSign ? lt128( b.high, b.low, a.high, a.low )
        : lt128( a.high, a.low, b.high, b.low );

}

5448 5449
/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point values `a' and `b'
5450 5451 5452
| cannot be compared, and 0 otherwise.  The invalid exception is raised if
| either operand is a NaN.   The comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
5453
*----------------------------------------------------------------------------*/
5454
int floatx80_unordered(floatx80 a, floatx80 b, float_status *status)
5455
{
5456 5457 5458 5459 5460
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)
        || (extractFloatx80Exp(a) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(a) << 1))
        || (extractFloatx80Exp(b) == 0x7FFF
            && (uint64_t) (extractFloatx80Frac(b) << 1))
5461
       ) {
5462
        float_raise(float_flag_invalid, status);
5463 5464 5465 5466 5467
        return 1;
    }
    return 0;
}

B
bellard 已提交
5468
/*----------------------------------------------------------------------------
5469
| Returns 1 if the extended double-precision floating-point value `a' is
5470 5471 5472
| equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs do not
| cause an exception.  The comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
5473 5474
*----------------------------------------------------------------------------*/

5475
int floatx80_eq_quiet(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5476 5477
{

5478 5479 5480 5481
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return 0;
    }
B
bellard 已提交
5482
    if (    (    ( extractFloatx80Exp( a ) == 0x7FFF )
5483
              && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
B
bellard 已提交
5484
         || (    ( extractFloatx80Exp( b ) == 0x7FFF )
5485
              && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
B
bellard 已提交
5486
       ) {
5487 5488
        if (floatx80_is_signaling_nan(a, status)
         || floatx80_is_signaling_nan(b, status)) {
5489
            float_raise(float_flag_invalid, status);
5490
        }
B
bellard 已提交
5491 5492 5493 5494 5495 5496
        return 0;
    }
    return
           ( a.low == b.low )
        && (    ( a.high == b.high )
             || (    ( a.low == 0 )
5497
                  && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) )
B
bellard 已提交
5498 5499 5500 5501 5502 5503 5504 5505 5506 5507 5508
           );

}

/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is less
| than or equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs
| do not cause an exception.  Otherwise, the comparison is performed according
| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5509
int floatx80_le_quiet(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5510 5511 5512
{
    flag aSign, bSign;

5513 5514 5515 5516
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return 0;
    }
B
bellard 已提交
5517
    if (    (    ( extractFloatx80Exp( a ) == 0x7FFF )
5518
              && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
B
bellard 已提交
5519
         || (    ( extractFloatx80Exp( b ) == 0x7FFF )
5520
              && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
B
bellard 已提交
5521
       ) {
5522 5523
        if (floatx80_is_signaling_nan(a, status)
         || floatx80_is_signaling_nan(b, status)) {
5524
            float_raise(float_flag_invalid, status);
B
bellard 已提交
5525 5526 5527 5528 5529 5530 5531 5532
        }
        return 0;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
5533
            || (    ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
5534 5535 5536 5537 5538 5539 5540 5541 5542 5543 5544 5545 5546 5547 5548
                 == 0 );
    }
    return
          aSign ? le128( b.high, b.low, a.high, a.low )
        : le128( a.high, a.low, b.high, b.low );

}

/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point value `a' is less
| than the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause
| an exception.  Otherwise, the comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5549
int floatx80_lt_quiet(floatx80 a, floatx80 b, float_status *status)
B
bellard 已提交
5550 5551 5552
{
    flag aSign, bSign;

5553 5554 5555 5556
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return 0;
    }
B
bellard 已提交
5557
    if (    (    ( extractFloatx80Exp( a ) == 0x7FFF )
5558
              && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
B
bellard 已提交
5559
         || (    ( extractFloatx80Exp( b ) == 0x7FFF )
5560
              && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
B
bellard 已提交
5561
       ) {
5562 5563
        if (floatx80_is_signaling_nan(a, status)
         || floatx80_is_signaling_nan(b, status)) {
5564
            float_raise(float_flag_invalid, status);
B
bellard 已提交
5565 5566 5567 5568 5569 5570 5571 5572
        }
        return 0;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
5573
            && (    ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
5574 5575 5576 5577 5578 5579 5580 5581
                 != 0 );
    }
    return
          aSign ? lt128( b.high, b.low, a.high, a.low )
        : lt128( a.high, a.low, b.high, b.low );

}

5582 5583 5584 5585 5586 5587
/*----------------------------------------------------------------------------
| Returns 1 if the extended double-precision floating-point values `a' and `b'
| cannot be compared, and 0 otherwise.  Quiet NaNs do not cause an exception.
| The comparison is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
5588
int floatx80_unordered_quiet(floatx80 a, floatx80 b, float_status *status)
5589
{
5590 5591 5592 5593
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return 1;
    }
5594 5595 5596 5597 5598
    if (    (    ( extractFloatx80Exp( a ) == 0x7FFF )
              && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
         || (    ( extractFloatx80Exp( b ) == 0x7FFF )
              && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
       ) {
5599 5600
        if (floatx80_is_signaling_nan(a, status)
         || floatx80_is_signaling_nan(b, status)) {
5601
            float_raise(float_flag_invalid, status);
5602 5603 5604 5605 5606 5607
        }
        return 1;
    }
    return 0;
}

B
bellard 已提交
5608 5609 5610 5611 5612 5613 5614 5615 5616 5617
/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the 32-bit two's complement integer format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic---which means in particular that the conversion is rounded
| according to the current rounding mode.  If `a' is a NaN, the largest
| positive integer is returned.  Otherwise, if the conversion overflows, the
| largest integer with the same sign as `a' is returned.
*----------------------------------------------------------------------------*/

5618
int32_t float128_to_int32(float128 a, float_status *status)
B
bellard 已提交
5619 5620
{
    flag aSign;
5621
    int32_t aExp, shiftCount;
5622
    uint64_t aSig0, aSig1;
B
bellard 已提交
5623 5624 5625 5626 5627 5628 5629 5630 5631 5632

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) aSign = 0;
    if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
    aSig0 |= ( aSig1 != 0 );
    shiftCount = 0x4028 - aExp;
    if ( 0 < shiftCount ) shift64RightJamming( aSig0, shiftCount, &aSig0 );
5633
    return roundAndPackInt32(aSign, aSig0, status);
B
bellard 已提交
5634 5635 5636 5637 5638 5639 5640 5641 5642 5643 5644 5645 5646

}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the 32-bit two's complement integer format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic, except that the conversion is always rounded toward zero.  If
| `a' is a NaN, the largest positive integer is returned.  Otherwise, if the
| conversion overflows, the largest integer with the same sign as `a' is
| returned.
*----------------------------------------------------------------------------*/

5647
int32_t float128_to_int32_round_to_zero(float128 a, float_status *status)
B
bellard 已提交
5648 5649
{
    flag aSign;
5650
    int32_t aExp, shiftCount;
5651
    uint64_t aSig0, aSig1, savedASig;
5652
    int32_t z;
B
bellard 已提交
5653 5654 5655 5656 5657 5658 5659 5660 5661 5662 5663

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    aSig0 |= ( aSig1 != 0 );
    if ( 0x401E < aExp ) {
        if ( ( aExp == 0x7FFF ) && aSig0 ) aSign = 0;
        goto invalid;
    }
    else if ( aExp < 0x3FFF ) {
5664 5665 5666
        if (aExp || aSig0) {
            status->float_exception_flags |= float_flag_inexact;
        }
B
bellard 已提交
5667 5668 5669 5670 5671 5672 5673 5674 5675 5676
        return 0;
    }
    aSig0 |= LIT64( 0x0001000000000000 );
    shiftCount = 0x402F - aExp;
    savedASig = aSig0;
    aSig0 >>= shiftCount;
    z = aSig0;
    if ( aSign ) z = - z;
    if ( ( z < 0 ) ^ aSign ) {
 invalid:
5677
        float_raise(float_flag_invalid, status);
5678
        return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
B
bellard 已提交
5679 5680
    }
    if ( ( aSig0<<shiftCount ) != savedASig ) {
5681
        status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
5682 5683 5684 5685 5686 5687 5688 5689 5690 5691 5692 5693 5694 5695 5696
    }
    return z;

}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the 64-bit two's complement integer format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic---which means in particular that the conversion is rounded
| according to the current rounding mode.  If `a' is a NaN, the largest
| positive integer is returned.  Otherwise, if the conversion overflows, the
| largest integer with the same sign as `a' is returned.
*----------------------------------------------------------------------------*/

5697
int64_t float128_to_int64(float128 a, float_status *status)
B
bellard 已提交
5698 5699
{
    flag aSign;
5700
    int32_t aExp, shiftCount;
5701
    uint64_t aSig0, aSig1;
B
bellard 已提交
5702 5703 5704 5705 5706 5707 5708 5709 5710

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
    shiftCount = 0x402F - aExp;
    if ( shiftCount <= 0 ) {
        if ( 0x403E < aExp ) {
5711
            float_raise(float_flag_invalid, status);
B
bellard 已提交
5712 5713 5714 5715 5716 5717 5718
            if (    ! aSign
                 || (    ( aExp == 0x7FFF )
                      && ( aSig1 || ( aSig0 != LIT64( 0x0001000000000000 ) ) )
                    )
               ) {
                return LIT64( 0x7FFFFFFFFFFFFFFF );
            }
5719
            return (int64_t) LIT64( 0x8000000000000000 );
B
bellard 已提交
5720 5721 5722 5723 5724 5725
        }
        shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 );
    }
    else {
        shift64ExtraRightJamming( aSig0, aSig1, shiftCount, &aSig0, &aSig1 );
    }
5726
    return roundAndPackInt64(aSign, aSig0, aSig1, status);
B
bellard 已提交
5727 5728 5729 5730 5731 5732 5733 5734 5735 5736 5737 5738 5739

}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the 64-bit two's complement integer format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic, except that the conversion is always rounded toward zero.
| If `a' is a NaN, the largest positive integer is returned.  Otherwise, if
| the conversion overflows, the largest integer with the same sign as `a' is
| returned.
*----------------------------------------------------------------------------*/

5740
int64_t float128_to_int64_round_to_zero(float128 a, float_status *status)
B
bellard 已提交
5741 5742
{
    flag aSign;
5743
    int32_t aExp, shiftCount;
5744
    uint64_t aSig0, aSig1;
5745
    int64_t z;
B
bellard 已提交
5746 5747 5748 5749 5750 5751 5752 5753 5754 5755 5756 5757

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
    shiftCount = aExp - 0x402F;
    if ( 0 < shiftCount ) {
        if ( 0x403E <= aExp ) {
            aSig0 &= LIT64( 0x0000FFFFFFFFFFFF );
            if (    ( a.high == LIT64( 0xC03E000000000000 ) )
                 && ( aSig1 < LIT64( 0x0002000000000000 ) ) ) {
5758 5759 5760
                if (aSig1) {
                    status->float_exception_flags |= float_flag_inexact;
                }
B
bellard 已提交
5761 5762
            }
            else {
5763
                float_raise(float_flag_invalid, status);
B
bellard 已提交
5764 5765 5766 5767
                if ( ! aSign || ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) ) {
                    return LIT64( 0x7FFFFFFFFFFFFFFF );
                }
            }
5768
            return (int64_t) LIT64( 0x8000000000000000 );
B
bellard 已提交
5769 5770
        }
        z = ( aSig0<<shiftCount ) | ( aSig1>>( ( - shiftCount ) & 63 ) );
5771
        if ( (uint64_t) ( aSig1<<shiftCount ) ) {
5772
            status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
5773 5774 5775 5776 5777
        }
    }
    else {
        if ( aExp < 0x3FFF ) {
            if ( aExp | aSig0 | aSig1 ) {
5778
                status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
5779 5780 5781 5782 5783
            }
            return 0;
        }
        z = aSig0>>( - shiftCount );
        if (    aSig1
5784
             || ( shiftCount && (uint64_t) ( aSig0<<( shiftCount & 63 ) ) ) ) {
5785
            status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
5786 5787 5788 5789 5790 5791 5792
        }
    }
    if ( aSign ) z = - z;
    return z;

}

5793 5794 5795 5796 5797 5798 5799 5800 5801 5802 5803 5804 5805 5806 5807 5808 5809 5810 5811 5812 5813 5814 5815 5816 5817 5818 5819 5820 5821 5822 5823 5824 5825 5826 5827 5828 5829 5830 5831 5832 5833 5834 5835 5836 5837 5838 5839 5840 5841 5842 5843 5844 5845 5846 5847 5848 5849 5850 5851
/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point value
| `a' to the 64-bit unsigned integer format.  The conversion is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic---which means in particular that the conversion is rounded
| according to the current rounding mode.  If `a' is a NaN, the largest
| positive integer is returned.  If the conversion overflows, the
| largest unsigned integer is returned.  If 'a' is negative, the value is
| rounded and zero is returned; negative values that do not round to zero
| will raise the inexact exception.
*----------------------------------------------------------------------------*/

uint64_t float128_to_uint64(float128 a, float_status *status)
{
    flag aSign;
    int aExp;
    int shiftCount;
    uint64_t aSig0, aSig1;

    aSig0 = extractFloat128Frac0(a);
    aSig1 = extractFloat128Frac1(a);
    aExp = extractFloat128Exp(a);
    aSign = extractFloat128Sign(a);
    if (aSign && (aExp > 0x3FFE)) {
        float_raise(float_flag_invalid, status);
        if (float128_is_any_nan(a)) {
            return LIT64(0xFFFFFFFFFFFFFFFF);
        } else {
            return 0;
        }
    }
    if (aExp) {
        aSig0 |= LIT64(0x0001000000000000);
    }
    shiftCount = 0x402F - aExp;
    if (shiftCount <= 0) {
        if (0x403E < aExp) {
            float_raise(float_flag_invalid, status);
            return LIT64(0xFFFFFFFFFFFFFFFF);
        }
        shortShift128Left(aSig0, aSig1, -shiftCount, &aSig0, &aSig1);
    } else {
        shift64ExtraRightJamming(aSig0, aSig1, shiftCount, &aSig0, &aSig1);
    }
    return roundAndPackUint64(aSign, aSig0, aSig1, status);
}

uint64_t float128_to_uint64_round_to_zero(float128 a, float_status *status)
{
    uint64_t v;
    signed char current_rounding_mode = status->float_rounding_mode;

    set_float_rounding_mode(float_round_to_zero, status);
    v = float128_to_uint64(a, status);
    set_float_rounding_mode(current_rounding_mode, status);

    return v;
}

B
bellard 已提交
5852 5853
/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
5854 5855 5856 5857 5858 5859 5860 5861 5862 5863 5864 5865 5866 5867 5868 5869 5870 5871 5872 5873 5874 5875 5876 5877 5878 5879 5880 5881
| value `a' to the 32-bit unsigned integer format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic except that the conversion is always rounded toward zero.
| If `a' is a NaN, the largest positive integer is returned.  Otherwise,
| if the conversion overflows, the largest unsigned integer is returned.
| If 'a' is negative, the value is rounded and zero is returned; negative
| values that do not round to zero will raise the inexact exception.
*----------------------------------------------------------------------------*/

uint32_t float128_to_uint32_round_to_zero(float128 a, float_status *status)
{
    uint64_t v;
    uint32_t res;
    int old_exc_flags = get_float_exception_flags(status);

    v = float128_to_uint64_round_to_zero(a, status);
    if (v > 0xffffffff) {
        res = 0xffffffff;
    } else {
        return v;
    }
    set_float_exception_flags(old_exc_flags, status);
    float_raise(float_flag_invalid, status);
    return res;
}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
B
bellard 已提交
5882 5883 5884 5885 5886
| value `a' to the single-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

5887
float32 float128_to_float32(float128 a, float_status *status)
B
bellard 已提交
5888 5889
{
    flag aSign;
5890
    int32_t aExp;
5891 5892
    uint64_t aSig0, aSig1;
    uint32_t zSig;
B
bellard 已提交
5893 5894 5895 5896 5897 5898 5899

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
        if ( aSig0 | aSig1 ) {
5900
            return commonNaNToFloat32(float128ToCommonNaN(a, status), status);
B
bellard 已提交
5901 5902 5903 5904 5905 5906 5907 5908 5909 5910
        }
        return packFloat32( aSign, 0xFF, 0 );
    }
    aSig0 |= ( aSig1 != 0 );
    shift64RightJamming( aSig0, 18, &aSig0 );
    zSig = aSig0;
    if ( aExp || zSig ) {
        zSig |= 0x40000000;
        aExp -= 0x3F81;
    }
5911
    return roundAndPackFloat32(aSign, aExp, zSig, status);
B
bellard 已提交
5912 5913 5914 5915 5916 5917 5918 5919 5920 5921

}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the double-precision floating-point format.  The conversion
| is performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*----------------------------------------------------------------------------*/

5922
float64 float128_to_float64(float128 a, float_status *status)
B
bellard 已提交
5923 5924
{
    flag aSign;
5925
    int32_t aExp;
5926
    uint64_t aSig0, aSig1;
B
bellard 已提交
5927 5928 5929 5930 5931 5932 5933

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
        if ( aSig0 | aSig1 ) {
5934
            return commonNaNToFloat64(float128ToCommonNaN(a, status), status);
B
bellard 已提交
5935 5936 5937 5938 5939 5940 5941 5942 5943
        }
        return packFloat64( aSign, 0x7FF, 0 );
    }
    shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );
    aSig0 |= ( aSig1 != 0 );
    if ( aExp || aSig0 ) {
        aSig0 |= LIT64( 0x4000000000000000 );
        aExp -= 0x3C01;
    }
5944
    return roundAndPackFloat64(aSign, aExp, aSig0, status);
B
bellard 已提交
5945 5946 5947 5948 5949 5950 5951 5952 5953 5954

}

/*----------------------------------------------------------------------------
| Returns the result of converting the quadruple-precision floating-point
| value `a' to the extended double-precision floating-point format.  The
| conversion is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5955
floatx80 float128_to_floatx80(float128 a, float_status *status)
B
bellard 已提交
5956 5957
{
    flag aSign;
5958
    int32_t aExp;
5959
    uint64_t aSig0, aSig1;
B
bellard 已提交
5960 5961 5962 5963 5964 5965 5966

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
        if ( aSig0 | aSig1 ) {
5967
            return commonNaNToFloatx80(float128ToCommonNaN(a, status), status);
B
bellard 已提交
5968
        }
5969 5970
        return packFloatx80(aSign, floatx80_infinity_high,
                                   floatx80_infinity_low);
B
bellard 已提交
5971 5972 5973 5974 5975 5976 5977 5978 5979
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return packFloatx80( aSign, 0, 0 );
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    else {
        aSig0 |= LIT64( 0x0001000000000000 );
    }
    shortShift128Left( aSig0, aSig1, 15, &aSig0, &aSig1 );
5980
    return roundAndPackFloatx80(80, aSign, aExp, aSig0, aSig1, status);
B
bellard 已提交
5981 5982 5983 5984 5985 5986 5987 5988 5989 5990

}

/*----------------------------------------------------------------------------
| Rounds the quadruple-precision floating-point value `a' to an integer, and
| returns the result as a quadruple-precision floating-point value.  The
| operation is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

5991
float128 float128_round_to_int(float128 a, float_status *status)
B
bellard 已提交
5992 5993
{
    flag aSign;
5994
    int32_t aExp;
5995
    uint64_t lastBitMask, roundBitsMask;
B
bellard 已提交
5996 5997 5998 5999 6000 6001 6002 6003
    float128 z;

    aExp = extractFloat128Exp( a );
    if ( 0x402F <= aExp ) {
        if ( 0x406F <= aExp ) {
            if (    ( aExp == 0x7FFF )
                 && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )
               ) {
6004
                return propagateFloat128NaN(a, a, status);
B
bellard 已提交
6005 6006 6007 6008 6009 6010 6011
            }
            return a;
        }
        lastBitMask = 1;
        lastBitMask = ( lastBitMask<<( 0x406E - aExp ) )<<1;
        roundBitsMask = lastBitMask - 1;
        z = a;
6012
        switch (status->float_rounding_mode) {
6013
        case float_round_nearest_even:
B
bellard 已提交
6014 6015 6016 6017 6018
            if ( lastBitMask ) {
                add128( z.high, z.low, 0, lastBitMask>>1, &z.high, &z.low );
                if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask;
            }
            else {
6019
                if ( (int64_t) z.low < 0 ) {
B
bellard 已提交
6020
                    ++z.high;
6021
                    if ( (uint64_t) ( z.low<<1 ) == 0 ) z.high &= ~1;
B
bellard 已提交
6022 6023
                }
            }
6024
            break;
6025 6026 6027 6028 6029 6030 6031 6032 6033
        case float_round_ties_away:
            if (lastBitMask) {
                add128(z.high, z.low, 0, lastBitMask >> 1, &z.high, &z.low);
            } else {
                if ((int64_t) z.low < 0) {
                    ++z.high;
                }
            }
            break;
6034 6035 6036 6037 6038 6039 6040 6041 6042 6043
        case float_round_to_zero:
            break;
        case float_round_up:
            if (!extractFloat128Sign(z)) {
                add128(z.high, z.low, 0, roundBitsMask, &z.high, &z.low);
            }
            break;
        case float_round_down:
            if (extractFloat128Sign(z)) {
                add128(z.high, z.low, 0, roundBitsMask, &z.high, &z.low);
B
bellard 已提交
6044
            }
6045 6046 6047
            break;
        default:
            abort();
B
bellard 已提交
6048 6049 6050 6051 6052
        }
        z.low &= ~ roundBitsMask;
    }
    else {
        if ( aExp < 0x3FFF ) {
6053
            if ( ( ( (uint64_t) ( a.high<<1 ) ) | a.low ) == 0 ) return a;
6054
            status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
6055
            aSign = extractFloat128Sign( a );
6056
            switch (status->float_rounding_mode) {
B
bellard 已提交
6057 6058 6059 6060 6061 6062 6063 6064
             case float_round_nearest_even:
                if (    ( aExp == 0x3FFE )
                     && (   extractFloat128Frac0( a )
                          | extractFloat128Frac1( a ) )
                   ) {
                    return packFloat128( aSign, 0x3FFF, 0, 0 );
                }
                break;
6065 6066 6067 6068 6069
            case float_round_ties_away:
                if (aExp == 0x3FFE) {
                    return packFloat128(aSign, 0x3FFF, 0, 0);
                }
                break;
B
bellard 已提交
6070 6071 6072 6073 6074 6075 6076 6077 6078 6079 6080 6081 6082 6083 6084 6085
             case float_round_down:
                return
                      aSign ? packFloat128( 1, 0x3FFF, 0, 0 )
                    : packFloat128( 0, 0, 0, 0 );
             case float_round_up:
                return
                      aSign ? packFloat128( 1, 0, 0, 0 )
                    : packFloat128( 0, 0x3FFF, 0, 0 );
            }
            return packFloat128( aSign, 0, 0, 0 );
        }
        lastBitMask = 1;
        lastBitMask <<= 0x402F - aExp;
        roundBitsMask = lastBitMask - 1;
        z.low = 0;
        z.high = a.high;
6086
        switch (status->float_rounding_mode) {
6087
        case float_round_nearest_even:
B
bellard 已提交
6088 6089 6090 6091
            z.high += lastBitMask>>1;
            if ( ( ( z.high & roundBitsMask ) | a.low ) == 0 ) {
                z.high &= ~ lastBitMask;
            }
6092
            break;
6093 6094 6095
        case float_round_ties_away:
            z.high += lastBitMask>>1;
            break;
6096 6097 6098 6099
        case float_round_to_zero:
            break;
        case float_round_up:
            if (!extractFloat128Sign(z)) {
B
bellard 已提交
6100 6101 6102
                z.high |= ( a.low != 0 );
                z.high += roundBitsMask;
            }
6103 6104 6105 6106 6107 6108 6109 6110 6111
            break;
        case float_round_down:
            if (extractFloat128Sign(z)) {
                z.high |= (a.low != 0);
                z.high += roundBitsMask;
            }
            break;
        default:
            abort();
B
bellard 已提交
6112 6113 6114 6115
        }
        z.high &= ~ roundBitsMask;
    }
    if ( ( z.low != a.low ) || ( z.high != a.high ) ) {
6116
        status->float_exception_flags |= float_flag_inexact;
B
bellard 已提交
6117 6118 6119 6120 6121 6122 6123 6124 6125 6126 6127 6128 6129
    }
    return z;

}

/*----------------------------------------------------------------------------
| Returns the result of adding the absolute values of the quadruple-precision
| floating-point values `a' and `b'.  If `zSign' is 1, the sum is negated
| before being returned.  `zSign' is ignored if the result is a NaN.
| The addition is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6130 6131
static float128 addFloat128Sigs(float128 a, float128 b, flag zSign,
                                float_status *status)
B
bellard 已提交
6132
{
6133
    int32_t aExp, bExp, zExp;
6134
    uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
6135
    int32_t expDiff;
B
bellard 已提交
6136 6137 6138 6139 6140 6141 6142 6143 6144 6145

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    bSig1 = extractFloat128Frac1( b );
    bSig0 = extractFloat128Frac0( b );
    bExp = extractFloat128Exp( b );
    expDiff = aExp - bExp;
    if ( 0 < expDiff ) {
        if ( aExp == 0x7FFF ) {
6146 6147 6148
            if (aSig0 | aSig1) {
                return propagateFloat128NaN(a, b, status);
            }
B
bellard 已提交
6149 6150 6151 6152 6153 6154 6155 6156 6157 6158 6159 6160 6161 6162
            return a;
        }
        if ( bExp == 0 ) {
            --expDiff;
        }
        else {
            bSig0 |= LIT64( 0x0001000000000000 );
        }
        shift128ExtraRightJamming(
            bSig0, bSig1, 0, expDiff, &bSig0, &bSig1, &zSig2 );
        zExp = aExp;
    }
    else if ( expDiff < 0 ) {
        if ( bExp == 0x7FFF ) {
6163 6164 6165
            if (bSig0 | bSig1) {
                return propagateFloat128NaN(a, b, status);
            }
B
bellard 已提交
6166 6167 6168 6169 6170 6171 6172 6173 6174 6175 6176 6177 6178 6179 6180
            return packFloat128( zSign, 0x7FFF, 0, 0 );
        }
        if ( aExp == 0 ) {
            ++expDiff;
        }
        else {
            aSig0 |= LIT64( 0x0001000000000000 );
        }
        shift128ExtraRightJamming(
            aSig0, aSig1, 0, - expDiff, &aSig0, &aSig1, &zSig2 );
        zExp = bExp;
    }
    else {
        if ( aExp == 0x7FFF ) {
            if ( aSig0 | aSig1 | bSig0 | bSig1 ) {
6181
                return propagateFloat128NaN(a, b, status);
B
bellard 已提交
6182 6183 6184 6185
            }
            return a;
        }
        add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
6186
        if ( aExp == 0 ) {
6187
            if (status->flush_to_zero) {
6188
                if (zSig0 | zSig1) {
6189
                    float_raise(float_flag_output_denormal, status);
6190 6191 6192
                }
                return packFloat128(zSign, 0, 0, 0);
            }
6193 6194
            return packFloat128( zSign, 0, zSig0, zSig1 );
        }
B
bellard 已提交
6195 6196 6197 6198 6199 6200 6201 6202 6203 6204 6205 6206 6207 6208
        zSig2 = 0;
        zSig0 |= LIT64( 0x0002000000000000 );
        zExp = aExp;
        goto shiftRight1;
    }
    aSig0 |= LIT64( 0x0001000000000000 );
    add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
    --zExp;
    if ( zSig0 < LIT64( 0x0002000000000000 ) ) goto roundAndPack;
    ++zExp;
 shiftRight1:
    shift128ExtraRightJamming(
        zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );
 roundAndPack:
6209
    return roundAndPackFloat128(zSign, zExp, zSig0, zSig1, zSig2, status);
B
bellard 已提交
6210 6211 6212 6213 6214 6215 6216 6217 6218 6219 6220

}

/*----------------------------------------------------------------------------
| Returns the result of subtracting the absolute values of the quadruple-
| precision floating-point values `a' and `b'.  If `zSign' is 1, the
| difference is negated before being returned.  `zSign' is ignored if the
| result is a NaN.  The subtraction is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6221 6222
static float128 subFloat128Sigs(float128 a, float128 b, flag zSign,
                                float_status *status)
B
bellard 已提交
6223
{
6224
    int32_t aExp, bExp, zExp;
6225
    uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;
6226
    int32_t expDiff;
B
bellard 已提交
6227 6228 6229 6230 6231 6232 6233 6234 6235 6236 6237 6238 6239 6240

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    bSig1 = extractFloat128Frac1( b );
    bSig0 = extractFloat128Frac0( b );
    bExp = extractFloat128Exp( b );
    expDiff = aExp - bExp;
    shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );
    shortShift128Left( bSig0, bSig1, 14, &bSig0, &bSig1 );
    if ( 0 < expDiff ) goto aExpBigger;
    if ( expDiff < 0 ) goto bExpBigger;
    if ( aExp == 0x7FFF ) {
        if ( aSig0 | aSig1 | bSig0 | bSig1 ) {
6241
            return propagateFloat128NaN(a, b, status);
B
bellard 已提交
6242
        }
6243
        float_raise(float_flag_invalid, status);
6244
        return float128_default_nan(status);
B
bellard 已提交
6245 6246 6247 6248 6249 6250 6251 6252 6253
    }
    if ( aExp == 0 ) {
        aExp = 1;
        bExp = 1;
    }
    if ( bSig0 < aSig0 ) goto aBigger;
    if ( aSig0 < bSig0 ) goto bBigger;
    if ( bSig1 < aSig1 ) goto aBigger;
    if ( aSig1 < bSig1 ) goto bBigger;
6254 6255
    return packFloat128(status->float_rounding_mode == float_round_down,
                        0, 0, 0);
B
bellard 已提交
6256 6257
 bExpBigger:
    if ( bExp == 0x7FFF ) {
6258 6259 6260
        if (bSig0 | bSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6261 6262 6263 6264 6265 6266 6267 6268 6269 6270 6271 6272 6273 6274 6275 6276 6277
        return packFloat128( zSign ^ 1, 0x7FFF, 0, 0 );
    }
    if ( aExp == 0 ) {
        ++expDiff;
    }
    else {
        aSig0 |= LIT64( 0x4000000000000000 );
    }
    shift128RightJamming( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );
    bSig0 |= LIT64( 0x4000000000000000 );
 bBigger:
    sub128( bSig0, bSig1, aSig0, aSig1, &zSig0, &zSig1 );
    zExp = bExp;
    zSign ^= 1;
    goto normalizeRoundAndPack;
 aExpBigger:
    if ( aExp == 0x7FFF ) {
6278 6279 6280
        if (aSig0 | aSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6281 6282 6283 6284 6285 6286 6287 6288 6289 6290 6291 6292 6293 6294 6295
        return a;
    }
    if ( bExp == 0 ) {
        --expDiff;
    }
    else {
        bSig0 |= LIT64( 0x4000000000000000 );
    }
    shift128RightJamming( bSig0, bSig1, expDiff, &bSig0, &bSig1 );
    aSig0 |= LIT64( 0x4000000000000000 );
 aBigger:
    sub128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
    zExp = aExp;
 normalizeRoundAndPack:
    --zExp;
6296 6297
    return normalizeRoundAndPackFloat128(zSign, zExp - 14, zSig0, zSig1,
                                         status);
B
bellard 已提交
6298 6299 6300 6301 6302 6303 6304 6305 6306

}

/*----------------------------------------------------------------------------
| Returns the result of adding the quadruple-precision floating-point values
| `a' and `b'.  The operation is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6307
float128 float128_add(float128 a, float128 b, float_status *status)
B
bellard 已提交
6308 6309 6310 6311 6312 6313
{
    flag aSign, bSign;

    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign == bSign ) {
6314
        return addFloat128Sigs(a, b, aSign, status);
B
bellard 已提交
6315 6316
    }
    else {
6317
        return subFloat128Sigs(a, b, aSign, status);
B
bellard 已提交
6318 6319 6320 6321 6322 6323 6324 6325 6326 6327
    }

}

/*----------------------------------------------------------------------------
| Returns the result of subtracting the quadruple-precision floating-point
| values `a' and `b'.  The operation is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6328
float128 float128_sub(float128 a, float128 b, float_status *status)
B
bellard 已提交
6329 6330 6331 6332 6333 6334
{
    flag aSign, bSign;

    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign == bSign ) {
6335
        return subFloat128Sigs(a, b, aSign, status);
B
bellard 已提交
6336 6337
    }
    else {
6338
        return addFloat128Sigs(a, b, aSign, status);
B
bellard 已提交
6339 6340 6341 6342 6343 6344 6345 6346 6347 6348
    }

}

/*----------------------------------------------------------------------------
| Returns the result of multiplying the quadruple-precision floating-point
| values `a' and `b'.  The operation is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6349
float128 float128_mul(float128 a, float128 b, float_status *status)
B
bellard 已提交
6350 6351
{
    flag aSign, bSign, zSign;
6352
    int32_t aExp, bExp, zExp;
6353
    uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;
B
bellard 已提交
6354 6355 6356 6357 6358 6359 6360 6361 6362 6363 6364 6365 6366

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    bSig1 = extractFloat128Frac1( b );
    bSig0 = extractFloat128Frac0( b );
    bExp = extractFloat128Exp( b );
    bSign = extractFloat128Sign( b );
    zSign = aSign ^ bSign;
    if ( aExp == 0x7FFF ) {
        if (    ( aSig0 | aSig1 )
             || ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {
6367
            return propagateFloat128NaN(a, b, status);
B
bellard 已提交
6368 6369 6370 6371 6372
        }
        if ( ( bExp | bSig0 | bSig1 ) == 0 ) goto invalid;
        return packFloat128( zSign, 0x7FFF, 0, 0 );
    }
    if ( bExp == 0x7FFF ) {
6373 6374 6375
        if (bSig0 | bSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6376 6377
        if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
 invalid:
6378
            float_raise(float_flag_invalid, status);
6379
            return float128_default_nan(status);
B
bellard 已提交
6380 6381 6382 6383 6384 6385 6386 6387 6388 6389 6390 6391 6392 6393 6394 6395 6396 6397 6398 6399 6400 6401
        }
        return packFloat128( zSign, 0x7FFF, 0, 0 );
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    if ( bExp == 0 ) {
        if ( ( bSig0 | bSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
        normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
    }
    zExp = aExp + bExp - 0x4000;
    aSig0 |= LIT64( 0x0001000000000000 );
    shortShift128Left( bSig0, bSig1, 16, &bSig0, &bSig1 );
    mul128To256( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1, &zSig2, &zSig3 );
    add128( zSig0, zSig1, aSig0, aSig1, &zSig0, &zSig1 );
    zSig2 |= ( zSig3 != 0 );
    if ( LIT64( 0x0002000000000000 ) <= zSig0 ) {
        shift128ExtraRightJamming(
            zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );
        ++zExp;
    }
6402
    return roundAndPackFloat128(zSign, zExp, zSig0, zSig1, zSig2, status);
B
bellard 已提交
6403 6404 6405 6406 6407 6408 6409 6410 6411

}

/*----------------------------------------------------------------------------
| Returns the result of dividing the quadruple-precision floating-point value
| `a' by the corresponding value `b'.  The operation is performed according to
| the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6412
float128 float128_div(float128 a, float128 b, float_status *status)
B
bellard 已提交
6413 6414
{
    flag aSign, bSign, zSign;
6415
    int32_t aExp, bExp, zExp;
6416 6417
    uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
    uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
B
bellard 已提交
6418 6419 6420 6421 6422 6423 6424 6425 6426 6427 6428

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    bSig1 = extractFloat128Frac1( b );
    bSig0 = extractFloat128Frac0( b );
    bExp = extractFloat128Exp( b );
    bSign = extractFloat128Sign( b );
    zSign = aSign ^ bSign;
    if ( aExp == 0x7FFF ) {
6429 6430 6431
        if (aSig0 | aSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6432
        if ( bExp == 0x7FFF ) {
6433 6434 6435
            if (bSig0 | bSig1) {
                return propagateFloat128NaN(a, b, status);
            }
B
bellard 已提交
6436 6437 6438 6439 6440
            goto invalid;
        }
        return packFloat128( zSign, 0x7FFF, 0, 0 );
    }
    if ( bExp == 0x7FFF ) {
6441 6442 6443
        if (bSig0 | bSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6444 6445 6446 6447 6448 6449
        return packFloat128( zSign, 0, 0, 0 );
    }
    if ( bExp == 0 ) {
        if ( ( bSig0 | bSig1 ) == 0 ) {
            if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
 invalid:
6450
                float_raise(float_flag_invalid, status);
6451
                return float128_default_nan(status);
B
bellard 已提交
6452
            }
6453
            float_raise(float_flag_divbyzero, status);
B
bellard 已提交
6454 6455 6456 6457 6458 6459 6460 6461 6462 6463 6464 6465 6466 6467 6468 6469 6470 6471 6472 6473
            return packFloat128( zSign, 0x7FFF, 0, 0 );
        }
        normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    zExp = aExp - bExp + 0x3FFD;
    shortShift128Left(
        aSig0 | LIT64( 0x0001000000000000 ), aSig1, 15, &aSig0, &aSig1 );
    shortShift128Left(
        bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );
    if ( le128( bSig0, bSig1, aSig0, aSig1 ) ) {
        shift128Right( aSig0, aSig1, 1, &aSig0, &aSig1 );
        ++zExp;
    }
    zSig0 = estimateDiv128To64( aSig0, aSig1, bSig0 );
    mul128By64To192( bSig0, bSig1, zSig0, &term0, &term1, &term2 );
    sub192( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 );
6474
    while ( (int64_t) rem0 < 0 ) {
B
bellard 已提交
6475 6476 6477 6478 6479 6480 6481
        --zSig0;
        add192( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 );
    }
    zSig1 = estimateDiv128To64( rem1, rem2, bSig0 );
    if ( ( zSig1 & 0x3FFF ) <= 4 ) {
        mul128By64To192( bSig0, bSig1, zSig1, &term1, &term2, &term3 );
        sub192( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 );
6482
        while ( (int64_t) rem1 < 0 ) {
B
bellard 已提交
6483 6484 6485 6486 6487 6488
            --zSig1;
            add192( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 );
        }
        zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
    }
    shift128ExtraRightJamming( zSig0, zSig1, 0, 15, &zSig0, &zSig1, &zSig2 );
6489
    return roundAndPackFloat128(zSign, zExp, zSig0, zSig1, zSig2, status);
B
bellard 已提交
6490 6491 6492 6493 6494 6495 6496 6497 6498

}

/*----------------------------------------------------------------------------
| Returns the remainder of the quadruple-precision floating-point value `a'
| with respect to the corresponding value `b'.  The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6499
float128 float128_rem(float128 a, float128 b, float_status *status)
B
bellard 已提交
6500
{
6501
    flag aSign, zSign;
6502
    int32_t aExp, bExp, expDiff;
6503 6504 6505
    uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;
    uint64_t allZero, alternateASig0, alternateASig1, sigMean1;
    int64_t sigMean0;
B
bellard 已提交
6506 6507 6508 6509 6510 6511 6512 6513 6514 6515 6516

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    bSig1 = extractFloat128Frac1( b );
    bSig0 = extractFloat128Frac0( b );
    bExp = extractFloat128Exp( b );
    if ( aExp == 0x7FFF ) {
        if (    ( aSig0 | aSig1 )
             || ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {
6517
            return propagateFloat128NaN(a, b, status);
B
bellard 已提交
6518 6519 6520 6521
        }
        goto invalid;
    }
    if ( bExp == 0x7FFF ) {
6522 6523 6524
        if (bSig0 | bSig1) {
            return propagateFloat128NaN(a, b, status);
        }
B
bellard 已提交
6525 6526 6527 6528 6529
        return a;
    }
    if ( bExp == 0 ) {
        if ( ( bSig0 | bSig1 ) == 0 ) {
 invalid:
6530
            float_raise(float_flag_invalid, status);
6531
            return float128_default_nan(status);
B
bellard 已提交
6532 6533 6534 6535 6536 6537 6538 6539 6540 6541 6542 6543 6544 6545 6546 6547 6548 6549 6550 6551 6552 6553 6554 6555 6556 6557 6558 6559 6560 6561 6562 6563 6564 6565 6566 6567 6568 6569 6570 6571 6572 6573 6574 6575 6576 6577 6578 6579 6580 6581 6582 6583 6584 6585
        }
        normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return a;
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    expDiff = aExp - bExp;
    if ( expDiff < -1 ) return a;
    shortShift128Left(
        aSig0 | LIT64( 0x0001000000000000 ),
        aSig1,
        15 - ( expDiff < 0 ),
        &aSig0,
        &aSig1
    );
    shortShift128Left(
        bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );
    q = le128( bSig0, bSig1, aSig0, aSig1 );
    if ( q ) sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
    expDiff -= 64;
    while ( 0 < expDiff ) {
        q = estimateDiv128To64( aSig0, aSig1, bSig0 );
        q = ( 4 < q ) ? q - 4 : 0;
        mul128By64To192( bSig0, bSig1, q, &term0, &term1, &term2 );
        shortShift192Left( term0, term1, term2, 61, &term1, &term2, &allZero );
        shortShift128Left( aSig0, aSig1, 61, &aSig0, &allZero );
        sub128( aSig0, 0, term1, term2, &aSig0, &aSig1 );
        expDiff -= 61;
    }
    if ( -64 < expDiff ) {
        q = estimateDiv128To64( aSig0, aSig1, bSig0 );
        q = ( 4 < q ) ? q - 4 : 0;
        q >>= - expDiff;
        shift128Right( bSig0, bSig1, 12, &bSig0, &bSig1 );
        expDiff += 52;
        if ( expDiff < 0 ) {
            shift128Right( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );
        }
        else {
            shortShift128Left( aSig0, aSig1, expDiff, &aSig0, &aSig1 );
        }
        mul128By64To192( bSig0, bSig1, q, &term0, &term1, &term2 );
        sub128( aSig0, aSig1, term1, term2, &aSig0, &aSig1 );
    }
    else {
        shift128Right( aSig0, aSig1, 12, &aSig0, &aSig1 );
        shift128Right( bSig0, bSig1, 12, &bSig0, &bSig1 );
    }
    do {
        alternateASig0 = aSig0;
        alternateASig1 = aSig1;
        ++q;
        sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
6586
    } while ( 0 <= (int64_t) aSig0 );
B
bellard 已提交
6587
    add128(
6588
        aSig0, aSig1, alternateASig0, alternateASig1, (uint64_t *)&sigMean0, &sigMean1 );
B
bellard 已提交
6589 6590 6591 6592 6593
    if (    ( sigMean0 < 0 )
         || ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) {
        aSig0 = alternateASig0;
        aSig1 = alternateASig1;
    }
6594
    zSign = ( (int64_t) aSig0 < 0 );
B
bellard 已提交
6595
    if ( zSign ) sub128( 0, 0, aSig0, aSig1, &aSig0, &aSig1 );
6596 6597
    return normalizeRoundAndPackFloat128(aSign ^ zSign, bExp - 4, aSig0, aSig1,
                                         status);
B
bellard 已提交
6598 6599 6600 6601 6602 6603 6604 6605
}

/*----------------------------------------------------------------------------
| Returns the square root of the quadruple-precision floating-point value `a'.
| The operation is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6606
float128 float128_sqrt(float128 a, float_status *status)
B
bellard 已提交
6607 6608
{
    flag aSign;
6609
    int32_t aExp, zExp;
6610 6611
    uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;
    uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
B
bellard 已提交
6612 6613 6614 6615 6616 6617

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
6618 6619 6620
        if (aSig0 | aSig1) {
            return propagateFloat128NaN(a, a, status);
        }
B
bellard 已提交
6621 6622 6623 6624 6625 6626
        if ( ! aSign ) return a;
        goto invalid;
    }
    if ( aSign ) {
        if ( ( aExp | aSig0 | aSig1 ) == 0 ) return a;
 invalid:
6627
        float_raise(float_flag_invalid, status);
6628
        return float128_default_nan(status);
B
bellard 已提交
6629 6630 6631 6632 6633 6634 6635 6636 6637 6638 6639 6640 6641
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( 0, 0, 0, 0 );
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFE;
    aSig0 |= LIT64( 0x0001000000000000 );
    zSig0 = estimateSqrt32( aExp, aSig0>>17 );
    shortShift128Left( aSig0, aSig1, 13 - ( aExp & 1 ), &aSig0, &aSig1 );
    zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );
    doubleZSig0 = zSig0<<1;
    mul64To128( zSig0, zSig0, &term0, &term1 );
    sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
6642
    while ( (int64_t) rem0 < 0 ) {
B
bellard 已提交
6643 6644 6645 6646 6647 6648 6649 6650 6651 6652 6653
        --zSig0;
        doubleZSig0 -= 2;
        add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
    }
    zSig1 = estimateDiv128To64( rem1, 0, doubleZSig0 );
    if ( ( zSig1 & 0x1FFF ) <= 5 ) {
        if ( zSig1 == 0 ) zSig1 = 1;
        mul64To128( doubleZSig0, zSig1, &term1, &term2 );
        sub128( rem1, 0, term1, term2, &rem1, &rem2 );
        mul64To128( zSig1, zSig1, &term2, &term3 );
        sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
6654
        while ( (int64_t) rem1 < 0 ) {
B
bellard 已提交
6655 6656 6657 6658 6659 6660 6661 6662 6663
            --zSig1;
            shortShift128Left( 0, zSig1, 1, &term2, &term3 );
            term3 |= 1;
            term2 |= doubleZSig0;
            add192( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );
        }
        zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
    }
    shift128ExtraRightJamming( zSig0, zSig1, 0, 14, &zSig0, &zSig1, &zSig2 );
6664
    return roundAndPackFloat128(0, zExp, zSig0, zSig1, zSig2, status);
B
bellard 已提交
6665 6666 6667 6668 6669

}

/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is equal to
6670 6671
| the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  Otherwise, the comparison is performed
B
bellard 已提交
6672 6673 6674
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6675
int float128_eq(float128 a, float128 b, float_status *status)
B
bellard 已提交
6676 6677 6678 6679 6680 6681 6682
{

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6683
        float_raise(float_flag_invalid, status);
B
bellard 已提交
6684 6685 6686 6687 6688 6689
        return 0;
    }
    return
           ( a.low == b.low )
        && (    ( a.high == b.high )
             || (    ( a.low == 0 )
6690
                  && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
B
bellard 已提交
6691 6692 6693 6694 6695 6696
           );

}

/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is less than
6697 6698 6699
| or equal to the corresponding value `b', and 0 otherwise.  The invalid
| exception is raised if either operand is a NaN.  The comparison is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
6700 6701
*----------------------------------------------------------------------------*/

6702
int float128_le(float128 a, float128 b, float_status *status)
B
bellard 已提交
6703 6704 6705 6706 6707 6708 6709 6710
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6711
        float_raise(float_flag_invalid, status);
B
bellard 已提交
6712 6713 6714 6715 6716 6717 6718
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
6719
            || (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
6720 6721 6722 6723 6724 6725 6726 6727 6728 6729
                 == 0 );
    }
    return
          aSign ? le128( b.high, b.low, a.high, a.low )
        : le128( a.high, a.low, b.high, b.low );

}

/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is less than
6730 6731 6732
| the corresponding value `b', and 0 otherwise.  The invalid exception is
| raised if either operand is a NaN.  The comparison is performed according
| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
B
bellard 已提交
6733 6734
*----------------------------------------------------------------------------*/

6735
int float128_lt(float128 a, float128 b, float_status *status)
B
bellard 已提交
6736 6737 6738 6739 6740 6741 6742 6743
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6744
        float_raise(float_flag_invalid, status);
B
bellard 已提交
6745 6746 6747 6748 6749 6750 6751
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
6752
            && (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
6753 6754 6755 6756 6757 6758 6759 6760
                 != 0 );
    }
    return
          aSign ? lt128( b.high, b.low, a.high, a.low )
        : lt128( a.high, a.low, b.high, b.low );

}

6761 6762
/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point values `a' and `b' cannot
6763 6764 6765
| be compared, and 0 otherwise.  The invalid exception is raised if either
| operand is a NaN. The comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
6766 6767
*----------------------------------------------------------------------------*/

6768
int float128_unordered(float128 a, float128 b, float_status *status)
6769 6770 6771 6772 6773 6774
{
    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6775
        float_raise(float_flag_invalid, status);
6776 6777 6778 6779 6780
        return 1;
    }
    return 0;
}

B
bellard 已提交
6781 6782
/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is equal to
6783 6784 6785
| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.  The comparison is performed according to the IEC/IEEE Standard
| for Binary Floating-Point Arithmetic.
B
bellard 已提交
6786 6787
*----------------------------------------------------------------------------*/

6788
int float128_eq_quiet(float128 a, float128 b, float_status *status)
B
bellard 已提交
6789 6790 6791 6792 6793 6794 6795
{

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6796 6797
        if (float128_is_signaling_nan(a, status)
         || float128_is_signaling_nan(b, status)) {
6798
            float_raise(float_flag_invalid, status);
6799
        }
B
bellard 已提交
6800 6801 6802 6803 6804 6805
        return 0;
    }
    return
           ( a.low == b.low )
        && (    ( a.high == b.high )
             || (    ( a.low == 0 )
6806
                  && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
B
bellard 已提交
6807 6808 6809 6810 6811 6812 6813 6814 6815 6816 6817
           );

}

/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is less than
| or equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs do not
| cause an exception.  Otherwise, the comparison is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6818
int float128_le_quiet(float128 a, float128 b, float_status *status)
B
bellard 已提交
6819 6820 6821 6822 6823 6824 6825 6826
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6827 6828
        if (float128_is_signaling_nan(a, status)
         || float128_is_signaling_nan(b, status)) {
6829
            float_raise(float_flag_invalid, status);
B
bellard 已提交
6830 6831 6832 6833 6834 6835 6836 6837
        }
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
6838
            || (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
6839 6840 6841 6842 6843 6844 6845 6846 6847 6848 6849 6850 6851 6852 6853
                 == 0 );
    }
    return
          aSign ? le128( b.high, b.low, a.high, a.low )
        : le128( a.high, a.low, b.high, b.low );

}

/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point value `a' is less than
| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
| exception.  Otherwise, the comparison is performed according to the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6854
int float128_lt_quiet(float128 a, float128 b, float_status *status)
B
bellard 已提交
6855 6856 6857 6858 6859 6860 6861 6862
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6863 6864
        if (float128_is_signaling_nan(a, status)
         || float128_is_signaling_nan(b, status)) {
6865
            float_raise(float_flag_invalid, status);
B
bellard 已提交
6866 6867 6868 6869 6870 6871 6872 6873
        }
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
6874
            && (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
B
bellard 已提交
6875 6876 6877 6878 6879 6880 6881 6882
                 != 0 );
    }
    return
          aSign ? lt128( b.high, b.low, a.high, a.low )
        : lt128( a.high, a.low, b.high, b.low );

}

6883 6884 6885 6886 6887 6888 6889
/*----------------------------------------------------------------------------
| Returns 1 if the quadruple-precision floating-point values `a' and `b' cannot
| be compared, and 0 otherwise.  Quiet NaNs do not cause an exception.  The
| comparison is performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/

6890
int float128_unordered_quiet(float128 a, float128 b, float_status *status)
6891 6892 6893 6894 6895 6896
{
    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
6897 6898
        if (float128_is_signaling_nan(a, status)
         || float128_is_signaling_nan(b, status)) {
6899
            float_raise(float_flag_invalid, status);
6900 6901 6902 6903 6904 6905
        }
        return 1;
    }
    return 0;
}

6906 6907
static inline int floatx80_compare_internal(floatx80 a, floatx80 b,
                                            int is_quiet, float_status *status)
6908 6909 6910
{
    flag aSign, bSign;

6911 6912 6913 6914
    if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) {
        float_raise(float_flag_invalid, status);
        return float_relation_unordered;
    }
6915 6916 6917 6918 6919
    if (( ( extractFloatx80Exp( a ) == 0x7fff ) &&
          ( extractFloatx80Frac( a )<<1 ) ) ||
        ( ( extractFloatx80Exp( b ) == 0x7fff ) &&
          ( extractFloatx80Frac( b )<<1 ) )) {
        if (!is_quiet ||
6920 6921
            floatx80_is_signaling_nan(a, status) ||
            floatx80_is_signaling_nan(b, status)) {
6922
            float_raise(float_flag_invalid, status);
6923 6924 6925 6926 6927 6928 6929 6930 6931 6932 6933 6934 6935 6936 6937 6938 6939 6940 6941 6942 6943 6944 6945
        }
        return float_relation_unordered;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {

        if ( ( ( (uint16_t) ( ( a.high | b.high ) << 1 ) ) == 0) &&
             ( ( a.low | b.low ) == 0 ) ) {
            /* zero case */
            return float_relation_equal;
        } else {
            return 1 - (2 * aSign);
        }
    } else {
        if (a.low == b.low && a.high == b.high) {
            return float_relation_equal;
        } else {
            return 1 - 2 * (aSign ^ ( lt128( a.high, a.low, b.high, b.low ) ));
        }
    }
}

6946
int floatx80_compare(floatx80 a, floatx80 b, float_status *status)
6947
{
6948
    return floatx80_compare_internal(a, b, 0, status);
6949 6950
}

6951
int floatx80_compare_quiet(floatx80 a, floatx80 b, float_status *status)
6952
{
6953
    return floatx80_compare_internal(a, b, 1, status);
6954 6955
}

6956 6957
static inline int float128_compare_internal(float128 a, float128 b,
                                            int is_quiet, float_status *status)
6958 6959 6960 6961 6962 6963 6964 6965
{
    flag aSign, bSign;

    if (( ( extractFloat128Exp( a ) == 0x7fff ) &&
          ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) ) ||
        ( ( extractFloat128Exp( b ) == 0x7fff ) &&
          ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )) {
        if (!is_quiet ||
6966 6967
            float128_is_signaling_nan(a, status) ||
            float128_is_signaling_nan(b, status)) {
6968
            float_raise(float_flag_invalid, status);
6969 6970 6971 6972 6973 6974 6975 6976 6977 6978 6979 6980 6981 6982 6983 6984 6985 6986 6987 6988 6989
        }
        return float_relation_unordered;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        if ( ( ( ( a.high | b.high )<<1 ) | a.low | b.low ) == 0 ) {
            /* zero case */
            return float_relation_equal;
        } else {
            return 1 - (2 * aSign);
        }
    } else {
        if (a.low == b.low && a.high == b.high) {
            return float_relation_equal;
        } else {
            return 1 - 2 * (aSign ^ ( lt128( a.high, a.low, b.high, b.low ) ));
        }
    }
}

6990
int float128_compare(float128 a, float128 b, float_status *status)
6991
{
6992
    return float128_compare_internal(a, b, 0, status);
6993 6994
}

6995
int float128_compare_quiet(float128 a, float128 b, float_status *status)
6996
{
6997
    return float128_compare_internal(a, b, 1, status);
6998 6999
}

7000
floatx80 floatx80_scalbn(floatx80 a, int n, float_status *status)
P
pbrook 已提交
7001 7002
{
    flag aSign;
7003
    int32_t aExp;
7004
    uint64_t aSig;
P
pbrook 已提交
7005

7006 7007 7008 7009
    if (floatx80_invalid_encoding(a)) {
        float_raise(float_flag_invalid, status);
        return floatx80_default_nan(status);
    }
P
pbrook 已提交
7010 7011 7012 7013
    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );

7014 7015
    if ( aExp == 0x7FFF ) {
        if ( aSig<<1 ) {
7016
            return propagateFloatx80NaN(a, a, status);
7017
        }
P
pbrook 已提交
7018 7019
        return a;
    }
7020

7021 7022 7023 7024 7025 7026
    if (aExp == 0) {
        if (aSig == 0) {
            return a;
        }
        aExp++;
    }
7027

7028 7029 7030 7031 7032 7033
    if (n > 0x10000) {
        n = 0x10000;
    } else if (n < -0x10000) {
        n = -0x10000;
    }

P
pbrook 已提交
7034
    aExp += n;
7035 7036
    return normalizeRoundAndPackFloatx80(status->floatx80_rounding_precision,
                                         aSign, aExp, aSig, 0, status);
P
pbrook 已提交
7037 7038
}

7039
float128 float128_scalbn(float128 a, int n, float_status *status)
P
pbrook 已提交
7040 7041
{
    flag aSign;
7042
    int32_t aExp;
7043
    uint64_t aSig0, aSig1;
P
pbrook 已提交
7044 7045 7046 7047 7048 7049

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
7050
        if ( aSig0 | aSig1 ) {
7051
            return propagateFloat128NaN(a, a, status);
7052
        }
P
pbrook 已提交
7053 7054
        return a;
    }
7055
    if (aExp != 0) {
7056
        aSig0 |= LIT64( 0x0001000000000000 );
7057
    } else if (aSig0 == 0 && aSig1 == 0) {
7058
        return a;
7059 7060 7061
    } else {
        aExp++;
    }
7062

7063 7064 7065 7066 7067 7068
    if (n > 0x10000) {
        n = 0x10000;
    } else if (n < -0x10000) {
        n = -0x10000;
    }

7069 7070
    aExp += n - 1;
    return normalizeRoundAndPackFloat128( aSign, aExp, aSig0, aSig1
7071
                                         , status);
P
pbrook 已提交
7072 7073

}
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