spapr.c 61.1 KB
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/*
 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
 *
 * Copyright (c) 2004-2007 Fabrice Bellard
 * Copyright (c) 2007 Jocelyn Mayer
 * Copyright (c) 2010 David Gibson, IBM Corporation.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 *
 */
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#include "sysemu/sysemu.h"
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#include "sysemu/numa.h"
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#include "hw/hw.h"
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#include "hw/fw-path-provider.h"
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#include "elf.h"
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#include "net/net.h"
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#include "sysemu/block-backend.h"
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#include "sysemu/cpus.h"
#include "sysemu/kvm.h"
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#include "kvm_ppc.h"
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#include "migration/migration.h"
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#include "mmu-hash64.h"
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#include "qom/cpu.h"
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#include "hw/boards.h"
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#include "hw/ppc/ppc.h"
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#include "hw/loader.h"

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#include "hw/ppc/spapr.h"
#include "hw/ppc/spapr_vio.h"
#include "hw/pci-host/spapr.h"
#include "hw/ppc/xics.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/pci.h"
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#include "hw/scsi/scsi.h"
#include "hw/virtio/virtio-scsi.h"
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#include "exec/address-spaces.h"
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#include "hw/usb.h"
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#include "qemu/config-file.h"
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#include "qemu/error-report.h"
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#include "trace.h"
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#include "hw/nmi.h"
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#include "hw/compat.h"

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#include <libfdt.h>

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/* SLOF memory layout:
 *
 * SLOF raw image loaded at 0, copies its romfs right below the flat
 * device-tree, then position SLOF itself 31M below that
 *
 * So we set FW_OVERHEAD to 40MB which should account for all of that
 * and more
 *
 * We load our kernel at 4M, leaving space for SLOF initial image
 */
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#define FDT_MAX_SIZE            0x40000
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#define RTAS_MAX_SIZE           0x10000
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#define RTAS_MAX_ADDR           0x80000000 /* RTAS must stay below that */
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#define FW_MAX_SIZE             0x400000
#define FW_FILE_NAME            "slof.bin"
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#define FW_OVERHEAD             0x2800000
#define KERNEL_LOAD_ADDR        FW_MAX_SIZE
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#define MIN_RMA_SLOF            128UL
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#define TIMEBASE_FREQ           512000000ULL

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#define MAX_CPUS                255
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#define PHANDLE_XICP            0x00001111

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#define HTAB_SIZE(spapr)        (1ULL << ((spapr)->htab_shift))

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static XICSState *try_create_xics(const char *type, int nr_servers,
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                                  int nr_irqs, Error **errp)
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{
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    Error *err = NULL;
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    DeviceState *dev;

    dev = qdev_create(NULL, type);
    qdev_prop_set_uint32(dev, "nr_servers", nr_servers);
    qdev_prop_set_uint32(dev, "nr_irqs", nr_irqs);
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    object_property_set_bool(OBJECT(dev), true, "realized", &err);
    if (err) {
        error_propagate(errp, err);
        object_unparent(OBJECT(dev));
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        return NULL;
    }
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    return XICS_COMMON(dev);
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}

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static XICSState *xics_system_init(MachineState *machine,
                                   int nr_servers, int nr_irqs)
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{
    XICSState *icp = NULL;

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    if (kvm_enabled()) {
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        Error *err = NULL;

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        if (machine_kernel_irqchip_allowed(machine)) {
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            icp = try_create_xics(TYPE_KVM_XICS, nr_servers, nr_irqs, &err);
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        }
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        if (machine_kernel_irqchip_required(machine) && !icp) {
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            error_report("kernel_irqchip requested but unavailable: %s",
                         error_get_pretty(err));
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        }
    }

    if (!icp) {
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        icp = try_create_xics(TYPE_XICS, nr_servers, nr_irqs, &error_abort);
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    }

    return icp;
}

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static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu,
                                  int smt_threads)
{
    int i, ret = 0;
    uint32_t servers_prop[smt_threads];
    uint32_t gservers_prop[smt_threads * 2];
    int index = ppc_get_vcpu_dt_id(cpu);

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    if (cpu->cpu_version) {
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        ret = fdt_setprop_cell(fdt, offset, "cpu-version", cpu->cpu_version);
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        if (ret < 0) {
            return ret;
        }
    }

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    /* Build interrupt servers and gservers properties */
    for (i = 0; i < smt_threads; i++) {
        servers_prop[i] = cpu_to_be32(index + i);
        /* Hack, direct the group queues back to cpu 0 */
        gservers_prop[i*2] = cpu_to_be32(index + i);
        gservers_prop[i*2 + 1] = 0;
    }
    ret = fdt_setprop(fdt, offset, "ibm,ppc-interrupt-server#s",
                      servers_prop, sizeof(servers_prop));
    if (ret < 0) {
        return ret;
    }
    ret = fdt_setprop(fdt, offset, "ibm,ppc-interrupt-gserver#s",
                      gservers_prop, sizeof(gservers_prop));

    return ret;
}

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static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, CPUState *cs)
{
    int ret = 0;
    PowerPCCPU *cpu = POWERPC_CPU(cs);
    int index = ppc_get_vcpu_dt_id(cpu);
    uint32_t associativity[] = {cpu_to_be32(0x5),
                                cpu_to_be32(0x0),
                                cpu_to_be32(0x0),
                                cpu_to_be32(0x0),
                                cpu_to_be32(cs->numa_node),
                                cpu_to_be32(index)};

    /* Advertise NUMA via ibm,associativity */
    if (nb_numa_nodes > 1) {
        ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
                          sizeof(associativity));
    }

    return ret;
}

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static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineState *spapr)
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{
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    int ret = 0, offset, cpus_offset;
    CPUState *cs;
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    char cpu_model[32];
    int smt = kvmppc_smt_threads();
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    uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
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    CPU_FOREACH(cs) {
        PowerPCCPU *cpu = POWERPC_CPU(cs);
        DeviceClass *dc = DEVICE_GET_CLASS(cs);
        int index = ppc_get_vcpu_dt_id(cpu);
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        if ((index % smt) != 0) {
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            continue;
        }

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        snprintf(cpu_model, 32, "%s@%x", dc->fw_name, index);
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        cpus_offset = fdt_path_offset(fdt, "/cpus");
        if (cpus_offset < 0) {
            cpus_offset = fdt_add_subnode(fdt, fdt_path_offset(fdt, "/"),
                                          "cpus");
            if (cpus_offset < 0) {
                return cpus_offset;
            }
        }
        offset = fdt_subnode_offset(fdt, cpus_offset, cpu_model);
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        if (offset < 0) {
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            offset = fdt_add_subnode(fdt, cpus_offset, cpu_model);
            if (offset < 0) {
                return offset;
            }
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        }

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        ret = fdt_setprop(fdt, offset, "ibm,pft-size",
                          pft_size_prop, sizeof(pft_size_prop));
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        if (ret < 0) {
            return ret;
        }
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        ret = spapr_fixup_cpu_numa_dt(fdt, offset, cs);
        if (ret < 0) {
            return ret;
        }

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        ret = spapr_fixup_cpu_smt_dt(fdt, offset, cpu,
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                                     ppc_get_compat_smt_threads(cpu));
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        if (ret < 0) {
            return ret;
        }
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    }
    return ret;
}

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static size_t create_page_sizes_prop(CPUPPCState *env, uint32_t *prop,
                                     size_t maxsize)
{
    size_t maxcells = maxsize / sizeof(uint32_t);
    int i, j, count;
    uint32_t *p = prop;

    for (i = 0; i < PPC_PAGE_SIZES_MAX_SZ; i++) {
        struct ppc_one_seg_page_size *sps = &env->sps.sps[i];

        if (!sps->page_shift) {
            break;
        }
        for (count = 0; count < PPC_PAGE_SIZES_MAX_SZ; count++) {
            if (sps->enc[count].page_shift == 0) {
                break;
            }
        }
        if ((p - prop) >= (maxcells - 3 - count * 2)) {
            break;
        }
        *(p++) = cpu_to_be32(sps->page_shift);
        *(p++) = cpu_to_be32(sps->slb_enc);
        *(p++) = cpu_to_be32(count);
        for (j = 0; j < count; j++) {
            *(p++) = cpu_to_be32(sps->enc[j].page_shift);
            *(p++) = cpu_to_be32(sps->enc[j].pte_enc);
        }
    }

    return (p - prop) * sizeof(uint32_t);
}

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static hwaddr spapr_node0_size(void)
{
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    MachineState *machine = MACHINE(qdev_get_machine());

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    if (nb_numa_nodes) {
        int i;
        for (i = 0; i < nb_numa_nodes; ++i) {
            if (numa_info[i].node_mem) {
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                return MIN(pow2floor(numa_info[i].node_mem),
                           machine->ram_size);
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            }
        }
    }
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    return machine->ram_size;
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}

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#define _FDT(exp) \
    do { \
        int ret = (exp);                                           \
        if (ret < 0) {                                             \
            fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
                    #exp, fdt_strerror(ret));                      \
            exit(1);                                               \
        }                                                          \
    } while (0)

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static void add_str(GString *s, const gchar *s1)
{
    g_string_append_len(s, s1, strlen(s1) + 1);
}
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static void *spapr_create_fdt_skel(hwaddr initrd_base,
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                                   hwaddr initrd_size,
                                   hwaddr kernel_size,
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                                   bool little_endian,
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                                   const char *kernel_cmdline,
                                   uint32_t epow_irq)
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{
    void *fdt;
    uint32_t start_prop = cpu_to_be32(initrd_base);
    uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
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    GString *hypertas = g_string_sized_new(256);
    GString *qemu_hypertas = g_string_sized_new(256);
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    uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
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    uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(max_cpus)};
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    unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
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    char *buf;
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    add_str(hypertas, "hcall-pft");
    add_str(hypertas, "hcall-term");
    add_str(hypertas, "hcall-dabr");
    add_str(hypertas, "hcall-interrupt");
    add_str(hypertas, "hcall-tce");
    add_str(hypertas, "hcall-vio");
    add_str(hypertas, "hcall-splpar");
    add_str(hypertas, "hcall-bulk");
    add_str(hypertas, "hcall-set-mode");
    add_str(qemu_hypertas, "hcall-memop1");

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    fdt = g_malloc0(FDT_MAX_SIZE);
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    _FDT((fdt_create(fdt, FDT_MAX_SIZE)));

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    if (kernel_size) {
        _FDT((fdt_add_reservemap_entry(fdt, KERNEL_LOAD_ADDR, kernel_size)));
    }
    if (initrd_size) {
        _FDT((fdt_add_reservemap_entry(fdt, initrd_base, initrd_size)));
    }
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    _FDT((fdt_finish_reservemap(fdt)));

    /* Root node */
    _FDT((fdt_begin_node(fdt, "")));
    _FDT((fdt_property_string(fdt, "device_type", "chrp")));
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    _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)")));
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    _FDT((fdt_property_string(fdt, "compatible", "qemu,pseries")));
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    /*
     * Add info to guest to indentify which host is it being run on
     * and what is the uuid of the guest
     */
    if (kvmppc_get_host_model(&buf)) {
        _FDT((fdt_property_string(fdt, "host-model", buf)));
        g_free(buf);
    }
    if (kvmppc_get_host_serial(&buf)) {
        _FDT((fdt_property_string(fdt, "host-serial", buf)));
        g_free(buf);
    }

    buf = g_strdup_printf(UUID_FMT, qemu_uuid[0], qemu_uuid[1],
                          qemu_uuid[2], qemu_uuid[3], qemu_uuid[4],
                          qemu_uuid[5], qemu_uuid[6], qemu_uuid[7],
                          qemu_uuid[8], qemu_uuid[9], qemu_uuid[10],
                          qemu_uuid[11], qemu_uuid[12], qemu_uuid[13],
                          qemu_uuid[14], qemu_uuid[15]);

    _FDT((fdt_property_string(fdt, "vm,uuid", buf)));
    g_free(buf);

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    if (qemu_get_vm_name()) {
        _FDT((fdt_property_string(fdt, "ibm,partition-name",
                                  qemu_get_vm_name())));
    }

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    _FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
    _FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));

    /* /chosen */
    _FDT((fdt_begin_node(fdt, "chosen")));

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    /* Set Form1_affinity */
    _FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5))));

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    _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
    _FDT((fdt_property(fdt, "linux,initrd-start",
                       &start_prop, sizeof(start_prop))));
    _FDT((fdt_property(fdt, "linux,initrd-end",
                       &end_prop, sizeof(end_prop))));
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    if (kernel_size) {
        uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
                              cpu_to_be64(kernel_size) };
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        _FDT((fdt_property(fdt, "qemu,boot-kernel", &kprop, sizeof(kprop))));
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        if (little_endian) {
            _FDT((fdt_property(fdt, "qemu,boot-kernel-le", NULL, 0)));
        }
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    }
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    if (boot_menu) {
        _FDT((fdt_property_cell(fdt, "qemu,boot-menu", boot_menu)));
    }
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    _FDT((fdt_property_cell(fdt, "qemu,graphic-width", graphic_width)));
    _FDT((fdt_property_cell(fdt, "qemu,graphic-height", graphic_height)));
    _FDT((fdt_property_cell(fdt, "qemu,graphic-depth", graphic_depth)));
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    _FDT((fdt_end_node(fdt)));

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    /* RTAS */
    _FDT((fdt_begin_node(fdt, "rtas")));

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    if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
        add_str(hypertas, "hcall-multi-tce");
    }
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    _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas->str,
                       hypertas->len)));
    g_string_free(hypertas, TRUE);
    _FDT((fdt_property(fdt, "qemu,hypertas-functions", qemu_hypertas->str,
                       qemu_hypertas->len)));
    g_string_free(qemu_hypertas, TRUE);
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    _FDT((fdt_property(fdt, "ibm,associativity-reference-points",
        refpoints, sizeof(refpoints))));

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    _FDT((fdt_property_cell(fdt, "rtas-error-log-max", RTAS_ERROR_LOG_MAX)));
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    _FDT((fdt_property_cell(fdt, "rtas-event-scan-rate",
                            RTAS_EVENT_SCAN_RATE)));
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    /*
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     * According to PAPR, rtas ibm,os-term does not guarantee a return
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     * back to the guest cpu.
     *
     * While an additional ibm,extended-os-term property indicates that
     * rtas call return will always occur. Set this property.
     */
    _FDT((fdt_property(fdt, "ibm,extended-os-term", NULL, 0)));

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    _FDT((fdt_end_node(fdt)));

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    /* interrupt controller */
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    _FDT((fdt_begin_node(fdt, "interrupt-controller")));
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    _FDT((fdt_property_string(fdt, "device_type",
                              "PowerPC-External-Interrupt-Presentation")));
    _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp")));
    _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
    _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
                       interrupt_server_ranges_prop,
                       sizeof(interrupt_server_ranges_prop))));
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    _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2)));
    _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
    _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
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    _FDT((fdt_end_node(fdt)));

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    /* vdevice */
    _FDT((fdt_begin_node(fdt, "vdevice")));

    _FDT((fdt_property_string(fdt, "device_type", "vdevice")));
    _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
    _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
    _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
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    _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2)));
    _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
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    _FDT((fdt_end_node(fdt)));

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    /* event-sources */
    spapr_events_fdt_skel(fdt, epow_irq);

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    /* /hypervisor node */
    if (kvm_enabled()) {
        uint8_t hypercall[16];

        /* indicate KVM hypercall interface */
        _FDT((fdt_begin_node(fdt, "hypervisor")));
        _FDT((fdt_property_string(fdt, "compatible", "linux,kvm")));
        if (kvmppc_has_cap_fixup_hcalls()) {
            /*
             * Older KVM versions with older guest kernels were broken with the
             * magic page, don't allow the guest to map it.
             */
            kvmppc_get_hypercall(first_cpu->env_ptr, hypercall,
                                 sizeof(hypercall));
            _FDT((fdt_property(fdt, "hcall-instructions", hypercall,
                              sizeof(hypercall))));
        }
        _FDT((fdt_end_node(fdt)));
    }

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    _FDT((fdt_end_node(fdt))); /* close root node */
    _FDT((fdt_finish(fdt)));

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    return fdt;
}

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int spapr_h_cas_compose_response(sPAPRMachineState *spapr,
                                 target_ulong addr, target_ulong size)
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{
    void *fdt, *fdt_skel;
    sPAPRDeviceTreeUpdateHeader hdr = { .version_id = 1 };

    size -= sizeof(hdr);

    /* Create sceleton */
    fdt_skel = g_malloc0(size);
    _FDT((fdt_create(fdt_skel, size)));
    _FDT((fdt_begin_node(fdt_skel, "")));
    _FDT((fdt_end_node(fdt_skel)));
    _FDT((fdt_finish(fdt_skel)));
    fdt = g_malloc0(size);
    _FDT((fdt_open_into(fdt_skel, fdt, size)));
    g_free(fdt_skel);

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    /* Fix skeleton up */
    _FDT((spapr_fixup_cpu_dt(fdt, spapr)));
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    /* Pack resulting tree */
    _FDT((fdt_pack(fdt)));

    if (fdt_totalsize(fdt) + sizeof(hdr) > size) {
        trace_spapr_cas_failed(size);
        return -1;
    }

    cpu_physical_memory_write(addr, &hdr, sizeof(hdr));
    cpu_physical_memory_write(addr + sizeof(hdr), fdt, fdt_totalsize(fdt));
    trace_spapr_cas_continue(fdt_totalsize(fdt) + sizeof(hdr));
    g_free(fdt);

    return 0;
}

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static void spapr_populate_memory_node(void *fdt, int nodeid, hwaddr start,
                                       hwaddr size)
{
    uint32_t associativity[] = {
        cpu_to_be32(0x4), /* length */
        cpu_to_be32(0x0), cpu_to_be32(0x0),
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        cpu_to_be32(0x0), cpu_to_be32(nodeid)
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    };
    char mem_name[32];
    uint64_t mem_reg_property[2];
    int off;

    mem_reg_property[0] = cpu_to_be64(start);
    mem_reg_property[1] = cpu_to_be64(size);

    sprintf(mem_name, "memory@" TARGET_FMT_lx, start);
    off = fdt_add_subnode(fdt, 0, mem_name);
    _FDT(off);
    _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
    _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
                      sizeof(mem_reg_property))));
    _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
                      sizeof(associativity))));
}

565
static int spapr_populate_memory(sPAPRMachineState *spapr, void *fdt)
566
{
567
    MachineState *machine = MACHINE(spapr);
568 569 570 571 572 573 574 575
    hwaddr mem_start, node_size;
    int i, nb_nodes = nb_numa_nodes;
    NodeInfo *nodes = numa_info;
    NodeInfo ramnode;

    /* No NUMA nodes, assume there is just one node with whole RAM */
    if (!nb_numa_nodes) {
        nb_nodes = 1;
576
        ramnode.node_mem = machine->ram_size;
577
        nodes = &ramnode;
578
    }
579

580 581 582 583
    for (i = 0, mem_start = 0; i < nb_nodes; ++i) {
        if (!nodes[i].node_mem) {
            continue;
        }
584
        if (mem_start >= machine->ram_size) {
585 586
            node_size = 0;
        } else {
587
            node_size = nodes[i].node_mem;
588 589
            if (node_size > machine->ram_size - mem_start) {
                node_size = machine->ram_size - mem_start;
590 591
            }
        }
592 593 594 595 596 597
        if (!mem_start) {
            /* ppc_spapr_init() checks for rma_size <= node0_size already */
            spapr_populate_memory_node(fdt, i, 0, spapr->rma_size);
            mem_start += spapr->rma_size;
            node_size -= spapr->rma_size;
        }
598 599 600 601 602 603 604 605 606 607 608 609
        for ( ; node_size; ) {
            hwaddr sizetmp = pow2floor(node_size);

            /* mem_start != 0 here */
            if (ctzl(mem_start) < ctzl(sizetmp)) {
                sizetmp = 1ULL << ctzl(mem_start);
            }

            spapr_populate_memory_node(fdt, i, mem_start, sizetmp);
            node_size -= sizetmp;
            mem_start += sizetmp;
        }
610 611 612 613 614
    }

    return 0;
}

615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745
static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
                                  sPAPRMachineState *spapr)
{
    PowerPCCPU *cpu = POWERPC_CPU(cs);
    CPUPPCState *env = &cpu->env;
    PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
    int index = ppc_get_vcpu_dt_id(cpu);
    uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
                       0xffffffff, 0xffffffff};
    uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ;
    uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
    uint32_t page_sizes_prop[64];
    size_t page_sizes_prop_size;
    QemuOpts *opts = qemu_opts_find(qemu_find_opts("smp-opts"), NULL);
    unsigned sockets = opts ? qemu_opt_get_number(opts, "sockets", 0) : 0;
    uint32_t cpus_per_socket = sockets ? (smp_cpus / sockets) : 1;
    uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};

    _FDT((fdt_setprop_cell(fdt, offset, "reg", index)));
    _FDT((fdt_setprop_string(fdt, offset, "device_type", "cpu")));

    _FDT((fdt_setprop_cell(fdt, offset, "cpu-version", env->spr[SPR_PVR])));
    _FDT((fdt_setprop_cell(fdt, offset, "d-cache-block-size",
                           env->dcache_line_size)));
    _FDT((fdt_setprop_cell(fdt, offset, "d-cache-line-size",
                           env->dcache_line_size)));
    _FDT((fdt_setprop_cell(fdt, offset, "i-cache-block-size",
                           env->icache_line_size)));
    _FDT((fdt_setprop_cell(fdt, offset, "i-cache-line-size",
                           env->icache_line_size)));

    if (pcc->l1_dcache_size) {
        _FDT((fdt_setprop_cell(fdt, offset, "d-cache-size",
                               pcc->l1_dcache_size)));
    } else {
        fprintf(stderr, "Warning: Unknown L1 dcache size for cpu\n");
    }
    if (pcc->l1_icache_size) {
        _FDT((fdt_setprop_cell(fdt, offset, "i-cache-size",
                               pcc->l1_icache_size)));
    } else {
        fprintf(stderr, "Warning: Unknown L1 icache size for cpu\n");
    }

    _FDT((fdt_setprop_cell(fdt, offset, "timebase-frequency", tbfreq)));
    _FDT((fdt_setprop_cell(fdt, offset, "clock-frequency", cpufreq)));
    _FDT((fdt_setprop_cell(fdt, offset, "ibm,slb-size", env->slb_nr)));
    _FDT((fdt_setprop_string(fdt, offset, "status", "okay")));
    _FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0)));

    if (env->spr_cb[SPR_PURR].oea_read) {
        _FDT((fdt_setprop(fdt, offset, "ibm,purr", NULL, 0)));
    }

    if (env->mmu_model & POWERPC_MMU_1TSEG) {
        _FDT((fdt_setprop(fdt, offset, "ibm,processor-segment-sizes",
                          segs, sizeof(segs))));
    }

    /* Advertise VMX/VSX (vector extensions) if available
     *   0 / no property == no vector extensions
     *   1               == VMX / Altivec available
     *   2               == VSX available */
    if (env->insns_flags & PPC_ALTIVEC) {
        uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1;

        _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", vmx)));
    }

    /* Advertise DFP (Decimal Floating Point) if available
     *   0 / no property == no DFP
     *   1               == DFP available */
    if (env->insns_flags2 & PPC2_DFP) {
        _FDT((fdt_setprop_cell(fdt, offset, "ibm,dfp", 1)));
    }

    page_sizes_prop_size = create_page_sizes_prop(env, page_sizes_prop,
                                                  sizeof(page_sizes_prop));
    if (page_sizes_prop_size) {
        _FDT((fdt_setprop(fdt, offset, "ibm,segment-page-sizes",
                          page_sizes_prop, page_sizes_prop_size)));
    }

    _FDT((fdt_setprop_cell(fdt, offset, "ibm,chip-id",
                           cs->cpu_index / cpus_per_socket)));

    _FDT((fdt_setprop(fdt, offset, "ibm,pft-size",
                      pft_size_prop, sizeof(pft_size_prop))));

    _FDT(spapr_fixup_cpu_numa_dt(fdt, offset, cs));

    _FDT(spapr_fixup_cpu_smt_dt(fdt, offset, cpu,
                                ppc_get_compat_smt_threads(cpu)));
}

static void spapr_populate_cpus_dt_node(void *fdt, sPAPRMachineState *spapr)
{
    CPUState *cs;
    int cpus_offset;
    char *nodename;
    int smt = kvmppc_smt_threads();

    cpus_offset = fdt_add_subnode(fdt, 0, "cpus");
    _FDT(cpus_offset);
    _FDT((fdt_setprop_cell(fdt, cpus_offset, "#address-cells", 0x1)));
    _FDT((fdt_setprop_cell(fdt, cpus_offset, "#size-cells", 0x0)));

    /*
     * We walk the CPUs in reverse order to ensure that CPU DT nodes
     * created by fdt_add_subnode() end up in the right order in FDT
     * for the guest kernel the enumerate the CPUs correctly.
     */
    CPU_FOREACH_REVERSE(cs) {
        PowerPCCPU *cpu = POWERPC_CPU(cs);
        int index = ppc_get_vcpu_dt_id(cpu);
        DeviceClass *dc = DEVICE_GET_CLASS(cs);
        int offset;

        if ((index % smt) != 0) {
            continue;
        }

        nodename = g_strdup_printf("%s@%x", dc->fw_name, index);
        offset = fdt_add_subnode(fdt, cpus_offset, nodename);
        g_free(nodename);
        _FDT(offset);
        spapr_populate_cpu_dt(cs, fdt, offset, spapr);
    }

}

746
static void spapr_finalize_fdt(sPAPRMachineState *spapr,
A
Avi Kivity 已提交
747 748 749
                               hwaddr fdt_addr,
                               hwaddr rtas_addr,
                               hwaddr rtas_size)
750
{
751 752
    MachineState *machine = MACHINE(qdev_get_machine());
    const char *boot_device = machine->boot_order;
753 754 755
    int ret, i;
    size_t cb = 0;
    char *bootlist;
756
    void *fdt;
757
    sPAPRPHBState *phb;
758

759
    fdt = g_malloc(FDT_MAX_SIZE);
760 761 762

    /* open out the base tree into a temp buffer for the final tweaks */
    _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE)));
763

764 765 766 767 768 769
    ret = spapr_populate_memory(spapr, fdt);
    if (ret < 0) {
        fprintf(stderr, "couldn't setup memory nodes in fdt\n");
        exit(1);
    }

770 771 772 773 774 775
    ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
    if (ret < 0) {
        fprintf(stderr, "couldn't setup vio devices in fdt\n");
        exit(1);
    }

776
    QLIST_FOREACH(phb, &spapr->phbs, list) {
777
        ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt);
778 779 780 781 782 783 784
    }

    if (ret < 0) {
        fprintf(stderr, "couldn't setup PCI devices in fdt\n");
        exit(1);
    }

785 786 787 788 789 790
    /* RTAS */
    ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
    if (ret < 0) {
        fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
    }

791 792
    /* cpus */
    spapr_populate_cpus_dt_node(fdt, spapr);
793

794 795 796 797 798 799 800 801 802 803 804 805 806 807 808
    bootlist = get_boot_devices_list(&cb, true);
    if (cb && bootlist) {
        int offset = fdt_path_offset(fdt, "/chosen");
        if (offset < 0) {
            exit(1);
        }
        for (i = 0; i < cb; i++) {
            if (bootlist[i] == '\n') {
                bootlist[i] = ' ';
            }

        }
        ret = fdt_setprop_string(fdt, offset, "qemu,boot-list", bootlist);
    }

809 810 811 812 813 814 815 816 817
    if (boot_device && strlen(boot_device)) {
        int offset = fdt_path_offset(fdt, "/chosen");

        if (offset < 0) {
            exit(1);
        }
        fdt_setprop_string(fdt, offset, "qemu,boot-device", boot_device);
    }

818
    if (!spapr->has_graphics) {
819 820
        spapr_populate_chosen_stdout(fdt, spapr->vio_bus);
    }
821

822 823
    _FDT((fdt_pack(fdt)));

824
    if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
825 826
        error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
                     fdt_totalsize(fdt), FDT_MAX_SIZE);
827 828 829
        exit(1);
    }

830
    cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
831

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Gonglei 已提交
832
    g_free(bootlist);
833
    g_free(fdt);
834 835 836 837 838 839 840
}

static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
{
    return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
}

841
static void emulate_spapr_hypercall(PowerPCCPU *cpu)
842
{
843 844
    CPUPPCState *env = &cpu->env;

845 846 847 848
    if (msr_pr) {
        hcall_dprintf("Hypercall made with MSR[PR]=1\n");
        env->gpr[3] = H_PRIVILEGE;
    } else {
849
        env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]);
850
    }
851 852
}

853 854 855 856 857 858
#define HPTE(_table, _i)   (void *)(((uint64_t *)(_table)) + ((_i) * 2))
#define HPTE_VALID(_hpte)  (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
#define HPTE_DIRTY(_hpte)  (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
#define CLEAN_HPTE(_hpte)  ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
#define DIRTY_HPTE(_hpte)  ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))

859
static void spapr_reset_htab(sPAPRMachineState *spapr)
860 861
{
    long shift;
862
    int index;
863 864 865 866 867 868 869 870 871 872

    /* allocate hash page table.  For now we always make this 16mb,
     * later we should probably make it scale to the size of guest
     * RAM */

    shift = kvmppc_reset_htab(spapr->htab_shift);

    if (shift > 0) {
        /* Kernel handles htab, we don't need to allocate one */
        spapr->htab_shift = shift;
873
        kvmppc_kern_htab = true;
874 875 876 877 878

        /* Tell readers to update their file descriptor */
        if (spapr->htab_fd >= 0) {
            spapr->htab_fd_stale = true;
        }
879 880 881 882 883 884 885 886
    } else {
        if (!spapr->htab) {
            /* Allocate an htab if we don't yet have one */
            spapr->htab = qemu_memalign(HTAB_SIZE(spapr), HTAB_SIZE(spapr));
        }

        /* And clear it */
        memset(spapr->htab, 0, HTAB_SIZE(spapr));
887 888 889 890

        for (index = 0; index < HTAB_SIZE(spapr) / HASH_PTE_SIZE_64; index++) {
            DIRTY_HPTE(HPTE(spapr->htab, index));
        }
891 892 893 894
    }

    /* Update the RMA size if necessary */
    if (spapr->vrma_adjust) {
895 896
        spapr->rma_size = kvmppc_rma_size(spapr_node0_size(),
                                          spapr->htab_shift);
897
    }
898 899
}

900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916
static int find_unknown_sysbus_device(SysBusDevice *sbdev, void *opaque)
{
    bool matched = false;

    if (object_dynamic_cast(OBJECT(sbdev), TYPE_SPAPR_PCI_HOST_BRIDGE)) {
        matched = true;
    }

    if (!matched) {
        error_report("Device %s is not supported by this machine yet.",
                     qdev_fw_name(DEVICE(sbdev)));
        exit(1);
    }

    return 0;
}

917 918 919 920
/*
 * A guest reset will cause spapr->htab_fd to become stale if being used.
 * Reopen the file descriptor to make sure the whole HTAB is properly read.
 */
921
static int spapr_check_htab_fd(sPAPRMachineState *spapr)
922 923 924 925 926 927 928 929
{
    int rc = 0;

    if (spapr->htab_fd_stale) {
        close(spapr->htab_fd);
        spapr->htab_fd = kvmppc_get_htab_fd(false);
        if (spapr->htab_fd < 0) {
            error_report("Unable to open fd for reading hash table from KVM: "
930
                         "%s", strerror(errno));
931 932 933 934 935 936 937 938
            rc = -1;
        }
        spapr->htab_fd_stale = false;
    }

    return rc;
}

939
static void ppc_spapr_reset(void)
940
{
941
    sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
942
    PowerPCCPU *first_ppc_cpu;
943
    uint32_t rtas_limit;
944

945 946 947
    /* Check for unknown sysbus devices */
    foreach_dynamic_sysbus_device(find_unknown_sysbus_device, NULL);

948 949
    /* Reset the hash table & recalc the RMA */
    spapr_reset_htab(spapr);
950

951
    qemu_devices_reset();
952

953 954 955 956 957 958 959 960 961
    /*
     * We place the device tree and RTAS just below either the top of the RMA,
     * or just below 2GB, whichever is lowere, so that it can be
     * processed with 32-bit real mode code if necessary
     */
    rtas_limit = MIN(spapr->rma_size, RTAS_MAX_ADDR);
    spapr->rtas_addr = rtas_limit - RTAS_MAX_SIZE;
    spapr->fdt_addr = spapr->rtas_addr - FDT_MAX_SIZE;

962 963 964 965
    /* Load the fdt */
    spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr,
                       spapr->rtas_size);

966 967 968 969
    /* Copy RTAS over */
    cpu_physical_memory_write(spapr->rtas_addr, spapr->rtas_blob,
                              spapr->rtas_size);

970
    /* Set up the entry state */
971 972 973 974
    first_ppc_cpu = POWERPC_CPU(first_cpu);
    first_ppc_cpu->env.gpr[3] = spapr->fdt_addr;
    first_ppc_cpu->env.gpr[5] = 0;
    first_cpu->halted = 0;
975
    first_ppc_cpu->env.nip = SPAPR_ENTRY_POINT;
976 977 978

}

979 980
static void spapr_cpu_reset(void *opaque)
{
981
    sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
982
    PowerPCCPU *cpu = opaque;
983
    CPUState *cs = CPU(cpu);
984
    CPUPPCState *env = &cpu->env;
985

986
    cpu_reset(cs);
987 988 989 990

    /* All CPUs start halted.  CPU0 is unhalted from the machine level
     * reset code and the rest are explicitly started up by the guest
     * using an RTAS call */
991
    cs->halted = 1;
992 993

    env->spr[SPR_HIOR] = 0;
994

995
    env->external_htab = (uint8_t *)spapr->htab;
996 997 998 999 1000 1001 1002
    if (kvm_enabled() && !env->external_htab) {
        /*
         * HV KVM, set external_htab to 1 so our ppc_hash64_load_hpte*
         * functions do the right thing.
         */
        env->external_htab = (void *)1;
    }
1003
    env->htab_base = -1;
1004 1005 1006 1007 1008 1009
    /*
     * htab_mask is the mask used to normalize hash value to PTEG index.
     * htab_shift is log2 of hash table size.
     * We have 8 hpte per group, and each hpte is 16 bytes.
     * ie have 128 bytes per hpte entry.
     */
1010
    env->htab_mask = (1ULL << (spapr->htab_shift - 7)) - 1;
1011
    env->spr[SPR_SDR1] = (target_ulong)(uintptr_t)spapr->htab |
1012
        (spapr->htab_shift - 18);
1013 1014
}

1015
static void spapr_create_nvram(sPAPRMachineState *spapr)
D
David Gibson 已提交
1016
{
1017
    DeviceState *dev = qdev_create(&spapr->vio_bus->bus, "spapr-nvram");
P
Paolo Bonzini 已提交
1018
    DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0);
D
David Gibson 已提交
1019

P
Paolo Bonzini 已提交
1020
    if (dinfo) {
1021
        qdev_prop_set_drive_nofail(dev, "drive", blk_by_legacy_dinfo(dinfo));
D
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1022 1023 1024 1025 1026 1027 1028
    }

    qdev_init_nofail(dev);

    spapr->nvram = (struct sPAPRNVRAM *)dev;
}

1029
static void spapr_rtc_create(sPAPRMachineState *spapr)
1030 1031 1032 1033 1034
{
    DeviceState *dev = qdev_create(NULL, TYPE_SPAPR_RTC);

    qdev_init_nofail(dev);
    spapr->rtc = dev;
D
David Gibson 已提交
1035 1036 1037

    object_property_add_alias(qdev_get_machine(), "rtc-time",
                              OBJECT(spapr->rtc), "date", NULL);
1038 1039
}

1040
/* Returns whether we want to use VGA or not */
1041 1042
static int spapr_vga_init(PCIBus *pci_bus)
{
1043 1044
    switch (vga_interface_type) {
    case VGA_NONE:
1045 1046 1047
        return false;
    case VGA_DEVICE:
        return true;
1048 1049
    case VGA_STD:
        return pci_vga_init(pci_bus) != NULL;
1050
    default:
1051 1052
        fprintf(stderr, "This vga model is not supported,"
                "currently it only supports -vga std\n");
1053
        exit(0);
1054 1055 1056
    }
}

1057 1058
static int spapr_post_load(void *opaque, int version_id)
{
1059
    sPAPRMachineState *spapr = (sPAPRMachineState *)opaque;
1060 1061
    int err = 0;

S
Stefan Weil 已提交
1062
    /* In earlier versions, there was no separate qdev for the PAPR
1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077
     * RTC, so the RTC offset was stored directly in sPAPREnvironment.
     * So when migrating from those versions, poke the incoming offset
     * value into the RTC device */
    if (version_id < 3) {
        err = spapr_rtc_import_offset(spapr->rtc, spapr->rtc_offset);
    }

    return err;
}

static bool version_before_3(void *opaque, int version_id)
{
    return version_id < 3;
}

1078 1079
static const VMStateDescription vmstate_spapr = {
    .name = "spapr",
1080
    .version_id = 3,
1081
    .minimum_version_id = 1,
1082
    .post_load = spapr_post_load,
1083
    .fields = (VMStateField[]) {
1084 1085
        /* used to be @next_irq */
        VMSTATE_UNUSED_BUFFER(version_before_3, 0, 4),
1086 1087

        /* RTC offset */
1088
        VMSTATE_UINT64_TEST(rtc_offset, sPAPRMachineState, version_before_3),
1089

1090
        VMSTATE_PPC_TIMEBASE_V(tb, sPAPRMachineState, 2),
1091 1092 1093 1094 1095 1096
        VMSTATE_END_OF_LIST()
    },
};

static int htab_save_setup(QEMUFile *f, void *opaque)
{
1097
    sPAPRMachineState *spapr = opaque;
1098 1099 1100 1101

    /* "Iteration" header */
    qemu_put_be32(f, spapr->htab_shift);

1102 1103 1104 1105 1106 1107 1108
    if (spapr->htab) {
        spapr->htab_save_index = 0;
        spapr->htab_first_pass = true;
    } else {
        assert(kvm_enabled());

        spapr->htab_fd = kvmppc_get_htab_fd(false);
1109
        spapr->htab_fd_stale = false;
1110 1111 1112 1113 1114 1115 1116 1117
        if (spapr->htab_fd < 0) {
            fprintf(stderr, "Unable to open fd for reading hash table from KVM: %s\n",
                    strerror(errno));
            return -1;
        }
    }


1118 1119 1120
    return 0;
}

1121
static void htab_save_first_pass(QEMUFile *f, sPAPRMachineState *spapr,
1122 1123 1124 1125
                                 int64_t max_ns)
{
    int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64;
    int index = spapr->htab_save_index;
1126
    int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141

    assert(spapr->htab_first_pass);

    do {
        int chunkstart;

        /* Consume invalid HPTEs */
        while ((index < htabslots)
               && !HPTE_VALID(HPTE(spapr->htab, index))) {
            index++;
            CLEAN_HPTE(HPTE(spapr->htab, index));
        }

        /* Consume valid HPTEs */
        chunkstart = index;
1142
        while ((index < htabslots) && (index - chunkstart < USHRT_MAX)
1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156
               && HPTE_VALID(HPTE(spapr->htab, index))) {
            index++;
            CLEAN_HPTE(HPTE(spapr->htab, index));
        }

        if (index > chunkstart) {
            int n_valid = index - chunkstart;

            qemu_put_be32(f, chunkstart);
            qemu_put_be16(f, n_valid);
            qemu_put_be16(f, 0);
            qemu_put_buffer(f, HPTE(spapr->htab, chunkstart),
                            HASH_PTE_SIZE_64 * n_valid);

1157
            if ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) {
1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170
                break;
            }
        }
    } while ((index < htabslots) && !qemu_file_rate_limit(f));

    if (index >= htabslots) {
        assert(index == htabslots);
        index = 0;
        spapr->htab_first_pass = false;
    }
    spapr->htab_save_index = index;
}

1171
static int htab_save_later_pass(QEMUFile *f, sPAPRMachineState *spapr,
1172
                                int64_t max_ns)
1173 1174 1175 1176 1177
{
    bool final = max_ns < 0;
    int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64;
    int examined = 0, sent = 0;
    int index = spapr->htab_save_index;
1178
    int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193

    assert(!spapr->htab_first_pass);

    do {
        int chunkstart, invalidstart;

        /* Consume non-dirty HPTEs */
        while ((index < htabslots)
               && !HPTE_DIRTY(HPTE(spapr->htab, index))) {
            index++;
            examined++;
        }

        chunkstart = index;
        /* Consume valid dirty HPTEs */
1194
        while ((index < htabslots) && (index - chunkstart < USHRT_MAX)
1195 1196 1197 1198 1199 1200 1201 1202 1203
               && HPTE_DIRTY(HPTE(spapr->htab, index))
               && HPTE_VALID(HPTE(spapr->htab, index))) {
            CLEAN_HPTE(HPTE(spapr->htab, index));
            index++;
            examined++;
        }

        invalidstart = index;
        /* Consume invalid dirty HPTEs */
1204
        while ((index < htabslots) && (index - invalidstart < USHRT_MAX)
1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222
               && HPTE_DIRTY(HPTE(spapr->htab, index))
               && !HPTE_VALID(HPTE(spapr->htab, index))) {
            CLEAN_HPTE(HPTE(spapr->htab, index));
            index++;
            examined++;
        }

        if (index > chunkstart) {
            int n_valid = invalidstart - chunkstart;
            int n_invalid = index - invalidstart;

            qemu_put_be32(f, chunkstart);
            qemu_put_be16(f, n_valid);
            qemu_put_be16(f, n_invalid);
            qemu_put_buffer(f, HPTE(spapr->htab, chunkstart),
                            HASH_PTE_SIZE_64 * n_valid);
            sent += index - chunkstart;

1223
            if (!final && (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) {
1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244
                break;
            }
        }

        if (examined >= htabslots) {
            break;
        }

        if (index >= htabslots) {
            assert(index == htabslots);
            index = 0;
        }
    } while ((examined < htabslots) && (!qemu_file_rate_limit(f) || final));

    if (index >= htabslots) {
        assert(index == htabslots);
        index = 0;
    }

    spapr->htab_save_index = index;

1245
    return (examined >= htabslots) && (sent == 0) ? 1 : 0;
1246 1247
}

1248 1249 1250
#define MAX_ITERATION_NS    5000000 /* 5 ms */
#define MAX_KVM_BUF_SIZE    2048

1251 1252
static int htab_save_iterate(QEMUFile *f, void *opaque)
{
1253
    sPAPRMachineState *spapr = opaque;
1254
    int rc = 0;
1255 1256 1257 1258

    /* Iteration header */
    qemu_put_be32(f, 0);

1259 1260 1261
    if (!spapr->htab) {
        assert(kvm_enabled());

1262 1263 1264 1265 1266
        rc = spapr_check_htab_fd(spapr);
        if (rc < 0) {
            return rc;
        }

1267 1268 1269 1270 1271 1272
        rc = kvmppc_save_htab(f, spapr->htab_fd,
                              MAX_KVM_BUF_SIZE, MAX_ITERATION_NS);
        if (rc < 0) {
            return rc;
        }
    } else  if (spapr->htab_first_pass) {
1273 1274
        htab_save_first_pass(f, spapr, MAX_ITERATION_NS);
    } else {
1275
        rc = htab_save_later_pass(f, spapr, MAX_ITERATION_NS);
1276 1277 1278 1279 1280 1281 1282
    }

    /* End marker */
    qemu_put_be32(f, 0);
    qemu_put_be16(f, 0);
    qemu_put_be16(f, 0);

1283
    return rc;
1284 1285 1286 1287
}

static int htab_save_complete(QEMUFile *f, void *opaque)
{
1288
    sPAPRMachineState *spapr = opaque;
1289 1290 1291 1292

    /* Iteration header */
    qemu_put_be32(f, 0);

1293 1294 1295 1296 1297
    if (!spapr->htab) {
        int rc;

        assert(kvm_enabled());

1298 1299 1300 1301 1302
        rc = spapr_check_htab_fd(spapr);
        if (rc < 0) {
            return rc;
        }

1303 1304 1305 1306 1307 1308 1309 1310 1311
        rc = kvmppc_save_htab(f, spapr->htab_fd, MAX_KVM_BUF_SIZE, -1);
        if (rc < 0) {
            return rc;
        }
        close(spapr->htab_fd);
        spapr->htab_fd = -1;
    } else {
        htab_save_later_pass(f, spapr, -1);
    }
1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322

    /* End marker */
    qemu_put_be32(f, 0);
    qemu_put_be16(f, 0);
    qemu_put_be16(f, 0);

    return 0;
}

static int htab_load(QEMUFile *f, void *opaque, int version_id)
{
1323
    sPAPRMachineState *spapr = opaque;
1324
    uint32_t section_hdr;
1325
    int fd = -1;
1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336

    if (version_id < 1 || version_id > 1) {
        fprintf(stderr, "htab_load() bad version\n");
        return -EINVAL;
    }

    section_hdr = qemu_get_be32(f);

    if (section_hdr) {
        /* First section, just the hash shift */
        if (spapr->htab_shift != section_hdr) {
1337 1338
            error_report("htab_shift mismatch: source %d target %d",
                         section_hdr, spapr->htab_shift);
1339 1340 1341 1342 1343
            return -EINVAL;
        }
        return 0;
    }

1344 1345 1346 1347 1348 1349 1350 1351 1352 1353
    if (!spapr->htab) {
        assert(kvm_enabled());

        fd = kvmppc_get_htab_fd(true);
        if (fd < 0) {
            fprintf(stderr, "Unable to open fd to restore KVM hash table: %s\n",
                    strerror(errno));
        }
    }

1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366
    while (true) {
        uint32_t index;
        uint16_t n_valid, n_invalid;

        index = qemu_get_be32(f);
        n_valid = qemu_get_be16(f);
        n_invalid = qemu_get_be16(f);

        if ((index == 0) && (n_valid == 0) && (n_invalid == 0)) {
            /* End of Stream */
            break;
        }

1367
        if ((index + n_valid + n_invalid) >
1368 1369 1370
            (HTAB_SIZE(spapr) / HASH_PTE_SIZE_64)) {
            /* Bad index in stream */
            fprintf(stderr, "htab_load() bad index %d (%hd+%hd entries) "
1371 1372
                    "in htab stream (htab_shift=%d)\n", index, n_valid, n_invalid,
                    spapr->htab_shift);
1373 1374 1375
            return -EINVAL;
        }

1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393
        if (spapr->htab) {
            if (n_valid) {
                qemu_get_buffer(f, HPTE(spapr->htab, index),
                                HASH_PTE_SIZE_64 * n_valid);
            }
            if (n_invalid) {
                memset(HPTE(spapr->htab, index + n_valid), 0,
                       HASH_PTE_SIZE_64 * n_invalid);
            }
        } else {
            int rc;

            assert(fd >= 0);

            rc = kvmppc_load_htab_chunk(f, fd, index, n_valid, n_invalid);
            if (rc < 0) {
                return rc;
            }
1394 1395 1396
        }
    }

1397 1398 1399 1400 1401
    if (!spapr->htab) {
        assert(fd >= 0);
        close(fd);
    }

1402 1403 1404 1405 1406 1407 1408 1409 1410 1411
    return 0;
}

static SaveVMHandlers savevm_htab_handlers = {
    .save_live_setup = htab_save_setup,
    .save_live_iterate = htab_save_iterate,
    .save_live_complete = htab_save_complete,
    .load_state = htab_load,
};

1412 1413 1414 1415 1416 1417 1418
static void spapr_boot_set(void *opaque, const char *boot_device,
                           Error **errp)
{
    MachineState *machine = MACHINE(qdev_get_machine());
    machine->boot_order = g_strdup(boot_device);
}

1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446
static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu)
{
    CPUPPCState *env = &cpu->env;

    /* Set time-base frequency to 512 MHz */
    cpu_ppc_tb_init(env, TIMEBASE_FREQ);

    /* PAPR always has exception vectors in RAM not ROM. To ensure this,
     * MSR[IP] should never be set.
     */
    env->msr_mask &= ~(1 << 6);

    /* Tell KVM that we're in PAPR mode */
    if (kvm_enabled()) {
        kvmppc_set_papr(cpu);
    }

    if (cpu->max_compat) {
        if (ppc_set_compat(cpu, cpu->max_compat) < 0) {
            exit(1);
        }
    }

    xics_cpu_setup(spapr->icp, cpu);

    qemu_register_reset(spapr_cpu_reset, cpu);
}

1447
/* pSeries LPAR / sPAPR hardware init */
1448
static void ppc_spapr_init(MachineState *machine)
1449
{
1450
    sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
1451 1452 1453
    const char *kernel_filename = machine->kernel_filename;
    const char *kernel_cmdline = machine->kernel_cmdline;
    const char *initrd_filename = machine->initrd_filename;
1454
    PowerPCCPU *cpu;
1455
    PCIHostState *phb;
1456
    int i;
A
Avi Kivity 已提交
1457 1458
    MemoryRegion *sysmem = get_system_memory();
    MemoryRegion *ram = g_new(MemoryRegion, 1);
1459 1460
    MemoryRegion *rma_region;
    void *rma = NULL;
A
Avi Kivity 已提交
1461
    hwaddr rma_alloc_size;
1462
    hwaddr node0_size = spapr_node0_size();
1463 1464
    uint32_t initrd_base = 0;
    long kernel_size = 0, initrd_size = 0;
1465
    long load_limit, fw_size;
1466
    bool kernel_le = false;
1467
    char *filename;
1468

1469 1470
    msi_supported = true;

1471 1472
    QLIST_INIT(&spapr->phbs);

1473 1474
    cpu_ppc_hypercall = emulate_spapr_hypercall;

1475
    /* Allocate RMA if necessary */
1476
    rma_alloc_size = kvmppc_alloc_rma(&rma);
1477 1478

    if (rma_alloc_size == -1) {
1479
        error_report("Unable to create RMA");
1480 1481
        exit(1);
    }
1482

1483
    if (rma_alloc_size && (rma_alloc_size < node0_size)) {
1484
        spapr->rma_size = rma_alloc_size;
1485
    } else {
1486
        spapr->rma_size = node0_size;
1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500

        /* With KVM, we don't actually know whether KVM supports an
         * unbounded RMA (PR KVM) or is limited by the hash table size
         * (HV KVM using VRMA), so we always assume the latter
         *
         * In that case, we also limit the initial allocations for RTAS
         * etc... to 256M since we have no way to know what the VRMA size
         * is going to be as it depends on the size of the hash table
         * isn't determined yet.
         */
        if (kvm_enabled()) {
            spapr->vrma_adjust = 1;
            spapr->rma_size = MIN(spapr->rma_size, 0x10000000);
        }
1501 1502
    }

1503 1504 1505 1506 1507 1508
    if (spapr->rma_size > node0_size) {
        fprintf(stderr, "Error: Numa node 0 has to span the RMA (%#08"HWADDR_PRIx")\n",
                spapr->rma_size);
        exit(1);
    }

1509 1510
    /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
    load_limit = MIN(spapr->rma_size, RTAS_MAX_ADDR) - FW_OVERHEAD;
1511

1512 1513 1514 1515 1516
    /* We aim for a hash table of size 1/128 the size of RAM.  The
     * normal rule of thumb is 1/64 the size of RAM, but that's much
     * more than needed for the Linux guests we support. */
    spapr->htab_shift = 18; /* Minimum architected size */
    while (spapr->htab_shift <= 46) {
1517
        if ((1ULL << (spapr->htab_shift + 7)) >= machine->ram_size) {
1518 1519 1520 1521
            break;
        }
        spapr->htab_shift++;
    }
1522

1523
    /* Set up Interrupt Controller before we create the VCPUs */
1524
    spapr->icp = xics_system_init(machine,
1525
                                  DIV_ROUND_UP(max_cpus * kvmppc_smt_threads(),
1526
                                               smp_threads),
1527 1528
                                  XICS_IRQS);

1529
    /* init CPUs */
1530 1531
    if (machine->cpu_model == NULL) {
        machine->cpu_model = kvm_enabled() ? "host" : "POWER7";
1532 1533
    }
    for (i = 0; i < smp_cpus; i++) {
1534
        cpu = cpu_ppc_init(machine->cpu_model);
1535
        if (cpu == NULL) {
1536 1537 1538
            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
            exit(1);
        }
1539
        spapr_cpu_init(spapr, cpu);
1540 1541
    }

1542 1543 1544 1545 1546
    if (kvm_enabled()) {
        /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
        kvmppc_enable_logical_ci_hcalls();
    }

1547
    /* allocate RAM */
1548
    memory_region_allocate_system_memory(ram, NULL, "ppc_spapr.ram",
1549
                                         machine->ram_size);
1550
    memory_region_add_subregion(sysmem, 0, ram);
1551

1552 1553 1554 1555 1556 1557 1558 1559
    if (rma_alloc_size && rma) {
        rma_region = g_new(MemoryRegion, 1);
        memory_region_init_ram_ptr(rma_region, NULL, "ppc_spapr.rma",
                                   rma_alloc_size, rma);
        vmstate_register_ram_global(rma_region);
        memory_region_add_subregion(sysmem, 0, rma_region);
    }

1560
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
1561
    if (!filename) {
1562
        error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
1563 1564
        exit(1);
    }
1565 1566 1567
    spapr->rtas_size = get_image_size(filename);
    spapr->rtas_blob = g_malloc(spapr->rtas_size);
    if (load_image_size(filename, spapr->rtas_blob, spapr->rtas_size) < 0) {
1568
        error_report("Could not load LPAR rtas '%s'", filename);
1569 1570
        exit(1);
    }
1571
    if (spapr->rtas_size > RTAS_MAX_SIZE) {
1572 1573
        error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
                     (size_t)spapr->rtas_size, RTAS_MAX_SIZE);
1574 1575
        exit(1);
    }
1576
    g_free(filename);
1577

1578 1579 1580
    /* Set up EPOW events infrastructure */
    spapr_events_init(spapr);

1581
    /* Set up the RTC RTAS interfaces */
1582
    spapr_rtc_create(spapr);
1583

1584
    /* Set up VIO bus */
1585 1586
    spapr->vio_bus = spapr_vio_bus_init();

P
Paolo Bonzini 已提交
1587
    for (i = 0; i < MAX_SERIAL_PORTS; i++) {
1588
        if (serial_hds[i]) {
1589
            spapr_vty_create(spapr->vio_bus, serial_hds[i]);
1590 1591
        }
    }
1592

D
David Gibson 已提交
1593 1594 1595
    /* We always have at least the nvram device on VIO */
    spapr_create_nvram(spapr);

1596
    /* Set up PCI */
1597 1598
    spapr_pci_rtas_init();

1599
    phb = spapr_create_phb(spapr, 0);
1600

P
Paolo Bonzini 已提交
1601
    for (i = 0; i < nb_nics; i++) {
1602 1603 1604
        NICInfo *nd = &nd_table[i];

        if (!nd->model) {
1605
            nd->model = g_strdup("ibmveth");
1606 1607 1608
        }

        if (strcmp(nd->model, "ibmveth") == 0) {
1609
            spapr_vlan_create(spapr->vio_bus, nd);
1610
        } else {
1611
            pci_nic_init_nofail(&nd_table[i], phb->bus, nd->model, NULL);
1612 1613 1614
        }
    }

1615
    for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
1616
        spapr_vscsi_create(spapr->vio_bus);
1617 1618
    }

1619
    /* Graphics */
1620
    if (spapr_vga_init(phb->bus)) {
1621
        spapr->has_graphics = true;
1622
        machine->usb |= defaults_enabled() && !machine->usb_disabled;
1623 1624
    }

1625
    if (machine->usb) {
1626
        pci_create_simple(phb->bus, -1, "pci-ohci");
1627

1628
        if (spapr->has_graphics) {
1629 1630 1631 1632
            USBBus *usb_bus = usb_bus_find(-1);

            usb_create_simple(usb_bus, "usb-kbd");
            usb_create_simple(usb_bus, "usb-mouse");
1633 1634 1635
        }
    }

1636
    if (spapr->rma_size < (MIN_RMA_SLOF << 20)) {
1637 1638 1639 1640 1641
        fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
                "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
        exit(1);
    }

1642 1643 1644 1645 1646
    if (kernel_filename) {
        uint64_t lowaddr = 0;

        kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
                               NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
1647
        if (kernel_size == ELF_LOAD_WRONG_ENDIAN) {
1648 1649 1650 1651 1652
            kernel_size = load_elf(kernel_filename,
                                   translate_kernel_address, NULL,
                                   NULL, &lowaddr, NULL, 0, ELF_MACHINE, 0);
            kernel_le = kernel_size > 0;
        }
1653
        if (kernel_size < 0) {
1654 1655
            fprintf(stderr, "qemu: error loading %s: %s\n",
                    kernel_filename, load_elf_strerror(kernel_size));
1656 1657 1658 1659 1660
            exit(1);
        }

        /* load initrd */
        if (initrd_filename) {
1661 1662 1663 1664
            /* Try to locate the initrd in the gap between the kernel
             * and the firmware. Add a bit of space just in case
             */
            initrd_base = (KERNEL_LOAD_ADDR + kernel_size + 0x1ffff) & ~0xffff;
1665
            initrd_size = load_image_targphys(initrd_filename, initrd_base,
1666
                                              load_limit - initrd_base);
1667 1668 1669 1670 1671 1672 1673 1674 1675
            if (initrd_size < 0) {
                fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
                        initrd_filename);
                exit(1);
            }
        } else {
            initrd_base = 0;
            initrd_size = 0;
        }
1676
    }
1677

1678 1679 1680 1681
    if (bios_name == NULL) {
        bios_name = FW_FILE_NAME;
    }
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
1682
    if (!filename) {
1683
        error_report("Could not find LPAR firmware '%s'", bios_name);
1684 1685
        exit(1);
    }
1686
    fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
1687 1688
    if (fw_size <= 0) {
        error_report("Could not load LPAR firmware '%s'", filename);
1689 1690 1691 1692
        exit(1);
    }
    g_free(filename);

1693 1694 1695
    /* FIXME: Should register things through the MachineState's qdev
     * interface, this is a legacy from the sPAPREnvironment structure
     * which predated MachineState but had a similar function */
1696 1697 1698 1699
    vmstate_register(NULL, 0, &vmstate_spapr, spapr);
    register_savevm_live(NULL, "spapr/htab", -1, 1,
                         &savevm_htab_handlers, spapr);

1700
    /* Prepare the device tree */
1701
    spapr->fdt_skel = spapr_create_fdt_skel(initrd_base, initrd_size,
1702
                                            kernel_size, kernel_le,
1703 1704
                                            kernel_cmdline,
                                            spapr->check_exception_irq);
1705
    assert(spapr->fdt_skel != NULL);
1706

1707 1708 1709 1710
    /* used by RTAS */
    QTAILQ_INIT(&spapr->ccs_list);
    qemu_register_reset(spapr_ccs_reset_hook, spapr);

1711
    qemu_register_boot_set(spapr_boot_set, spapr);
1712 1713
}

1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731
static int spapr_kvm_type(const char *vm_type)
{
    if (!vm_type) {
        return 0;
    }

    if (!strcmp(vm_type, "HV")) {
        return 1;
    }

    if (!strcmp(vm_type, "PR")) {
        return 2;
    }

    error_report("Unknown kvm-type specified '%s'", vm_type);
    exit(1);
}

1732
/*
1733
 * Implementation of an interface to adjust firmware path
1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788
 * for the bootindex property handling.
 */
static char *spapr_get_fw_dev_path(FWPathProvider *p, BusState *bus,
                                   DeviceState *dev)
{
#define CAST(type, obj, name) \
    ((type *)object_dynamic_cast(OBJECT(obj), (name)))
    SCSIDevice *d = CAST(SCSIDevice,  dev, TYPE_SCSI_DEVICE);
    sPAPRPHBState *phb = CAST(sPAPRPHBState, dev, TYPE_SPAPR_PCI_HOST_BRIDGE);

    if (d) {
        void *spapr = CAST(void, bus->parent, "spapr-vscsi");
        VirtIOSCSI *virtio = CAST(VirtIOSCSI, bus->parent, TYPE_VIRTIO_SCSI);
        USBDevice *usb = CAST(USBDevice, bus->parent, TYPE_USB_DEVICE);

        if (spapr) {
            /*
             * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
             * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
             * in the top 16 bits of the 64-bit LUN
             */
            unsigned id = 0x8000 | (d->id << 8) | d->lun;
            return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
                                   (uint64_t)id << 48);
        } else if (virtio) {
            /*
             * We use SRP luns of the form 01000000 | (target << 8) | lun
             * in the top 32 bits of the 64-bit LUN
             * Note: the quote above is from SLOF and it is wrong,
             * the actual binding is:
             * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
             */
            unsigned id = 0x1000000 | (d->id << 16) | d->lun;
            return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
                                   (uint64_t)id << 32);
        } else if (usb) {
            /*
             * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
             * in the top 32 bits of the 64-bit LUN
             */
            unsigned usb_port = atoi(usb->port->path);
            unsigned id = 0x1000000 | (usb_port << 16) | d->lun;
            return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
                                   (uint64_t)id << 32);
        }
    }

    if (phb) {
        /* Replace "pci" with "pci@800000020000000" */
        return g_strdup_printf("pci@%"PRIX64, phb->buid);
    }

    return NULL;
}

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1789 1790
static char *spapr_get_kvm_type(Object *obj, Error **errp)
{
1791
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
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1793
    return g_strdup(spapr->kvm_type);
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1794 1795 1796 1797
}

static void spapr_set_kvm_type(Object *obj, const char *value, Error **errp)
{
1798
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
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1800 1801
    g_free(spapr->kvm_type);
    spapr->kvm_type = g_strdup(value);
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1802 1803 1804 1805 1806 1807
}

static void spapr_machine_initfn(Object *obj)
{
    object_property_add_str(obj, "kvm-type",
                            spapr_get_kvm_type, spapr_set_kvm_type, NULL);
1808 1809 1810
    object_property_set_description(obj, "kvm-type",
                                    "Specifies the KVM virtualization mode (HV, PR)",
                                    NULL);
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1811 1812
}

1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829
static void ppc_cpu_do_nmi_on_cpu(void *arg)
{
    CPUState *cs = arg;

    cpu_synchronize_state(cs);
    ppc_cpu_do_system_reset(cs);
}

static void spapr_nmi(NMIState *n, int cpu_index, Error **errp)
{
    CPUState *cs;

    CPU_FOREACH(cs) {
        async_run_on_cpu(cs, ppc_cpu_do_nmi_on_cpu, cs);
    }
}

1830 1831 1832
static void spapr_machine_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);
1833
    FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
1834
    NMIClass *nc = NMI_CLASS(oc);
1835 1836 1837 1838 1839 1840

    mc->init = ppc_spapr_init;
    mc->reset = ppc_spapr_reset;
    mc->block_default_type = IF_SCSI;
    mc->max_cpus = MAX_CPUS;
    mc->no_parallel = 1;
1841
    mc->default_boot_order = "";
1842
    mc->default_ram_size = 512 * M_BYTE;
1843
    mc->kvm_type = spapr_kvm_type;
1844
    mc->has_dynamic_sysbus = true;
1845
    mc->pci_allow_0_address = true;
1846

1847
    fwc->get_dev_path = spapr_get_fw_dev_path;
1848
    nc->nmi_monitor_handler = spapr_nmi;
1849 1850 1851 1852 1853
}

static const TypeInfo spapr_machine_info = {
    .name          = TYPE_SPAPR_MACHINE,
    .parent        = TYPE_MACHINE,
1854
    .abstract      = true,
1855
    .instance_size = sizeof(sPAPRMachineState),
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1856
    .instance_init = spapr_machine_initfn,
D
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1857
    .class_size    = sizeof(sPAPRMachineClass),
1858
    .class_init    = spapr_machine_class_init,
1859 1860
    .interfaces = (InterfaceInfo[]) {
        { TYPE_FW_PATH_PROVIDER },
1861
        { TYPE_NMI },
1862 1863
        { }
    },
1864 1865
};

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1866
#define SPAPR_COMPAT_2_3 \
1867 1868 1869 1870 1871 1872
        HW_COMPAT_2_3 \
        {\
            .driver   = "spapr-pci-host-bridge",\
            .property = "dynamic-reconfiguration",\
            .value    = "off",\
        },
E
Eduardo Habkost 已提交
1873

1874
#define SPAPR_COMPAT_2_2 \
E
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1875
        SPAPR_COMPAT_2_3 \
1876
        HW_COMPAT_2_2 \
1877 1878 1879 1880
        {\
            .driver   = TYPE_SPAPR_PCI_HOST_BRIDGE,\
            .property = "mem_win_size",\
            .value    = "0x20000000",\
1881
        },
1882 1883

#define SPAPR_COMPAT_2_1 \
1884 1885
        SPAPR_COMPAT_2_2 \
        HW_COMPAT_2_1
1886

J
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1887 1888
static void spapr_compat_2_3(Object *obj)
{
1889
    savevm_skip_section_footers();
1890
    global_state_set_optional();
J
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1891 1892
}

1893 1894
static void spapr_compat_2_2(Object *obj)
{
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1895
    spapr_compat_2_3(obj);
1896 1897 1898 1899 1900 1901 1902
}

static void spapr_compat_2_1(Object *obj)
{
    spapr_compat_2_2(obj);
}

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1903 1904 1905 1906 1907 1908
static void spapr_machine_2_3_instance_init(Object *obj)
{
    spapr_compat_2_3(obj);
    spapr_machine_initfn(obj);
}

1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920
static void spapr_machine_2_2_instance_init(Object *obj)
{
    spapr_compat_2_2(obj);
    spapr_machine_initfn(obj);
}

static void spapr_machine_2_1_instance_init(Object *obj)
{
    spapr_compat_2_1(obj);
    spapr_machine_initfn(obj);
}

1921 1922 1923
static void spapr_machine_2_1_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);
1924
    static GlobalProperty compat_props[] = {
1925
        SPAPR_COMPAT_2_1
1926 1927
        { /* end of list */ }
    };
1928 1929

    mc->desc = "pSeries Logical Partition (PAPR compliant) v2.1";
1930
    mc->compat_props = compat_props;
1931 1932 1933
}

static const TypeInfo spapr_machine_2_1_info = {
1934
    .name          = MACHINE_TYPE_NAME("pseries-2.1"),
1935 1936
    .parent        = TYPE_SPAPR_MACHINE,
    .class_init    = spapr_machine_2_1_class_init,
1937
    .instance_init = spapr_machine_2_1_instance_init,
1938 1939
};

1940 1941
static void spapr_machine_2_2_class_init(ObjectClass *oc, void *data)
{
1942
    static GlobalProperty compat_props[] = {
1943
        SPAPR_COMPAT_2_2
1944 1945
        { /* end of list */ }
    };
1946 1947 1948
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "pSeries Logical Partition (PAPR compliant) v2.2";
1949
    mc->compat_props = compat_props;
1950 1951 1952
}

static const TypeInfo spapr_machine_2_2_info = {
1953
    .name          = MACHINE_TYPE_NAME("pseries-2.2"),
1954 1955
    .parent        = TYPE_SPAPR_MACHINE,
    .class_init    = spapr_machine_2_2_class_init,
1956
    .instance_init = spapr_machine_2_2_instance_init,
1957 1958
};

1959 1960
static void spapr_machine_2_3_class_init(ObjectClass *oc, void *data)
{
1961
    static GlobalProperty compat_props[] = {
1962
        SPAPR_COMPAT_2_3
1963 1964
        { /* end of list */ }
    };
1965 1966 1967
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "pSeries Logical Partition (PAPR compliant) v2.3";
1968
    mc->compat_props = compat_props;
1969 1970 1971
}

static const TypeInfo spapr_machine_2_3_info = {
1972
    .name          = MACHINE_TYPE_NAME("pseries-2.3"),
1973 1974
    .parent        = TYPE_SPAPR_MACHINE,
    .class_init    = spapr_machine_2_3_class_init,
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1975 1976 1977 1978 1979 1980 1981 1982 1983
    .instance_init = spapr_machine_2_3_instance_init,
};

static void spapr_machine_2_4_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "pSeries Logical Partition (PAPR compliant) v2.4";
    mc->alias = "pseries";
D
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1984
    mc->is_default = 0;
J
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1985 1986 1987
}

static const TypeInfo spapr_machine_2_4_info = {
1988
    .name          = MACHINE_TYPE_NAME("pseries-2.4"),
J
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1989 1990
    .parent        = TYPE_SPAPR_MACHINE,
    .class_init    = spapr_machine_2_4_class_init,
1991 1992
};

D
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1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008
static void spapr_machine_2_5_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->name = "pseries-2.5";
    mc->desc = "pSeries Logical Partition (PAPR compliant) v2.5";
    mc->alias = "pseries";
    mc->is_default = 1;
}

static const TypeInfo spapr_machine_2_5_info = {
    .name          = MACHINE_TYPE_NAME("pseries-2.5"),
    .parent        = TYPE_SPAPR_MACHINE,
    .class_init    = spapr_machine_2_5_class_init,
};

2009
static void spapr_machine_register_types(void)
2010
{
2011
    type_register_static(&spapr_machine_info);
2012
    type_register_static(&spapr_machine_2_1_info);
2013
    type_register_static(&spapr_machine_2_2_info);
2014
    type_register_static(&spapr_machine_2_3_info);
J
Jason Wang 已提交
2015
    type_register_static(&spapr_machine_2_4_info);
D
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2016
    type_register_static(&spapr_machine_2_5_info);
2017 2018
}

2019
type_init(spapr_machine_register_types)