spapr.c 43.0 KB
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/*
 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
 *
 * Copyright (c) 2004-2007 Fabrice Bellard
 * Copyright (c) 2007 Jocelyn Mayer
 * Copyright (c) 2010 David Gibson, IBM Corporation.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 *
 */
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#include "sysemu/sysemu.h"
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#include "hw/hw.h"
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#include "elf.h"
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#include "net/net.h"
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#include "sysemu/blockdev.h"
#include "sysemu/cpus.h"
#include "sysemu/kvm.h"
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#include "kvm_ppc.h"
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#include "mmu-hash64.h"
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#include "hw/boards.h"
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#include "hw/ppc/ppc.h"
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#include "hw/loader.h"

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#include "hw/ppc/spapr.h"
#include "hw/ppc/spapr_vio.h"
#include "hw/pci-host/spapr.h"
#include "hw/ppc/xics.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/pci.h"
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#include "exec/address-spaces.h"
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#include "hw/usb.h"
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#include "qemu/config-file.h"
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#include "qemu/error-report.h"
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#include <libfdt.h>

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/* SLOF memory layout:
 *
 * SLOF raw image loaded at 0, copies its romfs right below the flat
 * device-tree, then position SLOF itself 31M below that
 *
 * So we set FW_OVERHEAD to 40MB which should account for all of that
 * and more
 *
 * We load our kernel at 4M, leaving space for SLOF initial image
 */
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#define FDT_MAX_SIZE            0x40000
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#define RTAS_MAX_SIZE           0x10000
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#define FW_MAX_SIZE             0x400000
#define FW_FILE_NAME            "slof.bin"
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#define FW_OVERHEAD             0x2800000
#define KERNEL_LOAD_ADDR        FW_MAX_SIZE
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#define MIN_RMA_SLOF            128UL
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#define TIMEBASE_FREQ           512000000ULL

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#define MAX_CPUS                256
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#define XICS_IRQS               1024
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#define PHANDLE_XICP            0x00001111

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#define HTAB_SIZE(spapr)        (1ULL << ((spapr)->htab_shift))

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sPAPREnvironment *spapr;

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int spapr_allocate_irq(int hint, bool lsi)
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{
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    int irq;
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    if (hint) {
        irq = hint;
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        if (hint >= spapr->next_irq) {
            spapr->next_irq = hint + 1;
        }
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        /* FIXME: we should probably check for collisions somehow */
    } else {
        irq = spapr->next_irq++;
    }

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    /* Configure irq type */
    if (!xics_get_qirq(spapr->icp, irq)) {
        return 0;
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    }

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    xics_set_irq_type(spapr->icp, irq, lsi);
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    return irq;
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}

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/*
 * Allocate block of consequtive IRQs, returns a number of the first.
 * If msi==true, aligns the first IRQ number to num.
 */
int spapr_allocate_irq_block(int num, bool lsi, bool msi)
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{
    int first = -1;
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    int i, hint = 0;

    /*
     * MSIMesage::data is used for storing VIRQ so
     * it has to be aligned to num to support multiple
     * MSI vectors. MSI-X is not affected by this.
     * The hint is used for the first IRQ, the rest should
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     * be allocated continuously.
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     */
    if (msi) {
        assert((num == 1) || (num == 2) || (num == 4) ||
               (num == 8) || (num == 16) || (num == 32));
        hint = (spapr->next_irq + num - 1) & ~(num - 1);
    }
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    for (i = 0; i < num; ++i) {
        int irq;

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        irq = spapr_allocate_irq(hint, lsi);
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        if (!irq) {
            return -1;
        }

        if (0 == i) {
            first = irq;
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            hint = 0;
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        }

        /* If the above doesn't create a consecutive block then that's
         * an internal bug */
        assert(irq == (first + i));
    }

    return first;
}

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static XICSState *try_create_xics(const char *type, int nr_servers,
                                  int nr_irqs)
{
    DeviceState *dev;

    dev = qdev_create(NULL, type);
    qdev_prop_set_uint32(dev, "nr_servers", nr_servers);
    qdev_prop_set_uint32(dev, "nr_irqs", nr_irqs);
    if (qdev_init(dev) < 0) {
        return NULL;
    }

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    return XICS_COMMON(dev);
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}

static XICSState *xics_system_init(int nr_servers, int nr_irqs)
{
    XICSState *icp = NULL;

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    if (kvm_enabled()) {
        QemuOpts *machine_opts = qemu_get_machine_opts();
        bool irqchip_allowed = qemu_opt_get_bool(machine_opts,
                                                "kernel_irqchip", true);
        bool irqchip_required = qemu_opt_get_bool(machine_opts,
                                                  "kernel_irqchip", false);
        if (irqchip_allowed) {
            icp = try_create_xics(TYPE_KVM_XICS, nr_servers, nr_irqs);
        }

        if (irqchip_required && !icp) {
            perror("Failed to create in-kernel XICS\n");
            abort();
        }
    }

    if (!icp) {
        icp = try_create_xics(TYPE_XICS, nr_servers, nr_irqs);
    }

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    if (!icp) {
        perror("Failed to create XICS\n");
        abort();
    }

    return icp;
}

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static int spapr_fixup_cpu_dt(void *fdt, sPAPREnvironment *spapr)
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{
    int ret = 0, offset;
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    CPUState *cpu;
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    char cpu_model[32];
    int smt = kvmppc_smt_threads();
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    uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
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    CPU_FOREACH(cpu) {
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        DeviceClass *dc = DEVICE_GET_CLASS(cpu);
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        uint32_t associativity[] = {cpu_to_be32(0x5),
                                    cpu_to_be32(0x0),
                                    cpu_to_be32(0x0),
                                    cpu_to_be32(0x0),
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                                    cpu_to_be32(cpu->numa_node),
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                                    cpu_to_be32(cpu->cpu_index)};
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        if ((cpu->cpu_index % smt) != 0) {
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            continue;
        }

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        snprintf(cpu_model, 32, "/cpus/%s@%x", dc->fw_name,
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                 cpu->cpu_index);
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        offset = fdt_path_offset(fdt, cpu_model);
        if (offset < 0) {
            return offset;
        }

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        if (nb_numa_nodes > 1) {
            ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
                              sizeof(associativity));
            if (ret < 0) {
                return ret;
            }
        }

        ret = fdt_setprop(fdt, offset, "ibm,pft-size",
                          pft_size_prop, sizeof(pft_size_prop));
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        if (ret < 0) {
            return ret;
        }
    }
    return ret;
}

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static size_t create_page_sizes_prop(CPUPPCState *env, uint32_t *prop,
                                     size_t maxsize)
{
    size_t maxcells = maxsize / sizeof(uint32_t);
    int i, j, count;
    uint32_t *p = prop;

    for (i = 0; i < PPC_PAGE_SIZES_MAX_SZ; i++) {
        struct ppc_one_seg_page_size *sps = &env->sps.sps[i];

        if (!sps->page_shift) {
            break;
        }
        for (count = 0; count < PPC_PAGE_SIZES_MAX_SZ; count++) {
            if (sps->enc[count].page_shift == 0) {
                break;
            }
        }
        if ((p - prop) >= (maxcells - 3 - count * 2)) {
            break;
        }
        *(p++) = cpu_to_be32(sps->page_shift);
        *(p++) = cpu_to_be32(sps->slb_enc);
        *(p++) = cpu_to_be32(count);
        for (j = 0; j < count; j++) {
            *(p++) = cpu_to_be32(sps->enc[j].page_shift);
            *(p++) = cpu_to_be32(sps->enc[j].pte_enc);
        }
    }

    return (p - prop) * sizeof(uint32_t);
}

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#define _FDT(exp) \
    do { \
        int ret = (exp);                                           \
        if (ret < 0) {                                             \
            fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
                    #exp, fdt_strerror(ret));                      \
            exit(1);                                               \
        }                                                          \
    } while (0)


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static void *spapr_create_fdt_skel(hwaddr initrd_base,
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                                   hwaddr initrd_size,
                                   hwaddr kernel_size,
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                                   bool little_endian,
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                                   const char *boot_device,
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                                   const char *kernel_cmdline,
                                   uint32_t epow_irq)
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{
    void *fdt;
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    CPUState *cs;
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    uint32_t start_prop = cpu_to_be32(initrd_base);
    uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
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    char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
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        "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk\0hcall-set-mode";
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    char qemu_hypertas_prop[] = "hcall-memop1";
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    uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
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    uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
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    int i, smt = kvmppc_smt_threads();
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    unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
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    fdt = g_malloc0(FDT_MAX_SIZE);
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    _FDT((fdt_create(fdt, FDT_MAX_SIZE)));

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    if (kernel_size) {
        _FDT((fdt_add_reservemap_entry(fdt, KERNEL_LOAD_ADDR, kernel_size)));
    }
    if (initrd_size) {
        _FDT((fdt_add_reservemap_entry(fdt, initrd_base, initrd_size)));
    }
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    _FDT((fdt_finish_reservemap(fdt)));

    /* Root node */
    _FDT((fdt_begin_node(fdt, "")));
    _FDT((fdt_property_string(fdt, "device_type", "chrp")));
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    _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)")));
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    _FDT((fdt_property_string(fdt, "compatible", "qemu,pseries")));
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    _FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
    _FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));

    /* /chosen */
    _FDT((fdt_begin_node(fdt, "chosen")));

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    /* Set Form1_affinity */
    _FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5))));

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    _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
    _FDT((fdt_property(fdt, "linux,initrd-start",
                       &start_prop, sizeof(start_prop))));
    _FDT((fdt_property(fdt, "linux,initrd-end",
                       &end_prop, sizeof(end_prop))));
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    if (kernel_size) {
        uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
                              cpu_to_be64(kernel_size) };
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        _FDT((fdt_property(fdt, "qemu,boot-kernel", &kprop, sizeof(kprop))));
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        if (little_endian) {
            _FDT((fdt_property(fdt, "qemu,boot-kernel-le", NULL, 0)));
        }
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    }
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    if (boot_device) {
        _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
    }
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    _FDT((fdt_property_cell(fdt, "qemu,graphic-width", graphic_width)));
    _FDT((fdt_property_cell(fdt, "qemu,graphic-height", graphic_height)));
    _FDT((fdt_property_cell(fdt, "qemu,graphic-depth", graphic_depth)));
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    _FDT((fdt_end_node(fdt)));

    /* cpus */
    _FDT((fdt_begin_node(fdt, "cpus")));

    _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
    _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));

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    CPU_FOREACH(cs) {
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        PowerPCCPU *cpu = POWERPC_CPU(cs);
        CPUPPCState *env = &cpu->env;
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        DeviceClass *dc = DEVICE_GET_CLASS(cs);
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        PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
        int index = cs->cpu_index;
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        uint32_t servers_prop[smp_threads];
        uint32_t gservers_prop[smp_threads * 2];
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        char *nodename;
        uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
                           0xffffffff, 0xffffffff};
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        uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ;
        uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
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        uint32_t page_sizes_prop[64];
        size_t page_sizes_prop_size;
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        if ((index % smt) != 0) {
            continue;
        }

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        nodename = g_strdup_printf("%s@%x", dc->fw_name, index);
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        _FDT((fdt_begin_node(fdt, nodename)));

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        g_free(nodename);
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        _FDT((fdt_property_cell(fdt, "reg", index)));
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        _FDT((fdt_property_string(fdt, "device_type", "cpu")));

        _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
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        _FDT((fdt_property_cell(fdt, "d-cache-block-size",
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                                env->dcache_line_size)));
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        _FDT((fdt_property_cell(fdt, "d-cache-line-size",
                                env->dcache_line_size)));
        _FDT((fdt_property_cell(fdt, "i-cache-block-size",
                                env->icache_line_size)));
        _FDT((fdt_property_cell(fdt, "i-cache-line-size",
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                                env->icache_line_size)));
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        if (pcc->l1_dcache_size) {
            _FDT((fdt_property_cell(fdt, "d-cache-size", pcc->l1_dcache_size)));
        } else {
            fprintf(stderr, "Warning: Unknown L1 dcache size for cpu\n");
        }
        if (pcc->l1_icache_size) {
            _FDT((fdt_property_cell(fdt, "i-cache-size", pcc->l1_icache_size)));
        } else {
            fprintf(stderr, "Warning: Unknown L1 icache size for cpu\n");
        }

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        _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
        _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
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        _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
        _FDT((fdt_property_string(fdt, "status", "okay")));
        _FDT((fdt_property(fdt, "64-bit", NULL, 0)));
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        /* Build interrupt servers and gservers properties */
        for (i = 0; i < smp_threads; i++) {
            servers_prop[i] = cpu_to_be32(index + i);
            /* Hack, direct the group queues back to cpu 0 */
            gservers_prop[i*2] = cpu_to_be32(index + i);
            gservers_prop[i*2 + 1] = 0;
        }
        _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
                           servers_prop, sizeof(servers_prop))));
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        _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
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                           gservers_prop, sizeof(gservers_prop))));
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        if (env->spr_cb[SPR_PURR].oea_read) {
            _FDT((fdt_property(fdt, "ibm,purr", NULL, 0)));
        }

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        if (env->mmu_model & POWERPC_MMU_1TSEG) {
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            _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
                               segs, sizeof(segs))));
        }

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        /* Advertise VMX/VSX (vector extensions) if available
         *   0 / no property == no vector extensions
         *   1               == VMX / Altivec available
         *   2               == VSX available */
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        if (env->insns_flags & PPC_ALTIVEC) {
            uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1;

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            _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
        }

        /* Advertise DFP (Decimal Floating Point) if available
         *   0 / no property == no DFP
         *   1               == DFP available */
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        if (env->insns_flags2 & PPC2_DFP) {
            _FDT((fdt_property_cell(fdt, "ibm,dfp", 1)));
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        }

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        page_sizes_prop_size = create_page_sizes_prop(env, page_sizes_prop,
                                                      sizeof(page_sizes_prop));
        if (page_sizes_prop_size) {
            _FDT((fdt_property(fdt, "ibm,segment-page-sizes",
                               page_sizes_prop, page_sizes_prop_size)));
        }

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        _FDT((fdt_end_node(fdt)));
    }

    _FDT((fdt_end_node(fdt)));

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    /* RTAS */
    _FDT((fdt_begin_node(fdt, "rtas")));

    _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
                       sizeof(hypertas_prop))));
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    _FDT((fdt_property(fdt, "qemu,hypertas-functions", qemu_hypertas_prop,
                       sizeof(qemu_hypertas_prop))));
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    _FDT((fdt_property(fdt, "ibm,associativity-reference-points",
        refpoints, sizeof(refpoints))));

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    _FDT((fdt_property_cell(fdt, "rtas-error-log-max", RTAS_ERROR_LOG_MAX)));

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    _FDT((fdt_end_node(fdt)));

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    /* interrupt controller */
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    _FDT((fdt_begin_node(fdt, "interrupt-controller")));
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    _FDT((fdt_property_string(fdt, "device_type",
                              "PowerPC-External-Interrupt-Presentation")));
    _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp")));
    _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
    _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
                       interrupt_server_ranges_prop,
                       sizeof(interrupt_server_ranges_prop))));
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    _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2)));
    _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
    _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
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    _FDT((fdt_end_node(fdt)));

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    /* vdevice */
    _FDT((fdt_begin_node(fdt, "vdevice")));

    _FDT((fdt_property_string(fdt, "device_type", "vdevice")));
    _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
    _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
    _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
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    _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2)));
    _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
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    _FDT((fdt_end_node(fdt)));

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    /* event-sources */
    spapr_events_fdt_skel(fdt, epow_irq);

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    _FDT((fdt_end_node(fdt))); /* close root node */
    _FDT((fdt_finish(fdt)));

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    return fdt;
}

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static int spapr_populate_memory(sPAPREnvironment *spapr, void *fdt)
{
    uint32_t associativity[] = {cpu_to_be32(0x4), cpu_to_be32(0x0),
                                cpu_to_be32(0x0), cpu_to_be32(0x0),
                                cpu_to_be32(0x0)};
    char mem_name[32];
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    hwaddr node0_size, mem_start, node_size;
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    uint64_t mem_reg_property[2];
    int i, off;

    /* memory node(s) */
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    if (nb_numa_nodes > 1 && node_mem[0] < ram_size) {
        node0_size = node_mem[0];
    } else {
        node0_size = ram_size;
    }
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    /* RMA */
    mem_reg_property[0] = 0;
    mem_reg_property[1] = cpu_to_be64(spapr->rma_size);
    off = fdt_add_subnode(fdt, 0, "memory@0");
    _FDT(off);
    _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
    _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
                      sizeof(mem_reg_property))));
    _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
                      sizeof(associativity))));

    /* RAM: Node 0 */
    if (node0_size > spapr->rma_size) {
        mem_reg_property[0] = cpu_to_be64(spapr->rma_size);
        mem_reg_property[1] = cpu_to_be64(node0_size - spapr->rma_size);

        sprintf(mem_name, "memory@" TARGET_FMT_lx, spapr->rma_size);
        off = fdt_add_subnode(fdt, 0, mem_name);
        _FDT(off);
        _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
        _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
                          sizeof(mem_reg_property))));
        _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
                          sizeof(associativity))));
    }

    /* RAM: Node 1 and beyond */
    mem_start = node0_size;
    for (i = 1; i < nb_numa_nodes; i++) {
        mem_reg_property[0] = cpu_to_be64(mem_start);
571 572 573 574 575 576 577 578 579
        if (mem_start >= ram_size) {
            node_size = 0;
        } else {
            node_size = node_mem[i];
            if (node_size > ram_size - mem_start) {
                node_size = ram_size - mem_start;
            }
        }
        mem_reg_property[1] = cpu_to_be64(node_size);
580 581 582 583 584 585 586 587 588
        associativity[3] = associativity[4] = cpu_to_be32(i);
        sprintf(mem_name, "memory@" TARGET_FMT_lx, mem_start);
        off = fdt_add_subnode(fdt, 0, mem_name);
        _FDT(off);
        _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
        _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
                          sizeof(mem_reg_property))));
        _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
                          sizeof(associativity))));
589
        mem_start += node_size;
590 591 592 593 594
    }

    return 0;
}

595
static void spapr_finalize_fdt(sPAPREnvironment *spapr,
A
Avi Kivity 已提交
596 597 598
                               hwaddr fdt_addr,
                               hwaddr rtas_addr,
                               hwaddr rtas_size)
599 600 601
{
    int ret;
    void *fdt;
602
    sPAPRPHBState *phb;
603

604
    fdt = g_malloc(FDT_MAX_SIZE);
605 606 607

    /* open out the base tree into a temp buffer for the final tweaks */
    _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE)));
608

609 610 611 612 613 614
    ret = spapr_populate_memory(spapr, fdt);
    if (ret < 0) {
        fprintf(stderr, "couldn't setup memory nodes in fdt\n");
        exit(1);
    }

615 616 617 618 619 620
    ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
    if (ret < 0) {
        fprintf(stderr, "couldn't setup vio devices in fdt\n");
        exit(1);
    }

621
    QLIST_FOREACH(phb, &spapr->phbs, list) {
622
        ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt);
623 624 625 626 627 628 629
    }

    if (ret < 0) {
        fprintf(stderr, "couldn't setup PCI devices in fdt\n");
        exit(1);
    }

630 631 632 633 634 635
    /* RTAS */
    ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
    if (ret < 0) {
        fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
    }

636
    /* Advertise NUMA via ibm,associativity */
637 638 639
    ret = spapr_fixup_cpu_dt(fdt, spapr);
    if (ret < 0) {
        fprintf(stderr, "Couldn't finalize CPU device tree properties\n");
640 641
    }

642
    if (!spapr->has_graphics) {
643 644
        spapr_populate_chosen_stdout(fdt, spapr->vio_bus);
    }
645

646 647
    _FDT((fdt_pack(fdt)));

648 649 650 651 652 653
    if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
        hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
                 fdt_totalsize(fdt), FDT_MAX_SIZE);
        exit(1);
    }

654
    cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
655

656
    g_free(fdt);
657 658 659 660 661 662 663
}

static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
{
    return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
}

664
static void emulate_spapr_hypercall(PowerPCCPU *cpu)
665
{
666 667
    CPUPPCState *env = &cpu->env;

668 669 670 671
    if (msr_pr) {
        hcall_dprintf("Hypercall made with MSR[PR]=1\n");
        env->gpr[3] = H_PRIVILEGE;
    } else {
672
        env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]);
673
    }
674 675
}

676 677 678 679 680 681 682 683 684 685 686 687 688
static void spapr_reset_htab(sPAPREnvironment *spapr)
{
    long shift;

    /* allocate hash page table.  For now we always make this 16mb,
     * later we should probably make it scale to the size of guest
     * RAM */

    shift = kvmppc_reset_htab(spapr->htab_shift);

    if (shift > 0) {
        /* Kernel handles htab, we don't need to allocate one */
        spapr->htab_shift = shift;
689
        kvmppc_kern_htab = true;
690 691 692 693 694 695 696 697 698 699 700 701
    } else {
        if (!spapr->htab) {
            /* Allocate an htab if we don't yet have one */
            spapr->htab = qemu_memalign(HTAB_SIZE(spapr), HTAB_SIZE(spapr));
        }

        /* And clear it */
        memset(spapr->htab, 0, HTAB_SIZE(spapr));
    }

    /* Update the RMA size if necessary */
    if (spapr->vrma_adjust) {
702 703
        hwaddr node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size;
        spapr->rma_size = kvmppc_rma_size(node0_size, spapr->htab_shift);
704
    }
705 706
}

707
static void ppc_spapr_reset(void)
708
{
709
    PowerPCCPU *first_ppc_cpu;
710

711 712
    /* Reset the hash table & recalc the RMA */
    spapr_reset_htab(spapr);
713

714
    qemu_devices_reset();
715 716 717 718 719 720

    /* Load the fdt */
    spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr,
                       spapr->rtas_size);

    /* Set up the entry state */
721 722 723 724 725
    first_ppc_cpu = POWERPC_CPU(first_cpu);
    first_ppc_cpu->env.gpr[3] = spapr->fdt_addr;
    first_ppc_cpu->env.gpr[5] = 0;
    first_cpu->halted = 0;
    first_ppc_cpu->env.nip = spapr->entry_point;
726 727 728

}

729 730
static void spapr_cpu_reset(void *opaque)
{
731
    PowerPCCPU *cpu = opaque;
732
    CPUState *cs = CPU(cpu);
733
    CPUPPCState *env = &cpu->env;
734

735
    cpu_reset(cs);
736 737 738 739

    /* All CPUs start halted.  CPU0 is unhalted from the machine level
     * reset code and the rest are explicitly started up by the guest
     * using an RTAS call */
740
    cs->halted = 1;
741 742

    env->spr[SPR_HIOR] = 0;
743

744
    env->external_htab = (uint8_t *)spapr->htab;
745 746 747 748 749 750 751
    if (kvm_enabled() && !env->external_htab) {
        /*
         * HV KVM, set external_htab to 1 so our ppc_hash64_load_hpte*
         * functions do the right thing.
         */
        env->external_htab = (void *)1;
    }
752
    env->htab_base = -1;
753 754 755 756 757 758 759
    /*
     * htab_mask is the mask used to normalize hash value to PTEG index.
     * htab_shift is log2 of hash table size.
     * We have 8 hpte per group, and each hpte is 16 bytes.
     * ie have 128 bytes per hpte entry.
     */
    env->htab_mask = (1ULL << ((spapr)->htab_shift - 7)) - 1;
760
    env->spr[SPR_SDR1] = (target_ulong)(uintptr_t)spapr->htab |
761
        (spapr->htab_shift - 18);
762 763
}

D
David Gibson 已提交
764 765
static void spapr_create_nvram(sPAPREnvironment *spapr)
{
766
    DeviceState *dev = qdev_create(&spapr->vio_bus->bus, "spapr-nvram");
P
Paolo Bonzini 已提交
767
    DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0);
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David Gibson 已提交
768

P
Paolo Bonzini 已提交
769 770
    if (dinfo) {
        qdev_prop_set_drive_nofail(dev, "drive", dinfo->bdrv);
D
David Gibson 已提交
771 772 773 774 775 776 777
    }

    qdev_init_nofail(dev);

    spapr->nvram = (struct sPAPRNVRAM *)dev;
}

778
/* Returns whether we want to use VGA or not */
779 780
static int spapr_vga_init(PCIBus *pci_bus)
{
781 782
    switch (vga_interface_type) {
    case VGA_NONE:
783 784
    case VGA_STD:
        return pci_vga_init(pci_bus) != NULL;
785
    default:
786 787
        fprintf(stderr, "This vga model is not supported,"
                "currently it only supports -vga std\n");
788 789
        exit(0);
        break;
790 791 792
    }
}

793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819
static const VMStateDescription vmstate_spapr = {
    .name = "spapr",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField []) {
        VMSTATE_UINT32(next_irq, sPAPREnvironment),

        /* RTC offset */
        VMSTATE_UINT64(rtc_offset, sPAPREnvironment),

        VMSTATE_END_OF_LIST()
    },
};

#define HPTE(_table, _i)   (void *)(((uint64_t *)(_table)) + ((_i) * 2))
#define HPTE_VALID(_hpte)  (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
#define HPTE_DIRTY(_hpte)  (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
#define CLEAN_HPTE(_hpte)  ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))

static int htab_save_setup(QEMUFile *f, void *opaque)
{
    sPAPREnvironment *spapr = opaque;

    /* "Iteration" header */
    qemu_put_be32(f, spapr->htab_shift);

820 821 822 823 824 825 826 827 828 829 830 831 832 833 834
    if (spapr->htab) {
        spapr->htab_save_index = 0;
        spapr->htab_first_pass = true;
    } else {
        assert(kvm_enabled());

        spapr->htab_fd = kvmppc_get_htab_fd(false);
        if (spapr->htab_fd < 0) {
            fprintf(stderr, "Unable to open fd for reading hash table from KVM: %s\n",
                    strerror(errno));
            return -1;
        }
    }


835 836 837 838 839 840 841 842
    return 0;
}

static void htab_save_first_pass(QEMUFile *f, sPAPREnvironment *spapr,
                                 int64_t max_ns)
{
    int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64;
    int index = spapr->htab_save_index;
843
    int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873

    assert(spapr->htab_first_pass);

    do {
        int chunkstart;

        /* Consume invalid HPTEs */
        while ((index < htabslots)
               && !HPTE_VALID(HPTE(spapr->htab, index))) {
            index++;
            CLEAN_HPTE(HPTE(spapr->htab, index));
        }

        /* Consume valid HPTEs */
        chunkstart = index;
        while ((index < htabslots)
               && HPTE_VALID(HPTE(spapr->htab, index))) {
            index++;
            CLEAN_HPTE(HPTE(spapr->htab, index));
        }

        if (index > chunkstart) {
            int n_valid = index - chunkstart;

            qemu_put_be32(f, chunkstart);
            qemu_put_be16(f, n_valid);
            qemu_put_be16(f, 0);
            qemu_put_buffer(f, HPTE(spapr->htab, chunkstart),
                            HASH_PTE_SIZE_64 * n_valid);

874
            if ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) {
875 876 877 878 879 880 881 882 883 884 885 886 887
                break;
            }
        }
    } while ((index < htabslots) && !qemu_file_rate_limit(f));

    if (index >= htabslots) {
        assert(index == htabslots);
        index = 0;
        spapr->htab_first_pass = false;
    }
    spapr->htab_save_index = index;
}

888 889
static int htab_save_later_pass(QEMUFile *f, sPAPREnvironment *spapr,
                                int64_t max_ns)
890 891 892 893 894
{
    bool final = max_ns < 0;
    int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64;
    int examined = 0, sent = 0;
    int index = spapr->htab_save_index;
895
    int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939

    assert(!spapr->htab_first_pass);

    do {
        int chunkstart, invalidstart;

        /* Consume non-dirty HPTEs */
        while ((index < htabslots)
               && !HPTE_DIRTY(HPTE(spapr->htab, index))) {
            index++;
            examined++;
        }

        chunkstart = index;
        /* Consume valid dirty HPTEs */
        while ((index < htabslots)
               && HPTE_DIRTY(HPTE(spapr->htab, index))
               && HPTE_VALID(HPTE(spapr->htab, index))) {
            CLEAN_HPTE(HPTE(spapr->htab, index));
            index++;
            examined++;
        }

        invalidstart = index;
        /* Consume invalid dirty HPTEs */
        while ((index < htabslots)
               && HPTE_DIRTY(HPTE(spapr->htab, index))
               && !HPTE_VALID(HPTE(spapr->htab, index))) {
            CLEAN_HPTE(HPTE(spapr->htab, index));
            index++;
            examined++;
        }

        if (index > chunkstart) {
            int n_valid = invalidstart - chunkstart;
            int n_invalid = index - invalidstart;

            qemu_put_be32(f, chunkstart);
            qemu_put_be16(f, n_valid);
            qemu_put_be16(f, n_invalid);
            qemu_put_buffer(f, HPTE(spapr->htab, chunkstart),
                            HASH_PTE_SIZE_64 * n_valid);
            sent += index - chunkstart;

940
            if (!final && (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) {
941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961
                break;
            }
        }

        if (examined >= htabslots) {
            break;
        }

        if (index >= htabslots) {
            assert(index == htabslots);
            index = 0;
        }
    } while ((examined < htabslots) && (!qemu_file_rate_limit(f) || final));

    if (index >= htabslots) {
        assert(index == htabslots);
        index = 0;
    }

    spapr->htab_save_index = index;

962
    return (examined >= htabslots) && (sent == 0) ? 1 : 0;
963 964
}

965 966 967
#define MAX_ITERATION_NS    5000000 /* 5 ms */
#define MAX_KVM_BUF_SIZE    2048

968 969 970
static int htab_save_iterate(QEMUFile *f, void *opaque)
{
    sPAPREnvironment *spapr = opaque;
971
    int rc = 0;
972 973 974 975

    /* Iteration header */
    qemu_put_be32(f, 0);

976 977 978 979 980 981 982 983 984
    if (!spapr->htab) {
        assert(kvm_enabled());

        rc = kvmppc_save_htab(f, spapr->htab_fd,
                              MAX_KVM_BUF_SIZE, MAX_ITERATION_NS);
        if (rc < 0) {
            return rc;
        }
    } else  if (spapr->htab_first_pass) {
985 986
        htab_save_first_pass(f, spapr, MAX_ITERATION_NS);
    } else {
987
        rc = htab_save_later_pass(f, spapr, MAX_ITERATION_NS);
988 989 990 991 992 993 994
    }

    /* End marker */
    qemu_put_be32(f, 0);
    qemu_put_be16(f, 0);
    qemu_put_be16(f, 0);

995
    return rc;
996 997 998 999 1000 1001 1002 1003 1004
}

static int htab_save_complete(QEMUFile *f, void *opaque)
{
    sPAPREnvironment *spapr = opaque;

    /* Iteration header */
    qemu_put_be32(f, 0);

1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018
    if (!spapr->htab) {
        int rc;

        assert(kvm_enabled());

        rc = kvmppc_save_htab(f, spapr->htab_fd, MAX_KVM_BUF_SIZE, -1);
        if (rc < 0) {
            return rc;
        }
        close(spapr->htab_fd);
        spapr->htab_fd = -1;
    } else {
        htab_save_later_pass(f, spapr, -1);
    }
1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031

    /* End marker */
    qemu_put_be32(f, 0);
    qemu_put_be16(f, 0);
    qemu_put_be16(f, 0);

    return 0;
}

static int htab_load(QEMUFile *f, void *opaque, int version_id)
{
    sPAPREnvironment *spapr = opaque;
    uint32_t section_hdr;
1032
    int fd = -1;
1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048

    if (version_id < 1 || version_id > 1) {
        fprintf(stderr, "htab_load() bad version\n");
        return -EINVAL;
    }

    section_hdr = qemu_get_be32(f);

    if (section_hdr) {
        /* First section, just the hash shift */
        if (spapr->htab_shift != section_hdr) {
            return -EINVAL;
        }
        return 0;
    }

1049 1050 1051 1052 1053 1054 1055 1056 1057 1058
    if (!spapr->htab) {
        assert(kvm_enabled());

        fd = kvmppc_get_htab_fd(true);
        if (fd < 0) {
            fprintf(stderr, "Unable to open fd to restore KVM hash table: %s\n",
                    strerror(errno));
        }
    }

1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071
    while (true) {
        uint32_t index;
        uint16_t n_valid, n_invalid;

        index = qemu_get_be32(f);
        n_valid = qemu_get_be16(f);
        n_invalid = qemu_get_be16(f);

        if ((index == 0) && (n_valid == 0) && (n_invalid == 0)) {
            /* End of Stream */
            break;
        }

1072
        if ((index + n_valid + n_invalid) >
1073 1074 1075
            (HTAB_SIZE(spapr) / HASH_PTE_SIZE_64)) {
            /* Bad index in stream */
            fprintf(stderr, "htab_load() bad index %d (%hd+%hd entries) "
1076 1077
                    "in htab stream (htab_shift=%d)\n", index, n_valid, n_invalid,
                    spapr->htab_shift);
1078 1079 1080
            return -EINVAL;
        }

1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098
        if (spapr->htab) {
            if (n_valid) {
                qemu_get_buffer(f, HPTE(spapr->htab, index),
                                HASH_PTE_SIZE_64 * n_valid);
            }
            if (n_invalid) {
                memset(HPTE(spapr->htab, index + n_valid), 0,
                       HASH_PTE_SIZE_64 * n_invalid);
            }
        } else {
            int rc;

            assert(fd >= 0);

            rc = kvmppc_load_htab_chunk(f, fd, index, n_valid, n_invalid);
            if (rc < 0) {
                return rc;
            }
1099 1100 1101
        }
    }

1102 1103 1104 1105 1106
    if (!spapr->htab) {
        assert(fd >= 0);
        close(fd);
    }

1107 1108 1109 1110 1111 1112 1113 1114 1115 1116
    return 0;
}

static SaveVMHandlers savevm_htab_handlers = {
    .save_live_setup = htab_save_setup,
    .save_live_iterate = htab_save_iterate,
    .save_live_complete = htab_save_complete,
    .load_state = htab_load,
};

1117
/* pSeries LPAR / sPAPR hardware init */
1118
static void ppc_spapr_init(QEMUMachineInitArgs *args)
1119
{
1120 1121 1122 1123 1124
    ram_addr_t ram_size = args->ram_size;
    const char *cpu_model = args->cpu_model;
    const char *kernel_filename = args->kernel_filename;
    const char *kernel_cmdline = args->kernel_cmdline;
    const char *initrd_filename = args->initrd_filename;
1125
    const char *boot_device = args->boot_order;
1126
    PowerPCCPU *cpu;
A
Andreas Färber 已提交
1127
    CPUPPCState *env;
1128
    PCIHostState *phb;
1129
    int i;
A
Avi Kivity 已提交
1130 1131
    MemoryRegion *sysmem = get_system_memory();
    MemoryRegion *ram = g_new(MemoryRegion, 1);
A
Avi Kivity 已提交
1132
    hwaddr rma_alloc_size;
1133
    hwaddr node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size;
1134 1135 1136
    uint32_t initrd_base = 0;
    long kernel_size = 0, initrd_size = 0;
    long load_limit, rtas_limit, fw_size;
1137
    bool kernel_le = false;
1138
    char *filename;
1139

1140 1141
    msi_supported = true;

1142 1143 1144
    spapr = g_malloc0(sizeof(*spapr));
    QLIST_INIT(&spapr->phbs);

1145 1146
    cpu_ppc_hypercall = emulate_spapr_hypercall;

1147 1148 1149 1150 1151 1152 1153
    /* Allocate RMA if necessary */
    rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);

    if (rma_alloc_size == -1) {
        hw_error("qemu: Unable to create RMA\n");
        exit(1);
    }
1154

1155
    if (rma_alloc_size && (rma_alloc_size < node0_size)) {
1156
        spapr->rma_size = rma_alloc_size;
1157
    } else {
1158
        spapr->rma_size = node0_size;
1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172

        /* With KVM, we don't actually know whether KVM supports an
         * unbounded RMA (PR KVM) or is limited by the hash table size
         * (HV KVM using VRMA), so we always assume the latter
         *
         * In that case, we also limit the initial allocations for RTAS
         * etc... to 256M since we have no way to know what the VRMA size
         * is going to be as it depends on the size of the hash table
         * isn't determined yet.
         */
        if (kvm_enabled()) {
            spapr->vrma_adjust = 1;
            spapr->rma_size = MIN(spapr->rma_size, 0x10000000);
        }
1173 1174
    }

1175 1176 1177 1178 1179 1180
    if (spapr->rma_size > node0_size) {
        fprintf(stderr, "Error: Numa node 0 has to span the RMA (%#08"HWADDR_PRIx")\n",
                spapr->rma_size);
        exit(1);
    }

1181
    /* We place the device tree and RTAS just below either the top of the RMA,
1182 1183
     * or just below 2GB, whichever is lowere, so that it can be
     * processed with 32-bit real mode code if necessary */
1184
    rtas_limit = MIN(spapr->rma_size, 0x80000000);
1185 1186 1187
    spapr->rtas_addr = rtas_limit - RTAS_MAX_SIZE;
    spapr->fdt_addr = spapr->rtas_addr - FDT_MAX_SIZE;
    load_limit = spapr->fdt_addr - FW_OVERHEAD;
1188

1189 1190 1191 1192 1193 1194 1195 1196 1197 1198
    /* We aim for a hash table of size 1/128 the size of RAM.  The
     * normal rule of thumb is 1/64 the size of RAM, but that's much
     * more than needed for the Linux guests we support. */
    spapr->htab_shift = 18; /* Minimum architected size */
    while (spapr->htab_shift <= 46) {
        if ((1ULL << (spapr->htab_shift + 7)) >= ram_size) {
            break;
        }
        spapr->htab_shift++;
    }
1199

1200 1201 1202 1203 1204
    /* Set up Interrupt Controller before we create the VCPUs */
    spapr->icp = xics_system_init(smp_cpus * kvmppc_smt_threads() / smp_threads,
                                  XICS_IRQS);
    spapr->next_irq = XICS_IRQ_BASE;

1205 1206
    /* init CPUs */
    if (cpu_model == NULL) {
1207
        cpu_model = kvm_enabled() ? "host" : "POWER7";
1208 1209
    }
    for (i = 0; i < smp_cpus; i++) {
1210 1211
        cpu = cpu_ppc_init(cpu_model);
        if (cpu == NULL) {
1212 1213 1214
            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
            exit(1);
        }
1215 1216
        env = &cpu->env;

1217 1218 1219
        /* Set time-base frequency to 512 MHz */
        cpu_ppc_tb_init(env, TIMEBASE_FREQ);

1220 1221 1222 1223
        /* PAPR always has exception vectors in RAM not ROM. To ensure this,
         * MSR[IP] should never be set.
         */
        env->msr_mask &= ~(1 << 6);
1224 1225 1226

        /* Tell KVM that we're in PAPR mode */
        if (kvm_enabled()) {
1227
            kvmppc_set_papr(cpu);
1228 1229
        }

1230 1231
        xics_cpu_setup(spapr->icp, cpu);

1232
        qemu_register_reset(spapr_cpu_reset, cpu);
1233 1234 1235
    }

    /* allocate RAM */
1236
    spapr->ram_limit = ram_size;
1237 1238 1239 1240
    if (spapr->ram_limit > rma_alloc_size) {
        ram_addr_t nonrma_base = rma_alloc_size;
        ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size;

1241
        memory_region_init_ram(ram, NULL, "ppc_spapr.ram", nonrma_size);
1242
        vmstate_register_ram_global(ram);
1243 1244
        memory_region_add_subregion(sysmem, nonrma_base, ram);
    }
1245

1246
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
1247
    spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr,
1248
                                           rtas_limit - spapr->rtas_addr);
1249
    if (spapr->rtas_size < 0) {
1250 1251 1252
        hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
        exit(1);
    }
1253 1254 1255 1256 1257
    if (spapr->rtas_size > RTAS_MAX_SIZE) {
        hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
                 spapr->rtas_size, RTAS_MAX_SIZE);
        exit(1);
    }
1258
    g_free(filename);
1259

1260 1261 1262
    /* Set up EPOW events infrastructure */
    spapr_events_init(spapr);

1263
    /* Set up VIO bus */
1264 1265
    spapr->vio_bus = spapr_vio_bus_init();

P
Paolo Bonzini 已提交
1266
    for (i = 0; i < MAX_SERIAL_PORTS; i++) {
1267
        if (serial_hds[i]) {
1268
            spapr_vty_create(spapr->vio_bus, serial_hds[i]);
1269 1270
        }
    }
1271

D
David Gibson 已提交
1272 1273 1274
    /* We always have at least the nvram device on VIO */
    spapr_create_nvram(spapr);

1275
    /* Set up PCI */
1276
    spapr_pci_msi_init(spapr, SPAPR_PCI_MSI_WINDOW);
1277 1278
    spapr_pci_rtas_init();

1279
    phb = spapr_create_phb(spapr, 0);
1280

P
Paolo Bonzini 已提交
1281
    for (i = 0; i < nb_nics; i++) {
1282 1283 1284
        NICInfo *nd = &nd_table[i];

        if (!nd->model) {
1285
            nd->model = g_strdup("ibmveth");
1286 1287 1288
        }

        if (strcmp(nd->model, "ibmveth") == 0) {
1289
            spapr_vlan_create(spapr->vio_bus, nd);
1290
        } else {
1291
            pci_nic_init_nofail(&nd_table[i], phb->bus, nd->model, NULL);
1292 1293 1294
        }
    }

1295
    for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
1296
        spapr_vscsi_create(spapr->vio_bus);
1297 1298
    }

1299
    /* Graphics */
1300
    if (spapr_vga_init(phb->bus)) {
1301
        spapr->has_graphics = true;
1302 1303
    }

1304
    if (usb_enabled(spapr->has_graphics)) {
1305
        pci_create_simple(phb->bus, -1, "pci-ohci");
1306 1307 1308 1309 1310 1311
        if (spapr->has_graphics) {
            usbdevice_create("keyboard");
            usbdevice_create("mouse");
        }
    }

1312
    if (spapr->rma_size < (MIN_RMA_SLOF << 20)) {
1313 1314 1315 1316 1317
        fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
                "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
        exit(1);
    }

1318 1319 1320 1321 1322
    if (kernel_filename) {
        uint64_t lowaddr = 0;

        kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
                               NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
1323
        if (kernel_size == ELF_LOAD_WRONG_ENDIAN) {
1324 1325 1326 1327 1328
            kernel_size = load_elf(kernel_filename,
                                   translate_kernel_address, NULL,
                                   NULL, &lowaddr, NULL, 0, ELF_MACHINE, 0);
            kernel_le = kernel_size > 0;
        }
1329
        if (kernel_size < 0) {
1330 1331
            fprintf(stderr, "qemu: error loading %s: %s\n",
                    kernel_filename, load_elf_strerror(kernel_size));
1332 1333 1334 1335 1336
            exit(1);
        }

        /* load initrd */
        if (initrd_filename) {
1337 1338 1339 1340
            /* Try to locate the initrd in the gap between the kernel
             * and the firmware. Add a bit of space just in case
             */
            initrd_base = (KERNEL_LOAD_ADDR + kernel_size + 0x1ffff) & ~0xffff;
1341
            initrd_size = load_image_targphys(initrd_filename, initrd_base,
1342
                                              load_limit - initrd_base);
1343 1344 1345 1346 1347 1348 1349 1350 1351
            if (initrd_size < 0) {
                fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
                        initrd_filename);
                exit(1);
            }
        } else {
            initrd_base = 0;
            initrd_size = 0;
        }
1352
    }
1353

1354 1355 1356 1357
    if (bios_name == NULL) {
        bios_name = FW_FILE_NAME;
    }
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
1358 1359 1360 1361 1362 1363 1364 1365 1366
    fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
    if (fw_size < 0) {
        hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
        exit(1);
    }
    g_free(filename);

    spapr->entry_point = 0x100;

1367 1368 1369 1370
    vmstate_register(NULL, 0, &vmstate_spapr, spapr);
    register_savevm_live(NULL, "spapr/htab", -1, 1,
                         &savevm_htab_handlers, spapr);

1371
    /* Prepare the device tree */
1372
    spapr->fdt_skel = spapr_create_fdt_skel(initrd_base, initrd_size,
1373
                                            kernel_size, kernel_le,
1374 1375
                                            boot_device, kernel_cmdline,
                                            spapr->epow_irq);
1376
    assert(spapr->fdt_skel != NULL);
1377 1378
}

1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396
static int spapr_kvm_type(const char *vm_type)
{
    if (!vm_type) {
        return 0;
    }

    if (!strcmp(vm_type, "HV")) {
        return 1;
    }

    if (!strcmp(vm_type, "PR")) {
        return 2;
    }

    error_report("Unknown kvm-type specified '%s'", vm_type);
    exit(1);
}

1397 1398 1399
static QEMUMachine spapr_machine = {
    .name = "pseries",
    .desc = "pSeries Logical Partition (PAPR compliant)",
1400
    .is_default = 1,
1401
    .init = ppc_spapr_init,
1402
    .reset = ppc_spapr_reset,
1403
    .block_default_type = IF_SCSI,
1404 1405
    .max_cpus = MAX_CPUS,
    .no_parallel = 1,
1406
    .default_boot_order = NULL,
1407
    .kvm_type = spapr_kvm_type,
1408 1409 1410 1411 1412 1413 1414 1415
};

static void spapr_machine_init(void)
{
    qemu_register_machine(&spapr_machine);
}

machine_init(spapr_machine_init);