Futher we will support store queue size that is not power of 2.
However, currently there're still bugs.

just send data to lsroq to shorten load miss penalty.

So, no need to use DCacheAtomicsType.
We can reuse meta.id for other purpose.

Don't let atomics mess up with load unit.

writeback port.

Also, when two amo instructions enter in the same cycle, set ready
properly, so that, only one fires.

connects atomcs unit in memend.

Rename Misc Unit to atomics unit.

We put fence unit in MDU.

Concurrent modification to lru may be a problem.

Now, it can only do normal load.
It will replay req on cache miss.
Enough for dtlb ptw.