i915_drv.c 28.5 KB
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/* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
 */
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/*
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 *
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 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
 * All Rights Reserved.
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 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
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 */
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#include <linux/device.h>
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#include <drm/drmP.h>
#include <drm/i915_drm.h>
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#include "i915_drv.h"
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#include "i915_trace.h"
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#include "intel_drv.h"
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#include <linux/console.h>
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#include <linux/module.h>
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#include <drm/drm_crtc_helper.h>
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static int i915_modeset __read_mostly = -1;
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module_param_named(modeset, i915_modeset, int, 0400);
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MODULE_PARM_DESC(modeset,
		"Use kernel modesetting [KMS] (0=DRM_I915_KMS from .config, "
		"1=on, -1=force vga console preference [default])");
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unsigned int i915_fbpercrtc __always_unused = 0;
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module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
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int i915_panel_ignore_lid __read_mostly = 1;
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module_param_named(panel_ignore_lid, i915_panel_ignore_lid, int, 0600);
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MODULE_PARM_DESC(panel_ignore_lid,
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		"Override lid status (0=autodetect, 1=autodetect disabled [default], "
		"-1=force lid closed, -2=force lid open)");
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unsigned int i915_powersave __read_mostly = 1;
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module_param_named(powersave, i915_powersave, int, 0600);
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MODULE_PARM_DESC(powersave,
		"Enable powersavings, fbc, downclocking, etc. (default: true)");
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int i915_semaphores __read_mostly = -1;
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module_param_named(semaphores, i915_semaphores, int, 0600);
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MODULE_PARM_DESC(semaphores,
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		"Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))");
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int i915_enable_rc6 __read_mostly = -1;
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module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0400);
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MODULE_PARM_DESC(i915_enable_rc6,
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		"Enable power-saving render C-state 6. "
		"Different stages can be selected via bitmask values "
		"(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). "
		"For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. "
		"default: -1 (use per-chip default)");
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int i915_enable_fbc __read_mostly = -1;
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module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600);
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MODULE_PARM_DESC(i915_enable_fbc,
		"Enable frame buffer compression for power savings "
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		"(default: -1 (use per-chip default))");
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unsigned int i915_lvds_downclock __read_mostly = 0;
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module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
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MODULE_PARM_DESC(lvds_downclock,
		"Use panel (LVDS/eDP) downclocking for power savings "
		"(default: false)");
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int i915_lvds_channel_mode __read_mostly;
module_param_named(lvds_channel_mode, i915_lvds_channel_mode, int, 0600);
MODULE_PARM_DESC(lvds_channel_mode,
		 "Specify LVDS channel mode "
		 "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");

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int i915_panel_use_ssc __read_mostly = -1;
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module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600);
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MODULE_PARM_DESC(lvds_use_ssc,
		"Use Spread Spectrum Clock with panels [LVDS/eDP] "
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		"(default: auto from VBT)");
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int i915_vbt_sdvo_panel_type __read_mostly = -1;
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module_param_named(vbt_sdvo_panel_type, i915_vbt_sdvo_panel_type, int, 0600);
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MODULE_PARM_DESC(vbt_sdvo_panel_type,
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		"Override/Ignore selection of SDVO panel mode in the VBT "
		"(-2=ignore, -1=auto [default], index in VBT BIOS table)");
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static bool i915_try_reset __read_mostly = true;
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module_param_named(reset, i915_try_reset, bool, 0600);
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MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)");
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bool i915_enable_hangcheck __read_mostly = true;
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module_param_named(enable_hangcheck, i915_enable_hangcheck, bool, 0644);
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MODULE_PARM_DESC(enable_hangcheck,
		"Periodically check GPU activity for detecting hangs. "
		"WARNING: Disabling this can cause system wide hangs. "
		"(default: true)");
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int i915_enable_ppgtt __read_mostly = -1;
module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0600);
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MODULE_PARM_DESC(i915_enable_ppgtt,
		"Enable PPGTT (default: true)");

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int i915_enable_psr __read_mostly = 0;
module_param_named(enable_psr, i915_enable_psr, int, 0600);
MODULE_PARM_DESC(enable_psr, "Enable PSR (default: false)");

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unsigned int i915_preliminary_hw_support __read_mostly = IS_ENABLED(CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT);
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module_param_named(preliminary_hw_support, i915_preliminary_hw_support, int, 0600);
MODULE_PARM_DESC(preliminary_hw_support,
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		"Enable preliminary hardware support.");
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int i915_disable_power_well __read_mostly = 1;
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module_param_named(disable_power_well, i915_disable_power_well, int, 0600);
MODULE_PARM_DESC(disable_power_well,
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		 "Disable the power well when possible (default: true)");
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int i915_enable_ips __read_mostly = 1;
module_param_named(enable_ips, i915_enable_ips, int, 0600);
MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)");

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bool i915_fastboot __read_mostly = 0;
module_param_named(fastboot, i915_fastboot, bool, 0600);
MODULE_PARM_DESC(fastboot, "Try to skip unnecessary mode sets at boot time "
		 "(default: false)");

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int i915_enable_pc8 __read_mostly = 1;
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module_param_named(enable_pc8, i915_enable_pc8, int, 0600);
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MODULE_PARM_DESC(enable_pc8, "Enable support for low power package C states (PC8+) (default: true)");
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int i915_pc8_timeout __read_mostly = 5000;
module_param_named(pc8_timeout, i915_pc8_timeout, int, 0600);
MODULE_PARM_DESC(pc8_timeout, "Number of msecs of idleness required to enter PC8+ (default: 5000)");

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bool i915_prefault_disable __read_mostly;
module_param_named(prefault_disable, i915_prefault_disable, bool, 0600);
MODULE_PARM_DESC(prefault_disable,
		"Disable page prefaulting for pread/pwrite/reloc (default:false). For developers only.");

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static struct drm_driver driver;
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extern int intel_agp_enabled;
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static const struct intel_device_info intel_i830_info = {
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	.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
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	.has_overlay = 1, .overlay_needs_physical = 1,
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};

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static const struct intel_device_info intel_845g_info = {
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	.gen = 2, .num_pipes = 1,
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	.has_overlay = 1, .overlay_needs_physical = 1,
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};

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static const struct intel_device_info intel_i85x_info = {
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	.gen = 2, .is_i85x = 1, .is_mobile = 1, .num_pipes = 2,
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	.cursor_needs_physical = 1,
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	.has_overlay = 1, .overlay_needs_physical = 1,
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};

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static const struct intel_device_info intel_i865g_info = {
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	.gen = 2, .num_pipes = 1,
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	.has_overlay = 1, .overlay_needs_physical = 1,
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};

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static const struct intel_device_info intel_i915g_info = {
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	.gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
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	.has_overlay = 1, .overlay_needs_physical = 1,
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};
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static const struct intel_device_info intel_i915gm_info = {
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	.gen = 3, .is_mobile = 1, .num_pipes = 2,
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	.cursor_needs_physical = 1,
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	.has_overlay = 1, .overlay_needs_physical = 1,
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	.supports_tv = 1,
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};
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static const struct intel_device_info intel_i945g_info = {
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	.gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
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	.has_overlay = 1, .overlay_needs_physical = 1,
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};
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static const struct intel_device_info intel_i945gm_info = {
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	.gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
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	.has_hotplug = 1, .cursor_needs_physical = 1,
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	.has_overlay = 1, .overlay_needs_physical = 1,
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	.supports_tv = 1,
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};

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static const struct intel_device_info intel_i965g_info = {
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	.gen = 4, .is_broadwater = 1, .num_pipes = 2,
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	.has_hotplug = 1,
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	.has_overlay = 1,
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};

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static const struct intel_device_info intel_i965gm_info = {
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	.gen = 4, .is_crestline = 1, .num_pipes = 2,
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	.is_mobile = 1, .has_fbc = 1, .has_hotplug = 1,
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	.has_overlay = 1,
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	.supports_tv = 1,
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};

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static const struct intel_device_info intel_g33_info = {
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	.gen = 3, .is_g33 = 1, .num_pipes = 2,
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	.need_gfx_hws = 1, .has_hotplug = 1,
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	.has_overlay = 1,
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};

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static const struct intel_device_info intel_g45_info = {
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	.gen = 4, .is_g4x = 1, .need_gfx_hws = 1, .num_pipes = 2,
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	.has_pipe_cxsr = 1, .has_hotplug = 1,
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	.has_bsd_ring = 1,
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};

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static const struct intel_device_info intel_gm45_info = {
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	.gen = 4, .is_g4x = 1, .num_pipes = 2,
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	.is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1,
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	.has_pipe_cxsr = 1, .has_hotplug = 1,
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	.supports_tv = 1,
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	.has_bsd_ring = 1,
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};

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static const struct intel_device_info intel_pineview_info = {
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	.gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .num_pipes = 2,
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	.need_gfx_hws = 1, .has_hotplug = 1,
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	.has_overlay = 1,
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};

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static const struct intel_device_info intel_ironlake_d_info = {
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	.gen = 5, .num_pipes = 2,
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	.need_gfx_hws = 1, .has_hotplug = 1,
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	.has_bsd_ring = 1,
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};

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static const struct intel_device_info intel_ironlake_m_info = {
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	.gen = 5, .is_mobile = 1, .num_pipes = 2,
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	.need_gfx_hws = 1, .has_hotplug = 1,
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	.has_fbc = 1,
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	.has_bsd_ring = 1,
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};

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static const struct intel_device_info intel_sandybridge_d_info = {
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	.gen = 6, .num_pipes = 2,
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	.need_gfx_hws = 1, .has_hotplug = 1,
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	.has_bsd_ring = 1,
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	.has_blt_ring = 1,
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	.has_llc = 1,
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};

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static const struct intel_device_info intel_sandybridge_m_info = {
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	.gen = 6, .is_mobile = 1, .num_pipes = 2,
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	.need_gfx_hws = 1, .has_hotplug = 1,
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	.has_fbc = 1,
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	.has_bsd_ring = 1,
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	.has_blt_ring = 1,
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	.has_llc = 1,
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};

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#define GEN7_FEATURES  \
	.gen = 7, .num_pipes = 3, \
	.need_gfx_hws = 1, .has_hotplug = 1, \
	.has_bsd_ring = 1, \
	.has_blt_ring = 1, \
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	.has_llc = 1
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static const struct intel_device_info intel_ivybridge_d_info = {
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	GEN7_FEATURES,
	.is_ivybridge = 1,
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};

static const struct intel_device_info intel_ivybridge_m_info = {
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	GEN7_FEATURES,
	.is_ivybridge = 1,
	.is_mobile = 1,
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	.has_fbc = 1,
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};

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static const struct intel_device_info intel_ivybridge_q_info = {
	GEN7_FEATURES,
	.is_ivybridge = 1,
	.num_pipes = 0, /* legal, last one wins */
};

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static const struct intel_device_info intel_valleyview_m_info = {
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	GEN7_FEATURES,
	.is_mobile = 1,
	.num_pipes = 2,
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	.is_valleyview = 1,
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	.display_mmio_offset = VLV_DISPLAY_BASE,
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	.has_llc = 0, /* legal, last one wins */
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};

static const struct intel_device_info intel_valleyview_d_info = {
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	GEN7_FEATURES,
	.num_pipes = 2,
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	.is_valleyview = 1,
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	.display_mmio_offset = VLV_DISPLAY_BASE,
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	.has_llc = 0, /* legal, last one wins */
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};

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static const struct intel_device_info intel_haswell_d_info = {
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	GEN7_FEATURES,
	.is_haswell = 1,
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	.has_ddi = 1,
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	.has_fpga_dbg = 1,
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	.has_vebox_ring = 1,
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};

static const struct intel_device_info intel_haswell_m_info = {
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	GEN7_FEATURES,
	.is_haswell = 1,
	.is_mobile = 1,
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	.has_ddi = 1,
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	.has_fpga_dbg = 1,
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	.has_fbc = 1,
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	.has_vebox_ring = 1,
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};

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/*
 * Make sure any device matches here are from most specific to most
 * general.  For example, since the Quanta match is based on the subsystem
 * and subvendor IDs, we need it to come before the more general IVB
 * PCI ID matches, otherwise we'll use the wrong info struct above.
 */
#define INTEL_PCI_IDS \
	INTEL_I830_IDS(&intel_i830_info),	\
	INTEL_I845G_IDS(&intel_845g_info),	\
	INTEL_I85X_IDS(&intel_i85x_info),	\
	INTEL_I865G_IDS(&intel_i865g_info),	\
	INTEL_I915G_IDS(&intel_i915g_info),	\
	INTEL_I915GM_IDS(&intel_i915gm_info),	\
	INTEL_I945G_IDS(&intel_i945g_info),	\
	INTEL_I945GM_IDS(&intel_i945gm_info),	\
	INTEL_I965G_IDS(&intel_i965g_info),	\
	INTEL_G33_IDS(&intel_g33_info),		\
	INTEL_I965GM_IDS(&intel_i965gm_info),	\
	INTEL_GM45_IDS(&intel_gm45_info), 	\
	INTEL_G45_IDS(&intel_g45_info), 	\
	INTEL_PINEVIEW_IDS(&intel_pineview_info),	\
	INTEL_IRONLAKE_D_IDS(&intel_ironlake_d_info),	\
	INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info),	\
	INTEL_SNB_D_IDS(&intel_sandybridge_d_info),	\
	INTEL_SNB_M_IDS(&intel_sandybridge_m_info),	\
	INTEL_IVB_Q_IDS(&intel_ivybridge_q_info), /* must be first IVB */ \
	INTEL_IVB_M_IDS(&intel_ivybridge_m_info),	\
	INTEL_IVB_D_IDS(&intel_ivybridge_d_info),	\
	INTEL_HSW_D_IDS(&intel_haswell_d_info), \
	INTEL_HSW_M_IDS(&intel_haswell_m_info), \
	INTEL_VLV_M_IDS(&intel_valleyview_m_info),	\
	INTEL_VLV_D_IDS(&intel_valleyview_d_info)

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static const struct pci_device_id pciidlist[] = {		/* aka */
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	INTEL_PCI_IDS,
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	{0, 0, 0}
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};

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#if defined(CONFIG_DRM_I915_KMS)
MODULE_DEVICE_TABLE(pci, pciidlist);
#endif

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void intel_detect_pch(struct drm_device *dev)
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{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct pci_dev *pch;

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	/* In all current cases, num_pipes is equivalent to the PCH_NOP setting
	 * (which really amounts to a PCH but no South Display).
	 */
	if (INTEL_INFO(dev)->num_pipes == 0) {
		dev_priv->pch_type = PCH_NOP;
		return;
	}

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	/*
	 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
	 * make graphics device passthrough work easy for VMM, that only
	 * need to expose ISA bridge to let driver know the real hardware
	 * underneath. This is a requirement from virtualization team.
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	 *
	 * In some virtualized environments (e.g. XEN), there is irrelevant
	 * ISA bridge in the system. To work reliably, we should scan trhough
	 * all the ISA bridge devices and check for the first match, instead
	 * of only checking the first one.
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	 */
	pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
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	while (pch) {
		struct pci_dev *curr = pch;
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		if (pch->vendor == PCI_VENDOR_ID_INTEL) {
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			unsigned short id;
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			id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
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			dev_priv->pch_id = id;
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			if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
				dev_priv->pch_type = PCH_IBX;
				DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
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				WARN_ON(!IS_GEN5(dev));
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			} else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
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				dev_priv->pch_type = PCH_CPT;
				DRM_DEBUG_KMS("Found CougarPoint PCH\n");
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				WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
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			} else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
				/* PantherPoint is CPT compatible */
				dev_priv->pch_type = PCH_CPT;
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				DRM_DEBUG_KMS("Found PantherPoint PCH\n");
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				WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
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			} else if (id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
				dev_priv->pch_type = PCH_LPT;
				DRM_DEBUG_KMS("Found LynxPoint PCH\n");
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				WARN_ON(!IS_HASWELL(dev));
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				WARN_ON(IS_ULT(dev));
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			} else if (id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
				dev_priv->pch_type = PCH_LPT;
				DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
				WARN_ON(!IS_HASWELL(dev));
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				WARN_ON(!IS_ULT(dev));
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			} else {
				goto check_next;
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			}
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			pci_dev_put(pch);
			break;
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		}
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check_next:
		pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, curr);
		pci_dev_put(curr);
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	}
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	if (!pch)
		DRM_DEBUG_KMS("No PCH found?\n");
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}

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bool i915_semaphore_is_enabled(struct drm_device *dev)
{
	if (INTEL_INFO(dev)->gen < 6)
		return 0;

	if (i915_semaphores >= 0)
		return i915_semaphores;

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#ifdef CONFIG_INTEL_IOMMU
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	/* Enable semaphores on SNB when IO remapping is off */
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	if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped)
		return false;
#endif
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	return 1;
}

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static int i915_drm_freeze(struct drm_device *dev)
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{
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	struct drm_i915_private *dev_priv = dev->dev_private;
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	struct drm_crtc *crtc;
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	/* ignore lid events during suspend */
	mutex_lock(&dev_priv->modeset_restore_lock);
	dev_priv->modeset_restore = MODESET_SUSPENDED;
	mutex_unlock(&dev_priv->modeset_restore_lock);

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	/* We do a lot of poking in a lot of registers, make sure they work
	 * properly. */
	hsw_disable_package_c8(dev_priv);
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	intel_set_power_well(dev, true);

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	drm_kms_helper_poll_disable(dev);

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	pci_save_state(dev->pdev);

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	/* If KMS is active, we do the leavevt stuff here */
479
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
480 481 482 483 484
		int error;

		mutex_lock(&dev->struct_mutex);
		error = i915_gem_idle(dev);
		mutex_unlock(&dev->struct_mutex);
485
		if (error) {
486
			dev_err(&dev->pdev->dev,
487 488 489
				"GEM idle failed, resume might fail\n");
			return error;
		}
490

491 492
		cancel_delayed_work_sync(&dev_priv->rps.delayed_resume_work);

493
		drm_irq_uninstall(dev);
494
		dev_priv->enable_hotplug_processing = false;
495 496 497 498 499 500
		/*
		 * Disable CRTCs directly since we want to preserve sw state
		 * for _thaw.
		 */
		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
			dev_priv->display.crtc_disable(crtc);
501 502

		intel_modeset_suspend_hw(dev);
503 504
	}

505 506
	i915_save_state(dev);

507
	intel_opregion_fini(dev);
508

509
	console_lock();
510
	intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED);
511 512
	console_unlock();

513
	return 0;
514 515
}

516
int i915_suspend(struct drm_device *dev, pm_message_t state)
517 518 519 520 521 522 523 524 525 526 527 528
{
	int error;

	if (!dev || !dev->dev_private) {
		DRM_ERROR("dev: %p\n", dev);
		DRM_ERROR("DRM not initialized, aborting suspend.\n");
		return -ENODEV;
	}

	if (state.event == PM_EVENT_PRETHAW)
		return 0;

529 530 531

	if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
		return 0;
532

533 534 535 536
	error = i915_drm_freeze(dev);
	if (error)
		return error;

537 538 539 540 541
	if (state.event == PM_EVENT_SUSPEND) {
		/* Shut down the device */
		pci_disable_device(dev->pdev);
		pci_set_power_state(dev->pdev, PCI_D3hot);
	}
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	return 0;
}

546 547 548 549 550 551 552 553
void intel_console_resume(struct work_struct *work)
{
	struct drm_i915_private *dev_priv =
		container_of(work, struct drm_i915_private,
			     console_resume_work);
	struct drm_device *dev = dev_priv->dev;

	console_lock();
554
	intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING);
555 556 557
	console_unlock();
}

558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575
static void intel_resume_hotplug(struct drm_device *dev)
{
	struct drm_mode_config *mode_config = &dev->mode_config;
	struct intel_encoder *encoder;

	mutex_lock(&mode_config->mutex);
	DRM_DEBUG_KMS("running encoder hotplug functions\n");

	list_for_each_entry(encoder, &mode_config->encoder_list, base.head)
		if (encoder->hot_plug)
			encoder->hot_plug(encoder);

	mutex_unlock(&mode_config->mutex);

	/* Just fire off a uevent and let userspace tell us what to do */
	drm_helper_hpd_irq_event(dev);
}

576
static int __i915_drm_thaw(struct drm_device *dev, bool restore_gtt_mappings)
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{
578
	struct drm_i915_private *dev_priv = dev->dev_private;
579
	int error = 0;
580

581 582
	intel_uncore_early_sanitize(dev);

583 584 585 586 587 588 589 590 591
	intel_uncore_sanitize(dev);

	if (drm_core_check_feature(dev, DRIVER_MODESET) &&
	    restore_gtt_mappings) {
		mutex_lock(&dev->struct_mutex);
		i915_gem_restore_gtt_mappings(dev);
		mutex_unlock(&dev->struct_mutex);
	}

592 593
	intel_init_power_well(dev);

594
	i915_restore_state(dev);
595
	intel_opregion_setup(dev);
596

597 598
	/* KMS EnterVT equivalent */
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
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Paulo Zanoni 已提交
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		intel_init_pch_refclk(dev);
600

601 602
		mutex_lock(&dev->struct_mutex);

603
		error = i915_gem_init_hw(dev);
604
		mutex_unlock(&dev->struct_mutex);
605

606 607 608
		/* We need working interrupts for modeset enabling ... */
		drm_irq_install(dev);

609
		intel_modeset_init_hw(dev);
610 611 612 613

		drm_modeset_lock_all(dev);
		intel_modeset_setup_hw_state(dev, true);
		drm_modeset_unlock_all(dev);
614 615 616 617 618 619 620

		/*
		 * ... but also need to make sure that hotplug processing
		 * doesn't cause havoc. Like in the driver load code we don't
		 * bother with the tiny race here where we might loose hotplug
		 * notifications.
		 * */
621
		intel_hpd_init(dev);
622
		dev_priv->enable_hotplug_processing = true;
623 624
		/* Config may have changed between suspend and resume */
		intel_resume_hotplug(dev);
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	}
626

627 628
	intel_opregion_init(dev);

629 630 631 632 633 634
	/*
	 * The console lock can be pretty contented on resume due
	 * to all the printk activity.  Try to keep it out of the hot
	 * path of resume if possible.
	 */
	if (console_trylock()) {
635
		intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING);
636 637 638 639 640
		console_unlock();
	} else {
		schedule_work(&dev_priv->console_resume_work);
	}

641 642 643 644
	/* Undo what we did at i915_drm_freeze so the refcount goes back to the
	 * expected level. */
	hsw_enable_package_c8(dev_priv);

645 646 647
	mutex_lock(&dev_priv->modeset_restore_lock);
	dev_priv->modeset_restore = MODESET_DONE;
	mutex_unlock(&dev_priv->modeset_restore_lock);
648 649 650
	return error;
}

651 652
static int i915_drm_thaw(struct drm_device *dev)
{
653
	return __i915_drm_thaw(dev, true);
654 655
}

656
int i915_resume(struct drm_device *dev)
657
{
658
	struct drm_i915_private *dev_priv = dev->dev_private;
659 660
	int ret;

661 662 663
	if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
		return 0;

664 665 666 667 668
	if (pci_enable_device(dev->pdev))
		return -EIO;

	pci_set_master(dev->pdev);

669 670
	/*
	 * Platforms with opregion should have sane BIOS, older ones (gen3 and
671 672
	 * earlier) need to restore the GTT mappings since the BIOS might clear
	 * all our scratch PTEs.
673
	 */
674
	ret = __i915_drm_thaw(dev, !dev_priv->opregion.header);
675 676 677 678 679
	if (ret)
		return ret;

	drm_kms_helper_poll_enable(dev);
	return 0;
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}

682
/**
683
 * i915_reset - reset chip after a hang
684 685 686 687 688 689 690 691 692 693 694 695 696
 * @dev: drm device to reset
 *
 * Reset the chip.  Useful if a hang is detected. Returns zero on successful
 * reset or otherwise an error code.
 *
 * Procedure is fairly simple:
 *   - reset the chip using the reset reg
 *   - re-init context state
 *   - re-init hardware status page
 *   - re-init ring buffer
 *   - re-init interrupt state
 *   - re-init display
 */
697
int i915_reset(struct drm_device *dev)
698 699
{
	drm_i915_private_t *dev_priv = dev->dev_private;
700
	bool simulated;
701
	int ret;
702

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	if (!i915_try_reset)
		return 0;

706
	mutex_lock(&dev->struct_mutex);
707

708
	i915_gem_reset(dev);
709

710 711
	simulated = dev_priv->gpu_error.stop_rings != 0;

712 713 714 715 716 717 718 719 720 721 722
	ret = intel_gpu_reset(dev);

	/* Also reset the gpu hangman. */
	if (simulated) {
		DRM_INFO("Simulated gpu hang, resetting stop_rings\n");
		dev_priv->gpu_error.stop_rings = 0;
		if (ret == -ENODEV) {
			DRM_ERROR("Reset not implemented, but ignoring "
				  "error for simulated gpu hangs\n");
			ret = 0;
		}
723
	}
724

725
	if (ret) {
726
		DRM_ERROR("Failed to reset chip.\n");
727
		mutex_unlock(&dev->struct_mutex);
728
		return ret;
729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745
	}

	/* Ok, now get things going again... */

	/*
	 * Everything depends on having the GTT running, so we need to start
	 * there.  Fortunately we don't need to do this unless we reset the
	 * chip at a PCI level.
	 *
	 * Next we need to restore the context, but we don't use those
	 * yet either...
	 *
	 * Ring buffer needs to be re-initialized in the KMS case, or if X
	 * was running at the time of the reset (i.e. we weren't VT
	 * switched away).
	 */
	if (drm_core_check_feature(dev, DRIVER_MODESET) ||
746
			!dev_priv->ums.mm_suspended) {
747 748 749
		struct intel_ring_buffer *ring;
		int i;

750
		dev_priv->ums.mm_suspended = 0;
751

752 753
		i915_gem_init_swizzling(dev);

754 755
		for_each_ring(ring, dev_priv, i)
			ring->init(ring);
756

757
		i915_gem_context_init(dev);
758 759 760 761 762
		if (dev_priv->mm.aliasing_ppgtt) {
			ret = dev_priv->mm.aliasing_ppgtt->enable(dev);
			if (ret)
				i915_gem_cleanup_aliasing_ppgtt(dev);
		}
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Daniel Vetter 已提交
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764 765 766 767 768
		/*
		 * It would make sense to re-init all the other hw state, at
		 * least the rps/rc6/emon init done within modeset_init_hw. For
		 * some unknown reason, this blows up my ilk, so don't.
		 */
769

770
		mutex_unlock(&dev->struct_mutex);
771

772 773
		drm_irq_uninstall(dev);
		drm_irq_install(dev);
774
		intel_hpd_init(dev);
775 776
	} else {
		mutex_unlock(&dev->struct_mutex);
777 778 779 780 781
	}

	return 0;
}

782
static int i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
783
{
784 785 786
	struct intel_device_info *intel_info =
		(struct intel_device_info *) ent->driver_data;

787 788 789 790 791 792
	if (IS_PRELIMINARY_HW(intel_info) && !i915_preliminary_hw_support) {
		DRM_INFO("This hardware requires preliminary hardware support.\n"
			 "See CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT, and/or modparam preliminary_hw_support\n");
		return -ENODEV;
	}

793 794 795 796 797 798 799 800
	/* Only bind to function 0 of the device. Early generations
	 * used function 1 as a placeholder for multi-head. This causes
	 * us confusion instead, especially on the systems where both
	 * functions have the same PCI-ID!
	 */
	if (PCI_FUNC(pdev->devfn))
		return -ENODEV;

801 802 803 804 805 806 807 808 809 810 811 812
	/* We've managed to ship a kms-enabled ddx that shipped with an XvMC
	 * implementation for gen3 (and only gen3) that used legacy drm maps
	 * (gasp!) to share buffers between X and the client. Hence we need to
	 * keep around the fake agp stuff for gen3, even when kms is enabled. */
	if (intel_info->gen != 3) {
		driver.driver_features &=
			~(DRIVER_USE_AGP | DRIVER_REQUIRE_AGP);
	} else if (!intel_agp_enabled) {
		DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
		return -ENODEV;
	}

813
	return drm_get_pci_dev(pdev, ent, &driver);
814 815 816 817 818 819 820 821 822 823
}

static void
i915_pci_remove(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	drm_put_dev(dev);
}

824
static int i915_pm_suspend(struct device *dev)
825
{
826 827 828
	struct pci_dev *pdev = to_pci_dev(dev);
	struct drm_device *drm_dev = pci_get_drvdata(pdev);
	int error;
829

830 831 832 833
	if (!drm_dev || !drm_dev->dev_private) {
		dev_err(dev, "DRM not initialized, aborting suspend.\n");
		return -ENODEV;
	}
834

835 836 837
	if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
		return 0;

838 839 840
	error = i915_drm_freeze(drm_dev);
	if (error)
		return error;
841

842 843
	pci_disable_device(pdev);
	pci_set_power_state(pdev, PCI_D3hot);
844

845
	return 0;
846 847
}

848
static int i915_pm_resume(struct device *dev)
849
{
850 851 852 853
	struct pci_dev *pdev = to_pci_dev(dev);
	struct drm_device *drm_dev = pci_get_drvdata(pdev);

	return i915_resume(drm_dev);
854 855
}

856
static int i915_pm_freeze(struct device *dev)
857
{
858 859 860 861 862 863 864 865 866
	struct pci_dev *pdev = to_pci_dev(dev);
	struct drm_device *drm_dev = pci_get_drvdata(pdev);

	if (!drm_dev || !drm_dev->dev_private) {
		dev_err(dev, "DRM not initialized, aborting suspend.\n");
		return -ENODEV;
	}

	return i915_drm_freeze(drm_dev);
867 868
}

869
static int i915_pm_thaw(struct device *dev)
870
{
871 872 873 874
	struct pci_dev *pdev = to_pci_dev(dev);
	struct drm_device *drm_dev = pci_get_drvdata(pdev);

	return i915_drm_thaw(drm_dev);
875 876
}

877
static int i915_pm_poweroff(struct device *dev)
878
{
879 880 881
	struct pci_dev *pdev = to_pci_dev(dev);
	struct drm_device *drm_dev = pci_get_drvdata(pdev);

882
	return i915_drm_freeze(drm_dev);
883 884
}

885
static const struct dev_pm_ops i915_pm_ops = {
886 887 888 889 890 891
	.suspend = i915_pm_suspend,
	.resume = i915_pm_resume,
	.freeze = i915_pm_freeze,
	.thaw = i915_pm_thaw,
	.poweroff = i915_pm_poweroff,
	.restore = i915_pm_resume,
892 893
};

894
static const struct vm_operations_struct i915_gem_vm_ops = {
895
	.fault = i915_gem_fault,
896 897
	.open = drm_gem_vm_open,
	.close = drm_gem_vm_close,
898 899
};

900 901 902 903 904 905 906 907 908 909 910 911 912 913
static const struct file_operations i915_driver_fops = {
	.owner = THIS_MODULE,
	.open = drm_open,
	.release = drm_release,
	.unlocked_ioctl = drm_ioctl,
	.mmap = drm_gem_mmap,
	.poll = drm_poll,
	.read = drm_read,
#ifdef CONFIG_COMPAT
	.compat_ioctl = i915_compat_ioctl,
#endif
	.llseek = noop_llseek,
};

L
Linus Torvalds 已提交
914
static struct drm_driver driver = {
915 916
	/* Don't use MTRRs here; the Xserver or userspace app should
	 * deal with them for Intel hardware.
D
Dave Airlie 已提交
917
	 */
918
	.driver_features =
919
	    DRIVER_USE_AGP | DRIVER_REQUIRE_AGP |
920 921
	    DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | DRIVER_PRIME |
	    DRIVER_RENDER,
922
	.load = i915_driver_load,
J
Jesse Barnes 已提交
923
	.unload = i915_driver_unload,
924
	.open = i915_driver_open,
925 926
	.lastclose = i915_driver_lastclose,
	.preclose = i915_driver_preclose,
927
	.postclose = i915_driver_postclose,
928 929 930 931 932

	/* Used in place of i915_pm_ops for non-DRIVER_MODESET */
	.suspend = i915_suspend,
	.resume = i915_resume,

933
	.device_is_agp = i915_driver_device_is_agp,
934 935
	.master_create = i915_master_create,
	.master_destroy = i915_master_destroy,
936
#if defined(CONFIG_DEBUG_FS)
937 938
	.debugfs_init = i915_debugfs_init,
	.debugfs_cleanup = i915_debugfs_cleanup,
939
#endif
940
	.gem_free_object = i915_gem_free_object,
941
	.gem_vm_ops = &i915_gem_vm_ops,
942 943 944 945 946 947

	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	.gem_prime_export = i915_gem_prime_export,
	.gem_prime_import = i915_gem_prime_import,

948 949
	.dumb_create = i915_gem_dumb_create,
	.dumb_map_offset = i915_gem_mmap_gtt,
950
	.dumb_destroy = drm_gem_dumb_destroy,
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Linus Torvalds 已提交
951
	.ioctls = i915_ioctls,
952
	.fops = &i915_driver_fops,
953 954 955 956 957 958
	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
	.patchlevel = DRIVER_PATCHLEVEL,
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Linus Torvalds 已提交
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};

961 962 963 964 965 966 967 968
static struct pci_driver i915_pci_driver = {
	.name = DRIVER_NAME,
	.id_table = pciidlist,
	.probe = i915_pci_probe,
	.remove = i915_pci_remove,
	.driver.pm = &i915_pm_ops,
};

L
Linus Torvalds 已提交
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static int __init i915_init(void)
{
	driver.num_ioctls = i915_max_ioctl;
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Jesse Barnes 已提交
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	/*
	 * If CONFIG_DRM_I915_KMS is set, default to KMS unless
	 * explicitly disabled with the module pararmeter.
	 *
	 * Otherwise, just follow the parameter (defaulting to off).
	 *
	 * Allow optional vga_text_mode_force boot option to override
	 * the default behavior.
	 */
#if defined(CONFIG_DRM_I915_KMS)
	if (i915_modeset != 0)
		driver.driver_features |= DRIVER_MODESET;
#endif
	if (i915_modeset == 1)
		driver.driver_features |= DRIVER_MODESET;

#ifdef CONFIG_VGA_CONSOLE
	if (vgacon_text_force() && i915_modeset == -1)
		driver.driver_features &= ~DRIVER_MODESET;
#endif

994 995 996
	if (!(driver.driver_features & DRIVER_MODESET))
		driver.get_vblank_timestamp = NULL;

997
	return drm_pci_init(&driver, &i915_pci_driver);
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Linus Torvalds 已提交
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}

static void __exit i915_exit(void)
{
1002
	drm_pci_exit(&driver, &i915_pci_driver);
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Linus Torvalds 已提交
1003 1004 1005 1006 1007
}

module_init(i915_init);
module_exit(i915_exit);

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Dave Airlie 已提交
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MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
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Linus Torvalds 已提交
1010
MODULE_LICENSE("GPL and additional rights");