i915_drv.c 20.0 KB
Newer Older
L
Linus Torvalds 已提交
1 2
/* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
 */
D
Dave Airlie 已提交
3
/*
4
 *
L
Linus Torvalds 已提交
5 6
 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
 * All Rights Reserved.
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
D
Dave Airlie 已提交
28
 */
L
Linus Torvalds 已提交
29

30
#include <linux/device.h>
L
Linus Torvalds 已提交
31 32 33 34
#include "drmP.h"
#include "drm.h"
#include "i915_drm.h"
#include "i915_drv.h"
35
#include "intel_drv.h"
L
Linus Torvalds 已提交
36

J
Jesse Barnes 已提交
37
#include <linux/console.h>
38
#include "drm_crtc_helper.h"
J
Jesse Barnes 已提交
39

K
Kyle McMartin 已提交
40
static int i915_modeset = -1;
J
Jesse Barnes 已提交
41 42 43 44
module_param_named(modeset, i915_modeset, int, 0400);

unsigned int i915_fbpercrtc = 0;
module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
L
Linus Torvalds 已提交
45

46
unsigned int i915_powersave = 1;
47
module_param_named(powersave, i915_powersave, int, 0600);
48

49 50 51
unsigned int i915_lvds_downclock = 0;
module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);

C
Chris Wilson 已提交
52 53 54
bool i915_try_reset = true;
module_param_named(reset, i915_try_reset, bool, 0600);

55
static struct drm_driver driver;
56
extern int intel_agp_enabled;
57

58
#define INTEL_VGA_DEVICE(id, info) {		\
59 60 61 62 63 64
	.class = PCI_CLASS_DISPLAY_VGA << 8,	\
	.class_mask = 0xffff00,			\
	.vendor = 0x8086,			\
	.device = id,				\
	.subvendor = PCI_ANY_ID,		\
	.subdevice = PCI_ANY_ID,		\
65 66
	.driver_data = (unsigned long) info }

67
static const struct intel_device_info intel_i830_info = {
68
	.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1,
69
	.has_overlay = 1, .overlay_needs_physical = 1,
70 71
};

72
static const struct intel_device_info intel_845g_info = {
73
	.gen = 2,
74
	.has_overlay = 1, .overlay_needs_physical = 1,
75 76
};

77
static const struct intel_device_info intel_i85x_info = {
78
	.gen = 2, .is_i85x = 1, .is_mobile = 1,
79
	.cursor_needs_physical = 1,
80
	.has_overlay = 1, .overlay_needs_physical = 1,
81 82
};

83
static const struct intel_device_info intel_i865g_info = {
84
	.gen = 2,
85
	.has_overlay = 1, .overlay_needs_physical = 1,
86 87
};

88
static const struct intel_device_info intel_i915g_info = {
89
	.gen = 3, .is_i915g = 1, .cursor_needs_physical = 1,
90
	.has_overlay = 1, .overlay_needs_physical = 1,
91
};
92
static const struct intel_device_info intel_i915gm_info = {
93
	.gen = 3, .is_mobile = 1,
94
	.cursor_needs_physical = 1,
95
	.has_overlay = 1, .overlay_needs_physical = 1,
96
	.supports_tv = 1,
97
};
98
static const struct intel_device_info intel_i945g_info = {
99
	.gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1,
100
	.has_overlay = 1, .overlay_needs_physical = 1,
101
};
102
static const struct intel_device_info intel_i945gm_info = {
103
	.gen = 3, .is_i945gm = 1, .is_mobile = 1,
104
	.has_hotplug = 1, .cursor_needs_physical = 1,
105
	.has_overlay = 1, .overlay_needs_physical = 1,
106
	.supports_tv = 1,
107 108
};

109
static const struct intel_device_info intel_i965g_info = {
110
	.gen = 4, .is_broadwater = 1,
111
	.has_hotplug = 1,
112
	.has_overlay = 1,
113 114
};

115
static const struct intel_device_info intel_i965gm_info = {
116
	.gen = 4, .is_crestline = 1,
117
	.is_mobile = 1, .has_fbc = 1, .has_hotplug = 1,
118
	.has_overlay = 1,
119
	.supports_tv = 1,
120 121
};

122
static const struct intel_device_info intel_g33_info = {
123
	.gen = 3, .is_g33 = 1,
124
	.need_gfx_hws = 1, .has_hotplug = 1,
125
	.has_overlay = 1,
126 127
};

128
static const struct intel_device_info intel_g45_info = {
129
	.gen = 4, .is_g4x = 1, .need_gfx_hws = 1,
130
	.has_pipe_cxsr = 1, .has_hotplug = 1,
131
	.has_bsd_ring = 1,
132 133
};

134
static const struct intel_device_info intel_gm45_info = {
135
	.gen = 4, .is_g4x = 1,
136
	.is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1,
137
	.has_pipe_cxsr = 1, .has_hotplug = 1,
138
	.supports_tv = 1,
139
	.has_bsd_ring = 1,
140 141
};

142
static const struct intel_device_info intel_pineview_info = {
143
	.gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1,
144
	.need_gfx_hws = 1, .has_hotplug = 1,
145
	.has_overlay = 1,
146 147
};

148
static const struct intel_device_info intel_ironlake_d_info = {
149
	.gen = 5,
150
	.need_gfx_hws = 1, .has_pipe_cxsr = 1, .has_hotplug = 1,
151
	.has_bsd_ring = 1,
152 153
};

154
static const struct intel_device_info intel_ironlake_m_info = {
155
	.gen = 5, .is_mobile = 1,
156
	.need_gfx_hws = 1, .has_hotplug = 1,
157
	.has_fbc = 0, /* disabled due to buggy hardware */
158
	.has_bsd_ring = 1,
159 160
};

161
static const struct intel_device_info intel_sandybridge_d_info = {
162
	.gen = 6,
163
	.need_gfx_hws = 1, .has_hotplug = 1,
164
	.has_bsd_ring = 1,
165
	.has_blt_ring = 1,
166 167
};

168
static const struct intel_device_info intel_sandybridge_m_info = {
169
	.gen = 6, .is_mobile = 1,
170
	.need_gfx_hws = 1, .has_hotplug = 1,
171
	.has_fbc = 1,
172
	.has_bsd_ring = 1,
173
	.has_blt_ring = 1,
174 175
};

176 177 178 179
static const struct pci_device_id pciidlist[] = {		/* aka */
	INTEL_VGA_DEVICE(0x3577, &intel_i830_info),		/* I830_M */
	INTEL_VGA_DEVICE(0x2562, &intel_845g_info),		/* 845_G */
	INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),		/* I855_GM */
180
	INTEL_VGA_DEVICE(0x358e, &intel_i85x_info),
181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202
	INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),		/* I865_G */
	INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),		/* I915_G */
	INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),		/* E7221_G */
	INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),		/* I915_GM */
	INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),		/* I945_G */
	INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),		/* I945_GM */
	INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),		/* I945_GME */
	INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),		/* I946_GZ */
	INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),		/* G35_G */
	INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),		/* I965_Q */
	INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),		/* I965_G */
	INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),		/* Q35_G */
	INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),		/* G33_G */
	INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),		/* Q33_G */
	INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),		/* I965_GM */
	INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),		/* I965_GME */
	INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),		/* GM45_G */
	INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),		/* IGD_E_G */
	INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),		/* Q45_G */
	INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),		/* G45_G */
	INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),		/* G41_G */
	INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),		/* B43_G */
203
	INTEL_VGA_DEVICE(0x2e92, &intel_g45_info),		/* B43_G.1 */
204 205 206 207
	INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
	INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
	INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
	INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
208
	INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
209 210
	INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info),
	INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info),
211
	INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
212
	INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),
213
	INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),
214
	INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),
215
	{0, 0, 0}
L
Linus Torvalds 已提交
216 217
};

J
Jesse Barnes 已提交
218 219 220 221
#if defined(CONFIG_DRM_I915_KMS)
MODULE_DEVICE_TABLE(pci, pciidlist);
#endif

222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250
#define INTEL_PCH_DEVICE_ID_MASK	0xff00
#define INTEL_PCH_CPT_DEVICE_ID_TYPE	0x1c00

void intel_detect_pch (struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct pci_dev *pch;

	/*
	 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
	 * make graphics device passthrough work easy for VMM, that only
	 * need to expose ISA bridge to let driver know the real hardware
	 * underneath. This is a requirement from virtualization team.
	 */
	pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
	if (pch) {
		if (pch->vendor == PCI_VENDOR_ID_INTEL) {
			int id;
			id = pch->device & INTEL_PCH_DEVICE_ID_MASK;

			if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
				dev_priv->pch_type = PCH_CPT;
				DRM_DEBUG_KMS("Found CougarPoint PCH\n");
			}
		}
		pci_dev_put(pch);
	}
}

251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272
void __gen6_force_wake_get(struct drm_i915_private *dev_priv)
{
	int count;

	count = 0;
	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
		udelay(10);

	I915_WRITE_NOTRACE(FORCEWAKE, 1);
	POSTING_READ(FORCEWAKE);

	count = 0;
	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)
		udelay(10);
}

void __gen6_force_wake_put(struct drm_i915_private *dev_priv)
{
	I915_WRITE_NOTRACE(FORCEWAKE, 0);
	POSTING_READ(FORCEWAKE);
}

273
static int i915_drm_freeze(struct drm_device *dev)
J
Jesse Barnes 已提交
274
{
275 276
	struct drm_i915_private *dev_priv = dev->dev_private;

277 278
	drm_kms_helper_poll_disable(dev);

J
Jesse Barnes 已提交
279 280
	pci_save_state(dev->pdev);

281
	/* If KMS is active, we do the leavevt stuff here */
282
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
283 284
		int error = i915_gem_idle(dev);
		if (error) {
285
			dev_err(&dev->pdev->dev,
286 287 288
				"GEM idle failed, resume might fail\n");
			return error;
		}
289
		drm_irq_uninstall(dev);
290 291
	}

292 293
	i915_save_state(dev);

294
	intel_opregion_fini(dev);
295

296 297
	/* Modeset on resume, not lid events */
	dev_priv->modeset_on_lid = 0;
298 299

	return 0;
300 301
}

302
int i915_suspend(struct drm_device *dev, pm_message_t state)
303 304 305 306 307 308 309 310 311 312 313 314
{
	int error;

	if (!dev || !dev->dev_private) {
		DRM_ERROR("dev: %p\n", dev);
		DRM_ERROR("DRM not initialized, aborting suspend.\n");
		return -ENODEV;
	}

	if (state.event == PM_EVENT_PRETHAW)
		return 0;

315 316 317

	if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
		return 0;
318

319 320 321 322
	error = i915_drm_freeze(dev);
	if (error)
		return error;

323 324 325 326 327
	if (state.event == PM_EVENT_SUSPEND) {
		/* Shut down the device */
		pci_disable_device(dev->pdev);
		pci_set_power_state(dev->pdev, PCI_D3hot);
	}
J
Jesse Barnes 已提交
328 329 330 331

	return 0;
}

332
static int i915_drm_thaw(struct drm_device *dev)
J
Jesse Barnes 已提交
333
{
334
	struct drm_i915_private *dev_priv = dev->dev_private;
335
	int error = 0;
336

337 338 339 340 341 342
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
		mutex_lock(&dev->struct_mutex);
		i915_gem_restore_gtt_mappings(dev);
		mutex_unlock(&dev->struct_mutex);
	}

343
	i915_restore_state(dev);
344
	intel_opregion_setup(dev);
345

346 347 348 349 350
	/* KMS EnterVT equivalent */
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
		mutex_lock(&dev->struct_mutex);
		dev_priv->mm.suspended = 0;

351
		error = i915_gem_init_ringbuffer(dev);
352
		mutex_unlock(&dev->struct_mutex);
353 354

		drm_irq_install(dev);
355

356 357
		/* Resume the modeset for every activated CRTC */
		drm_helper_resume_force_mode(dev);
358

J
Jesse Barnes 已提交
359 360 361
		if (dev_priv->renderctx && dev_priv->pwrctx)
			ironlake_enable_rc6(dev);
	}
362

363 364
	intel_opregion_init(dev);

365
	dev_priv->modeset_on_lid = 0;
366

367 368 369
	return error;
}

370
int i915_resume(struct drm_device *dev)
371
{
372 373
	int ret;

374 375 376
	if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
		return 0;

377 378 379 380 381
	if (pci_enable_device(dev->pdev))
		return -EIO;

	pci_set_master(dev->pdev);

382 383 384 385 386 387
	ret = i915_drm_thaw(dev);
	if (ret)
		return ret;

	drm_kms_helper_poll_enable(dev);
	return 0;
J
Jesse Barnes 已提交
388 389
}

390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419
static int i8xx_do_reset(struct drm_device *dev, u8 flags)
{
	struct drm_i915_private *dev_priv = dev->dev_private;

	if (IS_I85X(dev))
		return -ENODEV;

	I915_WRITE(D_STATE, I915_READ(D_STATE) | DSTATE_GFX_RESET_I830);
	POSTING_READ(D_STATE);

	if (IS_I830(dev) || IS_845G(dev)) {
		I915_WRITE(DEBUG_RESET_I830,
			   DEBUG_RESET_DISPLAY |
			   DEBUG_RESET_RENDER |
			   DEBUG_RESET_FULL);
		POSTING_READ(DEBUG_RESET_I830);
		msleep(1);

		I915_WRITE(DEBUG_RESET_I830, 0);
		POSTING_READ(DEBUG_RESET_I830);
	}

	msleep(1);

	I915_WRITE(D_STATE, I915_READ(D_STATE) & ~DSTATE_GFX_RESET_I830);
	POSTING_READ(D_STATE);

	return 0;
}

420 421 422
static int i965_reset_complete(struct drm_device *dev)
{
	u8 gdrst;
423
	pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
424 425 426
	return gdrst & 0x1;
}

427 428 429 430
static int i965_do_reset(struct drm_device *dev, u8 flags)
{
	u8 gdrst;

431 432 433 434 435
	/*
	 * Set the domains we want to reset (GRDOM/bits 2 and 3) as
	 * well as the reset bit (GR/bit 0).  Setting the GR bit
	 * triggers the reset; when done, the hardware will clear it.
	 */
436 437 438 439 440 441 442 443 444 445 446 447
	pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
	pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | flags | 0x1);

	return wait_for(i965_reset_complete(dev), 500);
}

static int ironlake_do_reset(struct drm_device *dev, u8 flags)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);
	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, gdrst | flags | 0x1);
	return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500);
J
Jesse Barnes 已提交
448 449
}

450 451 452 453 454 455 456 457
static int gen6_do_reset(struct drm_device *dev, u8 flags)
{
	struct drm_i915_private *dev_priv = dev->dev_private;

	I915_WRITE(GEN6_GDRST, GEN6_GRDOM_FULL);
	return wait_for((I915_READ(GEN6_GDRST) & GEN6_GRDOM_FULL) == 0, 500);
}

458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473
/**
 * i965_reset - reset chip after a hang
 * @dev: drm device to reset
 * @flags: reset domains
 *
 * Reset the chip.  Useful if a hang is detected. Returns zero on successful
 * reset or otherwise an error code.
 *
 * Procedure is fairly simple:
 *   - reset the chip using the reset reg
 *   - re-init context state
 *   - re-init hardware status page
 *   - re-init ring buffer
 *   - re-init interrupt state
 *   - re-init display
 */
474
int i915_reset(struct drm_device *dev, u8 flags)
475 476 477 478 479 480 481
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	/*
	 * We really should only reset the display subsystem if we actually
	 * need to
	 */
	bool need_display = true;
482
	int ret;
483

C
Chris Wilson 已提交
484 485 486
	if (!i915_try_reset)
		return 0;

487 488
	if (!mutex_trylock(&dev->struct_mutex))
		return -EBUSY;
489

490
	i915_gem_reset(dev);
491

492
	ret = -ENODEV;
493 494 495
	if (get_seconds() - dev_priv->last_gpu_reset < 5) {
		DRM_ERROR("GPU hanging too fast, declaring wedged!\n");
	} else switch (INTEL_INFO(dev)->gen) {
496 497 498
	case 6:
		ret = gen6_do_reset(dev, flags);
		break;
499
	case 5:
500
		ret = ironlake_do_reset(dev, flags);
501 502
		break;
	case 4:
503
		ret = i965_do_reset(dev, flags);
504
		break;
505 506 507
	case 2:
		ret = i8xx_do_reset(dev, flags);
		break;
508
	}
509
	dev_priv->last_gpu_reset = get_seconds();
510
	if (ret) {
511
		DRM_ERROR("Failed to reset chip.\n");
512
		mutex_unlock(&dev->struct_mutex);
513
		return ret;
514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530
	}

	/* Ok, now get things going again... */

	/*
	 * Everything depends on having the GTT running, so we need to start
	 * there.  Fortunately we don't need to do this unless we reset the
	 * chip at a PCI level.
	 *
	 * Next we need to restore the context, but we don't use those
	 * yet either...
	 *
	 * Ring buffer needs to be re-initialized in the KMS case, or if X
	 * was running at the time of the reset (i.e. we weren't VT
	 * switched away).
	 */
	if (drm_core_check_feature(dev, DRIVER_MODESET) ||
531
			!dev_priv->mm.suspended) {
532
		dev_priv->mm.suspended = 0;
533

534
		dev_priv->ring[RCS].init(&dev_priv->ring[RCS]);
535
		if (HAS_BSD(dev))
536
		    dev_priv->ring[VCS].init(&dev_priv->ring[VCS]);
537
		if (HAS_BLT(dev))
538
		    dev_priv->ring[BCS].init(&dev_priv->ring[BCS]);
539

540 541 542 543 544 545
		mutex_unlock(&dev->struct_mutex);
		drm_irq_uninstall(dev);
		drm_irq_install(dev);
		mutex_lock(&dev->struct_mutex);
	}

546 547
	mutex_unlock(&dev->struct_mutex);

548
	/*
549 550 551
	 * Perform a full modeset as on later generations, e.g. Ironlake, we may
	 * need to retrain the display link and cannot just restore the register
	 * values.
552
	 */
553 554 555 556 557
	if (need_display) {
		mutex_lock(&dev->mode_config.mutex);
		drm_helper_resume_force_mode(dev);
		mutex_unlock(&dev->mode_config.mutex);
	}
558 559 560 561 562

	return 0;
}


563 564 565
static int __devinit
i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
566
	return drm_get_pci_dev(pdev, ent, &driver);
567 568 569 570 571 572 573 574 575 576
}

static void
i915_pci_remove(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	drm_put_dev(dev);
}

577
static int i915_pm_suspend(struct device *dev)
578
{
579 580 581
	struct pci_dev *pdev = to_pci_dev(dev);
	struct drm_device *drm_dev = pci_get_drvdata(pdev);
	int error;
582

583 584 585 586
	if (!drm_dev || !drm_dev->dev_private) {
		dev_err(dev, "DRM not initialized, aborting suspend.\n");
		return -ENODEV;
	}
587

588 589 590
	if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
		return 0;

591 592 593
	error = i915_drm_freeze(drm_dev);
	if (error)
		return error;
594

595 596
	pci_disable_device(pdev);
	pci_set_power_state(pdev, PCI_D3hot);
597

598
	return 0;
599 600
}

601
static int i915_pm_resume(struct device *dev)
602
{
603 604 605 606
	struct pci_dev *pdev = to_pci_dev(dev);
	struct drm_device *drm_dev = pci_get_drvdata(pdev);

	return i915_resume(drm_dev);
607 608
}

609
static int i915_pm_freeze(struct device *dev)
610
{
611 612 613 614 615 616 617 618 619
	struct pci_dev *pdev = to_pci_dev(dev);
	struct drm_device *drm_dev = pci_get_drvdata(pdev);

	if (!drm_dev || !drm_dev->dev_private) {
		dev_err(dev, "DRM not initialized, aborting suspend.\n");
		return -ENODEV;
	}

	return i915_drm_freeze(drm_dev);
620 621
}

622
static int i915_pm_thaw(struct device *dev)
623
{
624 625 626 627
	struct pci_dev *pdev = to_pci_dev(dev);
	struct drm_device *drm_dev = pci_get_drvdata(pdev);

	return i915_drm_thaw(drm_dev);
628 629
}

630
static int i915_pm_poweroff(struct device *dev)
631
{
632 633 634
	struct pci_dev *pdev = to_pci_dev(dev);
	struct drm_device *drm_dev = pci_get_drvdata(pdev);

635
	return i915_drm_freeze(drm_dev);
636 637
}

638
static const struct dev_pm_ops i915_pm_ops = {
639 640 641 642 643
     .suspend = i915_pm_suspend,
     .resume = i915_pm_resume,
     .freeze = i915_pm_freeze,
     .thaw = i915_pm_thaw,
     .poweroff = i915_pm_poweroff,
644
     .restore = i915_pm_resume,
645 646
};

647 648
static struct vm_operations_struct i915_gem_vm_ops = {
	.fault = i915_gem_fault,
649 650
	.open = drm_gem_vm_open,
	.close = drm_gem_vm_close,
651 652
};

L
Linus Torvalds 已提交
653
static struct drm_driver driver = {
D
Dave Airlie 已提交
654 655 656
	/* don't use mtrr's here, the Xserver or user space app should
	 * deal with them for intel hardware.
	 */
657 658 659
	.driver_features =
	    DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
	    DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
660
	.load = i915_driver_load,
J
Jesse Barnes 已提交
661
	.unload = i915_driver_unload,
662
	.open = i915_driver_open,
663 664
	.lastclose = i915_driver_lastclose,
	.preclose = i915_driver_preclose,
665
	.postclose = i915_driver_postclose,
666 667 668 669 670

	/* Used in place of i915_pm_ops for non-DRIVER_MODESET */
	.suspend = i915_suspend,
	.resume = i915_resume,

671
	.device_is_agp = i915_driver_device_is_agp,
672 673
	.enable_vblank = i915_enable_vblank,
	.disable_vblank = i915_disable_vblank,
674 675
	.get_vblank_timestamp = i915_get_vblank_timestamp,
	.get_scanout_position = i915_get_crtc_scanoutpos,
L
Linus Torvalds 已提交
676 677 678 679 680
	.irq_preinstall = i915_driver_irq_preinstall,
	.irq_postinstall = i915_driver_irq_postinstall,
	.irq_uninstall = i915_driver_irq_uninstall,
	.irq_handler = i915_driver_irq_handler,
	.reclaim_buffers = drm_core_reclaim_buffers,
681 682
	.master_create = i915_master_create,
	.master_destroy = i915_master_destroy,
683
#if defined(CONFIG_DEBUG_FS)
684 685
	.debugfs_init = i915_debugfs_init,
	.debugfs_cleanup = i915_debugfs_cleanup,
686
#endif
687 688
	.gem_init_object = i915_gem_init_object,
	.gem_free_object = i915_gem_free_object,
689
	.gem_vm_ops = &i915_gem_vm_ops,
L
Linus Torvalds 已提交
690 691
	.ioctls = i915_ioctls,
	.fops = {
D
Dave Airlie 已提交
692 693 694
		 .owner = THIS_MODULE,
		 .open = drm_open,
		 .release = drm_release,
695
		 .unlocked_ioctl = drm_ioctl,
696
		 .mmap = drm_gem_mmap,
D
Dave Airlie 已提交
697 698
		 .poll = drm_poll,
		 .fasync = drm_fasync,
699
		 .read = drm_read,
700
#ifdef CONFIG_COMPAT
D
Dave Airlie 已提交
701
		 .compat_ioctl = i915_compat_ioctl,
702
#endif
A
Arnd Bergmann 已提交
703
		 .llseek = noop_llseek,
704 705
	},

L
Linus Torvalds 已提交
706
	.pci_driver = {
707 708
		 .name = DRIVER_NAME,
		 .id_table = pciidlist,
709 710
		 .probe = i915_pci_probe,
		 .remove = i915_pci_remove,
711
		 .driver.pm = &i915_pm_ops,
712
	},
D
Dave Airlie 已提交
713

714 715 716 717 718 719
	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
	.patchlevel = DRIVER_PATCHLEVEL,
L
Linus Torvalds 已提交
720 721 722 723
};

static int __init i915_init(void)
{
724 725 726 727 728
	if (!intel_agp_enabled) {
		DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
		return -ENODEV;
	}

L
Linus Torvalds 已提交
729
	driver.num_ioctls = i915_max_ioctl;
J
Jesse Barnes 已提交
730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751

	/*
	 * If CONFIG_DRM_I915_KMS is set, default to KMS unless
	 * explicitly disabled with the module pararmeter.
	 *
	 * Otherwise, just follow the parameter (defaulting to off).
	 *
	 * Allow optional vga_text_mode_force boot option to override
	 * the default behavior.
	 */
#if defined(CONFIG_DRM_I915_KMS)
	if (i915_modeset != 0)
		driver.driver_features |= DRIVER_MODESET;
#endif
	if (i915_modeset == 1)
		driver.driver_features |= DRIVER_MODESET;

#ifdef CONFIG_VGA_CONSOLE
	if (vgacon_text_force() && i915_modeset == -1)
		driver.driver_features &= ~DRIVER_MODESET;
#endif

L
Linus Torvalds 已提交
752 753 754 755 756 757 758 759 760 761 762
	return drm_init(&driver);
}

static void __exit i915_exit(void)
{
	drm_exit(&driver);
}

module_init(i915_init);
module_exit(i915_exit);

D
Dave Airlie 已提交
763 764
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
L
Linus Torvalds 已提交
765
MODULE_LICENSE("GPL and additional rights");