spapr.c 108.9 KB
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/*
 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
 *
 * Copyright (c) 2004-2007 Fabrice Bellard
 * Copyright (c) 2007 Jocelyn Mayer
 * Copyright (c) 2010 David Gibson, IBM Corporation.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 *
 */
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Peter Maydell 已提交
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/numa.h"
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#include "hw/hw.h"
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#include "qemu/log.h"
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#include "hw/fw-path-provider.h"
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#include "elf.h"
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#include "net/net.h"
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#include "sysemu/device_tree.h"
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#include "sysemu/block-backend.h"
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#include "sysemu/cpus.h"
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#include "sysemu/hw_accel.h"
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#include "kvm_ppc.h"
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#include "migration/migration.h"
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#include "mmu-hash64.h"
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#include "qom/cpu.h"
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#include "hw/boards.h"
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#include "hw/ppc/ppc.h"
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#include "hw/loader.h"

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#include "hw/ppc/fdt.h"
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#include "hw/ppc/spapr.h"
#include "hw/ppc/spapr_vio.h"
#include "hw/pci-host/spapr.h"
#include "hw/ppc/xics.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/pci.h"
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#include "hw/scsi/scsi.h"
#include "hw/virtio/virtio-scsi.h"
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#include "exec/address-spaces.h"
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#include "hw/usb.h"
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#include "qemu/config-file.h"
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#include "qemu/error-report.h"
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#include "trace.h"
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#include "hw/nmi.h"
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#include "hw/intc/intc.h"
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#include "hw/compat.h"
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#include "qemu/cutils.h"
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#include "hw/ppc/spapr_cpu_core.h"
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#include "qmp-commands.h"
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#include <libfdt.h>

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/* SLOF memory layout:
 *
 * SLOF raw image loaded at 0, copies its romfs right below the flat
 * device-tree, then position SLOF itself 31M below that
 *
 * So we set FW_OVERHEAD to 40MB which should account for all of that
 * and more
 *
 * We load our kernel at 4M, leaving space for SLOF initial image
 */
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#define FDT_MAX_SIZE            0x100000
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#define RTAS_MAX_SIZE           0x10000
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#define RTAS_MAX_ADDR           0x80000000 /* RTAS must stay below that */
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#define FW_MAX_SIZE             0x400000
#define FW_FILE_NAME            "slof.bin"
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#define FW_OVERHEAD             0x2800000
#define KERNEL_LOAD_ADDR        FW_MAX_SIZE
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#define MIN_RMA_SLOF            128UL
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#define PHANDLE_XICP            0x00001111

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#define HTAB_SIZE(spapr)        (1ULL << ((spapr)->htab_shift))

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static int try_create_xics(sPAPRMachineState *spapr, const char *type_ics,
                           const char *type_icp, int nr_servers,
                           int nr_irqs, Error **errp)
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{
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    XICSFabric *xi = XICS_FABRIC(spapr);
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    Error *err = NULL, *local_err = NULL;
    ICSState *ics = NULL;
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    int i;
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    ics = ICS_SIMPLE(object_new(type_ics));
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    qdev_set_parent_bus(DEVICE(ics), sysbus_get_default());
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    object_property_add_child(OBJECT(spapr), "ics", OBJECT(ics), NULL);
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    object_property_set_int(OBJECT(ics), nr_irqs, "nr-irqs", &err);
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    object_property_add_const_link(OBJECT(ics), "xics", OBJECT(xi), NULL);
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    object_property_set_bool(OBJECT(ics), true, "realized", &local_err);
    error_propagate(&err, local_err);
    if (err) {
        goto error;
    }

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    spapr->icps = g_malloc0(nr_servers * sizeof(ICPState));
    spapr->nr_servers = nr_servers;
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    for (i = 0; i < nr_servers; i++) {
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        ICPState *icp = &spapr->icps[i];
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        object_initialize(icp, sizeof(*icp), type_icp);
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        qdev_set_parent_bus(DEVICE(icp), sysbus_get_default());
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        object_property_add_child(OBJECT(spapr), "icp[*]", OBJECT(icp), NULL);
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        object_property_add_const_link(OBJECT(icp), "xics", OBJECT(xi), NULL);
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        object_property_set_bool(OBJECT(icp), true, "realized", &err);
        if (err) {
            goto error;
        }
        object_unref(OBJECT(icp));
    }

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    spapr->ics = ics;
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    return 0;
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error:
    error_propagate(errp, err);
    if (ics) {
        object_unparent(OBJECT(ics));
    }
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    return -1;
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}

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static int xics_system_init(MachineState *machine,
                            int nr_servers, int nr_irqs, Error **errp)
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{
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    int rc = -1;
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    if (kvm_enabled()) {
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        Error *err = NULL;

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        if (machine_kernel_irqchip_allowed(machine) &&
            !xics_kvm_init(SPAPR_MACHINE(machine), errp)) {
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            rc = try_create_xics(SPAPR_MACHINE(machine), TYPE_ICS_KVM,
                                 TYPE_KVM_ICP, nr_servers, nr_irqs, &err);
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        }
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        if (machine_kernel_irqchip_required(machine) && rc < 0) {
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            error_reportf_err(err,
                              "kernel_irqchip requested but unavailable: ");
        } else {
            error_free(err);
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        }
    }

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    if (rc < 0) {
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        xics_spapr_init(SPAPR_MACHINE(machine), errp);
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        rc = try_create_xics(SPAPR_MACHINE(machine), TYPE_ICS_SIMPLE,
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                               TYPE_ICP, nr_servers, nr_irqs, errp);
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    }

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    return rc;
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}

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static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu,
                                  int smt_threads)
{
    int i, ret = 0;
    uint32_t servers_prop[smt_threads];
    uint32_t gservers_prop[smt_threads * 2];
    int index = ppc_get_vcpu_dt_id(cpu);

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    if (cpu->compat_pvr) {
        ret = fdt_setprop_cell(fdt, offset, "cpu-version", cpu->compat_pvr);
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        if (ret < 0) {
            return ret;
        }
    }

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    /* Build interrupt servers and gservers properties */
    for (i = 0; i < smt_threads; i++) {
        servers_prop[i] = cpu_to_be32(index + i);
        /* Hack, direct the group queues back to cpu 0 */
        gservers_prop[i*2] = cpu_to_be32(index + i);
        gservers_prop[i*2 + 1] = 0;
    }
    ret = fdt_setprop(fdt, offset, "ibm,ppc-interrupt-server#s",
                      servers_prop, sizeof(servers_prop));
    if (ret < 0) {
        return ret;
    }
    ret = fdt_setprop(fdt, offset, "ibm,ppc-interrupt-gserver#s",
                      gservers_prop, sizeof(gservers_prop));

    return ret;
}

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static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, CPUState *cs)
{
    int ret = 0;
    PowerPCCPU *cpu = POWERPC_CPU(cs);
    int index = ppc_get_vcpu_dt_id(cpu);
    uint32_t associativity[] = {cpu_to_be32(0x5),
                                cpu_to_be32(0x0),
                                cpu_to_be32(0x0),
                                cpu_to_be32(0x0),
                                cpu_to_be32(cs->numa_node),
                                cpu_to_be32(index)};

    /* Advertise NUMA via ibm,associativity */
    if (nb_numa_nodes > 1) {
        ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
                          sizeof(associativity));
    }

    return ret;
}

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static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineState *spapr)
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{
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    int ret = 0, offset, cpus_offset;
    CPUState *cs;
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    char cpu_model[32];
    int smt = kvmppc_smt_threads();
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    uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
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    CPU_FOREACH(cs) {
        PowerPCCPU *cpu = POWERPC_CPU(cs);
        DeviceClass *dc = DEVICE_GET_CLASS(cs);
        int index = ppc_get_vcpu_dt_id(cpu);
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        int compat_smt = MIN(smp_threads, ppc_compat_max_threads(cpu));
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        if ((index % smt) != 0) {
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            continue;
        }

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        snprintf(cpu_model, 32, "%s@%x", dc->fw_name, index);
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        cpus_offset = fdt_path_offset(fdt, "/cpus");
        if (cpus_offset < 0) {
            cpus_offset = fdt_add_subnode(fdt, fdt_path_offset(fdt, "/"),
                                          "cpus");
            if (cpus_offset < 0) {
                return cpus_offset;
            }
        }
        offset = fdt_subnode_offset(fdt, cpus_offset, cpu_model);
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        if (offset < 0) {
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            offset = fdt_add_subnode(fdt, cpus_offset, cpu_model);
            if (offset < 0) {
                return offset;
            }
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        }

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        ret = fdt_setprop(fdt, offset, "ibm,pft-size",
                          pft_size_prop, sizeof(pft_size_prop));
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        if (ret < 0) {
            return ret;
        }
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        ret = spapr_fixup_cpu_numa_dt(fdt, offset, cs);
        if (ret < 0) {
            return ret;
        }

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        ret = spapr_fixup_cpu_smt_dt(fdt, offset, cpu, compat_smt);
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        if (ret < 0) {
            return ret;
        }
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    }
    return ret;
}

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static hwaddr spapr_node0_size(void)
{
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    MachineState *machine = MACHINE(qdev_get_machine());

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    if (nb_numa_nodes) {
        int i;
        for (i = 0; i < nb_numa_nodes; ++i) {
            if (numa_info[i].node_mem) {
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                return MIN(pow2floor(numa_info[i].node_mem),
                           machine->ram_size);
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            }
        }
    }
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    return machine->ram_size;
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}

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static void add_str(GString *s, const gchar *s1)
{
    g_string_append_len(s, s1, strlen(s1) + 1);
}
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static int spapr_populate_memory_node(void *fdt, int nodeid, hwaddr start,
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                                       hwaddr size)
{
    uint32_t associativity[] = {
        cpu_to_be32(0x4), /* length */
        cpu_to_be32(0x0), cpu_to_be32(0x0),
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        cpu_to_be32(0x0), cpu_to_be32(nodeid)
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    };
    char mem_name[32];
    uint64_t mem_reg_property[2];
    int off;

    mem_reg_property[0] = cpu_to_be64(start);
    mem_reg_property[1] = cpu_to_be64(size);

    sprintf(mem_name, "memory@" TARGET_FMT_lx, start);
    off = fdt_add_subnode(fdt, 0, mem_name);
    _FDT(off);
    _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
    _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
                      sizeof(mem_reg_property))));
    _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
                      sizeof(associativity))));
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    return off;
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}

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static int spapr_populate_memory(sPAPRMachineState *spapr, void *fdt)
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{
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    MachineState *machine = MACHINE(spapr);
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    hwaddr mem_start, node_size;
    int i, nb_nodes = nb_numa_nodes;
    NodeInfo *nodes = numa_info;
    NodeInfo ramnode;

    /* No NUMA nodes, assume there is just one node with whole RAM */
    if (!nb_numa_nodes) {
        nb_nodes = 1;
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        ramnode.node_mem = machine->ram_size;
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        nodes = &ramnode;
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    }
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    for (i = 0, mem_start = 0; i < nb_nodes; ++i) {
        if (!nodes[i].node_mem) {
            continue;
        }
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        if (mem_start >= machine->ram_size) {
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            node_size = 0;
        } else {
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            node_size = nodes[i].node_mem;
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            if (node_size > machine->ram_size - mem_start) {
                node_size = machine->ram_size - mem_start;
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            }
        }
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        if (!mem_start) {
            /* ppc_spapr_init() checks for rma_size <= node0_size already */
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            spapr_populate_memory_node(fdt, i, 0, spapr->rma_size);
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            mem_start += spapr->rma_size;
            node_size -= spapr->rma_size;
        }
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        for ( ; node_size; ) {
            hwaddr sizetmp = pow2floor(node_size);

            /* mem_start != 0 here */
            if (ctzl(mem_start) < ctzl(sizetmp)) {
                sizetmp = 1ULL << ctzl(mem_start);
            }

            spapr_populate_memory_node(fdt, i, mem_start, sizetmp);
            node_size -= sizetmp;
            mem_start += sizetmp;
        }
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    }

    return 0;
}

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/* Populate the "ibm,pa-features" property */
static void spapr_populate_pa_features(CPUPPCState *env, void *fdt, int offset)
{
    uint8_t pa_features_206[] = { 6, 0,
        0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
    uint8_t pa_features_207[] = { 24, 0,
        0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
        0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
        0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
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        0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
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    /* Currently we don't advertise any of the "new" ISAv3.00 functionality */
    uint8_t pa_features_300[] = { 64, 0,
        0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /*  0 -  5 */
        0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /*  6 - 11 */
        0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */
        0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */
        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 24 - 29 */
        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 - 35 */
        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 36 - 41 */
        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 42 - 47 */
        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 48 - 53 */
        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 54 - 59 */
        0x00, 0x00, 0x00, 0x00           }; /* 60 - 63 */

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    uint8_t *pa_features;
    size_t pa_size;

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    switch (env->mmu_model) {
    case POWERPC_MMU_2_06:
    case POWERPC_MMU_2_06a:
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        pa_features = pa_features_206;
        pa_size = sizeof(pa_features_206);
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        break;
    case POWERPC_MMU_2_07:
    case POWERPC_MMU_2_07a:
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        pa_features = pa_features_207;
        pa_size = sizeof(pa_features_207);
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        break;
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    case POWERPC_MMU_3_00:
        pa_features = pa_features_300;
        pa_size = sizeof(pa_features_300);
        break;
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    default:
        return;
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    }

    if (env->ci_large_pages) {
        /*
         * Note: we keep CI large pages off by default because a 64K capable
         * guest provisioned with large pages might otherwise try to map a qemu
         * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
         * even if that qemu runs on a 4k host.
         * We dd this bit back here if we are confident this is not an issue
         */
        pa_features[3] |= 0x20;
    }
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    if (kvmppc_has_cap_htm() && pa_size > 24) {
        pa_features[24] |= 0x80;    /* Transactional memory support */
    }
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    _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", pa_features, pa_size)));
}

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static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
                                  sPAPRMachineState *spapr)
{
    PowerPCCPU *cpu = POWERPC_CPU(cs);
    CPUPPCState *env = &cpu->env;
    PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
    int index = ppc_get_vcpu_dt_id(cpu);
    uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
                       0xffffffff, 0xffffffff};
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    uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq()
        : SPAPR_TIMEBASE_FREQ;
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    uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
    uint32_t page_sizes_prop[64];
    size_t page_sizes_prop_size;
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    uint32_t vcpus_per_socket = smp_threads * smp_cores;
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    uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
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    int compat_smt = MIN(smp_threads, ppc_compat_max_threads(cpu));
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Bharata B Rao 已提交
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    sPAPRDRConnector *drc;
    sPAPRDRConnectorClass *drck;
    int drc_index;

    drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index);
    if (drc) {
        drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
        drc_index = drck->get_index(drc);
        _FDT((fdt_setprop_cell(fdt, offset, "ibm,my-drc-index", drc_index)));
    }
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    _FDT((fdt_setprop_cell(fdt, offset, "reg", index)));
    _FDT((fdt_setprop_string(fdt, offset, "device_type", "cpu")));

    _FDT((fdt_setprop_cell(fdt, offset, "cpu-version", env->spr[SPR_PVR])));
    _FDT((fdt_setprop_cell(fdt, offset, "d-cache-block-size",
                           env->dcache_line_size)));
    _FDT((fdt_setprop_cell(fdt, offset, "d-cache-line-size",
                           env->dcache_line_size)));
    _FDT((fdt_setprop_cell(fdt, offset, "i-cache-block-size",
                           env->icache_line_size)));
    _FDT((fdt_setprop_cell(fdt, offset, "i-cache-line-size",
                           env->icache_line_size)));

    if (pcc->l1_dcache_size) {
        _FDT((fdt_setprop_cell(fdt, offset, "d-cache-size",
                               pcc->l1_dcache_size)));
    } else {
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        error_report("Warning: Unknown L1 dcache size for cpu");
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    }
    if (pcc->l1_icache_size) {
        _FDT((fdt_setprop_cell(fdt, offset, "i-cache-size",
                               pcc->l1_icache_size)));
    } else {
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        error_report("Warning: Unknown L1 icache size for cpu");
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    }

    _FDT((fdt_setprop_cell(fdt, offset, "timebase-frequency", tbfreq)));
    _FDT((fdt_setprop_cell(fdt, offset, "clock-frequency", cpufreq)));
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    _FDT((fdt_setprop_cell(fdt, offset, "slb-size", env->slb_nr)));
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    _FDT((fdt_setprop_cell(fdt, offset, "ibm,slb-size", env->slb_nr)));
    _FDT((fdt_setprop_string(fdt, offset, "status", "okay")));
    _FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0)));

    if (env->spr_cb[SPR_PURR].oea_read) {
        _FDT((fdt_setprop(fdt, offset, "ibm,purr", NULL, 0)));
    }

    if (env->mmu_model & POWERPC_MMU_1TSEG) {
        _FDT((fdt_setprop(fdt, offset, "ibm,processor-segment-sizes",
                          segs, sizeof(segs))));
    }

    /* Advertise VMX/VSX (vector extensions) if available
     *   0 / no property == no vector extensions
     *   1               == VMX / Altivec available
     *   2               == VSX available */
    if (env->insns_flags & PPC_ALTIVEC) {
        uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1;

        _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", vmx)));
    }

    /* Advertise DFP (Decimal Floating Point) if available
     *   0 / no property == no DFP
     *   1               == DFP available */
    if (env->insns_flags2 & PPC2_DFP) {
        _FDT((fdt_setprop_cell(fdt, offset, "ibm,dfp", 1)));
    }

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    page_sizes_prop_size = ppc_create_page_sizes_prop(env, page_sizes_prop,
534 535 536 537 538 539
                                                  sizeof(page_sizes_prop));
    if (page_sizes_prop_size) {
        _FDT((fdt_setprop(fdt, offset, "ibm,segment-page-sizes",
                          page_sizes_prop, page_sizes_prop_size)));
    }

540
    spapr_populate_pa_features(env, fdt, offset);
541

542
    _FDT((fdt_setprop_cell(fdt, offset, "ibm,chip-id",
543
                           cs->cpu_index / vcpus_per_socket)));
544 545 546 547 548 549

    _FDT((fdt_setprop(fdt, offset, "ibm,pft-size",
                      pft_size_prop, sizeof(pft_size_prop))));

    _FDT(spapr_fixup_cpu_numa_dt(fdt, offset, cs));

550
    _FDT(spapr_fixup_cpu_smt_dt(fdt, offset, cpu, compat_smt));
551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588
}

static void spapr_populate_cpus_dt_node(void *fdt, sPAPRMachineState *spapr)
{
    CPUState *cs;
    int cpus_offset;
    char *nodename;
    int smt = kvmppc_smt_threads();

    cpus_offset = fdt_add_subnode(fdt, 0, "cpus");
    _FDT(cpus_offset);
    _FDT((fdt_setprop_cell(fdt, cpus_offset, "#address-cells", 0x1)));
    _FDT((fdt_setprop_cell(fdt, cpus_offset, "#size-cells", 0x0)));

    /*
     * We walk the CPUs in reverse order to ensure that CPU DT nodes
     * created by fdt_add_subnode() end up in the right order in FDT
     * for the guest kernel the enumerate the CPUs correctly.
     */
    CPU_FOREACH_REVERSE(cs) {
        PowerPCCPU *cpu = POWERPC_CPU(cs);
        int index = ppc_get_vcpu_dt_id(cpu);
        DeviceClass *dc = DEVICE_GET_CLASS(cs);
        int offset;

        if ((index % smt) != 0) {
            continue;
        }

        nodename = g_strdup_printf("%s@%x", dc->fw_name, index);
        offset = fdt_add_subnode(fdt, cpus_offset, nodename);
        g_free(nodename);
        _FDT(offset);
        spapr_populate_cpu_dt(cs, fdt, offset, spapr);
    }

}

589 590 591 592 593 594 595 596 597 598 599
/*
 * Adds ibm,dynamic-reconfiguration-memory node.
 * Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation
 * of this device tree node.
 */
static int spapr_populate_drconf_memory(sPAPRMachineState *spapr, void *fdt)
{
    MachineState *machine = MACHINE(spapr);
    int ret, i, offset;
    uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE;
    uint32_t prop_lmb_size[] = {0, cpu_to_be32(lmb_size)};
600 601 602 603
    uint32_t hotplug_lmb_start = spapr->hotplug_memory.base / lmb_size;
    uint32_t nr_lmbs = (spapr->hotplug_memory.base +
                       memory_region_size(&spapr->hotplug_memory.mr)) /
                       lmb_size;
604
    uint32_t *int_buf, *cur_index, buf_len;
605
    int nr_nodes = nb_numa_nodes ? nb_numa_nodes : 1;
606

607
    /*
608
     * Don't create the node if there is no hotpluggable memory
609
     */
610
    if (machine->ram_size == machine->maxram_size) {
611 612 613
        return 0;
    }

614 615 616 617 618 619
    /*
     * Allocate enough buffer size to fit in ibm,dynamic-memory
     * or ibm,associativity-lookup-arrays
     */
    buf_len = MAX(nr_lmbs * SPAPR_DR_LMB_LIST_ENTRY_SIZE + 1, nr_nodes * 4 + 2)
              * sizeof(uint32_t);
620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643
    cur_index = int_buf = g_malloc0(buf_len);

    offset = fdt_add_subnode(fdt, 0, "ibm,dynamic-reconfiguration-memory");

    ret = fdt_setprop(fdt, offset, "ibm,lmb-size", prop_lmb_size,
                    sizeof(prop_lmb_size));
    if (ret < 0) {
        goto out;
    }

    ret = fdt_setprop_cell(fdt, offset, "ibm,memory-flags-mask", 0xff);
    if (ret < 0) {
        goto out;
    }

    ret = fdt_setprop_cell(fdt, offset, "ibm,memory-preservation-time", 0x0);
    if (ret < 0) {
        goto out;
    }

    /* ibm,dynamic-memory */
    int_buf[0] = cpu_to_be32(nr_lmbs);
    cur_index++;
    for (i = 0; i < nr_lmbs; i++) {
644
        uint64_t addr = i * lmb_size;
645 646
        uint32_t *dynamic_memory = cur_index;

647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664
        if (i >= hotplug_lmb_start) {
            sPAPRDRConnector *drc;
            sPAPRDRConnectorClass *drck;

            drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB, i);
            g_assert(drc);
            drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);

            dynamic_memory[0] = cpu_to_be32(addr >> 32);
            dynamic_memory[1] = cpu_to_be32(addr & 0xffffffff);
            dynamic_memory[2] = cpu_to_be32(drck->get_index(drc));
            dynamic_memory[3] = cpu_to_be32(0); /* reserved */
            dynamic_memory[4] = cpu_to_be32(numa_get_node(addr, NULL));
            if (memory_region_present(get_system_memory(), addr)) {
                dynamic_memory[5] = cpu_to_be32(SPAPR_LMB_FLAGS_ASSIGNED);
            } else {
                dynamic_memory[5] = cpu_to_be32(0);
            }
665
        } else {
666 667 668 669 670 671 672 673 674 675 676 677
            /*
             * LMB information for RMA, boot time RAM and gap b/n RAM and
             * hotplug memory region -- all these are marked as reserved
             * and as having no valid DRC.
             */
            dynamic_memory[0] = cpu_to_be32(addr >> 32);
            dynamic_memory[1] = cpu_to_be32(addr & 0xffffffff);
            dynamic_memory[2] = cpu_to_be32(0);
            dynamic_memory[3] = cpu_to_be32(0); /* reserved */
            dynamic_memory[4] = cpu_to_be32(-1);
            dynamic_memory[5] = cpu_to_be32(SPAPR_LMB_FLAGS_RESERVED |
                                            SPAPR_LMB_FLAGS_DRC_INVALID);
678 679 680 681 682 683 684 685 686 687 688
        }

        cur_index += SPAPR_DR_LMB_LIST_ENTRY_SIZE;
    }
    ret = fdt_setprop(fdt, offset, "ibm,dynamic-memory", int_buf, buf_len);
    if (ret < 0) {
        goto out;
    }

    /* ibm,associativity-lookup-arrays */
    cur_index = int_buf;
689
    int_buf[0] = cpu_to_be32(nr_nodes);
690 691
    int_buf[1] = cpu_to_be32(4); /* Number of entries per associativity list */
    cur_index += 2;
692
    for (i = 0; i < nr_nodes; i++) {
693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708
        uint32_t associativity[] = {
            cpu_to_be32(0x0),
            cpu_to_be32(0x0),
            cpu_to_be32(0x0),
            cpu_to_be32(i)
        };
        memcpy(cur_index, associativity, sizeof(associativity));
        cur_index += 4;
    }
    ret = fdt_setprop(fdt, offset, "ibm,associativity-lookup-arrays", int_buf,
            (cur_index - int_buf) * sizeof(uint32_t));
out:
    g_free(int_buf);
    return ret;
}

709 710 711 712
static int spapr_dt_cas_updates(sPAPRMachineState *spapr, void *fdt,
                                sPAPROptionVector *ov5_updates)
{
    sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
713
    int ret = 0, offset;
714 715 716 717 718

    /* Generate ibm,dynamic-reconfiguration-memory node if required */
    if (spapr_ovec_test(ov5_updates, OV5_DRCONF_MEMORY)) {
        g_assert(smc->dr_lmb_enabled);
        ret = spapr_populate_drconf_memory(spapr, fdt);
719 720 721
        if (ret) {
            goto out;
        }
722 723
    }

724 725 726 727 728 729 730 731 732 733 734
    offset = fdt_path_offset(fdt, "/chosen");
    if (offset < 0) {
        offset = fdt_add_subnode(fdt, 0, "chosen");
        if (offset < 0) {
            return offset;
        }
    }
    ret = spapr_ovec_populate_dt(fdt, offset, spapr->ov5_cas,
                                 "ibm,architecture-vec-5");

out:
735 736 737
    return ret;
}

738 739
int spapr_h_cas_compose_response(sPAPRMachineState *spapr,
                                 target_ulong addr, target_ulong size,
740
                                 sPAPROptionVector *ov5_updates)
741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757
{
    void *fdt, *fdt_skel;
    sPAPRDeviceTreeUpdateHeader hdr = { .version_id = 1 };

    size -= sizeof(hdr);

    /* Create sceleton */
    fdt_skel = g_malloc0(size);
    _FDT((fdt_create(fdt_skel, size)));
    _FDT((fdt_begin_node(fdt_skel, "")));
    _FDT((fdt_end_node(fdt_skel)));
    _FDT((fdt_finish(fdt_skel)));
    fdt = g_malloc0(size);
    _FDT((fdt_open_into(fdt_skel, fdt, size)));
    g_free(fdt_skel);

    /* Fixup cpu nodes */
758
    _FDT((spapr_fixup_cpu_dt(fdt, spapr)));
759

760 761
    if (spapr_dt_cas_updates(spapr, fdt, ov5_updates)) {
        return -1;
762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779
    }

    /* Pack resulting tree */
    _FDT((fdt_pack(fdt)));

    if (fdt_totalsize(fdt) + sizeof(hdr) > size) {
        trace_spapr_cas_failed(size);
        return -1;
    }

    cpu_physical_memory_write(addr, &hdr, sizeof(hdr));
    cpu_physical_memory_write(addr + sizeof(hdr), fdt, fdt_totalsize(fdt));
    trace_spapr_cas_continue(fdt_totalsize(fdt) + sizeof(hdr));
    g_free(fdt);

    return 0;
}

780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848
static void spapr_dt_rtas(sPAPRMachineState *spapr, void *fdt)
{
    int rtas;
    GString *hypertas = g_string_sized_new(256);
    GString *qemu_hypertas = g_string_sized_new(256);
    uint32_t refpoints[] = { cpu_to_be32(0x4), cpu_to_be32(0x4) };
    uint64_t max_hotplug_addr = spapr->hotplug_memory.base +
        memory_region_size(&spapr->hotplug_memory.mr);
    uint32_t lrdr_capacity[] = {
        cpu_to_be32(max_hotplug_addr >> 32),
        cpu_to_be32(max_hotplug_addr & 0xffffffff),
        0, cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE),
        cpu_to_be32(max_cpus / smp_threads),
    };

    _FDT(rtas = fdt_add_subnode(fdt, 0, "rtas"));

    /* hypertas */
    add_str(hypertas, "hcall-pft");
    add_str(hypertas, "hcall-term");
    add_str(hypertas, "hcall-dabr");
    add_str(hypertas, "hcall-interrupt");
    add_str(hypertas, "hcall-tce");
    add_str(hypertas, "hcall-vio");
    add_str(hypertas, "hcall-splpar");
    add_str(hypertas, "hcall-bulk");
    add_str(hypertas, "hcall-set-mode");
    add_str(hypertas, "hcall-sprg0");
    add_str(hypertas, "hcall-copy");
    add_str(hypertas, "hcall-debug");
    add_str(qemu_hypertas, "hcall-memop1");

    if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
        add_str(hypertas, "hcall-multi-tce");
    }
    _FDT(fdt_setprop(fdt, rtas, "ibm,hypertas-functions",
                     hypertas->str, hypertas->len));
    g_string_free(hypertas, TRUE);
    _FDT(fdt_setprop(fdt, rtas, "qemu,hypertas-functions",
                     qemu_hypertas->str, qemu_hypertas->len));
    g_string_free(qemu_hypertas, TRUE);

    _FDT(fdt_setprop(fdt, rtas, "ibm,associativity-reference-points",
                     refpoints, sizeof(refpoints)));

    _FDT(fdt_setprop_cell(fdt, rtas, "rtas-error-log-max",
                          RTAS_ERROR_LOG_MAX));
    _FDT(fdt_setprop_cell(fdt, rtas, "rtas-event-scan-rate",
                          RTAS_EVENT_SCAN_RATE));

    if (msi_nonbroken) {
        _FDT(fdt_setprop(fdt, rtas, "ibm,change-msix-capable", NULL, 0));
    }

    /*
     * According to PAPR, rtas ibm,os-term does not guarantee a return
     * back to the guest cpu.
     *
     * While an additional ibm,extended-os-term property indicates
     * that rtas call return will always occur. Set this property.
     */
    _FDT(fdt_setprop(fdt, rtas, "ibm,extended-os-term", NULL, 0));

    _FDT(fdt_setprop(fdt, rtas, "ibm,lrdr-capacity",
                     lrdr_capacity, sizeof(lrdr_capacity)));

    spapr_dt_rtas_tokens(fdt, rtas);
}

849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905
static void spapr_dt_chosen(sPAPRMachineState *spapr, void *fdt)
{
    MachineState *machine = MACHINE(spapr);
    int chosen;
    const char *boot_device = machine->boot_order;
    char *stdout_path = spapr_vio_stdout_path(spapr->vio_bus);
    size_t cb = 0;
    char *bootlist = get_boot_devices_list(&cb, true);

    _FDT(chosen = fdt_add_subnode(fdt, 0, "chosen"));

    _FDT(fdt_setprop_string(fdt, chosen, "bootargs", machine->kernel_cmdline));
    _FDT(fdt_setprop_cell(fdt, chosen, "linux,initrd-start",
                          spapr->initrd_base));
    _FDT(fdt_setprop_cell(fdt, chosen, "linux,initrd-end",
                          spapr->initrd_base + spapr->initrd_size));

    if (spapr->kernel_size) {
        uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
                              cpu_to_be64(spapr->kernel_size) };

        _FDT(fdt_setprop(fdt, chosen, "qemu,boot-kernel",
                         &kprop, sizeof(kprop)));
        if (spapr->kernel_le) {
            _FDT(fdt_setprop(fdt, chosen, "qemu,boot-kernel-le", NULL, 0));
        }
    }
    if (boot_menu) {
        _FDT((fdt_setprop_cell(fdt, chosen, "qemu,boot-menu", boot_menu)));
    }
    _FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-width", graphic_width));
    _FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-height", graphic_height));
    _FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-depth", graphic_depth));

    if (cb && bootlist) {
        int i;

        for (i = 0; i < cb; i++) {
            if (bootlist[i] == '\n') {
                bootlist[i] = ' ';
            }
        }
        _FDT(fdt_setprop_string(fdt, chosen, "qemu,boot-list", bootlist));
    }

    if (boot_device && strlen(boot_device)) {
        _FDT(fdt_setprop_string(fdt, chosen, "qemu,boot-device", boot_device));
    }

    if (!spapr->has_graphics && stdout_path) {
        _FDT(fdt_setprop_string(fdt, chosen, "linux,stdout-path", stdout_path));
    }

    g_free(stdout_path);
    g_free(bootlist);
}

906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928
static void spapr_dt_hypervisor(sPAPRMachineState *spapr, void *fdt)
{
    /* The /hypervisor node isn't in PAPR - this is a hack to allow PR
     * KVM to work under pHyp with some guest co-operation */
    int hypervisor;
    uint8_t hypercall[16];

    _FDT(hypervisor = fdt_add_subnode(fdt, 0, "hypervisor"));
    /* indicate KVM hypercall interface */
    _FDT(fdt_setprop_string(fdt, hypervisor, "compatible", "linux,kvm"));
    if (kvmppc_has_cap_fixup_hcalls()) {
        /*
         * Older KVM versions with older guest kernels were broken
         * with the magic page, don't allow the guest to map it.
         */
        if (!kvmppc_get_hypercall(first_cpu->env_ptr, hypercall,
                                  sizeof(hypercall))) {
            _FDT(fdt_setprop(fdt, hypervisor, "hcall-instructions",
                             hypercall, sizeof(hypercall)));
        }
    }
}

929 930 931
static void *spapr_build_fdt(sPAPRMachineState *spapr,
                             hwaddr rtas_addr,
                             hwaddr rtas_size)
932
{
933
    MachineState *machine = MACHINE(qdev_get_machine());
934
    MachineClass *mc = MACHINE_GET_CLASS(machine);
B
Bharata B Rao 已提交
935
    sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
936
    int ret;
937
    void *fdt;
938
    sPAPRPHBState *phb;
939
    char *buf;
940

941 942
    fdt = g_malloc0(FDT_MAX_SIZE);
    _FDT((fdt_create_empty_tree(fdt, FDT_MAX_SIZE)));
943

944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976
    /* Root node */
    _FDT(fdt_setprop_string(fdt, 0, "device_type", "chrp"));
    _FDT(fdt_setprop_string(fdt, 0, "model", "IBM pSeries (emulated by qemu)"));
    _FDT(fdt_setprop_string(fdt, 0, "compatible", "qemu,pseries"));

    /*
     * Add info to guest to indentify which host is it being run on
     * and what is the uuid of the guest
     */
    if (kvmppc_get_host_model(&buf)) {
        _FDT(fdt_setprop_string(fdt, 0, "host-model", buf));
        g_free(buf);
    }
    if (kvmppc_get_host_serial(&buf)) {
        _FDT(fdt_setprop_string(fdt, 0, "host-serial", buf));
        g_free(buf);
    }

    buf = qemu_uuid_unparse_strdup(&qemu_uuid);

    _FDT(fdt_setprop_string(fdt, 0, "vm,uuid", buf));
    if (qemu_uuid_set) {
        _FDT(fdt_setprop_string(fdt, 0, "system-id", buf));
    }
    g_free(buf);

    if (qemu_get_vm_name()) {
        _FDT(fdt_setprop_string(fdt, 0, "ibm,partition-name",
                                qemu_get_vm_name()));
    }

    _FDT(fdt_setprop_cell(fdt, 0, "#address-cells", 2));
    _FDT(fdt_setprop_cell(fdt, 0, "#size-cells", 2));
977

978
    /* /interrupt controller */
979
    spapr_dt_xics(spapr->nr_servers, fdt, PHANDLE_XICP);
980

981 982
    ret = spapr_populate_memory(spapr, fdt);
    if (ret < 0) {
983
        error_report("couldn't setup memory nodes in fdt");
984
        exit(1);
985 986
    }

987 988
    /* /vdevice */
    spapr_dt_vdevice(spapr->vio_bus, fdt);
989

990 991 992
    if (object_resolve_path_type("", TYPE_SPAPR_RNG, NULL)) {
        ret = spapr_rng_populate_dt(fdt);
        if (ret < 0) {
993
            error_report("could not set up rng device in the fdt");
994 995 996 997
            exit(1);
        }
    }

998
    QLIST_FOREACH(phb, &spapr->phbs, list) {
999
        ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt);
1000 1001 1002 1003
        if (ret < 0) {
            error_report("couldn't setup PCI devices in fdt");
            exit(1);
        }
1004 1005
    }

1006 1007
    /* cpus */
    spapr_populate_cpus_dt_node(fdt, spapr);
1008

B
Bharata B Rao 已提交
1009 1010 1011 1012
    if (smc->dr_lmb_enabled) {
        _FDT(spapr_drc_populate_dt(fdt, 0, NULL, SPAPR_DR_CONNECTOR_TYPE_LMB));
    }

1013
    if (mc->has_hotpluggable_cpus) {
B
Bharata B Rao 已提交
1014 1015 1016 1017 1018 1019 1020 1021 1022
        int offset = fdt_path_offset(fdt, "/cpus");
        ret = spapr_drc_populate_dt(fdt, offset, NULL,
                                    SPAPR_DR_CONNECTOR_TYPE_CPU);
        if (ret < 0) {
            error_report("Couldn't set up CPU DR device tree properties");
            exit(1);
        }
    }

1023
    /* /event-sources */
1024
    spapr_dt_events(spapr, fdt);
1025

1026 1027 1028
    /* /rtas */
    spapr_dt_rtas(spapr, fdt);

1029 1030
    /* /chosen */
    spapr_dt_chosen(spapr, fdt);
1031

1032 1033 1034 1035 1036
    /* /hypervisor */
    if (kvm_enabled()) {
        spapr_dt_hypervisor(spapr, fdt);
    }

1037 1038 1039 1040 1041 1042 1043 1044
    /* Build memory reserve map */
    if (spapr->kernel_size) {
        _FDT((fdt_add_mem_rsv(fdt, KERNEL_LOAD_ADDR, spapr->kernel_size)));
    }
    if (spapr->initrd_size) {
        _FDT((fdt_add_mem_rsv(fdt, spapr->initrd_base, spapr->initrd_size)));
    }

1045 1046 1047 1048 1049 1050 1051
    /* ibm,client-architecture-support updates */
    ret = spapr_dt_cas_updates(spapr, fdt, spapr->ov5_cas);
    if (ret < 0) {
        error_report("couldn't setup CAS properties fdt");
        exit(1);
    }

1052
    return fdt;
1053 1054 1055 1056 1057 1058 1059
}

static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
{
    return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
}

1060 1061
static void emulate_spapr_hypercall(PPCVirtualHypervisor *vhyp,
                                    PowerPCCPU *cpu)
1062
{
1063 1064
    CPUPPCState *env = &cpu->env;

1065 1066 1067
    /* The TCG path should also be holding the BQL at this point */
    g_assert(qemu_mutex_iothread_locked());

1068 1069 1070 1071
    if (msr_pr) {
        hcall_dprintf("Hypercall made with MSR[PR]=1\n");
        env->gpr[3] = H_PRIVILEGE;
    } else {
1072
        env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]);
1073
    }
1074 1075
}

1076 1077 1078 1079 1080 1081 1082
static uint64_t spapr_get_patbe(PPCVirtualHypervisor *vhyp)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);

    return spapr->patb_entry;
}

1083 1084 1085 1086 1087 1088
#define HPTE(_table, _i)   (void *)(((uint64_t *)(_table)) + ((_i) * 2))
#define HPTE_VALID(_hpte)  (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
#define HPTE_DIRTY(_hpte)  (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
#define CLEAN_HPTE(_hpte)  ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
#define DIRTY_HPTE(_hpte)  ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))

1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114
/*
 * Get the fd to access the kernel htab, re-opening it if necessary
 */
static int get_htab_fd(sPAPRMachineState *spapr)
{
    if (spapr->htab_fd >= 0) {
        return spapr->htab_fd;
    }

    spapr->htab_fd = kvmppc_get_htab_fd(false);
    if (spapr->htab_fd < 0) {
        error_report("Unable to open fd for reading hash table from KVM: %s",
                     strerror(errno));
    }

    return spapr->htab_fd;
}

static void close_htab_fd(sPAPRMachineState *spapr)
{
    if (spapr->htab_fd >= 0) {
        close(spapr->htab_fd);
    }
    spapr->htab_fd = -1;
}

1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170
static hwaddr spapr_hpt_mask(PPCVirtualHypervisor *vhyp)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);

    return HTAB_SIZE(spapr) / HASH_PTEG_SIZE_64 - 1;
}

static const ppc_hash_pte64_t *spapr_map_hptes(PPCVirtualHypervisor *vhyp,
                                                hwaddr ptex, int n)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);
    hwaddr pte_offset = ptex * HASH_PTE_SIZE_64;

    if (!spapr->htab) {
        /*
         * HTAB is controlled by KVM. Fetch into temporary buffer
         */
        ppc_hash_pte64_t *hptes = g_malloc(n * HASH_PTE_SIZE_64);
        kvmppc_read_hptes(hptes, ptex, n);
        return hptes;
    }

    /*
     * HTAB is controlled by QEMU. Just point to the internally
     * accessible PTEG.
     */
    return (const ppc_hash_pte64_t *)(spapr->htab + pte_offset);
}

static void spapr_unmap_hptes(PPCVirtualHypervisor *vhyp,
                              const ppc_hash_pte64_t *hptes,
                              hwaddr ptex, int n)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);

    if (!spapr->htab) {
        g_free((void *)hptes);
    }

    /* Nothing to do for qemu managed HPT */
}

static void spapr_store_hpte(PPCVirtualHypervisor *vhyp, hwaddr ptex,
                             uint64_t pte0, uint64_t pte1)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);
    hwaddr offset = ptex * HASH_PTE_SIZE_64;

    if (!spapr->htab) {
        kvmppc_write_hpte(ptex, pte0, pte1);
    } else {
        stq_p(spapr->htab + offset, pte0);
        stq_p(spapr->htab + offset + HASH_PTE_SIZE_64 / 2, pte1);
    }
}

1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183
static int spapr_hpt_shift_for_ramsize(uint64_t ramsize)
{
    int shift;

    /* We aim for a hash table of size 1/128 the size of RAM (rounded
     * up).  The PAPR recommendation is actually 1/64 of RAM size, but
     * that's much more than is needed for Linux guests */
    shift = ctz64(pow2ceil(ramsize)) - 7;
    shift = MAX(shift, 18); /* Minimum architected size */
    shift = MIN(shift, 46); /* Maximum architected size */
    return shift;
}

1184 1185
static void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift,
                                 Error **errp)
1186
{
1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208
    long rc;

    /* Clean up any HPT info from a previous boot */
    g_free(spapr->htab);
    spapr->htab = NULL;
    spapr->htab_shift = 0;
    close_htab_fd(spapr);

    rc = kvmppc_reset_htab(shift);
    if (rc < 0) {
        /* kernel-side HPT needed, but couldn't allocate one */
        error_setg_errno(errp, errno,
                         "Failed to allocate KVM HPT of order %d (try smaller maxmem?)",
                         shift);
        /* This is almost certainly fatal, but if the caller really
         * wants to carry on with shift == 0, it's welcome to try */
    } else if (rc > 0) {
        /* kernel-side HPT allocated */
        if (rc != shift) {
            error_setg(errp,
                       "Requested order %d HPT, but kernel allocated order %ld (try smaller maxmem?)",
                       shift, rc);
1209 1210
        }

1211
        spapr->htab_shift = shift;
1212
        spapr->htab = NULL;
1213
    } else {
1214 1215 1216
        /* kernel-side HPT not needed, allocate in userspace instead */
        size_t size = 1ULL << shift;
        int i;
1217

1218 1219 1220 1221 1222
        spapr->htab = qemu_memalign(size, size);
        if (!spapr->htab) {
            error_setg_errno(errp, errno,
                             "Could not allocate HPT of order %d", shift);
            return;
1223 1224
        }

1225 1226
        memset(spapr->htab, 0, size);
        spapr->htab_shift = shift;
1227

1228 1229
        for (i = 0; i < size / HASH_PTE_SIZE_64; i++) {
            DIRTY_HPTE(HPTE(spapr->htab, i));
1230
        }
1231
    }
1232 1233
}

1234
static void find_unknown_sysbus_device(SysBusDevice *sbdev, void *opaque)
1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248
{
    bool matched = false;

    if (object_dynamic_cast(OBJECT(sbdev), TYPE_SPAPR_PCI_HOST_BRIDGE)) {
        matched = true;
    }

    if (!matched) {
        error_report("Device %s is not supported by this machine yet.",
                     qdev_fw_name(DEVICE(sbdev)));
        exit(1);
    }
}

1249
static void ppc_spapr_reset(void)
1250
{
1251 1252
    MachineState *machine = MACHINE(qdev_get_machine());
    sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
1253
    PowerPCCPU *first_ppc_cpu;
1254
    uint32_t rtas_limit;
1255
    hwaddr rtas_addr, fdt_addr;
1256 1257
    void *fdt;
    int rc;
1258

1259 1260 1261
    /* Check for unknown sysbus devices */
    foreach_dynamic_sysbus_device(find_unknown_sysbus_device, NULL);

1262 1263
    spapr->patb_entry = 0;

1264 1265 1266 1267 1268 1269 1270 1271 1272 1273
    /* Allocate and/or reset the hash page table */
    spapr_reallocate_hpt(spapr,
                         spapr_hpt_shift_for_ramsize(machine->maxram_size),
                         &error_fatal);

    /* Update the RMA size if necessary */
    if (spapr->vrma_adjust) {
        spapr->rma_size = kvmppc_rma_size(spapr_node0_size(),
                                          spapr->htab_shift);
    }
1274

1275
    qemu_devices_reset();
1276

1277 1278 1279 1280 1281 1282
    /*
     * We place the device tree and RTAS just below either the top of the RMA,
     * or just below 2GB, whichever is lowere, so that it can be
     * processed with 32-bit real mode code if necessary
     */
    rtas_limit = MIN(spapr->rma_size, RTAS_MAX_ADDR);
1283 1284
    rtas_addr = rtas_limit - RTAS_MAX_SIZE;
    fdt_addr = rtas_addr - FDT_MAX_SIZE;
1285

1286 1287 1288 1289 1290 1291 1292
    /* if this reset wasn't generated by CAS, we should reset our
     * negotiated options and start from scratch */
    if (!spapr->cas_reboot) {
        spapr_ovec_cleanup(spapr->ov5_cas);
        spapr->ov5_cas = spapr_ovec_new();
    }

1293
    fdt = spapr_build_fdt(spapr, rtas_addr, spapr->rtas_size);
1294

D
David Gibson 已提交
1295
    spapr_load_rtas(spapr, fdt, rtas_addr);
1296

1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309
    rc = fdt_pack(fdt);

    /* Should only fail if we've built a corrupted tree */
    assert(rc == 0);

    if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
        error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
                     fdt_totalsize(fdt), FDT_MAX_SIZE);
        exit(1);
    }

    /* Load the fdt */
    qemu_fdt_dumpdtb(fdt, fdt_totalsize(fdt));
1310
    cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
1311 1312
    g_free(fdt);

1313
    /* Set up the entry state */
1314
    first_ppc_cpu = POWERPC_CPU(first_cpu);
1315
    first_ppc_cpu->env.gpr[3] = fdt_addr;
1316 1317
    first_ppc_cpu->env.gpr[5] = 0;
    first_cpu->halted = 0;
1318
    first_ppc_cpu->env.nip = SPAPR_ENTRY_POINT;
1319

1320
    spapr->cas_reboot = false;
1321 1322
}

1323
static void spapr_create_nvram(sPAPRMachineState *spapr)
D
David Gibson 已提交
1324
{
1325
    DeviceState *dev = qdev_create(&spapr->vio_bus->bus, "spapr-nvram");
P
Paolo Bonzini 已提交
1326
    DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0);
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David Gibson 已提交
1327

P
Paolo Bonzini 已提交
1328
    if (dinfo) {
1329 1330
        qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo),
                            &error_fatal);
D
David Gibson 已提交
1331 1332 1333 1334 1335 1336 1337
    }

    qdev_init_nofail(dev);

    spapr->nvram = (struct sPAPRNVRAM *)dev;
}

1338
static void spapr_rtc_create(sPAPRMachineState *spapr)
1339 1340 1341 1342 1343
{
    DeviceState *dev = qdev_create(NULL, TYPE_SPAPR_RTC);

    qdev_init_nofail(dev);
    spapr->rtc = dev;
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David Gibson 已提交
1344 1345 1346

    object_property_add_alias(qdev_get_machine(), "rtc-time",
                              OBJECT(spapr->rtc), "date", NULL);
1347 1348
}

1349
/* Returns whether we want to use VGA or not */
1350
static bool spapr_vga_init(PCIBus *pci_bus, Error **errp)
1351
{
1352 1353
    switch (vga_interface_type) {
    case VGA_NONE:
1354 1355 1356
        return false;
    case VGA_DEVICE:
        return true;
1357
    case VGA_STD:
1358
    case VGA_VIRTIO:
1359
        return pci_vga_init(pci_bus) != NULL;
1360
    default:
1361 1362 1363
        error_setg(errp,
                   "Unsupported VGA mode, only -vga std or -vga virtio is supported");
        return false;
1364 1365 1366
    }
}

1367 1368
static int spapr_post_load(void *opaque, int version_id)
{
1369
    sPAPRMachineState *spapr = (sPAPRMachineState *)opaque;
1370 1371
    int err = 0;

1372 1373 1374 1375 1376 1377 1378
    if (!object_dynamic_cast(OBJECT(spapr->ics), TYPE_ICS_KVM)) {
        int i;
        for (i = 0; i < spapr->nr_servers; i++) {
            icp_resend(&spapr->icps[i]);
        }
    }

S
Stefan Weil 已提交
1379
    /* In earlier versions, there was no separate qdev for the PAPR
1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394
     * RTC, so the RTC offset was stored directly in sPAPREnvironment.
     * So when migrating from those versions, poke the incoming offset
     * value into the RTC device */
    if (version_id < 3) {
        err = spapr_rtc_import_offset(spapr->rtc, spapr->rtc_offset);
    }

    return err;
}

static bool version_before_3(void *opaque, int version_id)
{
    return version_id < 3;
}

1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456
static bool spapr_ov5_cas_needed(void *opaque)
{
    sPAPRMachineState *spapr = opaque;
    sPAPROptionVector *ov5_mask = spapr_ovec_new();
    sPAPROptionVector *ov5_legacy = spapr_ovec_new();
    sPAPROptionVector *ov5_removed = spapr_ovec_new();
    bool cas_needed;

    /* Prior to the introduction of sPAPROptionVector, we had two option
     * vectors we dealt with: OV5_FORM1_AFFINITY, and OV5_DRCONF_MEMORY.
     * Both of these options encode machine topology into the device-tree
     * in such a way that the now-booted OS should still be able to interact
     * appropriately with QEMU regardless of what options were actually
     * negotiatied on the source side.
     *
     * As such, we can avoid migrating the CAS-negotiated options if these
     * are the only options available on the current machine/platform.
     * Since these are the only options available for pseries-2.7 and
     * earlier, this allows us to maintain old->new/new->old migration
     * compatibility.
     *
     * For QEMU 2.8+, there are additional CAS-negotiatable options available
     * via default pseries-2.8 machines and explicit command-line parameters.
     * Some of these options, like OV5_HP_EVT, *do* require QEMU to be aware
     * of the actual CAS-negotiated values to continue working properly. For
     * example, availability of memory unplug depends on knowing whether
     * OV5_HP_EVT was negotiated via CAS.
     *
     * Thus, for any cases where the set of available CAS-negotiatable
     * options extends beyond OV5_FORM1_AFFINITY and OV5_DRCONF_MEMORY, we
     * include the CAS-negotiated options in the migration stream.
     */
    spapr_ovec_set(ov5_mask, OV5_FORM1_AFFINITY);
    spapr_ovec_set(ov5_mask, OV5_DRCONF_MEMORY);

    /* spapr_ovec_diff returns true if bits were removed. we avoid using
     * the mask itself since in the future it's possible "legacy" bits may be
     * removed via machine options, which could generate a false positive
     * that breaks migration.
     */
    spapr_ovec_intersect(ov5_legacy, spapr->ov5, ov5_mask);
    cas_needed = spapr_ovec_diff(ov5_removed, spapr->ov5, ov5_legacy);

    spapr_ovec_cleanup(ov5_mask);
    spapr_ovec_cleanup(ov5_legacy);
    spapr_ovec_cleanup(ov5_removed);

    return cas_needed;
}

static const VMStateDescription vmstate_spapr_ov5_cas = {
    .name = "spapr_option_vector_ov5_cas",
    .version_id = 1,
    .minimum_version_id = 1,
    .needed = spapr_ov5_cas_needed,
    .fields = (VMStateField[]) {
        VMSTATE_STRUCT_POINTER_V(ov5_cas, sPAPRMachineState, 1,
                                 vmstate_spapr_ovec, sPAPROptionVector),
        VMSTATE_END_OF_LIST()
    },
};

1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474
static bool spapr_patb_entry_needed(void *opaque)
{
    sPAPRMachineState *spapr = opaque;

    return !!spapr->patb_entry;
}

static const VMStateDescription vmstate_spapr_patb_entry = {
    .name = "spapr_patb_entry",
    .version_id = 1,
    .minimum_version_id = 1,
    .needed = spapr_patb_entry_needed,
    .fields = (VMStateField[]) {
        VMSTATE_UINT64(patb_entry, sPAPRMachineState),
        VMSTATE_END_OF_LIST()
    },
};

1475 1476
static const VMStateDescription vmstate_spapr = {
    .name = "spapr",
1477
    .version_id = 3,
1478
    .minimum_version_id = 1,
1479
    .post_load = spapr_post_load,
1480
    .fields = (VMStateField[]) {
1481 1482
        /* used to be @next_irq */
        VMSTATE_UNUSED_BUFFER(version_before_3, 0, 4),
1483 1484

        /* RTC offset */
1485
        VMSTATE_UINT64_TEST(rtc_offset, sPAPRMachineState, version_before_3),
1486

1487
        VMSTATE_PPC_TIMEBASE_V(tb, sPAPRMachineState, 2),
1488 1489
        VMSTATE_END_OF_LIST()
    },
1490 1491
    .subsections = (const VMStateDescription*[]) {
        &vmstate_spapr_ov5_cas,
1492
        &vmstate_spapr_patb_entry,
1493 1494
        NULL
    }
1495 1496 1497 1498
};

static int htab_save_setup(QEMUFile *f, void *opaque)
{
1499
    sPAPRMachineState *spapr = opaque;
1500 1501 1502 1503

    /* "Iteration" header */
    qemu_put_be32(f, spapr->htab_shift);

1504 1505 1506 1507 1508 1509 1510 1511
    if (spapr->htab) {
        spapr->htab_save_index = 0;
        spapr->htab_first_pass = true;
    } else {
        assert(kvm_enabled());
    }


1512 1513 1514
    return 0;
}

1515
static void htab_save_first_pass(QEMUFile *f, sPAPRMachineState *spapr,
1516 1517
                                 int64_t max_ns)
{
1518
    bool has_timeout = max_ns != -1;
1519 1520
    int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64;
    int index = spapr->htab_save_index;
1521
    int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536

    assert(spapr->htab_first_pass);

    do {
        int chunkstart;

        /* Consume invalid HPTEs */
        while ((index < htabslots)
               && !HPTE_VALID(HPTE(spapr->htab, index))) {
            index++;
            CLEAN_HPTE(HPTE(spapr->htab, index));
        }

        /* Consume valid HPTEs */
        chunkstart = index;
1537
        while ((index < htabslots) && (index - chunkstart < USHRT_MAX)
1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551
               && HPTE_VALID(HPTE(spapr->htab, index))) {
            index++;
            CLEAN_HPTE(HPTE(spapr->htab, index));
        }

        if (index > chunkstart) {
            int n_valid = index - chunkstart;

            qemu_put_be32(f, chunkstart);
            qemu_put_be16(f, n_valid);
            qemu_put_be16(f, 0);
            qemu_put_buffer(f, HPTE(spapr->htab, chunkstart),
                            HASH_PTE_SIZE_64 * n_valid);

1552 1553
            if (has_timeout &&
                (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) {
1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566
                break;
            }
        }
    } while ((index < htabslots) && !qemu_file_rate_limit(f));

    if (index >= htabslots) {
        assert(index == htabslots);
        index = 0;
        spapr->htab_first_pass = false;
    }
    spapr->htab_save_index = index;
}

1567
static int htab_save_later_pass(QEMUFile *f, sPAPRMachineState *spapr,
1568
                                int64_t max_ns)
1569 1570 1571 1572 1573
{
    bool final = max_ns < 0;
    int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64;
    int examined = 0, sent = 0;
    int index = spapr->htab_save_index;
1574
    int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589

    assert(!spapr->htab_first_pass);

    do {
        int chunkstart, invalidstart;

        /* Consume non-dirty HPTEs */
        while ((index < htabslots)
               && !HPTE_DIRTY(HPTE(spapr->htab, index))) {
            index++;
            examined++;
        }

        chunkstart = index;
        /* Consume valid dirty HPTEs */
1590
        while ((index < htabslots) && (index - chunkstart < USHRT_MAX)
1591 1592 1593 1594 1595 1596 1597 1598 1599
               && HPTE_DIRTY(HPTE(spapr->htab, index))
               && HPTE_VALID(HPTE(spapr->htab, index))) {
            CLEAN_HPTE(HPTE(spapr->htab, index));
            index++;
            examined++;
        }

        invalidstart = index;
        /* Consume invalid dirty HPTEs */
1600
        while ((index < htabslots) && (index - invalidstart < USHRT_MAX)
1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618
               && HPTE_DIRTY(HPTE(spapr->htab, index))
               && !HPTE_VALID(HPTE(spapr->htab, index))) {
            CLEAN_HPTE(HPTE(spapr->htab, index));
            index++;
            examined++;
        }

        if (index > chunkstart) {
            int n_valid = invalidstart - chunkstart;
            int n_invalid = index - invalidstart;

            qemu_put_be32(f, chunkstart);
            qemu_put_be16(f, n_valid);
            qemu_put_be16(f, n_invalid);
            qemu_put_buffer(f, HPTE(spapr->htab, chunkstart),
                            HASH_PTE_SIZE_64 * n_valid);
            sent += index - chunkstart;

1619
            if (!final && (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) {
1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640
                break;
            }
        }

        if (examined >= htabslots) {
            break;
        }

        if (index >= htabslots) {
            assert(index == htabslots);
            index = 0;
        }
    } while ((examined < htabslots) && (!qemu_file_rate_limit(f) || final));

    if (index >= htabslots) {
        assert(index == htabslots);
        index = 0;
    }

    spapr->htab_save_index = index;

1641
    return (examined >= htabslots) && (sent == 0) ? 1 : 0;
1642 1643
}

1644 1645 1646
#define MAX_ITERATION_NS    5000000 /* 5 ms */
#define MAX_KVM_BUF_SIZE    2048

1647 1648
static int htab_save_iterate(QEMUFile *f, void *opaque)
{
1649
    sPAPRMachineState *spapr = opaque;
1650
    int fd;
1651
    int rc = 0;
1652 1653 1654 1655

    /* Iteration header */
    qemu_put_be32(f, 0);

1656 1657 1658
    if (!spapr->htab) {
        assert(kvm_enabled());

1659 1660 1661
        fd = get_htab_fd(spapr);
        if (fd < 0) {
            return fd;
1662 1663
        }

1664
        rc = kvmppc_save_htab(f, fd, MAX_KVM_BUF_SIZE, MAX_ITERATION_NS);
1665 1666 1667 1668
        if (rc < 0) {
            return rc;
        }
    } else  if (spapr->htab_first_pass) {
1669 1670
        htab_save_first_pass(f, spapr, MAX_ITERATION_NS);
    } else {
1671
        rc = htab_save_later_pass(f, spapr, MAX_ITERATION_NS);
1672 1673 1674 1675 1676 1677 1678
    }

    /* End marker */
    qemu_put_be32(f, 0);
    qemu_put_be16(f, 0);
    qemu_put_be16(f, 0);

1679
    return rc;
1680 1681 1682 1683
}

static int htab_save_complete(QEMUFile *f, void *opaque)
{
1684
    sPAPRMachineState *spapr = opaque;
1685
    int fd;
1686 1687 1688 1689

    /* Iteration header */
    qemu_put_be32(f, 0);

1690 1691 1692 1693 1694
    if (!spapr->htab) {
        int rc;

        assert(kvm_enabled());

1695 1696 1697
        fd = get_htab_fd(spapr);
        if (fd < 0) {
            return fd;
1698 1699
        }

1700
        rc = kvmppc_save_htab(f, fd, MAX_KVM_BUF_SIZE, -1);
1701 1702 1703 1704
        if (rc < 0) {
            return rc;
        }
    } else {
1705 1706 1707
        if (spapr->htab_first_pass) {
            htab_save_first_pass(f, spapr, -1);
        }
1708 1709
        htab_save_later_pass(f, spapr, -1);
    }
1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720

    /* End marker */
    qemu_put_be32(f, 0);
    qemu_put_be16(f, 0);
    qemu_put_be16(f, 0);

    return 0;
}

static int htab_load(QEMUFile *f, void *opaque, int version_id)
{
1721
    sPAPRMachineState *spapr = opaque;
1722
    uint32_t section_hdr;
1723
    int fd = -1;
1724 1725

    if (version_id < 1 || version_id > 1) {
1726
        error_report("htab_load() bad version");
1727 1728 1729 1730 1731 1732
        return -EINVAL;
    }

    section_hdr = qemu_get_be32(f);

    if (section_hdr) {
1733
        Error *local_err = NULL;
1734 1735 1736 1737 1738

        /* First section gives the htab size */
        spapr_reallocate_hpt(spapr, section_hdr, &local_err);
        if (local_err) {
            error_report_err(local_err);
1739 1740 1741 1742 1743
            return -EINVAL;
        }
        return 0;
    }

1744 1745 1746 1747 1748
    if (!spapr->htab) {
        assert(kvm_enabled());

        fd = kvmppc_get_htab_fd(true);
        if (fd < 0) {
1749 1750
            error_report("Unable to open fd to restore KVM hash table: %s",
                         strerror(errno));
1751 1752 1753
        }
    }

1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766
    while (true) {
        uint32_t index;
        uint16_t n_valid, n_invalid;

        index = qemu_get_be32(f);
        n_valid = qemu_get_be16(f);
        n_invalid = qemu_get_be16(f);

        if ((index == 0) && (n_valid == 0) && (n_invalid == 0)) {
            /* End of Stream */
            break;
        }

1767
        if ((index + n_valid + n_invalid) >
1768 1769
            (HTAB_SIZE(spapr) / HASH_PTE_SIZE_64)) {
            /* Bad index in stream */
1770 1771 1772
            error_report(
                "htab_load() bad index %d (%hd+%hd entries) in htab stream (htab_shift=%d)",
                index, n_valid, n_invalid, spapr->htab_shift);
1773 1774 1775
            return -EINVAL;
        }

1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793
        if (spapr->htab) {
            if (n_valid) {
                qemu_get_buffer(f, HPTE(spapr->htab, index),
                                HASH_PTE_SIZE_64 * n_valid);
            }
            if (n_invalid) {
                memset(HPTE(spapr->htab, index + n_valid), 0,
                       HASH_PTE_SIZE_64 * n_invalid);
            }
        } else {
            int rc;

            assert(fd >= 0);

            rc = kvmppc_load_htab_chunk(f, fd, index, n_valid, n_invalid);
            if (rc < 0) {
                return rc;
            }
1794 1795 1796
        }
    }

1797 1798 1799 1800 1801
    if (!spapr->htab) {
        assert(fd >= 0);
        close(fd);
    }

1802 1803 1804
    return 0;
}

1805 1806 1807 1808 1809 1810 1811
static void htab_cleanup(void *opaque)
{
    sPAPRMachineState *spapr = opaque;

    close_htab_fd(spapr);
}

1812 1813 1814
static SaveVMHandlers savevm_htab_handlers = {
    .save_live_setup = htab_save_setup,
    .save_live_iterate = htab_save_iterate,
1815
    .save_live_complete_precopy = htab_save_complete,
1816
    .cleanup = htab_cleanup,
1817 1818 1819
    .load_state = htab_load,
};

1820 1821 1822 1823 1824 1825 1826
static void spapr_boot_set(void *opaque, const char *boot_device,
                           Error **errp)
{
    MachineState *machine = MACHINE(qdev_get_machine());
    machine->boot_order = g_strdup(boot_device);
}

D
David Gibson 已提交
1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848
/*
 * Reset routine for LMB DR devices.
 *
 * Unlike PCI DR devices, LMB DR devices explicitly register this reset
 * routine. Reset for PCI DR devices will be handled by PHB reset routine
 * when it walks all its children devices. LMB devices reset occurs
 * as part of spapr_ppc_reset().
 */
static void spapr_drc_reset(void *opaque)
{
    sPAPRDRConnector *drc = opaque;
    DeviceState *d = DEVICE(drc);

    if (d) {
        device_reset(d);
    }
}

static void spapr_create_lmb_dr_connectors(sPAPRMachineState *spapr)
{
    MachineState *machine = MACHINE(spapr);
    uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE;
1849
    uint32_t nr_lmbs = (machine->maxram_size - machine->ram_size)/lmb_size;
D
David Gibson 已提交
1850 1851 1852 1853 1854 1855
    int i;

    for (i = 0; i < nr_lmbs; i++) {
        sPAPRDRConnector *drc;
        uint64_t addr;

1856
        addr = i * lmb_size + spapr->hotplug_memory.base;
D
David Gibson 已提交
1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867
        drc = spapr_dr_connector_new(OBJECT(spapr), SPAPR_DR_CONNECTOR_TYPE_LMB,
                                     addr/lmb_size);
        qemu_register_reset(spapr_drc_reset, drc);
    }
}

/*
 * If RAM size, maxmem size and individual node mem sizes aren't aligned
 * to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest
 * since we can't support such unaligned sizes with DRCONF_MEMORY.
 */
1868
static void spapr_validate_node_memory(MachineState *machine, Error **errp)
D
David Gibson 已提交
1869 1870 1871
{
    int i;

1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885
    if (machine->ram_size % SPAPR_MEMORY_BLOCK_SIZE) {
        error_setg(errp, "Memory size 0x" RAM_ADDR_FMT
                   " is not aligned to %llu MiB",
                   machine->ram_size,
                   SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
        return;
    }

    if (machine->maxram_size % SPAPR_MEMORY_BLOCK_SIZE) {
        error_setg(errp, "Maximum memory size 0x" RAM_ADDR_FMT
                   " is not aligned to %llu MiB",
                   machine->ram_size,
                   SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
        return;
D
David Gibson 已提交
1886 1887 1888 1889
    }

    for (i = 0; i < nb_numa_nodes; i++) {
        if (numa_info[i].node_mem % SPAPR_MEMORY_BLOCK_SIZE) {
1890 1891 1892 1893 1894 1895
            error_setg(errp,
                       "Node %d memory size 0x%" PRIx64
                       " is not aligned to %llu MiB",
                       i, numa_info[i].node_mem,
                       SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
            return;
D
David Gibson 已提交
1896 1897 1898 1899
        }
    }
}

1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913
/* find cpu slot in machine->possible_cpus by core_id */
static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *idx)
{
    int index = id / smp_threads;

    if (index >= ms->possible_cpus->len) {
        return NULL;
    }
    if (idx) {
        *idx = index;
    }
    return &ms->possible_cpus->cpus[index];
}

1914 1915 1916 1917 1918 1919
static void spapr_init_cpus(sPAPRMachineState *spapr)
{
    MachineState *machine = MACHINE(spapr);
    MachineClass *mc = MACHINE_GET_CLASS(machine);
    char *type = spapr_get_cpu_core_type(machine->cpu_model);
    int smt = kvmppc_smt_threads();
1920 1921
    const CPUArchIdList *possible_cpus;
    int boot_cores_nr = smp_cpus / smp_threads;
1922 1923 1924 1925 1926 1927 1928
    int i;

    if (!type) {
        error_report("Unable to find sPAPR CPU Core definition");
        exit(1);
    }

1929
    possible_cpus = mc->possible_cpu_arch_ids(machine);
1930
    if (mc->has_hotpluggable_cpus) {
1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945
        if (smp_cpus % smp_threads) {
            error_report("smp_cpus (%u) must be multiple of threads (%u)",
                         smp_cpus, smp_threads);
            exit(1);
        }
        if (max_cpus % smp_threads) {
            error_report("max_cpus (%u) must be multiple of threads (%u)",
                         max_cpus, smp_threads);
            exit(1);
        }
    } else {
        if (max_cpus != smp_cpus) {
            error_report("This machine version does not support CPU hotplug");
            exit(1);
        }
1946
        boot_cores_nr = possible_cpus->len;
1947 1948
    }

1949
    for (i = 0; i < possible_cpus->len; i++) {
1950 1951
        int core_id = i * smp_threads;

1952
        if (mc->has_hotpluggable_cpus) {
1953 1954 1955 1956 1957 1958 1959 1960
            sPAPRDRConnector *drc =
                spapr_dr_connector_new(OBJECT(spapr),
                                       SPAPR_DR_CONNECTOR_TYPE_CPU,
                                       (core_id / smp_threads) * smt);

            qemu_register_reset(spapr_drc_reset, drc);
        }

1961
        if (i < boot_cores_nr) {
1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979
            Object *core  = object_new(type);
            int nr_threads = smp_threads;

            /* Handle the partially filled core for older machine types */
            if ((i + 1) * smp_threads >= smp_cpus) {
                nr_threads = smp_cpus - i * smp_threads;
            }

            object_property_set_int(core, nr_threads, "nr-threads",
                                    &error_fatal);
            object_property_set_int(core, core_id, CPU_CORE_PROP_CORE_ID,
                                    &error_fatal);
            object_property_set_bool(core, true, "realized", &error_fatal);
        }
    }
    g_free(type);
}

1980
/* pSeries LPAR / sPAPR hardware init */
1981
static void ppc_spapr_init(MachineState *machine)
1982
{
1983
    sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
D
David Gibson 已提交
1984
    sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
1985 1986
    const char *kernel_filename = machine->kernel_filename;
    const char *initrd_filename = machine->initrd_filename;
1987
    PCIHostState *phb;
1988
    int i;
A
Avi Kivity 已提交
1989 1990
    MemoryRegion *sysmem = get_system_memory();
    MemoryRegion *ram = g_new(MemoryRegion, 1);
1991 1992
    MemoryRegion *rma_region;
    void *rma = NULL;
A
Avi Kivity 已提交
1993
    hwaddr rma_alloc_size;
1994
    hwaddr node0_size = spapr_node0_size();
1995
    long load_limit, fw_size;
1996
    char *filename;
1997
    int smt = kvmppc_smt_threads();
1998

1999
    msi_nonbroken = true;
2000

2001 2002
    QLIST_INIT(&spapr->phbs);

2003
    /* Allocate RMA if necessary */
2004
    rma_alloc_size = kvmppc_alloc_rma(&rma);
2005 2006

    if (rma_alloc_size == -1) {
2007
        error_report("Unable to create RMA");
2008 2009
        exit(1);
    }
2010

2011
    if (rma_alloc_size && (rma_alloc_size < node0_size)) {
2012
        spapr->rma_size = rma_alloc_size;
2013
    } else {
2014
        spapr->rma_size = node0_size;
2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028

        /* With KVM, we don't actually know whether KVM supports an
         * unbounded RMA (PR KVM) or is limited by the hash table size
         * (HV KVM using VRMA), so we always assume the latter
         *
         * In that case, we also limit the initial allocations for RTAS
         * etc... to 256M since we have no way to know what the VRMA size
         * is going to be as it depends on the size of the hash table
         * isn't determined yet.
         */
        if (kvm_enabled()) {
            spapr->vrma_adjust = 1;
            spapr->rma_size = MIN(spapr->rma_size, 0x10000000);
        }
2029 2030 2031 2032 2033 2034 2035

        /* Actually we don't support unbounded RMA anymore since we
         * added proper emulation of HV mode. The max we can get is
         * 16G which also happens to be what we configure for PAPR
         * mode so make sure we don't do anything bigger than that
         */
        spapr->rma_size = MIN(spapr->rma_size, 0x400000000ull);
2036 2037
    }

2038
    if (spapr->rma_size > node0_size) {
2039 2040
        error_report("Numa node 0 has to span the RMA (%#08"HWADDR_PRIx")",
                     spapr->rma_size);
2041 2042 2043
        exit(1);
    }

2044 2045
    /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
    load_limit = MIN(spapr->rma_size, RTAS_MAX_ADDR) - FW_OVERHEAD;
2046

2047
    /* Set up Interrupt Controller before we create the VCPUs */
2048 2049
    xics_system_init(machine, DIV_ROUND_UP(max_cpus * smt, smp_threads),
                     XICS_IRQS_SPAPR, &error_fatal);
2050

2051 2052 2053 2054
    /* Set up containers for ibm,client-set-architecture negotiated options */
    spapr->ov5 = spapr_ovec_new();
    spapr->ov5_cas = spapr_ovec_new();

D
David Gibson 已提交
2055
    if (smc->dr_lmb_enabled) {
2056
        spapr_ovec_set(spapr->ov5, OV5_DRCONF_MEMORY);
2057
        spapr_validate_node_memory(machine, &error_fatal);
D
David Gibson 已提交
2058 2059
    }

2060 2061
    spapr_ovec_set(spapr->ov5, OV5_FORM1_AFFINITY);

2062 2063 2064 2065 2066
    /* advertise support for dedicated HP event source to guests */
    if (spapr->use_hotplug_event_source) {
        spapr_ovec_set(spapr->ov5, OV5_HP_EVT);
    }

2067
    /* init CPUs */
2068
    if (machine->cpu_model == NULL) {
2069
        machine->cpu_model = kvm_enabled() ? "host" : smc->tcg_default_cpu;
2070
    }
2071

G
Greg Kurz 已提交
2072 2073
    ppc_cpu_parse_features(machine->cpu_model);

2074
    spapr_init_cpus(spapr);
2075

2076 2077 2078
    if (kvm_enabled()) {
        /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
        kvmppc_enable_logical_ci_hcalls();
2079
        kvmppc_enable_set_mode_hcall();
2080 2081 2082

        /* H_CLEAR_MOD/_REF are mandatory in PAPR, but off by default */
        kvmppc_enable_clear_ref_mod_hcalls();
2083 2084
    }

2085
    /* allocate RAM */
2086
    memory_region_allocate_system_memory(ram, NULL, "ppc_spapr.ram",
2087
                                         machine->ram_size);
2088
    memory_region_add_subregion(sysmem, 0, ram);
2089

2090 2091 2092 2093 2094 2095 2096 2097
    if (rma_alloc_size && rma) {
        rma_region = g_new(MemoryRegion, 1);
        memory_region_init_ram_ptr(rma_region, NULL, "ppc_spapr.rma",
                                   rma_alloc_size, rma);
        vmstate_register_ram_global(rma_region);
        memory_region_add_subregion(sysmem, 0, rma_region);
    }

2098 2099 2100
    /* initialize hotplug memory address space */
    if (machine->ram_size < machine->maxram_size) {
        ram_addr_t hotplug_mem_size = machine->maxram_size - machine->ram_size;
2101 2102 2103 2104 2105 2106 2107
        /*
         * Limit the number of hotpluggable memory slots to half the number
         * slots that KVM supports, leaving the other half for PCI and other
         * devices. However ensure that number of slots doesn't drop below 32.
         */
        int max_memslots = kvm_enabled() ? kvm_get_max_memslots() / 2 :
                           SPAPR_MAX_RAM_SLOTS;
2108

2109 2110 2111 2112
        if (max_memslots < SPAPR_MAX_RAM_SLOTS) {
            max_memslots = SPAPR_MAX_RAM_SLOTS;
        }
        if (machine->ram_slots > max_memslots) {
2113 2114
            error_report("Specified number of memory slots %"
                         PRIu64" exceeds max supported %d",
2115
                         machine->ram_slots, max_memslots);
2116
            exit(1);
2117 2118 2119 2120 2121 2122 2123 2124 2125 2126
        }

        spapr->hotplug_memory.base = ROUND_UP(machine->ram_size,
                                              SPAPR_HOTPLUG_MEM_ALIGN);
        memory_region_init(&spapr->hotplug_memory.mr, OBJECT(spapr),
                           "hotplug-memory", hotplug_mem_size);
        memory_region_add_subregion(sysmem, spapr->hotplug_memory.base,
                                    &spapr->hotplug_memory.mr);
    }

D
David Gibson 已提交
2127 2128 2129 2130
    if (smc->dr_lmb_enabled) {
        spapr_create_lmb_dr_connectors(spapr);
    }

2131
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
2132
    if (!filename) {
2133
        error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
2134 2135
        exit(1);
    }
2136
    spapr->rtas_size = get_image_size(filename);
2137 2138 2139 2140
    if (spapr->rtas_size < 0) {
        error_report("Could not get size of LPAR rtas '%s'", filename);
        exit(1);
    }
2141 2142
    spapr->rtas_blob = g_malloc(spapr->rtas_size);
    if (load_image_size(filename, spapr->rtas_blob, spapr->rtas_size) < 0) {
2143
        error_report("Could not load LPAR rtas '%s'", filename);
2144 2145
        exit(1);
    }
2146
    if (spapr->rtas_size > RTAS_MAX_SIZE) {
2147 2148
        error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
                     (size_t)spapr->rtas_size, RTAS_MAX_SIZE);
2149 2150
        exit(1);
    }
2151
    g_free(filename);
2152

2153
    /* Set up RTAS event infrastructure */
2154 2155
    spapr_events_init(spapr);

2156
    /* Set up the RTC RTAS interfaces */
2157
    spapr_rtc_create(spapr);
2158

2159
    /* Set up VIO bus */
2160 2161
    spapr->vio_bus = spapr_vio_bus_init();

P
Paolo Bonzini 已提交
2162
    for (i = 0; i < MAX_SERIAL_PORTS; i++) {
2163
        if (serial_hds[i]) {
2164
            spapr_vty_create(spapr->vio_bus, serial_hds[i]);
2165 2166
        }
    }
2167

D
David Gibson 已提交
2168 2169 2170
    /* We always have at least the nvram device on VIO */
    spapr_create_nvram(spapr);

2171
    /* Set up PCI */
2172 2173
    spapr_pci_rtas_init();

2174
    phb = spapr_create_phb(spapr, 0);
2175

P
Paolo Bonzini 已提交
2176
    for (i = 0; i < nb_nics; i++) {
2177 2178 2179
        NICInfo *nd = &nd_table[i];

        if (!nd->model) {
2180
            nd->model = g_strdup("ibmveth");
2181 2182 2183
        }

        if (strcmp(nd->model, "ibmveth") == 0) {
2184
            spapr_vlan_create(spapr->vio_bus, nd);
2185
        } else {
2186
            pci_nic_init_nofail(&nd_table[i], phb->bus, nd->model, NULL);
2187 2188 2189
        }
    }

2190
    for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
2191
        spapr_vscsi_create(spapr->vio_bus);
2192 2193
    }

2194
    /* Graphics */
2195
    if (spapr_vga_init(phb->bus, &error_fatal)) {
2196
        spapr->has_graphics = true;
2197
        machine->usb |= defaults_enabled() && !machine->usb_disabled;
2198 2199
    }

2200
    if (machine->usb) {
2201 2202 2203 2204 2205
        if (smc->use_ohci_by_default) {
            pci_create_simple(phb->bus, -1, "pci-ohci");
        } else {
            pci_create_simple(phb->bus, -1, "nec-usb-xhci");
        }
2206

2207
        if (spapr->has_graphics) {
2208 2209 2210 2211
            USBBus *usb_bus = usb_bus_find(-1);

            usb_create_simple(usb_bus, "usb-kbd");
            usb_create_simple(usb_bus, "usb-mouse");
2212 2213 2214
        }
    }

2215
    if (spapr->rma_size < (MIN_RMA_SLOF << 20)) {
2216 2217 2218
        error_report(
            "pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)",
            MIN_RMA_SLOF);
2219 2220 2221
        exit(1);
    }

2222 2223 2224
    if (kernel_filename) {
        uint64_t lowaddr = 0;

2225 2226 2227 2228 2229 2230 2231 2232 2233
        spapr->kernel_size = load_elf(kernel_filename, translate_kernel_address,
                                      NULL, NULL, &lowaddr, NULL, 1,
                                      PPC_ELF_MACHINE, 0, 0);
        if (spapr->kernel_size == ELF_LOAD_WRONG_ENDIAN) {
            spapr->kernel_size = load_elf(kernel_filename,
                                          translate_kernel_address, NULL, NULL,
                                          &lowaddr, NULL, 0, PPC_ELF_MACHINE,
                                          0, 0);
            spapr->kernel_le = spapr->kernel_size > 0;
2234
        }
2235 2236 2237
        if (spapr->kernel_size < 0) {
            error_report("error loading %s: %s", kernel_filename,
                         load_elf_strerror(spapr->kernel_size));
2238 2239 2240 2241 2242
            exit(1);
        }

        /* load initrd */
        if (initrd_filename) {
2243 2244 2245
            /* Try to locate the initrd in the gap between the kernel
             * and the firmware. Add a bit of space just in case
             */
2246 2247 2248 2249 2250 2251 2252
            spapr->initrd_base = (KERNEL_LOAD_ADDR + spapr->kernel_size
                                  + 0x1ffff) & ~0xffff;
            spapr->initrd_size = load_image_targphys(initrd_filename,
                                                     spapr->initrd_base,
                                                     load_limit
                                                     - spapr->initrd_base);
            if (spapr->initrd_size < 0) {
2253 2254
                error_report("could not load initial ram disk '%s'",
                             initrd_filename);
2255 2256 2257
                exit(1);
            }
        }
2258
    }
2259

2260 2261 2262 2263
    if (bios_name == NULL) {
        bios_name = FW_FILE_NAME;
    }
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
2264
    if (!filename) {
2265
        error_report("Could not find LPAR firmware '%s'", bios_name);
2266 2267
        exit(1);
    }
2268
    fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
2269 2270
    if (fw_size <= 0) {
        error_report("Could not load LPAR firmware '%s'", filename);
2271 2272 2273 2274
        exit(1);
    }
    g_free(filename);

2275 2276 2277
    /* FIXME: Should register things through the MachineState's qdev
     * interface, this is a legacy from the sPAPREnvironment structure
     * which predated MachineState but had a similar function */
2278 2279 2280 2281
    vmstate_register(NULL, 0, &vmstate_spapr, spapr);
    register_savevm_live(NULL, "spapr/htab", -1, 1,
                         &savevm_htab_handlers, spapr);

2282 2283 2284 2285
    /* used by RTAS */
    QTAILQ_INIT(&spapr->ccs_list);
    qemu_register_reset(spapr_ccs_reset_hook, spapr);

2286
    qemu_register_boot_set(spapr_boot_set, spapr);
2287 2288 2289 2290 2291 2292

    /* to stop and start vmclock */
    if (kvm_enabled()) {
        qemu_add_vm_change_state_handler(cpu_ppc_clock_vm_state_change,
                                         &spapr->tb);
    }
2293 2294
}

2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312
static int spapr_kvm_type(const char *vm_type)
{
    if (!vm_type) {
        return 0;
    }

    if (!strcmp(vm_type, "HV")) {
        return 1;
    }

    if (!strcmp(vm_type, "PR")) {
        return 2;
    }

    error_report("Unknown kvm-type specified '%s'", vm_type);
    exit(1);
}

2313
/*
2314
 * Implementation of an interface to adjust firmware path
2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360 2361
 * for the bootindex property handling.
 */
static char *spapr_get_fw_dev_path(FWPathProvider *p, BusState *bus,
                                   DeviceState *dev)
{
#define CAST(type, obj, name) \
    ((type *)object_dynamic_cast(OBJECT(obj), (name)))
    SCSIDevice *d = CAST(SCSIDevice,  dev, TYPE_SCSI_DEVICE);
    sPAPRPHBState *phb = CAST(sPAPRPHBState, dev, TYPE_SPAPR_PCI_HOST_BRIDGE);

    if (d) {
        void *spapr = CAST(void, bus->parent, "spapr-vscsi");
        VirtIOSCSI *virtio = CAST(VirtIOSCSI, bus->parent, TYPE_VIRTIO_SCSI);
        USBDevice *usb = CAST(USBDevice, bus->parent, TYPE_USB_DEVICE);

        if (spapr) {
            /*
             * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
             * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
             * in the top 16 bits of the 64-bit LUN
             */
            unsigned id = 0x8000 | (d->id << 8) | d->lun;
            return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
                                   (uint64_t)id << 48);
        } else if (virtio) {
            /*
             * We use SRP luns of the form 01000000 | (target << 8) | lun
             * in the top 32 bits of the 64-bit LUN
             * Note: the quote above is from SLOF and it is wrong,
             * the actual binding is:
             * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
             */
            unsigned id = 0x1000000 | (d->id << 16) | d->lun;
            return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
                                   (uint64_t)id << 32);
        } else if (usb) {
            /*
             * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
             * in the top 32 bits of the 64-bit LUN
             */
            unsigned usb_port = atoi(usb->port->path);
            unsigned id = 0x1000000 | (usb_port << 16) | d->lun;
            return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
                                   (uint64_t)id << 32);
        }
    }

2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372 2373 2374
    /*
     * SLOF probes the USB devices, and if it recognizes that the device is a
     * storage device, it changes its name to "storage" instead of "usb-host",
     * and additionally adds a child node for the SCSI LUN, so the correct
     * boot path in SLOF is something like .../storage@1/disk@xxx" instead.
     */
    if (strcmp("usb-host", qdev_fw_name(dev)) == 0) {
        USBDevice *usbdev = CAST(USBDevice, dev, TYPE_USB_DEVICE);
        if (usb_host_dev_is_scsi_storage(usbdev)) {
            return g_strdup_printf("storage@%s/disk", usbdev->port->path);
        }
    }

2375 2376 2377 2378 2379 2380 2381 2382
    if (phb) {
        /* Replace "pci" with "pci@800000020000000" */
        return g_strdup_printf("pci@%"PRIX64, phb->buid);
    }

    return NULL;
}

E
Eduardo Habkost 已提交
2383 2384
static char *spapr_get_kvm_type(Object *obj, Error **errp)
{
2385
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
E
Eduardo Habkost 已提交
2386

2387
    return g_strdup(spapr->kvm_type);
E
Eduardo Habkost 已提交
2388 2389 2390 2391
}

static void spapr_set_kvm_type(Object *obj, const char *value, Error **errp)
{
2392
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
E
Eduardo Habkost 已提交
2393

2394 2395
    g_free(spapr->kvm_type);
    spapr->kvm_type = g_strdup(value);
E
Eduardo Habkost 已提交
2396 2397
}

2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412
static bool spapr_get_modern_hotplug_events(Object *obj, Error **errp)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);

    return spapr->use_hotplug_event_source;
}

static void spapr_set_modern_hotplug_events(Object *obj, bool value,
                                            Error **errp)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);

    spapr->use_hotplug_event_source = value;
}

E
Eduardo Habkost 已提交
2413 2414
static void spapr_machine_initfn(Object *obj)
{
2415 2416 2417
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);

    spapr->htab_fd = -1;
2418
    spapr->use_hotplug_event_source = true;
E
Eduardo Habkost 已提交
2419 2420
    object_property_add_str(obj, "kvm-type",
                            spapr_get_kvm_type, spapr_set_kvm_type, NULL);
2421 2422 2423
    object_property_set_description(obj, "kvm-type",
                                    "Specifies the KVM virtualization mode (HV, PR)",
                                    NULL);
2424 2425 2426 2427 2428 2429 2430 2431 2432
    object_property_add_bool(obj, "modern-hotplug-events",
                            spapr_get_modern_hotplug_events,
                            spapr_set_modern_hotplug_events,
                            NULL);
    object_property_set_description(obj, "modern-hotplug-events",
                                    "Use dedicated hotplug event mechanism in"
                                    " place of standard EPOW events when possible"
                                    " (required for memory hot-unplug support)",
                                    NULL);
E
Eduardo Habkost 已提交
2433 2434
}

2435 2436 2437 2438 2439 2440 2441
static void spapr_machine_finalizefn(Object *obj)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);

    g_free(spapr->kvm_type);
}

2442
void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg)
2443 2444 2445 2446 2447 2448 2449 2450 2451 2452
{
    cpu_synchronize_state(cs);
    ppc_cpu_do_system_reset(cs);
}

static void spapr_nmi(NMIState *n, int cpu_index, Error **errp)
{
    CPUState *cs;

    CPU_FOREACH(cs) {
2453
        async_run_on_cpu(cs, spapr_do_system_reset_on_cpu, RUN_ON_CPU_NULL);
2454 2455 2456
    }
}

2457 2458 2459
static void spapr_add_lmbs(DeviceState *dev, uint64_t addr_start, uint64_t size,
                           uint32_t node, bool dedicated_hp_event_source,
                           Error **errp)
B
Bharata B Rao 已提交
2460 2461 2462 2463 2464 2465
{
    sPAPRDRConnector *drc;
    sPAPRDRConnectorClass *drck;
    uint32_t nr_lmbs = size/SPAPR_MEMORY_BLOCK_SIZE;
    int i, fdt_offset, fdt_size;
    void *fdt;
2466
    uint64_t addr = addr_start;
B
Bharata B Rao 已提交
2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479

    for (i = 0; i < nr_lmbs; i++) {
        drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB,
                addr/SPAPR_MEMORY_BLOCK_SIZE);
        g_assert(drc);

        fdt = create_device_tree(&fdt_size);
        fdt_offset = spapr_populate_memory_node(fdt, node, addr,
                                                SPAPR_MEMORY_BLOCK_SIZE);

        drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
        drck->attach(drc, dev, fdt, fdt_offset, !dev->hotplugged, errp);
        addr += SPAPR_MEMORY_BLOCK_SIZE;
2480 2481 2482 2483 2484
        if (!dev->hotplugged) {
            /* guests expect coldplugged LMBs to be pre-allocated */
            drck->set_allocation_state(drc, SPAPR_DR_ALLOCATION_STATE_USABLE);
            drck->set_isolation_state(drc, SPAPR_DR_ISOLATION_STATE_UNISOLATED);
        }
B
Bharata B Rao 已提交
2485
    }
2486 2487 2488 2489
    /* send hotplug notification to the
     * guest only in case of hotplugged memory
     */
    if (dev->hotplugged) {
2490 2491 2492 2493 2494 2495 2496 2497 2498 2499 2500
        if (dedicated_hp_event_source) {
            drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB,
                    addr_start / SPAPR_MEMORY_BLOCK_SIZE);
            drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
            spapr_hotplug_req_add_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB,
                                                   nr_lmbs,
                                                   drck->get_index(drc));
        } else {
            spapr_hotplug_req_add_by_count(SPAPR_DR_CONNECTOR_TYPE_LMB,
                                           nr_lmbs);
        }
2501
    }
B
Bharata B Rao 已提交
2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514
}

static void spapr_memory_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
                              uint32_t node, Error **errp)
{
    Error *local_err = NULL;
    sPAPRMachineState *ms = SPAPR_MACHINE(hotplug_dev);
    PCDIMMDevice *dimm = PC_DIMM(dev);
    PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
    MemoryRegion *mr = ddc->get_memory_region(dimm);
    uint64_t align = memory_region_get_alignment(mr);
    uint64_t size = memory_region_size(mr);
    uint64_t addr;
2515
    char *mem_dev;
B
Bharata B Rao 已提交
2516 2517 2518 2519 2520 2521 2522

    if (size % SPAPR_MEMORY_BLOCK_SIZE) {
        error_setg(&local_err, "Hotplugged memory size must be a multiple of "
                      "%lld MB", SPAPR_MEMORY_BLOCK_SIZE/M_BYTE);
        goto out;
    }

2523 2524 2525 2526 2527 2528 2529
    mem_dev = object_property_get_str(OBJECT(dimm), PC_DIMM_MEMDEV_PROP, NULL);
    if (mem_dev && !kvmppc_is_mem_backend_page_size_ok(mem_dev)) {
        error_setg(&local_err, "Memory backend has bad page size. "
                   "Use 'memory-backend-file' with correct mem-path.");
        goto out;
    }

2530
    pc_dimm_memory_plug(dev, &ms->hotplug_memory, mr, align, &local_err);
B
Bharata B Rao 已提交
2531 2532 2533 2534 2535 2536 2537 2538 2539 2540
    if (local_err) {
        goto out;
    }

    addr = object_property_get_int(OBJECT(dimm), PC_DIMM_ADDR_PROP, &local_err);
    if (local_err) {
        pc_dimm_memory_unplug(dev, &ms->hotplug_memory, mr);
        goto out;
    }

2541 2542 2543
    spapr_add_lmbs(dev, addr, size, node,
                   spapr_ovec_test(ms->ov5_cas, OV5_HP_EVT),
                   &error_abort);
B
Bharata B Rao 已提交
2544 2545 2546 2547 2548

out:
    error_propagate(errp, local_err);
}

B
Bharata B Rao 已提交
2549 2550 2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627 2628 2629 2630 2631 2632
typedef struct sPAPRDIMMState {
    uint32_t nr_lmbs;
} sPAPRDIMMState;

static void spapr_lmb_release(DeviceState *dev, void *opaque)
{
    sPAPRDIMMState *ds = (sPAPRDIMMState *)opaque;
    HotplugHandler *hotplug_ctrl;

    if (--ds->nr_lmbs) {
        return;
    }

    g_free(ds);

    /*
     * Now that all the LMBs have been removed by the guest, call the
     * pc-dimm unplug handler to cleanup up the pc-dimm device.
     */
    hotplug_ctrl = qdev_get_hotplug_handler(dev);
    hotplug_handler_unplug(hotplug_ctrl, dev, &error_abort);
}

static void spapr_del_lmbs(DeviceState *dev, uint64_t addr_start, uint64_t size,
                           Error **errp)
{
    sPAPRDRConnector *drc;
    sPAPRDRConnectorClass *drck;
    uint32_t nr_lmbs = size / SPAPR_MEMORY_BLOCK_SIZE;
    int i;
    sPAPRDIMMState *ds = g_malloc0(sizeof(sPAPRDIMMState));
    uint64_t addr = addr_start;

    ds->nr_lmbs = nr_lmbs;
    for (i = 0; i < nr_lmbs; i++) {
        drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB,
                addr / SPAPR_MEMORY_BLOCK_SIZE);
        g_assert(drc);

        drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
        drck->detach(drc, dev, spapr_lmb_release, ds, errp);
        addr += SPAPR_MEMORY_BLOCK_SIZE;
    }

    drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB,
                                   addr_start / SPAPR_MEMORY_BLOCK_SIZE);
    drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
    spapr_hotplug_req_remove_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB,
                                              nr_lmbs,
                                              drck->get_index(drc));
}

static void spapr_memory_unplug(HotplugHandler *hotplug_dev, DeviceState *dev,
                                Error **errp)
{
    sPAPRMachineState *ms = SPAPR_MACHINE(hotplug_dev);
    PCDIMMDevice *dimm = PC_DIMM(dev);
    PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
    MemoryRegion *mr = ddc->get_memory_region(dimm);

    pc_dimm_memory_unplug(dev, &ms->hotplug_memory, mr);
    object_unparent(OBJECT(dev));
}

static void spapr_memory_unplug_request(HotplugHandler *hotplug_dev,
                                        DeviceState *dev, Error **errp)
{
    Error *local_err = NULL;
    PCDIMMDevice *dimm = PC_DIMM(dev);
    PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
    MemoryRegion *mr = ddc->get_memory_region(dimm);
    uint64_t size = memory_region_size(mr);
    uint64_t addr;

    addr = object_property_get_int(OBJECT(dimm), PC_DIMM_ADDR_PROP, &local_err);
    if (local_err) {
        goto out;
    }

    spapr_del_lmbs(dev, addr, size, &error_abort);
out:
    error_propagate(errp, local_err);
}

B
Bharata B Rao 已提交
2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653
void *spapr_populate_hotplug_cpu_dt(CPUState *cs, int *fdt_offset,
                                    sPAPRMachineState *spapr)
{
    PowerPCCPU *cpu = POWERPC_CPU(cs);
    DeviceClass *dc = DEVICE_GET_CLASS(cs);
    int id = ppc_get_vcpu_dt_id(cpu);
    void *fdt;
    int offset, fdt_size;
    char *nodename;

    fdt = create_device_tree(&fdt_size);
    nodename = g_strdup_printf("%s@%x", dc->fw_name, id);
    offset = fdt_add_subnode(fdt, 0, nodename);

    spapr_populate_cpu_dt(cs, fdt, offset, spapr);
    g_free(nodename);

    *fdt_offset = offset;
    return fdt;
}

2654 2655
static void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *dev,
                              Error **errp)
2656
{
2657
    MachineState *ms = MACHINE(qdev_get_machine());
2658
    CPUCore *cc = CPU_CORE(dev);
2659
    CPUArchId *core_slot = spapr_find_cpu_slot(ms, cc->core_id, NULL);
2660

2661
    core_slot->cpu = NULL;
2662 2663 2664
    object_unparent(OBJECT(dev));
}

2665 2666 2667 2668 2669 2670 2671 2672 2673 2674 2675
static void spapr_core_release(DeviceState *dev, void *opaque)
{
    HotplugHandler *hotplug_ctrl;

    hotplug_ctrl = qdev_get_hotplug_handler(dev);
    hotplug_handler_unplug(hotplug_ctrl, dev, &error_abort);
}

static
void spapr_core_unplug_request(HotplugHandler *hotplug_dev, DeviceState *dev,
                               Error **errp)
2676
{
2677 2678
    int index;
    sPAPRDRConnector *drc;
2679 2680
    sPAPRDRConnectorClass *drck;
    Error *local_err = NULL;
2681 2682
    CPUCore *cc = CPU_CORE(dev);
    int smt = kvmppc_smt_threads();
2683

2684 2685 2686 2687 2688
    if (!spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index)) {
        error_setg(errp, "Unable to find CPU core with core-id: %d",
                   cc->core_id);
        return;
    }
2689 2690 2691 2692 2693
    if (index == 0) {
        error_setg(errp, "Boot CPU core may not be unplugged");
        return;
    }

2694
    drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * smt);
2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707 2708 2709 2710 2711 2712 2713 2714 2715 2716 2717 2718 2719
    g_assert(drc);

    drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
    drck->detach(drc, dev, spapr_core_release, NULL, &local_err);
    if (local_err) {
        error_propagate(errp, local_err);
        return;
    }

    spapr_hotplug_req_remove_by_index(drc);
}

static void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
                            Error **errp)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
    MachineClass *mc = MACHINE_GET_CLASS(spapr);
    sPAPRCPUCore *core = SPAPR_CPU_CORE(OBJECT(dev));
    CPUCore *cc = CPU_CORE(dev);
    CPUState *cs = CPU(core->threads);
    sPAPRDRConnector *drc;
    Error *local_err = NULL;
    void *fdt = NULL;
    int fdt_offset = 0;
    int smt = kvmppc_smt_threads();
2720 2721
    CPUArchId *core_slot;
    int index;
2722

2723 2724 2725 2726 2727 2728
    core_slot = spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index);
    if (!core_slot) {
        error_setg(errp, "Unable to find CPU core with core-id: %d",
                   cc->core_id);
        return;
    }
2729 2730
    drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * smt);

2731
    g_assert(drc || !mc->has_hotpluggable_cpus);
2732 2733 2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746 2747 2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764 2765 2766

    /*
     * Setup CPU DT entries only for hotplugged CPUs. For boot time or
     * coldplugged CPUs DT entries are setup in spapr_build_fdt().
     */
    if (dev->hotplugged) {
        fdt = spapr_populate_hotplug_cpu_dt(cs, &fdt_offset, spapr);
    }

    if (drc) {
        sPAPRDRConnectorClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
        drck->attach(drc, dev, fdt, fdt_offset, !dev->hotplugged, &local_err);
        if (local_err) {
            g_free(fdt);
            error_propagate(errp, local_err);
            return;
        }
    }

    if (dev->hotplugged) {
        /*
         * Send hotplug notification interrupt to the guest only in case
         * of hotplugged CPUs.
         */
        spapr_hotplug_req_add_by_index(drc);
    } else {
        /*
         * Set the right DRC states for cold plugged CPU.
         */
        if (drc) {
            sPAPRDRConnectorClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
            drck->set_allocation_state(drc, SPAPR_DR_ALLOCATION_STATE_USABLE);
            drck->set_isolation_state(drc, SPAPR_DR_ISOLATION_STATE_UNISOLATED);
        }
    }
2767
    core_slot->cpu = OBJECT(dev);
2768 2769 2770 2771 2772 2773 2774 2775 2776 2777 2778
}

static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
                                Error **errp)
{
    MachineState *machine = MACHINE(OBJECT(hotplug_dev));
    MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev);
    Error *local_err = NULL;
    CPUCore *cc = CPU_CORE(dev);
    char *base_core_type = spapr_get_cpu_core_type(machine->cpu_model);
    const char *type = object_get_typename(OBJECT(dev));
2779 2780
    CPUArchId *core_slot;
    int index;
2781

2782
    if (dev->hotplugged && !mc->has_hotpluggable_cpus) {
2783 2784 2785 2786 2787 2788 2789 2790 2791 2792 2793 2794 2795 2796
        error_setg(&local_err, "CPU hotplug not supported for this machine");
        goto out;
    }

    if (strcmp(base_core_type, type)) {
        error_setg(&local_err, "CPU core type should be %s", base_core_type);
        goto out;
    }

    if (cc->core_id % smp_threads) {
        error_setg(&local_err, "invalid core id %d", cc->core_id);
        goto out;
    }

2797 2798
    core_slot = spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index);
    if (!core_slot) {
2799 2800 2801 2802
        error_setg(&local_err, "core id %d out of range", cc->core_id);
        goto out;
    }

2803
    if (core_slot->cpu) {
2804 2805 2806 2807 2808 2809 2810 2811 2812
        error_setg(&local_err, "core %d already populated", cc->core_id);
        goto out;
    }

out:
    g_free(base_core_type);
    error_propagate(errp, local_err);
}

B
Bharata B Rao 已提交
2813 2814 2815 2816 2817 2818
static void spapr_machine_device_plug(HotplugHandler *hotplug_dev,
                                      DeviceState *dev, Error **errp)
{
    sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(qdev_get_machine());

    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
2819
        int node;
B
Bharata B Rao 已提交
2820 2821 2822 2823 2824 2825 2826 2827 2828

        if (!smc->dr_lmb_enabled) {
            error_setg(errp, "Memory hotplug not supported for this machine");
            return;
        }
        node = object_property_get_int(OBJECT(dev), PC_DIMM_NODE_PROP, errp);
        if (*errp) {
            return;
        }
2829 2830 2831 2832
        if (node < 0 || node >= MAX_NODES) {
            error_setg(errp, "Invaild node %d", node);
            return;
        }
B
Bharata B Rao 已提交
2833

2834 2835 2836 2837 2838 2839 2840 2841 2842 2843 2844 2845 2846 2847 2848 2849 2850 2851 2852 2853 2854 2855
        /*
         * Currently PowerPC kernel doesn't allow hot-adding memory to
         * memory-less node, but instead will silently add the memory
         * to the first node that has some memory. This causes two
         * unexpected behaviours for the user.
         *
         * - Memory gets hotplugged to a different node than what the user
         *   specified.
         * - Since pc-dimm subsystem in QEMU still thinks that memory belongs
         *   to memory-less node, a reboot will set things accordingly
         *   and the previously hotplugged memory now ends in the right node.
         *   This appears as if some memory moved from one node to another.
         *
         * So until kernel starts supporting memory hotplug to memory-less
         * nodes, just prevent such attempts upfront in QEMU.
         */
        if (nb_numa_nodes && !numa_info[node].node_mem) {
            error_setg(errp, "Can't hotplug memory to memory-less node %d",
                       node);
            return;
        }

B
Bharata B Rao 已提交
2856
        spapr_memory_plug(hotplug_dev, dev, node, errp);
B
Bharata B Rao 已提交
2857 2858
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
        spapr_core_plug(hotplug_dev, dev, errp);
B
Bharata B Rao 已提交
2859 2860 2861 2862 2863 2864
    }
}

static void spapr_machine_device_unplug(HotplugHandler *hotplug_dev,
                                      DeviceState *dev, Error **errp)
{
B
Bharata B Rao 已提交
2865
    sPAPRMachineState *sms = SPAPR_MACHINE(qdev_get_machine());
2866
    MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
B
Bharata B Rao 已提交
2867

B
Bharata B Rao 已提交
2868
    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
B
Bharata B Rao 已提交
2869 2870 2871 2872 2873 2874
        if (spapr_ovec_test(sms->ov5_cas, OV5_HP_EVT)) {
            spapr_memory_unplug(hotplug_dev, dev, errp);
        } else {
            error_setg(errp, "Memory hot unplug not supported for this guest");
        }
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
2875
        if (!mc->has_hotpluggable_cpus) {
B
Bharata B Rao 已提交
2876 2877 2878 2879 2880 2881 2882 2883 2884 2885 2886 2887 2888 2889 2890 2891 2892 2893 2894 2895 2896 2897 2898 2899 2900
            error_setg(errp, "CPU hot unplug not supported on this machine");
            return;
        }
        spapr_core_unplug(hotplug_dev, dev, errp);
    }
}

static void spapr_machine_device_unplug_request(HotplugHandler *hotplug_dev,
                                                DeviceState *dev, Error **errp)
{
    sPAPRMachineState *sms = SPAPR_MACHINE(qdev_get_machine());
    MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());

    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
        if (spapr_ovec_test(sms->ov5_cas, OV5_HP_EVT)) {
            spapr_memory_unplug_request(hotplug_dev, dev, errp);
        } else {
            /* NOTE: this means there is a window after guest reset, prior to
             * CAS negotiation, where unplug requests will fail due to the
             * capability not being detected yet. This is a bit different than
             * the case with PCI unplug, where the events will be queued and
             * eventually handled by the guest after boot
             */
            error_setg(errp, "Memory hot unplug not supported for this guest");
        }
B
Bharata B Rao 已提交
2901
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
2902
        if (!mc->has_hotpluggable_cpus) {
B
Bharata B Rao 已提交
2903 2904 2905
            error_setg(errp, "CPU hot unplug not supported on this machine");
            return;
        }
2906
        spapr_core_unplug_request(hotplug_dev, dev, errp);
B
Bharata B Rao 已提交
2907 2908 2909
    }
}

2910 2911 2912 2913 2914 2915 2916 2917
static void spapr_machine_device_pre_plug(HotplugHandler *hotplug_dev,
                                          DeviceState *dev, Error **errp)
{
    if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
        spapr_core_pre_plug(hotplug_dev, dev, errp);
    }
}

2918 2919
static HotplugHandler *spapr_get_hotplug_handler(MachineState *machine,
                                                 DeviceState *dev)
B
Bharata B Rao 已提交
2920
{
2921 2922
    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) ||
        object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
B
Bharata B Rao 已提交
2923 2924 2925 2926 2927
        return HOTPLUG_HANDLER(machine);
    }
    return NULL;
}

2928 2929 2930 2931 2932 2933 2934
static unsigned spapr_cpu_index_to_socket_id(unsigned cpu_index)
{
    /* Allocate to NUMA nodes on a "socket" basis (not that concept of
     * socket means much for the paravirtualized PAPR platform) */
    return cpu_index / smp_threads / smp_cores;
}

2935 2936 2937 2938 2939 2940
static const CPUArchIdList *spapr_possible_cpu_arch_ids(MachineState *machine)
{
    int i;
    int spapr_max_cores = max_cpus / smp_threads;
    MachineClass *mc = MACHINE_GET_CLASS(machine);

2941
    if (!mc->has_hotpluggable_cpus) {
2942 2943 2944 2945 2946 2947 2948 2949 2950 2951 2952 2953 2954
        spapr_max_cores = QEMU_ALIGN_UP(smp_cpus, smp_threads) / smp_threads;
    }
    if (machine->possible_cpus) {
        assert(machine->possible_cpus->len == spapr_max_cores);
        return machine->possible_cpus;
    }

    machine->possible_cpus = g_malloc0(sizeof(CPUArchIdList) +
                             sizeof(CPUArchId) * spapr_max_cores);
    machine->possible_cpus->len = spapr_max_cores;
    for (i = 0; i < machine->possible_cpus->len; i++) {
        int core_id = i * smp_threads;

2955
        machine->possible_cpus->cpus[i].vcpus_count = smp_threads;
2956 2957 2958 2959 2960 2961 2962 2963 2964
        machine->possible_cpus->cpus[i].arch_id = core_id;
        machine->possible_cpus->cpus[i].props.has_core_id = true;
        machine->possible_cpus->cpus[i].props.core_id = core_id;
        /* TODO: add 'has_node/node' here to describe
           to which node core belongs */
    }
    return machine->possible_cpus;
}

2965
static void spapr_phb_placement(sPAPRMachineState *spapr, uint32_t index,
D
David Gibson 已提交
2966 2967
                                uint64_t *buid, hwaddr *pio,
                                hwaddr *mmio32, hwaddr *mmio64,
2968 2969
                                unsigned n_dma, uint32_t *liobns, Error **errp)
{
2970 2971 2972 2973 2974 2975 2976 2977 2978 2979 2980 2981 2982 2983 2984
    /*
     * New-style PHB window placement.
     *
     * Goals: Gives large (1TiB), naturally aligned 64-bit MMIO window
     * for each PHB, in addition to 2GiB 32-bit MMIO and 64kiB PIO
     * windows.
     *
     * Some guest kernels can't work with MMIO windows above 1<<46
     * (64TiB), so we place up to 31 PHBs in the area 32TiB..64TiB
     *
     * 32TiB..(33TiB+1984kiB) contains the 64kiB PIO windows for each
     * PHB stacked together.  (32TiB+2GiB)..(32TiB+64GiB) contains the
     * 2GiB 32-bit MMIO windows for each PHB.  Then 33..64TiB has the
     * 1TiB 64-bit MMIO windows for each PHB.
     */
2985
    const uint64_t base_buid = 0x800000020000000ULL;
2986 2987
#define SPAPR_MAX_PHBS ((SPAPR_PCI_LIMIT - SPAPR_PCI_BASE) / \
                        SPAPR_PCI_MEM64_WIN_SIZE - 1)
2988 2989
    int i;

2990 2991 2992 2993 2994 2995
    /* Sanity check natural alignments */
    QEMU_BUILD_BUG_ON((SPAPR_PCI_BASE % SPAPR_PCI_MEM64_WIN_SIZE) != 0);
    QEMU_BUILD_BUG_ON((SPAPR_PCI_LIMIT % SPAPR_PCI_MEM64_WIN_SIZE) != 0);
    QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM64_WIN_SIZE % SPAPR_PCI_MEM32_WIN_SIZE) != 0);
    QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM32_WIN_SIZE % SPAPR_PCI_IO_WIN_SIZE) != 0);
    /* Sanity check bounds */
2996 2997 2998 2999 3000 3001 3002 3003
    QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS * SPAPR_PCI_IO_WIN_SIZE) >
                      SPAPR_PCI_MEM32_WIN_SIZE);
    QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS * SPAPR_PCI_MEM32_WIN_SIZE) >
                      SPAPR_PCI_MEM64_WIN_SIZE);

    if (index >= SPAPR_MAX_PHBS) {
        error_setg(errp, "\"index\" for PAPR PHB is too large (max %llu)",
                   SPAPR_MAX_PHBS - 1);
3004 3005 3006 3007 3008 3009 3010 3011
        return;
    }

    *buid = base_buid + index;
    for (i = 0; i < n_dma; ++i) {
        liobns[i] = SPAPR_PCI_LIOBN(index, i);
    }

3012 3013 3014
    *pio = SPAPR_PCI_BASE + index * SPAPR_PCI_IO_WIN_SIZE;
    *mmio32 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM32_WIN_SIZE;
    *mmio64 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM64_WIN_SIZE;
3015 3016
}

3017 3018 3019 3020 3021 3022 3023 3024 3025 3026 3027 3028 3029 3030
static ICSState *spapr_ics_get(XICSFabric *dev, int irq)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(dev);

    return ics_valid_irq(spapr->ics, irq) ? spapr->ics : NULL;
}

static void spapr_ics_resend(XICSFabric *dev)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(dev);

    ics_resend(spapr->ics);
}

3031 3032 3033 3034
static ICPState *spapr_icp_get(XICSFabric *xi, int server)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(xi);

3035
    return (server < spapr->nr_servers) ? &spapr->icps[server] : NULL;
3036 3037
}

3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050
static void spapr_pic_print_info(InterruptStatsProvider *obj,
                                 Monitor *mon)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
    int i;

    for (i = 0; i < spapr->nr_servers; i++) {
        icp_pic_print_info(&spapr->icps[i], mon);
    }

    ics_pic_print_info(spapr->ics, mon);
}

3051 3052 3053
static void spapr_machine_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);
D
David Gibson 已提交
3054
    sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(oc);
3055
    FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
3056
    NMIClass *nc = NMI_CLASS(oc);
B
Bharata B Rao 已提交
3057
    HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
3058
    PPCVirtualHypervisorClass *vhc = PPC_VIRTUAL_HYPERVISOR_CLASS(oc);
3059
    XICSFabricClass *xic = XICS_FABRIC_CLASS(oc);
3060
    InterruptStatsProviderClass *ispc = INTERRUPT_STATS_PROVIDER_CLASS(oc);
3061

3062
    mc->desc = "pSeries Logical Partition (PAPR compliant)";
3063 3064 3065 3066 3067 3068

    /*
     * We set up the default / latest behaviour here.  The class_init
     * functions for the specific versioned machine types can override
     * these details for backwards compatibility
     */
3069 3070 3071
    mc->init = ppc_spapr_init;
    mc->reset = ppc_spapr_reset;
    mc->block_default_type = IF_SCSI;
G
Greg Kurz 已提交
3072
    mc->max_cpus = 1024;
3073
    mc->no_parallel = 1;
3074
    mc->default_boot_order = "";
3075
    mc->default_ram_size = 512 * M_BYTE;
3076
    mc->kvm_type = spapr_kvm_type;
3077
    mc->has_dynamic_sysbus = true;
3078
    mc->pci_allow_0_address = true;
3079
    mc->get_hotplug_handler = spapr_get_hotplug_handler;
3080
    hc->pre_plug = spapr_machine_device_pre_plug;
B
Bharata B Rao 已提交
3081 3082
    hc->plug = spapr_machine_device_plug;
    hc->unplug = spapr_machine_device_unplug;
3083
    mc->cpu_index_to_socket_id = spapr_cpu_index_to_socket_id;
3084
    mc->possible_cpu_arch_ids = spapr_possible_cpu_arch_ids;
B
Bharata B Rao 已提交
3085
    hc->unplug_request = spapr_machine_device_unplug_request;
3086

3087
    smc->dr_lmb_enabled = true;
3088
    smc->tcg_default_cpu = "POWER8";
3089
    mc->has_hotpluggable_cpus = true;
3090
    fwc->get_dev_path = spapr_get_fw_dev_path;
3091
    nc->nmi_monitor_handler = spapr_nmi;
3092
    smc->phb_placement = spapr_phb_placement;
3093
    vhc->hypercall = emulate_spapr_hypercall;
3094 3095 3096 3097
    vhc->hpt_mask = spapr_hpt_mask;
    vhc->map_hptes = spapr_map_hptes;
    vhc->unmap_hptes = spapr_unmap_hptes;
    vhc->store_hpte = spapr_store_hpte;
3098
    vhc->get_patbe = spapr_get_patbe;
3099 3100
    xic->ics_get = spapr_ics_get;
    xic->ics_resend = spapr_ics_resend;
3101
    xic->icp_get = spapr_icp_get;
3102
    ispc->print_info = spapr_pic_print_info;
3103 3104 3105 3106 3107
}

static const TypeInfo spapr_machine_info = {
    .name          = TYPE_SPAPR_MACHINE,
    .parent        = TYPE_MACHINE,
3108
    .abstract      = true,
3109
    .instance_size = sizeof(sPAPRMachineState),
E
Eduardo Habkost 已提交
3110
    .instance_init = spapr_machine_initfn,
3111
    .instance_finalize = spapr_machine_finalizefn,
D
David Gibson 已提交
3112
    .class_size    = sizeof(sPAPRMachineClass),
3113
    .class_init    = spapr_machine_class_init,
3114 3115
    .interfaces = (InterfaceInfo[]) {
        { TYPE_FW_PATH_PROVIDER },
3116
        { TYPE_NMI },
B
Bharata B Rao 已提交
3117
        { TYPE_HOTPLUG_HANDLER },
3118
        { TYPE_PPC_VIRTUAL_HYPERVISOR },
3119
        { TYPE_XICS_FABRIC },
3120
        { TYPE_INTERRUPT_STATS_PROVIDER },
3121 3122
        { }
    },
3123 3124
};

3125
#define DEFINE_SPAPR_MACHINE(suffix, verstr, latest)                 \
D
David Gibson 已提交
3126 3127 3128 3129 3130
    static void spapr_machine_##suffix##_class_init(ObjectClass *oc, \
                                                    void *data)      \
    {                                                                \
        MachineClass *mc = MACHINE_CLASS(oc);                        \
        spapr_machine_##suffix##_class_options(mc);                  \
3131 3132 3133 3134
        if (latest) {                                                \
            mc->alias = "pseries";                                   \
            mc->is_default = 1;                                      \
        }                                                            \
D
David Gibson 已提交
3135 3136 3137 3138 3139 3140 3141 3142 3143 3144 3145 3146 3147 3148 3149 3150
    }                                                                \
    static void spapr_machine_##suffix##_instance_init(Object *obj)  \
    {                                                                \
        MachineState *machine = MACHINE(obj);                        \
        spapr_machine_##suffix##_instance_options(machine);          \
    }                                                                \
    static const TypeInfo spapr_machine_##suffix##_info = {          \
        .name = MACHINE_TYPE_NAME("pseries-" verstr),                \
        .parent = TYPE_SPAPR_MACHINE,                                \
        .class_init = spapr_machine_##suffix##_class_init,           \
        .instance_init = spapr_machine_##suffix##_instance_init,     \
    };                                                               \
    static void spapr_machine_register_##suffix(void)                \
    {                                                                \
        type_register(&spapr_machine_##suffix##_info);               \
    }                                                                \
3151
    type_init(spapr_machine_register_##suffix)
D
David Gibson 已提交
3152

3153 3154 3155 3156 3157 3158 3159 3160 3161 3162 3163 3164 3165 3166
/*
 * pseries-2.9
 */
static void spapr_machine_2_9_instance_options(MachineState *machine)
{
}

static void spapr_machine_2_9_class_options(MachineClass *mc)
{
    /* Defaults for the latest behaviour inherited from the base class */
}

DEFINE_SPAPR_MACHINE(2_9, "2.9", true);

3167 3168 3169
/*
 * pseries-2.8
 */
3170 3171 3172
#define SPAPR_COMPAT_2_8                            \
    HW_COMPAT_2_8

3173 3174
static void spapr_machine_2_8_instance_options(MachineState *machine)
{
3175
    spapr_machine_2_9_instance_options(machine);
3176 3177 3178 3179
}

static void spapr_machine_2_8_class_options(MachineClass *mc)
{
3180 3181
    spapr_machine_2_9_class_options(mc);
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_8);
3182 3183
}

3184
DEFINE_SPAPR_MACHINE(2_8, "2.8", false);
3185

3186 3187 3188
/*
 * pseries-2.7
 */
3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199
#define SPAPR_COMPAT_2_7                            \
    HW_COMPAT_2_7                                   \
    {                                               \
        .driver   = TYPE_SPAPR_PCI_HOST_BRIDGE,     \
        .property = "mem_win_size",                 \
        .value    = stringify(SPAPR_PCI_2_7_MMIO_WIN_SIZE),\
    },                                              \
    {                                               \
        .driver   = TYPE_SPAPR_PCI_HOST_BRIDGE,     \
        .property = "mem64_win_size",               \
        .value    = "0",                            \
3200 3201 3202 3203 3204
    },                                              \
    {                                               \
        .driver = TYPE_POWERPC_CPU,                 \
        .property = "pre-2.8-migration",            \
        .value    = "on",                           \
3205 3206 3207 3208 3209
    },                                              \
    {                                               \
        .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,       \
        .property = "pre-2.8-migration",            \
        .value    = "on",                           \
3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250 3251 3252 3253 3254 3255 3256 3257 3258 3259
    },

static void phb_placement_2_7(sPAPRMachineState *spapr, uint32_t index,
                              uint64_t *buid, hwaddr *pio,
                              hwaddr *mmio32, hwaddr *mmio64,
                              unsigned n_dma, uint32_t *liobns, Error **errp)
{
    /* Legacy PHB placement for pseries-2.7 and earlier machine types */
    const uint64_t base_buid = 0x800000020000000ULL;
    const hwaddr phb_spacing = 0x1000000000ULL; /* 64 GiB */
    const hwaddr mmio_offset = 0xa0000000; /* 2 GiB + 512 MiB */
    const hwaddr pio_offset = 0x80000000; /* 2 GiB */
    const uint32_t max_index = 255;
    const hwaddr phb0_alignment = 0x10000000000ULL; /* 1 TiB */

    uint64_t ram_top = MACHINE(spapr)->ram_size;
    hwaddr phb0_base, phb_base;
    int i;

    /* Do we have hotpluggable memory? */
    if (MACHINE(spapr)->maxram_size > ram_top) {
        /* Can't just use maxram_size, because there may be an
         * alignment gap between normal and hotpluggable memory
         * regions */
        ram_top = spapr->hotplug_memory.base +
            memory_region_size(&spapr->hotplug_memory.mr);
    }

    phb0_base = QEMU_ALIGN_UP(ram_top, phb0_alignment);

    if (index > max_index) {
        error_setg(errp, "\"index\" for PAPR PHB is too large (max %u)",
                   max_index);
        return;
    }

    *buid = base_buid + index;
    for (i = 0; i < n_dma; ++i) {
        liobns[i] = SPAPR_PCI_LIOBN(index, i);
    }

    phb_base = phb0_base + index * phb_spacing;
    *pio = phb_base + pio_offset;
    *mmio32 = phb_base + mmio_offset;
    /*
     * We don't set the 64-bit MMIO window, relying on the PHB's
     * fallback behaviour of automatically splitting a large "32-bit"
     * window into contiguous 32-bit and 64-bit windows
     */
}
3260

3261 3262
static void spapr_machine_2_7_instance_options(MachineState *machine)
{
3263 3264
    sPAPRMachineState *spapr = SPAPR_MACHINE(machine);

3265
    spapr_machine_2_8_instance_options(machine);
3266
    spapr->use_hotplug_event_source = false;
3267 3268 3269 3270
}

static void spapr_machine_2_7_class_options(MachineClass *mc)
{
3271 3272
    sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);

3273
    spapr_machine_2_8_class_options(mc);
3274
    smc->tcg_default_cpu = "POWER7";
3275
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_7);
3276
    smc->phb_placement = phb_placement_2_7;
3277 3278
}

3279
DEFINE_SPAPR_MACHINE(2_7, "2.7", false);
3280

3281 3282 3283
/*
 * pseries-2.6
 */
3284
#define SPAPR_COMPAT_2_6 \
3285 3286 3287 3288 3289 3290
    HW_COMPAT_2_6 \
    { \
        .driver   = TYPE_SPAPR_PCI_HOST_BRIDGE,\
        .property = "ddw",\
        .value    = stringify(off),\
    },
3291

3292 3293
static void spapr_machine_2_6_instance_options(MachineState *machine)
{
3294
    spapr_machine_2_7_instance_options(machine);
3295 3296 3297 3298
}

static void spapr_machine_2_6_class_options(MachineClass *mc)
{
3299
    spapr_machine_2_7_class_options(mc);
3300
    mc->has_hotpluggable_cpus = false;
3301
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_6);
3302 3303
}

3304
DEFINE_SPAPR_MACHINE(2_6, "2.6", false);
3305

3306 3307 3308
/*
 * pseries-2.5
 */
3309
#define SPAPR_COMPAT_2_5 \
3310 3311 3312 3313 3314 3315
    HW_COMPAT_2_5 \
    { \
        .driver   = "spapr-vlan", \
        .property = "use-rx-buffer-pools", \
        .value    = "off", \
    },
3316

D
David Gibson 已提交
3317
static void spapr_machine_2_5_instance_options(MachineState *machine)
3318
{
3319
    spapr_machine_2_6_instance_options(machine);
D
David Gibson 已提交
3320 3321 3322 3323
}

static void spapr_machine_2_5_class_options(MachineClass *mc)
{
3324 3325
    sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);

3326
    spapr_machine_2_6_class_options(mc);
3327
    smc->use_ohci_by_default = true;
3328
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_5);
3329 3330
}

3331
DEFINE_SPAPR_MACHINE(2_5, "2.5", false);
3332 3333 3334 3335

/*
 * pseries-2.4
 */
C
Cornelia Huck 已提交
3336 3337 3338
#define SPAPR_COMPAT_2_4 \
        HW_COMPAT_2_4

D
David Gibson 已提交
3339
static void spapr_machine_2_4_instance_options(MachineState *machine)
3340
{
D
David Gibson 已提交
3341 3342
    spapr_machine_2_5_instance_options(machine);
}
3343

D
David Gibson 已提交
3344 3345
static void spapr_machine_2_4_class_options(MachineClass *mc)
{
3346 3347 3348 3349
    sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);

    spapr_machine_2_5_class_options(mc);
    smc->dr_lmb_enabled = false;
D
David Gibson 已提交
3350
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_4);
3351 3352
}

3353
DEFINE_SPAPR_MACHINE(2_4, "2.4", false);
3354 3355 3356 3357

/*
 * pseries-2.3
 */
E
Eduardo Habkost 已提交
3358
#define SPAPR_COMPAT_2_3 \
3359 3360 3361 3362 3363 3364
        HW_COMPAT_2_3 \
        {\
            .driver   = "spapr-pci-host-bridge",\
            .property = "dynamic-reconfiguration",\
            .value    = "off",\
        },
E
Eduardo Habkost 已提交
3365

D
David Gibson 已提交
3366
static void spapr_machine_2_3_instance_options(MachineState *machine)
J
Jason Wang 已提交
3367
{
D
David Gibson 已提交
3368
    spapr_machine_2_4_instance_options(machine);
3369
    savevm_skip_section_footers();
3370
    global_state_set_optional();
3371
    savevm_skip_configuration();
J
Jason Wang 已提交
3372 3373
}

D
David Gibson 已提交
3374
static void spapr_machine_2_3_class_options(MachineClass *mc)
3375
{
3376
    spapr_machine_2_4_class_options(mc);
D
David Gibson 已提交
3377
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_3);
3378
}
3379
DEFINE_SPAPR_MACHINE(2_3, "2.3", false);
3380

3381 3382 3383 3384 3385 3386 3387 3388 3389 3390 3391 3392
/*
 * pseries-2.2
 */

#define SPAPR_COMPAT_2_2 \
        HW_COMPAT_2_2 \
        {\
            .driver   = TYPE_SPAPR_PCI_HOST_BRIDGE,\
            .property = "mem_win_size",\
            .value    = "0x20000000",\
        },

D
David Gibson 已提交
3393
static void spapr_machine_2_2_instance_options(MachineState *machine)
3394
{
D
David Gibson 已提交
3395
    spapr_machine_2_3_instance_options(machine);
3396
    machine->suppress_vmdesc = true;
3397 3398
}

D
David Gibson 已提交
3399
static void spapr_machine_2_2_class_options(MachineClass *mc)
3400
{
3401
    spapr_machine_2_3_class_options(mc);
D
David Gibson 已提交
3402
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_2);
3403
}
3404
DEFINE_SPAPR_MACHINE(2_2, "2.2", false);
3405

3406 3407 3408 3409 3410
/*
 * pseries-2.1
 */
#define SPAPR_COMPAT_2_1 \
        HW_COMPAT_2_1
3411

D
David Gibson 已提交
3412
static void spapr_machine_2_1_instance_options(MachineState *machine)
3413
{
D
David Gibson 已提交
3414
    spapr_machine_2_2_instance_options(machine);
3415
}
J
Jason Wang 已提交
3416

D
David Gibson 已提交
3417
static void spapr_machine_2_1_class_options(MachineClass *mc)
J
Jason Wang 已提交
3418
{
3419
    spapr_machine_2_2_class_options(mc);
D
David Gibson 已提交
3420
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_1);
J
Jason Wang 已提交
3421
}
3422
DEFINE_SPAPR_MACHINE(2_1, "2.1", false);
D
David Gibson 已提交
3423

3424
static void spapr_machine_register_types(void)
3425
{
3426
    type_register_static(&spapr_machine_info);
3427 3428
}

3429
type_init(spapr_machine_register_types)