spapr.c 116.6 KB
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/*
 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
 *
 * Copyright (c) 2004-2007 Fabrice Bellard
 * Copyright (c) 2007 Jocelyn Mayer
 * Copyright (c) 2010 David Gibson, IBM Corporation.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 *
 */
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Peter Maydell 已提交
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/numa.h"
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#include "hw/hw.h"
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#include "qemu/log.h"
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#include "hw/fw-path-provider.h"
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#include "elf.h"
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#include "net/net.h"
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#include "sysemu/device_tree.h"
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#include "sysemu/block-backend.h"
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#include "sysemu/cpus.h"
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#include "sysemu/hw_accel.h"
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#include "kvm_ppc.h"
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#include "migration/misc.h"
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#include "migration/global_state.h"
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#include "migration/register.h"
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#include "mmu-hash64.h"
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#include "mmu-book3s-v3.h"
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#include "qom/cpu.h"
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#include "hw/boards.h"
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#include "hw/ppc/ppc.h"
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#include "hw/loader.h"

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#include "hw/ppc/fdt.h"
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#include "hw/ppc/spapr.h"
#include "hw/ppc/spapr_vio.h"
#include "hw/pci-host/spapr.h"
#include "hw/ppc/xics.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/pci.h"
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#include "hw/scsi/scsi.h"
#include "hw/virtio/virtio-scsi.h"
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#include "hw/virtio/vhost-scsi-common.h"
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#include "exec/address-spaces.h"
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#include "hw/usb.h"
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#include "qemu/config-file.h"
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#include "qemu/error-report.h"
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#include "trace.h"
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#include "hw/nmi.h"
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#include "hw/intc/intc.h"
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#include "hw/compat.h"
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#include "qemu/cutils.h"
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#include "hw/ppc/spapr_cpu_core.h"
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#include "qmp-commands.h"
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#include <libfdt.h>

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/* SLOF memory layout:
 *
 * SLOF raw image loaded at 0, copies its romfs right below the flat
 * device-tree, then position SLOF itself 31M below that
 *
 * So we set FW_OVERHEAD to 40MB which should account for all of that
 * and more
 *
 * We load our kernel at 4M, leaving space for SLOF initial image
 */
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#define FDT_MAX_SIZE            0x100000
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#define RTAS_MAX_SIZE           0x10000
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#define RTAS_MAX_ADDR           0x80000000 /* RTAS must stay below that */
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#define FW_MAX_SIZE             0x400000
#define FW_FILE_NAME            "slof.bin"
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#define FW_OVERHEAD             0x2800000
#define KERNEL_LOAD_ADDR        FW_MAX_SIZE
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#define MIN_RMA_SLOF            128UL
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#define PHANDLE_XICP            0x00001111

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#define HTAB_SIZE(spapr)        (1ULL << ((spapr)->htab_shift))

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static ICSState *spapr_ics_create(sPAPRMachineState *spapr,
                                  const char *type_ics,
                                  int nr_irqs, Error **errp)
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{
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    Error *local_err = NULL;
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    Object *obj;
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    obj = object_new(type_ics);
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    object_property_add_child(OBJECT(spapr), "ics", obj, &error_abort);
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    object_property_add_const_link(obj, ICS_PROP_XICS, OBJECT(spapr),
                                   &error_abort);
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    object_property_set_int(obj, nr_irqs, "nr-irqs", &local_err);
    if (local_err) {
        goto error;
    }
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    object_property_set_bool(obj, true, "realized", &local_err);
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    if (local_err) {
        goto error;
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    }

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    return ICS_SIMPLE(obj);
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error:
    error_propagate(errp, local_err);
    return NULL;
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}

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static void xics_system_init(MachineState *machine, int nr_irqs, Error **errp)
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{
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    sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
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    if (kvm_enabled()) {
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        if (machine_kernel_irqchip_allowed(machine) &&
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            !xics_kvm_init(spapr, errp)) {
            spapr->icp_type = TYPE_KVM_ICP;
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            spapr->ics = spapr_ics_create(spapr, TYPE_ICS_KVM, nr_irqs, errp);
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        }
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        if (machine_kernel_irqchip_required(machine) && !spapr->ics) {
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            error_prepend(errp, "kernel_irqchip requested but unavailable: ");
            return;
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        }
    }

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    if (!spapr->ics) {
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        xics_spapr_init(spapr);
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        spapr->icp_type = TYPE_ICP;
        spapr->ics = spapr_ics_create(spapr, TYPE_ICS_SIMPLE, nr_irqs, errp);
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        if (!spapr->ics) {
            return;
        }
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    }
}

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static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu,
                                  int smt_threads)
{
    int i, ret = 0;
    uint32_t servers_prop[smt_threads];
    uint32_t gservers_prop[smt_threads * 2];
    int index = ppc_get_vcpu_dt_id(cpu);

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    if (cpu->compat_pvr) {
        ret = fdt_setprop_cell(fdt, offset, "cpu-version", cpu->compat_pvr);
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        if (ret < 0) {
            return ret;
        }
    }

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    /* Build interrupt servers and gservers properties */
    for (i = 0; i < smt_threads; i++) {
        servers_prop[i] = cpu_to_be32(index + i);
        /* Hack, direct the group queues back to cpu 0 */
        gservers_prop[i*2] = cpu_to_be32(index + i);
        gservers_prop[i*2 + 1] = 0;
    }
    ret = fdt_setprop(fdt, offset, "ibm,ppc-interrupt-server#s",
                      servers_prop, sizeof(servers_prop));
    if (ret < 0) {
        return ret;
    }
    ret = fdt_setprop(fdt, offset, "ibm,ppc-interrupt-gserver#s",
                      gservers_prop, sizeof(gservers_prop));

    return ret;
}

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static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, PowerPCCPU *cpu)
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{
    int index = ppc_get_vcpu_dt_id(cpu);
    uint32_t associativity[] = {cpu_to_be32(0x5),
                                cpu_to_be32(0x0),
                                cpu_to_be32(0x0),
                                cpu_to_be32(0x0),
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                                cpu_to_be32(cpu->node_id),
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                                cpu_to_be32(index)};

    /* Advertise NUMA via ibm,associativity */
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    return fdt_setprop(fdt, offset, "ibm,associativity", associativity,
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                          sizeof(associativity));
}

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/* Populate the "ibm,pa-features" property */
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static void spapr_populate_pa_features(CPUPPCState *env, void *fdt, int offset,
                                      bool legacy_guest)
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{
    uint8_t pa_features_206[] = { 6, 0,
        0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
    uint8_t pa_features_207[] = { 24, 0,
        0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
        0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
        0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
        0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
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    uint8_t pa_features_300[] = { 66, 0,
        /* 0: MMU|FPU|SLB|RUN|DABR|NX, 1: fri[nzpm]|DABRX|SPRG3|SLB0|PP110 */
        /* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, SSO, 5: LE|CFAR|EB|LSQ */
        0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */
        /* 6: DS207 */
        0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */
        /* 16: Vector */
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        0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */
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        /* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */
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        0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */
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        /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */
        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */
        /* 30: MMR, 32: LE atomic, 34: EBB + ext EBB */
        0x80, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */
        /* 36: SPR SO, 38: Copy/Paste, 40: Radix MMU */
        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 36 - 41 */
        /* 42: PM, 44: PC RA, 46: SC vec'd */
        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */
        /* 48: SIMD, 50: QP BFP, 52: String */
        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 48 - 53 */
        /* 54: DecFP, 56: DecI, 58: SHA */
        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 54 - 59 */
        /* 60: NM atomic, 62: RNG */
        0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */
    };
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    uint8_t *pa_features;
    size_t pa_size;

    switch (POWERPC_MMU_VER(env->mmu_model)) {
    case POWERPC_MMU_VER_2_06:
        pa_features = pa_features_206;
        pa_size = sizeof(pa_features_206);
        break;
    case POWERPC_MMU_VER_2_07:
        pa_features = pa_features_207;
        pa_size = sizeof(pa_features_207);
        break;
    case POWERPC_MMU_VER_3_00:
        pa_features = pa_features_300;
        pa_size = sizeof(pa_features_300);
        break;
    default:
        return;
    }

    if (env->ci_large_pages) {
        /*
         * Note: we keep CI large pages off by default because a 64K capable
         * guest provisioned with large pages might otherwise try to map a qemu
         * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
         * even if that qemu runs on a 4k host.
         * We dd this bit back here if we are confident this is not an issue
         */
        pa_features[3] |= 0x20;
    }
    if (kvmppc_has_cap_htm() && pa_size > 24) {
        pa_features[24] |= 0x80;    /* Transactional memory support */
    }
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    if (legacy_guest && pa_size > 40) {
        /* Workaround for broken kernels that attempt (guest) radix
         * mode when they can't handle it, if they see the radix bit set
         * in pa-features. So hide it from them. */
        pa_features[40 + 2] &= ~0x80; /* Radix MMU */
    }
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    _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", pa_features, pa_size)));
}

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static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineState *spapr)
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{
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    int ret = 0, offset, cpus_offset;
    CPUState *cs;
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    char cpu_model[32];
    int smt = kvmppc_smt_threads();
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    uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
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    CPU_FOREACH(cs) {
        PowerPCCPU *cpu = POWERPC_CPU(cs);
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        CPUPPCState *env = &cpu->env;
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        DeviceClass *dc = DEVICE_GET_CLASS(cs);
        int index = ppc_get_vcpu_dt_id(cpu);
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        int compat_smt = MIN(smp_threads, ppc_compat_max_threads(cpu));
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        if ((index % smt) != 0) {
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            continue;
        }

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        snprintf(cpu_model, 32, "%s@%x", dc->fw_name, index);
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        cpus_offset = fdt_path_offset(fdt, "/cpus");
        if (cpus_offset < 0) {
            cpus_offset = fdt_add_subnode(fdt, fdt_path_offset(fdt, "/"),
                                          "cpus");
            if (cpus_offset < 0) {
                return cpus_offset;
            }
        }
        offset = fdt_subnode_offset(fdt, cpus_offset, cpu_model);
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        if (offset < 0) {
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            offset = fdt_add_subnode(fdt, cpus_offset, cpu_model);
            if (offset < 0) {
                return offset;
            }
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        }

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        ret = fdt_setprop(fdt, offset, "ibm,pft-size",
                          pft_size_prop, sizeof(pft_size_prop));
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        if (ret < 0) {
            return ret;
        }
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        if (nb_numa_nodes > 1) {
            ret = spapr_fixup_cpu_numa_dt(fdt, offset, cpu);
            if (ret < 0) {
                return ret;
            }
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        }

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        ret = spapr_fixup_cpu_smt_dt(fdt, offset, cpu, compat_smt);
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        if (ret < 0) {
            return ret;
        }
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        spapr_populate_pa_features(env, fdt, offset,
                                         spapr->cas_legacy_guest_workaround);
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    }
    return ret;
}

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static hwaddr spapr_node0_size(void)
{
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    MachineState *machine = MACHINE(qdev_get_machine());

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    if (nb_numa_nodes) {
        int i;
        for (i = 0; i < nb_numa_nodes; ++i) {
            if (numa_info[i].node_mem) {
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                return MIN(pow2floor(numa_info[i].node_mem),
                           machine->ram_size);
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            }
        }
    }
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    return machine->ram_size;
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}

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static void add_str(GString *s, const gchar *s1)
{
    g_string_append_len(s, s1, strlen(s1) + 1);
}
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static int spapr_populate_memory_node(void *fdt, int nodeid, hwaddr start,
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                                       hwaddr size)
{
    uint32_t associativity[] = {
        cpu_to_be32(0x4), /* length */
        cpu_to_be32(0x0), cpu_to_be32(0x0),
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        cpu_to_be32(0x0), cpu_to_be32(nodeid)
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    };
    char mem_name[32];
    uint64_t mem_reg_property[2];
    int off;

    mem_reg_property[0] = cpu_to_be64(start);
    mem_reg_property[1] = cpu_to_be64(size);

    sprintf(mem_name, "memory@" TARGET_FMT_lx, start);
    off = fdt_add_subnode(fdt, 0, mem_name);
    _FDT(off);
    _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
    _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
                      sizeof(mem_reg_property))));
    _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
                      sizeof(associativity))));
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    return off;
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}

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static int spapr_populate_memory(sPAPRMachineState *spapr, void *fdt)
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{
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    MachineState *machine = MACHINE(spapr);
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    hwaddr mem_start, node_size;
    int i, nb_nodes = nb_numa_nodes;
    NodeInfo *nodes = numa_info;
    NodeInfo ramnode;

    /* No NUMA nodes, assume there is just one node with whole RAM */
    if (!nb_numa_nodes) {
        nb_nodes = 1;
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        ramnode.node_mem = machine->ram_size;
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        nodes = &ramnode;
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    }
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    for (i = 0, mem_start = 0; i < nb_nodes; ++i) {
        if (!nodes[i].node_mem) {
            continue;
        }
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        if (mem_start >= machine->ram_size) {
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            node_size = 0;
        } else {
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            node_size = nodes[i].node_mem;
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            if (node_size > machine->ram_size - mem_start) {
                node_size = machine->ram_size - mem_start;
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            }
        }
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        if (!mem_start) {
            /* ppc_spapr_init() checks for rma_size <= node0_size already */
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            spapr_populate_memory_node(fdt, i, 0, spapr->rma_size);
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            mem_start += spapr->rma_size;
            node_size -= spapr->rma_size;
        }
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        for ( ; node_size; ) {
            hwaddr sizetmp = pow2floor(node_size);

            /* mem_start != 0 here */
            if (ctzl(mem_start) < ctzl(sizetmp)) {
                sizetmp = 1ULL << ctzl(mem_start);
            }

            spapr_populate_memory_node(fdt, i, mem_start, sizetmp);
            node_size -= sizetmp;
            mem_start += sizetmp;
        }
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    }

    return 0;
}

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static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
                                  sPAPRMachineState *spapr)
{
    PowerPCCPU *cpu = POWERPC_CPU(cs);
    CPUPPCState *env = &cpu->env;
    PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
    int index = ppc_get_vcpu_dt_id(cpu);
    uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
                       0xffffffff, 0xffffffff};
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    uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq()
        : SPAPR_TIMEBASE_FREQ;
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    uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
    uint32_t page_sizes_prop[64];
    size_t page_sizes_prop_size;
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    uint32_t vcpus_per_socket = smp_threads * smp_cores;
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    uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
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    int compat_smt = MIN(smp_threads, ppc_compat_max_threads(cpu));
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Bharata B Rao 已提交
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    sPAPRDRConnector *drc;
    int drc_index;
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    uint32_t radix_AP_encodings[PPC_PAGE_SIZES_MAX_SZ];
    int i;
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Bharata B Rao 已提交
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    drc = spapr_drc_by_id(TYPE_SPAPR_DRC_CPU, index);
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Bharata B Rao 已提交
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    if (drc) {
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        drc_index = spapr_drc_index(drc);
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Bharata B Rao 已提交
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        _FDT((fdt_setprop_cell(fdt, offset, "ibm,my-drc-index", drc_index)));
    }
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    _FDT((fdt_setprop_cell(fdt, offset, "reg", index)));
    _FDT((fdt_setprop_string(fdt, offset, "device_type", "cpu")));

    _FDT((fdt_setprop_cell(fdt, offset, "cpu-version", env->spr[SPR_PVR])));
    _FDT((fdt_setprop_cell(fdt, offset, "d-cache-block-size",
                           env->dcache_line_size)));
    _FDT((fdt_setprop_cell(fdt, offset, "d-cache-line-size",
                           env->dcache_line_size)));
    _FDT((fdt_setprop_cell(fdt, offset, "i-cache-block-size",
                           env->icache_line_size)));
    _FDT((fdt_setprop_cell(fdt, offset, "i-cache-line-size",
                           env->icache_line_size)));

    if (pcc->l1_dcache_size) {
        _FDT((fdt_setprop_cell(fdt, offset, "d-cache-size",
                               pcc->l1_dcache_size)));
    } else {
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        error_report("Warning: Unknown L1 dcache size for cpu");
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    }
    if (pcc->l1_icache_size) {
        _FDT((fdt_setprop_cell(fdt, offset, "i-cache-size",
                               pcc->l1_icache_size)));
    } else {
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        error_report("Warning: Unknown L1 icache size for cpu");
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    }

    _FDT((fdt_setprop_cell(fdt, offset, "timebase-frequency", tbfreq)));
    _FDT((fdt_setprop_cell(fdt, offset, "clock-frequency", cpufreq)));
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    _FDT((fdt_setprop_cell(fdt, offset, "slb-size", env->slb_nr)));
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    _FDT((fdt_setprop_cell(fdt, offset, "ibm,slb-size", env->slb_nr)));
    _FDT((fdt_setprop_string(fdt, offset, "status", "okay")));
    _FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0)));

    if (env->spr_cb[SPR_PURR].oea_read) {
        _FDT((fdt_setprop(fdt, offset, "ibm,purr", NULL, 0)));
    }

    if (env->mmu_model & POWERPC_MMU_1TSEG) {
        _FDT((fdt_setprop(fdt, offset, "ibm,processor-segment-sizes",
                          segs, sizeof(segs))));
    }

    /* Advertise VMX/VSX (vector extensions) if available
     *   0 / no property == no vector extensions
     *   1               == VMX / Altivec available
     *   2               == VSX available */
    if (env->insns_flags & PPC_ALTIVEC) {
        uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1;

        _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", vmx)));
    }

    /* Advertise DFP (Decimal Floating Point) if available
     *   0 / no property == no DFP
     *   1               == DFP available */
    if (env->insns_flags2 & PPC2_DFP) {
        _FDT((fdt_setprop_cell(fdt, offset, "ibm,dfp", 1)));
    }

528
    page_sizes_prop_size = ppc_create_page_sizes_prop(env, page_sizes_prop,
529 530 531 532 533 534
                                                  sizeof(page_sizes_prop));
    if (page_sizes_prop_size) {
        _FDT((fdt_setprop(fdt, offset, "ibm,segment-page-sizes",
                          page_sizes_prop, page_sizes_prop_size)));
    }

535
    spapr_populate_pa_features(env, fdt, offset, false);
536

537
    _FDT((fdt_setprop_cell(fdt, offset, "ibm,chip-id",
538
                           cs->cpu_index / vcpus_per_socket)));
539 540 541 542

    _FDT((fdt_setprop(fdt, offset, "ibm,pft-size",
                      pft_size_prop, sizeof(pft_size_prop))));

543 544 545
    if (nb_numa_nodes > 1) {
        _FDT(spapr_fixup_cpu_numa_dt(fdt, offset, cpu));
    }
546

547
    _FDT(spapr_fixup_cpu_smt_dt(fdt, offset, cpu, compat_smt));
548 549 550 551 552 553 554 555 556 557 558

    if (pcc->radix_page_info) {
        for (i = 0; i < pcc->radix_page_info->count; i++) {
            radix_AP_encodings[i] =
                cpu_to_be32(pcc->radix_page_info->entries[i]);
        }
        _FDT((fdt_setprop(fdt, offset, "ibm,processor-radix-AP-encodings",
                          radix_AP_encodings,
                          pcc->radix_page_info->count *
                          sizeof(radix_AP_encodings[0]))));
    }
559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596
}

static void spapr_populate_cpus_dt_node(void *fdt, sPAPRMachineState *spapr)
{
    CPUState *cs;
    int cpus_offset;
    char *nodename;
    int smt = kvmppc_smt_threads();

    cpus_offset = fdt_add_subnode(fdt, 0, "cpus");
    _FDT(cpus_offset);
    _FDT((fdt_setprop_cell(fdt, cpus_offset, "#address-cells", 0x1)));
    _FDT((fdt_setprop_cell(fdt, cpus_offset, "#size-cells", 0x0)));

    /*
     * We walk the CPUs in reverse order to ensure that CPU DT nodes
     * created by fdt_add_subnode() end up in the right order in FDT
     * for the guest kernel the enumerate the CPUs correctly.
     */
    CPU_FOREACH_REVERSE(cs) {
        PowerPCCPU *cpu = POWERPC_CPU(cs);
        int index = ppc_get_vcpu_dt_id(cpu);
        DeviceClass *dc = DEVICE_GET_CLASS(cs);
        int offset;

        if ((index % smt) != 0) {
            continue;
        }

        nodename = g_strdup_printf("%s@%x", dc->fw_name, index);
        offset = fdt_add_subnode(fdt, cpus_offset, nodename);
        g_free(nodename);
        _FDT(offset);
        spapr_populate_cpu_dt(cs, fdt, offset, spapr);
    }

}

597 598 599 600 601 602 603 604 605 606 607
/*
 * Adds ibm,dynamic-reconfiguration-memory node.
 * Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation
 * of this device tree node.
 */
static int spapr_populate_drconf_memory(sPAPRMachineState *spapr, void *fdt)
{
    MachineState *machine = MACHINE(spapr);
    int ret, i, offset;
    uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE;
    uint32_t prop_lmb_size[] = {0, cpu_to_be32(lmb_size)};
608 609 610 611
    uint32_t hotplug_lmb_start = spapr->hotplug_memory.base / lmb_size;
    uint32_t nr_lmbs = (spapr->hotplug_memory.base +
                       memory_region_size(&spapr->hotplug_memory.mr)) /
                       lmb_size;
612
    uint32_t *int_buf, *cur_index, buf_len;
613
    int nr_nodes = nb_numa_nodes ? nb_numa_nodes : 1;
614

615
    /*
616
     * Don't create the node if there is no hotpluggable memory
617
     */
618
    if (machine->ram_size == machine->maxram_size) {
619 620 621
        return 0;
    }

622 623 624 625 626 627
    /*
     * Allocate enough buffer size to fit in ibm,dynamic-memory
     * or ibm,associativity-lookup-arrays
     */
    buf_len = MAX(nr_lmbs * SPAPR_DR_LMB_LIST_ENTRY_SIZE + 1, nr_nodes * 4 + 2)
              * sizeof(uint32_t);
628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651
    cur_index = int_buf = g_malloc0(buf_len);

    offset = fdt_add_subnode(fdt, 0, "ibm,dynamic-reconfiguration-memory");

    ret = fdt_setprop(fdt, offset, "ibm,lmb-size", prop_lmb_size,
                    sizeof(prop_lmb_size));
    if (ret < 0) {
        goto out;
    }

    ret = fdt_setprop_cell(fdt, offset, "ibm,memory-flags-mask", 0xff);
    if (ret < 0) {
        goto out;
    }

    ret = fdt_setprop_cell(fdt, offset, "ibm,memory-preservation-time", 0x0);
    if (ret < 0) {
        goto out;
    }

    /* ibm,dynamic-memory */
    int_buf[0] = cpu_to_be32(nr_lmbs);
    cur_index++;
    for (i = 0; i < nr_lmbs; i++) {
652
        uint64_t addr = i * lmb_size;
653 654
        uint32_t *dynamic_memory = cur_index;

655 656 657
        if (i >= hotplug_lmb_start) {
            sPAPRDRConnector *drc;

658
            drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, i);
659 660 661 662
            g_assert(drc);

            dynamic_memory[0] = cpu_to_be32(addr >> 32);
            dynamic_memory[1] = cpu_to_be32(addr & 0xffffffff);
663
            dynamic_memory[2] = cpu_to_be32(spapr_drc_index(drc));
664 665 666 667 668 669 670
            dynamic_memory[3] = cpu_to_be32(0); /* reserved */
            dynamic_memory[4] = cpu_to_be32(numa_get_node(addr, NULL));
            if (memory_region_present(get_system_memory(), addr)) {
                dynamic_memory[5] = cpu_to_be32(SPAPR_LMB_FLAGS_ASSIGNED);
            } else {
                dynamic_memory[5] = cpu_to_be32(0);
            }
671
        } else {
672 673 674 675 676 677 678 679 680 681 682 683
            /*
             * LMB information for RMA, boot time RAM and gap b/n RAM and
             * hotplug memory region -- all these are marked as reserved
             * and as having no valid DRC.
             */
            dynamic_memory[0] = cpu_to_be32(addr >> 32);
            dynamic_memory[1] = cpu_to_be32(addr & 0xffffffff);
            dynamic_memory[2] = cpu_to_be32(0);
            dynamic_memory[3] = cpu_to_be32(0); /* reserved */
            dynamic_memory[4] = cpu_to_be32(-1);
            dynamic_memory[5] = cpu_to_be32(SPAPR_LMB_FLAGS_RESERVED |
                                            SPAPR_LMB_FLAGS_DRC_INVALID);
684 685 686 687 688 689 690 691 692 693 694
        }

        cur_index += SPAPR_DR_LMB_LIST_ENTRY_SIZE;
    }
    ret = fdt_setprop(fdt, offset, "ibm,dynamic-memory", int_buf, buf_len);
    if (ret < 0) {
        goto out;
    }

    /* ibm,associativity-lookup-arrays */
    cur_index = int_buf;
695
    int_buf[0] = cpu_to_be32(nr_nodes);
696 697
    int_buf[1] = cpu_to_be32(4); /* Number of entries per associativity list */
    cur_index += 2;
698
    for (i = 0; i < nr_nodes; i++) {
699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714
        uint32_t associativity[] = {
            cpu_to_be32(0x0),
            cpu_to_be32(0x0),
            cpu_to_be32(0x0),
            cpu_to_be32(i)
        };
        memcpy(cur_index, associativity, sizeof(associativity));
        cur_index += 4;
    }
    ret = fdt_setprop(fdt, offset, "ibm,associativity-lookup-arrays", int_buf,
            (cur_index - int_buf) * sizeof(uint32_t));
out:
    g_free(int_buf);
    return ret;
}

715 716 717 718
static int spapr_dt_cas_updates(sPAPRMachineState *spapr, void *fdt,
                                sPAPROptionVector *ov5_updates)
{
    sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
719
    int ret = 0, offset;
720 721 722 723 724

    /* Generate ibm,dynamic-reconfiguration-memory node if required */
    if (spapr_ovec_test(ov5_updates, OV5_DRCONF_MEMORY)) {
        g_assert(smc->dr_lmb_enabled);
        ret = spapr_populate_drconf_memory(spapr, fdt);
725 726 727
        if (ret) {
            goto out;
        }
728 729
    }

730 731 732 733 734 735 736 737 738 739 740
    offset = fdt_path_offset(fdt, "/chosen");
    if (offset < 0) {
        offset = fdt_add_subnode(fdt, 0, "chosen");
        if (offset < 0) {
            return offset;
        }
    }
    ret = spapr_ovec_populate_dt(fdt, offset, spapr->ov5_cas,
                                 "ibm,architecture-vec-5");

out:
741 742 743
    return ret;
}

744 745
int spapr_h_cas_compose_response(sPAPRMachineState *spapr,
                                 target_ulong addr, target_ulong size,
746
                                 sPAPROptionVector *ov5_updates)
747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763
{
    void *fdt, *fdt_skel;
    sPAPRDeviceTreeUpdateHeader hdr = { .version_id = 1 };

    size -= sizeof(hdr);

    /* Create sceleton */
    fdt_skel = g_malloc0(size);
    _FDT((fdt_create(fdt_skel, size)));
    _FDT((fdt_begin_node(fdt_skel, "")));
    _FDT((fdt_end_node(fdt_skel)));
    _FDT((fdt_finish(fdt_skel)));
    fdt = g_malloc0(size);
    _FDT((fdt_open_into(fdt_skel, fdt, size)));
    g_free(fdt_skel);

    /* Fixup cpu nodes */
764
    _FDT((spapr_fixup_cpu_dt(fdt, spapr)));
765

766 767
    if (spapr_dt_cas_updates(spapr, fdt, ov5_updates)) {
        return -1;
768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785
    }

    /* Pack resulting tree */
    _FDT((fdt_pack(fdt)));

    if (fdt_totalsize(fdt) + sizeof(hdr) > size) {
        trace_spapr_cas_failed(size);
        return -1;
    }

    cpu_physical_memory_write(addr, &hdr, sizeof(hdr));
    cpu_physical_memory_write(addr + sizeof(hdr), fdt, fdt_totalsize(fdt));
    trace_spapr_cas_continue(fdt_totalsize(fdt) + sizeof(hdr));
    g_free(fdt);

    return 0;
}

786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854
static void spapr_dt_rtas(sPAPRMachineState *spapr, void *fdt)
{
    int rtas;
    GString *hypertas = g_string_sized_new(256);
    GString *qemu_hypertas = g_string_sized_new(256);
    uint32_t refpoints[] = { cpu_to_be32(0x4), cpu_to_be32(0x4) };
    uint64_t max_hotplug_addr = spapr->hotplug_memory.base +
        memory_region_size(&spapr->hotplug_memory.mr);
    uint32_t lrdr_capacity[] = {
        cpu_to_be32(max_hotplug_addr >> 32),
        cpu_to_be32(max_hotplug_addr & 0xffffffff),
        0, cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE),
        cpu_to_be32(max_cpus / smp_threads),
    };

    _FDT(rtas = fdt_add_subnode(fdt, 0, "rtas"));

    /* hypertas */
    add_str(hypertas, "hcall-pft");
    add_str(hypertas, "hcall-term");
    add_str(hypertas, "hcall-dabr");
    add_str(hypertas, "hcall-interrupt");
    add_str(hypertas, "hcall-tce");
    add_str(hypertas, "hcall-vio");
    add_str(hypertas, "hcall-splpar");
    add_str(hypertas, "hcall-bulk");
    add_str(hypertas, "hcall-set-mode");
    add_str(hypertas, "hcall-sprg0");
    add_str(hypertas, "hcall-copy");
    add_str(hypertas, "hcall-debug");
    add_str(qemu_hypertas, "hcall-memop1");

    if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
        add_str(hypertas, "hcall-multi-tce");
    }
    _FDT(fdt_setprop(fdt, rtas, "ibm,hypertas-functions",
                     hypertas->str, hypertas->len));
    g_string_free(hypertas, TRUE);
    _FDT(fdt_setprop(fdt, rtas, "qemu,hypertas-functions",
                     qemu_hypertas->str, qemu_hypertas->len));
    g_string_free(qemu_hypertas, TRUE);

    _FDT(fdt_setprop(fdt, rtas, "ibm,associativity-reference-points",
                     refpoints, sizeof(refpoints)));

    _FDT(fdt_setprop_cell(fdt, rtas, "rtas-error-log-max",
                          RTAS_ERROR_LOG_MAX));
    _FDT(fdt_setprop_cell(fdt, rtas, "rtas-event-scan-rate",
                          RTAS_EVENT_SCAN_RATE));

    if (msi_nonbroken) {
        _FDT(fdt_setprop(fdt, rtas, "ibm,change-msix-capable", NULL, 0));
    }

    /*
     * According to PAPR, rtas ibm,os-term does not guarantee a return
     * back to the guest cpu.
     *
     * While an additional ibm,extended-os-term property indicates
     * that rtas call return will always occur. Set this property.
     */
    _FDT(fdt_setprop(fdt, rtas, "ibm,extended-os-term", NULL, 0));

    _FDT(fdt_setprop(fdt, rtas, "ibm,lrdr-capacity",
                     lrdr_capacity, sizeof(lrdr_capacity)));

    spapr_dt_rtas_tokens(fdt, rtas);
}

855 856 857 858 859
/* Prepare ibm,arch-vec-5-platform-support, which indicates the MMU features
 * that the guest may request and thus the valid values for bytes 24..26 of
 * option vector 5: */
static void spapr_dt_ov5_platform_support(void *fdt, int chosen)
{
860 861
    PowerPCCPU *first_ppc_cpu = POWERPC_CPU(first_cpu);

862 863 864 865 866 867 868 869 870 871 872 873 874 875 876
    char val[2 * 3] = {
        24, 0x00, /* Hash/Radix, filled in below. */
        25, 0x00, /* Hash options: Segment Tables == no, GTSE == no. */
        26, 0x40, /* Radix options: GTSE == yes. */
    };

    if (kvm_enabled()) {
        if (kvmppc_has_cap_mmu_radix() && kvmppc_has_cap_mmu_hash_v3()) {
            val[1] = 0x80; /* OV5_MMU_BOTH */
        } else if (kvmppc_has_cap_mmu_radix()) {
            val[1] = 0x40; /* OV5_MMU_RADIX_300 */
        } else {
            val[1] = 0x00; /* Hash */
        }
    } else {
877 878 879 880 881 882 883
        if (first_ppc_cpu->env.mmu_model & POWERPC_MMU_V3) {
            /* V3 MMU supports both hash and radix (with dynamic switching) */
            val[1] = 0xC0;
        } else {
            /* Otherwise we can only do hash */
            val[1] = 0x00;
        }
884 885 886 887 888
    }
    _FDT(fdt_setprop(fdt, chosen, "ibm,arch-vec-5-platform-support",
                     val, sizeof(val)));
}

889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941
static void spapr_dt_chosen(sPAPRMachineState *spapr, void *fdt)
{
    MachineState *machine = MACHINE(spapr);
    int chosen;
    const char *boot_device = machine->boot_order;
    char *stdout_path = spapr_vio_stdout_path(spapr->vio_bus);
    size_t cb = 0;
    char *bootlist = get_boot_devices_list(&cb, true);

    _FDT(chosen = fdt_add_subnode(fdt, 0, "chosen"));

    _FDT(fdt_setprop_string(fdt, chosen, "bootargs", machine->kernel_cmdline));
    _FDT(fdt_setprop_cell(fdt, chosen, "linux,initrd-start",
                          spapr->initrd_base));
    _FDT(fdt_setprop_cell(fdt, chosen, "linux,initrd-end",
                          spapr->initrd_base + spapr->initrd_size));

    if (spapr->kernel_size) {
        uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
                              cpu_to_be64(spapr->kernel_size) };

        _FDT(fdt_setprop(fdt, chosen, "qemu,boot-kernel",
                         &kprop, sizeof(kprop)));
        if (spapr->kernel_le) {
            _FDT(fdt_setprop(fdt, chosen, "qemu,boot-kernel-le", NULL, 0));
        }
    }
    if (boot_menu) {
        _FDT((fdt_setprop_cell(fdt, chosen, "qemu,boot-menu", boot_menu)));
    }
    _FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-width", graphic_width));
    _FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-height", graphic_height));
    _FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-depth", graphic_depth));

    if (cb && bootlist) {
        int i;

        for (i = 0; i < cb; i++) {
            if (bootlist[i] == '\n') {
                bootlist[i] = ' ';
            }
        }
        _FDT(fdt_setprop_string(fdt, chosen, "qemu,boot-list", bootlist));
    }

    if (boot_device && strlen(boot_device)) {
        _FDT(fdt_setprop_string(fdt, chosen, "qemu,boot-device", boot_device));
    }

    if (!spapr->has_graphics && stdout_path) {
        _FDT(fdt_setprop_string(fdt, chosen, "linux,stdout-path", stdout_path));
    }

942 943
    spapr_dt_ov5_platform_support(fdt, chosen);

944 945 946 947
    g_free(stdout_path);
    g_free(bootlist);
}

948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970
static void spapr_dt_hypervisor(sPAPRMachineState *spapr, void *fdt)
{
    /* The /hypervisor node isn't in PAPR - this is a hack to allow PR
     * KVM to work under pHyp with some guest co-operation */
    int hypervisor;
    uint8_t hypercall[16];

    _FDT(hypervisor = fdt_add_subnode(fdt, 0, "hypervisor"));
    /* indicate KVM hypercall interface */
    _FDT(fdt_setprop_string(fdt, hypervisor, "compatible", "linux,kvm"));
    if (kvmppc_has_cap_fixup_hcalls()) {
        /*
         * Older KVM versions with older guest kernels were broken
         * with the magic page, don't allow the guest to map it.
         */
        if (!kvmppc_get_hypercall(first_cpu->env_ptr, hypercall,
                                  sizeof(hypercall))) {
            _FDT(fdt_setprop(fdt, hypervisor, "hcall-instructions",
                             hypercall, sizeof(hypercall)));
        }
    }
}

971 972 973
static void *spapr_build_fdt(sPAPRMachineState *spapr,
                             hwaddr rtas_addr,
                             hwaddr rtas_size)
974
{
975
    MachineState *machine = MACHINE(qdev_get_machine());
976
    MachineClass *mc = MACHINE_GET_CLASS(machine);
B
Bharata B Rao 已提交
977
    sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
978
    int ret;
979
    void *fdt;
980
    sPAPRPHBState *phb;
981
    char *buf;
982
    int smt = kvmppc_smt_threads();
983

984 985
    fdt = g_malloc0(FDT_MAX_SIZE);
    _FDT((fdt_create_empty_tree(fdt, FDT_MAX_SIZE)));
986

987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019
    /* Root node */
    _FDT(fdt_setprop_string(fdt, 0, "device_type", "chrp"));
    _FDT(fdt_setprop_string(fdt, 0, "model", "IBM pSeries (emulated by qemu)"));
    _FDT(fdt_setprop_string(fdt, 0, "compatible", "qemu,pseries"));

    /*
     * Add info to guest to indentify which host is it being run on
     * and what is the uuid of the guest
     */
    if (kvmppc_get_host_model(&buf)) {
        _FDT(fdt_setprop_string(fdt, 0, "host-model", buf));
        g_free(buf);
    }
    if (kvmppc_get_host_serial(&buf)) {
        _FDT(fdt_setprop_string(fdt, 0, "host-serial", buf));
        g_free(buf);
    }

    buf = qemu_uuid_unparse_strdup(&qemu_uuid);

    _FDT(fdt_setprop_string(fdt, 0, "vm,uuid", buf));
    if (qemu_uuid_set) {
        _FDT(fdt_setprop_string(fdt, 0, "system-id", buf));
    }
    g_free(buf);

    if (qemu_get_vm_name()) {
        _FDT(fdt_setprop_string(fdt, 0, "ibm,partition-name",
                                qemu_get_vm_name()));
    }

    _FDT(fdt_setprop_cell(fdt, 0, "#address-cells", 2));
    _FDT(fdt_setprop_cell(fdt, 0, "#size-cells", 2));
1020

1021
    /* /interrupt controller */
1022
    spapr_dt_xics(DIV_ROUND_UP(max_cpus * smt, smp_threads), fdt, PHANDLE_XICP);
1023

1024 1025
    ret = spapr_populate_memory(spapr, fdt);
    if (ret < 0) {
1026
        error_report("couldn't setup memory nodes in fdt");
1027
        exit(1);
1028 1029
    }

1030 1031
    /* /vdevice */
    spapr_dt_vdevice(spapr->vio_bus, fdt);
1032

1033 1034 1035
    if (object_resolve_path_type("", TYPE_SPAPR_RNG, NULL)) {
        ret = spapr_rng_populate_dt(fdt);
        if (ret < 0) {
1036
            error_report("could not set up rng device in the fdt");
1037 1038 1039 1040
            exit(1);
        }
    }

1041
    QLIST_FOREACH(phb, &spapr->phbs, list) {
1042
        ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt);
1043 1044 1045 1046
        if (ret < 0) {
            error_report("couldn't setup PCI devices in fdt");
            exit(1);
        }
1047 1048
    }

1049 1050
    /* cpus */
    spapr_populate_cpus_dt_node(fdt, spapr);
1051

B
Bharata B Rao 已提交
1052 1053 1054 1055
    if (smc->dr_lmb_enabled) {
        _FDT(spapr_drc_populate_dt(fdt, 0, NULL, SPAPR_DR_CONNECTOR_TYPE_LMB));
    }

1056
    if (mc->has_hotpluggable_cpus) {
B
Bharata B Rao 已提交
1057 1058 1059 1060 1061 1062 1063 1064 1065
        int offset = fdt_path_offset(fdt, "/cpus");
        ret = spapr_drc_populate_dt(fdt, offset, NULL,
                                    SPAPR_DR_CONNECTOR_TYPE_CPU);
        if (ret < 0) {
            error_report("Couldn't set up CPU DR device tree properties");
            exit(1);
        }
    }

1066
    /* /event-sources */
1067
    spapr_dt_events(spapr, fdt);
1068

1069 1070 1071
    /* /rtas */
    spapr_dt_rtas(spapr, fdt);

1072 1073
    /* /chosen */
    spapr_dt_chosen(spapr, fdt);
1074

1075 1076 1077 1078 1079
    /* /hypervisor */
    if (kvm_enabled()) {
        spapr_dt_hypervisor(spapr, fdt);
    }

1080 1081 1082 1083 1084 1085 1086 1087
    /* Build memory reserve map */
    if (spapr->kernel_size) {
        _FDT((fdt_add_mem_rsv(fdt, KERNEL_LOAD_ADDR, spapr->kernel_size)));
    }
    if (spapr->initrd_size) {
        _FDT((fdt_add_mem_rsv(fdt, spapr->initrd_base, spapr->initrd_size)));
    }

1088 1089 1090 1091 1092 1093 1094
    /* ibm,client-architecture-support updates */
    ret = spapr_dt_cas_updates(spapr, fdt, spapr->ov5_cas);
    if (ret < 0) {
        error_report("couldn't setup CAS properties fdt");
        exit(1);
    }

1095
    return fdt;
1096 1097 1098 1099 1100 1101 1102
}

static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
{
    return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
}

1103 1104
static void emulate_spapr_hypercall(PPCVirtualHypervisor *vhyp,
                                    PowerPCCPU *cpu)
1105
{
1106 1107
    CPUPPCState *env = &cpu->env;

1108 1109 1110
    /* The TCG path should also be holding the BQL at this point */
    g_assert(qemu_mutex_iothread_locked());

1111 1112 1113 1114
    if (msr_pr) {
        hcall_dprintf("Hypercall made with MSR[PR]=1\n");
        env->gpr[3] = H_PRIVILEGE;
    } else {
1115
        env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]);
1116
    }
1117 1118
}

1119 1120 1121 1122 1123 1124 1125
static uint64_t spapr_get_patbe(PPCVirtualHypervisor *vhyp)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);

    return spapr->patb_entry;
}

1126 1127 1128 1129 1130 1131
#define HPTE(_table, _i)   (void *)(((uint64_t *)(_table)) + ((_i) * 2))
#define HPTE_VALID(_hpte)  (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
#define HPTE_DIRTY(_hpte)  (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
#define CLEAN_HPTE(_hpte)  ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
#define DIRTY_HPTE(_hpte)  ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))

1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149
/*
 * Get the fd to access the kernel htab, re-opening it if necessary
 */
static int get_htab_fd(sPAPRMachineState *spapr)
{
    if (spapr->htab_fd >= 0) {
        return spapr->htab_fd;
    }

    spapr->htab_fd = kvmppc_get_htab_fd(false);
    if (spapr->htab_fd < 0) {
        error_report("Unable to open fd for reading hash table from KVM: %s",
                     strerror(errno));
    }

    return spapr->htab_fd;
}

1150
void close_htab_fd(sPAPRMachineState *spapr)
1151 1152 1153 1154 1155 1156 1157
{
    if (spapr->htab_fd >= 0) {
        close(spapr->htab_fd);
    }
    spapr->htab_fd = -1;
}

1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213
static hwaddr spapr_hpt_mask(PPCVirtualHypervisor *vhyp)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);

    return HTAB_SIZE(spapr) / HASH_PTEG_SIZE_64 - 1;
}

static const ppc_hash_pte64_t *spapr_map_hptes(PPCVirtualHypervisor *vhyp,
                                                hwaddr ptex, int n)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);
    hwaddr pte_offset = ptex * HASH_PTE_SIZE_64;

    if (!spapr->htab) {
        /*
         * HTAB is controlled by KVM. Fetch into temporary buffer
         */
        ppc_hash_pte64_t *hptes = g_malloc(n * HASH_PTE_SIZE_64);
        kvmppc_read_hptes(hptes, ptex, n);
        return hptes;
    }

    /*
     * HTAB is controlled by QEMU. Just point to the internally
     * accessible PTEG.
     */
    return (const ppc_hash_pte64_t *)(spapr->htab + pte_offset);
}

static void spapr_unmap_hptes(PPCVirtualHypervisor *vhyp,
                              const ppc_hash_pte64_t *hptes,
                              hwaddr ptex, int n)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);

    if (!spapr->htab) {
        g_free((void *)hptes);
    }

    /* Nothing to do for qemu managed HPT */
}

static void spapr_store_hpte(PPCVirtualHypervisor *vhyp, hwaddr ptex,
                             uint64_t pte0, uint64_t pte1)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);
    hwaddr offset = ptex * HASH_PTE_SIZE_64;

    if (!spapr->htab) {
        kvmppc_write_hpte(ptex, pte0, pte1);
    } else {
        stq_p(spapr->htab + offset, pte0);
        stq_p(spapr->htab + offset + HASH_PTE_SIZE_64 / 2, pte1);
    }
}

1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226
static int spapr_hpt_shift_for_ramsize(uint64_t ramsize)
{
    int shift;

    /* We aim for a hash table of size 1/128 the size of RAM (rounded
     * up).  The PAPR recommendation is actually 1/64 of RAM size, but
     * that's much more than is needed for Linux guests */
    shift = ctz64(pow2ceil(ramsize)) - 7;
    shift = MAX(shift, 18); /* Minimum architected size */
    shift = MIN(shift, 46); /* Maximum architected size */
    return shift;
}

1227 1228 1229 1230 1231 1232 1233 1234
void spapr_free_hpt(sPAPRMachineState *spapr)
{
    g_free(spapr->htab);
    spapr->htab = NULL;
    spapr->htab_shift = 0;
    close_htab_fd(spapr);
}

1235 1236
static void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift,
                                 Error **errp)
1237
{
1238 1239 1240
    long rc;

    /* Clean up any HPT info from a previous boot */
1241
    spapr_free_hpt(spapr);
1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256

    rc = kvmppc_reset_htab(shift);
    if (rc < 0) {
        /* kernel-side HPT needed, but couldn't allocate one */
        error_setg_errno(errp, errno,
                         "Failed to allocate KVM HPT of order %d (try smaller maxmem?)",
                         shift);
        /* This is almost certainly fatal, but if the caller really
         * wants to carry on with shift == 0, it's welcome to try */
    } else if (rc > 0) {
        /* kernel-side HPT allocated */
        if (rc != shift) {
            error_setg(errp,
                       "Requested order %d HPT, but kernel allocated order %ld (try smaller maxmem?)",
                       shift, rc);
1257 1258
        }

1259
        spapr->htab_shift = shift;
1260
        spapr->htab = NULL;
1261
    } else {
1262 1263 1264
        /* kernel-side HPT not needed, allocate in userspace instead */
        size_t size = 1ULL << shift;
        int i;
1265

1266 1267 1268 1269 1270
        spapr->htab = qemu_memalign(size, size);
        if (!spapr->htab) {
            error_setg_errno(errp, errno,
                             "Could not allocate HPT of order %d", shift);
            return;
1271 1272
        }

1273 1274
        memset(spapr->htab, 0, size);
        spapr->htab_shift = shift;
1275

1276 1277
        for (i = 0; i < size / HASH_PTE_SIZE_64; i++) {
            DIRTY_HPTE(HPTE(spapr->htab, i));
1278
        }
1279
    }
1280 1281
}

1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294
void spapr_setup_hpt_and_vrma(sPAPRMachineState *spapr)
{
    spapr_reallocate_hpt(spapr,
                     spapr_hpt_shift_for_ramsize(MACHINE(spapr)->maxram_size),
                     &error_fatal);
    if (spapr->vrma_adjust) {
        spapr->rma_size = kvmppc_rma_size(spapr_node0_size(),
                                          spapr->htab_shift);
    }
    /* We're setting up a hash table, so that means we're not radix */
    spapr->patb_entry = 0;
}

1295
static void find_unknown_sysbus_device(SysBusDevice *sbdev, void *opaque)
1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309
{
    bool matched = false;

    if (object_dynamic_cast(OBJECT(sbdev), TYPE_SPAPR_PCI_HOST_BRIDGE)) {
        matched = true;
    }

    if (!matched) {
        error_report("Device %s is not supported by this machine yet.",
                     qdev_fw_name(DEVICE(sbdev)));
        exit(1);
    }
}

1310
static void ppc_spapr_reset(void)
1311
{
1312 1313
    MachineState *machine = MACHINE(qdev_get_machine());
    sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
1314
    PowerPCCPU *first_ppc_cpu;
1315
    uint32_t rtas_limit;
1316
    hwaddr rtas_addr, fdt_addr;
1317 1318
    void *fdt;
    int rc;
1319

1320 1321 1322
    /* Check for unknown sysbus devices */
    foreach_dynamic_sysbus_device(find_unknown_sysbus_device, NULL);

1323 1324 1325 1326 1327 1328 1329 1330
    if (kvm_enabled() && kvmppc_has_cap_mmu_radix()) {
        /* If using KVM with radix mode available, VCPUs can be started
         * without a HPT because KVM will start them in radix mode.
         * Set the GR bit in PATB so that we know there is no HPT. */
        spapr->patb_entry = PATBE1_GR;
    } else {
        spapr->patb_entry = 0;
        spapr_setup_hpt_and_vrma(spapr);
1331
    }
1332

1333
    qemu_devices_reset();
1334

1335 1336 1337 1338 1339 1340
    /*
     * We place the device tree and RTAS just below either the top of the RMA,
     * or just below 2GB, whichever is lowere, so that it can be
     * processed with 32-bit real mode code if necessary
     */
    rtas_limit = MIN(spapr->rma_size, RTAS_MAX_ADDR);
1341 1342
    rtas_addr = rtas_limit - RTAS_MAX_SIZE;
    fdt_addr = rtas_addr - FDT_MAX_SIZE;
1343

1344 1345 1346 1347 1348 1349 1350
    /* if this reset wasn't generated by CAS, we should reset our
     * negotiated options and start from scratch */
    if (!spapr->cas_reboot) {
        spapr_ovec_cleanup(spapr->ov5_cas);
        spapr->ov5_cas = spapr_ovec_new();
    }

1351
    fdt = spapr_build_fdt(spapr, rtas_addr, spapr->rtas_size);
1352

D
David Gibson 已提交
1353
    spapr_load_rtas(spapr, fdt, rtas_addr);
1354

1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367
    rc = fdt_pack(fdt);

    /* Should only fail if we've built a corrupted tree */
    assert(rc == 0);

    if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
        error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
                     fdt_totalsize(fdt), FDT_MAX_SIZE);
        exit(1);
    }

    /* Load the fdt */
    qemu_fdt_dumpdtb(fdt, fdt_totalsize(fdt));
1368
    cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
1369 1370
    g_free(fdt);

1371
    /* Set up the entry state */
1372
    first_ppc_cpu = POWERPC_CPU(first_cpu);
1373
    first_ppc_cpu->env.gpr[3] = fdt_addr;
1374 1375
    first_ppc_cpu->env.gpr[5] = 0;
    first_cpu->halted = 0;
1376
    first_ppc_cpu->env.nip = SPAPR_ENTRY_POINT;
1377

1378
    spapr->cas_reboot = false;
1379 1380
}

1381
static void spapr_create_nvram(sPAPRMachineState *spapr)
D
David Gibson 已提交
1382
{
1383
    DeviceState *dev = qdev_create(&spapr->vio_bus->bus, "spapr-nvram");
P
Paolo Bonzini 已提交
1384
    DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0);
D
David Gibson 已提交
1385

P
Paolo Bonzini 已提交
1386
    if (dinfo) {
1387 1388
        qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo),
                            &error_fatal);
D
David Gibson 已提交
1389 1390 1391 1392 1393 1394 1395
    }

    qdev_init_nofail(dev);

    spapr->nvram = (struct sPAPRNVRAM *)dev;
}

1396
static void spapr_rtc_create(sPAPRMachineState *spapr)
1397
{
1398 1399 1400 1401 1402 1403 1404
    object_initialize(&spapr->rtc, sizeof(spapr->rtc), TYPE_SPAPR_RTC);
    object_property_add_child(OBJECT(spapr), "rtc", OBJECT(&spapr->rtc),
                              &error_fatal);
    object_property_set_bool(OBJECT(&spapr->rtc), true, "realized",
                              &error_fatal);
    object_property_add_alias(OBJECT(spapr), "rtc-time", OBJECT(&spapr->rtc),
                              "date", &error_fatal);
1405 1406
}

1407
/* Returns whether we want to use VGA or not */
1408
static bool spapr_vga_init(PCIBus *pci_bus, Error **errp)
1409
{
1410 1411
    switch (vga_interface_type) {
    case VGA_NONE:
1412 1413 1414
        return false;
    case VGA_DEVICE:
        return true;
1415
    case VGA_STD:
1416
    case VGA_VIRTIO:
1417
        return pci_vga_init(pci_bus) != NULL;
1418
    default:
1419 1420 1421
        error_setg(errp,
                   "Unsupported VGA mode, only -vga std or -vga virtio is supported");
        return false;
1422 1423 1424
    }
}

1425 1426
static int spapr_post_load(void *opaque, int version_id)
{
1427
    sPAPRMachineState *spapr = (sPAPRMachineState *)opaque;
1428 1429
    int err = 0;

1430
    if (!object_dynamic_cast(OBJECT(spapr->ics), TYPE_ICS_KVM)) {
1431 1432 1433 1434
        CPUState *cs;
        CPU_FOREACH(cs) {
            PowerPCCPU *cpu = POWERPC_CPU(cs);
            icp_resend(ICP(cpu->intc));
1435 1436 1437
        }
    }

S
Stefan Weil 已提交
1438
    /* In earlier versions, there was no separate qdev for the PAPR
1439 1440 1441 1442
     * RTC, so the RTC offset was stored directly in sPAPREnvironment.
     * So when migrating from those versions, poke the incoming offset
     * value into the RTC device */
    if (version_id < 3) {
1443
        err = spapr_rtc_import_offset(&spapr->rtc, spapr->rtc_offset);
1444 1445 1446 1447 1448 1449 1450 1451 1452 1453
    }

    return err;
}

static bool version_before_3(void *opaque, int version_id)
{
    return version_id < 3;
}

1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515
static bool spapr_ov5_cas_needed(void *opaque)
{
    sPAPRMachineState *spapr = opaque;
    sPAPROptionVector *ov5_mask = spapr_ovec_new();
    sPAPROptionVector *ov5_legacy = spapr_ovec_new();
    sPAPROptionVector *ov5_removed = spapr_ovec_new();
    bool cas_needed;

    /* Prior to the introduction of sPAPROptionVector, we had two option
     * vectors we dealt with: OV5_FORM1_AFFINITY, and OV5_DRCONF_MEMORY.
     * Both of these options encode machine topology into the device-tree
     * in such a way that the now-booted OS should still be able to interact
     * appropriately with QEMU regardless of what options were actually
     * negotiatied on the source side.
     *
     * As such, we can avoid migrating the CAS-negotiated options if these
     * are the only options available on the current machine/platform.
     * Since these are the only options available for pseries-2.7 and
     * earlier, this allows us to maintain old->new/new->old migration
     * compatibility.
     *
     * For QEMU 2.8+, there are additional CAS-negotiatable options available
     * via default pseries-2.8 machines and explicit command-line parameters.
     * Some of these options, like OV5_HP_EVT, *do* require QEMU to be aware
     * of the actual CAS-negotiated values to continue working properly. For
     * example, availability of memory unplug depends on knowing whether
     * OV5_HP_EVT was negotiated via CAS.
     *
     * Thus, for any cases where the set of available CAS-negotiatable
     * options extends beyond OV5_FORM1_AFFINITY and OV5_DRCONF_MEMORY, we
     * include the CAS-negotiated options in the migration stream.
     */
    spapr_ovec_set(ov5_mask, OV5_FORM1_AFFINITY);
    spapr_ovec_set(ov5_mask, OV5_DRCONF_MEMORY);

    /* spapr_ovec_diff returns true if bits were removed. we avoid using
     * the mask itself since in the future it's possible "legacy" bits may be
     * removed via machine options, which could generate a false positive
     * that breaks migration.
     */
    spapr_ovec_intersect(ov5_legacy, spapr->ov5, ov5_mask);
    cas_needed = spapr_ovec_diff(ov5_removed, spapr->ov5, ov5_legacy);

    spapr_ovec_cleanup(ov5_mask);
    spapr_ovec_cleanup(ov5_legacy);
    spapr_ovec_cleanup(ov5_removed);

    return cas_needed;
}

static const VMStateDescription vmstate_spapr_ov5_cas = {
    .name = "spapr_option_vector_ov5_cas",
    .version_id = 1,
    .minimum_version_id = 1,
    .needed = spapr_ov5_cas_needed,
    .fields = (VMStateField[]) {
        VMSTATE_STRUCT_POINTER_V(ov5_cas, sPAPRMachineState, 1,
                                 vmstate_spapr_ovec, sPAPROptionVector),
        VMSTATE_END_OF_LIST()
    },
};

1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533
static bool spapr_patb_entry_needed(void *opaque)
{
    sPAPRMachineState *spapr = opaque;

    return !!spapr->patb_entry;
}

static const VMStateDescription vmstate_spapr_patb_entry = {
    .name = "spapr_patb_entry",
    .version_id = 1,
    .minimum_version_id = 1,
    .needed = spapr_patb_entry_needed,
    .fields = (VMStateField[]) {
        VMSTATE_UINT64(patb_entry, sPAPRMachineState),
        VMSTATE_END_OF_LIST()
    },
};

1534 1535
static const VMStateDescription vmstate_spapr = {
    .name = "spapr",
1536
    .version_id = 3,
1537
    .minimum_version_id = 1,
1538
    .post_load = spapr_post_load,
1539
    .fields = (VMStateField[]) {
1540 1541
        /* used to be @next_irq */
        VMSTATE_UNUSED_BUFFER(version_before_3, 0, 4),
1542 1543

        /* RTC offset */
1544
        VMSTATE_UINT64_TEST(rtc_offset, sPAPRMachineState, version_before_3),
1545

1546
        VMSTATE_PPC_TIMEBASE_V(tb, sPAPRMachineState, 2),
1547 1548
        VMSTATE_END_OF_LIST()
    },
1549 1550
    .subsections = (const VMStateDescription*[]) {
        &vmstate_spapr_ov5_cas,
1551
        &vmstate_spapr_patb_entry,
1552 1553
        NULL
    }
1554 1555 1556 1557
};

static int htab_save_setup(QEMUFile *f, void *opaque)
{
1558
    sPAPRMachineState *spapr = opaque;
1559 1560 1561 1562

    /* "Iteration" header */
    qemu_put_be32(f, spapr->htab_shift);

1563 1564 1565 1566 1567 1568 1569 1570
    if (spapr->htab) {
        spapr->htab_save_index = 0;
        spapr->htab_first_pass = true;
    } else {
        assert(kvm_enabled());
    }


1571 1572 1573
    return 0;
}

1574
static void htab_save_first_pass(QEMUFile *f, sPAPRMachineState *spapr,
1575 1576
                                 int64_t max_ns)
{
1577
    bool has_timeout = max_ns != -1;
1578 1579
    int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64;
    int index = spapr->htab_save_index;
1580
    int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
1581 1582 1583 1584 1585 1586 1587 1588 1589 1590

    assert(spapr->htab_first_pass);

    do {
        int chunkstart;

        /* Consume invalid HPTEs */
        while ((index < htabslots)
               && !HPTE_VALID(HPTE(spapr->htab, index))) {
            CLEAN_HPTE(HPTE(spapr->htab, index));
M
Marc-André Lureau 已提交
1591
            index++;
1592 1593 1594 1595
        }

        /* Consume valid HPTEs */
        chunkstart = index;
1596
        while ((index < htabslots) && (index - chunkstart < USHRT_MAX)
1597 1598
               && HPTE_VALID(HPTE(spapr->htab, index))) {
            CLEAN_HPTE(HPTE(spapr->htab, index));
M
Marc-André Lureau 已提交
1599
            index++;
1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610
        }

        if (index > chunkstart) {
            int n_valid = index - chunkstart;

            qemu_put_be32(f, chunkstart);
            qemu_put_be16(f, n_valid);
            qemu_put_be16(f, 0);
            qemu_put_buffer(f, HPTE(spapr->htab, chunkstart),
                            HASH_PTE_SIZE_64 * n_valid);

1611 1612
            if (has_timeout &&
                (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) {
1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625
                break;
            }
        }
    } while ((index < htabslots) && !qemu_file_rate_limit(f));

    if (index >= htabslots) {
        assert(index == htabslots);
        index = 0;
        spapr->htab_first_pass = false;
    }
    spapr->htab_save_index = index;
}

1626
static int htab_save_later_pass(QEMUFile *f, sPAPRMachineState *spapr,
1627
                                int64_t max_ns)
1628 1629 1630 1631 1632
{
    bool final = max_ns < 0;
    int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64;
    int examined = 0, sent = 0;
    int index = spapr->htab_save_index;
1633
    int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648

    assert(!spapr->htab_first_pass);

    do {
        int chunkstart, invalidstart;

        /* Consume non-dirty HPTEs */
        while ((index < htabslots)
               && !HPTE_DIRTY(HPTE(spapr->htab, index))) {
            index++;
            examined++;
        }

        chunkstart = index;
        /* Consume valid dirty HPTEs */
1649
        while ((index < htabslots) && (index - chunkstart < USHRT_MAX)
1650 1651 1652 1653 1654 1655 1656 1657 1658
               && HPTE_DIRTY(HPTE(spapr->htab, index))
               && HPTE_VALID(HPTE(spapr->htab, index))) {
            CLEAN_HPTE(HPTE(spapr->htab, index));
            index++;
            examined++;
        }

        invalidstart = index;
        /* Consume invalid dirty HPTEs */
1659
        while ((index < htabslots) && (index - invalidstart < USHRT_MAX)
1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677
               && HPTE_DIRTY(HPTE(spapr->htab, index))
               && !HPTE_VALID(HPTE(spapr->htab, index))) {
            CLEAN_HPTE(HPTE(spapr->htab, index));
            index++;
            examined++;
        }

        if (index > chunkstart) {
            int n_valid = invalidstart - chunkstart;
            int n_invalid = index - invalidstart;

            qemu_put_be32(f, chunkstart);
            qemu_put_be16(f, n_valid);
            qemu_put_be16(f, n_invalid);
            qemu_put_buffer(f, HPTE(spapr->htab, chunkstart),
                            HASH_PTE_SIZE_64 * n_valid);
            sent += index - chunkstart;

1678
            if (!final && (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) {
1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699
                break;
            }
        }

        if (examined >= htabslots) {
            break;
        }

        if (index >= htabslots) {
            assert(index == htabslots);
            index = 0;
        }
    } while ((examined < htabslots) && (!qemu_file_rate_limit(f) || final));

    if (index >= htabslots) {
        assert(index == htabslots);
        index = 0;
    }

    spapr->htab_save_index = index;

1700
    return (examined >= htabslots) && (sent == 0) ? 1 : 0;
1701 1702
}

1703 1704 1705
#define MAX_ITERATION_NS    5000000 /* 5 ms */
#define MAX_KVM_BUF_SIZE    2048

1706 1707
static int htab_save_iterate(QEMUFile *f, void *opaque)
{
1708
    sPAPRMachineState *spapr = opaque;
1709
    int fd;
1710
    int rc = 0;
1711 1712 1713 1714

    /* Iteration header */
    qemu_put_be32(f, 0);

1715 1716 1717
    if (!spapr->htab) {
        assert(kvm_enabled());

1718 1719 1720
        fd = get_htab_fd(spapr);
        if (fd < 0) {
            return fd;
1721 1722
        }

1723
        rc = kvmppc_save_htab(f, fd, MAX_KVM_BUF_SIZE, MAX_ITERATION_NS);
1724 1725 1726 1727
        if (rc < 0) {
            return rc;
        }
    } else  if (spapr->htab_first_pass) {
1728 1729
        htab_save_first_pass(f, spapr, MAX_ITERATION_NS);
    } else {
1730
        rc = htab_save_later_pass(f, spapr, MAX_ITERATION_NS);
1731 1732 1733 1734 1735 1736 1737
    }

    /* End marker */
    qemu_put_be32(f, 0);
    qemu_put_be16(f, 0);
    qemu_put_be16(f, 0);

1738
    return rc;
1739 1740 1741 1742
}

static int htab_save_complete(QEMUFile *f, void *opaque)
{
1743
    sPAPRMachineState *spapr = opaque;
1744
    int fd;
1745 1746 1747 1748

    /* Iteration header */
    qemu_put_be32(f, 0);

1749 1750 1751 1752 1753
    if (!spapr->htab) {
        int rc;

        assert(kvm_enabled());

1754 1755 1756
        fd = get_htab_fd(spapr);
        if (fd < 0) {
            return fd;
1757 1758
        }

1759
        rc = kvmppc_save_htab(f, fd, MAX_KVM_BUF_SIZE, -1);
1760 1761 1762 1763
        if (rc < 0) {
            return rc;
        }
    } else {
1764 1765 1766
        if (spapr->htab_first_pass) {
            htab_save_first_pass(f, spapr, -1);
        }
1767 1768
        htab_save_later_pass(f, spapr, -1);
    }
1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779

    /* End marker */
    qemu_put_be32(f, 0);
    qemu_put_be16(f, 0);
    qemu_put_be16(f, 0);

    return 0;
}

static int htab_load(QEMUFile *f, void *opaque, int version_id)
{
1780
    sPAPRMachineState *spapr = opaque;
1781
    uint32_t section_hdr;
1782
    int fd = -1;
1783 1784

    if (version_id < 1 || version_id > 1) {
1785
        error_report("htab_load() bad version");
1786 1787 1788 1789 1790 1791
        return -EINVAL;
    }

    section_hdr = qemu_get_be32(f);

    if (section_hdr) {
1792
        Error *local_err = NULL;
1793 1794 1795 1796 1797

        /* First section gives the htab size */
        spapr_reallocate_hpt(spapr, section_hdr, &local_err);
        if (local_err) {
            error_report_err(local_err);
1798 1799 1800 1801 1802
            return -EINVAL;
        }
        return 0;
    }

1803 1804 1805 1806 1807
    if (!spapr->htab) {
        assert(kvm_enabled());

        fd = kvmppc_get_htab_fd(true);
        if (fd < 0) {
1808 1809
            error_report("Unable to open fd to restore KVM hash table: %s",
                         strerror(errno));
1810 1811 1812
        }
    }

1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825
    while (true) {
        uint32_t index;
        uint16_t n_valid, n_invalid;

        index = qemu_get_be32(f);
        n_valid = qemu_get_be16(f);
        n_invalid = qemu_get_be16(f);

        if ((index == 0) && (n_valid == 0) && (n_invalid == 0)) {
            /* End of Stream */
            break;
        }

1826
        if ((index + n_valid + n_invalid) >
1827 1828
            (HTAB_SIZE(spapr) / HASH_PTE_SIZE_64)) {
            /* Bad index in stream */
1829 1830 1831
            error_report(
                "htab_load() bad index %d (%hd+%hd entries) in htab stream (htab_shift=%d)",
                index, n_valid, n_invalid, spapr->htab_shift);
1832 1833 1834
            return -EINVAL;
        }

1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852
        if (spapr->htab) {
            if (n_valid) {
                qemu_get_buffer(f, HPTE(spapr->htab, index),
                                HASH_PTE_SIZE_64 * n_valid);
            }
            if (n_invalid) {
                memset(HPTE(spapr->htab, index + n_valid), 0,
                       HASH_PTE_SIZE_64 * n_invalid);
            }
        } else {
            int rc;

            assert(fd >= 0);

            rc = kvmppc_load_htab_chunk(f, fd, index, n_valid, n_invalid);
            if (rc < 0) {
                return rc;
            }
1853 1854 1855
        }
    }

1856 1857 1858 1859 1860
    if (!spapr->htab) {
        assert(fd >= 0);
        close(fd);
    }

1861 1862 1863
    return 0;
}

1864 1865 1866 1867 1868 1869 1870
static void htab_cleanup(void *opaque)
{
    sPAPRMachineState *spapr = opaque;

    close_htab_fd(spapr);
}

1871 1872 1873
static SaveVMHandlers savevm_htab_handlers = {
    .save_live_setup = htab_save_setup,
    .save_live_iterate = htab_save_iterate,
1874
    .save_live_complete_precopy = htab_save_complete,
1875
    .cleanup = htab_cleanup,
1876 1877 1878
    .load_state = htab_load,
};

1879 1880 1881 1882 1883 1884 1885
static void spapr_boot_set(void *opaque, const char *boot_device,
                           Error **errp)
{
    MachineState *machine = MACHINE(qdev_get_machine());
    machine->boot_order = g_strdup(boot_device);
}

D
David Gibson 已提交
1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907
/*
 * Reset routine for LMB DR devices.
 *
 * Unlike PCI DR devices, LMB DR devices explicitly register this reset
 * routine. Reset for PCI DR devices will be handled by PHB reset routine
 * when it walks all its children devices. LMB devices reset occurs
 * as part of spapr_ppc_reset().
 */
static void spapr_drc_reset(void *opaque)
{
    sPAPRDRConnector *drc = opaque;
    DeviceState *d = DEVICE(drc);

    if (d) {
        device_reset(d);
    }
}

static void spapr_create_lmb_dr_connectors(sPAPRMachineState *spapr)
{
    MachineState *machine = MACHINE(spapr);
    uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE;
1908
    uint32_t nr_lmbs = (machine->maxram_size - machine->ram_size)/lmb_size;
D
David Gibson 已提交
1909 1910 1911 1912 1913 1914
    int i;

    for (i = 0; i < nr_lmbs; i++) {
        sPAPRDRConnector *drc;
        uint64_t addr;

1915
        addr = i * lmb_size + spapr->hotplug_memory.base;
D
David Gibson 已提交
1916
        drc = spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_LMB,
D
David Gibson 已提交
1917 1918 1919 1920 1921 1922 1923 1924 1925 1926
                                     addr/lmb_size);
        qemu_register_reset(spapr_drc_reset, drc);
    }
}

/*
 * If RAM size, maxmem size and individual node mem sizes aren't aligned
 * to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest
 * since we can't support such unaligned sizes with DRCONF_MEMORY.
 */
1927
static void spapr_validate_node_memory(MachineState *machine, Error **errp)
D
David Gibson 已提交
1928 1929 1930
{
    int i;

1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944
    if (machine->ram_size % SPAPR_MEMORY_BLOCK_SIZE) {
        error_setg(errp, "Memory size 0x" RAM_ADDR_FMT
                   " is not aligned to %llu MiB",
                   machine->ram_size,
                   SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
        return;
    }

    if (machine->maxram_size % SPAPR_MEMORY_BLOCK_SIZE) {
        error_setg(errp, "Maximum memory size 0x" RAM_ADDR_FMT
                   " is not aligned to %llu MiB",
                   machine->ram_size,
                   SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
        return;
D
David Gibson 已提交
1945 1946 1947 1948
    }

    for (i = 0; i < nb_numa_nodes; i++) {
        if (numa_info[i].node_mem % SPAPR_MEMORY_BLOCK_SIZE) {
1949 1950 1951 1952 1953 1954
            error_setg(errp,
                       "Node %d memory size 0x%" PRIx64
                       " is not aligned to %llu MiB",
                       i, numa_info[i].node_mem,
                       SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
            return;
D
David Gibson 已提交
1955 1956 1957 1958
        }
    }
}

1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972
/* find cpu slot in machine->possible_cpus by core_id */
static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *idx)
{
    int index = id / smp_threads;

    if (index >= ms->possible_cpus->len) {
        return NULL;
    }
    if (idx) {
        *idx = index;
    }
    return &ms->possible_cpus->cpus[index];
}

1973 1974 1975 1976 1977 1978
static void spapr_init_cpus(sPAPRMachineState *spapr)
{
    MachineState *machine = MACHINE(spapr);
    MachineClass *mc = MACHINE_GET_CLASS(machine);
    char *type = spapr_get_cpu_core_type(machine->cpu_model);
    int smt = kvmppc_smt_threads();
1979 1980
    const CPUArchIdList *possible_cpus;
    int boot_cores_nr = smp_cpus / smp_threads;
1981 1982 1983 1984 1985 1986 1987
    int i;

    if (!type) {
        error_report("Unable to find sPAPR CPU Core definition");
        exit(1);
    }

1988
    possible_cpus = mc->possible_cpu_arch_ids(machine);
1989
    if (mc->has_hotpluggable_cpus) {
1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004
        if (smp_cpus % smp_threads) {
            error_report("smp_cpus (%u) must be multiple of threads (%u)",
                         smp_cpus, smp_threads);
            exit(1);
        }
        if (max_cpus % smp_threads) {
            error_report("max_cpus (%u) must be multiple of threads (%u)",
                         max_cpus, smp_threads);
            exit(1);
        }
    } else {
        if (max_cpus != smp_cpus) {
            error_report("This machine version does not support CPU hotplug");
            exit(1);
        }
2005
        boot_cores_nr = possible_cpus->len;
2006 2007
    }

2008
    for (i = 0; i < possible_cpus->len; i++) {
2009 2010
        int core_id = i * smp_threads;

2011
        if (mc->has_hotpluggable_cpus) {
2012
            sPAPRDRConnector *drc =
D
David Gibson 已提交
2013
                spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_CPU,
2014 2015 2016 2017 2018
                                       (core_id / smp_threads) * smt);

            qemu_register_reset(spapr_drc_reset, drc);
        }

2019
        if (i < boot_cores_nr) {
2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037
            Object *core  = object_new(type);
            int nr_threads = smp_threads;

            /* Handle the partially filled core for older machine types */
            if ((i + 1) * smp_threads >= smp_cpus) {
                nr_threads = smp_cpus - i * smp_threads;
            }

            object_property_set_int(core, nr_threads, "nr-threads",
                                    &error_fatal);
            object_property_set_int(core, core_id, CPU_CORE_PROP_CORE_ID,
                                    &error_fatal);
            object_property_set_bool(core, true, "realized", &error_fatal);
        }
    }
    g_free(type);
}

2038
/* pSeries LPAR / sPAPR hardware init */
2039
static void ppc_spapr_init(MachineState *machine)
2040
{
2041
    sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
D
David Gibson 已提交
2042
    sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
2043 2044
    const char *kernel_filename = machine->kernel_filename;
    const char *initrd_filename = machine->initrd_filename;
2045
    PCIHostState *phb;
2046
    int i;
A
Avi Kivity 已提交
2047 2048
    MemoryRegion *sysmem = get_system_memory();
    MemoryRegion *ram = g_new(MemoryRegion, 1);
2049 2050
    MemoryRegion *rma_region;
    void *rma = NULL;
A
Avi Kivity 已提交
2051
    hwaddr rma_alloc_size;
2052
    hwaddr node0_size = spapr_node0_size();
2053
    long load_limit, fw_size;
2054
    char *filename;
2055

2056
    msi_nonbroken = true;
2057

2058
    QLIST_INIT(&spapr->phbs);
2059
    QTAILQ_INIT(&spapr->pending_dimm_unplugs);
2060

2061
    /* Allocate RMA if necessary */
2062
    rma_alloc_size = kvmppc_alloc_rma(&rma);
2063 2064

    if (rma_alloc_size == -1) {
2065
        error_report("Unable to create RMA");
2066 2067
        exit(1);
    }
2068

2069
    if (rma_alloc_size && (rma_alloc_size < node0_size)) {
2070
        spapr->rma_size = rma_alloc_size;
2071
    } else {
2072
        spapr->rma_size = node0_size;
2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086

        /* With KVM, we don't actually know whether KVM supports an
         * unbounded RMA (PR KVM) or is limited by the hash table size
         * (HV KVM using VRMA), so we always assume the latter
         *
         * In that case, we also limit the initial allocations for RTAS
         * etc... to 256M since we have no way to know what the VRMA size
         * is going to be as it depends on the size of the hash table
         * isn't determined yet.
         */
        if (kvm_enabled()) {
            spapr->vrma_adjust = 1;
            spapr->rma_size = MIN(spapr->rma_size, 0x10000000);
        }
2087 2088 2089 2090 2091 2092 2093

        /* Actually we don't support unbounded RMA anymore since we
         * added proper emulation of HV mode. The max we can get is
         * 16G which also happens to be what we configure for PAPR
         * mode so make sure we don't do anything bigger than that
         */
        spapr->rma_size = MIN(spapr->rma_size, 0x400000000ull);
2094 2095
    }

2096
    if (spapr->rma_size > node0_size) {
2097 2098
        error_report("Numa node 0 has to span the RMA (%#08"HWADDR_PRIx")",
                     spapr->rma_size);
2099 2100 2101
        exit(1);
    }

2102 2103
    /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
    load_limit = MIN(spapr->rma_size, RTAS_MAX_ADDR) - FW_OVERHEAD;
2104

2105
    /* Set up Interrupt Controller before we create the VCPUs */
2106
    xics_system_init(machine, XICS_IRQS_SPAPR, &error_fatal);
2107

2108 2109 2110 2111
    /* Set up containers for ibm,client-set-architecture negotiated options */
    spapr->ov5 = spapr_ovec_new();
    spapr->ov5_cas = spapr_ovec_new();

D
David Gibson 已提交
2112
    if (smc->dr_lmb_enabled) {
2113
        spapr_ovec_set(spapr->ov5, OV5_DRCONF_MEMORY);
2114
        spapr_validate_node_memory(machine, &error_fatal);
D
David Gibson 已提交
2115 2116
    }

2117
    spapr_ovec_set(spapr->ov5, OV5_FORM1_AFFINITY);
2118 2119
    if (!kvm_enabled() || kvmppc_has_cap_mmu_radix()) {
        /* KVM and TCG always allow GTSE with radix... */
2120 2121 2122
        spapr_ovec_set(spapr->ov5, OV5_MMU_RADIX_GTSE);
    }
    /* ... but not with hash (currently). */
2123

2124 2125 2126 2127 2128
    /* advertise support for dedicated HP event source to guests */
    if (spapr->use_hotplug_event_source) {
        spapr_ovec_set(spapr->ov5, OV5_HP_EVT);
    }

2129
    /* init CPUs */
2130
    if (machine->cpu_model == NULL) {
2131
        machine->cpu_model = kvm_enabled() ? "host" : smc->tcg_default_cpu;
2132
    }
2133

2134
    spapr_cpu_parse_features(spapr);
G
Greg Kurz 已提交
2135

2136
    spapr_init_cpus(spapr);
2137

2138 2139 2140
    if (kvm_enabled()) {
        /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
        kvmppc_enable_logical_ci_hcalls();
2141
        kvmppc_enable_set_mode_hcall();
2142 2143 2144

        /* H_CLEAR_MOD/_REF are mandatory in PAPR, but off by default */
        kvmppc_enable_clear_ref_mod_hcalls();
2145 2146
    }

2147
    /* allocate RAM */
2148
    memory_region_allocate_system_memory(ram, NULL, "ppc_spapr.ram",
2149
                                         machine->ram_size);
2150
    memory_region_add_subregion(sysmem, 0, ram);
2151

2152 2153 2154 2155 2156 2157 2158 2159
    if (rma_alloc_size && rma) {
        rma_region = g_new(MemoryRegion, 1);
        memory_region_init_ram_ptr(rma_region, NULL, "ppc_spapr.rma",
                                   rma_alloc_size, rma);
        vmstate_register_ram_global(rma_region);
        memory_region_add_subregion(sysmem, 0, rma_region);
    }

2160 2161 2162
    /* initialize hotplug memory address space */
    if (machine->ram_size < machine->maxram_size) {
        ram_addr_t hotplug_mem_size = machine->maxram_size - machine->ram_size;
2163 2164 2165 2166 2167 2168 2169
        /*
         * Limit the number of hotpluggable memory slots to half the number
         * slots that KVM supports, leaving the other half for PCI and other
         * devices. However ensure that number of slots doesn't drop below 32.
         */
        int max_memslots = kvm_enabled() ? kvm_get_max_memslots() / 2 :
                           SPAPR_MAX_RAM_SLOTS;
2170

2171 2172 2173 2174
        if (max_memslots < SPAPR_MAX_RAM_SLOTS) {
            max_memslots = SPAPR_MAX_RAM_SLOTS;
        }
        if (machine->ram_slots > max_memslots) {
2175 2176
            error_report("Specified number of memory slots %"
                         PRIu64" exceeds max supported %d",
2177
                         machine->ram_slots, max_memslots);
2178
            exit(1);
2179 2180 2181 2182 2183 2184 2185 2186 2187 2188
        }

        spapr->hotplug_memory.base = ROUND_UP(machine->ram_size,
                                              SPAPR_HOTPLUG_MEM_ALIGN);
        memory_region_init(&spapr->hotplug_memory.mr, OBJECT(spapr),
                           "hotplug-memory", hotplug_mem_size);
        memory_region_add_subregion(sysmem, spapr->hotplug_memory.base,
                                    &spapr->hotplug_memory.mr);
    }

D
David Gibson 已提交
2189 2190 2191 2192
    if (smc->dr_lmb_enabled) {
        spapr_create_lmb_dr_connectors(spapr);
    }

2193
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
2194
    if (!filename) {
2195
        error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
2196 2197
        exit(1);
    }
2198
    spapr->rtas_size = get_image_size(filename);
2199 2200 2201 2202
    if (spapr->rtas_size < 0) {
        error_report("Could not get size of LPAR rtas '%s'", filename);
        exit(1);
    }
2203 2204
    spapr->rtas_blob = g_malloc(spapr->rtas_size);
    if (load_image_size(filename, spapr->rtas_blob, spapr->rtas_size) < 0) {
2205
        error_report("Could not load LPAR rtas '%s'", filename);
2206 2207
        exit(1);
    }
2208
    if (spapr->rtas_size > RTAS_MAX_SIZE) {
2209 2210
        error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
                     (size_t)spapr->rtas_size, RTAS_MAX_SIZE);
2211 2212
        exit(1);
    }
2213
    g_free(filename);
2214

2215
    /* Set up RTAS event infrastructure */
2216 2217
    spapr_events_init(spapr);

2218
    /* Set up the RTC RTAS interfaces */
2219
    spapr_rtc_create(spapr);
2220

2221
    /* Set up VIO bus */
2222 2223
    spapr->vio_bus = spapr_vio_bus_init();

P
Paolo Bonzini 已提交
2224
    for (i = 0; i < MAX_SERIAL_PORTS; i++) {
2225
        if (serial_hds[i]) {
2226
            spapr_vty_create(spapr->vio_bus, serial_hds[i]);
2227 2228
        }
    }
2229

D
David Gibson 已提交
2230 2231 2232
    /* We always have at least the nvram device on VIO */
    spapr_create_nvram(spapr);

2233
    /* Set up PCI */
2234 2235
    spapr_pci_rtas_init();

2236
    phb = spapr_create_phb(spapr, 0);
2237

P
Paolo Bonzini 已提交
2238
    for (i = 0; i < nb_nics; i++) {
2239 2240 2241
        NICInfo *nd = &nd_table[i];

        if (!nd->model) {
2242
            nd->model = g_strdup("ibmveth");
2243 2244 2245
        }

        if (strcmp(nd->model, "ibmveth") == 0) {
2246
            spapr_vlan_create(spapr->vio_bus, nd);
2247
        } else {
2248
            pci_nic_init_nofail(&nd_table[i], phb->bus, nd->model, NULL);
2249 2250 2251
        }
    }

2252
    for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
2253
        spapr_vscsi_create(spapr->vio_bus);
2254 2255
    }

2256
    /* Graphics */
2257
    if (spapr_vga_init(phb->bus, &error_fatal)) {
2258
        spapr->has_graphics = true;
2259
        machine->usb |= defaults_enabled() && !machine->usb_disabled;
2260 2261
    }

2262
    if (machine->usb) {
2263 2264 2265 2266 2267
        if (smc->use_ohci_by_default) {
            pci_create_simple(phb->bus, -1, "pci-ohci");
        } else {
            pci_create_simple(phb->bus, -1, "nec-usb-xhci");
        }
2268

2269
        if (spapr->has_graphics) {
2270 2271 2272 2273
            USBBus *usb_bus = usb_bus_find(-1);

            usb_create_simple(usb_bus, "usb-kbd");
            usb_create_simple(usb_bus, "usb-mouse");
2274 2275 2276
        }
    }

2277
    if (spapr->rma_size < (MIN_RMA_SLOF << 20)) {
2278 2279 2280
        error_report(
            "pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)",
            MIN_RMA_SLOF);
2281 2282 2283
        exit(1);
    }

2284 2285 2286
    if (kernel_filename) {
        uint64_t lowaddr = 0;

2287 2288 2289 2290 2291 2292 2293 2294 2295
        spapr->kernel_size = load_elf(kernel_filename, translate_kernel_address,
                                      NULL, NULL, &lowaddr, NULL, 1,
                                      PPC_ELF_MACHINE, 0, 0);
        if (spapr->kernel_size == ELF_LOAD_WRONG_ENDIAN) {
            spapr->kernel_size = load_elf(kernel_filename,
                                          translate_kernel_address, NULL, NULL,
                                          &lowaddr, NULL, 0, PPC_ELF_MACHINE,
                                          0, 0);
            spapr->kernel_le = spapr->kernel_size > 0;
2296
        }
2297 2298 2299
        if (spapr->kernel_size < 0) {
            error_report("error loading %s: %s", kernel_filename,
                         load_elf_strerror(spapr->kernel_size));
2300 2301 2302 2303 2304
            exit(1);
        }

        /* load initrd */
        if (initrd_filename) {
2305 2306 2307
            /* Try to locate the initrd in the gap between the kernel
             * and the firmware. Add a bit of space just in case
             */
2308 2309 2310 2311 2312 2313 2314
            spapr->initrd_base = (KERNEL_LOAD_ADDR + spapr->kernel_size
                                  + 0x1ffff) & ~0xffff;
            spapr->initrd_size = load_image_targphys(initrd_filename,
                                                     spapr->initrd_base,
                                                     load_limit
                                                     - spapr->initrd_base);
            if (spapr->initrd_size < 0) {
2315 2316
                error_report("could not load initial ram disk '%s'",
                             initrd_filename);
2317 2318 2319
                exit(1);
            }
        }
2320
    }
2321

2322 2323 2324 2325
    if (bios_name == NULL) {
        bios_name = FW_FILE_NAME;
    }
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
2326
    if (!filename) {
2327
        error_report("Could not find LPAR firmware '%s'", bios_name);
2328 2329
        exit(1);
    }
2330
    fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
2331 2332
    if (fw_size <= 0) {
        error_report("Could not load LPAR firmware '%s'", filename);
2333 2334 2335 2336
        exit(1);
    }
    g_free(filename);

2337 2338 2339
    /* FIXME: Should register things through the MachineState's qdev
     * interface, this is a legacy from the sPAPREnvironment structure
     * which predated MachineState but had a similar function */
2340 2341 2342 2343
    vmstate_register(NULL, 0, &vmstate_spapr, spapr);
    register_savevm_live(NULL, "spapr/htab", -1, 1,
                         &savevm_htab_handlers, spapr);

2344
    qemu_register_boot_set(spapr_boot_set, spapr);
2345 2346

    if (kvm_enabled()) {
2347
        /* to stop and start vmclock */
2348 2349
        qemu_add_vm_change_state_handler(cpu_ppc_clock_vm_state_change,
                                         &spapr->tb);
2350 2351

        kvmppc_spapr_enable_inkernel_multitce();
2352
    }
2353 2354
}

2355 2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372
static int spapr_kvm_type(const char *vm_type)
{
    if (!vm_type) {
        return 0;
    }

    if (!strcmp(vm_type, "HV")) {
        return 1;
    }

    if (!strcmp(vm_type, "PR")) {
        return 2;
    }

    error_report("Unknown kvm-type specified '%s'", vm_type);
    exit(1);
}

2373
/*
2374
 * Implementation of an interface to adjust firmware path
2375 2376 2377 2378 2379 2380 2381 2382 2383
 * for the bootindex property handling.
 */
static char *spapr_get_fw_dev_path(FWPathProvider *p, BusState *bus,
                                   DeviceState *dev)
{
#define CAST(type, obj, name) \
    ((type *)object_dynamic_cast(OBJECT(obj), (name)))
    SCSIDevice *d = CAST(SCSIDevice,  dev, TYPE_SCSI_DEVICE);
    sPAPRPHBState *phb = CAST(sPAPRPHBState, dev, TYPE_SPAPR_PCI_HOST_BRIDGE);
2384
    VHostSCSICommon *vsc = CAST(VHostSCSICommon, dev, TYPE_VHOST_SCSI_COMMON);
2385 2386 2387 2388 2389 2390 2391 2392 2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420 2421 2422

    if (d) {
        void *spapr = CAST(void, bus->parent, "spapr-vscsi");
        VirtIOSCSI *virtio = CAST(VirtIOSCSI, bus->parent, TYPE_VIRTIO_SCSI);
        USBDevice *usb = CAST(USBDevice, bus->parent, TYPE_USB_DEVICE);

        if (spapr) {
            /*
             * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
             * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
             * in the top 16 bits of the 64-bit LUN
             */
            unsigned id = 0x8000 | (d->id << 8) | d->lun;
            return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
                                   (uint64_t)id << 48);
        } else if (virtio) {
            /*
             * We use SRP luns of the form 01000000 | (target << 8) | lun
             * in the top 32 bits of the 64-bit LUN
             * Note: the quote above is from SLOF and it is wrong,
             * the actual binding is:
             * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
             */
            unsigned id = 0x1000000 | (d->id << 16) | d->lun;
            return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
                                   (uint64_t)id << 32);
        } else if (usb) {
            /*
             * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
             * in the top 32 bits of the 64-bit LUN
             */
            unsigned usb_port = atoi(usb->port->path);
            unsigned id = 0x1000000 | (usb_port << 16) | d->lun;
            return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
                                   (uint64_t)id << 32);
        }
    }

2423 2424 2425 2426 2427 2428 2429 2430 2431 2432 2433 2434 2435
    /*
     * SLOF probes the USB devices, and if it recognizes that the device is a
     * storage device, it changes its name to "storage" instead of "usb-host",
     * and additionally adds a child node for the SCSI LUN, so the correct
     * boot path in SLOF is something like .../storage@1/disk@xxx" instead.
     */
    if (strcmp("usb-host", qdev_fw_name(dev)) == 0) {
        USBDevice *usbdev = CAST(USBDevice, dev, TYPE_USB_DEVICE);
        if (usb_host_dev_is_scsi_storage(usbdev)) {
            return g_strdup_printf("storage@%s/disk", usbdev->port->path);
        }
    }

2436 2437 2438 2439 2440
    if (phb) {
        /* Replace "pci" with "pci@800000020000000" */
        return g_strdup_printf("pci@%"PRIX64, phb->buid);
    }

2441 2442 2443 2444 2445 2446
    if (vsc) {
        /* Same logic as virtio above */
        unsigned id = 0x1000000 | (vsc->target << 16) | vsc->lun;
        return g_strdup_printf("disk@%"PRIX64, (uint64_t)id << 32);
    }

2447 2448 2449 2450 2451 2452
    if (g_str_equal("pci-bridge", qdev_fw_name(dev))) {
        /* SLOF uses "pci" instead of "pci-bridge" for PCI bridges */
        PCIDevice *pcidev = CAST(PCIDevice, dev, TYPE_PCI_DEVICE);
        return g_strdup_printf("pci@%x", PCI_SLOT(pcidev->devfn));
    }

2453 2454 2455
    return NULL;
}

E
Eduardo Habkost 已提交
2456 2457
static char *spapr_get_kvm_type(Object *obj, Error **errp)
{
2458
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
E
Eduardo Habkost 已提交
2459

2460
    return g_strdup(spapr->kvm_type);
E
Eduardo Habkost 已提交
2461 2462 2463 2464
}

static void spapr_set_kvm_type(Object *obj, const char *value, Error **errp)
{
2465
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
E
Eduardo Habkost 已提交
2466

2467 2468
    g_free(spapr->kvm_type);
    spapr->kvm_type = g_strdup(value);
E
Eduardo Habkost 已提交
2469 2470
}

2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485
static bool spapr_get_modern_hotplug_events(Object *obj, Error **errp)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);

    return spapr->use_hotplug_event_source;
}

static void spapr_set_modern_hotplug_events(Object *obj, bool value,
                                            Error **errp)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);

    spapr->use_hotplug_event_source = value;
}

E
Eduardo Habkost 已提交
2486 2487
static void spapr_machine_initfn(Object *obj)
{
2488 2489 2490
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);

    spapr->htab_fd = -1;
2491
    spapr->use_hotplug_event_source = true;
E
Eduardo Habkost 已提交
2492 2493
    object_property_add_str(obj, "kvm-type",
                            spapr_get_kvm_type, spapr_set_kvm_type, NULL);
2494 2495 2496
    object_property_set_description(obj, "kvm-type",
                                    "Specifies the KVM virtualization mode (HV, PR)",
                                    NULL);
2497 2498 2499 2500 2501 2502 2503 2504 2505
    object_property_add_bool(obj, "modern-hotplug-events",
                            spapr_get_modern_hotplug_events,
                            spapr_set_modern_hotplug_events,
                            NULL);
    object_property_set_description(obj, "modern-hotplug-events",
                                    "Use dedicated hotplug event mechanism in"
                                    " place of standard EPOW events when possible"
                                    " (required for memory hot-unplug support)",
                                    NULL);
2506 2507 2508 2509

    ppc_compat_add_property(obj, "max-cpu-compat", &spapr->max_compat_pvr,
                            "Maximum permitted CPU compatibility mode",
                            &error_fatal);
E
Eduardo Habkost 已提交
2510 2511
}

2512 2513 2514 2515 2516 2517 2518
static void spapr_machine_finalizefn(Object *obj)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);

    g_free(spapr->kvm_type);
}

2519
void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg)
2520 2521 2522 2523 2524 2525 2526 2527 2528 2529
{
    cpu_synchronize_state(cs);
    ppc_cpu_do_system_reset(cs);
}

static void spapr_nmi(NMIState *n, int cpu_index, Error **errp)
{
    CPUState *cs;

    CPU_FOREACH(cs) {
2530
        async_run_on_cpu(cs, spapr_do_system_reset_on_cpu, RUN_ON_CPU_NULL);
2531 2532 2533
    }
}

2534 2535 2536
static void spapr_add_lmbs(DeviceState *dev, uint64_t addr_start, uint64_t size,
                           uint32_t node, bool dedicated_hp_event_source,
                           Error **errp)
B
Bharata B Rao 已提交
2537 2538 2539 2540 2541
{
    sPAPRDRConnector *drc;
    uint32_t nr_lmbs = size/SPAPR_MEMORY_BLOCK_SIZE;
    int i, fdt_offset, fdt_size;
    void *fdt;
2542
    uint64_t addr = addr_start;
B
Bharata B Rao 已提交
2543 2544

    for (i = 0; i < nr_lmbs; i++) {
2545 2546
        drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB,
                              addr / SPAPR_MEMORY_BLOCK_SIZE);
B
Bharata B Rao 已提交
2547 2548 2549 2550 2551 2552
        g_assert(drc);

        fdt = create_device_tree(&fdt_size);
        fdt_offset = spapr_populate_memory_node(fdt, node, addr,
                                                SPAPR_MEMORY_BLOCK_SIZE);

2553
        spapr_drc_attach(drc, dev, fdt, fdt_offset, !dev->hotplugged, errp);
B
Bharata B Rao 已提交
2554
        addr += SPAPR_MEMORY_BLOCK_SIZE;
2555
        if (!dev->hotplugged) {
2556
            sPAPRDRConnectorClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
2557 2558 2559 2560
            /* guests expect coldplugged LMBs to be pre-allocated */
            drck->set_allocation_state(drc, SPAPR_DR_ALLOCATION_STATE_USABLE);
            drck->set_isolation_state(drc, SPAPR_DR_ISOLATION_STATE_UNISOLATED);
        }
B
Bharata B Rao 已提交
2561
    }
2562 2563 2564 2565
    /* send hotplug notification to the
     * guest only in case of hotplugged memory
     */
    if (dev->hotplugged) {
2566
        if (dedicated_hp_event_source) {
2567 2568
            drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB,
                                  addr_start / SPAPR_MEMORY_BLOCK_SIZE);
2569 2570
            spapr_hotplug_req_add_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB,
                                                   nr_lmbs,
2571
                                                   spapr_drc_index(drc));
2572 2573 2574 2575
        } else {
            spapr_hotplug_req_add_by_count(SPAPR_DR_CONNECTOR_TYPE_LMB,
                                           nr_lmbs);
        }
2576
    }
B
Bharata B Rao 已提交
2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589
}

static void spapr_memory_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
                              uint32_t node, Error **errp)
{
    Error *local_err = NULL;
    sPAPRMachineState *ms = SPAPR_MACHINE(hotplug_dev);
    PCDIMMDevice *dimm = PC_DIMM(dev);
    PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
    MemoryRegion *mr = ddc->get_memory_region(dimm);
    uint64_t align = memory_region_get_alignment(mr);
    uint64_t size = memory_region_size(mr);
    uint64_t addr;
2590

2591
    pc_dimm_memory_plug(dev, &ms->hotplug_memory, mr, align, &local_err);
B
Bharata B Rao 已提交
2592 2593 2594 2595
    if (local_err) {
        goto out;
    }

2596 2597
    addr = object_property_get_uint(OBJECT(dimm),
                                    PC_DIMM_ADDR_PROP, &local_err);
B
Bharata B Rao 已提交
2598 2599 2600 2601 2602
    if (local_err) {
        pc_dimm_memory_unplug(dev, &ms->hotplug_memory, mr);
        goto out;
    }

2603 2604 2605
    spapr_add_lmbs(dev, addr, size, node,
                   spapr_ovec_test(ms->ov5_cas, OV5_HP_EVT),
                   &error_abort);
B
Bharata B Rao 已提交
2606 2607 2608 2609 2610

out:
    error_propagate(errp, local_err);
}

2611 2612 2613 2614 2615 2616 2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627 2628 2629
static void spapr_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
                                  Error **errp)
{
    PCDIMMDevice *dimm = PC_DIMM(dev);
    PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
    MemoryRegion *mr = ddc->get_memory_region(dimm);
    uint64_t size = memory_region_size(mr);
    char *mem_dev;

    if (size % SPAPR_MEMORY_BLOCK_SIZE) {
        error_setg(errp, "Hotplugged memory size must be a multiple of "
                      "%lld MB", SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
        return;
    }

    mem_dev = object_property_get_str(OBJECT(dimm), PC_DIMM_MEMDEV_PROP, NULL);
    if (mem_dev && !kvmppc_is_mem_backend_page_size_ok(mem_dev)) {
        error_setg(errp, "Memory backend has bad page size. "
                   "Use 'memory-backend-file' with correct mem-path.");
2630
        goto out;
2631
    }
2632 2633 2634

out:
    g_free(mem_dev);
2635 2636
}

2637 2638
struct sPAPRDIMMState {
    PCDIMMDevice *dimm;
B
Bharata B Rao 已提交
2639
    uint32_t nr_lmbs;
2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655 2656 2657 2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668
    QTAILQ_ENTRY(sPAPRDIMMState) next;
};

static sPAPRDIMMState *spapr_pending_dimm_unplugs_find(sPAPRMachineState *s,
                                                       PCDIMMDevice *dimm)
{
    sPAPRDIMMState *dimm_state = NULL;

    QTAILQ_FOREACH(dimm_state, &s->pending_dimm_unplugs, next) {
        if (dimm_state->dimm == dimm) {
            break;
        }
    }
    return dimm_state;
}

static void spapr_pending_dimm_unplugs_add(sPAPRMachineState *spapr,
                                           sPAPRDIMMState *dimm_state)
{
    g_assert(!spapr_pending_dimm_unplugs_find(spapr, dimm_state->dimm));
    QTAILQ_INSERT_HEAD(&spapr->pending_dimm_unplugs, dimm_state, next);
}

static void spapr_pending_dimm_unplugs_remove(sPAPRMachineState *spapr,
                                              sPAPRDIMMState *dimm_state)
{
    QTAILQ_REMOVE(&spapr->pending_dimm_unplugs, dimm_state, next);
    g_free(dimm_state);
}
B
Bharata B Rao 已提交
2669

2670 2671 2672 2673 2674 2675 2676 2677 2678 2679 2680 2681 2682 2683 2684 2685 2686 2687
static sPAPRDIMMState *spapr_recover_pending_dimm_state(sPAPRMachineState *ms,
                                                        PCDIMMDevice *dimm)
{
    sPAPRDRConnector *drc;
    PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
    MemoryRegion *mr = ddc->get_memory_region(dimm);
    uint64_t size = memory_region_size(mr);
    uint32_t nr_lmbs = size / SPAPR_MEMORY_BLOCK_SIZE;
    uint32_t avail_lmbs = 0;
    uint64_t addr_start, addr;
    int i;
    sPAPRDIMMState *ds;

    addr_start = object_property_get_int(OBJECT(dimm), PC_DIMM_ADDR_PROP,
                                         &error_abort);

    addr = addr_start;
    for (i = 0; i < nr_lmbs; i++) {
2688 2689
        drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB,
                              addr / SPAPR_MEMORY_BLOCK_SIZE);
2690
        g_assert(drc);
2691
        if (drc->dev) {
2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703
            avail_lmbs++;
        }
        addr += SPAPR_MEMORY_BLOCK_SIZE;
    }

    ds = g_malloc0(sizeof(sPAPRDIMMState));
    ds->nr_lmbs = avail_lmbs;
    ds->dimm = dimm;
    spapr_pending_dimm_unplugs_add(ms, ds);
    return ds;
}

2704 2705
/* Callback to be called during DRC release. */
void spapr_lmb_release(DeviceState *dev)
B
Bharata B Rao 已提交
2706
{
2707 2708 2709
    HotplugHandler *hotplug_ctrl = qdev_get_hotplug_handler(dev);
    sPAPRMachineState *spapr = SPAPR_MACHINE(hotplug_ctrl);
    sPAPRDIMMState *ds = spapr_pending_dimm_unplugs_find(spapr, PC_DIMM(dev));
B
Bharata B Rao 已提交
2710

2711 2712 2713 2714
    /* This information will get lost if a migration occurs
     * during the unplug process. In this case recover it. */
    if (ds == NULL) {
        ds = spapr_recover_pending_dimm_state(spapr, PC_DIMM(dev));
2715 2716 2717 2718 2719
        /* The DRC being examined by the caller at least must be counted */
        g_assert(ds->nr_lmbs);
    }

    if (--ds->nr_lmbs) {
B
Bharata B Rao 已提交
2720 2721 2722
        return;
    }

2723
    spapr_pending_dimm_unplugs_remove(spapr, ds);
B
Bharata B Rao 已提交
2724 2725 2726 2727 2728 2729 2730 2731 2732 2733 2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746

    /*
     * Now that all the LMBs have been removed by the guest, call the
     * pc-dimm unplug handler to cleanup up the pc-dimm device.
     */
    hotplug_handler_unplug(hotplug_ctrl, dev, &error_abort);
}

static void spapr_memory_unplug(HotplugHandler *hotplug_dev, DeviceState *dev,
                                Error **errp)
{
    sPAPRMachineState *ms = SPAPR_MACHINE(hotplug_dev);
    PCDIMMDevice *dimm = PC_DIMM(dev);
    PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
    MemoryRegion *mr = ddc->get_memory_region(dimm);

    pc_dimm_memory_unplug(dev, &ms->hotplug_memory, mr);
    object_unparent(OBJECT(dev));
}

static void spapr_memory_unplug_request(HotplugHandler *hotplug_dev,
                                        DeviceState *dev, Error **errp)
{
2747
    sPAPRMachineState *spapr = SPAPR_MACHINE(hotplug_dev);
B
Bharata B Rao 已提交
2748 2749 2750 2751 2752
    Error *local_err = NULL;
    PCDIMMDevice *dimm = PC_DIMM(dev);
    PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
    MemoryRegion *mr = ddc->get_memory_region(dimm);
    uint64_t size = memory_region_size(mr);
2753 2754 2755 2756 2757
    uint32_t nr_lmbs = size / SPAPR_MEMORY_BLOCK_SIZE;
    uint64_t addr_start, addr;
    int i;
    sPAPRDRConnector *drc;
    sPAPRDIMMState *ds;
B
Bharata B Rao 已提交
2758

2759
    addr_start = object_property_get_uint(OBJECT(dimm), PC_DIMM_ADDR_PROP,
2760
                                         &local_err);
B
Bharata B Rao 已提交
2761 2762 2763 2764
    if (local_err) {
        goto out;
    }

2765 2766 2767 2768 2769 2770 2771
    ds = g_malloc0(sizeof(sPAPRDIMMState));
    ds->nr_lmbs = nr_lmbs;
    ds->dimm = dimm;
    spapr_pending_dimm_unplugs_add(spapr, ds);

    addr = addr_start;
    for (i = 0; i < nr_lmbs; i++) {
2772 2773
        drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB,
                              addr / SPAPR_MEMORY_BLOCK_SIZE);
2774 2775
        g_assert(drc);

2776
        spapr_drc_detach(drc, dev, errp);
2777 2778 2779
        addr += SPAPR_MEMORY_BLOCK_SIZE;
    }

2780 2781
    drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB,
                          addr_start / SPAPR_MEMORY_BLOCK_SIZE);
2782
    spapr_hotplug_req_remove_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB,
2783
                                              nr_lmbs, spapr_drc_index(drc));
B
Bharata B Rao 已提交
2784 2785 2786 2787
out:
    error_propagate(errp, local_err);
}

B
Bharata B Rao 已提交
2788 2789 2790 2791 2792 2793 2794 2795 2796 2797 2798 2799 2800 2801 2802 2803 2804 2805 2806 2807 2808
void *spapr_populate_hotplug_cpu_dt(CPUState *cs, int *fdt_offset,
                                    sPAPRMachineState *spapr)
{
    PowerPCCPU *cpu = POWERPC_CPU(cs);
    DeviceClass *dc = DEVICE_GET_CLASS(cs);
    int id = ppc_get_vcpu_dt_id(cpu);
    void *fdt;
    int offset, fdt_size;
    char *nodename;

    fdt = create_device_tree(&fdt_size);
    nodename = g_strdup_printf("%s@%x", dc->fw_name, id);
    offset = fdt_add_subnode(fdt, 0, nodename);

    spapr_populate_cpu_dt(cs, fdt, offset, spapr);
    g_free(nodename);

    *fdt_offset = offset;
    return fdt;
}

2809 2810
static void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *dev,
                              Error **errp)
2811
{
2812
    MachineState *ms = MACHINE(qdev_get_machine());
2813
    CPUCore *cc = CPU_CORE(dev);
2814
    CPUArchId *core_slot = spapr_find_cpu_slot(ms, cc->core_id, NULL);
2815

2816
    assert(core_slot);
2817
    core_slot->cpu = NULL;
2818 2819 2820
    object_unparent(OBJECT(dev));
}

2821 2822
/* Callback to be called during DRC release. */
void spapr_core_release(DeviceState *dev)
2823 2824 2825 2826 2827 2828 2829 2830 2831 2832
{
    HotplugHandler *hotplug_ctrl;

    hotplug_ctrl = qdev_get_hotplug_handler(dev);
    hotplug_handler_unplug(hotplug_ctrl, dev, &error_abort);
}

static
void spapr_core_unplug_request(HotplugHandler *hotplug_dev, DeviceState *dev,
                               Error **errp)
2833
{
2834 2835
    int index;
    sPAPRDRConnector *drc;
2836
    Error *local_err = NULL;
2837 2838
    CPUCore *cc = CPU_CORE(dev);
    int smt = kvmppc_smt_threads();
2839

2840 2841 2842 2843 2844
    if (!spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index)) {
        error_setg(errp, "Unable to find CPU core with core-id: %d",
                   cc->core_id);
        return;
    }
2845 2846 2847 2848 2849
    if (index == 0) {
        error_setg(errp, "Boot CPU core may not be unplugged");
        return;
    }

2850
    drc = spapr_drc_by_id(TYPE_SPAPR_DRC_CPU, index * smt);
2851 2852
    g_assert(drc);

2853
    spapr_drc_detach(drc, dev, &local_err);
2854 2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872 2873 2874
    if (local_err) {
        error_propagate(errp, local_err);
        return;
    }

    spapr_hotplug_req_remove_by_index(drc);
}

static void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
                            Error **errp)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
    MachineClass *mc = MACHINE_GET_CLASS(spapr);
    sPAPRCPUCore *core = SPAPR_CPU_CORE(OBJECT(dev));
    CPUCore *cc = CPU_CORE(dev);
    CPUState *cs = CPU(core->threads);
    sPAPRDRConnector *drc;
    Error *local_err = NULL;
    void *fdt = NULL;
    int fdt_offset = 0;
    int smt = kvmppc_smt_threads();
2875 2876
    CPUArchId *core_slot;
    int index;
2877

2878 2879 2880 2881 2882 2883
    core_slot = spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index);
    if (!core_slot) {
        error_setg(errp, "Unable to find CPU core with core-id: %d",
                   cc->core_id);
        return;
    }
2884
    drc = spapr_drc_by_id(TYPE_SPAPR_DRC_CPU, index * smt);
2885

2886
    g_assert(drc || !mc->has_hotpluggable_cpus);
2887 2888 2889 2890 2891 2892 2893 2894 2895 2896

    /*
     * Setup CPU DT entries only for hotplugged CPUs. For boot time or
     * coldplugged CPUs DT entries are setup in spapr_build_fdt().
     */
    if (dev->hotplugged) {
        fdt = spapr_populate_hotplug_cpu_dt(cs, &fdt_offset, spapr);
    }

    if (drc) {
2897 2898
        spapr_drc_attach(drc, dev, fdt, fdt_offset, !dev->hotplugged,
                         &local_err);
2899 2900 2901 2902 2903 2904 2905 2906 2907 2908 2909 2910 2911 2912 2913 2914 2915 2916 2917 2918 2919 2920 2921
        if (local_err) {
            g_free(fdt);
            error_propagate(errp, local_err);
            return;
        }
    }

    if (dev->hotplugged) {
        /*
         * Send hotplug notification interrupt to the guest only in case
         * of hotplugged CPUs.
         */
        spapr_hotplug_req_add_by_index(drc);
    } else {
        /*
         * Set the right DRC states for cold plugged CPU.
         */
        if (drc) {
            sPAPRDRConnectorClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
            drck->set_allocation_state(drc, SPAPR_DR_ALLOCATION_STATE_USABLE);
            drck->set_isolation_state(drc, SPAPR_DR_ISOLATION_STATE_UNISOLATED);
        }
    }
2922
    core_slot->cpu = OBJECT(dev);
2923 2924 2925 2926 2927 2928 2929 2930 2931 2932 2933
}

static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
                                Error **errp)
{
    MachineState *machine = MACHINE(OBJECT(hotplug_dev));
    MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev);
    Error *local_err = NULL;
    CPUCore *cc = CPU_CORE(dev);
    char *base_core_type = spapr_get_cpu_core_type(machine->cpu_model);
    const char *type = object_get_typename(OBJECT(dev));
2934 2935
    CPUArchId *core_slot;
    int index;
2936

2937
    if (dev->hotplugged && !mc->has_hotpluggable_cpus) {
2938 2939 2940 2941 2942 2943 2944 2945 2946 2947 2948 2949 2950 2951
        error_setg(&local_err, "CPU hotplug not supported for this machine");
        goto out;
    }

    if (strcmp(base_core_type, type)) {
        error_setg(&local_err, "CPU core type should be %s", base_core_type);
        goto out;
    }

    if (cc->core_id % smp_threads) {
        error_setg(&local_err, "invalid core id %d", cc->core_id);
        goto out;
    }

2952 2953 2954 2955 2956 2957 2958
    /*
     * In general we should have homogeneous threads-per-core, but old
     * (pre hotplug support) machine types allow the last core to have
     * reduced threads as a compatibility hack for when we allowed
     * total vcpus not a multiple of threads-per-core.
     */
    if (mc->has_hotpluggable_cpus && (cc->nr_threads != smp_threads)) {
2959 2960 2961 2962 2963
        error_setg(errp, "invalid nr-threads %d, must be %d",
                   cc->nr_threads, smp_threads);
        return;
    }

2964 2965
    core_slot = spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index);
    if (!core_slot) {
2966 2967 2968 2969
        error_setg(&local_err, "core id %d out of range", cc->core_id);
        goto out;
    }

2970
    if (core_slot->cpu) {
2971 2972 2973 2974
        error_setg(&local_err, "core %d already populated", cc->core_id);
        goto out;
    }

2975
    numa_cpu_pre_plug(core_slot, dev, &local_err);
2976

2977 2978 2979 2980 2981
out:
    g_free(base_core_type);
    error_propagate(errp, local_err);
}

B
Bharata B Rao 已提交
2982 2983 2984 2985 2986 2987
static void spapr_machine_device_plug(HotplugHandler *hotplug_dev,
                                      DeviceState *dev, Error **errp)
{
    sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(qdev_get_machine());

    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
2988
        int node;
B
Bharata B Rao 已提交
2989 2990 2991 2992 2993

        if (!smc->dr_lmb_enabled) {
            error_setg(errp, "Memory hotplug not supported for this machine");
            return;
        }
2994
        node = object_property_get_uint(OBJECT(dev), PC_DIMM_NODE_PROP, errp);
B
Bharata B Rao 已提交
2995 2996 2997
        if (*errp) {
            return;
        }
2998 2999 3000 3001
        if (node < 0 || node >= MAX_NODES) {
            error_setg(errp, "Invaild node %d", node);
            return;
        }
B
Bharata B Rao 已提交
3002

3003 3004 3005 3006 3007 3008 3009 3010 3011 3012 3013 3014 3015 3016 3017 3018 3019 3020 3021 3022 3023 3024
        /*
         * Currently PowerPC kernel doesn't allow hot-adding memory to
         * memory-less node, but instead will silently add the memory
         * to the first node that has some memory. This causes two
         * unexpected behaviours for the user.
         *
         * - Memory gets hotplugged to a different node than what the user
         *   specified.
         * - Since pc-dimm subsystem in QEMU still thinks that memory belongs
         *   to memory-less node, a reboot will set things accordingly
         *   and the previously hotplugged memory now ends in the right node.
         *   This appears as if some memory moved from one node to another.
         *
         * So until kernel starts supporting memory hotplug to memory-less
         * nodes, just prevent such attempts upfront in QEMU.
         */
        if (nb_numa_nodes && !numa_info[node].node_mem) {
            error_setg(errp, "Can't hotplug memory to memory-less node %d",
                       node);
            return;
        }

B
Bharata B Rao 已提交
3025
        spapr_memory_plug(hotplug_dev, dev, node, errp);
B
Bharata B Rao 已提交
3026 3027
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
        spapr_core_plug(hotplug_dev, dev, errp);
B
Bharata B Rao 已提交
3028 3029 3030 3031 3032 3033
    }
}

static void spapr_machine_device_unplug(HotplugHandler *hotplug_dev,
                                      DeviceState *dev, Error **errp)
{
B
Bharata B Rao 已提交
3034
    sPAPRMachineState *sms = SPAPR_MACHINE(qdev_get_machine());
3035
    MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
B
Bharata B Rao 已提交
3036

B
Bharata B Rao 已提交
3037
    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
B
Bharata B Rao 已提交
3038 3039 3040 3041 3042 3043
        if (spapr_ovec_test(sms->ov5_cas, OV5_HP_EVT)) {
            spapr_memory_unplug(hotplug_dev, dev, errp);
        } else {
            error_setg(errp, "Memory hot unplug not supported for this guest");
        }
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
3044
        if (!mc->has_hotpluggable_cpus) {
B
Bharata B Rao 已提交
3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069
            error_setg(errp, "CPU hot unplug not supported on this machine");
            return;
        }
        spapr_core_unplug(hotplug_dev, dev, errp);
    }
}

static void spapr_machine_device_unplug_request(HotplugHandler *hotplug_dev,
                                                DeviceState *dev, Error **errp)
{
    sPAPRMachineState *sms = SPAPR_MACHINE(qdev_get_machine());
    MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());

    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
        if (spapr_ovec_test(sms->ov5_cas, OV5_HP_EVT)) {
            spapr_memory_unplug_request(hotplug_dev, dev, errp);
        } else {
            /* NOTE: this means there is a window after guest reset, prior to
             * CAS negotiation, where unplug requests will fail due to the
             * capability not being detected yet. This is a bit different than
             * the case with PCI unplug, where the events will be queued and
             * eventually handled by the guest after boot
             */
            error_setg(errp, "Memory hot unplug not supported for this guest");
        }
B
Bharata B Rao 已提交
3070
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
3071
        if (!mc->has_hotpluggable_cpus) {
B
Bharata B Rao 已提交
3072 3073 3074
            error_setg(errp, "CPU hot unplug not supported on this machine");
            return;
        }
3075
        spapr_core_unplug_request(hotplug_dev, dev, errp);
B
Bharata B Rao 已提交
3076 3077 3078
    }
}

3079 3080 3081
static void spapr_machine_device_pre_plug(HotplugHandler *hotplug_dev,
                                          DeviceState *dev, Error **errp)
{
3082 3083 3084
    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
        spapr_memory_pre_plug(hotplug_dev, dev, errp);
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
3085 3086 3087 3088
        spapr_core_pre_plug(hotplug_dev, dev, errp);
    }
}

3089 3090
static HotplugHandler *spapr_get_hotplug_handler(MachineState *machine,
                                                 DeviceState *dev)
B
Bharata B Rao 已提交
3091
{
3092 3093
    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) ||
        object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
B
Bharata B Rao 已提交
3094 3095 3096 3097 3098
        return HOTPLUG_HANDLER(machine);
    }
    return NULL;
}

3099 3100
static CpuInstanceProperties
spapr_cpu_index_to_props(MachineState *machine, unsigned cpu_index)
3101
{
3102 3103 3104 3105 3106 3107 3108 3109 3110
    CPUArchId *core_slot;
    MachineClass *mc = MACHINE_GET_CLASS(machine);

    /* make sure possible_cpu are intialized */
    mc->possible_cpu_arch_ids(machine);
    /* get CPU core slot containing thread that matches cpu_index */
    core_slot = spapr_find_cpu_slot(machine, cpu_index, NULL);
    assert(core_slot);
    return core_slot->props;
3111 3112
}

3113 3114 3115 3116 3117 3118
static const CPUArchIdList *spapr_possible_cpu_arch_ids(MachineState *machine)
{
    int i;
    int spapr_max_cores = max_cpus / smp_threads;
    MachineClass *mc = MACHINE_GET_CLASS(machine);

3119
    if (!mc->has_hotpluggable_cpus) {
3120 3121 3122 3123 3124 3125 3126 3127 3128 3129 3130 3131 3132
        spapr_max_cores = QEMU_ALIGN_UP(smp_cpus, smp_threads) / smp_threads;
    }
    if (machine->possible_cpus) {
        assert(machine->possible_cpus->len == spapr_max_cores);
        return machine->possible_cpus;
    }

    machine->possible_cpus = g_malloc0(sizeof(CPUArchIdList) +
                             sizeof(CPUArchId) * spapr_max_cores);
    machine->possible_cpus->len = spapr_max_cores;
    for (i = 0; i < machine->possible_cpus->len; i++) {
        int core_id = i * smp_threads;

3133
        machine->possible_cpus->cpus[i].vcpus_count = smp_threads;
3134 3135 3136
        machine->possible_cpus->cpus[i].arch_id = core_id;
        machine->possible_cpus->cpus[i].props.has_core_id = true;
        machine->possible_cpus->cpus[i].props.core_id = core_id;
3137 3138 3139 3140 3141 3142 3143 3144 3145

        /* default distribution of CPUs over NUMA nodes */
        if (nb_numa_nodes) {
            /* preset values but do not enable them i.e. 'has_node_id = false',
             * numa init code will enable them later if manual mapping wasn't
             * present on CLI */
            machine->possible_cpus->cpus[i].props.node_id =
                core_id / smp_threads / smp_cores % nb_numa_nodes;
        }
3146 3147 3148 3149
    }
    return machine->possible_cpus;
}

3150
static void spapr_phb_placement(sPAPRMachineState *spapr, uint32_t index,
D
David Gibson 已提交
3151 3152
                                uint64_t *buid, hwaddr *pio,
                                hwaddr *mmio32, hwaddr *mmio64,
3153 3154
                                unsigned n_dma, uint32_t *liobns, Error **errp)
{
3155 3156 3157 3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169
    /*
     * New-style PHB window placement.
     *
     * Goals: Gives large (1TiB), naturally aligned 64-bit MMIO window
     * for each PHB, in addition to 2GiB 32-bit MMIO and 64kiB PIO
     * windows.
     *
     * Some guest kernels can't work with MMIO windows above 1<<46
     * (64TiB), so we place up to 31 PHBs in the area 32TiB..64TiB
     *
     * 32TiB..(33TiB+1984kiB) contains the 64kiB PIO windows for each
     * PHB stacked together.  (32TiB+2GiB)..(32TiB+64GiB) contains the
     * 2GiB 32-bit MMIO windows for each PHB.  Then 33..64TiB has the
     * 1TiB 64-bit MMIO windows for each PHB.
     */
3170
    const uint64_t base_buid = 0x800000020000000ULL;
3171 3172
#define SPAPR_MAX_PHBS ((SPAPR_PCI_LIMIT - SPAPR_PCI_BASE) / \
                        SPAPR_PCI_MEM64_WIN_SIZE - 1)
3173 3174
    int i;

3175 3176 3177 3178 3179 3180
    /* Sanity check natural alignments */
    QEMU_BUILD_BUG_ON((SPAPR_PCI_BASE % SPAPR_PCI_MEM64_WIN_SIZE) != 0);
    QEMU_BUILD_BUG_ON((SPAPR_PCI_LIMIT % SPAPR_PCI_MEM64_WIN_SIZE) != 0);
    QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM64_WIN_SIZE % SPAPR_PCI_MEM32_WIN_SIZE) != 0);
    QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM32_WIN_SIZE % SPAPR_PCI_IO_WIN_SIZE) != 0);
    /* Sanity check bounds */
3181 3182 3183 3184 3185 3186 3187 3188
    QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS * SPAPR_PCI_IO_WIN_SIZE) >
                      SPAPR_PCI_MEM32_WIN_SIZE);
    QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS * SPAPR_PCI_MEM32_WIN_SIZE) >
                      SPAPR_PCI_MEM64_WIN_SIZE);

    if (index >= SPAPR_MAX_PHBS) {
        error_setg(errp, "\"index\" for PAPR PHB is too large (max %llu)",
                   SPAPR_MAX_PHBS - 1);
3189 3190 3191 3192 3193 3194 3195 3196
        return;
    }

    *buid = base_buid + index;
    for (i = 0; i < n_dma; ++i) {
        liobns[i] = SPAPR_PCI_LIOBN(index, i);
    }

3197 3198 3199
    *pio = SPAPR_PCI_BASE + index * SPAPR_PCI_IO_WIN_SIZE;
    *mmio32 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM32_WIN_SIZE;
    *mmio64 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM64_WIN_SIZE;
3200 3201
}

3202 3203 3204 3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215
static ICSState *spapr_ics_get(XICSFabric *dev, int irq)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(dev);

    return ics_valid_irq(spapr->ics, irq) ? spapr->ics : NULL;
}

static void spapr_ics_resend(XICSFabric *dev)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(dev);

    ics_resend(spapr->ics);
}

3216
static ICPState *spapr_icp_get(XICSFabric *xi, int cpu_dt_id)
3217
{
3218
    PowerPCCPU *cpu = ppc_get_vcpu_by_dt_id(cpu_dt_id);
3219

3220
    return cpu ? ICP(cpu->intc) : NULL;
3221 3222
}

3223 3224 3225 3226
static void spapr_pic_print_info(InterruptStatsProvider *obj,
                                 Monitor *mon)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
3227 3228 3229 3230
    CPUState *cs;

    CPU_FOREACH(cs) {
        PowerPCCPU *cpu = POWERPC_CPU(cs);
3231

3232
        icp_pic_print_info(ICP(cpu->intc), mon);
3233 3234 3235 3236 3237
    }

    ics_pic_print_info(spapr->ics, mon);
}

3238 3239 3240
static void spapr_machine_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);
D
David Gibson 已提交
3241
    sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(oc);
3242
    FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
3243
    NMIClass *nc = NMI_CLASS(oc);
B
Bharata B Rao 已提交
3244
    HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
3245
    PPCVirtualHypervisorClass *vhc = PPC_VIRTUAL_HYPERVISOR_CLASS(oc);
3246
    XICSFabricClass *xic = XICS_FABRIC_CLASS(oc);
3247
    InterruptStatsProviderClass *ispc = INTERRUPT_STATS_PROVIDER_CLASS(oc);
3248

3249
    mc->desc = "pSeries Logical Partition (PAPR compliant)";
3250 3251 3252 3253 3254 3255

    /*
     * We set up the default / latest behaviour here.  The class_init
     * functions for the specific versioned machine types can override
     * these details for backwards compatibility
     */
3256 3257 3258
    mc->init = ppc_spapr_init;
    mc->reset = ppc_spapr_reset;
    mc->block_default_type = IF_SCSI;
G
Greg Kurz 已提交
3259
    mc->max_cpus = 1024;
3260
    mc->no_parallel = 1;
3261
    mc->default_boot_order = "";
3262
    mc->default_ram_size = 512 * M_BYTE;
3263
    mc->kvm_type = spapr_kvm_type;
3264
    mc->has_dynamic_sysbus = true;
3265
    mc->pci_allow_0_address = true;
3266
    mc->get_hotplug_handler = spapr_get_hotplug_handler;
3267
    hc->pre_plug = spapr_machine_device_pre_plug;
B
Bharata B Rao 已提交
3268 3269
    hc->plug = spapr_machine_device_plug;
    hc->unplug = spapr_machine_device_unplug;
3270
    mc->cpu_index_to_instance_props = spapr_cpu_index_to_props;
3271
    mc->possible_cpu_arch_ids = spapr_possible_cpu_arch_ids;
B
Bharata B Rao 已提交
3272
    hc->unplug_request = spapr_machine_device_unplug_request;
3273

3274
    smc->dr_lmb_enabled = true;
3275
    smc->tcg_default_cpu = "POWER8";
3276
    mc->has_hotpluggable_cpus = true;
3277
    fwc->get_dev_path = spapr_get_fw_dev_path;
3278
    nc->nmi_monitor_handler = spapr_nmi;
3279
    smc->phb_placement = spapr_phb_placement;
3280
    vhc->hypercall = emulate_spapr_hypercall;
3281 3282 3283 3284
    vhc->hpt_mask = spapr_hpt_mask;
    vhc->map_hptes = spapr_map_hptes;
    vhc->unmap_hptes = spapr_unmap_hptes;
    vhc->store_hpte = spapr_store_hpte;
3285
    vhc->get_patbe = spapr_get_patbe;
3286 3287
    xic->ics_get = spapr_ics_get;
    xic->ics_resend = spapr_ics_resend;
3288
    xic->icp_get = spapr_icp_get;
3289
    ispc->print_info = spapr_pic_print_info;
3290 3291 3292 3293 3294
    /* Force NUMA node memory size to be a multiple of
     * SPAPR_MEMORY_BLOCK_SIZE (256M) since that's the granularity
     * in which LMBs are represented and hot-added
     */
    mc->numa_mem_align_shift = 28;
3295 3296 3297 3298 3299
}

static const TypeInfo spapr_machine_info = {
    .name          = TYPE_SPAPR_MACHINE,
    .parent        = TYPE_MACHINE,
3300
    .abstract      = true,
3301
    .instance_size = sizeof(sPAPRMachineState),
E
Eduardo Habkost 已提交
3302
    .instance_init = spapr_machine_initfn,
3303
    .instance_finalize = spapr_machine_finalizefn,
D
David Gibson 已提交
3304
    .class_size    = sizeof(sPAPRMachineClass),
3305
    .class_init    = spapr_machine_class_init,
3306 3307
    .interfaces = (InterfaceInfo[]) {
        { TYPE_FW_PATH_PROVIDER },
3308
        { TYPE_NMI },
B
Bharata B Rao 已提交
3309
        { TYPE_HOTPLUG_HANDLER },
3310
        { TYPE_PPC_VIRTUAL_HYPERVISOR },
3311
        { TYPE_XICS_FABRIC },
3312
        { TYPE_INTERRUPT_STATS_PROVIDER },
3313 3314
        { }
    },
3315 3316
};

3317
#define DEFINE_SPAPR_MACHINE(suffix, verstr, latest)                 \
D
David Gibson 已提交
3318 3319 3320 3321 3322
    static void spapr_machine_##suffix##_class_init(ObjectClass *oc, \
                                                    void *data)      \
    {                                                                \
        MachineClass *mc = MACHINE_CLASS(oc);                        \
        spapr_machine_##suffix##_class_options(mc);                  \
3323 3324 3325 3326
        if (latest) {                                                \
            mc->alias = "pseries";                                   \
            mc->is_default = 1;                                      \
        }                                                            \
D
David Gibson 已提交
3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342
    }                                                                \
    static void spapr_machine_##suffix##_instance_init(Object *obj)  \
    {                                                                \
        MachineState *machine = MACHINE(obj);                        \
        spapr_machine_##suffix##_instance_options(machine);          \
    }                                                                \
    static const TypeInfo spapr_machine_##suffix##_info = {          \
        .name = MACHINE_TYPE_NAME("pseries-" verstr),                \
        .parent = TYPE_SPAPR_MACHINE,                                \
        .class_init = spapr_machine_##suffix##_class_init,           \
        .instance_init = spapr_machine_##suffix##_instance_init,     \
    };                                                               \
    static void spapr_machine_register_##suffix(void)                \
    {                                                                \
        type_register(&spapr_machine_##suffix##_info);               \
    }                                                                \
3343
    type_init(spapr_machine_register_##suffix)
D
David Gibson 已提交
3344

3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356 3357 3358
/*
 * pseries-2.10
 */
static void spapr_machine_2_10_instance_options(MachineState *machine)
{
}

static void spapr_machine_2_10_class_options(MachineClass *mc)
{
    /* Defaults for the latest behaviour inherited from the base class */
}

DEFINE_SPAPR_MACHINE(2_10, "2.10", true);

3359 3360 3361
/*
 * pseries-2.9
 */
3362 3363 3364
#define SPAPR_COMPAT_2_9                                               \
    HW_COMPAT_2_9

3365 3366
static void spapr_machine_2_9_instance_options(MachineState *machine)
{
3367
    spapr_machine_2_10_instance_options(machine);
3368 3369 3370 3371
}

static void spapr_machine_2_9_class_options(MachineClass *mc)
{
3372 3373
    spapr_machine_2_10_class_options(mc);
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_9);
3374
    mc->numa_auto_assign_ram = numa_legacy_auto_assign_ram;
3375 3376
}

3377
DEFINE_SPAPR_MACHINE(2_9, "2.9", false);
3378

3379 3380 3381
/*
 * pseries-2.8
 */
3382 3383 3384 3385 3386 3387 3388
#define SPAPR_COMPAT_2_8                                        \
    HW_COMPAT_2_8                                               \
    {                                                           \
        .driver   = TYPE_SPAPR_PCI_HOST_BRIDGE,                 \
        .property = "pcie-extended-configuration-space",        \
        .value    = "off",                                      \
    },
3389

3390 3391
static void spapr_machine_2_8_instance_options(MachineState *machine)
{
3392
    spapr_machine_2_9_instance_options(machine);
3393 3394 3395 3396
}

static void spapr_machine_2_8_class_options(MachineClass *mc)
{
3397 3398
    spapr_machine_2_9_class_options(mc);
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_8);
3399
    mc->numa_mem_align_shift = 23;
3400 3401
}

3402
DEFINE_SPAPR_MACHINE(2_8, "2.8", false);
3403

3404 3405 3406
/*
 * pseries-2.7
 */
3407 3408 3409 3410 3411 3412 3413 3414 3415 3416 3417
#define SPAPR_COMPAT_2_7                            \
    HW_COMPAT_2_7                                   \
    {                                               \
        .driver   = TYPE_SPAPR_PCI_HOST_BRIDGE,     \
        .property = "mem_win_size",                 \
        .value    = stringify(SPAPR_PCI_2_7_MMIO_WIN_SIZE),\
    },                                              \
    {                                               \
        .driver   = TYPE_SPAPR_PCI_HOST_BRIDGE,     \
        .property = "mem64_win_size",               \
        .value    = "0",                            \
3418 3419 3420 3421 3422
    },                                              \
    {                                               \
        .driver = TYPE_POWERPC_CPU,                 \
        .property = "pre-2.8-migration",            \
        .value    = "on",                           \
3423 3424 3425 3426 3427
    },                                              \
    {                                               \
        .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,       \
        .property = "pre-2.8-migration",            \
        .value    = "on",                           \
3428 3429 3430 3431 3432 3433 3434 3435 3436 3437 3438 3439 3440 3441 3442 3443 3444 3445 3446 3447 3448 3449 3450 3451 3452 3453 3454 3455 3456 3457 3458 3459 3460 3461 3462 3463 3464 3465 3466 3467 3468 3469 3470 3471 3472 3473 3474 3475 3476 3477
    },

static void phb_placement_2_7(sPAPRMachineState *spapr, uint32_t index,
                              uint64_t *buid, hwaddr *pio,
                              hwaddr *mmio32, hwaddr *mmio64,
                              unsigned n_dma, uint32_t *liobns, Error **errp)
{
    /* Legacy PHB placement for pseries-2.7 and earlier machine types */
    const uint64_t base_buid = 0x800000020000000ULL;
    const hwaddr phb_spacing = 0x1000000000ULL; /* 64 GiB */
    const hwaddr mmio_offset = 0xa0000000; /* 2 GiB + 512 MiB */
    const hwaddr pio_offset = 0x80000000; /* 2 GiB */
    const uint32_t max_index = 255;
    const hwaddr phb0_alignment = 0x10000000000ULL; /* 1 TiB */

    uint64_t ram_top = MACHINE(spapr)->ram_size;
    hwaddr phb0_base, phb_base;
    int i;

    /* Do we have hotpluggable memory? */
    if (MACHINE(spapr)->maxram_size > ram_top) {
        /* Can't just use maxram_size, because there may be an
         * alignment gap between normal and hotpluggable memory
         * regions */
        ram_top = spapr->hotplug_memory.base +
            memory_region_size(&spapr->hotplug_memory.mr);
    }

    phb0_base = QEMU_ALIGN_UP(ram_top, phb0_alignment);

    if (index > max_index) {
        error_setg(errp, "\"index\" for PAPR PHB is too large (max %u)",
                   max_index);
        return;
    }

    *buid = base_buid + index;
    for (i = 0; i < n_dma; ++i) {
        liobns[i] = SPAPR_PCI_LIOBN(index, i);
    }

    phb_base = phb0_base + index * phb_spacing;
    *pio = phb_base + pio_offset;
    *mmio32 = phb_base + mmio_offset;
    /*
     * We don't set the 64-bit MMIO window, relying on the PHB's
     * fallback behaviour of automatically splitting a large "32-bit"
     * window into contiguous 32-bit and 64-bit windows
     */
}
3478

3479 3480
static void spapr_machine_2_7_instance_options(MachineState *machine)
{
3481 3482
    sPAPRMachineState *spapr = SPAPR_MACHINE(machine);

3483
    spapr_machine_2_8_instance_options(machine);
3484
    spapr->use_hotplug_event_source = false;
3485 3486 3487 3488
}

static void spapr_machine_2_7_class_options(MachineClass *mc)
{
3489 3490
    sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);

3491
    spapr_machine_2_8_class_options(mc);
3492
    smc->tcg_default_cpu = "POWER7";
3493
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_7);
3494
    smc->phb_placement = phb_placement_2_7;
3495 3496
}

3497
DEFINE_SPAPR_MACHINE(2_7, "2.7", false);
3498

3499 3500 3501
/*
 * pseries-2.6
 */
3502
#define SPAPR_COMPAT_2_6 \
3503 3504 3505 3506 3507 3508
    HW_COMPAT_2_6 \
    { \
        .driver   = TYPE_SPAPR_PCI_HOST_BRIDGE,\
        .property = "ddw",\
        .value    = stringify(off),\
    },
3509

3510 3511
static void spapr_machine_2_6_instance_options(MachineState *machine)
{
3512
    spapr_machine_2_7_instance_options(machine);
3513 3514 3515 3516
}

static void spapr_machine_2_6_class_options(MachineClass *mc)
{
3517
    spapr_machine_2_7_class_options(mc);
3518
    mc->has_hotpluggable_cpus = false;
3519
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_6);
3520 3521
}

3522
DEFINE_SPAPR_MACHINE(2_6, "2.6", false);
3523

3524 3525 3526
/*
 * pseries-2.5
 */
3527
#define SPAPR_COMPAT_2_5 \
3528 3529 3530 3531 3532 3533
    HW_COMPAT_2_5 \
    { \
        .driver   = "spapr-vlan", \
        .property = "use-rx-buffer-pools", \
        .value    = "off", \
    },
3534

D
David Gibson 已提交
3535
static void spapr_machine_2_5_instance_options(MachineState *machine)
3536
{
3537
    spapr_machine_2_6_instance_options(machine);
D
David Gibson 已提交
3538 3539 3540 3541
}

static void spapr_machine_2_5_class_options(MachineClass *mc)
{
3542 3543
    sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);

3544
    spapr_machine_2_6_class_options(mc);
3545
    smc->use_ohci_by_default = true;
3546
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_5);
3547 3548
}

3549
DEFINE_SPAPR_MACHINE(2_5, "2.5", false);
3550 3551 3552 3553

/*
 * pseries-2.4
 */
C
Cornelia Huck 已提交
3554 3555 3556
#define SPAPR_COMPAT_2_4 \
        HW_COMPAT_2_4

D
David Gibson 已提交
3557
static void spapr_machine_2_4_instance_options(MachineState *machine)
3558
{
D
David Gibson 已提交
3559 3560
    spapr_machine_2_5_instance_options(machine);
}
3561

D
David Gibson 已提交
3562 3563
static void spapr_machine_2_4_class_options(MachineClass *mc)
{
3564 3565 3566 3567
    sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);

    spapr_machine_2_5_class_options(mc);
    smc->dr_lmb_enabled = false;
D
David Gibson 已提交
3568
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_4);
3569 3570
}

3571
DEFINE_SPAPR_MACHINE(2_4, "2.4", false);
3572 3573 3574 3575

/*
 * pseries-2.3
 */
E
Eduardo Habkost 已提交
3576
#define SPAPR_COMPAT_2_3 \
3577 3578 3579 3580 3581 3582
        HW_COMPAT_2_3 \
        {\
            .driver   = "spapr-pci-host-bridge",\
            .property = "dynamic-reconfiguration",\
            .value    = "off",\
        },
E
Eduardo Habkost 已提交
3583

D
David Gibson 已提交
3584
static void spapr_machine_2_3_instance_options(MachineState *machine)
J
Jason Wang 已提交
3585
{
D
David Gibson 已提交
3586
    spapr_machine_2_4_instance_options(machine);
J
Jason Wang 已提交
3587 3588
}

D
David Gibson 已提交
3589
static void spapr_machine_2_3_class_options(MachineClass *mc)
3590
{
3591
    spapr_machine_2_4_class_options(mc);
D
David Gibson 已提交
3592
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_3);
3593
}
3594
DEFINE_SPAPR_MACHINE(2_3, "2.3", false);
3595

3596 3597 3598 3599 3600 3601 3602 3603 3604 3605 3606 3607
/*
 * pseries-2.2
 */

#define SPAPR_COMPAT_2_2 \
        HW_COMPAT_2_2 \
        {\
            .driver   = TYPE_SPAPR_PCI_HOST_BRIDGE,\
            .property = "mem_win_size",\
            .value    = "0x20000000",\
        },

D
David Gibson 已提交
3608
static void spapr_machine_2_2_instance_options(MachineState *machine)
3609
{
D
David Gibson 已提交
3610
    spapr_machine_2_3_instance_options(machine);
3611
    machine->suppress_vmdesc = true;
3612 3613
}

D
David Gibson 已提交
3614
static void spapr_machine_2_2_class_options(MachineClass *mc)
3615
{
3616
    spapr_machine_2_3_class_options(mc);
D
David Gibson 已提交
3617
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_2);
3618
}
3619
DEFINE_SPAPR_MACHINE(2_2, "2.2", false);
3620

3621 3622 3623 3624 3625
/*
 * pseries-2.1
 */
#define SPAPR_COMPAT_2_1 \
        HW_COMPAT_2_1
3626

D
David Gibson 已提交
3627
static void spapr_machine_2_1_instance_options(MachineState *machine)
3628
{
D
David Gibson 已提交
3629
    spapr_machine_2_2_instance_options(machine);
3630
}
J
Jason Wang 已提交
3631

D
David Gibson 已提交
3632
static void spapr_machine_2_1_class_options(MachineClass *mc)
J
Jason Wang 已提交
3633
{
3634
    spapr_machine_2_2_class_options(mc);
D
David Gibson 已提交
3635
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_1);
J
Jason Wang 已提交
3636
}
3637
DEFINE_SPAPR_MACHINE(2_1, "2.1", false);
D
David Gibson 已提交
3638

3639
static void spapr_machine_register_types(void)
3640
{
3641
    type_register_static(&spapr_machine_info);
3642 3643
}

3644
type_init(spapr_machine_register_types)