spapr.c 112.7 KB
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/*
 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
 *
 * Copyright (c) 2004-2007 Fabrice Bellard
 * Copyright (c) 2007 Jocelyn Mayer
 * Copyright (c) 2010 David Gibson, IBM Corporation.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 *
 */
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/numa.h"
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#include "hw/hw.h"
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#include "qemu/log.h"
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#include "hw/fw-path-provider.h"
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#include "elf.h"
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#include "net/net.h"
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#include "sysemu/device_tree.h"
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#include "sysemu/block-backend.h"
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#include "sysemu/cpus.h"
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#include "sysemu/hw_accel.h"
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#include "kvm_ppc.h"
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#include "migration/migration.h"
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#include "mmu-hash64.h"
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#include "mmu-book3s-v3.h"
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#include "qom/cpu.h"
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#include "hw/boards.h"
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#include "hw/ppc/ppc.h"
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#include "hw/loader.h"

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#include "hw/ppc/fdt.h"
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#include "hw/ppc/spapr.h"
#include "hw/ppc/spapr_vio.h"
#include "hw/pci-host/spapr.h"
#include "hw/ppc/xics.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/pci.h"
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#include "hw/scsi/scsi.h"
#include "hw/virtio/virtio-scsi.h"
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#include "exec/address-spaces.h"
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#include "hw/usb.h"
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#include "qemu/config-file.h"
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#include "qemu/error-report.h"
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#include "trace.h"
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#include "hw/nmi.h"
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#include "hw/intc/intc.h"
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#include "hw/compat.h"
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#include "qemu/cutils.h"
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#include "hw/ppc/spapr_cpu_core.h"
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#include "qmp-commands.h"
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#include <libfdt.h>

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/* SLOF memory layout:
 *
 * SLOF raw image loaded at 0, copies its romfs right below the flat
 * device-tree, then position SLOF itself 31M below that
 *
 * So we set FW_OVERHEAD to 40MB which should account for all of that
 * and more
 *
 * We load our kernel at 4M, leaving space for SLOF initial image
 */
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#define FDT_MAX_SIZE            0x100000
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#define RTAS_MAX_SIZE           0x10000
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#define RTAS_MAX_ADDR           0x80000000 /* RTAS must stay below that */
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#define FW_MAX_SIZE             0x400000
#define FW_FILE_NAME            "slof.bin"
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#define FW_OVERHEAD             0x2800000
#define KERNEL_LOAD_ADDR        FW_MAX_SIZE
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#define MIN_RMA_SLOF            128UL
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#define PHANDLE_XICP            0x00001111

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#define HTAB_SIZE(spapr)        (1ULL << ((spapr)->htab_shift))

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static int try_create_xics(sPAPRMachineState *spapr, const char *type_ics,
                           const char *type_icp, int nr_servers,
                           int nr_irqs, Error **errp)
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{
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    XICSFabric *xi = XICS_FABRIC(spapr);
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    Error *err = NULL, *local_err = NULL;
    ICSState *ics = NULL;

    ics = ICS_SIMPLE(object_new(type_ics));
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    object_property_add_child(OBJECT(spapr), "ics", OBJECT(ics), NULL);
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    object_property_set_int(OBJECT(ics), nr_irqs, "nr-irqs", &err);
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    object_property_add_const_link(OBJECT(ics), "xics", OBJECT(xi), NULL);
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    object_property_set_bool(OBJECT(ics), true, "realized", &local_err);
    error_propagate(&err, local_err);
    if (err) {
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        error_propagate(errp, err);
        return -1;
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    }

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    spapr->nr_servers = nr_servers;
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    spapr->ics = ics;
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    spapr->icp_type = type_icp;
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    return 0;
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}

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static int xics_system_init(MachineState *machine,
                            int nr_servers, int nr_irqs, Error **errp)
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{
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    int rc = -1;
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    if (kvm_enabled()) {
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        Error *err = NULL;

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        if (machine_kernel_irqchip_allowed(machine) &&
            !xics_kvm_init(SPAPR_MACHINE(machine), errp)) {
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            rc = try_create_xics(SPAPR_MACHINE(machine), TYPE_ICS_KVM,
                                 TYPE_KVM_ICP, nr_servers, nr_irqs, &err);
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        }
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        if (machine_kernel_irqchip_required(machine) && rc < 0) {
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            error_reportf_err(err,
                              "kernel_irqchip requested but unavailable: ");
        } else {
            error_free(err);
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        }
    }

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    if (rc < 0) {
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        xics_spapr_init(SPAPR_MACHINE(machine), errp);
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        rc = try_create_xics(SPAPR_MACHINE(machine), TYPE_ICS_SIMPLE,
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                               TYPE_ICP, nr_servers, nr_irqs, errp);
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    }

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    return rc;
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}

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static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu,
                                  int smt_threads)
{
    int i, ret = 0;
    uint32_t servers_prop[smt_threads];
    uint32_t gservers_prop[smt_threads * 2];
    int index = ppc_get_vcpu_dt_id(cpu);

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    if (cpu->compat_pvr) {
        ret = fdt_setprop_cell(fdt, offset, "cpu-version", cpu->compat_pvr);
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        if (ret < 0) {
            return ret;
        }
    }

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    /* Build interrupt servers and gservers properties */
    for (i = 0; i < smt_threads; i++) {
        servers_prop[i] = cpu_to_be32(index + i);
        /* Hack, direct the group queues back to cpu 0 */
        gservers_prop[i*2] = cpu_to_be32(index + i);
        gservers_prop[i*2 + 1] = 0;
    }
    ret = fdt_setprop(fdt, offset, "ibm,ppc-interrupt-server#s",
                      servers_prop, sizeof(servers_prop));
    if (ret < 0) {
        return ret;
    }
    ret = fdt_setprop(fdt, offset, "ibm,ppc-interrupt-gserver#s",
                      gservers_prop, sizeof(gservers_prop));

    return ret;
}

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static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, CPUState *cs)
{
    int ret = 0;
    PowerPCCPU *cpu = POWERPC_CPU(cs);
    int index = ppc_get_vcpu_dt_id(cpu);
    uint32_t associativity[] = {cpu_to_be32(0x5),
                                cpu_to_be32(0x0),
                                cpu_to_be32(0x0),
                                cpu_to_be32(0x0),
                                cpu_to_be32(cs->numa_node),
                                cpu_to_be32(index)};

    /* Advertise NUMA via ibm,associativity */
    if (nb_numa_nodes > 1) {
        ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
                          sizeof(associativity));
    }

    return ret;
}

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/* Populate the "ibm,pa-features" property */
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static void spapr_populate_pa_features(CPUPPCState *env, void *fdt, int offset,
                                      bool legacy_guest)
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{
    uint8_t pa_features_206[] = { 6, 0,
        0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
    uint8_t pa_features_207[] = { 24, 0,
        0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
        0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
        0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
        0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
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    uint8_t pa_features_300[] = { 66, 0,
        /* 0: MMU|FPU|SLB|RUN|DABR|NX, 1: fri[nzpm]|DABRX|SPRG3|SLB0|PP110 */
        /* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, SSO, 5: LE|CFAR|EB|LSQ */
        0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */
        /* 6: DS207 */
        0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */
        /* 16: Vector */
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        0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */
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        /* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */
        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 18 - 23 */
        /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */
        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */
        /* 30: MMR, 32: LE atomic, 34: EBB + ext EBB */
        0x80, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */
        /* 36: SPR SO, 38: Copy/Paste, 40: Radix MMU */
        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 36 - 41 */
        /* 42: PM, 44: PC RA, 46: SC vec'd */
        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */
        /* 48: SIMD, 50: QP BFP, 52: String */
        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 48 - 53 */
        /* 54: DecFP, 56: DecI, 58: SHA */
        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 54 - 59 */
        /* 60: NM atomic, 62: RNG */
        0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */
    };
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    uint8_t *pa_features;
    size_t pa_size;

    switch (POWERPC_MMU_VER(env->mmu_model)) {
    case POWERPC_MMU_VER_2_06:
        pa_features = pa_features_206;
        pa_size = sizeof(pa_features_206);
        break;
    case POWERPC_MMU_VER_2_07:
        pa_features = pa_features_207;
        pa_size = sizeof(pa_features_207);
        break;
    case POWERPC_MMU_VER_3_00:
        pa_features = pa_features_300;
        pa_size = sizeof(pa_features_300);
        break;
    default:
        return;
    }

    if (env->ci_large_pages) {
        /*
         * Note: we keep CI large pages off by default because a 64K capable
         * guest provisioned with large pages might otherwise try to map a qemu
         * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
         * even if that qemu runs on a 4k host.
         * We dd this bit back here if we are confident this is not an issue
         */
        pa_features[3] |= 0x20;
    }
    if (kvmppc_has_cap_htm() && pa_size > 24) {
        pa_features[24] |= 0x80;    /* Transactional memory support */
    }
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    if (legacy_guest && pa_size > 40) {
        /* Workaround for broken kernels that attempt (guest) radix
         * mode when they can't handle it, if they see the radix bit set
         * in pa-features. So hide it from them. */
        pa_features[40 + 2] &= ~0x80; /* Radix MMU */
    }
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    _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", pa_features, pa_size)));
}

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static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineState *spapr)
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{
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    int ret = 0, offset, cpus_offset;
    CPUState *cs;
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    char cpu_model[32];
    int smt = kvmppc_smt_threads();
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    uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
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    CPU_FOREACH(cs) {
        PowerPCCPU *cpu = POWERPC_CPU(cs);
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        CPUPPCState *env = &cpu->env;
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        DeviceClass *dc = DEVICE_GET_CLASS(cs);
        int index = ppc_get_vcpu_dt_id(cpu);
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        int compat_smt = MIN(smp_threads, ppc_compat_max_threads(cpu));
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        if ((index % smt) != 0) {
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            continue;
        }

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        snprintf(cpu_model, 32, "%s@%x", dc->fw_name, index);
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        cpus_offset = fdt_path_offset(fdt, "/cpus");
        if (cpus_offset < 0) {
            cpus_offset = fdt_add_subnode(fdt, fdt_path_offset(fdt, "/"),
                                          "cpus");
            if (cpus_offset < 0) {
                return cpus_offset;
            }
        }
        offset = fdt_subnode_offset(fdt, cpus_offset, cpu_model);
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        if (offset < 0) {
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            offset = fdt_add_subnode(fdt, cpus_offset, cpu_model);
            if (offset < 0) {
                return offset;
            }
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        }

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        ret = fdt_setprop(fdt, offset, "ibm,pft-size",
                          pft_size_prop, sizeof(pft_size_prop));
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        if (ret < 0) {
            return ret;
        }
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        ret = spapr_fixup_cpu_numa_dt(fdt, offset, cs);
        if (ret < 0) {
            return ret;
        }

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        ret = spapr_fixup_cpu_smt_dt(fdt, offset, cpu, compat_smt);
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        if (ret < 0) {
            return ret;
        }
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        spapr_populate_pa_features(env, fdt, offset,
                                         spapr->cas_legacy_guest_workaround);
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    }
    return ret;
}

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static hwaddr spapr_node0_size(void)
{
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    MachineState *machine = MACHINE(qdev_get_machine());

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    if (nb_numa_nodes) {
        int i;
        for (i = 0; i < nb_numa_nodes; ++i) {
            if (numa_info[i].node_mem) {
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                return MIN(pow2floor(numa_info[i].node_mem),
                           machine->ram_size);
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            }
        }
    }
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    return machine->ram_size;
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}

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static void add_str(GString *s, const gchar *s1)
{
    g_string_append_len(s, s1, strlen(s1) + 1);
}
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static int spapr_populate_memory_node(void *fdt, int nodeid, hwaddr start,
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                                       hwaddr size)
{
    uint32_t associativity[] = {
        cpu_to_be32(0x4), /* length */
        cpu_to_be32(0x0), cpu_to_be32(0x0),
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        cpu_to_be32(0x0), cpu_to_be32(nodeid)
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    };
    char mem_name[32];
    uint64_t mem_reg_property[2];
    int off;

    mem_reg_property[0] = cpu_to_be64(start);
    mem_reg_property[1] = cpu_to_be64(size);

    sprintf(mem_name, "memory@" TARGET_FMT_lx, start);
    off = fdt_add_subnode(fdt, 0, mem_name);
    _FDT(off);
    _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
    _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
                      sizeof(mem_reg_property))));
    _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
                      sizeof(associativity))));
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    return off;
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}

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static int spapr_populate_memory(sPAPRMachineState *spapr, void *fdt)
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{
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    MachineState *machine = MACHINE(spapr);
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    hwaddr mem_start, node_size;
    int i, nb_nodes = nb_numa_nodes;
    NodeInfo *nodes = numa_info;
    NodeInfo ramnode;

    /* No NUMA nodes, assume there is just one node with whole RAM */
    if (!nb_numa_nodes) {
        nb_nodes = 1;
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        ramnode.node_mem = machine->ram_size;
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        nodes = &ramnode;
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    }
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    for (i = 0, mem_start = 0; i < nb_nodes; ++i) {
        if (!nodes[i].node_mem) {
            continue;
        }
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        if (mem_start >= machine->ram_size) {
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            node_size = 0;
        } else {
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            node_size = nodes[i].node_mem;
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            if (node_size > machine->ram_size - mem_start) {
                node_size = machine->ram_size - mem_start;
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            }
        }
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        if (!mem_start) {
            /* ppc_spapr_init() checks for rma_size <= node0_size already */
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            spapr_populate_memory_node(fdt, i, 0, spapr->rma_size);
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            mem_start += spapr->rma_size;
            node_size -= spapr->rma_size;
        }
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        for ( ; node_size; ) {
            hwaddr sizetmp = pow2floor(node_size);

            /* mem_start != 0 here */
            if (ctzl(mem_start) < ctzl(sizetmp)) {
                sizetmp = 1ULL << ctzl(mem_start);
            }

            spapr_populate_memory_node(fdt, i, mem_start, sizetmp);
            node_size -= sizetmp;
            mem_start += sizetmp;
        }
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    }

    return 0;
}

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static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
                                  sPAPRMachineState *spapr)
{
    PowerPCCPU *cpu = POWERPC_CPU(cs);
    CPUPPCState *env = &cpu->env;
    PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
    int index = ppc_get_vcpu_dt_id(cpu);
    uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
                       0xffffffff, 0xffffffff};
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    uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq()
        : SPAPR_TIMEBASE_FREQ;
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    uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
    uint32_t page_sizes_prop[64];
    size_t page_sizes_prop_size;
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    uint32_t vcpus_per_socket = smp_threads * smp_cores;
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    uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
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    int compat_smt = MIN(smp_threads, ppc_compat_max_threads(cpu));
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    sPAPRDRConnector *drc;
    sPAPRDRConnectorClass *drck;
    int drc_index;
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    uint32_t radix_AP_encodings[PPC_PAGE_SIZES_MAX_SZ];
    int i;
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    drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index);
    if (drc) {
        drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
        drc_index = drck->get_index(drc);
        _FDT((fdt_setprop_cell(fdt, offset, "ibm,my-drc-index", drc_index)));
    }
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    _FDT((fdt_setprop_cell(fdt, offset, "reg", index)));
    _FDT((fdt_setprop_string(fdt, offset, "device_type", "cpu")));

    _FDT((fdt_setprop_cell(fdt, offset, "cpu-version", env->spr[SPR_PVR])));
    _FDT((fdt_setprop_cell(fdt, offset, "d-cache-block-size",
                           env->dcache_line_size)));
    _FDT((fdt_setprop_cell(fdt, offset, "d-cache-line-size",
                           env->dcache_line_size)));
    _FDT((fdt_setprop_cell(fdt, offset, "i-cache-block-size",
                           env->icache_line_size)));
    _FDT((fdt_setprop_cell(fdt, offset, "i-cache-line-size",
                           env->icache_line_size)));

    if (pcc->l1_dcache_size) {
        _FDT((fdt_setprop_cell(fdt, offset, "d-cache-size",
                               pcc->l1_dcache_size)));
    } else {
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        error_report("Warning: Unknown L1 dcache size for cpu");
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    }
    if (pcc->l1_icache_size) {
        _FDT((fdt_setprop_cell(fdt, offset, "i-cache-size",
                               pcc->l1_icache_size)));
    } else {
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        error_report("Warning: Unknown L1 icache size for cpu");
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    }

    _FDT((fdt_setprop_cell(fdt, offset, "timebase-frequency", tbfreq)));
    _FDT((fdt_setprop_cell(fdt, offset, "clock-frequency", cpufreq)));
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    _FDT((fdt_setprop_cell(fdt, offset, "slb-size", env->slb_nr)));
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    _FDT((fdt_setprop_cell(fdt, offset, "ibm,slb-size", env->slb_nr)));
    _FDT((fdt_setprop_string(fdt, offset, "status", "okay")));
    _FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0)));

    if (env->spr_cb[SPR_PURR].oea_read) {
        _FDT((fdt_setprop(fdt, offset, "ibm,purr", NULL, 0)));
    }

    if (env->mmu_model & POWERPC_MMU_1TSEG) {
        _FDT((fdt_setprop(fdt, offset, "ibm,processor-segment-sizes",
                          segs, sizeof(segs))));
    }

    /* Advertise VMX/VSX (vector extensions) if available
     *   0 / no property == no vector extensions
     *   1               == VMX / Altivec available
     *   2               == VSX available */
    if (env->insns_flags & PPC_ALTIVEC) {
        uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1;

        _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", vmx)));
    }

    /* Advertise DFP (Decimal Floating Point) if available
     *   0 / no property == no DFP
     *   1               == DFP available */
    if (env->insns_flags2 & PPC2_DFP) {
        _FDT((fdt_setprop_cell(fdt, offset, "ibm,dfp", 1)));
    }

533
    page_sizes_prop_size = ppc_create_page_sizes_prop(env, page_sizes_prop,
534 535 536 537 538 539
                                                  sizeof(page_sizes_prop));
    if (page_sizes_prop_size) {
        _FDT((fdt_setprop(fdt, offset, "ibm,segment-page-sizes",
                          page_sizes_prop, page_sizes_prop_size)));
    }

540
    spapr_populate_pa_features(env, fdt, offset, false);
541

542
    _FDT((fdt_setprop_cell(fdt, offset, "ibm,chip-id",
543
                           cs->cpu_index / vcpus_per_socket)));
544 545 546 547 548 549

    _FDT((fdt_setprop(fdt, offset, "ibm,pft-size",
                      pft_size_prop, sizeof(pft_size_prop))));

    _FDT(spapr_fixup_cpu_numa_dt(fdt, offset, cs));

550
    _FDT(spapr_fixup_cpu_smt_dt(fdt, offset, cpu, compat_smt));
551 552 553 554 555 556 557 558 559 560 561

    if (pcc->radix_page_info) {
        for (i = 0; i < pcc->radix_page_info->count; i++) {
            radix_AP_encodings[i] =
                cpu_to_be32(pcc->radix_page_info->entries[i]);
        }
        _FDT((fdt_setprop(fdt, offset, "ibm,processor-radix-AP-encodings",
                          radix_AP_encodings,
                          pcc->radix_page_info->count *
                          sizeof(radix_AP_encodings[0]))));
    }
562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599
}

static void spapr_populate_cpus_dt_node(void *fdt, sPAPRMachineState *spapr)
{
    CPUState *cs;
    int cpus_offset;
    char *nodename;
    int smt = kvmppc_smt_threads();

    cpus_offset = fdt_add_subnode(fdt, 0, "cpus");
    _FDT(cpus_offset);
    _FDT((fdt_setprop_cell(fdt, cpus_offset, "#address-cells", 0x1)));
    _FDT((fdt_setprop_cell(fdt, cpus_offset, "#size-cells", 0x0)));

    /*
     * We walk the CPUs in reverse order to ensure that CPU DT nodes
     * created by fdt_add_subnode() end up in the right order in FDT
     * for the guest kernel the enumerate the CPUs correctly.
     */
    CPU_FOREACH_REVERSE(cs) {
        PowerPCCPU *cpu = POWERPC_CPU(cs);
        int index = ppc_get_vcpu_dt_id(cpu);
        DeviceClass *dc = DEVICE_GET_CLASS(cs);
        int offset;

        if ((index % smt) != 0) {
            continue;
        }

        nodename = g_strdup_printf("%s@%x", dc->fw_name, index);
        offset = fdt_add_subnode(fdt, cpus_offset, nodename);
        g_free(nodename);
        _FDT(offset);
        spapr_populate_cpu_dt(cs, fdt, offset, spapr);
    }

}

600 601 602 603 604 605 606 607 608 609 610
/*
 * Adds ibm,dynamic-reconfiguration-memory node.
 * Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation
 * of this device tree node.
 */
static int spapr_populate_drconf_memory(sPAPRMachineState *spapr, void *fdt)
{
    MachineState *machine = MACHINE(spapr);
    int ret, i, offset;
    uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE;
    uint32_t prop_lmb_size[] = {0, cpu_to_be32(lmb_size)};
611 612 613 614
    uint32_t hotplug_lmb_start = spapr->hotplug_memory.base / lmb_size;
    uint32_t nr_lmbs = (spapr->hotplug_memory.base +
                       memory_region_size(&spapr->hotplug_memory.mr)) /
                       lmb_size;
615
    uint32_t *int_buf, *cur_index, buf_len;
616
    int nr_nodes = nb_numa_nodes ? nb_numa_nodes : 1;
617

618
    /*
619
     * Don't create the node if there is no hotpluggable memory
620
     */
621
    if (machine->ram_size == machine->maxram_size) {
622 623 624
        return 0;
    }

625 626 627 628 629 630
    /*
     * Allocate enough buffer size to fit in ibm,dynamic-memory
     * or ibm,associativity-lookup-arrays
     */
    buf_len = MAX(nr_lmbs * SPAPR_DR_LMB_LIST_ENTRY_SIZE + 1, nr_nodes * 4 + 2)
              * sizeof(uint32_t);
631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654
    cur_index = int_buf = g_malloc0(buf_len);

    offset = fdt_add_subnode(fdt, 0, "ibm,dynamic-reconfiguration-memory");

    ret = fdt_setprop(fdt, offset, "ibm,lmb-size", prop_lmb_size,
                    sizeof(prop_lmb_size));
    if (ret < 0) {
        goto out;
    }

    ret = fdt_setprop_cell(fdt, offset, "ibm,memory-flags-mask", 0xff);
    if (ret < 0) {
        goto out;
    }

    ret = fdt_setprop_cell(fdt, offset, "ibm,memory-preservation-time", 0x0);
    if (ret < 0) {
        goto out;
    }

    /* ibm,dynamic-memory */
    int_buf[0] = cpu_to_be32(nr_lmbs);
    cur_index++;
    for (i = 0; i < nr_lmbs; i++) {
655
        uint64_t addr = i * lmb_size;
656 657
        uint32_t *dynamic_memory = cur_index;

658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675
        if (i >= hotplug_lmb_start) {
            sPAPRDRConnector *drc;
            sPAPRDRConnectorClass *drck;

            drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB, i);
            g_assert(drc);
            drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);

            dynamic_memory[0] = cpu_to_be32(addr >> 32);
            dynamic_memory[1] = cpu_to_be32(addr & 0xffffffff);
            dynamic_memory[2] = cpu_to_be32(drck->get_index(drc));
            dynamic_memory[3] = cpu_to_be32(0); /* reserved */
            dynamic_memory[4] = cpu_to_be32(numa_get_node(addr, NULL));
            if (memory_region_present(get_system_memory(), addr)) {
                dynamic_memory[5] = cpu_to_be32(SPAPR_LMB_FLAGS_ASSIGNED);
            } else {
                dynamic_memory[5] = cpu_to_be32(0);
            }
676
        } else {
677 678 679 680 681 682 683 684 685 686 687 688
            /*
             * LMB information for RMA, boot time RAM and gap b/n RAM and
             * hotplug memory region -- all these are marked as reserved
             * and as having no valid DRC.
             */
            dynamic_memory[0] = cpu_to_be32(addr >> 32);
            dynamic_memory[1] = cpu_to_be32(addr & 0xffffffff);
            dynamic_memory[2] = cpu_to_be32(0);
            dynamic_memory[3] = cpu_to_be32(0); /* reserved */
            dynamic_memory[4] = cpu_to_be32(-1);
            dynamic_memory[5] = cpu_to_be32(SPAPR_LMB_FLAGS_RESERVED |
                                            SPAPR_LMB_FLAGS_DRC_INVALID);
689 690 691 692 693 694 695 696 697 698 699
        }

        cur_index += SPAPR_DR_LMB_LIST_ENTRY_SIZE;
    }
    ret = fdt_setprop(fdt, offset, "ibm,dynamic-memory", int_buf, buf_len);
    if (ret < 0) {
        goto out;
    }

    /* ibm,associativity-lookup-arrays */
    cur_index = int_buf;
700
    int_buf[0] = cpu_to_be32(nr_nodes);
701 702
    int_buf[1] = cpu_to_be32(4); /* Number of entries per associativity list */
    cur_index += 2;
703
    for (i = 0; i < nr_nodes; i++) {
704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719
        uint32_t associativity[] = {
            cpu_to_be32(0x0),
            cpu_to_be32(0x0),
            cpu_to_be32(0x0),
            cpu_to_be32(i)
        };
        memcpy(cur_index, associativity, sizeof(associativity));
        cur_index += 4;
    }
    ret = fdt_setprop(fdt, offset, "ibm,associativity-lookup-arrays", int_buf,
            (cur_index - int_buf) * sizeof(uint32_t));
out:
    g_free(int_buf);
    return ret;
}

720 721 722 723
static int spapr_dt_cas_updates(sPAPRMachineState *spapr, void *fdt,
                                sPAPROptionVector *ov5_updates)
{
    sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
724
    int ret = 0, offset;
725 726 727 728 729

    /* Generate ibm,dynamic-reconfiguration-memory node if required */
    if (spapr_ovec_test(ov5_updates, OV5_DRCONF_MEMORY)) {
        g_assert(smc->dr_lmb_enabled);
        ret = spapr_populate_drconf_memory(spapr, fdt);
730 731 732
        if (ret) {
            goto out;
        }
733 734
    }

735 736 737 738 739 740 741 742 743 744 745
    offset = fdt_path_offset(fdt, "/chosen");
    if (offset < 0) {
        offset = fdt_add_subnode(fdt, 0, "chosen");
        if (offset < 0) {
            return offset;
        }
    }
    ret = spapr_ovec_populate_dt(fdt, offset, spapr->ov5_cas,
                                 "ibm,architecture-vec-5");

out:
746 747 748
    return ret;
}

749 750
int spapr_h_cas_compose_response(sPAPRMachineState *spapr,
                                 target_ulong addr, target_ulong size,
751
                                 sPAPROptionVector *ov5_updates)
752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768
{
    void *fdt, *fdt_skel;
    sPAPRDeviceTreeUpdateHeader hdr = { .version_id = 1 };

    size -= sizeof(hdr);

    /* Create sceleton */
    fdt_skel = g_malloc0(size);
    _FDT((fdt_create(fdt_skel, size)));
    _FDT((fdt_begin_node(fdt_skel, "")));
    _FDT((fdt_end_node(fdt_skel)));
    _FDT((fdt_finish(fdt_skel)));
    fdt = g_malloc0(size);
    _FDT((fdt_open_into(fdt_skel, fdt, size)));
    g_free(fdt_skel);

    /* Fixup cpu nodes */
769
    _FDT((spapr_fixup_cpu_dt(fdt, spapr)));
770

771 772
    if (spapr_dt_cas_updates(spapr, fdt, ov5_updates)) {
        return -1;
773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790
    }

    /* Pack resulting tree */
    _FDT((fdt_pack(fdt)));

    if (fdt_totalsize(fdt) + sizeof(hdr) > size) {
        trace_spapr_cas_failed(size);
        return -1;
    }

    cpu_physical_memory_write(addr, &hdr, sizeof(hdr));
    cpu_physical_memory_write(addr + sizeof(hdr), fdt, fdt_totalsize(fdt));
    trace_spapr_cas_continue(fdt_totalsize(fdt) + sizeof(hdr));
    g_free(fdt);

    return 0;
}

791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859
static void spapr_dt_rtas(sPAPRMachineState *spapr, void *fdt)
{
    int rtas;
    GString *hypertas = g_string_sized_new(256);
    GString *qemu_hypertas = g_string_sized_new(256);
    uint32_t refpoints[] = { cpu_to_be32(0x4), cpu_to_be32(0x4) };
    uint64_t max_hotplug_addr = spapr->hotplug_memory.base +
        memory_region_size(&spapr->hotplug_memory.mr);
    uint32_t lrdr_capacity[] = {
        cpu_to_be32(max_hotplug_addr >> 32),
        cpu_to_be32(max_hotplug_addr & 0xffffffff),
        0, cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE),
        cpu_to_be32(max_cpus / smp_threads),
    };

    _FDT(rtas = fdt_add_subnode(fdt, 0, "rtas"));

    /* hypertas */
    add_str(hypertas, "hcall-pft");
    add_str(hypertas, "hcall-term");
    add_str(hypertas, "hcall-dabr");
    add_str(hypertas, "hcall-interrupt");
    add_str(hypertas, "hcall-tce");
    add_str(hypertas, "hcall-vio");
    add_str(hypertas, "hcall-splpar");
    add_str(hypertas, "hcall-bulk");
    add_str(hypertas, "hcall-set-mode");
    add_str(hypertas, "hcall-sprg0");
    add_str(hypertas, "hcall-copy");
    add_str(hypertas, "hcall-debug");
    add_str(qemu_hypertas, "hcall-memop1");

    if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
        add_str(hypertas, "hcall-multi-tce");
    }
    _FDT(fdt_setprop(fdt, rtas, "ibm,hypertas-functions",
                     hypertas->str, hypertas->len));
    g_string_free(hypertas, TRUE);
    _FDT(fdt_setprop(fdt, rtas, "qemu,hypertas-functions",
                     qemu_hypertas->str, qemu_hypertas->len));
    g_string_free(qemu_hypertas, TRUE);

    _FDT(fdt_setprop(fdt, rtas, "ibm,associativity-reference-points",
                     refpoints, sizeof(refpoints)));

    _FDT(fdt_setprop_cell(fdt, rtas, "rtas-error-log-max",
                          RTAS_ERROR_LOG_MAX));
    _FDT(fdt_setprop_cell(fdt, rtas, "rtas-event-scan-rate",
                          RTAS_EVENT_SCAN_RATE));

    if (msi_nonbroken) {
        _FDT(fdt_setprop(fdt, rtas, "ibm,change-msix-capable", NULL, 0));
    }

    /*
     * According to PAPR, rtas ibm,os-term does not guarantee a return
     * back to the guest cpu.
     *
     * While an additional ibm,extended-os-term property indicates
     * that rtas call return will always occur. Set this property.
     */
    _FDT(fdt_setprop(fdt, rtas, "ibm,extended-os-term", NULL, 0));

    _FDT(fdt_setprop(fdt, rtas, "ibm,lrdr-capacity",
                     lrdr_capacity, sizeof(lrdr_capacity)));

    spapr_dt_rtas_tokens(fdt, rtas);
}

860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886
/* Prepare ibm,arch-vec-5-platform-support, which indicates the MMU features
 * that the guest may request and thus the valid values for bytes 24..26 of
 * option vector 5: */
static void spapr_dt_ov5_platform_support(void *fdt, int chosen)
{
    char val[2 * 3] = {
        24, 0x00, /* Hash/Radix, filled in below. */
        25, 0x00, /* Hash options: Segment Tables == no, GTSE == no. */
        26, 0x40, /* Radix options: GTSE == yes. */
    };

    if (kvm_enabled()) {
        if (kvmppc_has_cap_mmu_radix() && kvmppc_has_cap_mmu_hash_v3()) {
            val[1] = 0x80; /* OV5_MMU_BOTH */
        } else if (kvmppc_has_cap_mmu_radix()) {
            val[1] = 0x40; /* OV5_MMU_RADIX_300 */
        } else {
            val[1] = 0x00; /* Hash */
        }
    } else {
        /* TODO: TCG case, hash */
        val[1] = 0x00;
    }
    _FDT(fdt_setprop(fdt, chosen, "ibm,arch-vec-5-platform-support",
                     val, sizeof(val)));
}

887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939
static void spapr_dt_chosen(sPAPRMachineState *spapr, void *fdt)
{
    MachineState *machine = MACHINE(spapr);
    int chosen;
    const char *boot_device = machine->boot_order;
    char *stdout_path = spapr_vio_stdout_path(spapr->vio_bus);
    size_t cb = 0;
    char *bootlist = get_boot_devices_list(&cb, true);

    _FDT(chosen = fdt_add_subnode(fdt, 0, "chosen"));

    _FDT(fdt_setprop_string(fdt, chosen, "bootargs", machine->kernel_cmdline));
    _FDT(fdt_setprop_cell(fdt, chosen, "linux,initrd-start",
                          spapr->initrd_base));
    _FDT(fdt_setprop_cell(fdt, chosen, "linux,initrd-end",
                          spapr->initrd_base + spapr->initrd_size));

    if (spapr->kernel_size) {
        uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
                              cpu_to_be64(spapr->kernel_size) };

        _FDT(fdt_setprop(fdt, chosen, "qemu,boot-kernel",
                         &kprop, sizeof(kprop)));
        if (spapr->kernel_le) {
            _FDT(fdt_setprop(fdt, chosen, "qemu,boot-kernel-le", NULL, 0));
        }
    }
    if (boot_menu) {
        _FDT((fdt_setprop_cell(fdt, chosen, "qemu,boot-menu", boot_menu)));
    }
    _FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-width", graphic_width));
    _FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-height", graphic_height));
    _FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-depth", graphic_depth));

    if (cb && bootlist) {
        int i;

        for (i = 0; i < cb; i++) {
            if (bootlist[i] == '\n') {
                bootlist[i] = ' ';
            }
        }
        _FDT(fdt_setprop_string(fdt, chosen, "qemu,boot-list", bootlist));
    }

    if (boot_device && strlen(boot_device)) {
        _FDT(fdt_setprop_string(fdt, chosen, "qemu,boot-device", boot_device));
    }

    if (!spapr->has_graphics && stdout_path) {
        _FDT(fdt_setprop_string(fdt, chosen, "linux,stdout-path", stdout_path));
    }

940 941
    spapr_dt_ov5_platform_support(fdt, chosen);

942 943 944 945
    g_free(stdout_path);
    g_free(bootlist);
}

946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968
static void spapr_dt_hypervisor(sPAPRMachineState *spapr, void *fdt)
{
    /* The /hypervisor node isn't in PAPR - this is a hack to allow PR
     * KVM to work under pHyp with some guest co-operation */
    int hypervisor;
    uint8_t hypercall[16];

    _FDT(hypervisor = fdt_add_subnode(fdt, 0, "hypervisor"));
    /* indicate KVM hypercall interface */
    _FDT(fdt_setprop_string(fdt, hypervisor, "compatible", "linux,kvm"));
    if (kvmppc_has_cap_fixup_hcalls()) {
        /*
         * Older KVM versions with older guest kernels were broken
         * with the magic page, don't allow the guest to map it.
         */
        if (!kvmppc_get_hypercall(first_cpu->env_ptr, hypercall,
                                  sizeof(hypercall))) {
            _FDT(fdt_setprop(fdt, hypervisor, "hcall-instructions",
                             hypercall, sizeof(hypercall)));
        }
    }
}

969 970 971
static void *spapr_build_fdt(sPAPRMachineState *spapr,
                             hwaddr rtas_addr,
                             hwaddr rtas_size)
972
{
973
    MachineState *machine = MACHINE(qdev_get_machine());
974
    MachineClass *mc = MACHINE_GET_CLASS(machine);
B
Bharata B Rao 已提交
975
    sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
976
    int ret;
977
    void *fdt;
978
    sPAPRPHBState *phb;
979
    char *buf;
980

981 982
    fdt = g_malloc0(FDT_MAX_SIZE);
    _FDT((fdt_create_empty_tree(fdt, FDT_MAX_SIZE)));
983

984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016
    /* Root node */
    _FDT(fdt_setprop_string(fdt, 0, "device_type", "chrp"));
    _FDT(fdt_setprop_string(fdt, 0, "model", "IBM pSeries (emulated by qemu)"));
    _FDT(fdt_setprop_string(fdt, 0, "compatible", "qemu,pseries"));

    /*
     * Add info to guest to indentify which host is it being run on
     * and what is the uuid of the guest
     */
    if (kvmppc_get_host_model(&buf)) {
        _FDT(fdt_setprop_string(fdt, 0, "host-model", buf));
        g_free(buf);
    }
    if (kvmppc_get_host_serial(&buf)) {
        _FDT(fdt_setprop_string(fdt, 0, "host-serial", buf));
        g_free(buf);
    }

    buf = qemu_uuid_unparse_strdup(&qemu_uuid);

    _FDT(fdt_setprop_string(fdt, 0, "vm,uuid", buf));
    if (qemu_uuid_set) {
        _FDT(fdt_setprop_string(fdt, 0, "system-id", buf));
    }
    g_free(buf);

    if (qemu_get_vm_name()) {
        _FDT(fdt_setprop_string(fdt, 0, "ibm,partition-name",
                                qemu_get_vm_name()));
    }

    _FDT(fdt_setprop_cell(fdt, 0, "#address-cells", 2));
    _FDT(fdt_setprop_cell(fdt, 0, "#size-cells", 2));
1017

1018
    /* /interrupt controller */
1019
    spapr_dt_xics(spapr->nr_servers, fdt, PHANDLE_XICP);
1020

1021 1022
    ret = spapr_populate_memory(spapr, fdt);
    if (ret < 0) {
1023
        error_report("couldn't setup memory nodes in fdt");
1024
        exit(1);
1025 1026
    }

1027 1028
    /* /vdevice */
    spapr_dt_vdevice(spapr->vio_bus, fdt);
1029

1030 1031 1032
    if (object_resolve_path_type("", TYPE_SPAPR_RNG, NULL)) {
        ret = spapr_rng_populate_dt(fdt);
        if (ret < 0) {
1033
            error_report("could not set up rng device in the fdt");
1034 1035 1036 1037
            exit(1);
        }
    }

1038
    QLIST_FOREACH(phb, &spapr->phbs, list) {
1039
        ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt);
1040 1041 1042 1043
        if (ret < 0) {
            error_report("couldn't setup PCI devices in fdt");
            exit(1);
        }
1044 1045
    }

1046 1047
    /* cpus */
    spapr_populate_cpus_dt_node(fdt, spapr);
1048

B
Bharata B Rao 已提交
1049 1050 1051 1052
    if (smc->dr_lmb_enabled) {
        _FDT(spapr_drc_populate_dt(fdt, 0, NULL, SPAPR_DR_CONNECTOR_TYPE_LMB));
    }

1053
    if (mc->has_hotpluggable_cpus) {
B
Bharata B Rao 已提交
1054 1055 1056 1057 1058 1059 1060 1061 1062
        int offset = fdt_path_offset(fdt, "/cpus");
        ret = spapr_drc_populate_dt(fdt, offset, NULL,
                                    SPAPR_DR_CONNECTOR_TYPE_CPU);
        if (ret < 0) {
            error_report("Couldn't set up CPU DR device tree properties");
            exit(1);
        }
    }

1063
    /* /event-sources */
1064
    spapr_dt_events(spapr, fdt);
1065

1066 1067 1068
    /* /rtas */
    spapr_dt_rtas(spapr, fdt);

1069 1070
    /* /chosen */
    spapr_dt_chosen(spapr, fdt);
1071

1072 1073 1074 1075 1076
    /* /hypervisor */
    if (kvm_enabled()) {
        spapr_dt_hypervisor(spapr, fdt);
    }

1077 1078 1079 1080 1081 1082 1083 1084
    /* Build memory reserve map */
    if (spapr->kernel_size) {
        _FDT((fdt_add_mem_rsv(fdt, KERNEL_LOAD_ADDR, spapr->kernel_size)));
    }
    if (spapr->initrd_size) {
        _FDT((fdt_add_mem_rsv(fdt, spapr->initrd_base, spapr->initrd_size)));
    }

1085 1086 1087 1088 1089 1090 1091
    /* ibm,client-architecture-support updates */
    ret = spapr_dt_cas_updates(spapr, fdt, spapr->ov5_cas);
    if (ret < 0) {
        error_report("couldn't setup CAS properties fdt");
        exit(1);
    }

1092
    return fdt;
1093 1094 1095 1096 1097 1098 1099
}

static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
{
    return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
}

1100 1101
static void emulate_spapr_hypercall(PPCVirtualHypervisor *vhyp,
                                    PowerPCCPU *cpu)
1102
{
1103 1104
    CPUPPCState *env = &cpu->env;

1105 1106 1107
    /* The TCG path should also be holding the BQL at this point */
    g_assert(qemu_mutex_iothread_locked());

1108 1109 1110 1111
    if (msr_pr) {
        hcall_dprintf("Hypercall made with MSR[PR]=1\n");
        env->gpr[3] = H_PRIVILEGE;
    } else {
1112
        env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]);
1113
    }
1114 1115
}

1116 1117 1118 1119 1120 1121 1122
static uint64_t spapr_get_patbe(PPCVirtualHypervisor *vhyp)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);

    return spapr->patb_entry;
}

1123 1124 1125 1126 1127 1128
#define HPTE(_table, _i)   (void *)(((uint64_t *)(_table)) + ((_i) * 2))
#define HPTE_VALID(_hpte)  (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
#define HPTE_DIRTY(_hpte)  (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
#define CLEAN_HPTE(_hpte)  ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
#define DIRTY_HPTE(_hpte)  ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))

1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146
/*
 * Get the fd to access the kernel htab, re-opening it if necessary
 */
static int get_htab_fd(sPAPRMachineState *spapr)
{
    if (spapr->htab_fd >= 0) {
        return spapr->htab_fd;
    }

    spapr->htab_fd = kvmppc_get_htab_fd(false);
    if (spapr->htab_fd < 0) {
        error_report("Unable to open fd for reading hash table from KVM: %s",
                     strerror(errno));
    }

    return spapr->htab_fd;
}

1147
void close_htab_fd(sPAPRMachineState *spapr)
1148 1149 1150 1151 1152 1153 1154
{
    if (spapr->htab_fd >= 0) {
        close(spapr->htab_fd);
    }
    spapr->htab_fd = -1;
}

1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210
static hwaddr spapr_hpt_mask(PPCVirtualHypervisor *vhyp)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);

    return HTAB_SIZE(spapr) / HASH_PTEG_SIZE_64 - 1;
}

static const ppc_hash_pte64_t *spapr_map_hptes(PPCVirtualHypervisor *vhyp,
                                                hwaddr ptex, int n)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);
    hwaddr pte_offset = ptex * HASH_PTE_SIZE_64;

    if (!spapr->htab) {
        /*
         * HTAB is controlled by KVM. Fetch into temporary buffer
         */
        ppc_hash_pte64_t *hptes = g_malloc(n * HASH_PTE_SIZE_64);
        kvmppc_read_hptes(hptes, ptex, n);
        return hptes;
    }

    /*
     * HTAB is controlled by QEMU. Just point to the internally
     * accessible PTEG.
     */
    return (const ppc_hash_pte64_t *)(spapr->htab + pte_offset);
}

static void spapr_unmap_hptes(PPCVirtualHypervisor *vhyp,
                              const ppc_hash_pte64_t *hptes,
                              hwaddr ptex, int n)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);

    if (!spapr->htab) {
        g_free((void *)hptes);
    }

    /* Nothing to do for qemu managed HPT */
}

static void spapr_store_hpte(PPCVirtualHypervisor *vhyp, hwaddr ptex,
                             uint64_t pte0, uint64_t pte1)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);
    hwaddr offset = ptex * HASH_PTE_SIZE_64;

    if (!spapr->htab) {
        kvmppc_write_hpte(ptex, pte0, pte1);
    } else {
        stq_p(spapr->htab + offset, pte0);
        stq_p(spapr->htab + offset + HASH_PTE_SIZE_64 / 2, pte1);
    }
}

1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223
static int spapr_hpt_shift_for_ramsize(uint64_t ramsize)
{
    int shift;

    /* We aim for a hash table of size 1/128 the size of RAM (rounded
     * up).  The PAPR recommendation is actually 1/64 of RAM size, but
     * that's much more than is needed for Linux guests */
    shift = ctz64(pow2ceil(ramsize)) - 7;
    shift = MAX(shift, 18); /* Minimum architected size */
    shift = MIN(shift, 46); /* Maximum architected size */
    return shift;
}

1224 1225
static void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift,
                                 Error **errp)
1226
{
1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248
    long rc;

    /* Clean up any HPT info from a previous boot */
    g_free(spapr->htab);
    spapr->htab = NULL;
    spapr->htab_shift = 0;
    close_htab_fd(spapr);

    rc = kvmppc_reset_htab(shift);
    if (rc < 0) {
        /* kernel-side HPT needed, but couldn't allocate one */
        error_setg_errno(errp, errno,
                         "Failed to allocate KVM HPT of order %d (try smaller maxmem?)",
                         shift);
        /* This is almost certainly fatal, but if the caller really
         * wants to carry on with shift == 0, it's welcome to try */
    } else if (rc > 0) {
        /* kernel-side HPT allocated */
        if (rc != shift) {
            error_setg(errp,
                       "Requested order %d HPT, but kernel allocated order %ld (try smaller maxmem?)",
                       shift, rc);
1249 1250
        }

1251
        spapr->htab_shift = shift;
1252
        spapr->htab = NULL;
1253
    } else {
1254 1255 1256
        /* kernel-side HPT not needed, allocate in userspace instead */
        size_t size = 1ULL << shift;
        int i;
1257

1258 1259 1260 1261 1262
        spapr->htab = qemu_memalign(size, size);
        if (!spapr->htab) {
            error_setg_errno(errp, errno,
                             "Could not allocate HPT of order %d", shift);
            return;
1263 1264
        }

1265 1266
        memset(spapr->htab, 0, size);
        spapr->htab_shift = shift;
1267

1268 1269
        for (i = 0; i < size / HASH_PTE_SIZE_64; i++) {
            DIRTY_HPTE(HPTE(spapr->htab, i));
1270
        }
1271
    }
1272 1273
}

1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286
void spapr_setup_hpt_and_vrma(sPAPRMachineState *spapr)
{
    spapr_reallocate_hpt(spapr,
                     spapr_hpt_shift_for_ramsize(MACHINE(spapr)->maxram_size),
                     &error_fatal);
    if (spapr->vrma_adjust) {
        spapr->rma_size = kvmppc_rma_size(spapr_node0_size(),
                                          spapr->htab_shift);
    }
    /* We're setting up a hash table, so that means we're not radix */
    spapr->patb_entry = 0;
}

1287
static void find_unknown_sysbus_device(SysBusDevice *sbdev, void *opaque)
1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301
{
    bool matched = false;

    if (object_dynamic_cast(OBJECT(sbdev), TYPE_SPAPR_PCI_HOST_BRIDGE)) {
        matched = true;
    }

    if (!matched) {
        error_report("Device %s is not supported by this machine yet.",
                     qdev_fw_name(DEVICE(sbdev)));
        exit(1);
    }
}

1302
static void ppc_spapr_reset(void)
1303
{
1304 1305
    MachineState *machine = MACHINE(qdev_get_machine());
    sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
1306
    PowerPCCPU *first_ppc_cpu;
1307
    uint32_t rtas_limit;
1308
    hwaddr rtas_addr, fdt_addr;
1309 1310
    void *fdt;
    int rc;
1311

1312 1313 1314
    /* Check for unknown sysbus devices */
    foreach_dynamic_sysbus_device(find_unknown_sysbus_device, NULL);

1315 1316 1317 1318 1319 1320 1321 1322
    if (kvm_enabled() && kvmppc_has_cap_mmu_radix()) {
        /* If using KVM with radix mode available, VCPUs can be started
         * without a HPT because KVM will start them in radix mode.
         * Set the GR bit in PATB so that we know there is no HPT. */
        spapr->patb_entry = PATBE1_GR;
    } else {
        spapr->patb_entry = 0;
        spapr_setup_hpt_and_vrma(spapr);
1323
    }
1324

1325
    qemu_devices_reset();
1326

1327 1328 1329 1330 1331 1332
    /*
     * We place the device tree and RTAS just below either the top of the RMA,
     * or just below 2GB, whichever is lowere, so that it can be
     * processed with 32-bit real mode code if necessary
     */
    rtas_limit = MIN(spapr->rma_size, RTAS_MAX_ADDR);
1333 1334
    rtas_addr = rtas_limit - RTAS_MAX_SIZE;
    fdt_addr = rtas_addr - FDT_MAX_SIZE;
1335

1336 1337 1338 1339 1340 1341 1342
    /* if this reset wasn't generated by CAS, we should reset our
     * negotiated options and start from scratch */
    if (!spapr->cas_reboot) {
        spapr_ovec_cleanup(spapr->ov5_cas);
        spapr->ov5_cas = spapr_ovec_new();
    }

1343
    fdt = spapr_build_fdt(spapr, rtas_addr, spapr->rtas_size);
1344

D
David Gibson 已提交
1345
    spapr_load_rtas(spapr, fdt, rtas_addr);
1346

1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359
    rc = fdt_pack(fdt);

    /* Should only fail if we've built a corrupted tree */
    assert(rc == 0);

    if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
        error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
                     fdt_totalsize(fdt), FDT_MAX_SIZE);
        exit(1);
    }

    /* Load the fdt */
    qemu_fdt_dumpdtb(fdt, fdt_totalsize(fdt));
1360
    cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
1361 1362
    g_free(fdt);

1363
    /* Set up the entry state */
1364
    first_ppc_cpu = POWERPC_CPU(first_cpu);
1365
    first_ppc_cpu->env.gpr[3] = fdt_addr;
1366 1367
    first_ppc_cpu->env.gpr[5] = 0;
    first_cpu->halted = 0;
1368
    first_ppc_cpu->env.nip = SPAPR_ENTRY_POINT;
1369

1370
    spapr->cas_reboot = false;
1371 1372
}

1373
static void spapr_create_nvram(sPAPRMachineState *spapr)
D
David Gibson 已提交
1374
{
1375
    DeviceState *dev = qdev_create(&spapr->vio_bus->bus, "spapr-nvram");
P
Paolo Bonzini 已提交
1376
    DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0);
D
David Gibson 已提交
1377

P
Paolo Bonzini 已提交
1378
    if (dinfo) {
1379 1380
        qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo),
                            &error_fatal);
D
David Gibson 已提交
1381 1382 1383 1384 1385 1386 1387
    }

    qdev_init_nofail(dev);

    spapr->nvram = (struct sPAPRNVRAM *)dev;
}

1388
static void spapr_rtc_create(sPAPRMachineState *spapr)
1389
{
1390 1391 1392 1393 1394 1395 1396
    object_initialize(&spapr->rtc, sizeof(spapr->rtc), TYPE_SPAPR_RTC);
    object_property_add_child(OBJECT(spapr), "rtc", OBJECT(&spapr->rtc),
                              &error_fatal);
    object_property_set_bool(OBJECT(&spapr->rtc), true, "realized",
                              &error_fatal);
    object_property_add_alias(OBJECT(spapr), "rtc-time", OBJECT(&spapr->rtc),
                              "date", &error_fatal);
1397 1398
}

1399
/* Returns whether we want to use VGA or not */
1400
static bool spapr_vga_init(PCIBus *pci_bus, Error **errp)
1401
{
1402 1403
    switch (vga_interface_type) {
    case VGA_NONE:
1404 1405 1406
        return false;
    case VGA_DEVICE:
        return true;
1407
    case VGA_STD:
1408
    case VGA_VIRTIO:
1409
        return pci_vga_init(pci_bus) != NULL;
1410
    default:
1411 1412 1413
        error_setg(errp,
                   "Unsupported VGA mode, only -vga std or -vga virtio is supported");
        return false;
1414 1415 1416
    }
}

1417 1418
static int spapr_post_load(void *opaque, int version_id)
{
1419
    sPAPRMachineState *spapr = (sPAPRMachineState *)opaque;
1420 1421
    int err = 0;

1422
    if (!object_dynamic_cast(OBJECT(spapr->ics), TYPE_ICS_KVM)) {
1423 1424 1425 1426
        CPUState *cs;
        CPU_FOREACH(cs) {
            PowerPCCPU *cpu = POWERPC_CPU(cs);
            icp_resend(ICP(cpu->intc));
1427 1428 1429
        }
    }

S
Stefan Weil 已提交
1430
    /* In earlier versions, there was no separate qdev for the PAPR
1431 1432 1433 1434
     * RTC, so the RTC offset was stored directly in sPAPREnvironment.
     * So when migrating from those versions, poke the incoming offset
     * value into the RTC device */
    if (version_id < 3) {
1435
        err = spapr_rtc_import_offset(&spapr->rtc, spapr->rtc_offset);
1436 1437 1438 1439 1440 1441 1442 1443 1444 1445
    }

    return err;
}

static bool version_before_3(void *opaque, int version_id)
{
    return version_id < 3;
}

1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507
static bool spapr_ov5_cas_needed(void *opaque)
{
    sPAPRMachineState *spapr = opaque;
    sPAPROptionVector *ov5_mask = spapr_ovec_new();
    sPAPROptionVector *ov5_legacy = spapr_ovec_new();
    sPAPROptionVector *ov5_removed = spapr_ovec_new();
    bool cas_needed;

    /* Prior to the introduction of sPAPROptionVector, we had two option
     * vectors we dealt with: OV5_FORM1_AFFINITY, and OV5_DRCONF_MEMORY.
     * Both of these options encode machine topology into the device-tree
     * in such a way that the now-booted OS should still be able to interact
     * appropriately with QEMU regardless of what options were actually
     * negotiatied on the source side.
     *
     * As such, we can avoid migrating the CAS-negotiated options if these
     * are the only options available on the current machine/platform.
     * Since these are the only options available for pseries-2.7 and
     * earlier, this allows us to maintain old->new/new->old migration
     * compatibility.
     *
     * For QEMU 2.8+, there are additional CAS-negotiatable options available
     * via default pseries-2.8 machines and explicit command-line parameters.
     * Some of these options, like OV5_HP_EVT, *do* require QEMU to be aware
     * of the actual CAS-negotiated values to continue working properly. For
     * example, availability of memory unplug depends on knowing whether
     * OV5_HP_EVT was negotiated via CAS.
     *
     * Thus, for any cases where the set of available CAS-negotiatable
     * options extends beyond OV5_FORM1_AFFINITY and OV5_DRCONF_MEMORY, we
     * include the CAS-negotiated options in the migration stream.
     */
    spapr_ovec_set(ov5_mask, OV5_FORM1_AFFINITY);
    spapr_ovec_set(ov5_mask, OV5_DRCONF_MEMORY);

    /* spapr_ovec_diff returns true if bits were removed. we avoid using
     * the mask itself since in the future it's possible "legacy" bits may be
     * removed via machine options, which could generate a false positive
     * that breaks migration.
     */
    spapr_ovec_intersect(ov5_legacy, spapr->ov5, ov5_mask);
    cas_needed = spapr_ovec_diff(ov5_removed, spapr->ov5, ov5_legacy);

    spapr_ovec_cleanup(ov5_mask);
    spapr_ovec_cleanup(ov5_legacy);
    spapr_ovec_cleanup(ov5_removed);

    return cas_needed;
}

static const VMStateDescription vmstate_spapr_ov5_cas = {
    .name = "spapr_option_vector_ov5_cas",
    .version_id = 1,
    .minimum_version_id = 1,
    .needed = spapr_ov5_cas_needed,
    .fields = (VMStateField[]) {
        VMSTATE_STRUCT_POINTER_V(ov5_cas, sPAPRMachineState, 1,
                                 vmstate_spapr_ovec, sPAPROptionVector),
        VMSTATE_END_OF_LIST()
    },
};

1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525
static bool spapr_patb_entry_needed(void *opaque)
{
    sPAPRMachineState *spapr = opaque;

    return !!spapr->patb_entry;
}

static const VMStateDescription vmstate_spapr_patb_entry = {
    .name = "spapr_patb_entry",
    .version_id = 1,
    .minimum_version_id = 1,
    .needed = spapr_patb_entry_needed,
    .fields = (VMStateField[]) {
        VMSTATE_UINT64(patb_entry, sPAPRMachineState),
        VMSTATE_END_OF_LIST()
    },
};

1526 1527
static const VMStateDescription vmstate_spapr = {
    .name = "spapr",
1528
    .version_id = 3,
1529
    .minimum_version_id = 1,
1530
    .post_load = spapr_post_load,
1531
    .fields = (VMStateField[]) {
1532 1533
        /* used to be @next_irq */
        VMSTATE_UNUSED_BUFFER(version_before_3, 0, 4),
1534 1535

        /* RTC offset */
1536
        VMSTATE_UINT64_TEST(rtc_offset, sPAPRMachineState, version_before_3),
1537

1538
        VMSTATE_PPC_TIMEBASE_V(tb, sPAPRMachineState, 2),
1539 1540
        VMSTATE_END_OF_LIST()
    },
1541 1542
    .subsections = (const VMStateDescription*[]) {
        &vmstate_spapr_ov5_cas,
1543
        &vmstate_spapr_patb_entry,
1544 1545
        NULL
    }
1546 1547 1548 1549
};

static int htab_save_setup(QEMUFile *f, void *opaque)
{
1550
    sPAPRMachineState *spapr = opaque;
1551 1552 1553 1554

    /* "Iteration" header */
    qemu_put_be32(f, spapr->htab_shift);

1555 1556 1557 1558 1559 1560 1561 1562
    if (spapr->htab) {
        spapr->htab_save_index = 0;
        spapr->htab_first_pass = true;
    } else {
        assert(kvm_enabled());
    }


1563 1564 1565
    return 0;
}

1566
static void htab_save_first_pass(QEMUFile *f, sPAPRMachineState *spapr,
1567 1568
                                 int64_t max_ns)
{
1569
    bool has_timeout = max_ns != -1;
1570 1571
    int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64;
    int index = spapr->htab_save_index;
1572
    int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
1573 1574 1575 1576 1577 1578 1579 1580 1581 1582

    assert(spapr->htab_first_pass);

    do {
        int chunkstart;

        /* Consume invalid HPTEs */
        while ((index < htabslots)
               && !HPTE_VALID(HPTE(spapr->htab, index))) {
            CLEAN_HPTE(HPTE(spapr->htab, index));
M
Marc-André Lureau 已提交
1583
            index++;
1584 1585 1586 1587
        }

        /* Consume valid HPTEs */
        chunkstart = index;
1588
        while ((index < htabslots) && (index - chunkstart < USHRT_MAX)
1589 1590
               && HPTE_VALID(HPTE(spapr->htab, index))) {
            CLEAN_HPTE(HPTE(spapr->htab, index));
M
Marc-André Lureau 已提交
1591
            index++;
1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602
        }

        if (index > chunkstart) {
            int n_valid = index - chunkstart;

            qemu_put_be32(f, chunkstart);
            qemu_put_be16(f, n_valid);
            qemu_put_be16(f, 0);
            qemu_put_buffer(f, HPTE(spapr->htab, chunkstart),
                            HASH_PTE_SIZE_64 * n_valid);

1603 1604
            if (has_timeout &&
                (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) {
1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617
                break;
            }
        }
    } while ((index < htabslots) && !qemu_file_rate_limit(f));

    if (index >= htabslots) {
        assert(index == htabslots);
        index = 0;
        spapr->htab_first_pass = false;
    }
    spapr->htab_save_index = index;
}

1618
static int htab_save_later_pass(QEMUFile *f, sPAPRMachineState *spapr,
1619
                                int64_t max_ns)
1620 1621 1622 1623 1624
{
    bool final = max_ns < 0;
    int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64;
    int examined = 0, sent = 0;
    int index = spapr->htab_save_index;
1625
    int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640

    assert(!spapr->htab_first_pass);

    do {
        int chunkstart, invalidstart;

        /* Consume non-dirty HPTEs */
        while ((index < htabslots)
               && !HPTE_DIRTY(HPTE(spapr->htab, index))) {
            index++;
            examined++;
        }

        chunkstart = index;
        /* Consume valid dirty HPTEs */
1641
        while ((index < htabslots) && (index - chunkstart < USHRT_MAX)
1642 1643 1644 1645 1646 1647 1648 1649 1650
               && HPTE_DIRTY(HPTE(spapr->htab, index))
               && HPTE_VALID(HPTE(spapr->htab, index))) {
            CLEAN_HPTE(HPTE(spapr->htab, index));
            index++;
            examined++;
        }

        invalidstart = index;
        /* Consume invalid dirty HPTEs */
1651
        while ((index < htabslots) && (index - invalidstart < USHRT_MAX)
1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669
               && HPTE_DIRTY(HPTE(spapr->htab, index))
               && !HPTE_VALID(HPTE(spapr->htab, index))) {
            CLEAN_HPTE(HPTE(spapr->htab, index));
            index++;
            examined++;
        }

        if (index > chunkstart) {
            int n_valid = invalidstart - chunkstart;
            int n_invalid = index - invalidstart;

            qemu_put_be32(f, chunkstart);
            qemu_put_be16(f, n_valid);
            qemu_put_be16(f, n_invalid);
            qemu_put_buffer(f, HPTE(spapr->htab, chunkstart),
                            HASH_PTE_SIZE_64 * n_valid);
            sent += index - chunkstart;

1670
            if (!final && (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) {
1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691
                break;
            }
        }

        if (examined >= htabslots) {
            break;
        }

        if (index >= htabslots) {
            assert(index == htabslots);
            index = 0;
        }
    } while ((examined < htabslots) && (!qemu_file_rate_limit(f) || final));

    if (index >= htabslots) {
        assert(index == htabslots);
        index = 0;
    }

    spapr->htab_save_index = index;

1692
    return (examined >= htabslots) && (sent == 0) ? 1 : 0;
1693 1694
}

1695 1696 1697
#define MAX_ITERATION_NS    5000000 /* 5 ms */
#define MAX_KVM_BUF_SIZE    2048

1698 1699
static int htab_save_iterate(QEMUFile *f, void *opaque)
{
1700
    sPAPRMachineState *spapr = opaque;
1701
    int fd;
1702
    int rc = 0;
1703 1704 1705 1706

    /* Iteration header */
    qemu_put_be32(f, 0);

1707 1708 1709
    if (!spapr->htab) {
        assert(kvm_enabled());

1710 1711 1712
        fd = get_htab_fd(spapr);
        if (fd < 0) {
            return fd;
1713 1714
        }

1715
        rc = kvmppc_save_htab(f, fd, MAX_KVM_BUF_SIZE, MAX_ITERATION_NS);
1716 1717 1718 1719
        if (rc < 0) {
            return rc;
        }
    } else  if (spapr->htab_first_pass) {
1720 1721
        htab_save_first_pass(f, spapr, MAX_ITERATION_NS);
    } else {
1722
        rc = htab_save_later_pass(f, spapr, MAX_ITERATION_NS);
1723 1724 1725 1726 1727 1728 1729
    }

    /* End marker */
    qemu_put_be32(f, 0);
    qemu_put_be16(f, 0);
    qemu_put_be16(f, 0);

1730
    return rc;
1731 1732 1733 1734
}

static int htab_save_complete(QEMUFile *f, void *opaque)
{
1735
    sPAPRMachineState *spapr = opaque;
1736
    int fd;
1737 1738 1739 1740

    /* Iteration header */
    qemu_put_be32(f, 0);

1741 1742 1743 1744 1745
    if (!spapr->htab) {
        int rc;

        assert(kvm_enabled());

1746 1747 1748
        fd = get_htab_fd(spapr);
        if (fd < 0) {
            return fd;
1749 1750
        }

1751
        rc = kvmppc_save_htab(f, fd, MAX_KVM_BUF_SIZE, -1);
1752 1753 1754 1755
        if (rc < 0) {
            return rc;
        }
    } else {
1756 1757 1758
        if (spapr->htab_first_pass) {
            htab_save_first_pass(f, spapr, -1);
        }
1759 1760
        htab_save_later_pass(f, spapr, -1);
    }
1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771

    /* End marker */
    qemu_put_be32(f, 0);
    qemu_put_be16(f, 0);
    qemu_put_be16(f, 0);

    return 0;
}

static int htab_load(QEMUFile *f, void *opaque, int version_id)
{
1772
    sPAPRMachineState *spapr = opaque;
1773
    uint32_t section_hdr;
1774
    int fd = -1;
1775 1776

    if (version_id < 1 || version_id > 1) {
1777
        error_report("htab_load() bad version");
1778 1779 1780 1781 1782 1783
        return -EINVAL;
    }

    section_hdr = qemu_get_be32(f);

    if (section_hdr) {
1784
        Error *local_err = NULL;
1785 1786 1787 1788 1789

        /* First section gives the htab size */
        spapr_reallocate_hpt(spapr, section_hdr, &local_err);
        if (local_err) {
            error_report_err(local_err);
1790 1791 1792 1793 1794
            return -EINVAL;
        }
        return 0;
    }

1795 1796 1797 1798 1799
    if (!spapr->htab) {
        assert(kvm_enabled());

        fd = kvmppc_get_htab_fd(true);
        if (fd < 0) {
1800 1801
            error_report("Unable to open fd to restore KVM hash table: %s",
                         strerror(errno));
1802 1803 1804
        }
    }

1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817
    while (true) {
        uint32_t index;
        uint16_t n_valid, n_invalid;

        index = qemu_get_be32(f);
        n_valid = qemu_get_be16(f);
        n_invalid = qemu_get_be16(f);

        if ((index == 0) && (n_valid == 0) && (n_invalid == 0)) {
            /* End of Stream */
            break;
        }

1818
        if ((index + n_valid + n_invalid) >
1819 1820
            (HTAB_SIZE(spapr) / HASH_PTE_SIZE_64)) {
            /* Bad index in stream */
1821 1822 1823
            error_report(
                "htab_load() bad index %d (%hd+%hd entries) in htab stream (htab_shift=%d)",
                index, n_valid, n_invalid, spapr->htab_shift);
1824 1825 1826
            return -EINVAL;
        }

1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844
        if (spapr->htab) {
            if (n_valid) {
                qemu_get_buffer(f, HPTE(spapr->htab, index),
                                HASH_PTE_SIZE_64 * n_valid);
            }
            if (n_invalid) {
                memset(HPTE(spapr->htab, index + n_valid), 0,
                       HASH_PTE_SIZE_64 * n_invalid);
            }
        } else {
            int rc;

            assert(fd >= 0);

            rc = kvmppc_load_htab_chunk(f, fd, index, n_valid, n_invalid);
            if (rc < 0) {
                return rc;
            }
1845 1846 1847
        }
    }

1848 1849 1850 1851 1852
    if (!spapr->htab) {
        assert(fd >= 0);
        close(fd);
    }

1853 1854 1855
    return 0;
}

1856 1857 1858 1859 1860 1861 1862
static void htab_cleanup(void *opaque)
{
    sPAPRMachineState *spapr = opaque;

    close_htab_fd(spapr);
}

1863 1864 1865
static SaveVMHandlers savevm_htab_handlers = {
    .save_live_setup = htab_save_setup,
    .save_live_iterate = htab_save_iterate,
1866
    .save_live_complete_precopy = htab_save_complete,
1867
    .cleanup = htab_cleanup,
1868 1869 1870
    .load_state = htab_load,
};

1871 1872 1873 1874 1875 1876 1877
static void spapr_boot_set(void *opaque, const char *boot_device,
                           Error **errp)
{
    MachineState *machine = MACHINE(qdev_get_machine());
    machine->boot_order = g_strdup(boot_device);
}

D
David Gibson 已提交
1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899
/*
 * Reset routine for LMB DR devices.
 *
 * Unlike PCI DR devices, LMB DR devices explicitly register this reset
 * routine. Reset for PCI DR devices will be handled by PHB reset routine
 * when it walks all its children devices. LMB devices reset occurs
 * as part of spapr_ppc_reset().
 */
static void spapr_drc_reset(void *opaque)
{
    sPAPRDRConnector *drc = opaque;
    DeviceState *d = DEVICE(drc);

    if (d) {
        device_reset(d);
    }
}

static void spapr_create_lmb_dr_connectors(sPAPRMachineState *spapr)
{
    MachineState *machine = MACHINE(spapr);
    uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE;
1900
    uint32_t nr_lmbs = (machine->maxram_size - machine->ram_size)/lmb_size;
D
David Gibson 已提交
1901 1902 1903 1904 1905 1906
    int i;

    for (i = 0; i < nr_lmbs; i++) {
        sPAPRDRConnector *drc;
        uint64_t addr;

1907
        addr = i * lmb_size + spapr->hotplug_memory.base;
D
David Gibson 已提交
1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918
        drc = spapr_dr_connector_new(OBJECT(spapr), SPAPR_DR_CONNECTOR_TYPE_LMB,
                                     addr/lmb_size);
        qemu_register_reset(spapr_drc_reset, drc);
    }
}

/*
 * If RAM size, maxmem size and individual node mem sizes aren't aligned
 * to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest
 * since we can't support such unaligned sizes with DRCONF_MEMORY.
 */
1919
static void spapr_validate_node_memory(MachineState *machine, Error **errp)
D
David Gibson 已提交
1920 1921 1922
{
    int i;

1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936
    if (machine->ram_size % SPAPR_MEMORY_BLOCK_SIZE) {
        error_setg(errp, "Memory size 0x" RAM_ADDR_FMT
                   " is not aligned to %llu MiB",
                   machine->ram_size,
                   SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
        return;
    }

    if (machine->maxram_size % SPAPR_MEMORY_BLOCK_SIZE) {
        error_setg(errp, "Maximum memory size 0x" RAM_ADDR_FMT
                   " is not aligned to %llu MiB",
                   machine->ram_size,
                   SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
        return;
D
David Gibson 已提交
1937 1938 1939 1940
    }

    for (i = 0; i < nb_numa_nodes; i++) {
        if (numa_info[i].node_mem % SPAPR_MEMORY_BLOCK_SIZE) {
1941 1942 1943 1944 1945 1946
            error_setg(errp,
                       "Node %d memory size 0x%" PRIx64
                       " is not aligned to %llu MiB",
                       i, numa_info[i].node_mem,
                       SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
            return;
D
David Gibson 已提交
1947 1948 1949 1950
        }
    }
}

1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964
/* find cpu slot in machine->possible_cpus by core_id */
static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *idx)
{
    int index = id / smp_threads;

    if (index >= ms->possible_cpus->len) {
        return NULL;
    }
    if (idx) {
        *idx = index;
    }
    return &ms->possible_cpus->cpus[index];
}

1965 1966 1967 1968 1969 1970
static void spapr_init_cpus(sPAPRMachineState *spapr)
{
    MachineState *machine = MACHINE(spapr);
    MachineClass *mc = MACHINE_GET_CLASS(machine);
    char *type = spapr_get_cpu_core_type(machine->cpu_model);
    int smt = kvmppc_smt_threads();
1971 1972
    const CPUArchIdList *possible_cpus;
    int boot_cores_nr = smp_cpus / smp_threads;
1973 1974 1975 1976 1977 1978 1979
    int i;

    if (!type) {
        error_report("Unable to find sPAPR CPU Core definition");
        exit(1);
    }

1980
    possible_cpus = mc->possible_cpu_arch_ids(machine);
1981
    if (mc->has_hotpluggable_cpus) {
1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996
        if (smp_cpus % smp_threads) {
            error_report("smp_cpus (%u) must be multiple of threads (%u)",
                         smp_cpus, smp_threads);
            exit(1);
        }
        if (max_cpus % smp_threads) {
            error_report("max_cpus (%u) must be multiple of threads (%u)",
                         max_cpus, smp_threads);
            exit(1);
        }
    } else {
        if (max_cpus != smp_cpus) {
            error_report("This machine version does not support CPU hotplug");
            exit(1);
        }
1997
        boot_cores_nr = possible_cpus->len;
1998 1999
    }

2000
    for (i = 0; i < possible_cpus->len; i++) {
2001 2002
        int core_id = i * smp_threads;

2003
        if (mc->has_hotpluggable_cpus) {
2004 2005 2006 2007 2008 2009 2010 2011
            sPAPRDRConnector *drc =
                spapr_dr_connector_new(OBJECT(spapr),
                                       SPAPR_DR_CONNECTOR_TYPE_CPU,
                                       (core_id / smp_threads) * smt);

            qemu_register_reset(spapr_drc_reset, drc);
        }

2012
        if (i < boot_cores_nr) {
2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030
            Object *core  = object_new(type);
            int nr_threads = smp_threads;

            /* Handle the partially filled core for older machine types */
            if ((i + 1) * smp_threads >= smp_cpus) {
                nr_threads = smp_cpus - i * smp_threads;
            }

            object_property_set_int(core, nr_threads, "nr-threads",
                                    &error_fatal);
            object_property_set_int(core, core_id, CPU_CORE_PROP_CORE_ID,
                                    &error_fatal);
            object_property_set_bool(core, true, "realized", &error_fatal);
        }
    }
    g_free(type);
}

2031
/* pSeries LPAR / sPAPR hardware init */
2032
static void ppc_spapr_init(MachineState *machine)
2033
{
2034
    sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
D
David Gibson 已提交
2035
    sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
2036 2037
    const char *kernel_filename = machine->kernel_filename;
    const char *initrd_filename = machine->initrd_filename;
2038
    PCIHostState *phb;
2039
    int i;
A
Avi Kivity 已提交
2040 2041
    MemoryRegion *sysmem = get_system_memory();
    MemoryRegion *ram = g_new(MemoryRegion, 1);
2042 2043
    MemoryRegion *rma_region;
    void *rma = NULL;
A
Avi Kivity 已提交
2044
    hwaddr rma_alloc_size;
2045
    hwaddr node0_size = spapr_node0_size();
2046
    long load_limit, fw_size;
2047
    char *filename;
2048
    int smt = kvmppc_smt_threads();
2049

2050
    msi_nonbroken = true;
2051

2052 2053
    QLIST_INIT(&spapr->phbs);

2054
    /* Allocate RMA if necessary */
2055
    rma_alloc_size = kvmppc_alloc_rma(&rma);
2056 2057

    if (rma_alloc_size == -1) {
2058
        error_report("Unable to create RMA");
2059 2060
        exit(1);
    }
2061

2062
    if (rma_alloc_size && (rma_alloc_size < node0_size)) {
2063
        spapr->rma_size = rma_alloc_size;
2064
    } else {
2065
        spapr->rma_size = node0_size;
2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079

        /* With KVM, we don't actually know whether KVM supports an
         * unbounded RMA (PR KVM) or is limited by the hash table size
         * (HV KVM using VRMA), so we always assume the latter
         *
         * In that case, we also limit the initial allocations for RTAS
         * etc... to 256M since we have no way to know what the VRMA size
         * is going to be as it depends on the size of the hash table
         * isn't determined yet.
         */
        if (kvm_enabled()) {
            spapr->vrma_adjust = 1;
            spapr->rma_size = MIN(spapr->rma_size, 0x10000000);
        }
2080 2081 2082 2083 2084 2085 2086

        /* Actually we don't support unbounded RMA anymore since we
         * added proper emulation of HV mode. The max we can get is
         * 16G which also happens to be what we configure for PAPR
         * mode so make sure we don't do anything bigger than that
         */
        spapr->rma_size = MIN(spapr->rma_size, 0x400000000ull);
2087 2088
    }

2089
    if (spapr->rma_size > node0_size) {
2090 2091
        error_report("Numa node 0 has to span the RMA (%#08"HWADDR_PRIx")",
                     spapr->rma_size);
2092 2093 2094
        exit(1);
    }

2095 2096
    /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
    load_limit = MIN(spapr->rma_size, RTAS_MAX_ADDR) - FW_OVERHEAD;
2097

2098
    /* Set up Interrupt Controller before we create the VCPUs */
2099 2100
    xics_system_init(machine, DIV_ROUND_UP(max_cpus * smt, smp_threads),
                     XICS_IRQS_SPAPR, &error_fatal);
2101

2102 2103 2104 2105
    /* Set up containers for ibm,client-set-architecture negotiated options */
    spapr->ov5 = spapr_ovec_new();
    spapr->ov5_cas = spapr_ovec_new();

D
David Gibson 已提交
2106
    if (smc->dr_lmb_enabled) {
2107
        spapr_ovec_set(spapr->ov5, OV5_DRCONF_MEMORY);
2108
        spapr_validate_node_memory(machine, &error_fatal);
D
David Gibson 已提交
2109 2110
    }

2111
    spapr_ovec_set(spapr->ov5, OV5_FORM1_AFFINITY);
2112 2113 2114 2115 2116
    if (kvmppc_has_cap_mmu_radix()) {
        /* KVM always allows GTSE with radix... */
        spapr_ovec_set(spapr->ov5, OV5_MMU_RADIX_GTSE);
    }
    /* ... but not with hash (currently). */
2117

2118 2119 2120 2121 2122
    /* advertise support for dedicated HP event source to guests */
    if (spapr->use_hotplug_event_source) {
        spapr_ovec_set(spapr->ov5, OV5_HP_EVT);
    }

2123
    /* init CPUs */
2124
    if (machine->cpu_model == NULL) {
2125
        machine->cpu_model = kvm_enabled() ? "host" : smc->tcg_default_cpu;
2126
    }
2127

G
Greg Kurz 已提交
2128 2129
    ppc_cpu_parse_features(machine->cpu_model);

2130
    spapr_init_cpus(spapr);
2131

2132 2133 2134
    if (kvm_enabled()) {
        /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
        kvmppc_enable_logical_ci_hcalls();
2135
        kvmppc_enable_set_mode_hcall();
2136 2137 2138

        /* H_CLEAR_MOD/_REF are mandatory in PAPR, but off by default */
        kvmppc_enable_clear_ref_mod_hcalls();
2139 2140
    }

2141
    /* allocate RAM */
2142
    memory_region_allocate_system_memory(ram, NULL, "ppc_spapr.ram",
2143
                                         machine->ram_size);
2144
    memory_region_add_subregion(sysmem, 0, ram);
2145

2146 2147 2148 2149 2150 2151 2152 2153
    if (rma_alloc_size && rma) {
        rma_region = g_new(MemoryRegion, 1);
        memory_region_init_ram_ptr(rma_region, NULL, "ppc_spapr.rma",
                                   rma_alloc_size, rma);
        vmstate_register_ram_global(rma_region);
        memory_region_add_subregion(sysmem, 0, rma_region);
    }

2154 2155 2156
    /* initialize hotplug memory address space */
    if (machine->ram_size < machine->maxram_size) {
        ram_addr_t hotplug_mem_size = machine->maxram_size - machine->ram_size;
2157 2158 2159 2160 2161 2162 2163
        /*
         * Limit the number of hotpluggable memory slots to half the number
         * slots that KVM supports, leaving the other half for PCI and other
         * devices. However ensure that number of slots doesn't drop below 32.
         */
        int max_memslots = kvm_enabled() ? kvm_get_max_memslots() / 2 :
                           SPAPR_MAX_RAM_SLOTS;
2164

2165 2166 2167 2168
        if (max_memslots < SPAPR_MAX_RAM_SLOTS) {
            max_memslots = SPAPR_MAX_RAM_SLOTS;
        }
        if (machine->ram_slots > max_memslots) {
2169 2170
            error_report("Specified number of memory slots %"
                         PRIu64" exceeds max supported %d",
2171
                         machine->ram_slots, max_memslots);
2172
            exit(1);
2173 2174 2175 2176 2177 2178 2179 2180 2181 2182
        }

        spapr->hotplug_memory.base = ROUND_UP(machine->ram_size,
                                              SPAPR_HOTPLUG_MEM_ALIGN);
        memory_region_init(&spapr->hotplug_memory.mr, OBJECT(spapr),
                           "hotplug-memory", hotplug_mem_size);
        memory_region_add_subregion(sysmem, spapr->hotplug_memory.base,
                                    &spapr->hotplug_memory.mr);
    }

D
David Gibson 已提交
2183 2184 2185 2186
    if (smc->dr_lmb_enabled) {
        spapr_create_lmb_dr_connectors(spapr);
    }

2187
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
2188
    if (!filename) {
2189
        error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
2190 2191
        exit(1);
    }
2192
    spapr->rtas_size = get_image_size(filename);
2193 2194 2195 2196
    if (spapr->rtas_size < 0) {
        error_report("Could not get size of LPAR rtas '%s'", filename);
        exit(1);
    }
2197 2198
    spapr->rtas_blob = g_malloc(spapr->rtas_size);
    if (load_image_size(filename, spapr->rtas_blob, spapr->rtas_size) < 0) {
2199
        error_report("Could not load LPAR rtas '%s'", filename);
2200 2201
        exit(1);
    }
2202
    if (spapr->rtas_size > RTAS_MAX_SIZE) {
2203 2204
        error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
                     (size_t)spapr->rtas_size, RTAS_MAX_SIZE);
2205 2206
        exit(1);
    }
2207
    g_free(filename);
2208

2209
    /* Set up RTAS event infrastructure */
2210 2211
    spapr_events_init(spapr);

2212
    /* Set up the RTC RTAS interfaces */
2213
    spapr_rtc_create(spapr);
2214

2215
    /* Set up VIO bus */
2216 2217
    spapr->vio_bus = spapr_vio_bus_init();

P
Paolo Bonzini 已提交
2218
    for (i = 0; i < MAX_SERIAL_PORTS; i++) {
2219
        if (serial_hds[i]) {
2220
            spapr_vty_create(spapr->vio_bus, serial_hds[i]);
2221 2222
        }
    }
2223

D
David Gibson 已提交
2224 2225 2226
    /* We always have at least the nvram device on VIO */
    spapr_create_nvram(spapr);

2227
    /* Set up PCI */
2228 2229
    spapr_pci_rtas_init();

2230
    phb = spapr_create_phb(spapr, 0);
2231

P
Paolo Bonzini 已提交
2232
    for (i = 0; i < nb_nics; i++) {
2233 2234 2235
        NICInfo *nd = &nd_table[i];

        if (!nd->model) {
2236
            nd->model = g_strdup("ibmveth");
2237 2238 2239
        }

        if (strcmp(nd->model, "ibmveth") == 0) {
2240
            spapr_vlan_create(spapr->vio_bus, nd);
2241
        } else {
2242
            pci_nic_init_nofail(&nd_table[i], phb->bus, nd->model, NULL);
2243 2244 2245
        }
    }

2246
    for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
2247
        spapr_vscsi_create(spapr->vio_bus);
2248 2249
    }

2250
    /* Graphics */
2251
    if (spapr_vga_init(phb->bus, &error_fatal)) {
2252
        spapr->has_graphics = true;
2253
        machine->usb |= defaults_enabled() && !machine->usb_disabled;
2254 2255
    }

2256
    if (machine->usb) {
2257 2258 2259 2260 2261
        if (smc->use_ohci_by_default) {
            pci_create_simple(phb->bus, -1, "pci-ohci");
        } else {
            pci_create_simple(phb->bus, -1, "nec-usb-xhci");
        }
2262

2263
        if (spapr->has_graphics) {
2264 2265 2266 2267
            USBBus *usb_bus = usb_bus_find(-1);

            usb_create_simple(usb_bus, "usb-kbd");
            usb_create_simple(usb_bus, "usb-mouse");
2268 2269 2270
        }
    }

2271
    if (spapr->rma_size < (MIN_RMA_SLOF << 20)) {
2272 2273 2274
        error_report(
            "pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)",
            MIN_RMA_SLOF);
2275 2276 2277
        exit(1);
    }

2278 2279 2280
    if (kernel_filename) {
        uint64_t lowaddr = 0;

2281 2282 2283 2284 2285 2286 2287 2288 2289
        spapr->kernel_size = load_elf(kernel_filename, translate_kernel_address,
                                      NULL, NULL, &lowaddr, NULL, 1,
                                      PPC_ELF_MACHINE, 0, 0);
        if (spapr->kernel_size == ELF_LOAD_WRONG_ENDIAN) {
            spapr->kernel_size = load_elf(kernel_filename,
                                          translate_kernel_address, NULL, NULL,
                                          &lowaddr, NULL, 0, PPC_ELF_MACHINE,
                                          0, 0);
            spapr->kernel_le = spapr->kernel_size > 0;
2290
        }
2291 2292 2293
        if (spapr->kernel_size < 0) {
            error_report("error loading %s: %s", kernel_filename,
                         load_elf_strerror(spapr->kernel_size));
2294 2295 2296 2297 2298
            exit(1);
        }

        /* load initrd */
        if (initrd_filename) {
2299 2300 2301
            /* Try to locate the initrd in the gap between the kernel
             * and the firmware. Add a bit of space just in case
             */
2302 2303 2304 2305 2306 2307 2308
            spapr->initrd_base = (KERNEL_LOAD_ADDR + spapr->kernel_size
                                  + 0x1ffff) & ~0xffff;
            spapr->initrd_size = load_image_targphys(initrd_filename,
                                                     spapr->initrd_base,
                                                     load_limit
                                                     - spapr->initrd_base);
            if (spapr->initrd_size < 0) {
2309 2310
                error_report("could not load initial ram disk '%s'",
                             initrd_filename);
2311 2312 2313
                exit(1);
            }
        }
2314
    }
2315

2316 2317 2318 2319
    if (bios_name == NULL) {
        bios_name = FW_FILE_NAME;
    }
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
2320
    if (!filename) {
2321
        error_report("Could not find LPAR firmware '%s'", bios_name);
2322 2323
        exit(1);
    }
2324
    fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
2325 2326
    if (fw_size <= 0) {
        error_report("Could not load LPAR firmware '%s'", filename);
2327 2328 2329 2330
        exit(1);
    }
    g_free(filename);

2331 2332 2333
    /* FIXME: Should register things through the MachineState's qdev
     * interface, this is a legacy from the sPAPREnvironment structure
     * which predated MachineState but had a similar function */
2334 2335 2336 2337
    vmstate_register(NULL, 0, &vmstate_spapr, spapr);
    register_savevm_live(NULL, "spapr/htab", -1, 1,
                         &savevm_htab_handlers, spapr);

2338 2339 2340 2341
    /* used by RTAS */
    QTAILQ_INIT(&spapr->ccs_list);
    qemu_register_reset(spapr_ccs_reset_hook, spapr);

2342
    qemu_register_boot_set(spapr_boot_set, spapr);
2343 2344

    if (kvm_enabled()) {
2345
        /* to stop and start vmclock */
2346 2347
        qemu_add_vm_change_state_handler(cpu_ppc_clock_vm_state_change,
                                         &spapr->tb);
2348 2349

        kvmppc_spapr_enable_inkernel_multitce();
2350
    }
2351 2352
}

2353 2354 2355 2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370
static int spapr_kvm_type(const char *vm_type)
{
    if (!vm_type) {
        return 0;
    }

    if (!strcmp(vm_type, "HV")) {
        return 1;
    }

    if (!strcmp(vm_type, "PR")) {
        return 2;
    }

    error_report("Unknown kvm-type specified '%s'", vm_type);
    exit(1);
}

2371
/*
2372
 * Implementation of an interface to adjust firmware path
2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390 2391 2392 2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419
 * for the bootindex property handling.
 */
static char *spapr_get_fw_dev_path(FWPathProvider *p, BusState *bus,
                                   DeviceState *dev)
{
#define CAST(type, obj, name) \
    ((type *)object_dynamic_cast(OBJECT(obj), (name)))
    SCSIDevice *d = CAST(SCSIDevice,  dev, TYPE_SCSI_DEVICE);
    sPAPRPHBState *phb = CAST(sPAPRPHBState, dev, TYPE_SPAPR_PCI_HOST_BRIDGE);

    if (d) {
        void *spapr = CAST(void, bus->parent, "spapr-vscsi");
        VirtIOSCSI *virtio = CAST(VirtIOSCSI, bus->parent, TYPE_VIRTIO_SCSI);
        USBDevice *usb = CAST(USBDevice, bus->parent, TYPE_USB_DEVICE);

        if (spapr) {
            /*
             * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
             * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
             * in the top 16 bits of the 64-bit LUN
             */
            unsigned id = 0x8000 | (d->id << 8) | d->lun;
            return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
                                   (uint64_t)id << 48);
        } else if (virtio) {
            /*
             * We use SRP luns of the form 01000000 | (target << 8) | lun
             * in the top 32 bits of the 64-bit LUN
             * Note: the quote above is from SLOF and it is wrong,
             * the actual binding is:
             * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
             */
            unsigned id = 0x1000000 | (d->id << 16) | d->lun;
            return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
                                   (uint64_t)id << 32);
        } else if (usb) {
            /*
             * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
             * in the top 32 bits of the 64-bit LUN
             */
            unsigned usb_port = atoi(usb->port->path);
            unsigned id = 0x1000000 | (usb_port << 16) | d->lun;
            return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
                                   (uint64_t)id << 32);
        }
    }

2420 2421 2422 2423 2424 2425 2426 2427 2428 2429 2430 2431 2432
    /*
     * SLOF probes the USB devices, and if it recognizes that the device is a
     * storage device, it changes its name to "storage" instead of "usb-host",
     * and additionally adds a child node for the SCSI LUN, so the correct
     * boot path in SLOF is something like .../storage@1/disk@xxx" instead.
     */
    if (strcmp("usb-host", qdev_fw_name(dev)) == 0) {
        USBDevice *usbdev = CAST(USBDevice, dev, TYPE_USB_DEVICE);
        if (usb_host_dev_is_scsi_storage(usbdev)) {
            return g_strdup_printf("storage@%s/disk", usbdev->port->path);
        }
    }

2433 2434 2435 2436 2437 2438 2439 2440
    if (phb) {
        /* Replace "pci" with "pci@800000020000000" */
        return g_strdup_printf("pci@%"PRIX64, phb->buid);
    }

    return NULL;
}

E
Eduardo Habkost 已提交
2441 2442
static char *spapr_get_kvm_type(Object *obj, Error **errp)
{
2443
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
E
Eduardo Habkost 已提交
2444

2445
    return g_strdup(spapr->kvm_type);
E
Eduardo Habkost 已提交
2446 2447 2448 2449
}

static void spapr_set_kvm_type(Object *obj, const char *value, Error **errp)
{
2450
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
E
Eduardo Habkost 已提交
2451

2452 2453
    g_free(spapr->kvm_type);
    spapr->kvm_type = g_strdup(value);
E
Eduardo Habkost 已提交
2454 2455
}

2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470
static bool spapr_get_modern_hotplug_events(Object *obj, Error **errp)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);

    return spapr->use_hotplug_event_source;
}

static void spapr_set_modern_hotplug_events(Object *obj, bool value,
                                            Error **errp)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);

    spapr->use_hotplug_event_source = value;
}

E
Eduardo Habkost 已提交
2471 2472
static void spapr_machine_initfn(Object *obj)
{
2473 2474 2475
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);

    spapr->htab_fd = -1;
2476
    spapr->use_hotplug_event_source = true;
E
Eduardo Habkost 已提交
2477 2478
    object_property_add_str(obj, "kvm-type",
                            spapr_get_kvm_type, spapr_set_kvm_type, NULL);
2479 2480 2481
    object_property_set_description(obj, "kvm-type",
                                    "Specifies the KVM virtualization mode (HV, PR)",
                                    NULL);
2482 2483 2484 2485 2486 2487 2488 2489 2490
    object_property_add_bool(obj, "modern-hotplug-events",
                            spapr_get_modern_hotplug_events,
                            spapr_set_modern_hotplug_events,
                            NULL);
    object_property_set_description(obj, "modern-hotplug-events",
                                    "Use dedicated hotplug event mechanism in"
                                    " place of standard EPOW events when possible"
                                    " (required for memory hot-unplug support)",
                                    NULL);
E
Eduardo Habkost 已提交
2491 2492
}

2493 2494 2495 2496 2497 2498 2499
static void spapr_machine_finalizefn(Object *obj)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);

    g_free(spapr->kvm_type);
}

2500
void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg)
2501 2502 2503 2504 2505 2506 2507 2508 2509 2510
{
    cpu_synchronize_state(cs);
    ppc_cpu_do_system_reset(cs);
}

static void spapr_nmi(NMIState *n, int cpu_index, Error **errp)
{
    CPUState *cs;

    CPU_FOREACH(cs) {
2511
        async_run_on_cpu(cs, spapr_do_system_reset_on_cpu, RUN_ON_CPU_NULL);
2512 2513 2514
    }
}

2515 2516 2517
static void spapr_add_lmbs(DeviceState *dev, uint64_t addr_start, uint64_t size,
                           uint32_t node, bool dedicated_hp_event_source,
                           Error **errp)
B
Bharata B Rao 已提交
2518 2519 2520 2521 2522 2523
{
    sPAPRDRConnector *drc;
    sPAPRDRConnectorClass *drck;
    uint32_t nr_lmbs = size/SPAPR_MEMORY_BLOCK_SIZE;
    int i, fdt_offset, fdt_size;
    void *fdt;
2524
    uint64_t addr = addr_start;
B
Bharata B Rao 已提交
2525 2526 2527 2528 2529 2530 2531 2532 2533 2534 2535 2536 2537

    for (i = 0; i < nr_lmbs; i++) {
        drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB,
                addr/SPAPR_MEMORY_BLOCK_SIZE);
        g_assert(drc);

        fdt = create_device_tree(&fdt_size);
        fdt_offset = spapr_populate_memory_node(fdt, node, addr,
                                                SPAPR_MEMORY_BLOCK_SIZE);

        drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
        drck->attach(drc, dev, fdt, fdt_offset, !dev->hotplugged, errp);
        addr += SPAPR_MEMORY_BLOCK_SIZE;
2538 2539 2540 2541 2542
        if (!dev->hotplugged) {
            /* guests expect coldplugged LMBs to be pre-allocated */
            drck->set_allocation_state(drc, SPAPR_DR_ALLOCATION_STATE_USABLE);
            drck->set_isolation_state(drc, SPAPR_DR_ISOLATION_STATE_UNISOLATED);
        }
B
Bharata B Rao 已提交
2543
    }
2544 2545 2546 2547
    /* send hotplug notification to the
     * guest only in case of hotplugged memory
     */
    if (dev->hotplugged) {
2548 2549 2550 2551 2552 2553 2554 2555 2556 2557 2558
        if (dedicated_hp_event_source) {
            drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB,
                    addr_start / SPAPR_MEMORY_BLOCK_SIZE);
            drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
            spapr_hotplug_req_add_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB,
                                                   nr_lmbs,
                                                   drck->get_index(drc));
        } else {
            spapr_hotplug_req_add_by_count(SPAPR_DR_CONNECTOR_TYPE_LMB,
                                           nr_lmbs);
        }
2559
    }
B
Bharata B Rao 已提交
2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572
}

static void spapr_memory_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
                              uint32_t node, Error **errp)
{
    Error *local_err = NULL;
    sPAPRMachineState *ms = SPAPR_MACHINE(hotplug_dev);
    PCDIMMDevice *dimm = PC_DIMM(dev);
    PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
    MemoryRegion *mr = ddc->get_memory_region(dimm);
    uint64_t align = memory_region_get_alignment(mr);
    uint64_t size = memory_region_size(mr);
    uint64_t addr;
2573
    char *mem_dev;
B
Bharata B Rao 已提交
2574 2575 2576 2577 2578 2579 2580

    if (size % SPAPR_MEMORY_BLOCK_SIZE) {
        error_setg(&local_err, "Hotplugged memory size must be a multiple of "
                      "%lld MB", SPAPR_MEMORY_BLOCK_SIZE/M_BYTE);
        goto out;
    }

2581 2582 2583 2584 2585 2586 2587
    mem_dev = object_property_get_str(OBJECT(dimm), PC_DIMM_MEMDEV_PROP, NULL);
    if (mem_dev && !kvmppc_is_mem_backend_page_size_ok(mem_dev)) {
        error_setg(&local_err, "Memory backend has bad page size. "
                   "Use 'memory-backend-file' with correct mem-path.");
        goto out;
    }

2588
    pc_dimm_memory_plug(dev, &ms->hotplug_memory, mr, align, &local_err);
B
Bharata B Rao 已提交
2589 2590 2591 2592 2593 2594 2595 2596 2597 2598
    if (local_err) {
        goto out;
    }

    addr = object_property_get_int(OBJECT(dimm), PC_DIMM_ADDR_PROP, &local_err);
    if (local_err) {
        pc_dimm_memory_unplug(dev, &ms->hotplug_memory, mr);
        goto out;
    }

2599 2600 2601
    spapr_add_lmbs(dev, addr, size, node,
                   spapr_ovec_test(ms->ov5_cas, OV5_HP_EVT),
                   &error_abort);
B
Bharata B Rao 已提交
2602 2603 2604 2605 2606

out:
    error_propagate(errp, local_err);
}

B
Bharata B Rao 已提交
2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655 2656 2657 2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668 2669 2670 2671 2672 2673 2674 2675 2676 2677 2678 2679 2680 2681 2682 2683 2684 2685 2686 2687 2688 2689 2690
typedef struct sPAPRDIMMState {
    uint32_t nr_lmbs;
} sPAPRDIMMState;

static void spapr_lmb_release(DeviceState *dev, void *opaque)
{
    sPAPRDIMMState *ds = (sPAPRDIMMState *)opaque;
    HotplugHandler *hotplug_ctrl;

    if (--ds->nr_lmbs) {
        return;
    }

    g_free(ds);

    /*
     * Now that all the LMBs have been removed by the guest, call the
     * pc-dimm unplug handler to cleanup up the pc-dimm device.
     */
    hotplug_ctrl = qdev_get_hotplug_handler(dev);
    hotplug_handler_unplug(hotplug_ctrl, dev, &error_abort);
}

static void spapr_del_lmbs(DeviceState *dev, uint64_t addr_start, uint64_t size,
                           Error **errp)
{
    sPAPRDRConnector *drc;
    sPAPRDRConnectorClass *drck;
    uint32_t nr_lmbs = size / SPAPR_MEMORY_BLOCK_SIZE;
    int i;
    sPAPRDIMMState *ds = g_malloc0(sizeof(sPAPRDIMMState));
    uint64_t addr = addr_start;

    ds->nr_lmbs = nr_lmbs;
    for (i = 0; i < nr_lmbs; i++) {
        drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB,
                addr / SPAPR_MEMORY_BLOCK_SIZE);
        g_assert(drc);

        drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
        drck->detach(drc, dev, spapr_lmb_release, ds, errp);
        addr += SPAPR_MEMORY_BLOCK_SIZE;
    }

    drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB,
                                   addr_start / SPAPR_MEMORY_BLOCK_SIZE);
    drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
    spapr_hotplug_req_remove_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB,
                                              nr_lmbs,
                                              drck->get_index(drc));
}

static void spapr_memory_unplug(HotplugHandler *hotplug_dev, DeviceState *dev,
                                Error **errp)
{
    sPAPRMachineState *ms = SPAPR_MACHINE(hotplug_dev);
    PCDIMMDevice *dimm = PC_DIMM(dev);
    PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
    MemoryRegion *mr = ddc->get_memory_region(dimm);

    pc_dimm_memory_unplug(dev, &ms->hotplug_memory, mr);
    object_unparent(OBJECT(dev));
}

static void spapr_memory_unplug_request(HotplugHandler *hotplug_dev,
                                        DeviceState *dev, Error **errp)
{
    Error *local_err = NULL;
    PCDIMMDevice *dimm = PC_DIMM(dev);
    PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
    MemoryRegion *mr = ddc->get_memory_region(dimm);
    uint64_t size = memory_region_size(mr);
    uint64_t addr;

    addr = object_property_get_int(OBJECT(dimm), PC_DIMM_ADDR_PROP, &local_err);
    if (local_err) {
        goto out;
    }

    spapr_del_lmbs(dev, addr, size, &error_abort);
out:
    error_propagate(errp, local_err);
}

B
Bharata B Rao 已提交
2691 2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707 2708 2709 2710 2711
void *spapr_populate_hotplug_cpu_dt(CPUState *cs, int *fdt_offset,
                                    sPAPRMachineState *spapr)
{
    PowerPCCPU *cpu = POWERPC_CPU(cs);
    DeviceClass *dc = DEVICE_GET_CLASS(cs);
    int id = ppc_get_vcpu_dt_id(cpu);
    void *fdt;
    int offset, fdt_size;
    char *nodename;

    fdt = create_device_tree(&fdt_size);
    nodename = g_strdup_printf("%s@%x", dc->fw_name, id);
    offset = fdt_add_subnode(fdt, 0, nodename);

    spapr_populate_cpu_dt(cs, fdt, offset, spapr);
    g_free(nodename);

    *fdt_offset = offset;
    return fdt;
}

2712 2713
static void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *dev,
                              Error **errp)
2714
{
2715
    MachineState *ms = MACHINE(qdev_get_machine());
2716
    CPUCore *cc = CPU_CORE(dev);
2717
    CPUArchId *core_slot = spapr_find_cpu_slot(ms, cc->core_id, NULL);
2718

2719
    core_slot->cpu = NULL;
2720 2721 2722
    object_unparent(OBJECT(dev));
}

2723 2724 2725 2726 2727 2728 2729 2730 2731 2732 2733
static void spapr_core_release(DeviceState *dev, void *opaque)
{
    HotplugHandler *hotplug_ctrl;

    hotplug_ctrl = qdev_get_hotplug_handler(dev);
    hotplug_handler_unplug(hotplug_ctrl, dev, &error_abort);
}

static
void spapr_core_unplug_request(HotplugHandler *hotplug_dev, DeviceState *dev,
                               Error **errp)
2734
{
2735 2736
    int index;
    sPAPRDRConnector *drc;
2737 2738
    sPAPRDRConnectorClass *drck;
    Error *local_err = NULL;
2739 2740
    CPUCore *cc = CPU_CORE(dev);
    int smt = kvmppc_smt_threads();
2741

2742 2743 2744 2745 2746
    if (!spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index)) {
        error_setg(errp, "Unable to find CPU core with core-id: %d",
                   cc->core_id);
        return;
    }
2747 2748 2749 2750 2751
    if (index == 0) {
        error_setg(errp, "Boot CPU core may not be unplugged");
        return;
    }

2752
    drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * smt);
2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764 2765 2766 2767 2768 2769 2770 2771 2772 2773 2774 2775 2776 2777
    g_assert(drc);

    drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
    drck->detach(drc, dev, spapr_core_release, NULL, &local_err);
    if (local_err) {
        error_propagate(errp, local_err);
        return;
    }

    spapr_hotplug_req_remove_by_index(drc);
}

static void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
                            Error **errp)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
    MachineClass *mc = MACHINE_GET_CLASS(spapr);
    sPAPRCPUCore *core = SPAPR_CPU_CORE(OBJECT(dev));
    CPUCore *cc = CPU_CORE(dev);
    CPUState *cs = CPU(core->threads);
    sPAPRDRConnector *drc;
    Error *local_err = NULL;
    void *fdt = NULL;
    int fdt_offset = 0;
    int smt = kvmppc_smt_threads();
2778 2779
    CPUArchId *core_slot;
    int index;
2780

2781 2782 2783 2784 2785 2786
    core_slot = spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index);
    if (!core_slot) {
        error_setg(errp, "Unable to find CPU core with core-id: %d",
                   cc->core_id);
        return;
    }
2787 2788
    drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * smt);

2789
    g_assert(drc || !mc->has_hotpluggable_cpus);
2790 2791 2792 2793 2794 2795 2796 2797 2798 2799 2800 2801 2802 2803 2804 2805 2806 2807 2808 2809 2810 2811 2812 2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824

    /*
     * Setup CPU DT entries only for hotplugged CPUs. For boot time or
     * coldplugged CPUs DT entries are setup in spapr_build_fdt().
     */
    if (dev->hotplugged) {
        fdt = spapr_populate_hotplug_cpu_dt(cs, &fdt_offset, spapr);
    }

    if (drc) {
        sPAPRDRConnectorClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
        drck->attach(drc, dev, fdt, fdt_offset, !dev->hotplugged, &local_err);
        if (local_err) {
            g_free(fdt);
            error_propagate(errp, local_err);
            return;
        }
    }

    if (dev->hotplugged) {
        /*
         * Send hotplug notification interrupt to the guest only in case
         * of hotplugged CPUs.
         */
        spapr_hotplug_req_add_by_index(drc);
    } else {
        /*
         * Set the right DRC states for cold plugged CPU.
         */
        if (drc) {
            sPAPRDRConnectorClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
            drck->set_allocation_state(drc, SPAPR_DR_ALLOCATION_STATE_USABLE);
            drck->set_isolation_state(drc, SPAPR_DR_ISOLATION_STATE_UNISOLATED);
        }
    }
2825
    core_slot->cpu = OBJECT(dev);
2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836
}

static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
                                Error **errp)
{
    MachineState *machine = MACHINE(OBJECT(hotplug_dev));
    MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev);
    Error *local_err = NULL;
    CPUCore *cc = CPU_CORE(dev);
    char *base_core_type = spapr_get_cpu_core_type(machine->cpu_model);
    const char *type = object_get_typename(OBJECT(dev));
2837 2838
    CPUArchId *core_slot;
    int index;
2839

2840
    if (dev->hotplugged && !mc->has_hotpluggable_cpus) {
2841 2842 2843 2844 2845 2846 2847 2848 2849 2850 2851 2852 2853 2854
        error_setg(&local_err, "CPU hotplug not supported for this machine");
        goto out;
    }

    if (strcmp(base_core_type, type)) {
        error_setg(&local_err, "CPU core type should be %s", base_core_type);
        goto out;
    }

    if (cc->core_id % smp_threads) {
        error_setg(&local_err, "invalid core id %d", cc->core_id);
        goto out;
    }

2855 2856 2857 2858 2859 2860
    if (cc->nr_threads != smp_threads) {
        error_setg(errp, "invalid nr-threads %d, must be %d",
                   cc->nr_threads, smp_threads);
        return;
    }

2861 2862
    core_slot = spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index);
    if (!core_slot) {
2863 2864 2865 2866
        error_setg(&local_err, "core id %d out of range", cc->core_id);
        goto out;
    }

2867
    if (core_slot->cpu) {
2868 2869 2870 2871 2872 2873 2874 2875 2876
        error_setg(&local_err, "core %d already populated", cc->core_id);
        goto out;
    }

out:
    g_free(base_core_type);
    error_propagate(errp, local_err);
}

B
Bharata B Rao 已提交
2877 2878 2879 2880 2881 2882
static void spapr_machine_device_plug(HotplugHandler *hotplug_dev,
                                      DeviceState *dev, Error **errp)
{
    sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(qdev_get_machine());

    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
2883
        int node;
B
Bharata B Rao 已提交
2884 2885 2886 2887 2888 2889 2890 2891 2892

        if (!smc->dr_lmb_enabled) {
            error_setg(errp, "Memory hotplug not supported for this machine");
            return;
        }
        node = object_property_get_int(OBJECT(dev), PC_DIMM_NODE_PROP, errp);
        if (*errp) {
            return;
        }
2893 2894 2895 2896
        if (node < 0 || node >= MAX_NODES) {
            error_setg(errp, "Invaild node %d", node);
            return;
        }
B
Bharata B Rao 已提交
2897

2898 2899 2900 2901 2902 2903 2904 2905 2906 2907 2908 2909 2910 2911 2912 2913 2914 2915 2916 2917 2918 2919
        /*
         * Currently PowerPC kernel doesn't allow hot-adding memory to
         * memory-less node, but instead will silently add the memory
         * to the first node that has some memory. This causes two
         * unexpected behaviours for the user.
         *
         * - Memory gets hotplugged to a different node than what the user
         *   specified.
         * - Since pc-dimm subsystem in QEMU still thinks that memory belongs
         *   to memory-less node, a reboot will set things accordingly
         *   and the previously hotplugged memory now ends in the right node.
         *   This appears as if some memory moved from one node to another.
         *
         * So until kernel starts supporting memory hotplug to memory-less
         * nodes, just prevent such attempts upfront in QEMU.
         */
        if (nb_numa_nodes && !numa_info[node].node_mem) {
            error_setg(errp, "Can't hotplug memory to memory-less node %d",
                       node);
            return;
        }

B
Bharata B Rao 已提交
2920
        spapr_memory_plug(hotplug_dev, dev, node, errp);
B
Bharata B Rao 已提交
2921 2922
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
        spapr_core_plug(hotplug_dev, dev, errp);
B
Bharata B Rao 已提交
2923 2924 2925 2926 2927 2928
    }
}

static void spapr_machine_device_unplug(HotplugHandler *hotplug_dev,
                                      DeviceState *dev, Error **errp)
{
B
Bharata B Rao 已提交
2929
    sPAPRMachineState *sms = SPAPR_MACHINE(qdev_get_machine());
2930
    MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
B
Bharata B Rao 已提交
2931

B
Bharata B Rao 已提交
2932
    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
B
Bharata B Rao 已提交
2933 2934 2935 2936 2937 2938
        if (spapr_ovec_test(sms->ov5_cas, OV5_HP_EVT)) {
            spapr_memory_unplug(hotplug_dev, dev, errp);
        } else {
            error_setg(errp, "Memory hot unplug not supported for this guest");
        }
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
2939
        if (!mc->has_hotpluggable_cpus) {
B
Bharata B Rao 已提交
2940 2941 2942 2943 2944 2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2964
            error_setg(errp, "CPU hot unplug not supported on this machine");
            return;
        }
        spapr_core_unplug(hotplug_dev, dev, errp);
    }
}

static void spapr_machine_device_unplug_request(HotplugHandler *hotplug_dev,
                                                DeviceState *dev, Error **errp)
{
    sPAPRMachineState *sms = SPAPR_MACHINE(qdev_get_machine());
    MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());

    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
        if (spapr_ovec_test(sms->ov5_cas, OV5_HP_EVT)) {
            spapr_memory_unplug_request(hotplug_dev, dev, errp);
        } else {
            /* NOTE: this means there is a window after guest reset, prior to
             * CAS negotiation, where unplug requests will fail due to the
             * capability not being detected yet. This is a bit different than
             * the case with PCI unplug, where the events will be queued and
             * eventually handled by the guest after boot
             */
            error_setg(errp, "Memory hot unplug not supported for this guest");
        }
B
Bharata B Rao 已提交
2965
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
2966
        if (!mc->has_hotpluggable_cpus) {
B
Bharata B Rao 已提交
2967 2968 2969
            error_setg(errp, "CPU hot unplug not supported on this machine");
            return;
        }
2970
        spapr_core_unplug_request(hotplug_dev, dev, errp);
B
Bharata B Rao 已提交
2971 2972 2973
    }
}

2974 2975 2976 2977 2978 2979 2980 2981
static void spapr_machine_device_pre_plug(HotplugHandler *hotplug_dev,
                                          DeviceState *dev, Error **errp)
{
    if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
        spapr_core_pre_plug(hotplug_dev, dev, errp);
    }
}

2982 2983
static HotplugHandler *spapr_get_hotplug_handler(MachineState *machine,
                                                 DeviceState *dev)
B
Bharata B Rao 已提交
2984
{
2985 2986
    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) ||
        object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
B
Bharata B Rao 已提交
2987 2988 2989 2990 2991
        return HOTPLUG_HANDLER(machine);
    }
    return NULL;
}

2992 2993 2994 2995 2996 2997 2998
static unsigned spapr_cpu_index_to_socket_id(unsigned cpu_index)
{
    /* Allocate to NUMA nodes on a "socket" basis (not that concept of
     * socket means much for the paravirtualized PAPR platform) */
    return cpu_index / smp_threads / smp_cores;
}

2999 3000 3001 3002 3003 3004
static const CPUArchIdList *spapr_possible_cpu_arch_ids(MachineState *machine)
{
    int i;
    int spapr_max_cores = max_cpus / smp_threads;
    MachineClass *mc = MACHINE_GET_CLASS(machine);

3005
    if (!mc->has_hotpluggable_cpus) {
3006 3007 3008 3009 3010 3011 3012 3013 3014 3015 3016 3017 3018
        spapr_max_cores = QEMU_ALIGN_UP(smp_cpus, smp_threads) / smp_threads;
    }
    if (machine->possible_cpus) {
        assert(machine->possible_cpus->len == spapr_max_cores);
        return machine->possible_cpus;
    }

    machine->possible_cpus = g_malloc0(sizeof(CPUArchIdList) +
                             sizeof(CPUArchId) * spapr_max_cores);
    machine->possible_cpus->len = spapr_max_cores;
    for (i = 0; i < machine->possible_cpus->len; i++) {
        int core_id = i * smp_threads;

3019
        machine->possible_cpus->cpus[i].vcpus_count = smp_threads;
3020 3021 3022 3023 3024 3025 3026 3027 3028
        machine->possible_cpus->cpus[i].arch_id = core_id;
        machine->possible_cpus->cpus[i].props.has_core_id = true;
        machine->possible_cpus->cpus[i].props.core_id = core_id;
        /* TODO: add 'has_node/node' here to describe
           to which node core belongs */
    }
    return machine->possible_cpus;
}

3029
static void spapr_phb_placement(sPAPRMachineState *spapr, uint32_t index,
D
David Gibson 已提交
3030 3031
                                uint64_t *buid, hwaddr *pio,
                                hwaddr *mmio32, hwaddr *mmio64,
3032 3033
                                unsigned n_dma, uint32_t *liobns, Error **errp)
{
3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048
    /*
     * New-style PHB window placement.
     *
     * Goals: Gives large (1TiB), naturally aligned 64-bit MMIO window
     * for each PHB, in addition to 2GiB 32-bit MMIO and 64kiB PIO
     * windows.
     *
     * Some guest kernels can't work with MMIO windows above 1<<46
     * (64TiB), so we place up to 31 PHBs in the area 32TiB..64TiB
     *
     * 32TiB..(33TiB+1984kiB) contains the 64kiB PIO windows for each
     * PHB stacked together.  (32TiB+2GiB)..(32TiB+64GiB) contains the
     * 2GiB 32-bit MMIO windows for each PHB.  Then 33..64TiB has the
     * 1TiB 64-bit MMIO windows for each PHB.
     */
3049
    const uint64_t base_buid = 0x800000020000000ULL;
3050 3051
#define SPAPR_MAX_PHBS ((SPAPR_PCI_LIMIT - SPAPR_PCI_BASE) / \
                        SPAPR_PCI_MEM64_WIN_SIZE - 1)
3052 3053
    int i;

3054 3055 3056 3057 3058 3059
    /* Sanity check natural alignments */
    QEMU_BUILD_BUG_ON((SPAPR_PCI_BASE % SPAPR_PCI_MEM64_WIN_SIZE) != 0);
    QEMU_BUILD_BUG_ON((SPAPR_PCI_LIMIT % SPAPR_PCI_MEM64_WIN_SIZE) != 0);
    QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM64_WIN_SIZE % SPAPR_PCI_MEM32_WIN_SIZE) != 0);
    QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM32_WIN_SIZE % SPAPR_PCI_IO_WIN_SIZE) != 0);
    /* Sanity check bounds */
3060 3061 3062 3063 3064 3065 3066 3067
    QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS * SPAPR_PCI_IO_WIN_SIZE) >
                      SPAPR_PCI_MEM32_WIN_SIZE);
    QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS * SPAPR_PCI_MEM32_WIN_SIZE) >
                      SPAPR_PCI_MEM64_WIN_SIZE);

    if (index >= SPAPR_MAX_PHBS) {
        error_setg(errp, "\"index\" for PAPR PHB is too large (max %llu)",
                   SPAPR_MAX_PHBS - 1);
3068 3069 3070 3071 3072 3073 3074 3075
        return;
    }

    *buid = base_buid + index;
    for (i = 0; i < n_dma; ++i) {
        liobns[i] = SPAPR_PCI_LIOBN(index, i);
    }

3076 3077 3078
    *pio = SPAPR_PCI_BASE + index * SPAPR_PCI_IO_WIN_SIZE;
    *mmio32 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM32_WIN_SIZE;
    *mmio64 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM64_WIN_SIZE;
3079 3080
}

3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094
static ICSState *spapr_ics_get(XICSFabric *dev, int irq)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(dev);

    return ics_valid_irq(spapr->ics, irq) ? spapr->ics : NULL;
}

static void spapr_ics_resend(XICSFabric *dev)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(dev);

    ics_resend(spapr->ics);
}

3095
static ICPState *spapr_icp_get(XICSFabric *xi, int cpu_dt_id)
3096
{
3097
    PowerPCCPU *cpu = ppc_get_vcpu_by_dt_id(cpu_dt_id);
3098

3099
    return cpu ? ICP(cpu->intc) : NULL;
3100 3101
}

3102 3103 3104 3105
static void spapr_pic_print_info(InterruptStatsProvider *obj,
                                 Monitor *mon)
{
    sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
3106 3107 3108 3109
    CPUState *cs;

    CPU_FOREACH(cs) {
        PowerPCCPU *cpu = POWERPC_CPU(cs);
3110

3111
        icp_pic_print_info(ICP(cpu->intc), mon);
3112 3113 3114 3115 3116
    }

    ics_pic_print_info(spapr->ics, mon);
}

3117 3118 3119
static void spapr_machine_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);
D
David Gibson 已提交
3120
    sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(oc);
3121
    FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
3122
    NMIClass *nc = NMI_CLASS(oc);
B
Bharata B Rao 已提交
3123
    HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
3124
    PPCVirtualHypervisorClass *vhc = PPC_VIRTUAL_HYPERVISOR_CLASS(oc);
3125
    XICSFabricClass *xic = XICS_FABRIC_CLASS(oc);
3126
    InterruptStatsProviderClass *ispc = INTERRUPT_STATS_PROVIDER_CLASS(oc);
3127

3128
    mc->desc = "pSeries Logical Partition (PAPR compliant)";
3129 3130 3131 3132 3133 3134

    /*
     * We set up the default / latest behaviour here.  The class_init
     * functions for the specific versioned machine types can override
     * these details for backwards compatibility
     */
3135 3136 3137
    mc->init = ppc_spapr_init;
    mc->reset = ppc_spapr_reset;
    mc->block_default_type = IF_SCSI;
G
Greg Kurz 已提交
3138
    mc->max_cpus = 1024;
3139
    mc->no_parallel = 1;
3140
    mc->default_boot_order = "";
3141
    mc->default_ram_size = 512 * M_BYTE;
3142
    mc->kvm_type = spapr_kvm_type;
3143
    mc->has_dynamic_sysbus = true;
3144
    mc->pci_allow_0_address = true;
3145
    mc->get_hotplug_handler = spapr_get_hotplug_handler;
3146
    hc->pre_plug = spapr_machine_device_pre_plug;
B
Bharata B Rao 已提交
3147 3148
    hc->plug = spapr_machine_device_plug;
    hc->unplug = spapr_machine_device_unplug;
3149
    mc->cpu_index_to_socket_id = spapr_cpu_index_to_socket_id;
3150
    mc->possible_cpu_arch_ids = spapr_possible_cpu_arch_ids;
B
Bharata B Rao 已提交
3151
    hc->unplug_request = spapr_machine_device_unplug_request;
3152

3153
    smc->dr_lmb_enabled = true;
3154
    smc->tcg_default_cpu = "POWER8";
3155
    mc->has_hotpluggable_cpus = true;
3156
    fwc->get_dev_path = spapr_get_fw_dev_path;
3157
    nc->nmi_monitor_handler = spapr_nmi;
3158
    smc->phb_placement = spapr_phb_placement;
3159
    vhc->hypercall = emulate_spapr_hypercall;
3160 3161 3162 3163
    vhc->hpt_mask = spapr_hpt_mask;
    vhc->map_hptes = spapr_map_hptes;
    vhc->unmap_hptes = spapr_unmap_hptes;
    vhc->store_hpte = spapr_store_hpte;
3164
    vhc->get_patbe = spapr_get_patbe;
3165 3166
    xic->ics_get = spapr_ics_get;
    xic->ics_resend = spapr_ics_resend;
3167
    xic->icp_get = spapr_icp_get;
3168
    ispc->print_info = spapr_pic_print_info;
3169 3170 3171 3172 3173
    /* Force NUMA node memory size to be a multiple of
     * SPAPR_MEMORY_BLOCK_SIZE (256M) since that's the granularity
     * in which LMBs are represented and hot-added
     */
    mc->numa_mem_align_shift = 28;
3174 3175 3176 3177 3178
}

static const TypeInfo spapr_machine_info = {
    .name          = TYPE_SPAPR_MACHINE,
    .parent        = TYPE_MACHINE,
3179
    .abstract      = true,
3180
    .instance_size = sizeof(sPAPRMachineState),
E
Eduardo Habkost 已提交
3181
    .instance_init = spapr_machine_initfn,
3182
    .instance_finalize = spapr_machine_finalizefn,
D
David Gibson 已提交
3183
    .class_size    = sizeof(sPAPRMachineClass),
3184
    .class_init    = spapr_machine_class_init,
3185 3186
    .interfaces = (InterfaceInfo[]) {
        { TYPE_FW_PATH_PROVIDER },
3187
        { TYPE_NMI },
B
Bharata B Rao 已提交
3188
        { TYPE_HOTPLUG_HANDLER },
3189
        { TYPE_PPC_VIRTUAL_HYPERVISOR },
3190
        { TYPE_XICS_FABRIC },
3191
        { TYPE_INTERRUPT_STATS_PROVIDER },
3192 3193
        { }
    },
3194 3195
};

3196
#define DEFINE_SPAPR_MACHINE(suffix, verstr, latest)                 \
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David Gibson 已提交
3197 3198 3199 3200 3201
    static void spapr_machine_##suffix##_class_init(ObjectClass *oc, \
                                                    void *data)      \
    {                                                                \
        MachineClass *mc = MACHINE_CLASS(oc);                        \
        spapr_machine_##suffix##_class_options(mc);                  \
3202 3203 3204 3205
        if (latest) {                                                \
            mc->alias = "pseries";                                   \
            mc->is_default = 1;                                      \
        }                                                            \
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3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221
    }                                                                \
    static void spapr_machine_##suffix##_instance_init(Object *obj)  \
    {                                                                \
        MachineState *machine = MACHINE(obj);                        \
        spapr_machine_##suffix##_instance_options(machine);          \
    }                                                                \
    static const TypeInfo spapr_machine_##suffix##_info = {          \
        .name = MACHINE_TYPE_NAME("pseries-" verstr),                \
        .parent = TYPE_SPAPR_MACHINE,                                \
        .class_init = spapr_machine_##suffix##_class_init,           \
        .instance_init = spapr_machine_##suffix##_instance_init,     \
    };                                                               \
    static void spapr_machine_register_##suffix(void)                \
    {                                                                \
        type_register(&spapr_machine_##suffix##_info);               \
    }                                                                \
3222
    type_init(spapr_machine_register_##suffix)
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3223

3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237
/*
 * pseries-2.10
 */
static void spapr_machine_2_10_instance_options(MachineState *machine)
{
}

static void spapr_machine_2_10_class_options(MachineClass *mc)
{
    /* Defaults for the latest behaviour inherited from the base class */
}

DEFINE_SPAPR_MACHINE(2_10, "2.10", true);

3238 3239 3240
/*
 * pseries-2.9
 */
3241 3242 3243
#define SPAPR_COMPAT_2_9                                               \
    HW_COMPAT_2_9

3244 3245
static void spapr_machine_2_9_instance_options(MachineState *machine)
{
3246
    spapr_machine_2_10_instance_options(machine);
3247 3248 3249 3250
}

static void spapr_machine_2_9_class_options(MachineClass *mc)
{
3251 3252
    spapr_machine_2_10_class_options(mc);
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_9);
3253 3254
}

3255
DEFINE_SPAPR_MACHINE(2_9, "2.9", false);
3256

3257 3258 3259
/*
 * pseries-2.8
 */
3260 3261 3262 3263 3264 3265 3266
#define SPAPR_COMPAT_2_8                                        \
    HW_COMPAT_2_8                                               \
    {                                                           \
        .driver   = TYPE_SPAPR_PCI_HOST_BRIDGE,                 \
        .property = "pcie-extended-configuration-space",        \
        .value    = "off",                                      \
    },
3267

3268 3269
static void spapr_machine_2_8_instance_options(MachineState *machine)
{
3270
    spapr_machine_2_9_instance_options(machine);
3271 3272 3273 3274
}

static void spapr_machine_2_8_class_options(MachineClass *mc)
{
3275 3276
    spapr_machine_2_9_class_options(mc);
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_8);
3277
    mc->numa_mem_align_shift = 23;
3278 3279
}

3280
DEFINE_SPAPR_MACHINE(2_8, "2.8", false);
3281

3282 3283 3284
/*
 * pseries-2.7
 */
3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295
#define SPAPR_COMPAT_2_7                            \
    HW_COMPAT_2_7                                   \
    {                                               \
        .driver   = TYPE_SPAPR_PCI_HOST_BRIDGE,     \
        .property = "mem_win_size",                 \
        .value    = stringify(SPAPR_PCI_2_7_MMIO_WIN_SIZE),\
    },                                              \
    {                                               \
        .driver   = TYPE_SPAPR_PCI_HOST_BRIDGE,     \
        .property = "mem64_win_size",               \
        .value    = "0",                            \
3296 3297 3298 3299 3300
    },                                              \
    {                                               \
        .driver = TYPE_POWERPC_CPU,                 \
        .property = "pre-2.8-migration",            \
        .value    = "on",                           \
3301 3302 3303 3304 3305
    },                                              \
    {                                               \
        .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,       \
        .property = "pre-2.8-migration",            \
        .value    = "on",                           \
3306 3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355
    },

static void phb_placement_2_7(sPAPRMachineState *spapr, uint32_t index,
                              uint64_t *buid, hwaddr *pio,
                              hwaddr *mmio32, hwaddr *mmio64,
                              unsigned n_dma, uint32_t *liobns, Error **errp)
{
    /* Legacy PHB placement for pseries-2.7 and earlier machine types */
    const uint64_t base_buid = 0x800000020000000ULL;
    const hwaddr phb_spacing = 0x1000000000ULL; /* 64 GiB */
    const hwaddr mmio_offset = 0xa0000000; /* 2 GiB + 512 MiB */
    const hwaddr pio_offset = 0x80000000; /* 2 GiB */
    const uint32_t max_index = 255;
    const hwaddr phb0_alignment = 0x10000000000ULL; /* 1 TiB */

    uint64_t ram_top = MACHINE(spapr)->ram_size;
    hwaddr phb0_base, phb_base;
    int i;

    /* Do we have hotpluggable memory? */
    if (MACHINE(spapr)->maxram_size > ram_top) {
        /* Can't just use maxram_size, because there may be an
         * alignment gap between normal and hotpluggable memory
         * regions */
        ram_top = spapr->hotplug_memory.base +
            memory_region_size(&spapr->hotplug_memory.mr);
    }

    phb0_base = QEMU_ALIGN_UP(ram_top, phb0_alignment);

    if (index > max_index) {
        error_setg(errp, "\"index\" for PAPR PHB is too large (max %u)",
                   max_index);
        return;
    }

    *buid = base_buid + index;
    for (i = 0; i < n_dma; ++i) {
        liobns[i] = SPAPR_PCI_LIOBN(index, i);
    }

    phb_base = phb0_base + index * phb_spacing;
    *pio = phb_base + pio_offset;
    *mmio32 = phb_base + mmio_offset;
    /*
     * We don't set the 64-bit MMIO window, relying on the PHB's
     * fallback behaviour of automatically splitting a large "32-bit"
     * window into contiguous 32-bit and 64-bit windows
     */
}
3356

3357 3358
static void spapr_machine_2_7_instance_options(MachineState *machine)
{
3359 3360
    sPAPRMachineState *spapr = SPAPR_MACHINE(machine);

3361
    spapr_machine_2_8_instance_options(machine);
3362
    spapr->use_hotplug_event_source = false;
3363 3364 3365 3366
}

static void spapr_machine_2_7_class_options(MachineClass *mc)
{
3367 3368
    sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);

3369
    spapr_machine_2_8_class_options(mc);
3370
    smc->tcg_default_cpu = "POWER7";
3371
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_7);
3372
    smc->phb_placement = phb_placement_2_7;
3373 3374
}

3375
DEFINE_SPAPR_MACHINE(2_7, "2.7", false);
3376

3377 3378 3379
/*
 * pseries-2.6
 */
3380
#define SPAPR_COMPAT_2_6 \
3381 3382 3383 3384 3385 3386
    HW_COMPAT_2_6 \
    { \
        .driver   = TYPE_SPAPR_PCI_HOST_BRIDGE,\
        .property = "ddw",\
        .value    = stringify(off),\
    },
3387

3388 3389
static void spapr_machine_2_6_instance_options(MachineState *machine)
{
3390
    spapr_machine_2_7_instance_options(machine);
3391 3392 3393 3394
}

static void spapr_machine_2_6_class_options(MachineClass *mc)
{
3395
    spapr_machine_2_7_class_options(mc);
3396
    mc->has_hotpluggable_cpus = false;
3397
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_6);
3398 3399
}

3400
DEFINE_SPAPR_MACHINE(2_6, "2.6", false);
3401

3402 3403 3404
/*
 * pseries-2.5
 */
3405
#define SPAPR_COMPAT_2_5 \
3406 3407 3408 3409 3410 3411
    HW_COMPAT_2_5 \
    { \
        .driver   = "spapr-vlan", \
        .property = "use-rx-buffer-pools", \
        .value    = "off", \
    },
3412

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David Gibson 已提交
3413
static void spapr_machine_2_5_instance_options(MachineState *machine)
3414
{
3415
    spapr_machine_2_6_instance_options(machine);
D
David Gibson 已提交
3416 3417 3418 3419
}

static void spapr_machine_2_5_class_options(MachineClass *mc)
{
3420 3421
    sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);

3422
    spapr_machine_2_6_class_options(mc);
3423
    smc->use_ohci_by_default = true;
3424
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_5);
3425 3426
}

3427
DEFINE_SPAPR_MACHINE(2_5, "2.5", false);
3428 3429 3430 3431

/*
 * pseries-2.4
 */
C
Cornelia Huck 已提交
3432 3433 3434
#define SPAPR_COMPAT_2_4 \
        HW_COMPAT_2_4

D
David Gibson 已提交
3435
static void spapr_machine_2_4_instance_options(MachineState *machine)
3436
{
D
David Gibson 已提交
3437 3438
    spapr_machine_2_5_instance_options(machine);
}
3439

D
David Gibson 已提交
3440 3441
static void spapr_machine_2_4_class_options(MachineClass *mc)
{
3442 3443 3444 3445
    sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);

    spapr_machine_2_5_class_options(mc);
    smc->dr_lmb_enabled = false;
D
David Gibson 已提交
3446
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_4);
3447 3448
}

3449
DEFINE_SPAPR_MACHINE(2_4, "2.4", false);
3450 3451 3452 3453

/*
 * pseries-2.3
 */
E
Eduardo Habkost 已提交
3454
#define SPAPR_COMPAT_2_3 \
3455 3456 3457 3458 3459 3460
        HW_COMPAT_2_3 \
        {\
            .driver   = "spapr-pci-host-bridge",\
            .property = "dynamic-reconfiguration",\
            .value    = "off",\
        },
E
Eduardo Habkost 已提交
3461

D
David Gibson 已提交
3462
static void spapr_machine_2_3_instance_options(MachineState *machine)
J
Jason Wang 已提交
3463
{
D
David Gibson 已提交
3464
    spapr_machine_2_4_instance_options(machine);
3465
    savevm_skip_section_footers();
3466
    global_state_set_optional();
3467
    savevm_skip_configuration();
J
Jason Wang 已提交
3468 3469
}

D
David Gibson 已提交
3470
static void spapr_machine_2_3_class_options(MachineClass *mc)
3471
{
3472
    spapr_machine_2_4_class_options(mc);
D
David Gibson 已提交
3473
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_3);
3474
}
3475
DEFINE_SPAPR_MACHINE(2_3, "2.3", false);
3476

3477 3478 3479 3480 3481 3482 3483 3484 3485 3486 3487 3488
/*
 * pseries-2.2
 */

#define SPAPR_COMPAT_2_2 \
        HW_COMPAT_2_2 \
        {\
            .driver   = TYPE_SPAPR_PCI_HOST_BRIDGE,\
            .property = "mem_win_size",\
            .value    = "0x20000000",\
        },

D
David Gibson 已提交
3489
static void spapr_machine_2_2_instance_options(MachineState *machine)
3490
{
D
David Gibson 已提交
3491
    spapr_machine_2_3_instance_options(machine);
3492
    machine->suppress_vmdesc = true;
3493 3494
}

D
David Gibson 已提交
3495
static void spapr_machine_2_2_class_options(MachineClass *mc)
3496
{
3497
    spapr_machine_2_3_class_options(mc);
D
David Gibson 已提交
3498
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_2);
3499
}
3500
DEFINE_SPAPR_MACHINE(2_2, "2.2", false);
3501

3502 3503 3504 3505 3506
/*
 * pseries-2.1
 */
#define SPAPR_COMPAT_2_1 \
        HW_COMPAT_2_1
3507

D
David Gibson 已提交
3508
static void spapr_machine_2_1_instance_options(MachineState *machine)
3509
{
D
David Gibson 已提交
3510
    spapr_machine_2_2_instance_options(machine);
3511
}
J
Jason Wang 已提交
3512

D
David Gibson 已提交
3513
static void spapr_machine_2_1_class_options(MachineClass *mc)
J
Jason Wang 已提交
3514
{
3515
    spapr_machine_2_2_class_options(mc);
D
David Gibson 已提交
3516
    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_1);
J
Jason Wang 已提交
3517
}
3518
DEFINE_SPAPR_MACHINE(2_1, "2.1", false);
D
David Gibson 已提交
3519

3520
static void spapr_machine_register_types(void)
3521
{
3522
    type_register_static(&spapr_machine_info);
3523 3524
}

3525
type_init(spapr_machine_register_types)