i915_gem_execbuffer.c 32.9 KB
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/*
 * Copyright © 2008,2010 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 *
 * Authors:
 *    Eric Anholt <eric@anholt.net>
 *    Chris Wilson <chris@chris-wilson.co.uk>
 *
 */

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#include <drm/drmP.h>
#include <drm/i915_drm.h>
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#include "i915_drv.h"
#include "i915_trace.h"
#include "intel_drv.h"
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#include <linux/dma_remapping.h>
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struct eb_objects {
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	struct list_head objects;
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	int and;
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	union {
		struct drm_i915_gem_object *lut[0];
		struct hlist_head buckets[0];
	};
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};

static struct eb_objects *
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eb_create(struct drm_i915_gem_execbuffer2 *args)
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{
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	struct eb_objects *eb = NULL;

	if (args->flags & I915_EXEC_HANDLE_LUT) {
		int size = args->buffer_count;
		size *= sizeof(struct drm_i915_gem_object *);
		size += sizeof(struct eb_objects);
		eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
	}

	if (eb == NULL) {
		int size = args->buffer_count;
		int count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
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Lauri Kasanen 已提交
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		BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
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		while (count > 2*size)
			count >>= 1;
		eb = kzalloc(count*sizeof(struct hlist_head) +
			     sizeof(struct eb_objects),
			     GFP_TEMPORARY);
		if (eb == NULL)
			return eb;

		eb->and = count - 1;
	} else
		eb->and = -args->buffer_count;

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	INIT_LIST_HEAD(&eb->objects);
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	return eb;
}

static void
eb_reset(struct eb_objects *eb)
{
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	if (eb->and >= 0)
		memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
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}

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static int
eb_lookup_objects(struct eb_objects *eb,
		  struct drm_i915_gem_exec_object2 *exec,
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		  const struct drm_i915_gem_execbuffer2 *args,
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		  struct drm_file *file)
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{
	int i;

	spin_lock(&file->table_lock);
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	for (i = 0; i < args->buffer_count; i++) {
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		struct drm_i915_gem_object *obj;

		obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));
		if (obj == NULL) {
			spin_unlock(&file->table_lock);
			DRM_DEBUG("Invalid object handle %d at index %d\n",
				   exec[i].handle, i);
			return -ENOENT;
		}

		if (!list_empty(&obj->exec_list)) {
			spin_unlock(&file->table_lock);
			DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
				   obj, exec[i].handle, i);
			return -EINVAL;
		}

		drm_gem_object_reference(&obj->base);
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		list_add_tail(&obj->exec_list, &eb->objects);
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		obj->exec_entry = &exec[i];
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		if (eb->and < 0) {
			eb->lut[i] = obj;
		} else {
			uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;
			obj->exec_handle = handle;
			hlist_add_head(&obj->exec_node,
				       &eb->buckets[handle & eb->and]);
		}
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	}
	spin_unlock(&file->table_lock);

	return 0;
}

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static struct drm_i915_gem_object *
eb_get_object(struct eb_objects *eb, unsigned long handle)
{
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	if (eb->and < 0) {
		if (handle >= -eb->and)
			return NULL;
		return eb->lut[handle];
	} else {
		struct hlist_head *head;
		struct hlist_node *node;
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		head = &eb->buckets[handle & eb->and];
		hlist_for_each(node, head) {
			struct drm_i915_gem_object *obj;
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			obj = hlist_entry(node, struct drm_i915_gem_object, exec_node);
			if (obj->exec_handle == handle)
				return obj;
		}
		return NULL;
	}
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}

static void
eb_destroy(struct eb_objects *eb)
{
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	while (!list_empty(&eb->objects)) {
		struct drm_i915_gem_object *obj;

		obj = list_first_entry(&eb->objects,
				       struct drm_i915_gem_object,
				       exec_list);
		list_del_init(&obj->exec_list);
		drm_gem_object_unreference(&obj->base);
	}
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	kfree(eb);
}

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static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
{
	return (obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
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		!obj->map_and_fenceable ||
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		obj->cache_level != I915_CACHE_NONE);
}

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static int
i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
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				   struct eb_objects *eb,
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				   struct drm_i915_gem_relocation_entry *reloc)
{
	struct drm_device *dev = obj->base.dev;
	struct drm_gem_object *target_obj;
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	struct drm_i915_gem_object *target_i915_obj;
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	uint32_t target_offset;
	int ret = -EINVAL;

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	/* we've already hold a reference to all valid objects */
	target_obj = &eb_get_object(eb, reloc->target_handle)->base;
	if (unlikely(target_obj == NULL))
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		return -ENOENT;

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	target_i915_obj = to_intel_bo(target_obj);
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	target_offset = i915_gem_obj_ggtt_offset(target_i915_obj);
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	/* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
	 * pipe_control writes because the gpu doesn't properly redirect them
	 * through the ppgtt for non_secure batchbuffers. */
	if (unlikely(IS_GEN6(dev) &&
	    reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
	    !target_i915_obj->has_global_gtt_mapping)) {
		i915_gem_gtt_bind_object(target_i915_obj,
					 target_i915_obj->cache_level);
	}

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	/* Validate that the target is in a valid r/w GPU domain */
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	if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
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		DRM_DEBUG("reloc with multiple write domains: "
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			  "obj %p target %d offset %d "
			  "read %08x write %08x",
			  obj, reloc->target_handle,
			  (int) reloc->offset,
			  reloc->read_domains,
			  reloc->write_domain);
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		return ret;
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	}
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	if (unlikely((reloc->write_domain | reloc->read_domains)
		     & ~I915_GEM_GPU_DOMAINS)) {
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		DRM_DEBUG("reloc with read/write non-GPU domains: "
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			  "obj %p target %d offset %d "
			  "read %08x write %08x",
			  obj, reloc->target_handle,
			  (int) reloc->offset,
			  reloc->read_domains,
			  reloc->write_domain);
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		return ret;
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	}

	target_obj->pending_read_domains |= reloc->read_domains;
	target_obj->pending_write_domain |= reloc->write_domain;

	/* If the relocation already has the right value in it, no
	 * more work needs to be done.
	 */
	if (target_offset == reloc->presumed_offset)
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		return 0;
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	/* Check that the relocation address is valid... */
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	if (unlikely(reloc->offset > obj->base.size - 4)) {
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		DRM_DEBUG("Relocation beyond object bounds: "
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			  "obj %p target %d offset %d size %d.\n",
			  obj, reloc->target_handle,
			  (int) reloc->offset,
			  (int) obj->base.size);
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		return ret;
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	}
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	if (unlikely(reloc->offset & 3)) {
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		DRM_DEBUG("Relocation not 4-byte aligned: "
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			  "obj %p target %d offset %d.\n",
			  obj, reloc->target_handle,
			  (int) reloc->offset);
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		return ret;
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	}

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	/* We can't wait for rendering with pagefaults disabled */
	if (obj->active && in_atomic())
		return -EFAULT;

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	reloc->delta += target_offset;
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	if (use_cpu_reloc(obj)) {
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		uint32_t page_offset = reloc->offset & ~PAGE_MASK;
		char *vaddr;

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		ret = i915_gem_object_set_to_cpu_domain(obj, 1);
		if (ret)
			return ret;

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		vaddr = kmap_atomic(i915_gem_object_get_page(obj,
							     reloc->offset >> PAGE_SHIFT));
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		*(uint32_t *)(vaddr + page_offset) = reloc->delta;
		kunmap_atomic(vaddr);
	} else {
		struct drm_i915_private *dev_priv = dev->dev_private;
		uint32_t __iomem *reloc_entry;
		void __iomem *reloc_page;

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		ret = i915_gem_object_set_to_gtt_domain(obj, true);
		if (ret)
			return ret;

		ret = i915_gem_object_put_fence(obj);
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		if (ret)
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			return ret;
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		/* Map the page containing the relocation we're going to perform.  */
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		reloc->offset += i915_gem_obj_ggtt_offset(obj);
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		reloc_page = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
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						      reloc->offset & PAGE_MASK);
		reloc_entry = (uint32_t __iomem *)
			(reloc_page + (reloc->offset & ~PAGE_MASK));
		iowrite32(reloc->delta, reloc_entry);
		io_mapping_unmap_atomic(reloc_page);
	}

	/* and update the user's relocation entry */
	reloc->presumed_offset = target_offset;

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	return 0;
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}

static int
i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,
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				    struct eb_objects *eb)
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{
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#define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
	struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(512)];
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	struct drm_i915_gem_relocation_entry __user *user_relocs;
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	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
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	int remain, ret;
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	user_relocs = to_user_ptr(entry->relocs_ptr);
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	remain = entry->relocation_count;
	while (remain) {
		struct drm_i915_gem_relocation_entry *r = stack_reloc;
		int count = remain;
		if (count > ARRAY_SIZE(stack_reloc))
			count = ARRAY_SIZE(stack_reloc);
		remain -= count;

		if (__copy_from_user_inatomic(r, user_relocs, count*sizeof(r[0])))
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			return -EFAULT;

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		do {
			u64 offset = r->presumed_offset;
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			ret = i915_gem_execbuffer_relocate_entry(obj, eb, r);
			if (ret)
				return ret;

			if (r->presumed_offset != offset &&
			    __copy_to_user_inatomic(&user_relocs->presumed_offset,
						    &r->presumed_offset,
						    sizeof(r->presumed_offset))) {
				return -EFAULT;
			}

			user_relocs++;
			r++;
		} while (--count);
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	}

	return 0;
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#undef N_RELOC
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}

static int
i915_gem_execbuffer_relocate_object_slow(struct drm_i915_gem_object *obj,
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					 struct eb_objects *eb,
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					 struct drm_i915_gem_relocation_entry *relocs)
{
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	const struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
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	int i, ret;

	for (i = 0; i < entry->relocation_count; i++) {
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		ret = i915_gem_execbuffer_relocate_entry(obj, eb, &relocs[i]);
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		if (ret)
			return ret;
	}

	return 0;
}

static int
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i915_gem_execbuffer_relocate(struct eb_objects *eb)
363
{
364
	struct drm_i915_gem_object *obj;
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	int ret = 0;

	/* This is the fast path and we cannot handle a pagefault whilst
	 * holding the struct mutex lest the user pass in the relocations
	 * contained within a mmaped bo. For in such a case we, the page
	 * fault handler would call i915_gem_fault() and we would try to
	 * acquire the struct mutex again. Obviously this is bad and so
	 * lockdep complains vehemently.
	 */
	pagefault_disable();
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	list_for_each_entry(obj, &eb->objects, exec_list) {
376
		ret = i915_gem_execbuffer_relocate_object(obj, eb);
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		if (ret)
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			break;
379
	}
380
	pagefault_enable();
381

382
	return ret;
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}

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#define  __EXEC_OBJECT_HAS_PIN (1<<31)
#define  __EXEC_OBJECT_HAS_FENCE (1<<30)
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static int
need_reloc_mappable(struct drm_i915_gem_object *obj)
{
	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
	return entry->relocation_count && !use_cpu_reloc(obj);
}

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static int
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i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj,
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				   struct intel_ring_buffer *ring,
				   bool *need_reloc)
399
{
400
	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
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	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
	bool need_fence, need_mappable;
	int ret;

	need_fence =
		has_fenced_gpu_access &&
		entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
		obj->tiling_mode != I915_TILING_NONE;
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	need_mappable = need_fence || need_reloc_mappable(obj);
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412
	ret = i915_gem_object_pin(obj, entry->alignment, need_mappable, false);
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	if (ret)
		return ret;

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	entry->flags |= __EXEC_OBJECT_HAS_PIN;

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	if (has_fenced_gpu_access) {
		if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {
420
			ret = i915_gem_object_get_fence(obj);
421
			if (ret)
422
				return ret;
423

424
			if (i915_gem_object_pin_fence(obj))
425
				entry->flags |= __EXEC_OBJECT_HAS_FENCE;
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427
			obj->pending_fenced_gpu_access = true;
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		}
	}

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	/* Ensure ppgtt mapping exists if needed */
	if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) {
		i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
				       obj, obj->cache_level);

		obj->has_aliasing_ppgtt_mapping = 1;
	}

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	if (entry->offset != i915_gem_obj_ggtt_offset(obj)) {
		entry->offset = i915_gem_obj_ggtt_offset(obj);
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		*need_reloc = true;
	}

	if (entry->flags & EXEC_OBJECT_WRITE) {
		obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER;
		obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER;
	}

	if (entry->flags & EXEC_OBJECT_NEEDS_GTT &&
	    !obj->has_global_gtt_mapping)
		i915_gem_gtt_bind_object(obj, obj->cache_level);

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	return 0;
454
}
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static void
i915_gem_execbuffer_unreserve_object(struct drm_i915_gem_object *obj)
{
	struct drm_i915_gem_exec_object2 *entry;

461
	if (!i915_gem_obj_ggtt_bound(obj))
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		return;

	entry = obj->exec_entry;

	if (entry->flags & __EXEC_OBJECT_HAS_FENCE)
		i915_gem_object_unpin_fence(obj);

	if (entry->flags & __EXEC_OBJECT_HAS_PIN)
		i915_gem_object_unpin(obj);

	entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
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}

475
static int
476
i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
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			    struct list_head *objects,
			    bool *need_relocs)
479
{
480
	struct drm_i915_gem_object *obj;
481
	struct list_head ordered_objects;
482 483
	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
	int retry;
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	INIT_LIST_HEAD(&ordered_objects);
	while (!list_empty(objects)) {
		struct drm_i915_gem_exec_object2 *entry;
		bool need_fence, need_mappable;

		obj = list_first_entry(objects,
				       struct drm_i915_gem_object,
				       exec_list);
		entry = obj->exec_entry;

		need_fence =
			has_fenced_gpu_access &&
			entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
			obj->tiling_mode != I915_TILING_NONE;
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		need_mappable = need_fence || need_reloc_mappable(obj);
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		if (need_mappable)
			list_move(&obj->exec_list, &ordered_objects);
		else
			list_move_tail(&obj->exec_list, &ordered_objects);
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506
		obj->base.pending_read_domains = I915_GEM_GPU_DOMAINS & ~I915_GEM_DOMAIN_COMMAND;
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		obj->base.pending_write_domain = 0;
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		obj->pending_fenced_gpu_access = false;
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	}
	list_splice(&ordered_objects, objects);
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	/* Attempt to pin all of the buffers into the GTT.
	 * This is done in 3 phases:
	 *
	 * 1a. Unbind all objects that do not match the GTT constraints for
	 *     the execbuffer (fenceable, mappable, alignment etc).
	 * 1b. Increment pin count for already bound objects.
	 * 2.  Bind new objects.
	 * 3.  Decrement pin count.
	 *
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	 * This avoid unnecessary unbinding of later objects in order to make
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	 * room for the earlier objects *unless* we need to defragment.
	 */
	retry = 0;
	do {
526
		int ret = 0;
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		/* Unbind any ill-fitting objects or pin. */
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		list_for_each_entry(obj, objects, exec_list) {
530
			struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
531
			bool need_fence, need_mappable;
532

533
			if (!i915_gem_obj_ggtt_bound(obj))
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				continue;

			need_fence =
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				has_fenced_gpu_access &&
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				entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
				obj->tiling_mode != I915_TILING_NONE;
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			need_mappable = need_fence || need_reloc_mappable(obj);
541

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			if ((entry->alignment &&
			     i915_gem_obj_ggtt_offset(obj) & (entry->alignment - 1)) ||
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			    (need_mappable && !obj->map_and_fenceable))
				ret = i915_gem_object_unbind(obj);
			else
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				ret = i915_gem_execbuffer_reserve_object(obj, ring, need_relocs);
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			if (ret)
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				goto err;
		}

		/* Bind fresh objects */
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		list_for_each_entry(obj, objects, exec_list) {
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			if (i915_gem_obj_ggtt_bound(obj))
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				continue;
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557
			ret = i915_gem_execbuffer_reserve_object(obj, ring, need_relocs);
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			if (ret)
				goto err;
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		}

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err:		/* Decrement pin count for bound objects */
		list_for_each_entry(obj, objects, exec_list)
			i915_gem_execbuffer_unreserve_object(obj);
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C
Chris Wilson 已提交
566
		if (ret != -ENOSPC || retry++)
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			return ret;

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Chris Wilson 已提交
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		ret = i915_gem_evict_everything(ring->dev);
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		if (ret)
			return ret;
	} while (1);
}

static int
i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
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				  struct drm_i915_gem_execbuffer2 *args,
578
				  struct drm_file *file,
579
				  struct intel_ring_buffer *ring,
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				  struct eb_objects *eb,
581
				  struct drm_i915_gem_exec_object2 *exec)
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{
	struct drm_i915_gem_relocation_entry *reloc;
584
	struct drm_i915_gem_object *obj;
585
	bool need_relocs;
586
	int *reloc_offset;
587
	int i, total, ret;
588
	int count = args->buffer_count;
589

590
	/* We may process another execbuffer during the unlock... */
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	while (!list_empty(&eb->objects)) {
		obj = list_first_entry(&eb->objects,
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				       struct drm_i915_gem_object,
				       exec_list);
		list_del_init(&obj->exec_list);
		drm_gem_object_unreference(&obj->base);
	}

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	mutex_unlock(&dev->struct_mutex);

	total = 0;
	for (i = 0; i < count; i++)
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		total += exec[i].relocation_count;
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605
	reloc_offset = drm_malloc_ab(count, sizeof(*reloc_offset));
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	reloc = drm_malloc_ab(total, sizeof(*reloc));
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	if (reloc == NULL || reloc_offset == NULL) {
		drm_free_large(reloc);
		drm_free_large(reloc_offset);
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		mutex_lock(&dev->struct_mutex);
		return -ENOMEM;
	}

	total = 0;
	for (i = 0; i < count; i++) {
		struct drm_i915_gem_relocation_entry __user *user_relocs;
617 618
		u64 invalid_offset = (u64)-1;
		int j;
619

V
Ville Syrjälä 已提交
620
		user_relocs = to_user_ptr(exec[i].relocs_ptr);
621 622

		if (copy_from_user(reloc+total, user_relocs,
623
				   exec[i].relocation_count * sizeof(*reloc))) {
624 625 626 627 628
			ret = -EFAULT;
			mutex_lock(&dev->struct_mutex);
			goto err;
		}

629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647
		/* As we do not update the known relocation offsets after
		 * relocating (due to the complexities in lock handling),
		 * we need to mark them as invalid now so that we force the
		 * relocation processing next time. Just in case the target
		 * object is evicted and then rebound into its old
		 * presumed_offset before the next execbuffer - if that
		 * happened we would make the mistake of assuming that the
		 * relocations were valid.
		 */
		for (j = 0; j < exec[i].relocation_count; j++) {
			if (copy_to_user(&user_relocs[j].presumed_offset,
					 &invalid_offset,
					 sizeof(invalid_offset))) {
				ret = -EFAULT;
				mutex_lock(&dev->struct_mutex);
				goto err;
			}
		}

648
		reloc_offset[i] = total;
649
		total += exec[i].relocation_count;
650 651 652 653 654 655 656 657
	}

	ret = i915_mutex_lock_interruptible(dev);
	if (ret) {
		mutex_lock(&dev->struct_mutex);
		goto err;
	}

658 659
	/* reacquire the objects */
	eb_reset(eb);
660
	ret = eb_lookup_objects(eb, exec, args, file);
661 662
	if (ret)
		goto err;
663

664
	need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
665
	ret = i915_gem_execbuffer_reserve(ring, &eb->objects, &need_relocs);
666 667 668
	if (ret)
		goto err;

669
	list_for_each_entry(obj, &eb->objects, exec_list) {
670
		int offset = obj->exec_entry - exec;
671
		ret = i915_gem_execbuffer_relocate_object_slow(obj, eb,
672
							       reloc + reloc_offset[offset]);
673 674 675 676 677 678 679 680 681 682 683 684
		if (ret)
			goto err;
	}

	/* Leave the user relocations as are, this is the painfully slow path,
	 * and we want to avoid the complication of dropping the lock whilst
	 * having buffers reserved in the aperture and so causing spurious
	 * ENOSPC for random operations.
	 */

err:
	drm_free_large(reloc);
685
	drm_free_large(reloc_offset);
686 687 688 689
	return ret;
}

static int
690 691
i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
				struct list_head *objects)
692
{
693
	struct drm_i915_gem_object *obj;
694
	uint32_t flush_domains = 0;
695
	int ret;
696

697 698
	list_for_each_entry(obj, objects, exec_list) {
		ret = i915_gem_object_sync(obj, ring);
699 700
		if (ret)
			return ret;
701 702 703 704 705

		if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
			i915_gem_clflush_object(obj);

		flush_domains |= obj->base.write_domain;
706 707
	}

708
	if (flush_domains & I915_GEM_DOMAIN_CPU)
709
		i915_gem_chipset_flush(ring->dev);
710 711 712 713

	if (flush_domains & I915_GEM_DOMAIN_GTT)
		wmb();

714 715 716
	/* Unconditionally invalidate gpu caches and ensure that we do flush
	 * any residual writes from the previous batch.
	 */
717
	return intel_ring_invalidate_all_caches(ring);
718 719
}

720 721
static bool
i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
722
{
723 724 725
	if (exec->flags & __I915_EXEC_UNKNOWN_FLAGS)
		return false;

726
	return ((exec->batch_start_offset | exec->batch_len) & 0x7) == 0;
727 728 729 730 731 732 733
}

static int
validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
		   int count)
{
	int i;
734 735
	int relocs_total = 0;
	int relocs_max = INT_MAX / sizeof(struct drm_i915_gem_relocation_entry);
736 737

	for (i = 0; i < count; i++) {
V
Ville Syrjälä 已提交
738
		char __user *ptr = to_user_ptr(exec[i].relocs_ptr);
739 740
		int length; /* limited by fault_in_pages_readable() */

741 742 743
		if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS)
			return -EINVAL;

744 745 746 747 748
		/* First check for malicious input causing overflow in
		 * the worst case where we need to allocate the entire
		 * relocation tree as a single array.
		 */
		if (exec[i].relocation_count > relocs_max - relocs_total)
749
			return -EINVAL;
750
		relocs_total += exec[i].relocation_count;
751 752 753

		length = exec[i].relocation_count *
			sizeof(struct drm_i915_gem_relocation_entry);
754 755 756 757 758
		/*
		 * We must check that the entire relocation array is safe
		 * to read, but since we may need to update the presumed
		 * offsets during execution, check for full write access.
		 */
759 760 761
		if (!access_ok(VERIFY_WRITE, ptr, length))
			return -EFAULT;

762
		if (fault_in_multipages_readable(ptr, length))
763 764 765 766 767 768
			return -EFAULT;
	}

	return 0;
}

769 770
static void
i915_gem_execbuffer_move_to_active(struct list_head *objects,
771
				   struct intel_ring_buffer *ring)
772 773 774 775
{
	struct drm_i915_gem_object *obj;

	list_for_each_entry(obj, objects, exec_list) {
776 777
		u32 old_read = obj->base.read_domains;
		u32 old_write = obj->base.write_domain;
C
Chris Wilson 已提交
778

779
		obj->base.write_domain = obj->base.pending_write_domain;
780 781 782
		if (obj->base.write_domain == 0)
			obj->base.pending_read_domains |= obj->base.read_domains;
		obj->base.read_domains = obj->base.pending_read_domains;
783 784
		obj->fenced_gpu_access = obj->pending_fenced_gpu_access;

785
		i915_gem_object_move_to_active(obj, ring);
786 787
		if (obj->base.write_domain) {
			obj->dirty = 1;
788
			obj->last_write_seqno = intel_ring_get_seqno(ring);
789
			if (obj->pin_count) /* check for potential scanout */
790
				intel_mark_fb_busy(obj, ring);
791 792
		}

C
Chris Wilson 已提交
793
		trace_i915_gem_object_change_domain(obj, old_read, old_write);
794 795 796
	}
}

797 798
static void
i915_gem_execbuffer_retire_commands(struct drm_device *dev,
799
				    struct drm_file *file,
800 801
				    struct intel_ring_buffer *ring,
				    struct drm_i915_gem_object *obj)
802
{
803 804
	/* Unconditionally force add_request to emit a full flush. */
	ring->gpu_caches_dirty = true;
805

806
	/* Add a breadcrumb for the completion of the batch buffer */
807
	(void)__i915_add_request(ring, file, obj, NULL);
808
}
809

810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834
static int
i915_reset_gen7_sol_offsets(struct drm_device *dev,
			    struct intel_ring_buffer *ring)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	int ret, i;

	if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS])
		return 0;

	ret = intel_ring_begin(ring, 4 * 3);
	if (ret)
		return ret;

	for (i = 0; i < 4; i++) {
		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
		intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i));
		intel_ring_emit(ring, 0);
	}

	intel_ring_advance(ring);

	return 0;
}

835 836 837 838
static int
i915_gem_do_execbuffer(struct drm_device *dev, void *data,
		       struct drm_file *file,
		       struct drm_i915_gem_execbuffer2 *args,
839
		       struct drm_i915_gem_exec_object2 *exec)
840 841
{
	drm_i915_private_t *dev_priv = dev->dev_private;
842
	struct eb_objects *eb;
843 844 845
	struct drm_i915_gem_object *batch_obj;
	struct drm_clip_rect *cliprects = NULL;
	struct intel_ring_buffer *ring;
846
	u32 ctx_id = i915_execbuffer2_get_context_id(*args);
847
	u32 exec_start, exec_len;
848
	u32 mask, flags;
849
	int ret, mode, i;
850
	bool need_relocs;
851

852
	if (!i915_gem_check_execbuffer(args))
853 854 855
		return -EINVAL;

	ret = validate_exec_list(exec, args->buffer_count);
856 857 858
	if (ret)
		return ret;

859 860 861 862 863 864 865
	flags = 0;
	if (args->flags & I915_EXEC_SECURE) {
		if (!file->is_master || !capable(CAP_SYS_ADMIN))
		    return -EPERM;

		flags |= I915_DISPATCH_SECURE;
	}
866 867
	if (args->flags & I915_EXEC_IS_PINNED)
		flags |= I915_DISPATCH_PINNED;
868

869 870 871
	switch (args->flags & I915_EXEC_RING_MASK) {
	case I915_EXEC_DEFAULT:
	case I915_EXEC_RENDER:
872
		ring = &dev_priv->ring[RCS];
873 874
		break;
	case I915_EXEC_BSD:
875
		ring = &dev_priv->ring[VCS];
876 877 878 879 880
		if (ctx_id != 0) {
			DRM_DEBUG("Ring %s doesn't support contexts\n",
				  ring->name);
			return -EPERM;
		}
881 882
		break;
	case I915_EXEC_BLT:
883
		ring = &dev_priv->ring[BCS];
884 885 886 887 888
		if (ctx_id != 0) {
			DRM_DEBUG("Ring %s doesn't support contexts\n",
				  ring->name);
			return -EPERM;
		}
889
		break;
890 891 892 893 894 895 896 897 898
	case I915_EXEC_VEBOX:
		ring = &dev_priv->ring[VECS];
		if (ctx_id != 0) {
			DRM_DEBUG("Ring %s doesn't support contexts\n",
				  ring->name);
			return -EPERM;
		}
		break;

899
	default:
900
		DRM_DEBUG("execbuf with unknown ring: %d\n",
901 902 903
			  (int)(args->flags & I915_EXEC_RING_MASK));
		return -EINVAL;
	}
904 905 906 907 908
	if (!intel_ring_initialized(ring)) {
		DRM_DEBUG("execbuf with invalid ring: %d\n",
			  (int)(args->flags & I915_EXEC_RING_MASK));
		return -EINVAL;
	}
909

910
	mode = args->flags & I915_EXEC_CONSTANTS_MASK;
911
	mask = I915_EXEC_CONSTANTS_MASK;
912 913 914 915 916 917 918 919 920 921 922 923
	switch (mode) {
	case I915_EXEC_CONSTANTS_REL_GENERAL:
	case I915_EXEC_CONSTANTS_ABSOLUTE:
	case I915_EXEC_CONSTANTS_REL_SURFACE:
		if (ring == &dev_priv->ring[RCS] &&
		    mode != dev_priv->relative_constants_mode) {
			if (INTEL_INFO(dev)->gen < 4)
				return -EINVAL;

			if (INTEL_INFO(dev)->gen > 5 &&
			    mode == I915_EXEC_CONSTANTS_REL_SURFACE)
				return -EINVAL;
924 925 926 927

			/* The HW changed the meaning on this bit on gen6 */
			if (INTEL_INFO(dev)->gen >= 6)
				mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE;
928 929 930
		}
		break;
	default:
931
		DRM_DEBUG("execbuf with unknown constants: %d\n", mode);
932 933 934
		return -EINVAL;
	}

935
	if (args->buffer_count < 1) {
936
		DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
937 938 939 940
		return -EINVAL;
	}

	if (args->num_cliprects != 0) {
941
		if (ring != &dev_priv->ring[RCS]) {
942
			DRM_DEBUG("clip rectangles are only valid with the render ring\n");
943 944 945
			return -EINVAL;
		}

946 947 948 949 950
		if (INTEL_INFO(dev)->gen >= 5) {
			DRM_DEBUG("clip rectangles are only valid on pre-gen5\n");
			return -EINVAL;
		}

951 952 953 954 955
		if (args->num_cliprects > UINT_MAX / sizeof(*cliprects)) {
			DRM_DEBUG("execbuf with %u cliprects\n",
				  args->num_cliprects);
			return -EINVAL;
		}
956

957
		cliprects = kmalloc(args->num_cliprects * sizeof(*cliprects),
958 959 960 961 962 963
				    GFP_KERNEL);
		if (cliprects == NULL) {
			ret = -ENOMEM;
			goto pre_mutex_err;
		}

964
		if (copy_from_user(cliprects,
V
Ville Syrjälä 已提交
965 966
				   to_user_ptr(args->cliprects_ptr),
				   sizeof(*cliprects)*args->num_cliprects)) {
967 968 969 970 971 972 973 974 975 976 977 978 979 980 981
			ret = -EFAULT;
			goto pre_mutex_err;
		}
	}

	ret = i915_mutex_lock_interruptible(dev);
	if (ret)
		goto pre_mutex_err;

	if (dev_priv->mm.suspended) {
		mutex_unlock(&dev->struct_mutex);
		ret = -EBUSY;
		goto pre_mutex_err;
	}

982
	eb = eb_create(args);
983 984 985 986 987 988
	if (eb == NULL) {
		mutex_unlock(&dev->struct_mutex);
		ret = -ENOMEM;
		goto pre_mutex_err;
	}

989
	/* Look up object handles */
990
	ret = eb_lookup_objects(eb, exec, args, file);
991 992
	if (ret)
		goto err;
993

994
	/* take note of the batch buffer before we might reorder the lists */
995
	batch_obj = list_entry(eb->objects.prev,
996 997 998
			       struct drm_i915_gem_object,
			       exec_list);

999
	/* Move the objects en-masse into the GTT, evicting if necessary. */
1000
	need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
1001
	ret = i915_gem_execbuffer_reserve(ring, &eb->objects, &need_relocs);
1002 1003 1004 1005
	if (ret)
		goto err;

	/* The objects are in their final locations, apply the relocations. */
1006
	if (need_relocs)
1007
		ret = i915_gem_execbuffer_relocate(eb);
1008 1009
	if (ret) {
		if (ret == -EFAULT) {
1010 1011
			ret = i915_gem_execbuffer_relocate_slow(dev, args, file, ring,
								eb, exec);
1012 1013 1014 1015 1016 1017 1018 1019
			BUG_ON(!mutex_is_locked(&dev->struct_mutex));
		}
		if (ret)
			goto err;
	}

	/* Set the pending read domains for the batch buffer to COMMAND */
	if (batch_obj->base.pending_write_domain) {
1020
		DRM_DEBUG("Attempting to use self-modifying batch buffer\n");
1021 1022 1023 1024 1025
		ret = -EINVAL;
		goto err;
	}
	batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;

1026 1027 1028 1029 1030 1031 1032
	/* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
	 * batch" bit. Hence we need to pin secure batches into the global gtt.
	 * hsw should have this fixed, but let's be paranoid and do it
	 * unconditionally for now. */
	if (flags & I915_DISPATCH_SECURE && !batch_obj->has_global_gtt_mapping)
		i915_gem_gtt_bind_object(batch_obj, batch_obj->cache_level);

1033
	ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->objects);
1034
	if (ret)
1035 1036
		goto err;

1037 1038 1039 1040
	ret = i915_switch_context(ring, file, ctx_id);
	if (ret)
		goto err;

1041 1042 1043 1044 1045 1046 1047 1048 1049
	if (ring == &dev_priv->ring[RCS] &&
	    mode != dev_priv->relative_constants_mode) {
		ret = intel_ring_begin(ring, 4);
		if (ret)
				goto err;

		intel_ring_emit(ring, MI_NOOP);
		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
		intel_ring_emit(ring, INSTPM);
1050
		intel_ring_emit(ring, mask << 16 | mode);
1051 1052 1053 1054 1055
		intel_ring_advance(ring);

		dev_priv->relative_constants_mode = mode;
	}

1056 1057 1058 1059 1060 1061
	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
		ret = i915_reset_gen7_sol_offsets(dev, ring);
		if (ret)
			goto err;
	}

1062
	exec_start = i915_gem_obj_ggtt_offset(batch_obj) + args->batch_start_offset;
1063 1064 1065 1066 1067 1068 1069 1070 1071
	exec_len = args->batch_len;
	if (cliprects) {
		for (i = 0; i < args->num_cliprects; i++) {
			ret = i915_emit_box(dev, &cliprects[i],
					    args->DR1, args->DR4);
			if (ret)
				goto err;

			ret = ring->dispatch_execbuffer(ring,
1072 1073
							exec_start, exec_len,
							flags);
1074 1075 1076 1077
			if (ret)
				goto err;
		}
	} else {
1078 1079 1080
		ret = ring->dispatch_execbuffer(ring,
						exec_start, exec_len,
						flags);
1081 1082 1083
		if (ret)
			goto err;
	}
1084

1085 1086
	trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);

1087
	i915_gem_execbuffer_move_to_active(&eb->objects, ring);
1088
	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
1089 1090

err:
1091
	eb_destroy(eb);
1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114

	mutex_unlock(&dev->struct_mutex);

pre_mutex_err:
	kfree(cliprects);
	return ret;
}

/*
 * Legacy execbuffer just creates an exec2 list from the original exec object
 * list array and passes it to the real function.
 */
int
i915_gem_execbuffer(struct drm_device *dev, void *data,
		    struct drm_file *file)
{
	struct drm_i915_gem_execbuffer *args = data;
	struct drm_i915_gem_execbuffer2 exec2;
	struct drm_i915_gem_exec_object *exec_list = NULL;
	struct drm_i915_gem_exec_object2 *exec2_list = NULL;
	int ret, i;

	if (args->buffer_count < 1) {
1115
		DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
1116 1117 1118 1119 1120 1121 1122
		return -EINVAL;
	}

	/* Copy in the exec list from userland */
	exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
	exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
	if (exec_list == NULL || exec2_list == NULL) {
1123
		DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1124 1125 1126 1127 1128 1129
			  args->buffer_count);
		drm_free_large(exec_list);
		drm_free_large(exec2_list);
		return -ENOMEM;
	}
	ret = copy_from_user(exec_list,
V
Ville Syrjälä 已提交
1130
			     to_user_ptr(args->buffers_ptr),
1131 1132
			     sizeof(*exec_list) * args->buffer_count);
	if (ret != 0) {
1133
		DRM_DEBUG("copy %d exec entries failed %d\n",
1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160
			  args->buffer_count, ret);
		drm_free_large(exec_list);
		drm_free_large(exec2_list);
		return -EFAULT;
	}

	for (i = 0; i < args->buffer_count; i++) {
		exec2_list[i].handle = exec_list[i].handle;
		exec2_list[i].relocation_count = exec_list[i].relocation_count;
		exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr;
		exec2_list[i].alignment = exec_list[i].alignment;
		exec2_list[i].offset = exec_list[i].offset;
		if (INTEL_INFO(dev)->gen < 4)
			exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE;
		else
			exec2_list[i].flags = 0;
	}

	exec2.buffers_ptr = args->buffers_ptr;
	exec2.buffer_count = args->buffer_count;
	exec2.batch_start_offset = args->batch_start_offset;
	exec2.batch_len = args->batch_len;
	exec2.DR1 = args->DR1;
	exec2.DR4 = args->DR4;
	exec2.num_cliprects = args->num_cliprects;
	exec2.cliprects_ptr = args->cliprects_ptr;
	exec2.flags = I915_EXEC_RENDER;
1161
	i915_execbuffer2_set_context_id(exec2, 0);
1162 1163 1164 1165 1166 1167 1168

	ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list);
	if (!ret) {
		/* Copy the new buffer offsets back to the user's exec list. */
		for (i = 0; i < args->buffer_count; i++)
			exec_list[i].offset = exec2_list[i].offset;
		/* ... and back out to userspace */
V
Ville Syrjälä 已提交
1169
		ret = copy_to_user(to_user_ptr(args->buffers_ptr),
1170 1171 1172 1173
				   exec_list,
				   sizeof(*exec_list) * args->buffer_count);
		if (ret) {
			ret = -EFAULT;
1174
			DRM_DEBUG("failed to copy %d exec entries "
1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192
				  "back to user (%d)\n",
				  args->buffer_count, ret);
		}
	}

	drm_free_large(exec_list);
	drm_free_large(exec2_list);
	return ret;
}

int
i915_gem_execbuffer2(struct drm_device *dev, void *data,
		     struct drm_file *file)
{
	struct drm_i915_gem_execbuffer2 *args = data;
	struct drm_i915_gem_exec_object2 *exec2_list = NULL;
	int ret;

1193 1194
	if (args->buffer_count < 1 ||
	    args->buffer_count > UINT_MAX / sizeof(*exec2_list)) {
1195
		DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count);
1196 1197 1198
		return -EINVAL;
	}

1199
	exec2_list = kmalloc(sizeof(*exec2_list)*args->buffer_count,
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			     GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
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	if (exec2_list == NULL)
		exec2_list = drm_malloc_ab(sizeof(*exec2_list),
					   args->buffer_count);
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	if (exec2_list == NULL) {
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		DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
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			  args->buffer_count);
		return -ENOMEM;
	}
	ret = copy_from_user(exec2_list,
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			     to_user_ptr(args->buffers_ptr),
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			     sizeof(*exec2_list) * args->buffer_count);
	if (ret != 0) {
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		DRM_DEBUG("copy %d exec entries failed %d\n",
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			  args->buffer_count, ret);
		drm_free_large(exec2_list);
		return -EFAULT;
	}

	ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list);
	if (!ret) {
		/* Copy the new buffer offsets back to the user's exec list. */
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		ret = copy_to_user(to_user_ptr(args->buffers_ptr),
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				   exec2_list,
				   sizeof(*exec2_list) * args->buffer_count);
		if (ret) {
			ret = -EFAULT;
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			DRM_DEBUG("failed to copy %d exec entries "
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				  "back to user (%d)\n",
				  args->buffer_count, ret);
		}
	}

	drm_free_large(exec2_list);
	return ret;
}