w83627ehf.c 56.0 KB
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/*
    w83627ehf - Driver for the hardware monitoring functionality of
                the Winbond W83627EHF Super-I/O chip
    Copyright (C) 2005  Jean Delvare <khali@linux-fr.org>
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Jean Delvare 已提交
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    Copyright (C) 2006  Yuan Mu (Winbond),
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                        Rudolf Marek <r.marek@assembler.cz>
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                        David Hubbard <david.c.hubbard@gmail.com>
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			Daniel J Blueman <daniel.blueman@gmail.com>
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    Shamelessly ripped from the w83627hf driver
    Copyright (C) 2003  Mark Studebaker

    Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
    in testing and debugging this driver.

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    This driver also supports the W83627EHG, which is the lead-free
    version of the W83627EHF.

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    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.


    Supports the following chips:

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    Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
    w83627ehf   10      5       4       3      0x8850 0x88    0x5ca3
                                               0x8860 0xa1
    w83627dhg    9      5       4       3      0xa020 0xc1    0x5ca3
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    w83627dhg-p  9      5       4       3      0xb070 0xc1    0x5ca3
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    w83667hg     9      5       3       3      0xa510 0xc1    0x5ca3
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    w83667hg-b   9      5       3       3      0xb350 0xc1    0x5ca3
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*/

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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
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#include <linux/jiffies.h>
#include <linux/platform_device.h>
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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#include <linux/hwmon-vid.h>
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#include <linux/err.h>
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#include <linux/mutex.h>
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#include <linux/acpi.h>
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#include <linux/io.h>
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#include "lm75.h"

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enum kinds { w83627ehf, w83627dhg, w83627dhg_p, w83667hg, w83667hg_b };
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/* used to set data->name = w83627ehf_device_names[data->sio_kind] */
static const char * w83627ehf_device_names[] = {
	"w83627ehf",
	"w83627dhg",
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	"w83627dhg",
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	"w83667hg",
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	"w83667hg",
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};

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static unsigned short force_id;
module_param(force_id, ushort, 0);
MODULE_PARM_DESC(force_id, "Override the detected device ID");

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#define DRVNAME "w83627ehf"
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/*
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 * Super-I/O constants and functions
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 */
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#define W83627EHF_LD_HWM	0x0b
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#define W83667HG_LD_VID 	0x0d
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#define SIO_REG_LDSEL		0x07	/* Logical device select */
#define SIO_REG_DEVID		0x20	/* Device ID (2 bytes) */
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#define SIO_REG_EN_VRM10	0x2C	/* GPIO3, GPIO4 selection */
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#define SIO_REG_ENABLE		0x30	/* Logical device enable */
#define SIO_REG_ADDR		0x60	/* Logical device address (2 bytes) */
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#define SIO_REG_VID_CTRL	0xF0	/* VID control */
#define SIO_REG_VID_DATA	0xF1	/* VID data */
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#define SIO_W83627EHF_ID	0x8850
#define SIO_W83627EHG_ID	0x8860
#define SIO_W83627DHG_ID	0xa020
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#define SIO_W83627DHG_P_ID	0xb070
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#define SIO_W83667HG_ID 	0xa510
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#define SIO_W83667HG_B_ID	0xb350
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#define SIO_ID_MASK		0xFFF0
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static inline void
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superio_outb(int ioreg, int reg, int val)
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{
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	outb(reg, ioreg);
	outb(val, ioreg + 1);
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}

static inline int
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superio_inb(int ioreg, int reg)
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{
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	outb(reg, ioreg);
	return inb(ioreg + 1);
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}

static inline void
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superio_select(int ioreg, int ld)
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{
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	outb(SIO_REG_LDSEL, ioreg);
	outb(ld, ioreg + 1);
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}

static inline void
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superio_enter(int ioreg)
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{
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	outb(0x87, ioreg);
	outb(0x87, ioreg);
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}

static inline void
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superio_exit(int ioreg)
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{
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	outb(0xaa, ioreg);
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	outb(0x02, ioreg);
	outb(0x02, ioreg + 1);
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}

/*
 * ISA constants
 */

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#define IOREGION_ALIGNMENT	~7
#define IOREGION_OFFSET		5
#define IOREGION_LENGTH		2
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#define ADDR_REG_OFFSET		0
#define DATA_REG_OFFSET		1
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#define W83627EHF_REG_BANK		0x4E
#define W83627EHF_REG_CONFIG		0x40
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/* Not currently used:
 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 * REG_MAN_ID is at port 0x4f
 * REG_CHIP_ID is at port 0x58 */
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static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };

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/* The W83627EHF registers for nr=7,8,9 are in bank 5 */
#define W83627EHF_REG_IN_MAX(nr)	((nr < 7) ? (0x2b + (nr) * 2) : \
					 (0x554 + (((nr) - 7) * 2)))
#define W83627EHF_REG_IN_MIN(nr)	((nr < 7) ? (0x2c + (nr) * 2) : \
					 (0x555 + (((nr) - 7) * 2)))
#define W83627EHF_REG_IN(nr)		((nr < 7) ? (0x20 + (nr)) : \
					 (0x550 + (nr) - 7))

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#define W83627EHF_REG_TEMP1		0x27
#define W83627EHF_REG_TEMP1_HYST	0x3a
#define W83627EHF_REG_TEMP1_OVER	0x39
static const u16 W83627EHF_REG_TEMP[] = { 0x150, 0x250 };
static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x153, 0x253 };
static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x155, 0x255 };
static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0x152, 0x252 };

/* Fan clock dividers are spread over the following five registers */
#define W83627EHF_REG_FANDIV1		0x47
#define W83627EHF_REG_FANDIV2		0x4B
#define W83627EHF_REG_VBAT		0x5D
#define W83627EHF_REG_DIODE		0x59
#define W83627EHF_REG_SMI_OVT		0x4C

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#define W83627EHF_REG_ALARM1		0x459
#define W83627EHF_REG_ALARM2		0x45A
#define W83627EHF_REG_ALARM3		0x45B

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/* SmartFan registers */
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#define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
#define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e

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/* DC or PWM output fan configuration */
static const u8 W83627EHF_REG_PWM_ENABLE[] = {
	0x04,			/* SYS FAN0 output mode and PWM mode */
	0x04,			/* CPU FAN0 output mode and PWM mode */
	0x12,			/* AUX FAN mode */
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	0x62,			/* CPU FAN1 mode */
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};

static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };

/* FAN Duty Cycle, be used to control */
static const u8 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
static const u8 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };

/* Advanced Fan control, some values are common for all fans */
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static const u8 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
static const u8 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
static const u8 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
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static const u8 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]
						= { 0xff, 0x67, 0xff, 0x69 };
static const u8 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]
						= { 0xff, 0x68, 0xff, 0x6a };

static const u8 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };
static const u8 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[] = { 0x68, 0x6a, 0x6c };
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/*
 * Conversions
 */

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/* 1 is PWM mode, output in ms */
static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
{
	return mode ? 100 * reg : 400 * reg;
}

static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
{
	return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
						(msec + 200) / 400), 1, 255);
}

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static inline unsigned int
fan_from_reg(u8 reg, unsigned int div)
{
	if (reg == 0 || reg == 255)
		return 0;
	return 1350000U / (reg * div);
}

static inline unsigned int
div_from_reg(u8 reg)
{
	return 1 << reg;
}

static inline int
temp1_from_reg(s8 reg)
{
	return reg * 1000;
}

static inline s8
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temp1_to_reg(long temp, int min, int max)
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{
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	if (temp <= min)
		return min / 1000;
	if (temp >= max)
		return max / 1000;
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	if (temp < 0)
		return (temp - 500) / 1000;
	return (temp + 500) / 1000;
}

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/* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */

static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };

static inline long in_from_reg(u8 reg, u8 nr)
{
	return reg * scale_in[nr];
}

static inline u8 in_to_reg(u32 val, u8 nr)
{
	return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0, 255);
}

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/*
 * Data structures and manipulation thereof
 */

struct w83627ehf_data {
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	int addr;	/* IO base of hw monitor block */
	const char *name;

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	struct device *hwmon_dev;
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	struct mutex lock;
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	const u8 *REG_FAN_START_OUTPUT;
	const u8 *REG_FAN_STOP_OUTPUT;
	const u8 *REG_FAN_MAX_OUTPUT;
	const u8 *REG_FAN_STEP_OUTPUT;

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	struct mutex update_lock;
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	char valid;		/* !=0 if following fields are valid */
	unsigned long last_updated;	/* In jiffies */

	/* Register values */
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	u8 in_num;		/* number of in inputs we have */
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	u8 in[10];		/* Register value */
	u8 in_max[10];		/* Register value */
	u8 in_min[10];		/* Register value */
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	u8 fan[5];
	u8 fan_min[5];
	u8 fan_div[5];
	u8 has_fan;		/* some fan inputs can be disabled */
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	u8 temp_type[3];
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	s8 temp1;
	s8 temp1_max;
	s8 temp1_max_hyst;
	s16 temp[2];
	s16 temp_max[2];
	s16 temp_max_hyst[2];
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	u32 alarms;
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	u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
	u8 pwm_enable[4]; /* 1->manual
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			     2->thermal cruise mode (also called SmartFan I)
			     3->fan speed cruise mode
			     4->variable thermal cruise (also called SmartFan III) */
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	u8 pwm_num;		/* number of pwm */
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	u8 pwm[4];
	u8 target_temp[4];
	u8 tolerance[4];

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	u8 fan_start_output[4]; /* minimum fan speed when spinning up */
	u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
	u8 fan_stop_time[4]; /* time at minimum before disabling fan */
	u8 fan_max_output[4]; /* maximum fan speed */
	u8 fan_step_output[4]; /* rate of change output value */
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	u8 vid;
	u8 vrm;
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	u8 temp3_disable;
	u8 in6_skip;
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};

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struct w83627ehf_sio_data {
	int sioreg;
	enum kinds kind;
};

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static inline int is_word_sized(u16 reg)
{
	return (((reg & 0xff00) == 0x100
	      || (reg & 0xff00) == 0x200)
	     && ((reg & 0x00ff) == 0x50
	      || (reg & 0x00ff) == 0x53
	      || (reg & 0x00ff) == 0x55));
}

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/* Registers 0x50-0x5f are banked */
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static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
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{
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	if ((reg & 0x00f0) == 0x50) {
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		outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
		outb_p(reg >> 8, data->addr + DATA_REG_OFFSET);
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	}
}

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/* Not strictly necessary, but play it safe for now */
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static inline void w83627ehf_reset_bank(struct w83627ehf_data *data, u16 reg)
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{
	if (reg & 0xff00) {
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		outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
		outb_p(0, data->addr + DATA_REG_OFFSET);
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	}
}

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static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
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{
	int res, word_sized = is_word_sized(reg);

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	mutex_lock(&data->lock);
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	w83627ehf_set_bank(data, reg);
	outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
	res = inb_p(data->addr + DATA_REG_OFFSET);
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	if (word_sized) {
		outb_p((reg & 0xff) + 1,
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		       data->addr + ADDR_REG_OFFSET);
		res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
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	}
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	w83627ehf_reset_bank(data, reg);
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	mutex_unlock(&data->lock);
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	return res;
}

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static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg, u16 value)
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{
	int word_sized = is_word_sized(reg);

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	mutex_lock(&data->lock);
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	w83627ehf_set_bank(data, reg);
	outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
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	if (word_sized) {
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		outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
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		outb_p((reg & 0xff) + 1,
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		       data->addr + ADDR_REG_OFFSET);
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	}
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	outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
	w83627ehf_reset_bank(data, reg);
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	mutex_unlock(&data->lock);
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	return 0;
}

/* This function assumes that the caller holds data->update_lock */
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static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
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{
	u8 reg;

	switch (nr) {
	case 0:
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		reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
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		    | ((data->fan_div[0] & 0x03) << 4);
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		/* fan5 input control bit is write only, compute the value */
		reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
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		w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
		reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
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		    | ((data->fan_div[0] & 0x04) << 3);
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		w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
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		break;
	case 1:
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		reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
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		    | ((data->fan_div[1] & 0x03) << 6);
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		/* fan5 input control bit is write only, compute the value */
		reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
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		w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
		reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
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		    | ((data->fan_div[1] & 0x04) << 4);
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		w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
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		break;
	case 2:
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		reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
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		    | ((data->fan_div[2] & 0x03) << 6);
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		w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
		reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
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		    | ((data->fan_div[2] & 0x04) << 5);
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		w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
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		break;
	case 3:
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		reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
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		    | (data->fan_div[3] & 0x03);
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		w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
		reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
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		    | ((data->fan_div[3] & 0x04) << 5);
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		w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
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		break;
	case 4:
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		reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
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		    | ((data->fan_div[4] & 0x03) << 2)
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		    | ((data->fan_div[4] & 0x04) << 5);
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		w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
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		break;
	}
}

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static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
{
	int i;

	i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
	data->fan_div[0] = (i >> 4) & 0x03;
	data->fan_div[1] = (i >> 6) & 0x03;
	i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
	data->fan_div[2] = (i >> 6) & 0x03;
	i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
	data->fan_div[0] |= (i >> 3) & 0x04;
	data->fan_div[1] |= (i >> 4) & 0x04;
	data->fan_div[2] |= (i >> 5) & 0x04;
	if (data->has_fan & ((1 << 3) | (1 << 4))) {
		i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
		data->fan_div[3] = i & 0x03;
		data->fan_div[4] = ((i >> 2) & 0x03)
				 | ((i >> 5) & 0x04);
	}
	if (data->has_fan & (1 << 3)) {
		i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
		data->fan_div[3] |= (i >> 5) & 0x04;
	}
}

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static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
{
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	struct w83627ehf_data *data = dev_get_drvdata(dev);
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	int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
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	int i;

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	mutex_lock(&data->update_lock);
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	if (time_after(jiffies, data->last_updated + HZ + HZ/2)
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	 || !data->valid) {
		/* Fan clock dividers */
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		w83627ehf_update_fan_div(data);
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		/* Measured voltages and limits */
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		for (i = 0; i < data->in_num; i++) {
			data->in[i] = w83627ehf_read_value(data,
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				      W83627EHF_REG_IN(i));
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			data->in_min[i] = w83627ehf_read_value(data,
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					  W83627EHF_REG_IN_MIN(i));
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			data->in_max[i] = w83627ehf_read_value(data,
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					  W83627EHF_REG_IN_MAX(i));
		}

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		/* Measured fan speeds and limits */
		for (i = 0; i < 5; i++) {
			if (!(data->has_fan & (1 << i)))
				continue;

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			data->fan[i] = w83627ehf_read_value(data,
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				       W83627EHF_REG_FAN[i]);
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			data->fan_min[i] = w83627ehf_read_value(data,
522 523 524 525 526 527 528
					   W83627EHF_REG_FAN_MIN[i]);

			/* If we failed to measure the fan speed and clock
			   divider can be increased, let's try that for next
			   time */
			if (data->fan[i] == 0xff
			 && data->fan_div[i] < 0x07) {
529
			 	dev_dbg(dev, "Increasing fan%d "
530
					"clock divider from %u to %u\n",
531
					i + 1, div_from_reg(data->fan_div[i]),
532 533
					div_from_reg(data->fan_div[i] + 1));
				data->fan_div[i]++;
534
				w83627ehf_write_fan_div(data, i);
535 536 537
				/* Preserve min limit if possible */
				if (data->fan_min[i] >= 2
				 && data->fan_min[i] != 255)
538
					w83627ehf_write_value(data,
539 540 541 542 543
						W83627EHF_REG_FAN_MIN[i],
						(data->fan_min[i] /= 2));
			}
		}

544 545 546 547
		for (i = 0; i < data->pwm_num; i++) {
			if (!(data->has_fan & (1 << i)))
				continue;

J
Jean Delvare 已提交
548
			/* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
549
			if (i != 1) {
550
				pwmcfg = w83627ehf_read_value(data,
551
						W83627EHF_REG_PWM_ENABLE[i]);
552
				tolerance = w83627ehf_read_value(data,
553 554 555 556 557 558 559 560
						W83627EHF_REG_TOLERANCE[i]);
			}
			data->pwm_mode[i] =
				((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1)
				? 0 : 1;
			data->pwm_enable[i] =
					((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
						& 3) + 1;
561
			data->pwm[i] = w83627ehf_read_value(data,
562
						W83627EHF_REG_PWM[i]);
D
Daniel J Blueman 已提交
563 564 565 566
			data->fan_start_output[i] = w83627ehf_read_value(data,
						W83627EHF_REG_FAN_START_OUTPUT[i]);
			data->fan_stop_output[i] = w83627ehf_read_value(data,
						W83627EHF_REG_FAN_STOP_OUTPUT[i]);
567
			data->fan_stop_time[i] = w83627ehf_read_value(data,
568
						W83627EHF_REG_FAN_STOP_TIME[i]);
569 570 571 572 573 574 575 576 577 578 579

			if (data->REG_FAN_MAX_OUTPUT[i] != 0xff)
				data->fan_max_output[i] =
				  w83627ehf_read_value(data,
					       data->REG_FAN_MAX_OUTPUT[i]);

			if (data->REG_FAN_STEP_OUTPUT[i] != 0xff)
				data->fan_step_output[i] =
				  w83627ehf_read_value(data,
					       data->REG_FAN_STEP_OUTPUT[i]);

580
			data->target_temp[i] =
581
				w83627ehf_read_value(data,
582 583 584 585 586 587
					W83627EHF_REG_TARGET[i]) &
					(data->pwm_mode[i] == 1 ? 0x7f : 0xff);
			data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0))
									& 0x0f;
		}

588
		/* Measured temperatures and limits */
589
		data->temp1 = w83627ehf_read_value(data,
590
			      W83627EHF_REG_TEMP1);
591
		data->temp1_max = w83627ehf_read_value(data,
592
				  W83627EHF_REG_TEMP1_OVER);
593
		data->temp1_max_hyst = w83627ehf_read_value(data,
594 595
				       W83627EHF_REG_TEMP1_HYST);
		for (i = 0; i < 2; i++) {
596
			data->temp[i] = w83627ehf_read_value(data,
597
					W83627EHF_REG_TEMP[i]);
598
			data->temp_max[i] = w83627ehf_read_value(data,
599
					    W83627EHF_REG_TEMP_OVER[i]);
600
			data->temp_max_hyst[i] = w83627ehf_read_value(data,
601 602 603
						 W83627EHF_REG_TEMP_HYST[i]);
		}

604
		data->alarms = w83627ehf_read_value(data,
605
					W83627EHF_REG_ALARM1) |
606
			       (w83627ehf_read_value(data,
607
					W83627EHF_REG_ALARM2) << 8) |
608
			       (w83627ehf_read_value(data,
609 610
					W83627EHF_REG_ALARM3) << 16);

611 612 613 614
		data->last_updated = jiffies;
		data->valid = 1;
	}

615
	mutex_unlock(&data->update_lock);
616 617 618 619 620 621
	return data;
}

/*
 * Sysfs callback functions
 */
622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640
#define show_in_reg(reg) \
static ssize_t \
show_##reg(struct device *dev, struct device_attribute *attr, \
	   char *buf) \
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
}
show_in_reg(in)
show_in_reg(in_min)
show_in_reg(in_max)

#define store_in_reg(REG, reg) \
static ssize_t \
store_in_##reg (struct device *dev, struct device_attribute *attr, \
			const char *buf, size_t count) \
{ \
641
	struct w83627ehf_data *data = dev_get_drvdata(dev); \
642 643 644 645 646 647
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	u32 val = simple_strtoul(buf, NULL, 10); \
 \
	mutex_lock(&data->update_lock); \
	data->in_##reg[nr] = in_to_reg(val, nr); \
648
	w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
649 650 651 652 653 654 655 656
			      data->in_##reg[nr]); \
	mutex_unlock(&data->update_lock); \
	return count; \
}

store_in_reg(MIN, min)
store_in_reg(MAX, max)

657 658 659 660 661 662 663 664
static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
{
	struct w83627ehf_data *data = w83627ehf_update_device(dev);
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
	return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
}

665 666 667 668 669 670 671 672 673 674 675 676 677
static struct sensor_device_attribute sda_in_input[] = {
	SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
	SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
	SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
	SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
	SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
	SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
	SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
	SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
	SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
	SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
};

678 679 680 681 682 683 684 685 686 687 688 689 690
static struct sensor_device_attribute sda_in_alarm[] = {
	SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
	SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
	SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
	SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
	SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
	SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
	SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
	SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
	SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
	SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
};

691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716
static struct sensor_device_attribute sda_in_min[] = {
       SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
       SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
       SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
       SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
       SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
       SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
       SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
       SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
       SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
       SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
};

static struct sensor_device_attribute sda_in_max[] = {
       SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
       SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
       SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
       SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
       SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
       SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
       SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
       SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
       SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
       SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
};

717 718
#define show_fan_reg(reg) \
static ssize_t \
719 720
show_##reg(struct device *dev, struct device_attribute *attr, \
	   char *buf) \
721 722
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
723 724
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
725 726 727 728 729 730 731 732
	return sprintf(buf, "%d\n", \
		       fan_from_reg(data->reg[nr], \
				    div_from_reg(data->fan_div[nr]))); \
}
show_fan_reg(fan);
show_fan_reg(fan_min);

static ssize_t
733 734
show_fan_div(struct device *dev, struct device_attribute *attr,
	     char *buf)
735 736
{
	struct w83627ehf_data *data = w83627ehf_update_device(dev);
737 738 739
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
	return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
740 741 742
}

static ssize_t
743 744
store_fan_min(struct device *dev, struct device_attribute *attr,
	      const char *buf, size_t count)
745
{
746
	struct w83627ehf_data *data = dev_get_drvdata(dev);
747 748
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
749 750 751 752
	unsigned int val = simple_strtoul(buf, NULL, 10);
	unsigned int reg;
	u8 new_div;

753
	mutex_lock(&data->update_lock);
754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771
	if (!val) {
		/* No min limit, alarm disabled */
		data->fan_min[nr] = 255;
		new_div = data->fan_div[nr]; /* No change */
		dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
	} else if ((reg = 1350000U / val) >= 128 * 255) {
		/* Speed below this value cannot possibly be represented,
		   even with the highest divider (128) */
		data->fan_min[nr] = 254;
		new_div = 7; /* 128 == (1 << 7) */
		dev_warn(dev, "fan%u low limit %u below minimum %u, set to "
			 "minimum\n", nr + 1, val, fan_from_reg(254, 128));
	} else if (!reg) {
		/* Speed above this value cannot possibly be represented,
		   even with the lowest divider (1) */
		data->fan_min[nr] = 1;
		new_div = 0; /* 1 == (1 << 0) */
		dev_warn(dev, "fan%u low limit %u above maximum %u, set to "
772
			 "maximum\n", nr + 1, val, fan_from_reg(1, 1));
773 774 775 776 777 778 779 780 781 782 783 784 785 786 787
	} else {
		/* Automatically pick the best divider, i.e. the one such
		   that the min limit will correspond to a register value
		   in the 96..192 range */
		new_div = 0;
		while (reg > 192 && new_div < 7) {
			reg >>= 1;
			new_div++;
		}
		data->fan_min[nr] = reg;
	}

	/* Write both the fan clock divider (if it changed) and the new
	   fan min (unconditionally) */
	if (new_div != data->fan_div[nr]) {
788 789 790 791 792 793 794 795 796
		/* Preserve the fan speed reading */
		if (data->fan[nr] != 0xff) {
			if (new_div > data->fan_div[nr])
				data->fan[nr] >>= new_div - data->fan_div[nr];
			else if (data->fan[nr] & 0x80)
				data->fan[nr] = 0xff;
			else
				data->fan[nr] <<= data->fan_div[nr] - new_div;
		}
797 798 799 800 801

		dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
			nr + 1, div_from_reg(data->fan_div[nr]),
			div_from_reg(new_div));
		data->fan_div[nr] = new_div;
802
		w83627ehf_write_fan_div(data, nr);
803 804
		/* Give the chip time to sample a new speed value */
		data->last_updated = jiffies;
805
	}
806
	w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[nr],
807
			      data->fan_min[nr]);
808
	mutex_unlock(&data->update_lock);
809 810 811 812

	return count;
}

813 814 815 816 817 818 819
static struct sensor_device_attribute sda_fan_input[] = {
	SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
	SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
	SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
	SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
	SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
};
820

821 822 823 824 825 826 827 828
static struct sensor_device_attribute sda_fan_alarm[] = {
	SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
	SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
	SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
	SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
	SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
};

829 830 831 832 833 834 835 836 837 838 839 840
static struct sensor_device_attribute sda_fan_min[] = {
	SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
		    store_fan_min, 0),
	SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
		    store_fan_min, 1),
	SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
		    store_fan_min, 2),
	SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
		    store_fan_min, 3),
	SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
		    store_fan_min, 4),
};
841

842 843 844 845 846 847 848 849
static struct sensor_device_attribute sda_fan_div[] = {
	SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
	SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
	SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
	SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
	SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
};

850 851
#define show_temp1_reg(reg) \
static ssize_t \
852 853
show_##reg(struct device *dev, struct device_attribute *attr, \
	   char *buf) \
854 855 856 857 858 859 860 861 862 863
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
	return sprintf(buf, "%d\n", temp1_from_reg(data->reg)); \
}
show_temp1_reg(temp1);
show_temp1_reg(temp1_max);
show_temp1_reg(temp1_max_hyst);

#define store_temp1_reg(REG, reg) \
static ssize_t \
864 865
store_temp1_##reg(struct device *dev, struct device_attribute *attr, \
		  const char *buf, size_t count) \
866
{ \
867
	struct w83627ehf_data *data = dev_get_drvdata(dev); \
868
	long val = simple_strtol(buf, NULL, 10); \
869
 \
870
	mutex_lock(&data->update_lock); \
871
	data->temp1_##reg = temp1_to_reg(val, -128000, 127000); \
872
	w83627ehf_write_value(data, W83627EHF_REG_TEMP1_##REG, \
873
			      data->temp1_##reg); \
874
	mutex_unlock(&data->update_lock); \
875 876 877 878 879 880 881
	return count; \
}
store_temp1_reg(OVER, max);
store_temp1_reg(HYST, max_hyst);

#define show_temp_reg(reg) \
static ssize_t \
882 883
show_##reg(struct device *dev, struct device_attribute *attr, \
	   char *buf) \
884 885
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
886 887
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
888 889 890 891 892 893 894 895 896
	return sprintf(buf, "%d\n", \
		       LM75_TEMP_FROM_REG(data->reg[nr])); \
}
show_temp_reg(temp);
show_temp_reg(temp_max);
show_temp_reg(temp_max_hyst);

#define store_temp_reg(REG, reg) \
static ssize_t \
897 898
store_##reg(struct device *dev, struct device_attribute *attr, \
	    const char *buf, size_t count) \
899
{ \
900
	struct w83627ehf_data *data = dev_get_drvdata(dev); \
901 902
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
903
	long val = simple_strtol(buf, NULL, 10); \
904
 \
905
	mutex_lock(&data->update_lock); \
906
	data->reg[nr] = LM75_TEMP_TO_REG(val); \
907
	w83627ehf_write_value(data, W83627EHF_REG_TEMP_##REG[nr], \
908
			      data->reg[nr]); \
909
	mutex_unlock(&data->update_lock); \
910 911 912 913 914
	return count; \
}
store_temp_reg(OVER, temp_max);
store_temp_reg(HYST, temp_max_hyst);

915 916 917 918 919 920 921 922 923
static ssize_t
show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
{
	struct w83627ehf_data *data = w83627ehf_update_device(dev);
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
	return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
}

924
static struct sensor_device_attribute sda_temp_input[] = {
925 926 927
	SENSOR_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0),
	SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 0),
	SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 1),
928 929 930
};

static struct sensor_device_attribute sda_temp_max[] = {
931 932 933 934 935 936
	SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1_max,
		    store_temp1_max, 0),
	SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
		    store_temp_max, 0),
	SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
		    store_temp_max, 1),
937 938 939
};

static struct sensor_device_attribute sda_temp_max_hyst[] = {
940 941 942 943 944 945
	SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1_max_hyst,
		    store_temp1_max_hyst, 0),
	SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
		    store_temp_max_hyst, 0),
	SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
		    store_temp_max_hyst, 1),
946 947 948
};

static struct sensor_device_attribute sda_temp_alarm[] = {
949 950 951
	SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
	SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
	SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
952 953 954
};

static struct sensor_device_attribute sda_temp_type[] = {
955 956 957
	SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
	SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
	SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
958
};
959

960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977
#define show_pwm_reg(reg) \
static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
				char *buf) \
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	return sprintf(buf, "%d\n", data->reg[nr]); \
}

show_pwm_reg(pwm_mode)
show_pwm_reg(pwm_enable)
show_pwm_reg(pwm)

static ssize_t
store_pwm_mode(struct device *dev, struct device_attribute *attr,
			const char *buf, size_t count)
{
978
	struct w83627ehf_data *data = dev_get_drvdata(dev);
979 980 981 982 983 984 985 986
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
	u32 val = simple_strtoul(buf, NULL, 10);
	u16 reg;

	if (val > 1)
		return -EINVAL;
	mutex_lock(&data->update_lock);
987
	reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
988 989 990 991
	data->pwm_mode[nr] = val;
	reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
	if (!val)
		reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
992
	w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
993 994 995 996 997 998 999 1000
	mutex_unlock(&data->update_lock);
	return count;
}

static ssize_t
store_pwm(struct device *dev, struct device_attribute *attr,
			const char *buf, size_t count)
{
1001
	struct w83627ehf_data *data = dev_get_drvdata(dev);
1002 1003 1004 1005 1006 1007
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
	u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255);

	mutex_lock(&data->update_lock);
	data->pwm[nr] = val;
1008
	w83627ehf_write_value(data, W83627EHF_REG_PWM[nr], val);
1009 1010 1011 1012 1013 1014 1015 1016
	mutex_unlock(&data->update_lock);
	return count;
}

static ssize_t
store_pwm_enable(struct device *dev, struct device_attribute *attr,
			const char *buf, size_t count)
{
1017
	struct w83627ehf_data *data = dev_get_drvdata(dev);
1018 1019 1020 1021 1022
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
	u32 val = simple_strtoul(buf, NULL, 10);
	u16 reg;

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Daniel J Blueman 已提交
1023
	if (!val || (val > 4))
1024 1025
		return -EINVAL;
	mutex_lock(&data->update_lock);
1026
	reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1027 1028 1029
	data->pwm_enable[nr] = val;
	reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
	reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
1030
	w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052
	mutex_unlock(&data->update_lock);
	return count;
}


#define show_tol_temp(reg) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
				char *buf) \
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	return sprintf(buf, "%d\n", temp1_from_reg(data->reg[nr])); \
}

show_tol_temp(tolerance)
show_tol_temp(target_temp)

static ssize_t
store_target_temp(struct device *dev, struct device_attribute *attr,
			const char *buf, size_t count)
{
1053
	struct w83627ehf_data *data = dev_get_drvdata(dev);
1054 1055 1056 1057 1058 1059
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
	u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 127000);

	mutex_lock(&data->update_lock);
	data->target_temp[nr] = val;
1060
	w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
1061 1062 1063 1064 1065 1066 1067 1068
	mutex_unlock(&data->update_lock);
	return count;
}

static ssize_t
store_tolerance(struct device *dev, struct device_attribute *attr,
			const char *buf, size_t count)
{
1069
	struct w83627ehf_data *data = dev_get_drvdata(dev);
1070 1071 1072 1073 1074 1075 1076
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
	u16 reg;
	/* Limit the temp to 0C - 15C */
	u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 15000);

	mutex_lock(&data->update_lock);
1077
	reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1078 1079 1080 1081 1082
	data->tolerance[nr] = val;
	if (nr == 1)
		reg = (reg & 0x0f) | (val << 4);
	else
		reg = (reg & 0xf0) | val;
1083
	w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153
	mutex_unlock(&data->update_lock);
	return count;
}

static struct sensor_device_attribute sda_pwm[] = {
	SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
	SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
	SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
	SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
};

static struct sensor_device_attribute sda_pwm_mode[] = {
	SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
		    store_pwm_mode, 0),
	SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
		    store_pwm_mode, 1),
	SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
		    store_pwm_mode, 2),
	SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
		    store_pwm_mode, 3),
};

static struct sensor_device_attribute sda_pwm_enable[] = {
	SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
		    store_pwm_enable, 0),
	SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
		    store_pwm_enable, 1),
	SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
		    store_pwm_enable, 2),
	SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
		    store_pwm_enable, 3),
};

static struct sensor_device_attribute sda_target_temp[] = {
	SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
		    store_target_temp, 0),
	SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
		    store_target_temp, 1),
	SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
		    store_target_temp, 2),
	SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
		    store_target_temp, 3),
};

static struct sensor_device_attribute sda_tolerance[] = {
	SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
		    store_tolerance, 0),
	SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
		    store_tolerance, 1),
	SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
		    store_tolerance, 2),
	SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
		    store_tolerance, 3),
};

/* Smart Fan registers */

#define fan_functions(reg, REG) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
		       char *buf) \
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	return sprintf(buf, "%d\n", data->reg[nr]); \
}\
static ssize_t \
store_##reg(struct device *dev, struct device_attribute *attr, \
			    const char *buf, size_t count) \
{\
1154
	struct w83627ehf_data *data = dev_get_drvdata(dev); \
1155 1156 1157 1158 1159
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 1, 255); \
	mutex_lock(&data->update_lock); \
	data->reg[nr] = val; \
1160
	w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1161 1162 1163 1164
	mutex_unlock(&data->update_lock); \
	return count; \
}

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Daniel J Blueman 已提交
1165 1166 1167 1168
fan_functions(fan_start_output, FAN_START_OUTPUT)
fan_functions(fan_stop_output, FAN_STOP_OUTPUT)
fan_functions(fan_max_output, FAN_MAX_OUTPUT)
fan_functions(fan_step_output, FAN_STEP_OUTPUT)
1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184

#define fan_time_functions(reg, REG) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
				char *buf) \
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	return sprintf(buf, "%d\n", \
			step_time_from_reg(data->reg[nr], data->pwm_mode[nr])); \
} \
\
static ssize_t \
store_##reg(struct device *dev, struct device_attribute *attr, \
			const char *buf, size_t count) \
{ \
1185
	struct w83627ehf_data *data = dev_get_drvdata(dev); \
1186 1187 1188 1189 1190 1191
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	u8 val = step_time_to_reg(simple_strtoul(buf, NULL, 10), \
					data->pwm_mode[nr]); \
	mutex_lock(&data->update_lock); \
	data->reg[nr] = val; \
1192
	w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1193 1194 1195 1196 1197 1198
	mutex_unlock(&data->update_lock); \
	return count; \
} \

fan_time_functions(fan_stop_time, FAN_STOP_TIME)

1199 1200 1201 1202 1203 1204 1205 1206
static ssize_t show_name(struct device *dev, struct device_attribute *attr,
			 char *buf)
{
	struct w83627ehf_data *data = dev_get_drvdata(dev);

	return sprintf(buf, "%s\n", data->name);
}
static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1207 1208 1209 1210

static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
	SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
		    store_fan_stop_time, 3),
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Daniel J Blueman 已提交
1211 1212 1213 1214 1215 1216 1217 1218
	SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
		    store_fan_start_output, 3),
	SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
		    store_fan_stop_output, 3),
	SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
		    store_fan_max_output, 3),
	SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
		    store_fan_step_output, 3),
1219 1220 1221 1222 1223 1224 1225 1226 1227
};

static struct sensor_device_attribute sda_sf3_arrays[] = {
	SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
		    store_fan_stop_time, 0),
	SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
		    store_fan_stop_time, 1),
	SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
		    store_fan_stop_time, 2),
D
Daniel J Blueman 已提交
1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239
	SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
		    store_fan_start_output, 0),
	SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
		    store_fan_start_output, 1),
	SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
		    store_fan_start_output, 2),
	SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
		    store_fan_stop_output, 0),
	SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
		    store_fan_stop_output, 1),
	SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
		    store_fan_stop_output, 2),
1240
};
D
Daniel J Blueman 已提交
1241

1242 1243 1244 1245 1246 1247 1248 1249 1250 1251

/*
 * pwm1 and pwm3 don't support max and step settings on all chips.
 * Need to check support while generating/removing attribute files.
 */
static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {
	SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
		    store_fan_max_output, 0),
	SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
		    store_fan_step_output, 0),
D
Daniel J Blueman 已提交
1252 1253 1254 1255
	SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
		    store_fan_max_output, 1),
	SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
		    store_fan_step_output, 1),
1256 1257 1258 1259
	SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
		    store_fan_max_output, 2),
	SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
		    store_fan_step_output, 2),
1260 1261
};

1262 1263 1264 1265 1266 1267 1268 1269
static ssize_t
show_vid(struct device *dev, struct device_attribute *attr, char *buf)
{
	struct w83627ehf_data *data = dev_get_drvdata(dev);
	return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
}
static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);

1270
/*
1271
 * Driver and device management
1272 1273
 */

1274 1275 1276 1277 1278
static void w83627ehf_device_remove_files(struct device *dev)
{
	/* some entries in the following arrays may not have been used in
	 * device_create_file(), but device_remove_file() will ignore them */
	int i;
1279
	struct w83627ehf_data *data = dev_get_drvdata(dev);
1280 1281 1282

	for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
		device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1283 1284 1285 1286 1287 1288
	for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
		struct sensor_device_attribute *attr =
		  &sda_sf3_max_step_arrays[i];
		if (data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)
			device_remove_file(dev, &attr->dev_attr);
	}
1289 1290
	for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
		device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1291
	for (i = 0; i < data->in_num; i++) {
1292 1293
		if ((i == 6) && data->in6_skip)
			continue;
1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304
		device_remove_file(dev, &sda_in_input[i].dev_attr);
		device_remove_file(dev, &sda_in_alarm[i].dev_attr);
		device_remove_file(dev, &sda_in_min[i].dev_attr);
		device_remove_file(dev, &sda_in_max[i].dev_attr);
	}
	for (i = 0; i < 5; i++) {
		device_remove_file(dev, &sda_fan_input[i].dev_attr);
		device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
		device_remove_file(dev, &sda_fan_div[i].dev_attr);
		device_remove_file(dev, &sda_fan_min[i].dev_attr);
	}
1305
	for (i = 0; i < data->pwm_num; i++) {
1306 1307 1308 1309 1310 1311
		device_remove_file(dev, &sda_pwm[i].dev_attr);
		device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
		device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
		device_remove_file(dev, &sda_target_temp[i].dev_attr);
		device_remove_file(dev, &sda_tolerance[i].dev_attr);
	}
1312 1313 1314 1315 1316 1317 1318 1319 1320
	for (i = 0; i < 3; i++) {
		if ((i == 2) && data->temp3_disable)
			continue;
		device_remove_file(dev, &sda_temp_input[i].dev_attr);
		device_remove_file(dev, &sda_temp_max[i].dev_attr);
		device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
		device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
		device_remove_file(dev, &sda_temp_type[i].dev_attr);
	}
1321

1322
	device_remove_file(dev, &dev_attr_name);
1323
	device_remove_file(dev, &dev_attr_cpu0_vid);
1324
}
1325

1326 1327
/* Get the monitoring functions started */
static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data)
1328 1329
{
	int i;
1330
	u8 tmp, diode;
1331 1332

	/* Start monitoring is needed */
1333
	tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1334
	if (!(tmp & 0x01))
1335
		w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1336 1337 1338 1339
				      tmp | 0x01);

	/* Enable temp2 and temp3 if needed */
	for (i = 0; i < 2; i++) {
1340
		tmp = w83627ehf_read_value(data,
1341
					   W83627EHF_REG_TEMP_CONFIG[i]);
1342 1343
		if ((i == 1) && data->temp3_disable)
			continue;
1344
		if (tmp & 0x01)
1345
			w83627ehf_write_value(data,
1346 1347 1348
					      W83627EHF_REG_TEMP_CONFIG[i],
					      tmp & 0xfe);
	}
1349 1350 1351 1352 1353

	/* Enable VBAT monitoring if needed */
	tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
	if (!(tmp & 0x01))
		w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1354 1355 1356 1357 1358 1359 1360 1361 1362

	/* Get thermal sensor types */
	diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
	for (i = 0; i < 3; i++) {
		if ((tmp & (0x02 << i)))
			data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 2;
		else
			data->temp_type[i] = 4; /* thermistor */
	}
1363 1364
}

1365
static int __devinit w83627ehf_probe(struct platform_device *pdev)
1366
{
1367 1368
	struct device *dev = &pdev->dev;
	struct w83627ehf_sio_data *sio_data = dev->platform_data;
1369
	struct w83627ehf_data *data;
1370
	struct resource *res;
1371
	u8 fan4pin, fan5pin, en_vrm10;
1372 1373
	int i, err = 0;

1374 1375
	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
	if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1376
		err = -EBUSY;
1377 1378 1379
		dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
			(unsigned long)res->start,
			(unsigned long)res->start + IOREGION_LENGTH - 1);
1380 1381 1382
		goto exit;
	}

D
Deepak Saxena 已提交
1383
	if (!(data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL))) {
1384 1385 1386 1387
		err = -ENOMEM;
		goto exit_release;
	}

1388
	data->addr = res->start;
1389 1390
	mutex_init(&data->lock);
	mutex_init(&data->update_lock);
1391 1392
	data->name = w83627ehf_device_names[sio_data->kind];
	platform_set_drvdata(pdev, data);
1393

1394 1395 1396
	/* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
	data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
	/* 667HG has 3 pwms */
1397 1398
	data->pwm_num = (sio_data->kind == w83667hg
			 || sio_data->kind == w83667hg_b) ? 3 : 4;
1399

1400
	/* Check temp3 configuration bit for 667HG */
1401
	if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
1402 1403 1404 1405 1406
		data->temp3_disable = w83627ehf_read_value(data,
					W83627EHF_REG_TEMP_CONFIG[1]) & 0x01;
		data->in6_skip = !data->temp3_disable;
	}

1407 1408
	data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
	data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419
	if (sio_data->kind == w83667hg_b) {
		data->REG_FAN_MAX_OUTPUT =
		  W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;
		data->REG_FAN_STEP_OUTPUT =
		  W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;
	} else {
		data->REG_FAN_MAX_OUTPUT =
		  W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;
		data->REG_FAN_STEP_OUTPUT =
		  W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;
	}
1420

1421
	/* Initialize the chip */
1422
	w83627ehf_init_device(data);
1423

1424 1425 1426
	data->vrm = vid_which_vrm();
	superio_enter(sio_data->sioreg);
	/* Read VID value */
1427
	if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
1428 1429 1430 1431 1432
		/* W83667HG has different pins for VID input and output, so
		we can get the VID input values directly at logical device D
		0xe3. */
		superio_select(sio_data->sioreg, W83667HG_LD_VID);
		data->vid = superio_inb(sio_data->sioreg, 0xe3);
1433 1434 1435
		err = device_create_file(dev, &dev_attr_cpu0_vid);
		if (err)
			goto exit_release;
1436
	} else {
1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474
		superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
		if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
			/* Set VID input sensibility if needed. In theory the
			   BIOS should have set it, but in practice it's not
			   always the case. We only do it for the W83627EHF/EHG
			   because the W83627DHG is more complex in this
			   respect. */
			if (sio_data->kind == w83627ehf) {
				en_vrm10 = superio_inb(sio_data->sioreg,
						       SIO_REG_EN_VRM10);
				if ((en_vrm10 & 0x08) && data->vrm == 90) {
					dev_warn(dev, "Setting VID input "
						 "voltage to TTL\n");
					superio_outb(sio_data->sioreg,
						     SIO_REG_EN_VRM10,
						     en_vrm10 & ~0x08);
				} else if (!(en_vrm10 & 0x08)
					   && data->vrm == 100) {
					dev_warn(dev, "Setting VID input "
						 "voltage to VRM10\n");
					superio_outb(sio_data->sioreg,
						     SIO_REG_EN_VRM10,
						     en_vrm10 | 0x08);
				}
			}

			data->vid = superio_inb(sio_data->sioreg,
						SIO_REG_VID_DATA);
			if (sio_data->kind == w83627ehf) /* 6 VID pins only */
				data->vid &= 0x3f;

			err = device_create_file(dev, &dev_attr_cpu0_vid);
			if (err)
				goto exit_release;
		} else {
			dev_info(dev, "VID pins in output mode, CPU VID not "
				 "available\n");
		}
1475 1476
	}

1477
	/* fan4 and fan5 share some pins with the GPIO and serial flash */
1478
	if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
1479 1480 1481 1482 1483 1484
		fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
		fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
	} else {
		fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
		fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
	}
1485
	superio_exit(sio_data->sioreg);
1486

1487
	/* It looks like fan4 and fan5 pins can be alternatively used
1488 1489 1490 1491
	   as fan on/off switches, but fan5 control is write only :/
	   We assume that if the serial interface is disabled, designers
	   connected fan5 as input unless they are emitting log 1, which
	   is not the default. */
1492

1493
	data->has_fan = 0x07; /* fan1, fan2 and fan3 */
1494
	i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1495
	if ((i & (1 << 2)) && fan4pin)
1496
		data->has_fan |= (1 << 3);
1497
	if (!(i & (1 << 1)) && fan5pin)
1498 1499
		data->has_fan |= (1 << 4);

1500 1501 1502
	/* Read fan clock dividers immediately */
	w83627ehf_update_fan_div(data);

1503
	/* Register sysfs hooks */
1504
  	for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1505 1506 1507
		if ((err = device_create_file(dev,
			&sda_sf3_arrays[i].dev_attr)))
			goto exit_remove;
1508

1509 1510 1511 1512 1513 1514 1515 1516 1517
	for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
		struct sensor_device_attribute *attr =
		  &sda_sf3_max_step_arrays[i];
		if (data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {
			err = device_create_file(dev, &attr->dev_attr);
			if (err)
				goto exit_remove;
		}
	}
1518
	/* if fan4 is enabled create the sf3 files for it */
1519
	if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
1520 1521 1522 1523 1524
		for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
			if ((err = device_create_file(dev,
				&sda_sf3_arrays_fan4[i].dev_attr)))
				goto exit_remove;
		}
1525

1526 1527 1528
	for (i = 0; i < data->in_num; i++) {
		if ((i == 6) && data->in6_skip)
			continue;
1529 1530 1531 1532 1533 1534 1535 1536
		if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
			|| (err = device_create_file(dev,
				&sda_in_alarm[i].dev_attr))
			|| (err = device_create_file(dev,
				&sda_in_min[i].dev_attr))
			|| (err = device_create_file(dev,
				&sda_in_max[i].dev_attr)))
			goto exit_remove;
1537
	}
1538

1539
	for (i = 0; i < 5; i++) {
1540
		if (data->has_fan & (1 << i)) {
1541 1542 1543 1544 1545 1546 1547 1548 1549
			if ((err = device_create_file(dev,
					&sda_fan_input[i].dev_attr))
				|| (err = device_create_file(dev,
					&sda_fan_alarm[i].dev_attr))
				|| (err = device_create_file(dev,
					&sda_fan_div[i].dev_attr))
				|| (err = device_create_file(dev,
					&sda_fan_min[i].dev_attr)))
				goto exit_remove;
1550
			if (i < data->pwm_num &&
1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561
				((err = device_create_file(dev,
					&sda_pwm[i].dev_attr))
				|| (err = device_create_file(dev,
					&sda_pwm_mode[i].dev_attr))
				|| (err = device_create_file(dev,
					&sda_pwm_enable[i].dev_attr))
				|| (err = device_create_file(dev,
					&sda_target_temp[i].dev_attr))
				|| (err = device_create_file(dev,
					&sda_tolerance[i].dev_attr))))
				goto exit_remove;
1562
		}
1563
	}
1564

1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577
	for (i = 0; i < 3; i++) {
		if ((i == 2) && data->temp3_disable)
			continue;
		if ((err = device_create_file(dev,
				&sda_temp_input[i].dev_attr))
			|| (err = device_create_file(dev,
				&sda_temp_max[i].dev_attr))
			|| (err = device_create_file(dev,
				&sda_temp_max_hyst[i].dev_attr))
			|| (err = device_create_file(dev,
				&sda_temp_alarm[i].dev_attr))
			|| (err = device_create_file(dev,
				&sda_temp_type[i].dev_attr)))
1578
			goto exit_remove;
1579
	}
1580

1581 1582 1583 1584
	err = device_create_file(dev, &dev_attr_name);
	if (err)
		goto exit_remove;

1585 1586 1587
	data->hwmon_dev = hwmon_device_register(dev);
	if (IS_ERR(data->hwmon_dev)) {
		err = PTR_ERR(data->hwmon_dev);
1588 1589
		goto exit_remove;
	}
1590 1591 1592

	return 0;

1593 1594
exit_remove:
	w83627ehf_device_remove_files(dev);
1595
	kfree(data);
1596
	platform_set_drvdata(pdev, NULL);
1597
exit_release:
1598
	release_region(res->start, IOREGION_LENGTH);
1599 1600 1601 1602
exit:
	return err;
}

1603
static int __devexit w83627ehf_remove(struct platform_device *pdev)
1604
{
1605
	struct w83627ehf_data *data = platform_get_drvdata(pdev);
1606

1607
	hwmon_device_unregister(data->hwmon_dev);
1608 1609 1610
	w83627ehf_device_remove_files(&pdev->dev);
	release_region(data->addr, IOREGION_LENGTH);
	platform_set_drvdata(pdev, NULL);
1611
	kfree(data);
1612 1613 1614 1615

	return 0;
}

1616
static struct platform_driver w83627ehf_driver = {
1617
	.driver = {
J
Jean Delvare 已提交
1618
		.owner	= THIS_MODULE,
1619
		.name	= DRVNAME,
1620
	},
1621 1622
	.probe		= w83627ehf_probe,
	.remove		= __devexit_p(w83627ehf_remove),
1623 1624
};

1625 1626 1627
/* w83627ehf_find() looks for a '627 in the Super-I/O config space */
static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
				 struct w83627ehf_sio_data *sio_data)
1628
{
1629 1630 1631
	static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
	static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
	static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
1632
	static const char __initdata sio_name_W83627DHG_P[] = "W83627DHG-P";
1633
	static const char __initdata sio_name_W83667HG[] = "W83667HG";
1634
	static const char __initdata sio_name_W83667HG_B[] = "W83667HG-B";
1635

1636
	u16 val;
1637
	const char *sio_name;
1638

1639
	superio_enter(sioaddr);
1640

1641 1642 1643 1644 1645
	if (force_id)
		val = force_id;
	else
		val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
		    | superio_inb(sioaddr, SIO_REG_DEVID + 1);
1646 1647
	switch (val & SIO_ID_MASK) {
	case SIO_W83627EHF_ID:
1648 1649 1650
		sio_data->kind = w83627ehf;
		sio_name = sio_name_W83627EHF;
		break;
1651
	case SIO_W83627EHG_ID:
1652 1653 1654 1655 1656 1657
		sio_data->kind = w83627ehf;
		sio_name = sio_name_W83627EHG;
		break;
	case SIO_W83627DHG_ID:
		sio_data->kind = w83627dhg;
		sio_name = sio_name_W83627DHG;
1658
		break;
1659 1660 1661 1662
	case SIO_W83627DHG_P_ID:
		sio_data->kind = w83627dhg_p;
		sio_name = sio_name_W83627DHG_P;
		break;
1663 1664 1665 1666
	case SIO_W83667HG_ID:
		sio_data->kind = w83667hg;
		sio_name = sio_name_W83667HG;
		break;
1667 1668 1669 1670
	case SIO_W83667HG_B_ID:
		sio_data->kind = w83667hg_b;
		sio_name = sio_name_W83667HG_B;
		break;
1671
	default:
1672
		if (val != 0xffff)
1673
			pr_debug("unsupported chip ID: 0x%04x\n", val);
1674
		superio_exit(sioaddr);
1675 1676 1677
		return -ENODEV;
	}

1678 1679 1680 1681
	/* We have a known chip, find the HWM I/O address */
	superio_select(sioaddr, W83627EHF_LD_HWM);
	val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
	    | superio_inb(sioaddr, SIO_REG_ADDR + 1);
1682
	*addr = val & IOREGION_ALIGNMENT;
1683
	if (*addr == 0) {
1684
		pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
1685
		superio_exit(sioaddr);
1686 1687 1688 1689
		return -ENODEV;
	}

	/* Activate logical device if needed */
1690
	val = superio_inb(sioaddr, SIO_REG_ENABLE);
1691
	if (!(val & 0x01)) {
1692
		pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
1693
		superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
1694
	}
1695 1696

	superio_exit(sioaddr);
1697
	pr_info("Found %s chip at %#x\n", sio_name, *addr);
1698
	sio_data->sioreg = sioaddr;
1699 1700 1701 1702

	return 0;
}

1703 1704 1705 1706 1707 1708
/* when Super-I/O functions move to a separate file, the Super-I/O
 * bus will manage the lifetime of the device and this module will only keep
 * track of the w83627ehf driver. But since we platform_device_alloc(), we
 * must keep track of the device */
static struct platform_device *pdev;

1709 1710
static int __init sensors_w83627ehf_init(void)
{
1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722
	int err;
	unsigned short address;
	struct resource res;
	struct w83627ehf_sio_data sio_data;

	/* initialize sio_data->kind and sio_data->sioreg.
	 *
	 * when Super-I/O functions move to a separate file, the Super-I/O
	 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
	 * w83627ehf hardware monitor, and call probe() */
	if (w83627ehf_find(0x2e, &address, &sio_data) &&
	    w83627ehf_find(0x4e, &address, &sio_data))
1723 1724
		return -ENODEV;

1725 1726 1727 1728 1729 1730
	err = platform_driver_register(&w83627ehf_driver);
	if (err)
		goto exit;

	if (!(pdev = platform_device_alloc(DRVNAME, address))) {
		err = -ENOMEM;
1731
		pr_err("Device allocation failed\n");
1732 1733 1734 1735 1736 1737
		goto exit_unregister;
	}

	err = platform_device_add_data(pdev, &sio_data,
				       sizeof(struct w83627ehf_sio_data));
	if (err) {
1738
		pr_err("Platform data allocation failed\n");
1739 1740 1741 1742 1743 1744 1745 1746
		goto exit_device_put;
	}

	memset(&res, 0, sizeof(res));
	res.name = DRVNAME;
	res.start = address + IOREGION_OFFSET;
	res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
	res.flags = IORESOURCE_IO;
1747 1748 1749

	err = acpi_check_resource_conflict(&res);
	if (err)
1750
		goto exit_device_put;
1751

1752 1753
	err = platform_device_add_resources(pdev, &res, 1);
	if (err) {
1754
		pr_err("Device resource addition failed (%d)\n", err);
1755 1756 1757 1758 1759 1760
		goto exit_device_put;
	}

	/* platform_device_add calls probe() */
	err = platform_device_add(pdev);
	if (err) {
1761
		pr_err("Device addition failed (%d)\n", err);
1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772
		goto exit_device_put;
	}

	return 0;

exit_device_put:
	platform_device_put(pdev);
exit_unregister:
	platform_driver_unregister(&w83627ehf_driver);
exit:
	return err;
1773 1774 1775 1776
}

static void __exit sensors_w83627ehf_exit(void)
{
1777 1778
	platform_device_unregister(pdev);
	platform_driver_unregister(&w83627ehf_driver);
1779 1780 1781 1782 1783 1784 1785 1786
}

MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
MODULE_DESCRIPTION("W83627EHF driver");
MODULE_LICENSE("GPL");

module_init(sensors_w83627ehf_init);
module_exit(sensors_w83627ehf_exit);