w83627ehf.c 46.3 KB
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/*
    w83627ehf - Driver for the hardware monitoring functionality of
                the Winbond W83627EHF Super-I/O chip
    Copyright (C) 2005  Jean Delvare <khali@linux-fr.org>
J
Jean Delvare 已提交
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    Copyright (C) 2006  Yuan Mu (Winbond),
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                        Rudolf Marek <r.marek@assembler.cz>
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                        David Hubbard <david.c.hubbard@gmail.com>
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    Shamelessly ripped from the w83627hf driver
    Copyright (C) 2003  Mark Studebaker

    Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
    in testing and debugging this driver.

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    This driver also supports the W83627EHG, which is the lead-free
    version of the W83627EHF.

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    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.


    Supports the following chips:

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    Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
    w83627ehf   10      5       4       3      0x8850 0x88    0x5ca3
                                               0x8860 0xa1
    w83627dhg    9      5       4       3      0xa020 0xc1    0x5ca3
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*/

#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
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#include <linux/jiffies.h>
#include <linux/platform_device.h>
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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#include <linux/err.h>
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#include <linux/mutex.h>
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#include <asm/io.h>
#include "lm75.h"

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enum kinds { w83627ehf, w83627dhg };
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/* used to set data->name = w83627ehf_device_names[data->sio_kind] */
static const char * w83627ehf_device_names[] = {
	"w83627ehf",
	"w83627dhg",
};

#define DRVNAME "w83627ehf"
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/*
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 * Super-I/O constants and functions
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 */
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#define W83627EHF_LD_HWM	0x0b

#define SIO_REG_LDSEL		0x07	/* Logical device select */
#define SIO_REG_DEVID		0x20	/* Device ID (2 bytes) */
#define SIO_REG_ENABLE		0x30	/* Logical device enable */
#define SIO_REG_ADDR		0x60	/* Logical device address (2 bytes) */

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#define SIO_W83627EHF_ID	0x8850
#define SIO_W83627EHG_ID	0x8860
#define SIO_W83627DHG_ID	0xa020
#define SIO_ID_MASK		0xFFF0
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static inline void
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superio_outb(int ioreg, int reg, int val)
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{
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	outb(reg, ioreg);
	outb(val, ioreg + 1);
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}

static inline int
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superio_inb(int ioreg, int reg)
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{
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	outb(reg, ioreg);
	return inb(ioreg + 1);
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}

static inline void
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superio_select(int ioreg, int ld)
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{
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	outb(SIO_REG_LDSEL, ioreg);
	outb(ld, ioreg + 1);
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}

static inline void
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superio_enter(int ioreg)
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{
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	outb(0x87, ioreg);
	outb(0x87, ioreg);
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}

static inline void
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superio_exit(int ioreg)
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{
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	outb(0x02, ioreg);
	outb(0x02, ioreg + 1);
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}

/*
 * ISA constants
 */

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#define IOREGION_ALIGNMENT	~7
#define IOREGION_OFFSET		5
#define IOREGION_LENGTH		2
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#define ADDR_REG_OFFSET		0
#define DATA_REG_OFFSET		1
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#define W83627EHF_REG_BANK		0x4E
#define W83627EHF_REG_CONFIG		0x40
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/* Not currently used:
 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 * REG_MAN_ID is at port 0x4f
 * REG_CHIP_ID is at port 0x58 */
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static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };

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/* The W83627EHF registers for nr=7,8,9 are in bank 5 */
#define W83627EHF_REG_IN_MAX(nr)	((nr < 7) ? (0x2b + (nr) * 2) : \
					 (0x554 + (((nr) - 7) * 2)))
#define W83627EHF_REG_IN_MIN(nr)	((nr < 7) ? (0x2c + (nr) * 2) : \
					 (0x555 + (((nr) - 7) * 2)))
#define W83627EHF_REG_IN(nr)		((nr < 7) ? (0x20 + (nr)) : \
					 (0x550 + (nr) - 7))

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#define W83627EHF_REG_TEMP1		0x27
#define W83627EHF_REG_TEMP1_HYST	0x3a
#define W83627EHF_REG_TEMP1_OVER	0x39
static const u16 W83627EHF_REG_TEMP[] = { 0x150, 0x250 };
static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x153, 0x253 };
static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x155, 0x255 };
static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0x152, 0x252 };

/* Fan clock dividers are spread over the following five registers */
#define W83627EHF_REG_FANDIV1		0x47
#define W83627EHF_REG_FANDIV2		0x4B
#define W83627EHF_REG_VBAT		0x5D
#define W83627EHF_REG_DIODE		0x59
#define W83627EHF_REG_SMI_OVT		0x4C

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#define W83627EHF_REG_ALARM1		0x459
#define W83627EHF_REG_ALARM2		0x45A
#define W83627EHF_REG_ALARM3		0x45B

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/* SmartFan registers */
/* DC or PWM output fan configuration */
static const u8 W83627EHF_REG_PWM_ENABLE[] = {
	0x04,			/* SYS FAN0 output mode and PWM mode */
	0x04,			/* CPU FAN0 output mode and PWM mode */
	0x12,			/* AUX FAN mode */
	0x62,			/* CPU fan1 mode */
};

static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };

/* FAN Duty Cycle, be used to control */
static const u8 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
static const u8 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };


/* Advanced Fan control, some values are common for all fans */
static const u8 W83627EHF_REG_FAN_MIN_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
static const u8 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0C, 0x0D, 0x17, 0x66 };

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/*
 * Conversions
 */

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/* 1 is PWM mode, output in ms */
static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
{
	return mode ? 100 * reg : 400 * reg;
}

static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
{
	return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
						(msec + 200) / 400), 1, 255);
}

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static inline unsigned int
fan_from_reg(u8 reg, unsigned int div)
{
	if (reg == 0 || reg == 255)
		return 0;
	return 1350000U / (reg * div);
}

static inline unsigned int
div_from_reg(u8 reg)
{
	return 1 << reg;
}

static inline int
temp1_from_reg(s8 reg)
{
	return reg * 1000;
}

static inline s8
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temp1_to_reg(int temp, int min, int max)
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{
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	if (temp <= min)
		return min / 1000;
	if (temp >= max)
		return max / 1000;
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	if (temp < 0)
		return (temp - 500) / 1000;
	return (temp + 500) / 1000;
}

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/* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */

static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };

static inline long in_from_reg(u8 reg, u8 nr)
{
	return reg * scale_in[nr];
}

static inline u8 in_to_reg(u32 val, u8 nr)
{
	return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0, 255);
}

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/*
 * Data structures and manipulation thereof
 */

struct w83627ehf_data {
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	int addr;	/* IO base of hw monitor block */
	const char *name;

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	struct class_device *class_dev;
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	struct mutex lock;
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	struct mutex update_lock;
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	char valid;		/* !=0 if following fields are valid */
	unsigned long last_updated;	/* In jiffies */

	/* Register values */
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	u8 in_num;		/* number of in inputs we have */
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	u8 in[10];		/* Register value */
	u8 in_max[10];		/* Register value */
	u8 in_min[10];		/* Register value */
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	u8 fan[5];
	u8 fan_min[5];
	u8 fan_div[5];
	u8 has_fan;		/* some fan inputs can be disabled */
	s8 temp1;
	s8 temp1_max;
	s8 temp1_max_hyst;
	s16 temp[2];
	s16 temp_max[2];
	s16 temp_max_hyst[2];
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	u32 alarms;
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	u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
	u8 pwm_enable[4]; /* 1->manual
			     2->thermal cruise (also called SmartFan I) */
	u8 pwm[4];
	u8 target_temp[4];
	u8 tolerance[4];

	u8 fan_min_output[4]; /* minimum fan speed */
	u8 fan_stop_time[4];
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};

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struct w83627ehf_sio_data {
	int sioreg;
	enum kinds kind;
};

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static inline int is_word_sized(u16 reg)
{
	return (((reg & 0xff00) == 0x100
	      || (reg & 0xff00) == 0x200)
	     && ((reg & 0x00ff) == 0x50
	      || (reg & 0x00ff) == 0x53
	      || (reg & 0x00ff) == 0x55));
}

/* We assume that the default bank is 0, thus the following two functions do
   nothing for registers which live in bank 0. For others, they respectively
   set the bank register to the correct value (before the register is
   accessed), and back to 0 (afterwards). */
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static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
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{
	if (reg & 0xff00) {
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		outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
		outb_p(reg >> 8, data->addr + DATA_REG_OFFSET);
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	}
}

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static inline void w83627ehf_reset_bank(struct w83627ehf_data *data, u16 reg)
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{
	if (reg & 0xff00) {
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		outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
		outb_p(0, data->addr + DATA_REG_OFFSET);
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	}
}

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static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
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{
	int res, word_sized = is_word_sized(reg);

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	mutex_lock(&data->lock);
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	w83627ehf_set_bank(data, reg);
	outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
	res = inb_p(data->addr + DATA_REG_OFFSET);
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	if (word_sized) {
		outb_p((reg & 0xff) + 1,
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		       data->addr + ADDR_REG_OFFSET);
		res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
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	}
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	w83627ehf_reset_bank(data, reg);
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	mutex_unlock(&data->lock);
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	return res;
}

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static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg, u16 value)
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{
	int word_sized = is_word_sized(reg);

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	mutex_lock(&data->lock);
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	w83627ehf_set_bank(data, reg);
	outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
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	if (word_sized) {
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		outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
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		outb_p((reg & 0xff) + 1,
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		       data->addr + ADDR_REG_OFFSET);
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	}
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	outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
	w83627ehf_reset_bank(data, reg);
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	mutex_unlock(&data->lock);
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	return 0;
}

/* This function assumes that the caller holds data->update_lock */
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static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
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{
	u8 reg;

	switch (nr) {
	case 0:
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		reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
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		    | ((data->fan_div[0] & 0x03) << 4);
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		/* fan5 input control bit is write only, compute the value */
		reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
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		w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
		reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
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		    | ((data->fan_div[0] & 0x04) << 3);
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		w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
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		break;
	case 1:
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		reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
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		    | ((data->fan_div[1] & 0x03) << 6);
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		/* fan5 input control bit is write only, compute the value */
		reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
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		w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
		reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
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		    | ((data->fan_div[1] & 0x04) << 4);
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		w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
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		break;
	case 2:
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		reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
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		    | ((data->fan_div[2] & 0x03) << 6);
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		w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
		reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
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		    | ((data->fan_div[2] & 0x04) << 5);
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		w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
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		break;
	case 3:
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		reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
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		    | (data->fan_div[3] & 0x03);
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		w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
		reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
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		    | ((data->fan_div[3] & 0x04) << 5);
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		w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
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		break;
	case 4:
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		reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
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		    | ((data->fan_div[4] & 0x03) << 2)
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		    | ((data->fan_div[4] & 0x04) << 5);
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		w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
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		break;
	}
}

static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
{
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	struct w83627ehf_data *data = dev_get_drvdata(dev);
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	int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
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	int i;

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	mutex_lock(&data->update_lock);
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	if (time_after(jiffies, data->last_updated + HZ)
	 || !data->valid) {
		/* Fan clock dividers */
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		i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
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		data->fan_div[0] = (i >> 4) & 0x03;
		data->fan_div[1] = (i >> 6) & 0x03;
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		i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
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		data->fan_div[2] = (i >> 6) & 0x03;
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		i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
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		data->fan_div[0] |= (i >> 3) & 0x04;
		data->fan_div[1] |= (i >> 4) & 0x04;
		data->fan_div[2] |= (i >> 5) & 0x04;
		if (data->has_fan & ((1 << 3) | (1 << 4))) {
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			i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
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			data->fan_div[3] = i & 0x03;
			data->fan_div[4] = ((i >> 2) & 0x03)
					 | ((i >> 5) & 0x04);
		}
		if (data->has_fan & (1 << 3)) {
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			i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
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			data->fan_div[3] |= (i >> 5) & 0x04;
		}

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		/* Measured voltages and limits */
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		for (i = 0; i < data->in_num; i++) {
			data->in[i] = w83627ehf_read_value(data,
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				      W83627EHF_REG_IN(i));
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			data->in_min[i] = w83627ehf_read_value(data,
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					  W83627EHF_REG_IN_MIN(i));
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			data->in_max[i] = w83627ehf_read_value(data,
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					  W83627EHF_REG_IN_MAX(i));
		}

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		/* Measured fan speeds and limits */
		for (i = 0; i < 5; i++) {
			if (!(data->has_fan & (1 << i)))
				continue;

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			data->fan[i] = w83627ehf_read_value(data,
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				       W83627EHF_REG_FAN[i]);
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			data->fan_min[i] = w83627ehf_read_value(data,
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					   W83627EHF_REG_FAN_MIN[i]);

			/* If we failed to measure the fan speed and clock
			   divider can be increased, let's try that for next
			   time */
			if (data->fan[i] == 0xff
			 && data->fan_div[i] < 0x07) {
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			 	dev_dbg(dev, "Increasing fan%d "
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					"clock divider from %u to %u\n",
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					i + 1, div_from_reg(data->fan_div[i]),
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					div_from_reg(data->fan_div[i] + 1));
				data->fan_div[i]++;
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				w83627ehf_write_fan_div(data, i);
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				/* Preserve min limit if possible */
				if (data->fan_min[i] >= 2
				 && data->fan_min[i] != 255)
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					w83627ehf_write_value(data,
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						W83627EHF_REG_FAN_MIN[i],
						(data->fan_min[i] /= 2));
			}
		}

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		for (i = 0; i < 4; i++) {
			/* pwmcfg, tolarance mapped for i=0, i=1 to same reg */
			if (i != 1) {
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				pwmcfg = w83627ehf_read_value(data,
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						W83627EHF_REG_PWM_ENABLE[i]);
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				tolerance = w83627ehf_read_value(data,
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						W83627EHF_REG_TOLERANCE[i]);
			}
			data->pwm_mode[i] =
				((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1)
				? 0 : 1;
			data->pwm_enable[i] =
					((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
						& 3) + 1;
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			data->pwm[i] = w83627ehf_read_value(data,
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						W83627EHF_REG_PWM[i]);
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			data->fan_min_output[i] = w83627ehf_read_value(data,
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						W83627EHF_REG_FAN_MIN_OUTPUT[i]);
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			data->fan_stop_time[i] = w83627ehf_read_value(data,
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						W83627EHF_REG_FAN_STOP_TIME[i]);
			data->target_temp[i] =
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				w83627ehf_read_value(data,
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					W83627EHF_REG_TARGET[i]) &
					(data->pwm_mode[i] == 1 ? 0x7f : 0xff);
			data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0))
									& 0x0f;
		}

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		/* Measured temperatures and limits */
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		data->temp1 = w83627ehf_read_value(data,
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			      W83627EHF_REG_TEMP1);
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		data->temp1_max = w83627ehf_read_value(data,
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				  W83627EHF_REG_TEMP1_OVER);
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		data->temp1_max_hyst = w83627ehf_read_value(data,
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				       W83627EHF_REG_TEMP1_HYST);
		for (i = 0; i < 2; i++) {
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			data->temp[i] = w83627ehf_read_value(data,
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					W83627EHF_REG_TEMP[i]);
525
			data->temp_max[i] = w83627ehf_read_value(data,
526
					    W83627EHF_REG_TEMP_OVER[i]);
527
			data->temp_max_hyst[i] = w83627ehf_read_value(data,
528 529 530
						 W83627EHF_REG_TEMP_HYST[i]);
		}

531
		data->alarms = w83627ehf_read_value(data,
532
					W83627EHF_REG_ALARM1) |
533
			       (w83627ehf_read_value(data,
534
					W83627EHF_REG_ALARM2) << 8) |
535
			       (w83627ehf_read_value(data,
536 537
					W83627EHF_REG_ALARM3) << 16);

538 539 540 541
		data->last_updated = jiffies;
		data->valid = 1;
	}

542
	mutex_unlock(&data->update_lock);
543 544 545 546 547 548
	return data;
}

/*
 * Sysfs callback functions
 */
549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567
#define show_in_reg(reg) \
static ssize_t \
show_##reg(struct device *dev, struct device_attribute *attr, \
	   char *buf) \
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
}
show_in_reg(in)
show_in_reg(in_min)
show_in_reg(in_max)

#define store_in_reg(REG, reg) \
static ssize_t \
store_in_##reg (struct device *dev, struct device_attribute *attr, \
			const char *buf, size_t count) \
{ \
568
	struct w83627ehf_data *data = dev_get_drvdata(dev); \
569 570 571 572 573 574
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	u32 val = simple_strtoul(buf, NULL, 10); \
 \
	mutex_lock(&data->update_lock); \
	data->in_##reg[nr] = in_to_reg(val, nr); \
575
	w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
576 577 578 579 580 581 582 583
			      data->in_##reg[nr]); \
	mutex_unlock(&data->update_lock); \
	return count; \
}

store_in_reg(MIN, min)
store_in_reg(MAX, max)

584 585 586 587 588 589 590 591
static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
{
	struct w83627ehf_data *data = w83627ehf_update_device(dev);
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
	return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
}

592 593 594 595 596 597 598 599 600 601 602 603 604
static struct sensor_device_attribute sda_in_input[] = {
	SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
	SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
	SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
	SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
	SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
	SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
	SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
	SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
	SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
	SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
};

605 606 607 608 609 610 611 612 613 614 615 616 617
static struct sensor_device_attribute sda_in_alarm[] = {
	SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
	SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
	SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
	SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
	SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
	SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
	SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
	SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
	SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
	SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
};

618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643
static struct sensor_device_attribute sda_in_min[] = {
       SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
       SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
       SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
       SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
       SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
       SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
       SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
       SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
       SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
       SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
};

static struct sensor_device_attribute sda_in_max[] = {
       SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
       SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
       SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
       SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
       SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
       SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
       SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
       SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
       SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
       SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
};

644 645
#define show_fan_reg(reg) \
static ssize_t \
646 647
show_##reg(struct device *dev, struct device_attribute *attr, \
	   char *buf) \
648 649
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
650 651
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
652 653 654 655 656 657 658 659
	return sprintf(buf, "%d\n", \
		       fan_from_reg(data->reg[nr], \
				    div_from_reg(data->fan_div[nr]))); \
}
show_fan_reg(fan);
show_fan_reg(fan_min);

static ssize_t
660 661
show_fan_div(struct device *dev, struct device_attribute *attr,
	     char *buf)
662 663
{
	struct w83627ehf_data *data = w83627ehf_update_device(dev);
664 665 666
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
	return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
667 668 669
}

static ssize_t
670 671
store_fan_min(struct device *dev, struct device_attribute *attr,
	      const char *buf, size_t count)
672
{
673
	struct w83627ehf_data *data = dev_get_drvdata(dev);
674 675
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
676 677 678 679
	unsigned int val = simple_strtoul(buf, NULL, 10);
	unsigned int reg;
	u8 new_div;

680
	mutex_lock(&data->update_lock);
681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698
	if (!val) {
		/* No min limit, alarm disabled */
		data->fan_min[nr] = 255;
		new_div = data->fan_div[nr]; /* No change */
		dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
	} else if ((reg = 1350000U / val) >= 128 * 255) {
		/* Speed below this value cannot possibly be represented,
		   even with the highest divider (128) */
		data->fan_min[nr] = 254;
		new_div = 7; /* 128 == (1 << 7) */
		dev_warn(dev, "fan%u low limit %u below minimum %u, set to "
			 "minimum\n", nr + 1, val, fan_from_reg(254, 128));
	} else if (!reg) {
		/* Speed above this value cannot possibly be represented,
		   even with the lowest divider (1) */
		data->fan_min[nr] = 1;
		new_div = 0; /* 1 == (1 << 0) */
		dev_warn(dev, "fan%u low limit %u above maximum %u, set to "
699
			 "maximum\n", nr + 1, val, fan_from_reg(1, 1));
700 701 702 703 704 705 706 707 708 709 710 711 712 713 714
	} else {
		/* Automatically pick the best divider, i.e. the one such
		   that the min limit will correspond to a register value
		   in the 96..192 range */
		new_div = 0;
		while (reg > 192 && new_div < 7) {
			reg >>= 1;
			new_div++;
		}
		data->fan_min[nr] = reg;
	}

	/* Write both the fan clock divider (if it changed) and the new
	   fan min (unconditionally) */
	if (new_div != data->fan_div[nr]) {
715 716 717 718 719 720 721 722 723
		/* Preserve the fan speed reading */
		if (data->fan[nr] != 0xff) {
			if (new_div > data->fan_div[nr])
				data->fan[nr] >>= new_div - data->fan_div[nr];
			else if (data->fan[nr] & 0x80)
				data->fan[nr] = 0xff;
			else
				data->fan[nr] <<= data->fan_div[nr] - new_div;
		}
724 725 726 727 728

		dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
			nr + 1, div_from_reg(data->fan_div[nr]),
			div_from_reg(new_div));
		data->fan_div[nr] = new_div;
729
		w83627ehf_write_fan_div(data, nr);
730
	}
731
	w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[nr],
732
			      data->fan_min[nr]);
733
	mutex_unlock(&data->update_lock);
734 735 736 737

	return count;
}

738 739 740 741 742 743 744
static struct sensor_device_attribute sda_fan_input[] = {
	SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
	SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
	SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
	SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
	SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
};
745

746 747 748 749 750 751 752 753
static struct sensor_device_attribute sda_fan_alarm[] = {
	SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
	SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
	SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
	SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
	SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
};

754 755 756 757 758 759 760 761 762 763 764 765
static struct sensor_device_attribute sda_fan_min[] = {
	SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
		    store_fan_min, 0),
	SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
		    store_fan_min, 1),
	SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
		    store_fan_min, 2),
	SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
		    store_fan_min, 3),
	SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
		    store_fan_min, 4),
};
766

767 768 769 770 771 772 773 774
static struct sensor_device_attribute sda_fan_div[] = {
	SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
	SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
	SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
	SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
	SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
};

775 776
#define show_temp1_reg(reg) \
static ssize_t \
777 778
show_##reg(struct device *dev, struct device_attribute *attr, \
	   char *buf) \
779 780 781 782 783 784 785 786 787 788
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
	return sprintf(buf, "%d\n", temp1_from_reg(data->reg)); \
}
show_temp1_reg(temp1);
show_temp1_reg(temp1_max);
show_temp1_reg(temp1_max_hyst);

#define store_temp1_reg(REG, reg) \
static ssize_t \
789 790
store_temp1_##reg(struct device *dev, struct device_attribute *attr, \
		  const char *buf, size_t count) \
791
{ \
792
	struct w83627ehf_data *data = dev_get_drvdata(dev); \
793 794
	u32 val = simple_strtoul(buf, NULL, 10); \
 \
795
	mutex_lock(&data->update_lock); \
796
	data->temp1_##reg = temp1_to_reg(val, -128000, 127000); \
797
	w83627ehf_write_value(data, W83627EHF_REG_TEMP1_##REG, \
798
			      data->temp1_##reg); \
799
	mutex_unlock(&data->update_lock); \
800 801 802 803 804 805 806
	return count; \
}
store_temp1_reg(OVER, max);
store_temp1_reg(HYST, max_hyst);

#define show_temp_reg(reg) \
static ssize_t \
807 808
show_##reg(struct device *dev, struct device_attribute *attr, \
	   char *buf) \
809 810
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
811 812
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
813 814 815 816 817 818 819 820 821
	return sprintf(buf, "%d\n", \
		       LM75_TEMP_FROM_REG(data->reg[nr])); \
}
show_temp_reg(temp);
show_temp_reg(temp_max);
show_temp_reg(temp_max_hyst);

#define store_temp_reg(REG, reg) \
static ssize_t \
822 823
store_##reg(struct device *dev, struct device_attribute *attr, \
	    const char *buf, size_t count) \
824
{ \
825
	struct w83627ehf_data *data = dev_get_drvdata(dev); \
826 827
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
828 829
	u32 val = simple_strtoul(buf, NULL, 10); \
 \
830
	mutex_lock(&data->update_lock); \
831
	data->reg[nr] = LM75_TEMP_TO_REG(val); \
832
	w83627ehf_write_value(data, W83627EHF_REG_TEMP_##REG[nr], \
833
			      data->reg[nr]); \
834
	mutex_unlock(&data->update_lock); \
835 836 837 838 839
	return count; \
}
store_temp_reg(OVER, temp_max);
store_temp_reg(HYST, temp_max_hyst);

840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855
static struct sensor_device_attribute sda_temp[] = {
	SENSOR_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0),
	SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 0),
	SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 1),
	SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1_max,
		    store_temp1_max, 0),
	SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
		    store_temp_max, 0),
	SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
		    store_temp_max, 1),
	SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1_max_hyst,
		    store_temp1_max_hyst, 0),
	SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
		    store_temp_max_hyst, 0),
	SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
		    store_temp_max_hyst, 1),
856 857 858
	SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
	SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
	SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
859
};
860

861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878
#define show_pwm_reg(reg) \
static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
				char *buf) \
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	return sprintf(buf, "%d\n", data->reg[nr]); \
}

show_pwm_reg(pwm_mode)
show_pwm_reg(pwm_enable)
show_pwm_reg(pwm)

static ssize_t
store_pwm_mode(struct device *dev, struct device_attribute *attr,
			const char *buf, size_t count)
{
879
	struct w83627ehf_data *data = dev_get_drvdata(dev);
880 881 882 883 884 885 886 887
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
	u32 val = simple_strtoul(buf, NULL, 10);
	u16 reg;

	if (val > 1)
		return -EINVAL;
	mutex_lock(&data->update_lock);
888
	reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
889 890 891 892
	data->pwm_mode[nr] = val;
	reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
	if (!val)
		reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
893
	w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
894 895 896 897 898 899 900 901
	mutex_unlock(&data->update_lock);
	return count;
}

static ssize_t
store_pwm(struct device *dev, struct device_attribute *attr,
			const char *buf, size_t count)
{
902
	struct w83627ehf_data *data = dev_get_drvdata(dev);
903 904 905 906 907 908
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
	u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255);

	mutex_lock(&data->update_lock);
	data->pwm[nr] = val;
909
	w83627ehf_write_value(data, W83627EHF_REG_PWM[nr], val);
910 911 912 913 914 915 916 917
	mutex_unlock(&data->update_lock);
	return count;
}

static ssize_t
store_pwm_enable(struct device *dev, struct device_attribute *attr,
			const char *buf, size_t count)
{
918
	struct w83627ehf_data *data = dev_get_drvdata(dev);
919 920 921 922 923 924 925 926
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
	u32 val = simple_strtoul(buf, NULL, 10);
	u16 reg;

	if (!val || (val > 2))	/* only modes 1 and 2 are supported */
		return -EINVAL;
	mutex_lock(&data->update_lock);
927
	reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
928 929 930
	data->pwm_enable[nr] = val;
	reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
	reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
931
	w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953
	mutex_unlock(&data->update_lock);
	return count;
}


#define show_tol_temp(reg) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
				char *buf) \
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	return sprintf(buf, "%d\n", temp1_from_reg(data->reg[nr])); \
}

show_tol_temp(tolerance)
show_tol_temp(target_temp)

static ssize_t
store_target_temp(struct device *dev, struct device_attribute *attr,
			const char *buf, size_t count)
{
954
	struct w83627ehf_data *data = dev_get_drvdata(dev);
955 956 957 958 959 960
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
	u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 127000);

	mutex_lock(&data->update_lock);
	data->target_temp[nr] = val;
961
	w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
962 963 964 965 966 967 968 969
	mutex_unlock(&data->update_lock);
	return count;
}

static ssize_t
store_tolerance(struct device *dev, struct device_attribute *attr,
			const char *buf, size_t count)
{
970
	struct w83627ehf_data *data = dev_get_drvdata(dev);
971 972 973 974 975 976 977
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
	int nr = sensor_attr->index;
	u16 reg;
	/* Limit the temp to 0C - 15C */
	u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 15000);

	mutex_lock(&data->update_lock);
978
	reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
979 980 981 982 983
	data->tolerance[nr] = val;
	if (nr == 1)
		reg = (reg & 0x0f) | (val << 4);
	else
		reg = (reg & 0xf0) | val;
984
	w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054
	mutex_unlock(&data->update_lock);
	return count;
}

static struct sensor_device_attribute sda_pwm[] = {
	SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
	SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
	SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
	SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
};

static struct sensor_device_attribute sda_pwm_mode[] = {
	SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
		    store_pwm_mode, 0),
	SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
		    store_pwm_mode, 1),
	SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
		    store_pwm_mode, 2),
	SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
		    store_pwm_mode, 3),
};

static struct sensor_device_attribute sda_pwm_enable[] = {
	SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
		    store_pwm_enable, 0),
	SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
		    store_pwm_enable, 1),
	SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
		    store_pwm_enable, 2),
	SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
		    store_pwm_enable, 3),
};

static struct sensor_device_attribute sda_target_temp[] = {
	SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
		    store_target_temp, 0),
	SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
		    store_target_temp, 1),
	SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
		    store_target_temp, 2),
	SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
		    store_target_temp, 3),
};

static struct sensor_device_attribute sda_tolerance[] = {
	SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
		    store_tolerance, 0),
	SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
		    store_tolerance, 1),
	SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
		    store_tolerance, 2),
	SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
		    store_tolerance, 3),
};

/* Smart Fan registers */

#define fan_functions(reg, REG) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
		       char *buf) \
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	return sprintf(buf, "%d\n", data->reg[nr]); \
}\
static ssize_t \
store_##reg(struct device *dev, struct device_attribute *attr, \
			    const char *buf, size_t count) \
{\
1055
	struct w83627ehf_data *data = dev_get_drvdata(dev); \
1056 1057 1058 1059 1060
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 1, 255); \
	mutex_lock(&data->update_lock); \
	data->reg[nr] = val; \
1061
	w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082
	mutex_unlock(&data->update_lock); \
	return count; \
}

fan_functions(fan_min_output, FAN_MIN_OUTPUT)

#define fan_time_functions(reg, REG) \
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
				char *buf) \
{ \
	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	return sprintf(buf, "%d\n", \
			step_time_from_reg(data->reg[nr], data->pwm_mode[nr])); \
} \
\
static ssize_t \
store_##reg(struct device *dev, struct device_attribute *attr, \
			const char *buf, size_t count) \
{ \
1083
	struct w83627ehf_data *data = dev_get_drvdata(dev); \
1084 1085 1086 1087 1088 1089
	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
	int nr = sensor_attr->index; \
	u8 val = step_time_to_reg(simple_strtoul(buf, NULL, 10), \
					data->pwm_mode[nr]); \
	mutex_lock(&data->update_lock); \
	data->reg[nr] = val; \
1090
	w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1091 1092 1093 1094 1095 1096
	mutex_unlock(&data->update_lock); \
	return count; \
} \

fan_time_functions(fan_stop_time, FAN_STOP_TIME)

1097 1098 1099 1100 1101 1102 1103 1104
static ssize_t show_name(struct device *dev, struct device_attribute *attr,
			 char *buf)
{
	struct w83627ehf_data *data = dev_get_drvdata(dev);

	return sprintf(buf, "%s\n", data->name);
}
static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127

static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
	SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
		    store_fan_stop_time, 3),
	SENSOR_ATTR(pwm4_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
		    store_fan_min_output, 3),
};

static struct sensor_device_attribute sda_sf3_arrays[] = {
	SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
		    store_fan_stop_time, 0),
	SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
		    store_fan_stop_time, 1),
	SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
		    store_fan_stop_time, 2),
	SENSOR_ATTR(pwm1_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
		    store_fan_min_output, 0),
	SENSOR_ATTR(pwm2_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
		    store_fan_min_output, 1),
	SENSOR_ATTR(pwm3_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
		    store_fan_min_output, 2),
};

1128
/*
1129
 * Driver and device management
1130 1131
 */

1132 1133 1134 1135 1136
static void w83627ehf_device_remove_files(struct device *dev)
{
	/* some entries in the following arrays may not have been used in
	 * device_create_file(), but device_remove_file() will ignore them */
	int i;
1137
	struct w83627ehf_data *data = dev_get_drvdata(dev);
1138 1139 1140 1141 1142

	for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
		device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
	for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
		device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1143
	for (i = 0; i < data->in_num; i++) {
1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164
		device_remove_file(dev, &sda_in_input[i].dev_attr);
		device_remove_file(dev, &sda_in_alarm[i].dev_attr);
		device_remove_file(dev, &sda_in_min[i].dev_attr);
		device_remove_file(dev, &sda_in_max[i].dev_attr);
	}
	for (i = 0; i < 5; i++) {
		device_remove_file(dev, &sda_fan_input[i].dev_attr);
		device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
		device_remove_file(dev, &sda_fan_div[i].dev_attr);
		device_remove_file(dev, &sda_fan_min[i].dev_attr);
	}
	for (i = 0; i < 4; i++) {
		device_remove_file(dev, &sda_pwm[i].dev_attr);
		device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
		device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
		device_remove_file(dev, &sda_target_temp[i].dev_attr);
		device_remove_file(dev, &sda_tolerance[i].dev_attr);
	}
	for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
		device_remove_file(dev, &sda_temp[i].dev_attr);

1165 1166
	device_remove_file(dev, &dev_attr_name);
}
1167

1168 1169
/* Get the monitoring functions started */
static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data)
1170 1171 1172 1173 1174
{
	int i;
	u8 tmp;

	/* Start monitoring is needed */
1175
	tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1176
	if (!(tmp & 0x01))
1177
		w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1178 1179 1180 1181
				      tmp | 0x01);

	/* Enable temp2 and temp3 if needed */
	for (i = 0; i < 2; i++) {
1182
		tmp = w83627ehf_read_value(data,
1183 1184
					   W83627EHF_REG_TEMP_CONFIG[i]);
		if (tmp & 0x01)
1185
			w83627ehf_write_value(data,
1186 1187 1188 1189 1190
					      W83627EHF_REG_TEMP_CONFIG[i],
					      tmp & 0xfe);
	}
}

1191
static int __devinit w83627ehf_probe(struct platform_device *pdev)
1192
{
1193 1194
	struct device *dev = &pdev->dev;
	struct w83627ehf_sio_data *sio_data = dev->platform_data;
1195
	struct w83627ehf_data *data;
1196
	struct resource *res;
1197
	u8 fan4pin, fan5pin;
1198 1199
	int i, err = 0;

1200 1201
	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
	if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1202
		err = -EBUSY;
1203 1204 1205
		dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
			(unsigned long)res->start,
			(unsigned long)res->start + IOREGION_LENGTH - 1);
1206 1207 1208
		goto exit;
	}

D
Deepak Saxena 已提交
1209
	if (!(data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL))) {
1210 1211 1212 1213
		err = -ENOMEM;
		goto exit_release;
	}

1214
	data->addr = res->start;
1215 1216
	mutex_init(&data->lock);
	mutex_init(&data->update_lock);
1217 1218
	data->name = w83627ehf_device_names[sio_data->kind];
	platform_set_drvdata(pdev, data);
1219

1220 1221
	/* 627EHG and 627EHF have 10 voltage inputs; DHG has 9 */
	data->in_num = (sio_data->kind == w83627dhg) ? 9 : 10;
1222 1223

	/* Initialize the chip */
1224
	w83627ehf_init_device(data);
1225 1226 1227

	/* A few vars need to be filled upon startup */
	for (i = 0; i < 5; i++)
1228
		data->fan_min[i] = w83627ehf_read_value(data,
1229 1230
				   W83627EHF_REG_FAN_MIN[i]);

1231 1232
	/* fan4 and fan5 share some pins with the GPIO and serial flash */

1233 1234 1235 1236
	superio_enter(sio_data->sioreg);
	fan5pin = superio_inb(sio_data->sioreg, 0x24) & 0x2;
	fan4pin = superio_inb(sio_data->sioreg, 0x29) & 0x6;
	superio_exit(sio_data->sioreg);
1237

1238
	/* It looks like fan4 and fan5 pins can be alternatively used
1239 1240 1241 1242
	   as fan on/off switches, but fan5 control is write only :/
	   We assume that if the serial interface is disabled, designers
	   connected fan5 as input unless they are emitting log 1, which
	   is not the default. */
1243

1244
	data->has_fan = 0x07; /* fan1, fan2 and fan3 */
1245
	i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1246
	if ((i & (1 << 2)) && (!fan4pin))
1247
		data->has_fan |= (1 << 3);
1248
	if (!(i & (1 << 1)) && (!fan5pin))
1249 1250 1251
		data->has_fan |= (1 << 4);

	/* Register sysfs hooks */
1252
  	for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1253 1254 1255
		if ((err = device_create_file(dev,
			&sda_sf3_arrays[i].dev_attr)))
			goto exit_remove;
1256 1257 1258

	/* if fan4 is enabled create the sf3 files for it */
	if (data->has_fan & (1 << 3))
1259 1260 1261 1262 1263
		for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
			if ((err = device_create_file(dev,
				&sda_sf3_arrays_fan4[i].dev_attr)))
				goto exit_remove;
		}
1264

1265
	for (i = 0; i < data->in_num; i++)
1266 1267 1268 1269 1270 1271 1272 1273
		if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
			|| (err = device_create_file(dev,
				&sda_in_alarm[i].dev_attr))
			|| (err = device_create_file(dev,
				&sda_in_min[i].dev_attr))
			|| (err = device_create_file(dev,
				&sda_in_max[i].dev_attr)))
			goto exit_remove;
1274

1275
	for (i = 0; i < 5; i++) {
1276
		if (data->has_fan & (1 << i)) {
1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297
			if ((err = device_create_file(dev,
					&sda_fan_input[i].dev_attr))
				|| (err = device_create_file(dev,
					&sda_fan_alarm[i].dev_attr))
				|| (err = device_create_file(dev,
					&sda_fan_div[i].dev_attr))
				|| (err = device_create_file(dev,
					&sda_fan_min[i].dev_attr)))
				goto exit_remove;
			if (i < 4 && /* w83627ehf only has 4 pwm */
				((err = device_create_file(dev,
					&sda_pwm[i].dev_attr))
				|| (err = device_create_file(dev,
					&sda_pwm_mode[i].dev_attr))
				|| (err = device_create_file(dev,
					&sda_pwm_enable[i].dev_attr))
				|| (err = device_create_file(dev,
					&sda_target_temp[i].dev_attr))
				|| (err = device_create_file(dev,
					&sda_tolerance[i].dev_attr))))
				goto exit_remove;
1298
		}
1299
	}
1300

1301
	for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1302 1303 1304
		if ((err = device_create_file(dev, &sda_temp[i].dev_attr)))
			goto exit_remove;

1305 1306 1307 1308
	err = device_create_file(dev, &dev_attr_name);
	if (err)
		goto exit_remove;

1309 1310 1311 1312 1313
	data->class_dev = hwmon_device_register(dev);
	if (IS_ERR(data->class_dev)) {
		err = PTR_ERR(data->class_dev);
		goto exit_remove;
	}
1314 1315 1316

	return 0;

1317 1318
exit_remove:
	w83627ehf_device_remove_files(dev);
1319
	kfree(data);
1320
	platform_set_drvdata(pdev, NULL);
1321
exit_release:
1322
	release_region(res->start, IOREGION_LENGTH);
1323 1324 1325 1326
exit:
	return err;
}

1327
static int __devexit w83627ehf_remove(struct platform_device *pdev)
1328
{
1329
	struct w83627ehf_data *data = platform_get_drvdata(pdev);
1330

1331
	hwmon_device_unregister(data->class_dev);
1332 1333 1334
	w83627ehf_device_remove_files(&pdev->dev);
	release_region(data->addr, IOREGION_LENGTH);
	platform_set_drvdata(pdev, NULL);
1335
	kfree(data);
1336 1337 1338 1339

	return 0;
}

1340
static struct platform_driver w83627ehf_driver = {
1341
	.driver = {
J
Jean Delvare 已提交
1342
		.owner	= THIS_MODULE,
1343
		.name	= DRVNAME,
1344
	},
1345 1346
	.probe		= w83627ehf_probe,
	.remove		= __devexit_p(w83627ehf_remove),
1347 1348
};

1349 1350 1351
/* w83627ehf_find() looks for a '627 in the Super-I/O config space */
static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
				 struct w83627ehf_sio_data *sio_data)
1352
{
1353 1354 1355 1356
	static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
	static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
	static const char __initdata sio_name_W83627DHG[] = "W83627DHG";

1357
	u16 val;
1358
	const char *sio_name;
1359

1360
	superio_enter(sioaddr);
1361

1362 1363
	val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
	    | superio_inb(sioaddr, SIO_REG_DEVID + 1);
1364 1365
	switch (val & SIO_ID_MASK) {
	case SIO_W83627EHF_ID:
1366 1367 1368
		sio_data->kind = w83627ehf;
		sio_name = sio_name_W83627EHF;
		break;
1369
	case SIO_W83627EHG_ID:
1370 1371 1372 1373 1374 1375
		sio_data->kind = w83627ehf;
		sio_name = sio_name_W83627EHG;
		break;
	case SIO_W83627DHG_ID:
		sio_data->kind = w83627dhg;
		sio_name = sio_name_W83627DHG;
1376 1377
		break;
	default:
1378
		pr_info(DRVNAME ": unsupported chip ID: 0x%04x\n",
1379
			val);
1380
		superio_exit(sioaddr);
1381 1382 1383
		return -ENODEV;
	}

1384 1385 1386 1387
	/* We have a known chip, find the HWM I/O address */
	superio_select(sioaddr, W83627EHF_LD_HWM);
	val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
	    | superio_inb(sioaddr, SIO_REG_ADDR + 1);
1388
	*addr = val & IOREGION_ALIGNMENT;
1389
	if (*addr == 0) {
1390 1391
		printk(KERN_ERR DRVNAME ": Refusing to enable a Super-I/O "
		       "device with a base I/O port 0.\n");
1392
		superio_exit(sioaddr);
1393 1394 1395 1396
		return -ENODEV;
	}

	/* Activate logical device if needed */
1397
	val = superio_inb(sioaddr, SIO_REG_ENABLE);
1398 1399 1400
	if (!(val & 0x01)) {
		printk(KERN_WARNING DRVNAME ": Forcibly enabling Super-I/O. "
		       "Sensor is probably unusable.\n");
1401
		superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
1402
	}
1403 1404 1405 1406

	superio_exit(sioaddr);
	pr_info(DRVNAME ": Found %s chip at %#x\n", sio_name, *addr);
	sio_data->sioreg = sioaddr;
1407 1408 1409 1410

	return 0;
}

1411 1412 1413 1414 1415 1416
/* when Super-I/O functions move to a separate file, the Super-I/O
 * bus will manage the lifetime of the device and this module will only keep
 * track of the w83627ehf driver. But since we platform_device_alloc(), we
 * must keep track of the device */
static struct platform_device *pdev;

1417 1418
static int __init sensors_w83627ehf_init(void)
{
1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430
	int err;
	unsigned short address;
	struct resource res;
	struct w83627ehf_sio_data sio_data;

	/* initialize sio_data->kind and sio_data->sioreg.
	 *
	 * when Super-I/O functions move to a separate file, the Super-I/O
	 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
	 * w83627ehf hardware monitor, and call probe() */
	if (w83627ehf_find(0x2e, &address, &sio_data) &&
	    w83627ehf_find(0x4e, &address, &sio_data))
1431 1432
		return -ENODEV;

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	err = platform_driver_register(&w83627ehf_driver);
	if (err)
		goto exit;

	if (!(pdev = platform_device_alloc(DRVNAME, address))) {
		err = -ENOMEM;
		printk(KERN_ERR DRVNAME ": Device allocation failed\n");
		goto exit_unregister;
	}

	err = platform_device_add_data(pdev, &sio_data,
				       sizeof(struct w83627ehf_sio_data));
	if (err) {
		printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
		goto exit_device_put;
	}

	memset(&res, 0, sizeof(res));
	res.name = DRVNAME;
	res.start = address + IOREGION_OFFSET;
	res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
	res.flags = IORESOURCE_IO;
	err = platform_device_add_resources(pdev, &res, 1);
	if (err) {
		printk(KERN_ERR DRVNAME ": Device resource addition failed "
		       "(%d)\n", err);
		goto exit_device_put;
	}

	/* platform_device_add calls probe() */
	err = platform_device_add(pdev);
	if (err) {
		printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
		       err);
		goto exit_device_put;
	}

	return 0;

exit_device_put:
	platform_device_put(pdev);
exit_unregister:
	platform_driver_unregister(&w83627ehf_driver);
exit:
	return err;
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}

static void __exit sensors_w83627ehf_exit(void)
{
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	platform_device_unregister(pdev);
	platform_driver_unregister(&w83627ehf_driver);
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}

MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
MODULE_DESCRIPTION("W83627EHF driver");
MODULE_LICENSE("GPL");

module_init(sensors_w83627ehf_init);
module_exit(sensors_w83627ehf_exit);