dma-mapping.c 58.6 KB
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/*
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 *  linux/arch/arm/mm/dma-mapping.c
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 *
 *  Copyright (C) 2000-2004 Russell King
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 *  DMA uncached mapping support.
 */
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#include <linux/bootmem.h>
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#include <linux/module.h>
#include <linux/mm.h>
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#include <linux/genalloc.h>
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#include <linux/gfp.h>
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#include <linux/errno.h>
#include <linux/list.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/dma-mapping.h>
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#include <linux/dma-contiguous.h>
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#include <linux/highmem.h>
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#include <linux/memblock.h>
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#include <linux/slab.h>
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#include <linux/iommu.h>
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#include <linux/io.h>
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#include <linux/vmalloc.h>
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#include <linux/sizes.h>
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#include <linux/cma.h>
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#include <asm/memory.h>
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#include <asm/highmem.h>
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#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
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#include <asm/mach/arch.h>
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#include <asm/dma-iommu.h>
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#include <asm/mach/map.h>
#include <asm/system_info.h>
#include <asm/dma-contiguous.h>
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#include "dma.h"
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#include "mm.h"

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struct arm_dma_alloc_args {
	struct device *dev;
	size_t size;
	gfp_t gfp;
	pgprot_t prot;
	const void *caller;
	bool want_vaddr;
};

struct arm_dma_free_args {
	struct device *dev;
	size_t size;
	void *cpu_addr;
	struct page *page;
	bool want_vaddr;
};

struct arm_dma_allocator {
	void *(*alloc)(struct arm_dma_alloc_args *args,
		       struct page **ret_page);
	void (*free)(struct arm_dma_free_args *args);
};

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struct arm_dma_buffer {
	struct list_head list;
	void *virt;
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	struct arm_dma_allocator *allocator;
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};

static LIST_HEAD(arm_dma_bufs);
static DEFINE_SPINLOCK(arm_dma_bufs_lock);

static struct arm_dma_buffer *arm_dma_buffer_find(void *virt)
{
	struct arm_dma_buffer *buf, *found = NULL;
	unsigned long flags;

	spin_lock_irqsave(&arm_dma_bufs_lock, flags);
	list_for_each_entry(buf, &arm_dma_bufs, list) {
		if (buf->virt == virt) {
			list_del(&buf->list);
			found = buf;
			break;
		}
	}
	spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
	return found;
}

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/*
 * The DMA API is built upon the notion of "buffer ownership".  A buffer
 * is either exclusively owned by the CPU (and therefore may be accessed
 * by it) or exclusively owned by the DMA device.  These helper functions
 * represent the transitions between these two ownership states.
 *
 * Note, however, that on later ARMs, this notion does not work due to
 * speculative prefetches.  We model our approach on the assumption that
 * the CPU does do speculative prefetches, which means we clean caches
 * before transfers and delay cache invalidation until transfer completion.
 *
 */
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static void __dma_page_cpu_to_dev(struct page *, unsigned long,
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		size_t, enum dma_data_direction);
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static void __dma_page_dev_to_cpu(struct page *, unsigned long,
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		size_t, enum dma_data_direction);

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/**
 * arm_dma_map_page - map a portion of a page for streaming DMA
 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 * @page: page that buffer resides in
 * @offset: offset into page for start of buffer
 * @size: size of buffer to map
 * @dir: DMA transfer direction
 *
 * Ensure that any data held in the cache is appropriately discarded
 * or written back.
 *
 * The device owns this memory once this call has completed.  The CPU
 * can regain ownership by calling dma_unmap_page().
 */
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static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
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	     unsigned long offset, size_t size, enum dma_data_direction dir,
	     struct dma_attrs *attrs)
{
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	if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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		__dma_page_cpu_to_dev(page, offset, size, dir);
	return pfn_to_dma(dev, page_to_pfn(page)) + offset;
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}

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static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
	     unsigned long offset, size_t size, enum dma_data_direction dir,
	     struct dma_attrs *attrs)
{
	return pfn_to_dma(dev, page_to_pfn(page)) + offset;
}

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/**
 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 * @handle: DMA address of buffer
 * @size: size of buffer (same as passed to dma_map_page)
 * @dir: DMA transfer direction (same as passed to dma_map_page)
 *
 * Unmap a page streaming mode DMA translation.  The handle and size
 * must match what was provided in the previous dma_map_page() call.
 * All other usages are undefined.
 *
 * After this call, reads by the CPU to the buffer are guaranteed to see
 * whatever the device wrote there.
 */
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static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
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		size_t size, enum dma_data_direction dir,
		struct dma_attrs *attrs)
{
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	if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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		__dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
				      handle & ~PAGE_MASK, size, dir);
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}

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static void arm_dma_sync_single_for_cpu(struct device *dev,
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		dma_addr_t handle, size_t size, enum dma_data_direction dir)
{
	unsigned int offset = handle & (PAGE_SIZE - 1);
	struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
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	__dma_page_dev_to_cpu(page, offset, size, dir);
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}

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static void arm_dma_sync_single_for_device(struct device *dev,
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		dma_addr_t handle, size_t size, enum dma_data_direction dir)
{
	unsigned int offset = handle & (PAGE_SIZE - 1);
	struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
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	__dma_page_cpu_to_dev(page, offset, size, dir);
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}

struct dma_map_ops arm_dma_ops = {
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	.alloc			= arm_dma_alloc,
	.free			= arm_dma_free,
	.mmap			= arm_dma_mmap,
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	.get_sgtable		= arm_dma_get_sgtable,
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	.map_page		= arm_dma_map_page,
	.unmap_page		= arm_dma_unmap_page,
	.map_sg			= arm_dma_map_sg,
	.unmap_sg		= arm_dma_unmap_sg,
	.sync_single_for_cpu	= arm_dma_sync_single_for_cpu,
	.sync_single_for_device	= arm_dma_sync_single_for_device,
	.sync_sg_for_cpu	= arm_dma_sync_sg_for_cpu,
	.sync_sg_for_device	= arm_dma_sync_sg_for_device,
};
EXPORT_SYMBOL(arm_dma_ops);

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static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
	dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs);
static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
				  dma_addr_t handle, struct dma_attrs *attrs);
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static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
		 void *cpu_addr, dma_addr_t dma_addr, size_t size,
		 struct dma_attrs *attrs);
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struct dma_map_ops arm_coherent_dma_ops = {
	.alloc			= arm_coherent_dma_alloc,
	.free			= arm_coherent_dma_free,
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	.mmap			= arm_coherent_dma_mmap,
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	.get_sgtable		= arm_dma_get_sgtable,
	.map_page		= arm_coherent_dma_map_page,
	.map_sg			= arm_dma_map_sg,
};
EXPORT_SYMBOL(arm_coherent_dma_ops);

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static int __dma_supported(struct device *dev, u64 mask, bool warn)
{
	unsigned long max_dma_pfn;

	/*
	 * If the mask allows for more memory than we can address,
	 * and we actually have that much memory, then we must
	 * indicate that DMA to this device is not supported.
	 */
	if (sizeof(mask) != sizeof(dma_addr_t) &&
	    mask > (dma_addr_t)~0 &&
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	    dma_to_pfn(dev, ~0) < max_pfn - 1) {
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		if (warn) {
			dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
				 mask);
			dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
		}
		return 0;
	}

	max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);

	/*
	 * Translate the device's DMA mask to a PFN limit.  This
	 * PFN number includes the page which we can DMA to.
	 */
	if (dma_to_pfn(dev, mask) < max_dma_pfn) {
		if (warn)
			dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
				 mask,
				 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
				 max_dma_pfn + 1);
		return 0;
	}

	return 1;
}

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static u64 get_coherent_dma_mask(struct device *dev)
{
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	u64 mask = (u64)DMA_BIT_MASK(32);
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	if (dev) {
		mask = dev->coherent_dma_mask;

		/*
		 * Sanity check the DMA mask - it must be non-zero, and
		 * must be able to be satisfied by a DMA allocation.
		 */
		if (mask == 0) {
			dev_warn(dev, "coherent DMA mask is unset\n");
			return 0;
		}

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		if (!__dma_supported(dev, mask, true))
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			return 0;
	}
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	return mask;
}

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static void __dma_clear_buffer(struct page *page, size_t size)
{
	/*
	 * Ensure that the allocated pages are zeroed, and that any data
	 * lurking in the kernel direct-mapped region is invalidated.
	 */
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	if (PageHighMem(page)) {
		phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
		phys_addr_t end = base + size;
		while (size > 0) {
			void *ptr = kmap_atomic(page);
			memset(ptr, 0, PAGE_SIZE);
			dmac_flush_range(ptr, ptr + PAGE_SIZE);
			kunmap_atomic(ptr);
			page++;
			size -= PAGE_SIZE;
		}
		outer_flush_range(base, end);
	} else {
		void *ptr = page_address(page);
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		memset(ptr, 0, size);
		dmac_flush_range(ptr, ptr + size);
		outer_flush_range(__pa(ptr), __pa(ptr) + size);
	}
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}

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/*
 * Allocate a DMA buffer for 'dev' of size 'size' using the
 * specified gfp mask.  Note that 'size' must be page aligned.
 */
static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
{
	unsigned long order = get_order(size);
	struct page *page, *p, *e;

	page = alloc_pages(gfp, order);
	if (!page)
		return NULL;

	/*
	 * Now split the huge page and free the excess pages
	 */
	split_page(page, order);
	for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
		__free_page(p);

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	__dma_clear_buffer(page, size);
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	return page;
}

/*
 * Free a DMA buffer.  'size' must be page aligned.
 */
static void __dma_free_buffer(struct page *page, size_t size)
{
	struct page *e = page + (size >> PAGE_SHIFT);

	while (page < e) {
		__free_page(page);
		page++;
	}
}

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#ifdef CONFIG_MMU
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static void *__alloc_from_contiguous(struct device *dev, size_t size,
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				     pgprot_t prot, struct page **ret_page,
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				     const void *caller, bool want_vaddr);
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static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
				 pgprot_t prot, struct page **ret_page,
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				 const void *caller, bool want_vaddr);
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static void *
__dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
	const void *caller)
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{
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	/*
	 * DMA allocation can be mapped to user space, so lets
	 * set VM_USERMAP flags too.
	 */
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	return dma_common_contiguous_remap(page, size,
			VM_ARM_DMA_CONSISTENT | VM_USERMAP,
			prot, caller);
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}
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static void __dma_free_remap(void *cpu_addr, size_t size)
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{
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	dma_common_free_remap(cpu_addr, size,
			VM_ARM_DMA_CONSISTENT | VM_USERMAP);
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}

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#define DEFAULT_DMA_COHERENT_POOL_SIZE	SZ_256K
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static struct gen_pool *atomic_pool;
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static size_t atomic_pool_size = DEFAULT_DMA_COHERENT_POOL_SIZE;
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static int __init early_coherent_pool(char *p)
{
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	atomic_pool_size = memparse(p, &p);
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	return 0;
}
early_param("coherent_pool", early_coherent_pool);

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void __init init_dma_coherent_pool_size(unsigned long size)
{
	/*
	 * Catch any attempt to set the pool size too late.
	 */
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	BUG_ON(atomic_pool);
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	/*
	 * Set architecture specific coherent pool size only if
	 * it has not been changed by kernel command line parameter.
	 */
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	if (atomic_pool_size == DEFAULT_DMA_COHERENT_POOL_SIZE)
		atomic_pool_size = size;
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}

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/*
 * Initialise the coherent pool for atomic allocations.
 */
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static int __init atomic_pool_init(void)
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{
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	pgprot_t prot = pgprot_dmacoherent(PAGE_KERNEL);
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	gfp_t gfp = GFP_KERNEL | GFP_DMA;
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	struct page *page;
	void *ptr;

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	atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
	if (!atomic_pool)
		goto out;
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	if (dev_get_cma_area(NULL))
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		ptr = __alloc_from_contiguous(NULL, atomic_pool_size, prot,
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					      &page, atomic_pool_init, true);
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	else
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		ptr = __alloc_remap_buffer(NULL, atomic_pool_size, gfp, prot,
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					   &page, atomic_pool_init, true);
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	if (ptr) {
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		int ret;

		ret = gen_pool_add_virt(atomic_pool, (unsigned long)ptr,
					page_to_phys(page),
					atomic_pool_size, -1);
		if (ret)
			goto destroy_genpool;

		gen_pool_set_algo(atomic_pool,
				gen_pool_first_fit_order_align,
				(void *)PAGE_SHIFT);
		pr_info("DMA: preallocated %zd KiB pool for atomic coherent allocations\n",
		       atomic_pool_size / 1024);
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		return 0;
	}
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destroy_genpool:
	gen_pool_destroy(atomic_pool);
	atomic_pool = NULL;
out:
	pr_err("DMA: failed to allocate %zx KiB pool for atomic coherent allocation\n",
	       atomic_pool_size / 1024);
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	return -ENOMEM;
}
/*
 * CMA is activated by core_initcall, so we must be called after it.
 */
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postcore_initcall(atomic_pool_init);
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struct dma_contig_early_reserve {
	phys_addr_t base;
	unsigned long size;
};

static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;

static int dma_mmu_remap_num __initdata;

void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
{
	dma_mmu_remap[dma_mmu_remap_num].base = base;
	dma_mmu_remap[dma_mmu_remap_num].size = size;
	dma_mmu_remap_num++;
}

void __init dma_contiguous_remap(void)
{
	int i;
	for (i = 0; i < dma_mmu_remap_num; i++) {
		phys_addr_t start = dma_mmu_remap[i].base;
		phys_addr_t end = start + dma_mmu_remap[i].size;
		struct map_desc map;
		unsigned long addr;

		if (end > arm_lowmem_limit)
			end = arm_lowmem_limit;
		if (start >= end)
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			continue;
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		map.pfn = __phys_to_pfn(start);
		map.virtual = __phys_to_virt(start);
		map.length = end - start;
		map.type = MT_MEMORY_DMA_READY;

		/*
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		 * Clear previous low-memory mapping to ensure that the
		 * TLB does not see any conflicting entries, then flush
		 * the TLB of the old entries before creating new mappings.
		 *
		 * This ensures that any speculatively loaded TLB entries
		 * (even though they may be rare) can not cause any problems,
		 * and ensures that this code is architecturally compliant.
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		 */
		for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
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		     addr += PMD_SIZE)
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			pmd_clear(pmd_off_k(addr));

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		flush_tlb_kernel_range(__phys_to_virt(start),
				       __phys_to_virt(end));

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		iotable_init(&map, 1);
	}
}

static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
			    void *data)
{
	struct page *page = virt_to_page(addr);
	pgprot_t prot = *(pgprot_t *)data;

	set_pte_ext(pte, mk_pte(page, prot), 0);
	return 0;
}

static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
{
	unsigned long start = (unsigned long) page_address(page);
	unsigned end = start + size;

	apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
	flush_tlb_kernel_range(start, end);
}

static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
				 pgprot_t prot, struct page **ret_page,
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				 const void *caller, bool want_vaddr)
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{
	struct page *page;
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	void *ptr = NULL;
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	page = __dma_alloc_buffer(dev, size, gfp);
	if (!page)
		return NULL;
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	if (!want_vaddr)
		goto out;
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	ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
	if (!ptr) {
		__dma_free_buffer(page, size);
		return NULL;
	}

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 out:
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	*ret_page = page;
	return ptr;
}

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static void *__alloc_from_pool(size_t size, struct page **ret_page)
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{
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	unsigned long val;
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	void *ptr = NULL;
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	if (!atomic_pool) {
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		WARN(1, "coherent pool not initialised!\n");
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		return NULL;
	}

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	val = gen_pool_alloc(atomic_pool, size);
	if (val) {
		phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);

		*ret_page = phys_to_page(phys);
		ptr = (void *)val;
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	}
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	return ptr;
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}

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static bool __in_atomic_pool(void *start, size_t size)
{
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	return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
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}

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static int __free_from_pool(void *start, size_t size)
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{
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	if (!__in_atomic_pool(start, size))
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		return 0;

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	gen_pool_free(atomic_pool, (unsigned long)start, size);
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	return 1;
}

static void *__alloc_from_contiguous(struct device *dev, size_t size,
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				     pgprot_t prot, struct page **ret_page,
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				     const void *caller, bool want_vaddr)
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{
	unsigned long order = get_order(size);
	size_t count = size >> PAGE_SHIFT;
	struct page *page;
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	void *ptr = NULL;
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	page = dma_alloc_from_contiguous(dev, count, order);
	if (!page)
		return NULL;

	__dma_clear_buffer(page, size);

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	if (!want_vaddr)
		goto out;

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	if (PageHighMem(page)) {
		ptr = __dma_alloc_remap(page, size, GFP_KERNEL, prot, caller);
		if (!ptr) {
			dma_release_from_contiguous(dev, page, count);
			return NULL;
		}
	} else {
		__dma_remap(page, size, prot);
		ptr = page_address(page);
	}
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 out:
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	*ret_page = page;
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	return ptr;
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}

static void __free_from_contiguous(struct device *dev, struct page *page,
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				   void *cpu_addr, size_t size, bool want_vaddr)
614
{
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	if (want_vaddr) {
		if (PageHighMem(page))
			__dma_free_remap(cpu_addr, size);
		else
			__dma_remap(page, size, PAGE_KERNEL);
	}
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	dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
}

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static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot)
{
	prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?
			    pgprot_writecombine(prot) :
			    pgprot_dmacoherent(prot);
	return prot;
}

632 633
#define nommu() 0

634
#else	/* !CONFIG_MMU */
635

636 637
#define nommu() 1

638 639
#define __get_dma_pgprot(attrs, prot)				__pgprot(0)
#define __alloc_remap_buffer(dev, size, gfp, prot, ret, c, wv)	NULL
640
#define __alloc_from_pool(size, ret_page)			NULL
641
#define __alloc_from_contiguous(dev, size, prot, ret, c, wv)	NULL
642
#define __free_from_pool(cpu_addr, size)			do { } while (0)
643
#define __free_from_contiguous(dev, page, cpu_addr, size, wv)	do { } while (0)
644
#define __dma_free_remap(cpu_addr, size)			do { } while (0)
645 646 647

#endif	/* CONFIG_MMU */

648 649
static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
				   struct page **ret_page)
650
{
651 652 653 654 655 656 657 658 659
	struct page *page;
	page = __dma_alloc_buffer(dev, size, gfp);
	if (!page)
		return NULL;

	*ret_page = page;
	return page_address(page);
}

660 661 662 663 664 665
static void *simple_allocator_alloc(struct arm_dma_alloc_args *args,
				    struct page **ret_page)
{
	return __alloc_simple_buffer(args->dev, args->size, args->gfp,
				     ret_page);
}
666

667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731
static void simple_allocator_free(struct arm_dma_free_args *args)
{
	__dma_free_buffer(args->page, args->size);
}

static struct arm_dma_allocator simple_allocator = {
	.alloc = simple_allocator_alloc,
	.free = simple_allocator_free,
};

static void *cma_allocator_alloc(struct arm_dma_alloc_args *args,
				 struct page **ret_page)
{
	return __alloc_from_contiguous(args->dev, args->size, args->prot,
				       ret_page, args->caller,
				       args->want_vaddr);
}

static void cma_allocator_free(struct arm_dma_free_args *args)
{
	__free_from_contiguous(args->dev, args->page, args->cpu_addr,
			       args->size, args->want_vaddr);
}

static struct arm_dma_allocator cma_allocator = {
	.alloc = cma_allocator_alloc,
	.free = cma_allocator_free,
};

static void *pool_allocator_alloc(struct arm_dma_alloc_args *args,
				  struct page **ret_page)
{
	return __alloc_from_pool(args->size, ret_page);
}

static void pool_allocator_free(struct arm_dma_free_args *args)
{
	__free_from_pool(args->cpu_addr, args->size);
}

static struct arm_dma_allocator pool_allocator = {
	.alloc = pool_allocator_alloc,
	.free = pool_allocator_free,
};

static void *remap_allocator_alloc(struct arm_dma_alloc_args *args,
				   struct page **ret_page)
{
	return __alloc_remap_buffer(args->dev, args->size, args->gfp,
				    args->prot, ret_page, args->caller,
				    args->want_vaddr);
}

static void remap_allocator_free(struct arm_dma_free_args *args)
{
	if (args->want_vaddr)
		__dma_free_remap(args->cpu_addr, args->size);

	__dma_free_buffer(args->page, args->size);
}

static struct arm_dma_allocator remap_allocator = {
	.alloc = remap_allocator_alloc,
	.free = remap_allocator_free,
};
732 733

static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
734 735
			 gfp_t gfp, pgprot_t prot, bool is_coherent,
			 struct dma_attrs *attrs, const void *caller)
736 737
{
	u64 mask = get_coherent_dma_mask(dev);
738
	struct page *page = NULL;
739
	void *addr;
740
	bool allowblock, cma;
741
	struct arm_dma_buffer *buf;
742 743 744 745 746 747 748 749
	struct arm_dma_alloc_args args = {
		.dev = dev,
		.size = PAGE_ALIGN(size),
		.gfp = gfp,
		.prot = prot,
		.caller = caller,
		.want_vaddr = !dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs),
	};
750

751 752 753 754 755 756 757 758 759 760 761 762
#ifdef CONFIG_DMA_API_DEBUG
	u64 limit = (mask + 1) & ~mask;
	if (limit && size >= limit) {
		dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
			size, mask);
		return NULL;
	}
#endif

	if (!mask)
		return NULL;

763 764
	buf = kzalloc(sizeof(*buf),
		      gfp & ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM));
765 766 767
	if (!buf)
		return NULL;

768 769 770
	if (mask < 0xffffffffULL)
		gfp |= GFP_DMA;

771 772 773 774 775 776 777 778
	/*
	 * Following is a work-around (a.k.a. hack) to prevent pages
	 * with __GFP_COMP being passed to split_page() which cannot
	 * handle them.  The real problem is that this flag probably
	 * should be 0 on ARM as it is not supported on this
	 * platform; see CONFIG_HUGETLBFS.
	 */
	gfp &= ~(__GFP_COMP);
779
	args.gfp = gfp;
780

781
	*handle = DMA_ERROR_CODE;
782 783 784 785 786 787 788 789 790
	allowblock = gfpflags_allow_blocking(gfp);
	cma = allowblock ? dev_get_cma_area(dev) : false;

	if (cma)
		buf->allocator = &cma_allocator;
	else if (nommu() || is_coherent)
		buf->allocator = &simple_allocator;
	else if (allowblock)
		buf->allocator = &remap_allocator;
791
	else
792 793 794
		buf->allocator = &pool_allocator;

	addr = buf->allocator->alloc(&args, &page);
795

796 797 798
	if (page) {
		unsigned long flags;

799
		*handle = pfn_to_dma(dev, page_to_pfn(page));
800
		buf->virt = args.want_vaddr ? addr : page;
801 802 803 804 805 806 807

		spin_lock_irqsave(&arm_dma_bufs_lock, flags);
		list_add(&buf->list, &arm_dma_bufs);
		spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
	} else {
		kfree(buf);
	}
808

809
	return args.want_vaddr ? addr : page;
810
}
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811 812 813 814 815

/*
 * Allocate DMA-coherent memory space and return both the kernel remapped
 * virtual and bus address for that space.
 */
816 817
void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
		    gfp_t gfp, struct dma_attrs *attrs)
L
Linus Torvalds 已提交
818
{
819
	pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
820

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Rob Herring 已提交
821
	return __dma_alloc(dev, size, handle, gfp, prot, false,
822
			   attrs, __builtin_return_address(0));
R
Rob Herring 已提交
823 824 825 826 827
}

static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
	dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
{
828
	return __dma_alloc(dev, size, handle, gfp, PAGE_KERNEL, true,
829
			   attrs, __builtin_return_address(0));
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Linus Torvalds 已提交
830 831
}

832
static int __arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
833 834
		 void *cpu_addr, dma_addr_t dma_addr, size_t size,
		 struct dma_attrs *attrs)
L
Linus Torvalds 已提交
835
{
836 837
	int ret = -ENXIO;
#ifdef CONFIG_MMU
838 839
	unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
	unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
840
	unsigned long pfn = dma_to_pfn(dev, dma_addr);
841 842
	unsigned long off = vma->vm_pgoff;

843 844 845
	if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
		return ret;

846 847 848 849 850 851
	if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
		ret = remap_pfn_range(vma, vma->vm_start,
				      pfn + off,
				      vma->vm_end - vma->vm_start,
				      vma->vm_page_prot);
	}
852
#endif	/* CONFIG_MMU */
L
Linus Torvalds 已提交
853 854 855 856

	return ret;
}

857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876
/*
 * Create userspace mapping for the DMA-coherent memory.
 */
static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
		 void *cpu_addr, dma_addr_t dma_addr, size_t size,
		 struct dma_attrs *attrs)
{
	return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
}

int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
		 void *cpu_addr, dma_addr_t dma_addr, size_t size,
		 struct dma_attrs *attrs)
{
#ifdef CONFIG_MMU
	vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
#endif	/* CONFIG_MMU */
	return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
}

L
Linus Torvalds 已提交
877
/*
878
 * Free a buffer as defined by the above mapping.
L
Linus Torvalds 已提交
879
 */
R
Rob Herring 已提交
880 881 882
static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
			   dma_addr_t handle, struct dma_attrs *attrs,
			   bool is_coherent)
L
Linus Torvalds 已提交
883
{
884
	struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
885
	struct arm_dma_buffer *buf;
886 887 888 889 890 891 892
	struct arm_dma_free_args args = {
		.dev = dev,
		.size = PAGE_ALIGN(size),
		.cpu_addr = cpu_addr,
		.page = page,
		.want_vaddr = !dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs),
	};
893 894 895 896

	buf = arm_dma_buffer_find(cpu_addr);
	if (WARN(!buf, "Freeing invalid buffer %p\n", cpu_addr))
		return;
897

898
	buf->allocator->free(&args);
899
	kfree(buf);
L
Linus Torvalds 已提交
900
}
901

R
Rob Herring 已提交
902 903 904 905 906 907 908 909 910 911 912 913
void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
		  dma_addr_t handle, struct dma_attrs *attrs)
{
	__arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
}

static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
				  dma_addr_t handle, struct dma_attrs *attrs)
{
	__arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
}

914 915 916 917 918 919 920 921 922 923 924 925 926 927 928
int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
		 void *cpu_addr, dma_addr_t handle, size_t size,
		 struct dma_attrs *attrs)
{
	struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
	int ret;

	ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
	if (unlikely(ret))
		return ret;

	sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
	return 0;
}

929
static void dma_cache_maint_page(struct page *page, unsigned long offset,
930 931
	size_t size, enum dma_data_direction dir,
	void (*op)(const void *, size_t, int))
932
{
933 934 935 936 937 938
	unsigned long pfn;
	size_t left = size;

	pfn = page_to_pfn(page) + offset / PAGE_SIZE;
	offset %= PAGE_SIZE;

939 940 941 942 943 944 945 946
	/*
	 * A single sg entry may refer to multiple physically contiguous
	 * pages.  But we still need to process highmem pages individually.
	 * If highmem is not configured then the bulk of this loop gets
	 * optimized out.
	 */
	do {
		size_t len = left;
947 948
		void *vaddr;

949 950
		page = pfn_to_page(pfn);

951
		if (PageHighMem(page)) {
952
			if (len + offset > PAGE_SIZE)
953
				len = PAGE_SIZE - offset;
954 955

			if (cache_is_vipt_nonaliasing()) {
956
				vaddr = kmap_atomic(page);
957
				op(vaddr + offset, len, dir);
958
				kunmap_atomic(vaddr);
959 960 961 962 963 964
			} else {
				vaddr = kmap_high_get(page);
				if (vaddr) {
					op(vaddr + offset, len, dir);
					kunmap_high(page);
				}
965
			}
966 967
		} else {
			vaddr = page_address(page) + offset;
968
			op(vaddr, len, dir);
969 970
		}
		offset = 0;
971
		pfn++;
972 973 974
		left -= len;
	} while (left);
}
975

976 977 978 979 980 981 982
/*
 * Make an area consistent for devices.
 * Note: Drivers should NOT use this function directly, as it will break
 * platforms with CONFIG_DMABOUNCE.
 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
 */
static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
983 984
	size_t size, enum dma_data_direction dir)
{
985
	phys_addr_t paddr;
986

987
	dma_cache_maint_page(page, off, size, dir, dmac_map_area);
988 989

	paddr = page_to_phys(page) + off;
990 991 992 993 994 995
	if (dir == DMA_FROM_DEVICE) {
		outer_inv_range(paddr, paddr + size);
	} else {
		outer_clean_range(paddr, paddr + size);
	}
	/* FIXME: non-speculating: flush on bidirectional mappings? */
996 997
}

998
static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
999 1000
	size_t size, enum dma_data_direction dir)
{
1001
	phys_addr_t paddr = page_to_phys(page) + off;
1002 1003

	/* FIXME: non-speculating: not required */
1004 1005
	/* in any case, don't bother invalidating if DMA to device */
	if (dir != DMA_TO_DEVICE) {
1006 1007
		outer_inv_range(paddr, paddr + size);

1008 1009
		dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
	}
1010 1011

	/*
1012
	 * Mark the D-cache clean for these pages to avoid extra flushing.
1013
	 */
1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029
	if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
		unsigned long pfn;
		size_t left = size;

		pfn = page_to_pfn(page) + off / PAGE_SIZE;
		off %= PAGE_SIZE;
		if (off) {
			pfn++;
			left -= PAGE_SIZE - off;
		}
		while (left >= PAGE_SIZE) {
			page = pfn_to_page(pfn++);
			set_bit(PG_dcache_clean, &page->flags);
			left -= PAGE_SIZE;
		}
	}
1030
}
1031

1032
/**
1033
 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047
 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 * @sg: list of buffers
 * @nents: number of buffers to map
 * @dir: DMA transfer direction
 *
 * Map a set of buffers described by scatterlist in streaming mode for DMA.
 * This is the scatter-gather version of the dma_map_single interface.
 * Here the scatter gather list elements are each tagged with the
 * appropriate dma address and length.  They are obtained via
 * sg_dma_{address,length}.
 *
 * Device ownership issues as mentioned for dma_map_single are the same
 * here.
 */
1048 1049
int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
		enum dma_data_direction dir, struct dma_attrs *attrs)
1050
{
1051
	struct dma_map_ops *ops = get_dma_ops(dev);
1052
	struct scatterlist *s;
1053
	int i, j;
1054 1055

	for_each_sg(sg, s, nents, i) {
1056 1057 1058
#ifdef CONFIG_NEED_SG_DMA_LENGTH
		s->dma_length = s->length;
#endif
1059 1060
		s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
						s->length, dir, attrs);
1061 1062
		if (dma_mapping_error(dev, s->dma_address))
			goto bad_mapping;
1063 1064
	}
	return nents;
1065 1066 1067

 bad_mapping:
	for_each_sg(sg, s, i, j)
1068
		ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1069
	return 0;
1070 1071 1072
}

/**
1073
 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1074 1075
 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 * @sg: list of buffers
1076
 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1077 1078 1079 1080 1081
 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 *
 * Unmap a set of streaming mode DMA translations.  Again, CPU access
 * rules concerning calls here are the same as for dma_unmap_single().
 */
1082 1083
void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
		enum dma_data_direction dir, struct dma_attrs *attrs)
1084
{
1085
	struct dma_map_ops *ops = get_dma_ops(dev);
1086 1087 1088
	struct scatterlist *s;

	int i;
1089

1090
	for_each_sg(sg, s, nents, i)
1091
		ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1092 1093 1094
}

/**
1095
 * arm_dma_sync_sg_for_cpu
1096 1097 1098 1099 1100
 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 * @sg: list of buffers
 * @nents: number of buffers to map (returned from dma_map_sg)
 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 */
1101
void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1102 1103
			int nents, enum dma_data_direction dir)
{
1104
	struct dma_map_ops *ops = get_dma_ops(dev);
1105 1106 1107
	struct scatterlist *s;
	int i;

1108 1109 1110
	for_each_sg(sg, s, nents, i)
		ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
					 dir);
1111 1112 1113
}

/**
1114
 * arm_dma_sync_sg_for_device
1115 1116 1117 1118 1119
 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 * @sg: list of buffers
 * @nents: number of buffers to map (returned from dma_map_sg)
 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 */
1120
void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1121 1122
			int nents, enum dma_data_direction dir)
{
1123
	struct dma_map_ops *ops = get_dma_ops(dev);
1124 1125 1126
	struct scatterlist *s;
	int i;

1127 1128 1129
	for_each_sg(sg, s, nents, i)
		ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
					    dir);
1130
}
1131

1132 1133 1134 1135 1136 1137 1138 1139
/*
 * Return whether the given device DMA address mask can be supported
 * properly.  For example, if your device can only drive the low 24-bits
 * during bus mastering, then you would pass 0x00ffffff as the mask
 * to this function.
 */
int dma_supported(struct device *dev, u64 mask)
{
1140
	return __dma_supported(dev, mask, false);
1141 1142 1143
}
EXPORT_SYMBOL(dma_supported);

1144 1145 1146 1147 1148 1149 1150 1151
#define PREALLOC_DMA_DEBUG_ENTRIES	4096

static int __init dma_debug_do_init(void)
{
	dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
	return 0;
}
fs_initcall(dma_debug_do_init);
1152 1153 1154 1155 1156

#ifdef CONFIG_ARM_DMA_USE_IOMMU

/* IOMMU */

1157 1158
static int extend_iommu_mapping(struct dma_iommu_mapping *mapping);

1159 1160 1161 1162 1163 1164
static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
				      size_t size)
{
	unsigned int order = get_order(size);
	unsigned int align = 0;
	unsigned int count, start;
1165
	size_t mapping_size = mapping->bits << PAGE_SHIFT;
1166
	unsigned long flags;
1167 1168
	dma_addr_t iova;
	int i;
1169

1170 1171 1172
	if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
		order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;

1173 1174
	count = PAGE_ALIGN(size) >> PAGE_SHIFT;
	align = (1 << order) - 1;
1175 1176

	spin_lock_irqsave(&mapping->lock, flags);
1177 1178 1179 1180 1181 1182 1183 1184 1185
	for (i = 0; i < mapping->nr_bitmaps; i++) {
		start = bitmap_find_next_zero_area(mapping->bitmaps[i],
				mapping->bits, 0, count, align);

		if (start > mapping->bits)
			continue;

		bitmap_set(mapping->bitmaps[i], start, count);
		break;
1186 1187
	}

1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208
	/*
	 * No unused range found. Try to extend the existing mapping
	 * and perform a second attempt to reserve an IO virtual
	 * address range of size bytes.
	 */
	if (i == mapping->nr_bitmaps) {
		if (extend_iommu_mapping(mapping)) {
			spin_unlock_irqrestore(&mapping->lock, flags);
			return DMA_ERROR_CODE;
		}

		start = bitmap_find_next_zero_area(mapping->bitmaps[i],
				mapping->bits, 0, count, align);

		if (start > mapping->bits) {
			spin_unlock_irqrestore(&mapping->lock, flags);
			return DMA_ERROR_CODE;
		}

		bitmap_set(mapping->bitmaps[i], start, count);
	}
1209 1210
	spin_unlock_irqrestore(&mapping->lock, flags);

1211
	iova = mapping->base + (mapping_size * i);
1212
	iova += start << PAGE_SHIFT;
1213 1214

	return iova;
1215 1216 1217 1218 1219
}

static inline void __free_iova(struct dma_iommu_mapping *mapping,
			       dma_addr_t addr, size_t size)
{
1220
	unsigned int start, count;
1221
	size_t mapping_size = mapping->bits << PAGE_SHIFT;
1222
	unsigned long flags;
1223 1224 1225 1226 1227 1228
	dma_addr_t bitmap_base;
	u32 bitmap_index;

	if (!size)
		return;

1229
	bitmap_index = (u32) (addr - mapping->base) / (u32) mapping_size;
1230 1231
	BUG_ON(addr < mapping->base || bitmap_index > mapping->extensions);

1232
	bitmap_base = mapping->base + mapping_size * bitmap_index;
1233

1234
	start = (addr - bitmap_base) >>	PAGE_SHIFT;
1235

1236
	if (addr + size > bitmap_base + mapping_size) {
1237 1238 1239 1240 1241 1242 1243 1244
		/*
		 * The address range to be freed reaches into the iova
		 * range of the next bitmap. This should not happen as
		 * we don't allow this in __alloc_iova (at the
		 * moment).
		 */
		BUG();
	} else
1245
		count = size >> PAGE_SHIFT;
1246 1247

	spin_lock_irqsave(&mapping->lock, flags);
1248
	bitmap_clear(mapping->bitmaps[bitmap_index], start, count);
1249 1250 1251
	spin_unlock_irqrestore(&mapping->lock, flags);
}

1252 1253 1254
/* We'll try 2M, 1M, 64K, and finally 4K; array must end with 0! */
static const int iommu_order_array[] = { 9, 8, 4, 0 };

1255 1256
static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
					  gfp_t gfp, struct dma_attrs *attrs)
1257 1258 1259 1260 1261
{
	struct page **pages;
	int count = size >> PAGE_SHIFT;
	int array_size = count * sizeof(struct page *);
	int i = 0;
1262
	int order_idx = 0;
1263 1264

	if (array_size <= PAGE_SIZE)
1265
		pages = kzalloc(array_size, GFP_KERNEL);
1266 1267 1268 1269 1270
	else
		pages = vzalloc(array_size);
	if (!pages)
		return NULL;

1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287
	if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs))
	{
		unsigned long order = get_order(size);
		struct page *page;

		page = dma_alloc_from_contiguous(dev, count, order);
		if (!page)
			goto error;

		__dma_clear_buffer(page, size);

		for (i = 0; i < count; i++)
			pages[i] = page + i;

		return pages;
	}

1288 1289 1290 1291
	/* Go straight to 4K chunks if caller says it's OK. */
	if (dma_get_attr(DMA_ATTR_ALLOC_SINGLE_PAGES, attrs))
		order_idx = ARRAY_SIZE(iommu_order_array) - 1;

1292 1293 1294 1295 1296
	/*
	 * IOMMU can map any pages, so himem can also be used here
	 */
	gfp |= __GFP_NOWARN | __GFP_HIGHMEM;

1297
	while (count) {
1298 1299
		int j, order;

1300 1301 1302 1303 1304 1305
		order = iommu_order_array[order_idx];

		/* Drop down when we get small */
		if (__fls(count) < order) {
			order_idx++;
			continue;
1306
		}
1307

1308 1309 1310 1311 1312 1313 1314 1315 1316 1317
		if (order) {
			/* See if it's easy to allocate a high-order chunk */
			pages[i] = alloc_pages(gfp | __GFP_NORETRY, order);

			/* Go down a notch at first sign of pressure */
			if (!pages[i]) {
				order_idx++;
				continue;
			}
		} else {
1318 1319 1320 1321
			pages[i] = alloc_pages(gfp, 0);
			if (!pages[i])
				goto error;
		}
1322

1323
		if (order) {
1324
			split_page(pages[i], order);
1325 1326 1327 1328
			j = 1 << order;
			while (--j)
				pages[i + j] = pages[i] + j;
		}
1329 1330 1331 1332 1333 1334 1335 1336

		__dma_clear_buffer(pages[i], PAGE_SIZE << order);
		i += 1 << order;
		count -= 1 << order;
	}

	return pages;
error:
1337
	while (i--)
1338 1339
		if (pages[i])
			__free_pages(pages[i], 0);
1340
	kvfree(pages);
1341 1342 1343
	return NULL;
}

1344 1345
static int __iommu_free_buffer(struct device *dev, struct page **pages,
			       size_t size, struct dma_attrs *attrs)
1346 1347 1348
{
	int count = size >> PAGE_SHIFT;
	int i;
1349 1350 1351 1352 1353 1354 1355 1356 1357

	if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs)) {
		dma_release_from_contiguous(dev, pages[0], count);
	} else {
		for (i = 0; i < count; i++)
			if (pages[i])
				__free_pages(pages[i], 0);
	}

1358
	kvfree(pages);
1359 1360 1361 1362 1363 1364 1365
	return 0;
}

/*
 * Create a CPU mapping for a specified pages
 */
static void *
1366 1367
__iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
		    const void *caller)
1368
{
1369 1370
	return dma_common_pages_remap(pages, size,
			VM_ARM_DMA_CONSISTENT | VM_USERMAP, prot, caller);
1371 1372 1373 1374 1375 1376 1377 1378
}

/*
 * Create a mapping in device IO address space for specified pages
 */
static dma_addr_t
__iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
{
1379
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1380 1381
	unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
	dma_addr_t dma_addr, iova;
1382
	int i;
1383 1384 1385 1386 1387 1388 1389

	dma_addr = __alloc_iova(mapping, size);
	if (dma_addr == DMA_ERROR_CODE)
		return dma_addr;

	iova = dma_addr;
	for (i = 0; i < count; ) {
1390 1391
		int ret;

1392 1393 1394 1395 1396 1397 1398 1399 1400
		unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
		phys_addr_t phys = page_to_phys(pages[i]);
		unsigned int len, j;

		for (j = i + 1; j < count; j++, next_pfn++)
			if (page_to_pfn(pages[j]) != next_pfn)
				break;

		len = (j - i) << PAGE_SHIFT;
1401 1402
		ret = iommu_map(mapping->domain, iova, phys, len,
				IOMMU_READ|IOMMU_WRITE);
1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416
		if (ret < 0)
			goto fail;
		iova += len;
		i = j;
	}
	return dma_addr;
fail:
	iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
	__free_iova(mapping, dma_addr, size);
	return DMA_ERROR_CODE;
}

static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
{
1417
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430

	/*
	 * add optional in-page offset from iova to size and align
	 * result to page size
	 */
	size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
	iova &= PAGE_MASK;

	iommu_unmap(mapping->domain, iova, size);
	__free_iova(mapping, iova, size);
	return 0;
}

1431 1432
static struct page **__atomic_get_pages(void *addr)
{
1433 1434 1435 1436 1437
	struct page *page;
	phys_addr_t phys;

	phys = gen_pool_virt_to_phys(atomic_pool, (unsigned long)addr);
	page = phys_to_page(phys);
1438

1439
	return (struct page **)page;
1440 1441
}

1442
static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
1443 1444 1445
{
	struct vm_struct *area;

1446 1447 1448
	if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
		return __atomic_get_pages(cpu_addr);

1449 1450 1451
	if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
		return cpu_addr;

1452 1453 1454 1455 1456 1457
	area = find_vm_area(cpu_addr);
	if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
		return area->pages;
	return NULL;
}

1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478
static void *__iommu_alloc_atomic(struct device *dev, size_t size,
				  dma_addr_t *handle)
{
	struct page *page;
	void *addr;

	addr = __alloc_from_pool(size, &page);
	if (!addr)
		return NULL;

	*handle = __iommu_create_mapping(dev, &page, size);
	if (*handle == DMA_ERROR_CODE)
		goto err_mapping;

	return addr;

err_mapping:
	__free_from_pool(addr, size);
	return NULL;
}

1479
static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1480 1481 1482
				dma_addr_t handle, size_t size)
{
	__iommu_remove_mapping(dev, handle, size);
1483
	__free_from_pool(cpu_addr, size);
1484 1485
}

1486 1487 1488
static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
	    dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
{
1489
	pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
1490 1491 1492 1493 1494 1495
	struct page **pages;
	void *addr = NULL;

	*handle = DMA_ERROR_CODE;
	size = PAGE_ALIGN(size);

1496
	if (!gfpflags_allow_blocking(gfp))
1497 1498
		return __iommu_alloc_atomic(dev, size, handle);

1499 1500 1501 1502 1503 1504 1505 1506 1507
	/*
	 * Following is a work-around (a.k.a. hack) to prevent pages
	 * with __GFP_COMP being passed to split_page() which cannot
	 * handle them.  The real problem is that this flag probably
	 * should be 0 on ARM as it is not supported on this
	 * platform; see CONFIG_HUGETLBFS.
	 */
	gfp &= ~(__GFP_COMP);

1508
	pages = __iommu_alloc_buffer(dev, size, gfp, attrs);
1509 1510 1511 1512 1513 1514 1515
	if (!pages)
		return NULL;

	*handle = __iommu_create_mapping(dev, pages, size);
	if (*handle == DMA_ERROR_CODE)
		goto err_buffer;

1516 1517 1518
	if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
		return pages;

1519 1520
	addr = __iommu_alloc_remap(pages, size, gfp, prot,
				   __builtin_return_address(0));
1521 1522 1523 1524 1525 1526 1527 1528
	if (!addr)
		goto err_mapping;

	return addr;

err_mapping:
	__iommu_remove_mapping(dev, *handle, size);
err_buffer:
1529
	__iommu_free_buffer(dev, pages, size, attrs);
1530 1531 1532 1533 1534 1535 1536
	return NULL;
}

static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
		    void *cpu_addr, dma_addr_t dma_addr, size_t size,
		    struct dma_attrs *attrs)
{
1537 1538
	unsigned long uaddr = vma->vm_start;
	unsigned long usize = vma->vm_end - vma->vm_start;
1539
	struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1540 1541
	unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
	unsigned long off = vma->vm_pgoff;
1542 1543 1544

	vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);

1545 1546
	if (!pages)
		return -ENXIO;
1547

1548 1549 1550
	if (off >= nr_pages || (usize >> PAGE_SHIFT) > nr_pages - off)
		return -ENXIO;

1551 1552
	pages += off;

1553 1554 1555 1556 1557 1558 1559 1560 1561
	do {
		int ret = vm_insert_page(vma, uaddr, *pages++);
		if (ret) {
			pr_err("Remapping memory failed: %d\n", ret);
			return ret;
		}
		uaddr += PAGE_SIZE;
		usize -= PAGE_SIZE;
	} while (usize > 0);
1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572

	return 0;
}

/*
 * free a page as defined by the above mapping.
 * Must not be called with IRQs disabled.
 */
void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
			  dma_addr_t handle, struct dma_attrs *attrs)
{
1573
	struct page **pages;
1574 1575
	size = PAGE_ALIGN(size);

1576 1577
	if (__in_atomic_pool(cpu_addr, size)) {
		__iommu_free_atomic(dev, cpu_addr, handle, size);
1578
		return;
1579
	}
1580

1581 1582 1583
	pages = __iommu_get_pages(cpu_addr, attrs);
	if (!pages) {
		WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1584 1585 1586
		return;
	}

1587
	if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) {
1588 1589
		dma_common_free_remap(cpu_addr, size,
			VM_ARM_DMA_CONSISTENT | VM_USERMAP);
1590
	}
1591 1592

	__iommu_remove_mapping(dev, handle, size);
1593
	__iommu_free_buffer(dev, pages, size, attrs);
1594 1595
}

1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607
static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
				 void *cpu_addr, dma_addr_t dma_addr,
				 size_t size, struct dma_attrs *attrs)
{
	unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
	struct page **pages = __iommu_get_pages(cpu_addr, attrs);

	if (!pages)
		return -ENXIO;

	return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
					 GFP_KERNEL);
1608 1609
}

1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630
static int __dma_direction_to_prot(enum dma_data_direction dir)
{
	int prot;

	switch (dir) {
	case DMA_BIDIRECTIONAL:
		prot = IOMMU_READ | IOMMU_WRITE;
		break;
	case DMA_TO_DEVICE:
		prot = IOMMU_READ;
		break;
	case DMA_FROM_DEVICE:
		prot = IOMMU_WRITE;
		break;
	default:
		prot = 0;
	}

	return prot;
}

1631 1632 1633 1634 1635
/*
 * Map a part of the scatter-gather list into contiguous io address space
 */
static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
			  size_t size, dma_addr_t *handle,
R
Rob Herring 已提交
1636 1637
			  enum dma_data_direction dir, struct dma_attrs *attrs,
			  bool is_coherent)
1638
{
1639
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1640 1641 1642 1643
	dma_addr_t iova, iova_base;
	int ret = 0;
	unsigned int count;
	struct scatterlist *s;
1644
	int prot;
1645 1646 1647 1648 1649 1650 1651 1652 1653

	size = PAGE_ALIGN(size);
	*handle = DMA_ERROR_CODE;

	iova_base = iova = __alloc_iova(mapping, size);
	if (iova == DMA_ERROR_CODE)
		return -ENOMEM;

	for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
D
Dan Williams 已提交
1654
		phys_addr_t phys = page_to_phys(sg_page(s));
1655 1656
		unsigned int len = PAGE_ALIGN(s->offset + s->length);

R
Rob Herring 已提交
1657 1658
		if (!is_coherent &&
			!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1659 1660
			__dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);

1661 1662 1663
		prot = __dma_direction_to_prot(dir);

		ret = iommu_map(mapping->domain, iova, phys, len, prot);
1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677
		if (ret < 0)
			goto fail;
		count += len >> PAGE_SHIFT;
		iova += len;
	}
	*handle = iova_base;

	return 0;
fail:
	iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
	__free_iova(mapping, iova_base, size);
	return ret;
}

R
Rob Herring 已提交
1678 1679 1680
static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
		     enum dma_data_direction dir, struct dma_attrs *attrs,
		     bool is_coherent)
1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695
{
	struct scatterlist *s = sg, *dma = sg, *start = sg;
	int i, count = 0;
	unsigned int offset = s->offset;
	unsigned int size = s->offset + s->length;
	unsigned int max = dma_get_max_seg_size(dev);

	for (i = 1; i < nents; i++) {
		s = sg_next(s);

		s->dma_address = DMA_ERROR_CODE;
		s->dma_length = 0;

		if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
			if (__map_sg_chunk(dev, start, size, &dma->dma_address,
R
Rob Herring 已提交
1696
			    dir, attrs, is_coherent) < 0)
1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708
				goto bad_mapping;

			dma->dma_address += offset;
			dma->dma_length = size - offset;

			size = offset = s->offset;
			start = s;
			dma = sg_next(dma);
			count += 1;
		}
		size += s->length;
	}
R
Rob Herring 已提交
1709 1710
	if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
		is_coherent) < 0)
1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724
		goto bad_mapping;

	dma->dma_address += offset;
	dma->dma_length = size - offset;

	return count+1;

bad_mapping:
	for_each_sg(sg, s, count, i)
		__iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
	return 0;
}

/**
R
Rob Herring 已提交
1725
 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1726 1727
 * @dev: valid struct device pointer
 * @sg: list of buffers
R
Rob Herring 已提交
1728 1729
 * @nents: number of buffers to map
 * @dir: DMA transfer direction
1730
 *
R
Rob Herring 已提交
1731 1732 1733 1734
 * Map a set of i/o coherent buffers described by scatterlist in streaming
 * mode for DMA. The scatter gather list elements are merged together (if
 * possible) and tagged with the appropriate dma address and length. They are
 * obtained via sg_dma_{address,length}.
1735
 */
R
Rob Herring 已提交
1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762
int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
		int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
{
	return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
}

/**
 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
 * @dev: valid struct device pointer
 * @sg: list of buffers
 * @nents: number of buffers to map
 * @dir: DMA transfer direction
 *
 * Map a set of buffers described by scatterlist in streaming mode for DMA.
 * The scatter gather list elements are merged together (if possible) and
 * tagged with the appropriate dma address and length. They are obtained via
 * sg_dma_{address,length}.
 */
int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
		int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
{
	return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
}

static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
		int nents, enum dma_data_direction dir, struct dma_attrs *attrs,
		bool is_coherent)
1763 1764 1765 1766 1767 1768 1769 1770
{
	struct scatterlist *s;
	int i;

	for_each_sg(sg, s, nents, i) {
		if (sg_dma_len(s))
			__iommu_remove_mapping(dev, sg_dma_address(s),
					       sg_dma_len(s));
R
Rob Herring 已提交
1771
		if (!is_coherent &&
1772
		    !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1773 1774 1775 1776 1777
			__dma_page_dev_to_cpu(sg_page(s), s->offset,
					      s->length, dir);
	}
}

R
Rob Herring 已提交
1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809
/**
 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
 * @dev: valid struct device pointer
 * @sg: list of buffers
 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 *
 * Unmap a set of streaming mode DMA translations.  Again, CPU access
 * rules concerning calls here are the same as for dma_unmap_single().
 */
void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
		int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
{
	__iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
}

/**
 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
 * @dev: valid struct device pointer
 * @sg: list of buffers
 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 *
 * Unmap a set of streaming mode DMA translations.  Again, CPU access
 * rules concerning calls here are the same as for dma_unmap_single().
 */
void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
			enum dma_data_direction dir, struct dma_attrs *attrs)
{
	__iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
}

1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823
/**
 * arm_iommu_sync_sg_for_cpu
 * @dev: valid struct device pointer
 * @sg: list of buffers
 * @nents: number of buffers to map (returned from dma_map_sg)
 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 */
void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
			int nents, enum dma_data_direction dir)
{
	struct scatterlist *s;
	int i;

	for_each_sg(sg, s, nents, i)
R
Rob Herring 已提交
1824
		__dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841

}

/**
 * arm_iommu_sync_sg_for_device
 * @dev: valid struct device pointer
 * @sg: list of buffers
 * @nents: number of buffers to map (returned from dma_map_sg)
 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 */
void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
			int nents, enum dma_data_direction dir)
{
	struct scatterlist *s;
	int i;

	for_each_sg(sg, s, nents, i)
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1842
		__dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1843 1844 1845 1846
}


/**
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 * arm_coherent_iommu_map_page
1848 1849 1850 1851 1852 1853
 * @dev: valid struct device pointer
 * @page: page that buffer resides in
 * @offset: offset into page for start of buffer
 * @size: size of buffer to map
 * @dir: DMA transfer direction
 *
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 * Coherent IOMMU aware version of arm_dma_map_page()
1855
 */
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static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1857 1858 1859
	     unsigned long offset, size_t size, enum dma_data_direction dir,
	     struct dma_attrs *attrs)
{
1860
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1861
	dma_addr_t dma_addr;
1862
	int ret, prot, len = PAGE_ALIGN(size + offset);
1863 1864 1865 1866 1867

	dma_addr = __alloc_iova(mapping, len);
	if (dma_addr == DMA_ERROR_CODE)
		return dma_addr;

1868
	prot = __dma_direction_to_prot(dir);
1869 1870

	ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, prot);
1871 1872 1873 1874 1875 1876 1877 1878 1879
	if (ret < 0)
		goto fail;

	return dma_addr + offset;
fail:
	__free_iova(mapping, dma_addr, len);
	return DMA_ERROR_CODE;
}

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1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912
/**
 * arm_iommu_map_page
 * @dev: valid struct device pointer
 * @page: page that buffer resides in
 * @offset: offset into page for start of buffer
 * @size: size of buffer to map
 * @dir: DMA transfer direction
 *
 * IOMMU aware version of arm_dma_map_page()
 */
static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
	     unsigned long offset, size_t size, enum dma_data_direction dir,
	     struct dma_attrs *attrs)
{
	if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
		__dma_page_cpu_to_dev(page, offset, size, dir);

	return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
}

/**
 * arm_coherent_iommu_unmap_page
 * @dev: valid struct device pointer
 * @handle: DMA address of buffer
 * @size: size of buffer (same as passed to dma_map_page)
 * @dir: DMA transfer direction (same as passed to dma_map_page)
 *
 * Coherent IOMMU aware version of arm_dma_unmap_page()
 */
static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
		size_t size, enum dma_data_direction dir,
		struct dma_attrs *attrs)
{
1913
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
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	dma_addr_t iova = handle & PAGE_MASK;
	int offset = handle & ~PAGE_MASK;
	int len = PAGE_ALIGN(size + offset);

	if (!iova)
		return;

	iommu_unmap(mapping->domain, iova, len);
	__free_iova(mapping, iova, len);
}

1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937
/**
 * arm_iommu_unmap_page
 * @dev: valid struct device pointer
 * @handle: DMA address of buffer
 * @size: size of buffer (same as passed to dma_map_page)
 * @dir: DMA transfer direction (same as passed to dma_map_page)
 *
 * IOMMU aware version of arm_dma_unmap_page()
 */
static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
		size_t size, enum dma_data_direction dir,
		struct dma_attrs *attrs)
{
1938
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1939 1940 1941 1942 1943 1944 1945 1946
	dma_addr_t iova = handle & PAGE_MASK;
	struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
	int offset = handle & ~PAGE_MASK;
	int len = PAGE_ALIGN(size + offset);

	if (!iova)
		return;

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	if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1948 1949 1950 1951 1952 1953 1954 1955 1956
		__dma_page_dev_to_cpu(page, offset, size, dir);

	iommu_unmap(mapping->domain, iova, len);
	__free_iova(mapping, iova, len);
}

static void arm_iommu_sync_single_for_cpu(struct device *dev,
		dma_addr_t handle, size_t size, enum dma_data_direction dir)
{
1957
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1958 1959 1960 1961 1962 1963 1964
	dma_addr_t iova = handle & PAGE_MASK;
	struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
	unsigned int offset = handle & ~PAGE_MASK;

	if (!iova)
		return;

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	__dma_page_dev_to_cpu(page, offset, size, dir);
1966 1967 1968 1969 1970
}

static void arm_iommu_sync_single_for_device(struct device *dev,
		dma_addr_t handle, size_t size, enum dma_data_direction dir)
{
1971
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985
	dma_addr_t iova = handle & PAGE_MASK;
	struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
	unsigned int offset = handle & ~PAGE_MASK;

	if (!iova)
		return;

	__dma_page_cpu_to_dev(page, offset, size, dir);
}

struct dma_map_ops iommu_ops = {
	.alloc		= arm_iommu_alloc_attrs,
	.free		= arm_iommu_free_attrs,
	.mmap		= arm_iommu_mmap_attrs,
1986
	.get_sgtable	= arm_iommu_get_sgtable,
1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998

	.map_page		= arm_iommu_map_page,
	.unmap_page		= arm_iommu_unmap_page,
	.sync_single_for_cpu	= arm_iommu_sync_single_for_cpu,
	.sync_single_for_device	= arm_iommu_sync_single_for_device,

	.map_sg			= arm_iommu_map_sg,
	.unmap_sg		= arm_iommu_unmap_sg,
	.sync_sg_for_cpu	= arm_iommu_sync_sg_for_cpu,
	.sync_sg_for_device	= arm_iommu_sync_sg_for_device,
};

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struct dma_map_ops iommu_coherent_ops = {
	.alloc		= arm_iommu_alloc_attrs,
	.free		= arm_iommu_free_attrs,
	.mmap		= arm_iommu_mmap_attrs,
	.get_sgtable	= arm_iommu_get_sgtable,

	.map_page	= arm_coherent_iommu_map_page,
	.unmap_page	= arm_coherent_iommu_unmap_page,

	.map_sg		= arm_coherent_iommu_map_sg,
	.unmap_sg	= arm_coherent_iommu_unmap_sg,
};

2012 2013 2014 2015
/**
 * arm_iommu_create_mapping
 * @bus: pointer to the bus holding the client device (for IOMMU calls)
 * @base: start address of the valid IO address space
2016
 * @size: maximum size of the valid IO address space
2017 2018 2019 2020 2021 2022 2023 2024 2025
 *
 * Creates a mapping structure which holds information about used/unused
 * IO address ranges, which is required to perform memory allocation and
 * mapping with IOMMU aware functions.
 *
 * The client device need to be attached to the mapping with
 * arm_iommu_attach_device function.
 */
struct dma_iommu_mapping *
2026
arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size)
2027
{
2028 2029
	unsigned int bits = size >> PAGE_SHIFT;
	unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
2030
	struct dma_iommu_mapping *mapping;
2031
	int extensions = 1;
2032 2033
	int err = -ENOMEM;

2034 2035 2036 2037
	/* currently only 32-bit DMA address space is supported */
	if (size > DMA_BIT_MASK(32) + 1)
		return ERR_PTR(-ERANGE);

2038
	if (!bitmap_size)
2039 2040
		return ERR_PTR(-EINVAL);

2041 2042 2043 2044 2045
	if (bitmap_size > PAGE_SIZE) {
		extensions = bitmap_size / PAGE_SIZE;
		bitmap_size = PAGE_SIZE;
	}

2046 2047 2048 2049
	mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
	if (!mapping)
		goto err;

2050 2051
	mapping->bitmap_size = bitmap_size;
	mapping->bitmaps = kzalloc(extensions * sizeof(unsigned long *),
2052 2053
				GFP_KERNEL);
	if (!mapping->bitmaps)
2054 2055
		goto err2;

2056
	mapping->bitmaps[0] = kzalloc(bitmap_size, GFP_KERNEL);
2057 2058 2059 2060 2061
	if (!mapping->bitmaps[0])
		goto err3;

	mapping->nr_bitmaps = 1;
	mapping->extensions = extensions;
2062
	mapping->base = base;
2063
	mapping->bits = BITS_PER_BYTE * bitmap_size;
2064

2065 2066 2067 2068
	spin_lock_init(&mapping->lock);

	mapping->domain = iommu_domain_alloc(bus);
	if (!mapping->domain)
2069
		goto err4;
2070 2071 2072

	kref_init(&mapping->kref);
	return mapping;
2073 2074
err4:
	kfree(mapping->bitmaps[0]);
2075
err3:
2076
	kfree(mapping->bitmaps);
2077 2078 2079 2080 2081
err2:
	kfree(mapping);
err:
	return ERR_PTR(err);
}
2082
EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
2083 2084 2085

static void release_iommu_mapping(struct kref *kref)
{
2086
	int i;
2087 2088 2089 2090
	struct dma_iommu_mapping *mapping =
		container_of(kref, struct dma_iommu_mapping, kref);

	iommu_domain_free(mapping->domain);
2091 2092 2093
	for (i = 0; i < mapping->nr_bitmaps; i++)
		kfree(mapping->bitmaps[i]);
	kfree(mapping->bitmaps);
2094 2095 2096
	kfree(mapping);
}

2097 2098 2099 2100
static int extend_iommu_mapping(struct dma_iommu_mapping *mapping)
{
	int next_bitmap;

2101
	if (mapping->nr_bitmaps >= mapping->extensions)
2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114
		return -EINVAL;

	next_bitmap = mapping->nr_bitmaps;
	mapping->bitmaps[next_bitmap] = kzalloc(mapping->bitmap_size,
						GFP_ATOMIC);
	if (!mapping->bitmaps[next_bitmap])
		return -ENOMEM;

	mapping->nr_bitmaps++;

	return 0;
}

2115 2116 2117 2118 2119
void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
{
	if (mapping)
		kref_put(&mapping->kref, release_iommu_mapping);
}
2120
EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
2121

2122 2123 2124 2125 2126 2127 2128 2129 2130 2131
static int __arm_iommu_attach_device(struct device *dev,
				     struct dma_iommu_mapping *mapping)
{
	int err;

	err = iommu_attach_device(mapping->domain, dev);
	if (err)
		return err;

	kref_get(&mapping->kref);
2132
	to_dma_iommu_mapping(dev) = mapping;
2133 2134 2135 2136 2137

	pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
	return 0;
}

2138 2139 2140 2141 2142 2143
/**
 * arm_iommu_attach_device
 * @dev: valid struct device pointer
 * @mapping: io address space mapping structure (returned from
 *	arm_iommu_create_mapping)
 *
2144 2145 2146 2147
 * Attaches specified io address space mapping to the provided device.
 * This replaces the dma operations (dma_map_ops pointer) with the
 * IOMMU aware version.
 *
2148 2149
 * More than one client might be attached to the same io address space
 * mapping.
2150 2151 2152 2153 2154 2155
 */
int arm_iommu_attach_device(struct device *dev,
			    struct dma_iommu_mapping *mapping)
{
	int err;

2156
	err = __arm_iommu_attach_device(dev, mapping);
2157 2158 2159
	if (err)
		return err;

2160
	set_dma_ops(dev, &iommu_ops);
2161 2162
	return 0;
}
2163
EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
2164

2165
static void __arm_iommu_detach_device(struct device *dev)
2166 2167 2168 2169 2170 2171 2172 2173 2174 2175 2176
{
	struct dma_iommu_mapping *mapping;

	mapping = to_dma_iommu_mapping(dev);
	if (!mapping) {
		dev_warn(dev, "Not attached\n");
		return;
	}

	iommu_detach_device(mapping->domain, dev);
	kref_put(&mapping->kref, release_iommu_mapping);
2177
	to_dma_iommu_mapping(dev) = NULL;
2178 2179 2180

	pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
}
2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193

/**
 * arm_iommu_detach_device
 * @dev: valid struct device pointer
 *
 * Detaches the provided device from a previously attached map.
 * This voids the dma operations (dma_map_ops pointer)
 */
void arm_iommu_detach_device(struct device *dev)
{
	__arm_iommu_detach_device(dev);
	set_dma_ops(dev, NULL);
}
2194
EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
2195

2196 2197 2198 2199 2200 2201
static struct dma_map_ops *arm_get_iommu_dma_map_ops(bool coherent)
{
	return coherent ? &iommu_coherent_ops : &iommu_ops;
}

static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2202
				    const struct iommu_ops *iommu)
2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215
{
	struct dma_iommu_mapping *mapping;

	if (!iommu)
		return false;

	mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
	if (IS_ERR(mapping)) {
		pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
				size, dev_name(dev));
		return false;
	}

2216
	if (__arm_iommu_attach_device(dev, mapping)) {
2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227
		pr_warn("Failed to attached device %s to IOMMU_mapping\n",
				dev_name(dev));
		arm_iommu_release_mapping(mapping);
		return false;
	}

	return true;
}

static void arm_teardown_iommu_dma_ops(struct device *dev)
{
2228
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2229

2230 2231 2232
	if (!mapping)
		return;

2233
	__arm_iommu_detach_device(dev);
2234 2235 2236 2237 2238 2239
	arm_iommu_release_mapping(mapping);
}

#else

static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2240
				    const struct iommu_ops *iommu)
2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256
{
	return false;
}

static void arm_teardown_iommu_dma_ops(struct device *dev) { }

#define arm_get_iommu_dma_map_ops arm_get_dma_map_ops

#endif	/* CONFIG_ARM_DMA_USE_IOMMU */

static struct dma_map_ops *arm_get_dma_map_ops(bool coherent)
{
	return coherent ? &arm_coherent_dma_ops : &arm_dma_ops;
}

void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
2257
			const struct iommu_ops *iommu, bool coherent)
2258 2259 2260
{
	struct dma_map_ops *dma_ops;

2261
	dev->archdata.dma_coherent = coherent;
2262 2263 2264 2265 2266 2267 2268 2269 2270 2271 2272 2273
	if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu))
		dma_ops = arm_get_iommu_dma_map_ops(coherent);
	else
		dma_ops = arm_get_dma_map_ops(coherent);

	set_dma_ops(dev, dma_ops);
}

void arch_teardown_dma_ops(struct device *dev)
{
	arm_teardown_iommu_dma_ops(dev);
}