dma-mapping.c 55.7 KB
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/*
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 *  linux/arch/arm/mm/dma-mapping.c
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 *
 *  Copyright (C) 2000-2004 Russell King
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 *  DMA uncached mapping support.
 */
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#include <linux/bootmem.h>
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#include <linux/module.h>
#include <linux/mm.h>
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#include <linux/genalloc.h>
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#include <linux/gfp.h>
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#include <linux/errno.h>
#include <linux/list.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/dma-mapping.h>
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#include <linux/dma-contiguous.h>
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#include <linux/highmem.h>
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#include <linux/memblock.h>
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#include <linux/slab.h>
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#include <linux/iommu.h>
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#include <linux/io.h>
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#include <linux/vmalloc.h>
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#include <linux/sizes.h>
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#include <linux/cma.h>
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#include <asm/memory.h>
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#include <asm/highmem.h>
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#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
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#include <asm/mach/arch.h>
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#include <asm/dma-iommu.h>
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#include <asm/mach/map.h>
#include <asm/system_info.h>
#include <asm/dma-contiguous.h>
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#include "dma.h"
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#include "mm.h"

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/*
 * The DMA API is built upon the notion of "buffer ownership".  A buffer
 * is either exclusively owned by the CPU (and therefore may be accessed
 * by it) or exclusively owned by the DMA device.  These helper functions
 * represent the transitions between these two ownership states.
 *
 * Note, however, that on later ARMs, this notion does not work due to
 * speculative prefetches.  We model our approach on the assumption that
 * the CPU does do speculative prefetches, which means we clean caches
 * before transfers and delay cache invalidation until transfer completion.
 *
 */
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static void __dma_page_cpu_to_dev(struct page *, unsigned long,
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		size_t, enum dma_data_direction);
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static void __dma_page_dev_to_cpu(struct page *, unsigned long,
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		size_t, enum dma_data_direction);

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/**
 * arm_dma_map_page - map a portion of a page for streaming DMA
 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 * @page: page that buffer resides in
 * @offset: offset into page for start of buffer
 * @size: size of buffer to map
 * @dir: DMA transfer direction
 *
 * Ensure that any data held in the cache is appropriately discarded
 * or written back.
 *
 * The device owns this memory once this call has completed.  The CPU
 * can regain ownership by calling dma_unmap_page().
 */
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static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
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	     unsigned long offset, size_t size, enum dma_data_direction dir,
	     struct dma_attrs *attrs)
{
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	if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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		__dma_page_cpu_to_dev(page, offset, size, dir);
	return pfn_to_dma(dev, page_to_pfn(page)) + offset;
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}

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static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
	     unsigned long offset, size_t size, enum dma_data_direction dir,
	     struct dma_attrs *attrs)
{
	return pfn_to_dma(dev, page_to_pfn(page)) + offset;
}

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/**
 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 * @handle: DMA address of buffer
 * @size: size of buffer (same as passed to dma_map_page)
 * @dir: DMA transfer direction (same as passed to dma_map_page)
 *
 * Unmap a page streaming mode DMA translation.  The handle and size
 * must match what was provided in the previous dma_map_page() call.
 * All other usages are undefined.
 *
 * After this call, reads by the CPU to the buffer are guaranteed to see
 * whatever the device wrote there.
 */
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static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
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		size_t size, enum dma_data_direction dir,
		struct dma_attrs *attrs)
{
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	if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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		__dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
				      handle & ~PAGE_MASK, size, dir);
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}

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static void arm_dma_sync_single_for_cpu(struct device *dev,
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		dma_addr_t handle, size_t size, enum dma_data_direction dir)
{
	unsigned int offset = handle & (PAGE_SIZE - 1);
	struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
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	__dma_page_dev_to_cpu(page, offset, size, dir);
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}

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static void arm_dma_sync_single_for_device(struct device *dev,
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		dma_addr_t handle, size_t size, enum dma_data_direction dir)
{
	unsigned int offset = handle & (PAGE_SIZE - 1);
	struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
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	__dma_page_cpu_to_dev(page, offset, size, dir);
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}

struct dma_map_ops arm_dma_ops = {
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	.alloc			= arm_dma_alloc,
	.free			= arm_dma_free,
	.mmap			= arm_dma_mmap,
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	.get_sgtable		= arm_dma_get_sgtable,
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	.map_page		= arm_dma_map_page,
	.unmap_page		= arm_dma_unmap_page,
	.map_sg			= arm_dma_map_sg,
	.unmap_sg		= arm_dma_unmap_sg,
	.sync_single_for_cpu	= arm_dma_sync_single_for_cpu,
	.sync_single_for_device	= arm_dma_sync_single_for_device,
	.sync_sg_for_cpu	= arm_dma_sync_sg_for_cpu,
	.sync_sg_for_device	= arm_dma_sync_sg_for_device,
	.set_dma_mask		= arm_dma_set_mask,
};
EXPORT_SYMBOL(arm_dma_ops);

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static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
	dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs);
static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
				  dma_addr_t handle, struct dma_attrs *attrs);
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static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
		 void *cpu_addr, dma_addr_t dma_addr, size_t size,
		 struct dma_attrs *attrs);
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struct dma_map_ops arm_coherent_dma_ops = {
	.alloc			= arm_coherent_dma_alloc,
	.free			= arm_coherent_dma_free,
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	.mmap			= arm_coherent_dma_mmap,
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	.get_sgtable		= arm_dma_get_sgtable,
	.map_page		= arm_coherent_dma_map_page,
	.map_sg			= arm_dma_map_sg,
	.set_dma_mask		= arm_dma_set_mask,
};
EXPORT_SYMBOL(arm_coherent_dma_ops);

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static int __dma_supported(struct device *dev, u64 mask, bool warn)
{
	unsigned long max_dma_pfn;

	/*
	 * If the mask allows for more memory than we can address,
	 * and we actually have that much memory, then we must
	 * indicate that DMA to this device is not supported.
	 */
	if (sizeof(mask) != sizeof(dma_addr_t) &&
	    mask > (dma_addr_t)~0 &&
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	    dma_to_pfn(dev, ~0) < max_pfn - 1) {
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		if (warn) {
			dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
				 mask);
			dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
		}
		return 0;
	}

	max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);

	/*
	 * Translate the device's DMA mask to a PFN limit.  This
	 * PFN number includes the page which we can DMA to.
	 */
	if (dma_to_pfn(dev, mask) < max_dma_pfn) {
		if (warn)
			dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
				 mask,
				 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
				 max_dma_pfn + 1);
		return 0;
	}

	return 1;
}

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static u64 get_coherent_dma_mask(struct device *dev)
{
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	u64 mask = (u64)DMA_BIT_MASK(32);
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	if (dev) {
		mask = dev->coherent_dma_mask;

		/*
		 * Sanity check the DMA mask - it must be non-zero, and
		 * must be able to be satisfied by a DMA allocation.
		 */
		if (mask == 0) {
			dev_warn(dev, "coherent DMA mask is unset\n");
			return 0;
		}

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		if (!__dma_supported(dev, mask, true))
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			return 0;
	}
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	return mask;
}

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static void __dma_clear_buffer(struct page *page, size_t size)
{
	/*
	 * Ensure that the allocated pages are zeroed, and that any data
	 * lurking in the kernel direct-mapped region is invalidated.
	 */
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	if (PageHighMem(page)) {
		phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
		phys_addr_t end = base + size;
		while (size > 0) {
			void *ptr = kmap_atomic(page);
			memset(ptr, 0, PAGE_SIZE);
			dmac_flush_range(ptr, ptr + PAGE_SIZE);
			kunmap_atomic(ptr);
			page++;
			size -= PAGE_SIZE;
		}
		outer_flush_range(base, end);
	} else {
		void *ptr = page_address(page);
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		memset(ptr, 0, size);
		dmac_flush_range(ptr, ptr + size);
		outer_flush_range(__pa(ptr), __pa(ptr) + size);
	}
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}

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/*
 * Allocate a DMA buffer for 'dev' of size 'size' using the
 * specified gfp mask.  Note that 'size' must be page aligned.
 */
static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
{
	unsigned long order = get_order(size);
	struct page *page, *p, *e;

	page = alloc_pages(gfp, order);
	if (!page)
		return NULL;

	/*
	 * Now split the huge page and free the excess pages
	 */
	split_page(page, order);
	for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
		__free_page(p);

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	__dma_clear_buffer(page, size);
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	return page;
}

/*
 * Free a DMA buffer.  'size' must be page aligned.
 */
static void __dma_free_buffer(struct page *page, size_t size)
{
	struct page *e = page + (size >> PAGE_SHIFT);

	while (page < e) {
		__free_page(page);
		page++;
	}
}

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#ifdef CONFIG_MMU
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static void *__alloc_from_contiguous(struct device *dev, size_t size,
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				     pgprot_t prot, struct page **ret_page,
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				     const void *caller, bool want_vaddr);
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static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
				 pgprot_t prot, struct page **ret_page,
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				 const void *caller, bool want_vaddr);
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static void *
__dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
	const void *caller)
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{
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	/*
	 * DMA allocation can be mapped to user space, so lets
	 * set VM_USERMAP flags too.
	 */
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	return dma_common_contiguous_remap(page, size,
			VM_ARM_DMA_CONSISTENT | VM_USERMAP,
			prot, caller);
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}
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static void __dma_free_remap(void *cpu_addr, size_t size)
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{
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	dma_common_free_remap(cpu_addr, size,
			VM_ARM_DMA_CONSISTENT | VM_USERMAP);
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}

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#define DEFAULT_DMA_COHERENT_POOL_SIZE	SZ_256K
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static struct gen_pool *atomic_pool;
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static size_t atomic_pool_size = DEFAULT_DMA_COHERENT_POOL_SIZE;
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static int __init early_coherent_pool(char *p)
{
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	atomic_pool_size = memparse(p, &p);
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	return 0;
}
early_param("coherent_pool", early_coherent_pool);

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void __init init_dma_coherent_pool_size(unsigned long size)
{
	/*
	 * Catch any attempt to set the pool size too late.
	 */
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	BUG_ON(atomic_pool);
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	/*
	 * Set architecture specific coherent pool size only if
	 * it has not been changed by kernel command line parameter.
	 */
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	if (atomic_pool_size == DEFAULT_DMA_COHERENT_POOL_SIZE)
		atomic_pool_size = size;
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}

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/*
 * Initialise the coherent pool for atomic allocations.
 */
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static int __init atomic_pool_init(void)
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{
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	pgprot_t prot = pgprot_dmacoherent(PAGE_KERNEL);
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	gfp_t gfp = GFP_KERNEL | GFP_DMA;
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	struct page *page;
	void *ptr;

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	atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
	if (!atomic_pool)
		goto out;
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	if (dev_get_cma_area(NULL))
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		ptr = __alloc_from_contiguous(NULL, atomic_pool_size, prot,
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					      &page, atomic_pool_init, true);
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	else
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		ptr = __alloc_remap_buffer(NULL, atomic_pool_size, gfp, prot,
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					   &page, atomic_pool_init, true);
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	if (ptr) {
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		int ret;

		ret = gen_pool_add_virt(atomic_pool, (unsigned long)ptr,
					page_to_phys(page),
					atomic_pool_size, -1);
		if (ret)
			goto destroy_genpool;

		gen_pool_set_algo(atomic_pool,
				gen_pool_first_fit_order_align,
				(void *)PAGE_SHIFT);
		pr_info("DMA: preallocated %zd KiB pool for atomic coherent allocations\n",
		       atomic_pool_size / 1024);
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		return 0;
	}
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destroy_genpool:
	gen_pool_destroy(atomic_pool);
	atomic_pool = NULL;
out:
	pr_err("DMA: failed to allocate %zx KiB pool for atomic coherent allocation\n",
	       atomic_pool_size / 1024);
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	return -ENOMEM;
}
/*
 * CMA is activated by core_initcall, so we must be called after it.
 */
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postcore_initcall(atomic_pool_init);
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struct dma_contig_early_reserve {
	phys_addr_t base;
	unsigned long size;
};

static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;

static int dma_mmu_remap_num __initdata;

void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
{
	dma_mmu_remap[dma_mmu_remap_num].base = base;
	dma_mmu_remap[dma_mmu_remap_num].size = size;
	dma_mmu_remap_num++;
}

void __init dma_contiguous_remap(void)
{
	int i;
	for (i = 0; i < dma_mmu_remap_num; i++) {
		phys_addr_t start = dma_mmu_remap[i].base;
		phys_addr_t end = start + dma_mmu_remap[i].size;
		struct map_desc map;
		unsigned long addr;

		if (end > arm_lowmem_limit)
			end = arm_lowmem_limit;
		if (start >= end)
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			continue;
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		map.pfn = __phys_to_pfn(start);
		map.virtual = __phys_to_virt(start);
		map.length = end - start;
		map.type = MT_MEMORY_DMA_READY;

		/*
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		 * Clear previous low-memory mapping to ensure that the
		 * TLB does not see any conflicting entries, then flush
		 * the TLB of the old entries before creating new mappings.
		 *
		 * This ensures that any speculatively loaded TLB entries
		 * (even though they may be rare) can not cause any problems,
		 * and ensures that this code is architecturally compliant.
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		 */
		for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
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		     addr += PMD_SIZE)
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			pmd_clear(pmd_off_k(addr));

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		flush_tlb_kernel_range(__phys_to_virt(start),
				       __phys_to_virt(end));

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		iotable_init(&map, 1);
	}
}

static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
			    void *data)
{
	struct page *page = virt_to_page(addr);
	pgprot_t prot = *(pgprot_t *)data;

	set_pte_ext(pte, mk_pte(page, prot), 0);
	return 0;
}

static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
{
	unsigned long start = (unsigned long) page_address(page);
	unsigned end = start + size;

	apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
	flush_tlb_kernel_range(start, end);
}

static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
				 pgprot_t prot, struct page **ret_page,
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				 const void *caller, bool want_vaddr)
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{
	struct page *page;
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	void *ptr = NULL;
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	page = __dma_alloc_buffer(dev, size, gfp);
	if (!page)
		return NULL;
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	if (!want_vaddr)
		goto out;
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	ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
	if (!ptr) {
		__dma_free_buffer(page, size);
		return NULL;
	}

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 out:
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	*ret_page = page;
	return ptr;
}

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static void *__alloc_from_pool(size_t size, struct page **ret_page)
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{
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	unsigned long val;
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	void *ptr = NULL;
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	if (!atomic_pool) {
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		WARN(1, "coherent pool not initialised!\n");
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		return NULL;
	}

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	val = gen_pool_alloc(atomic_pool, size);
	if (val) {
		phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);

		*ret_page = phys_to_page(phys);
		ptr = (void *)val;
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	}
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	return ptr;
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}

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static bool __in_atomic_pool(void *start, size_t size)
{
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	return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
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}

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static int __free_from_pool(void *start, size_t size)
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{
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	if (!__in_atomic_pool(start, size))
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		return 0;

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	gen_pool_free(atomic_pool, (unsigned long)start, size);
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	return 1;
}

static void *__alloc_from_contiguous(struct device *dev, size_t size,
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				     pgprot_t prot, struct page **ret_page,
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				     const void *caller, bool want_vaddr)
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{
	unsigned long order = get_order(size);
	size_t count = size >> PAGE_SHIFT;
	struct page *page;
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	void *ptr = NULL;
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	page = dma_alloc_from_contiguous(dev, count, order);
	if (!page)
		return NULL;

	__dma_clear_buffer(page, size);

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	if (!want_vaddr)
		goto out;

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	if (PageHighMem(page)) {
		ptr = __dma_alloc_remap(page, size, GFP_KERNEL, prot, caller);
		if (!ptr) {
			dma_release_from_contiguous(dev, page, count);
			return NULL;
		}
	} else {
		__dma_remap(page, size, prot);
		ptr = page_address(page);
	}
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 out:
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	*ret_page = page;
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	return ptr;
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}

static void __free_from_contiguous(struct device *dev, struct page *page,
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				   void *cpu_addr, size_t size, bool want_vaddr)
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{
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	if (want_vaddr) {
		if (PageHighMem(page))
			__dma_free_remap(cpu_addr, size);
		else
			__dma_remap(page, size, PAGE_KERNEL);
	}
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	dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
}

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static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot)
{
	prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?
			    pgprot_writecombine(prot) :
			    pgprot_dmacoherent(prot);
	return prot;
}

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#define nommu() 0

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#else	/* !CONFIG_MMU */
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#define nommu() 1

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#define __get_dma_pgprot(attrs, prot)				__pgprot(0)
#define __alloc_remap_buffer(dev, size, gfp, prot, ret, c, wv)	NULL
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#define __alloc_from_pool(size, ret_page)			NULL
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#define __alloc_from_contiguous(dev, size, prot, ret, c, wv)	NULL
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#define __free_from_pool(cpu_addr, size)			0
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#define __free_from_contiguous(dev, page, cpu_addr, size, wv)	do { } while (0)
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#define __dma_free_remap(cpu_addr, size)			do { } while (0)
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#endif	/* CONFIG_MMU */

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static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
				   struct page **ret_page)
603
{
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	struct page *page;
	page = __dma_alloc_buffer(dev, size, gfp);
	if (!page)
		return NULL;

	*ret_page = page;
	return page_address(page);
}



static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
616 617
			 gfp_t gfp, pgprot_t prot, bool is_coherent,
			 struct dma_attrs *attrs, const void *caller)
618 619
{
	u64 mask = get_coherent_dma_mask(dev);
620
	struct page *page = NULL;
621
	void *addr;
622
	bool want_vaddr;
623

624 625 626 627 628 629 630 631 632 633 634 635 636 637 638
#ifdef CONFIG_DMA_API_DEBUG
	u64 limit = (mask + 1) & ~mask;
	if (limit && size >= limit) {
		dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
			size, mask);
		return NULL;
	}
#endif

	if (!mask)
		return NULL;

	if (mask < 0xffffffffULL)
		gfp |= GFP_DMA;

639 640 641 642 643 644 645 646 647
	/*
	 * Following is a work-around (a.k.a. hack) to prevent pages
	 * with __GFP_COMP being passed to split_page() which cannot
	 * handle them.  The real problem is that this flag probably
	 * should be 0 on ARM as it is not supported on this
	 * platform; see CONFIG_HUGETLBFS.
	 */
	gfp &= ~(__GFP_COMP);

648
	*handle = DMA_ERROR_CODE;
649
	size = PAGE_ALIGN(size);
650
	want_vaddr = !dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs);
651

R
Rob Herring 已提交
652
	if (is_coherent || nommu())
653
		addr = __alloc_simple_buffer(dev, size, gfp, &page);
654
	else if (!(gfp & __GFP_WAIT))
655
		addr = __alloc_from_pool(size, &page);
656
	else if (!dev_get_cma_area(dev))
657
		addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller, want_vaddr);
658
	else
659
		addr = __alloc_from_contiguous(dev, size, prot, &page, caller, want_vaddr);
660

661
	if (page)
662
		*handle = pfn_to_dma(dev, page_to_pfn(page));
663

664
	return want_vaddr ? addr : page;
665
}
L
Linus Torvalds 已提交
666 667 668 669 670

/*
 * Allocate DMA-coherent memory space and return both the kernel remapped
 * virtual and bus address for that space.
 */
671 672
void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
		    gfp_t gfp, struct dma_attrs *attrs)
L
Linus Torvalds 已提交
673
{
674
	pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
675 676 677 678 679
	void *memory;

	if (dma_alloc_from_coherent(dev, size, handle, &memory))
		return memory;

R
Rob Herring 已提交
680
	return __dma_alloc(dev, size, handle, gfp, prot, false,
681
			   attrs, __builtin_return_address(0));
R
Rob Herring 已提交
682 683 684 685 686
}

static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
	dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
{
687
	pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
R
Rob Herring 已提交
688 689 690 691 692 693
	void *memory;

	if (dma_alloc_from_coherent(dev, size, handle, &memory))
		return memory;

	return __dma_alloc(dev, size, handle, gfp, prot, true,
694
			   attrs, __builtin_return_address(0));
L
Linus Torvalds 已提交
695 696
}

697
static int __arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
698 699
		 void *cpu_addr, dma_addr_t dma_addr, size_t size,
		 struct dma_attrs *attrs)
L
Linus Torvalds 已提交
700
{
701 702
	int ret = -ENXIO;
#ifdef CONFIG_MMU
703 704
	unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
	unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
705
	unsigned long pfn = dma_to_pfn(dev, dma_addr);
706 707
	unsigned long off = vma->vm_pgoff;

708 709 710
	if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
		return ret;

711 712 713 714 715 716
	if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
		ret = remap_pfn_range(vma, vma->vm_start,
				      pfn + off,
				      vma->vm_end - vma->vm_start,
				      vma->vm_page_prot);
	}
717
#endif	/* CONFIG_MMU */
L
Linus Torvalds 已提交
718 719 720 721

	return ret;
}

722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741
/*
 * Create userspace mapping for the DMA-coherent memory.
 */
static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
		 void *cpu_addr, dma_addr_t dma_addr, size_t size,
		 struct dma_attrs *attrs)
{
	return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
}

int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
		 void *cpu_addr, dma_addr_t dma_addr, size_t size,
		 struct dma_attrs *attrs)
{
#ifdef CONFIG_MMU
	vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
#endif	/* CONFIG_MMU */
	return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
}

L
Linus Torvalds 已提交
742
/*
743
 * Free a buffer as defined by the above mapping.
L
Linus Torvalds 已提交
744
 */
R
Rob Herring 已提交
745 746 747
static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
			   dma_addr_t handle, struct dma_attrs *attrs,
			   bool is_coherent)
L
Linus Torvalds 已提交
748
{
749
	struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
750
	bool want_vaddr = !dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs);
751

752 753 754
	if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
		return;

755 756
	size = PAGE_ALIGN(size);

R
Rob Herring 已提交
757
	if (is_coherent || nommu()) {
758
		__dma_free_buffer(page, size);
759 760
	} else if (__free_from_pool(cpu_addr, size)) {
		return;
761
	} else if (!dev_get_cma_area(dev)) {
762 763
		if (want_vaddr)
			__dma_free_remap(cpu_addr, size);
764 765 766 767 768 769
		__dma_free_buffer(page, size);
	} else {
		/*
		 * Non-atomic allocations cannot be freed with IRQs disabled
		 */
		WARN_ON(irqs_disabled());
770
		__free_from_contiguous(dev, page, cpu_addr, size, want_vaddr);
771
	}
L
Linus Torvalds 已提交
772
}
773

R
Rob Herring 已提交
774 775 776 777 778 779 780 781 782 783 784 785
void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
		  dma_addr_t handle, struct dma_attrs *attrs)
{
	__arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
}

static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
				  dma_addr_t handle, struct dma_attrs *attrs)
{
	__arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
}

786 787 788 789 790 791 792 793 794 795 796 797 798 799 800
int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
		 void *cpu_addr, dma_addr_t handle, size_t size,
		 struct dma_attrs *attrs)
{
	struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
	int ret;

	ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
	if (unlikely(ret))
		return ret;

	sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
	return 0;
}

801
static void dma_cache_maint_page(struct page *page, unsigned long offset,
802 803
	size_t size, enum dma_data_direction dir,
	void (*op)(const void *, size_t, int))
804
{
805 806 807 808 809 810
	unsigned long pfn;
	size_t left = size;

	pfn = page_to_pfn(page) + offset / PAGE_SIZE;
	offset %= PAGE_SIZE;

811 812 813 814 815 816 817 818
	/*
	 * A single sg entry may refer to multiple physically contiguous
	 * pages.  But we still need to process highmem pages individually.
	 * If highmem is not configured then the bulk of this loop gets
	 * optimized out.
	 */
	do {
		size_t len = left;
819 820
		void *vaddr;

821 822
		page = pfn_to_page(pfn);

823
		if (PageHighMem(page)) {
824
			if (len + offset > PAGE_SIZE)
825
				len = PAGE_SIZE - offset;
826 827

			if (cache_is_vipt_nonaliasing()) {
828
				vaddr = kmap_atomic(page);
829
				op(vaddr + offset, len, dir);
830
				kunmap_atomic(vaddr);
831 832 833 834 835 836
			} else {
				vaddr = kmap_high_get(page);
				if (vaddr) {
					op(vaddr + offset, len, dir);
					kunmap_high(page);
				}
837
			}
838 839
		} else {
			vaddr = page_address(page) + offset;
840
			op(vaddr, len, dir);
841 842
		}
		offset = 0;
843
		pfn++;
844 845 846
		left -= len;
	} while (left);
}
847

848 849 850 851 852 853 854
/*
 * Make an area consistent for devices.
 * Note: Drivers should NOT use this function directly, as it will break
 * platforms with CONFIG_DMABOUNCE.
 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
 */
static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
855 856
	size_t size, enum dma_data_direction dir)
{
857
	phys_addr_t paddr;
858

859
	dma_cache_maint_page(page, off, size, dir, dmac_map_area);
860 861

	paddr = page_to_phys(page) + off;
862 863 864 865 866 867
	if (dir == DMA_FROM_DEVICE) {
		outer_inv_range(paddr, paddr + size);
	} else {
		outer_clean_range(paddr, paddr + size);
	}
	/* FIXME: non-speculating: flush on bidirectional mappings? */
868 869
}

870
static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
871 872
	size_t size, enum dma_data_direction dir)
{
873
	phys_addr_t paddr = page_to_phys(page) + off;
874 875

	/* FIXME: non-speculating: not required */
876 877
	/* in any case, don't bother invalidating if DMA to device */
	if (dir != DMA_TO_DEVICE) {
878 879
		outer_inv_range(paddr, paddr + size);

880 881
		dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
	}
882 883

	/*
884
	 * Mark the D-cache clean for these pages to avoid extra flushing.
885
	 */
886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901
	if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
		unsigned long pfn;
		size_t left = size;

		pfn = page_to_pfn(page) + off / PAGE_SIZE;
		off %= PAGE_SIZE;
		if (off) {
			pfn++;
			left -= PAGE_SIZE - off;
		}
		while (left >= PAGE_SIZE) {
			page = pfn_to_page(pfn++);
			set_bit(PG_dcache_clean, &page->flags);
			left -= PAGE_SIZE;
		}
	}
902
}
903

904
/**
905
 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
906 907 908 909 910 911 912 913 914 915 916 917 918 919
 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 * @sg: list of buffers
 * @nents: number of buffers to map
 * @dir: DMA transfer direction
 *
 * Map a set of buffers described by scatterlist in streaming mode for DMA.
 * This is the scatter-gather version of the dma_map_single interface.
 * Here the scatter gather list elements are each tagged with the
 * appropriate dma address and length.  They are obtained via
 * sg_dma_{address,length}.
 *
 * Device ownership issues as mentioned for dma_map_single are the same
 * here.
 */
920 921
int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
		enum dma_data_direction dir, struct dma_attrs *attrs)
922
{
923
	struct dma_map_ops *ops = get_dma_ops(dev);
924
	struct scatterlist *s;
925
	int i, j;
926 927

	for_each_sg(sg, s, nents, i) {
928 929 930
#ifdef CONFIG_NEED_SG_DMA_LENGTH
		s->dma_length = s->length;
#endif
931 932
		s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
						s->length, dir, attrs);
933 934
		if (dma_mapping_error(dev, s->dma_address))
			goto bad_mapping;
935 936
	}
	return nents;
937 938 939

 bad_mapping:
	for_each_sg(sg, s, i, j)
940
		ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
941
	return 0;
942 943 944
}

/**
945
 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
946 947
 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 * @sg: list of buffers
948
 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
949 950 951 952 953
 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 *
 * Unmap a set of streaming mode DMA translations.  Again, CPU access
 * rules concerning calls here are the same as for dma_unmap_single().
 */
954 955
void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
		enum dma_data_direction dir, struct dma_attrs *attrs)
956
{
957
	struct dma_map_ops *ops = get_dma_ops(dev);
958 959 960
	struct scatterlist *s;

	int i;
961

962
	for_each_sg(sg, s, nents, i)
963
		ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
964 965 966
}

/**
967
 * arm_dma_sync_sg_for_cpu
968 969 970 971 972
 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 * @sg: list of buffers
 * @nents: number of buffers to map (returned from dma_map_sg)
 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 */
973
void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
974 975
			int nents, enum dma_data_direction dir)
{
976
	struct dma_map_ops *ops = get_dma_ops(dev);
977 978 979
	struct scatterlist *s;
	int i;

980 981 982
	for_each_sg(sg, s, nents, i)
		ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
					 dir);
983 984 985
}

/**
986
 * arm_dma_sync_sg_for_device
987 988 989 990 991
 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 * @sg: list of buffers
 * @nents: number of buffers to map (returned from dma_map_sg)
 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 */
992
void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
993 994
			int nents, enum dma_data_direction dir)
{
995
	struct dma_map_ops *ops = get_dma_ops(dev);
996 997 998
	struct scatterlist *s;
	int i;

999 1000 1001
	for_each_sg(sg, s, nents, i)
		ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
					    dir);
1002
}
1003

1004 1005 1006 1007 1008 1009 1010 1011
/*
 * Return whether the given device DMA address mask can be supported
 * properly.  For example, if your device can only drive the low 24-bits
 * during bus mastering, then you would pass 0x00ffffff as the mask
 * to this function.
 */
int dma_supported(struct device *dev, u64 mask)
{
1012
	return __dma_supported(dev, mask, false);
1013 1014 1015
}
EXPORT_SYMBOL(dma_supported);

1016
int arm_dma_set_mask(struct device *dev, u64 dma_mask)
1017 1018 1019 1020 1021 1022 1023 1024 1025
{
	if (!dev->dma_mask || !dma_supported(dev, dma_mask))
		return -EIO;

	*dev->dma_mask = dma_mask;

	return 0;
}

1026 1027 1028 1029 1030 1031 1032 1033
#define PREALLOC_DMA_DEBUG_ENTRIES	4096

static int __init dma_debug_do_init(void)
{
	dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
	return 0;
}
fs_initcall(dma_debug_do_init);
1034 1035 1036 1037 1038

#ifdef CONFIG_ARM_DMA_USE_IOMMU

/* IOMMU */

1039 1040
static int extend_iommu_mapping(struct dma_iommu_mapping *mapping);

1041 1042 1043 1044 1045 1046
static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
				      size_t size)
{
	unsigned int order = get_order(size);
	unsigned int align = 0;
	unsigned int count, start;
1047
	size_t mapping_size = mapping->bits << PAGE_SHIFT;
1048
	unsigned long flags;
1049 1050
	dma_addr_t iova;
	int i;
1051

1052 1053 1054
	if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
		order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;

1055 1056
	count = PAGE_ALIGN(size) >> PAGE_SHIFT;
	align = (1 << order) - 1;
1057 1058

	spin_lock_irqsave(&mapping->lock, flags);
1059 1060 1061 1062 1063 1064 1065 1066 1067
	for (i = 0; i < mapping->nr_bitmaps; i++) {
		start = bitmap_find_next_zero_area(mapping->bitmaps[i],
				mapping->bits, 0, count, align);

		if (start > mapping->bits)
			continue;

		bitmap_set(mapping->bitmaps[i], start, count);
		break;
1068 1069
	}

1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090
	/*
	 * No unused range found. Try to extend the existing mapping
	 * and perform a second attempt to reserve an IO virtual
	 * address range of size bytes.
	 */
	if (i == mapping->nr_bitmaps) {
		if (extend_iommu_mapping(mapping)) {
			spin_unlock_irqrestore(&mapping->lock, flags);
			return DMA_ERROR_CODE;
		}

		start = bitmap_find_next_zero_area(mapping->bitmaps[i],
				mapping->bits, 0, count, align);

		if (start > mapping->bits) {
			spin_unlock_irqrestore(&mapping->lock, flags);
			return DMA_ERROR_CODE;
		}

		bitmap_set(mapping->bitmaps[i], start, count);
	}
1091 1092
	spin_unlock_irqrestore(&mapping->lock, flags);

1093
	iova = mapping->base + (mapping_size * i);
1094
	iova += start << PAGE_SHIFT;
1095 1096

	return iova;
1097 1098 1099 1100 1101
}

static inline void __free_iova(struct dma_iommu_mapping *mapping,
			       dma_addr_t addr, size_t size)
{
1102
	unsigned int start, count;
1103
	size_t mapping_size = mapping->bits << PAGE_SHIFT;
1104
	unsigned long flags;
1105 1106 1107 1108 1109 1110
	dma_addr_t bitmap_base;
	u32 bitmap_index;

	if (!size)
		return;

1111
	bitmap_index = (u32) (addr - mapping->base) / (u32) mapping_size;
1112 1113
	BUG_ON(addr < mapping->base || bitmap_index > mapping->extensions);

1114
	bitmap_base = mapping->base + mapping_size * bitmap_index;
1115

1116
	start = (addr - bitmap_base) >>	PAGE_SHIFT;
1117

1118
	if (addr + size > bitmap_base + mapping_size) {
1119 1120 1121 1122 1123 1124 1125 1126
		/*
		 * The address range to be freed reaches into the iova
		 * range of the next bitmap. This should not happen as
		 * we don't allow this in __alloc_iova (at the
		 * moment).
		 */
		BUG();
	} else
1127
		count = size >> PAGE_SHIFT;
1128 1129

	spin_lock_irqsave(&mapping->lock, flags);
1130
	bitmap_clear(mapping->bitmaps[bitmap_index], start, count);
1131 1132 1133
	spin_unlock_irqrestore(&mapping->lock, flags);
}

1134 1135
static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
					  gfp_t gfp, struct dma_attrs *attrs)
1136 1137 1138 1139 1140 1141 1142
{
	struct page **pages;
	int count = size >> PAGE_SHIFT;
	int array_size = count * sizeof(struct page *);
	int i = 0;

	if (array_size <= PAGE_SIZE)
1143
		pages = kzalloc(array_size, GFP_KERNEL);
1144 1145 1146 1147 1148
	else
		pages = vzalloc(array_size);
	if (!pages)
		return NULL;

1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165
	if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs))
	{
		unsigned long order = get_order(size);
		struct page *page;

		page = dma_alloc_from_contiguous(dev, count, order);
		if (!page)
			goto error;

		__dma_clear_buffer(page, size);

		for (i = 0; i < count; i++)
			pages[i] = page + i;

		return pages;
	}

1166 1167 1168 1169 1170
	/*
	 * IOMMU can map any pages, so himem can also be used here
	 */
	gfp |= __GFP_NOWARN | __GFP_HIGHMEM;

1171
	while (count) {
1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183
		int j, order;

		for (order = __fls(count); order > 0; --order) {
			/*
			 * We do not want OOM killer to be invoked as long
			 * as we can fall back to single pages, so we force
			 * __GFP_NORETRY for orders higher than zero.
			 */
			pages[i] = alloc_pages(gfp | __GFP_NORETRY, order);
			if (pages[i])
				break;
		}
1184

1185 1186 1187 1188 1189 1190 1191 1192 1193
		if (!pages[i]) {
			/*
			 * Fall back to single page allocation.
			 * Might invoke OOM killer as last resort.
			 */
			pages[i] = alloc_pages(gfp, 0);
			if (!pages[i])
				goto error;
		}
1194

1195
		if (order) {
1196
			split_page(pages[i], order);
1197 1198 1199 1200
			j = 1 << order;
			while (--j)
				pages[i + j] = pages[i] + j;
		}
1201 1202 1203 1204 1205 1206 1207 1208

		__dma_clear_buffer(pages[i], PAGE_SIZE << order);
		i += 1 << order;
		count -= 1 << order;
	}

	return pages;
error:
1209
	while (i--)
1210 1211
		if (pages[i])
			__free_pages(pages[i], 0);
1212
	if (array_size <= PAGE_SIZE)
1213 1214 1215 1216 1217 1218
		kfree(pages);
	else
		vfree(pages);
	return NULL;
}

1219 1220
static int __iommu_free_buffer(struct device *dev, struct page **pages,
			       size_t size, struct dma_attrs *attrs)
1221 1222 1223 1224
{
	int count = size >> PAGE_SHIFT;
	int array_size = count * sizeof(struct page *);
	int i;
1225 1226 1227 1228 1229 1230 1231 1232 1233

	if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs)) {
		dma_release_from_contiguous(dev, pages[0], count);
	} else {
		for (i = 0; i < count; i++)
			if (pages[i])
				__free_pages(pages[i], 0);
	}

1234
	if (array_size <= PAGE_SIZE)
1235 1236 1237 1238 1239 1240 1241 1242 1243 1244
		kfree(pages);
	else
		vfree(pages);
	return 0;
}

/*
 * Create a CPU mapping for a specified pages
 */
static void *
1245 1246
__iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
		    const void *caller)
1247
{
1248 1249
	return dma_common_pages_remap(pages, size,
			VM_ARM_DMA_CONSISTENT | VM_USERMAP, prot, caller);
1250 1251 1252 1253 1254 1255 1256 1257
}

/*
 * Create a mapping in device IO address space for specified pages
 */
static dma_addr_t
__iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
{
1258
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277
	unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
	dma_addr_t dma_addr, iova;
	int i, ret = DMA_ERROR_CODE;

	dma_addr = __alloc_iova(mapping, size);
	if (dma_addr == DMA_ERROR_CODE)
		return dma_addr;

	iova = dma_addr;
	for (i = 0; i < count; ) {
		unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
		phys_addr_t phys = page_to_phys(pages[i]);
		unsigned int len, j;

		for (j = i + 1; j < count; j++, next_pfn++)
			if (page_to_pfn(pages[j]) != next_pfn)
				break;

		len = (j - i) << PAGE_SHIFT;
1278 1279
		ret = iommu_map(mapping->domain, iova, phys, len,
				IOMMU_READ|IOMMU_WRITE);
1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293
		if (ret < 0)
			goto fail;
		iova += len;
		i = j;
	}
	return dma_addr;
fail:
	iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
	__free_iova(mapping, dma_addr, size);
	return DMA_ERROR_CODE;
}

static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
{
1294
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307

	/*
	 * add optional in-page offset from iova to size and align
	 * result to page size
	 */
	size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
	iova &= PAGE_MASK;

	iommu_unmap(mapping->domain, iova, size);
	__free_iova(mapping, iova, size);
	return 0;
}

1308 1309
static struct page **__atomic_get_pages(void *addr)
{
1310 1311 1312 1313 1314
	struct page *page;
	phys_addr_t phys;

	phys = gen_pool_virt_to_phys(atomic_pool, (unsigned long)addr);
	page = phys_to_page(phys);
1315

1316
	return (struct page **)page;
1317 1318
}

1319
static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
1320 1321 1322
{
	struct vm_struct *area;

1323 1324 1325
	if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
		return __atomic_get_pages(cpu_addr);

1326 1327 1328
	if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
		return cpu_addr;

1329 1330 1331 1332 1333 1334
	area = find_vm_area(cpu_addr);
	if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
		return area->pages;
	return NULL;
}

1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355
static void *__iommu_alloc_atomic(struct device *dev, size_t size,
				  dma_addr_t *handle)
{
	struct page *page;
	void *addr;

	addr = __alloc_from_pool(size, &page);
	if (!addr)
		return NULL;

	*handle = __iommu_create_mapping(dev, &page, size);
	if (*handle == DMA_ERROR_CODE)
		goto err_mapping;

	return addr;

err_mapping:
	__free_from_pool(addr, size);
	return NULL;
}

1356
static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1357 1358 1359
				dma_addr_t handle, size_t size)
{
	__iommu_remove_mapping(dev, handle, size);
1360
	__free_from_pool(cpu_addr, size);
1361 1362
}

1363 1364 1365
static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
	    dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
{
1366
	pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
1367 1368 1369 1370 1371 1372
	struct page **pages;
	void *addr = NULL;

	*handle = DMA_ERROR_CODE;
	size = PAGE_ALIGN(size);

1373
	if (!(gfp & __GFP_WAIT))
1374 1375
		return __iommu_alloc_atomic(dev, size, handle);

1376 1377 1378 1379 1380 1381 1382 1383 1384
	/*
	 * Following is a work-around (a.k.a. hack) to prevent pages
	 * with __GFP_COMP being passed to split_page() which cannot
	 * handle them.  The real problem is that this flag probably
	 * should be 0 on ARM as it is not supported on this
	 * platform; see CONFIG_HUGETLBFS.
	 */
	gfp &= ~(__GFP_COMP);

1385
	pages = __iommu_alloc_buffer(dev, size, gfp, attrs);
1386 1387 1388 1389 1390 1391 1392
	if (!pages)
		return NULL;

	*handle = __iommu_create_mapping(dev, pages, size);
	if (*handle == DMA_ERROR_CODE)
		goto err_buffer;

1393 1394 1395
	if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
		return pages;

1396 1397
	addr = __iommu_alloc_remap(pages, size, gfp, prot,
				   __builtin_return_address(0));
1398 1399 1400 1401 1402 1403 1404 1405
	if (!addr)
		goto err_mapping;

	return addr;

err_mapping:
	__iommu_remove_mapping(dev, *handle, size);
err_buffer:
1406
	__iommu_free_buffer(dev, pages, size, attrs);
1407 1408 1409 1410 1411 1412 1413
	return NULL;
}

static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
		    void *cpu_addr, dma_addr_t dma_addr, size_t size,
		    struct dma_attrs *attrs)
{
1414 1415
	unsigned long uaddr = vma->vm_start;
	unsigned long usize = vma->vm_end - vma->vm_start;
1416
	struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1417 1418 1419

	vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);

1420 1421
	if (!pages)
		return -ENXIO;
1422

1423 1424 1425 1426 1427 1428 1429 1430 1431
	do {
		int ret = vm_insert_page(vma, uaddr, *pages++);
		if (ret) {
			pr_err("Remapping memory failed: %d\n", ret);
			return ret;
		}
		uaddr += PAGE_SIZE;
		usize -= PAGE_SIZE;
	} while (usize > 0);
1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442

	return 0;
}

/*
 * free a page as defined by the above mapping.
 * Must not be called with IRQs disabled.
 */
void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
			  dma_addr_t handle, struct dma_attrs *attrs)
{
1443
	struct page **pages;
1444 1445
	size = PAGE_ALIGN(size);

1446 1447
	if (__in_atomic_pool(cpu_addr, size)) {
		__iommu_free_atomic(dev, cpu_addr, handle, size);
1448
		return;
1449
	}
1450

1451 1452 1453
	pages = __iommu_get_pages(cpu_addr, attrs);
	if (!pages) {
		WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1454 1455 1456
		return;
	}

1457
	if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) {
1458 1459
		dma_common_free_remap(cpu_addr, size,
			VM_ARM_DMA_CONSISTENT | VM_USERMAP);
1460
	}
1461 1462

	__iommu_remove_mapping(dev, handle, size);
1463
	__iommu_free_buffer(dev, pages, size, attrs);
1464 1465
}

1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477
static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
				 void *cpu_addr, dma_addr_t dma_addr,
				 size_t size, struct dma_attrs *attrs)
{
	unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
	struct page **pages = __iommu_get_pages(cpu_addr, attrs);

	if (!pages)
		return -ENXIO;

	return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
					 GFP_KERNEL);
1478 1479
}

1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500
static int __dma_direction_to_prot(enum dma_data_direction dir)
{
	int prot;

	switch (dir) {
	case DMA_BIDIRECTIONAL:
		prot = IOMMU_READ | IOMMU_WRITE;
		break;
	case DMA_TO_DEVICE:
		prot = IOMMU_READ;
		break;
	case DMA_FROM_DEVICE:
		prot = IOMMU_WRITE;
		break;
	default:
		prot = 0;
	}

	return prot;
}

1501 1502 1503 1504 1505
/*
 * Map a part of the scatter-gather list into contiguous io address space
 */
static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
			  size_t size, dma_addr_t *handle,
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Rob Herring 已提交
1506 1507
			  enum dma_data_direction dir, struct dma_attrs *attrs,
			  bool is_coherent)
1508
{
1509
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1510 1511 1512 1513
	dma_addr_t iova, iova_base;
	int ret = 0;
	unsigned int count;
	struct scatterlist *s;
1514
	int prot;
1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526

	size = PAGE_ALIGN(size);
	*handle = DMA_ERROR_CODE;

	iova_base = iova = __alloc_iova(mapping, size);
	if (iova == DMA_ERROR_CODE)
		return -ENOMEM;

	for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
		phys_addr_t phys = page_to_phys(sg_page(s));
		unsigned int len = PAGE_ALIGN(s->offset + s->length);

R
Rob Herring 已提交
1527 1528
		if (!is_coherent &&
			!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1529 1530
			__dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);

1531 1532 1533
		prot = __dma_direction_to_prot(dir);

		ret = iommu_map(mapping->domain, iova, phys, len, prot);
1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547
		if (ret < 0)
			goto fail;
		count += len >> PAGE_SHIFT;
		iova += len;
	}
	*handle = iova_base;

	return 0;
fail:
	iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
	__free_iova(mapping, iova_base, size);
	return ret;
}

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Rob Herring 已提交
1548 1549 1550
static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
		     enum dma_data_direction dir, struct dma_attrs *attrs,
		     bool is_coherent)
1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565
{
	struct scatterlist *s = sg, *dma = sg, *start = sg;
	int i, count = 0;
	unsigned int offset = s->offset;
	unsigned int size = s->offset + s->length;
	unsigned int max = dma_get_max_seg_size(dev);

	for (i = 1; i < nents; i++) {
		s = sg_next(s);

		s->dma_address = DMA_ERROR_CODE;
		s->dma_length = 0;

		if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
			if (__map_sg_chunk(dev, start, size, &dma->dma_address,
R
Rob Herring 已提交
1566
			    dir, attrs, is_coherent) < 0)
1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578
				goto bad_mapping;

			dma->dma_address += offset;
			dma->dma_length = size - offset;

			size = offset = s->offset;
			start = s;
			dma = sg_next(dma);
			count += 1;
		}
		size += s->length;
	}
R
Rob Herring 已提交
1579 1580
	if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
		is_coherent) < 0)
1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594
		goto bad_mapping;

	dma->dma_address += offset;
	dma->dma_length = size - offset;

	return count+1;

bad_mapping:
	for_each_sg(sg, s, count, i)
		__iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
	return 0;
}

/**
R
Rob Herring 已提交
1595
 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1596 1597
 * @dev: valid struct device pointer
 * @sg: list of buffers
R
Rob Herring 已提交
1598 1599
 * @nents: number of buffers to map
 * @dir: DMA transfer direction
1600
 *
R
Rob Herring 已提交
1601 1602 1603 1604
 * Map a set of i/o coherent buffers described by scatterlist in streaming
 * mode for DMA. The scatter gather list elements are merged together (if
 * possible) and tagged with the appropriate dma address and length. They are
 * obtained via sg_dma_{address,length}.
1605
 */
R
Rob Herring 已提交
1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632
int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
		int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
{
	return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
}

/**
 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
 * @dev: valid struct device pointer
 * @sg: list of buffers
 * @nents: number of buffers to map
 * @dir: DMA transfer direction
 *
 * Map a set of buffers described by scatterlist in streaming mode for DMA.
 * The scatter gather list elements are merged together (if possible) and
 * tagged with the appropriate dma address and length. They are obtained via
 * sg_dma_{address,length}.
 */
int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
		int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
{
	return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
}

static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
		int nents, enum dma_data_direction dir, struct dma_attrs *attrs,
		bool is_coherent)
1633 1634 1635 1636 1637 1638 1639 1640
{
	struct scatterlist *s;
	int i;

	for_each_sg(sg, s, nents, i) {
		if (sg_dma_len(s))
			__iommu_remove_mapping(dev, sg_dma_address(s),
					       sg_dma_len(s));
R
Rob Herring 已提交
1641
		if (!is_coherent &&
1642
		    !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1643 1644 1645 1646 1647
			__dma_page_dev_to_cpu(sg_page(s), s->offset,
					      s->length, dir);
	}
}

R
Rob Herring 已提交
1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679
/**
 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
 * @dev: valid struct device pointer
 * @sg: list of buffers
 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 *
 * Unmap a set of streaming mode DMA translations.  Again, CPU access
 * rules concerning calls here are the same as for dma_unmap_single().
 */
void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
		int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
{
	__iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
}

/**
 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
 * @dev: valid struct device pointer
 * @sg: list of buffers
 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 *
 * Unmap a set of streaming mode DMA translations.  Again, CPU access
 * rules concerning calls here are the same as for dma_unmap_single().
 */
void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
			enum dma_data_direction dir, struct dma_attrs *attrs)
{
	__iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
}

1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693
/**
 * arm_iommu_sync_sg_for_cpu
 * @dev: valid struct device pointer
 * @sg: list of buffers
 * @nents: number of buffers to map (returned from dma_map_sg)
 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 */
void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
			int nents, enum dma_data_direction dir)
{
	struct scatterlist *s;
	int i;

	for_each_sg(sg, s, nents, i)
R
Rob Herring 已提交
1694
		__dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711

}

/**
 * arm_iommu_sync_sg_for_device
 * @dev: valid struct device pointer
 * @sg: list of buffers
 * @nents: number of buffers to map (returned from dma_map_sg)
 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 */
void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
			int nents, enum dma_data_direction dir)
{
	struct scatterlist *s;
	int i;

	for_each_sg(sg, s, nents, i)
R
Rob Herring 已提交
1712
		__dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1713 1714 1715 1716
}


/**
R
Rob Herring 已提交
1717
 * arm_coherent_iommu_map_page
1718 1719 1720 1721 1722 1723
 * @dev: valid struct device pointer
 * @page: page that buffer resides in
 * @offset: offset into page for start of buffer
 * @size: size of buffer to map
 * @dir: DMA transfer direction
 *
R
Rob Herring 已提交
1724
 * Coherent IOMMU aware version of arm_dma_map_page()
1725
 */
R
Rob Herring 已提交
1726
static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1727 1728 1729
	     unsigned long offset, size_t size, enum dma_data_direction dir,
	     struct dma_attrs *attrs)
{
1730
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1731
	dma_addr_t dma_addr;
1732
	int ret, prot, len = PAGE_ALIGN(size + offset);
1733 1734 1735 1736 1737

	dma_addr = __alloc_iova(mapping, len);
	if (dma_addr == DMA_ERROR_CODE)
		return dma_addr;

1738
	prot = __dma_direction_to_prot(dir);
1739 1740

	ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, prot);
1741 1742 1743 1744 1745 1746 1747 1748 1749
	if (ret < 0)
		goto fail;

	return dma_addr + offset;
fail:
	__free_iova(mapping, dma_addr, len);
	return DMA_ERROR_CODE;
}

R
Rob Herring 已提交
1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782
/**
 * arm_iommu_map_page
 * @dev: valid struct device pointer
 * @page: page that buffer resides in
 * @offset: offset into page for start of buffer
 * @size: size of buffer to map
 * @dir: DMA transfer direction
 *
 * IOMMU aware version of arm_dma_map_page()
 */
static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
	     unsigned long offset, size_t size, enum dma_data_direction dir,
	     struct dma_attrs *attrs)
{
	if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
		__dma_page_cpu_to_dev(page, offset, size, dir);

	return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
}

/**
 * arm_coherent_iommu_unmap_page
 * @dev: valid struct device pointer
 * @handle: DMA address of buffer
 * @size: size of buffer (same as passed to dma_map_page)
 * @dir: DMA transfer direction (same as passed to dma_map_page)
 *
 * Coherent IOMMU aware version of arm_dma_unmap_page()
 */
static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
		size_t size, enum dma_data_direction dir,
		struct dma_attrs *attrs)
{
1783
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
R
Rob Herring 已提交
1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794
	dma_addr_t iova = handle & PAGE_MASK;
	int offset = handle & ~PAGE_MASK;
	int len = PAGE_ALIGN(size + offset);

	if (!iova)
		return;

	iommu_unmap(mapping->domain, iova, len);
	__free_iova(mapping, iova, len);
}

1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807
/**
 * arm_iommu_unmap_page
 * @dev: valid struct device pointer
 * @handle: DMA address of buffer
 * @size: size of buffer (same as passed to dma_map_page)
 * @dir: DMA transfer direction (same as passed to dma_map_page)
 *
 * IOMMU aware version of arm_dma_unmap_page()
 */
static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
		size_t size, enum dma_data_direction dir,
		struct dma_attrs *attrs)
{
1808
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1809 1810 1811 1812 1813 1814 1815 1816
	dma_addr_t iova = handle & PAGE_MASK;
	struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
	int offset = handle & ~PAGE_MASK;
	int len = PAGE_ALIGN(size + offset);

	if (!iova)
		return;

R
Rob Herring 已提交
1817
	if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1818 1819 1820 1821 1822 1823 1824 1825 1826
		__dma_page_dev_to_cpu(page, offset, size, dir);

	iommu_unmap(mapping->domain, iova, len);
	__free_iova(mapping, iova, len);
}

static void arm_iommu_sync_single_for_cpu(struct device *dev,
		dma_addr_t handle, size_t size, enum dma_data_direction dir)
{
1827
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1828 1829 1830 1831 1832 1833 1834
	dma_addr_t iova = handle & PAGE_MASK;
	struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
	unsigned int offset = handle & ~PAGE_MASK;

	if (!iova)
		return;

R
Rob Herring 已提交
1835
	__dma_page_dev_to_cpu(page, offset, size, dir);
1836 1837 1838 1839 1840
}

static void arm_iommu_sync_single_for_device(struct device *dev,
		dma_addr_t handle, size_t size, enum dma_data_direction dir)
{
1841
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855
	dma_addr_t iova = handle & PAGE_MASK;
	struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
	unsigned int offset = handle & ~PAGE_MASK;

	if (!iova)
		return;

	__dma_page_cpu_to_dev(page, offset, size, dir);
}

struct dma_map_ops iommu_ops = {
	.alloc		= arm_iommu_alloc_attrs,
	.free		= arm_iommu_free_attrs,
	.mmap		= arm_iommu_mmap_attrs,
1856
	.get_sgtable	= arm_iommu_get_sgtable,
1857 1858 1859 1860 1861 1862 1863 1864 1865 1866

	.map_page		= arm_iommu_map_page,
	.unmap_page		= arm_iommu_unmap_page,
	.sync_single_for_cpu	= arm_iommu_sync_single_for_cpu,
	.sync_single_for_device	= arm_iommu_sync_single_for_device,

	.map_sg			= arm_iommu_map_sg,
	.unmap_sg		= arm_iommu_unmap_sg,
	.sync_sg_for_cpu	= arm_iommu_sync_sg_for_cpu,
	.sync_sg_for_device	= arm_iommu_sync_sg_for_device,
1867 1868

	.set_dma_mask		= arm_dma_set_mask,
1869 1870
};

R
Rob Herring 已提交
1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881
struct dma_map_ops iommu_coherent_ops = {
	.alloc		= arm_iommu_alloc_attrs,
	.free		= arm_iommu_free_attrs,
	.mmap		= arm_iommu_mmap_attrs,
	.get_sgtable	= arm_iommu_get_sgtable,

	.map_page	= arm_coherent_iommu_map_page,
	.unmap_page	= arm_coherent_iommu_unmap_page,

	.map_sg		= arm_coherent_iommu_map_sg,
	.unmap_sg	= arm_coherent_iommu_unmap_sg,
1882 1883

	.set_dma_mask	= arm_dma_set_mask,
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Rob Herring 已提交
1884 1885
};

1886 1887 1888 1889
/**
 * arm_iommu_create_mapping
 * @bus: pointer to the bus holding the client device (for IOMMU calls)
 * @base: start address of the valid IO address space
1890
 * @size: maximum size of the valid IO address space
1891 1892 1893 1894 1895 1896 1897 1898 1899
 *
 * Creates a mapping structure which holds information about used/unused
 * IO address ranges, which is required to perform memory allocation and
 * mapping with IOMMU aware functions.
 *
 * The client device need to be attached to the mapping with
 * arm_iommu_attach_device function.
 */
struct dma_iommu_mapping *
1900
arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size)
1901
{
1902 1903
	unsigned int bits = size >> PAGE_SHIFT;
	unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
1904
	struct dma_iommu_mapping *mapping;
1905
	int extensions = 1;
1906 1907
	int err = -ENOMEM;

1908 1909 1910 1911
	/* currently only 32-bit DMA address space is supported */
	if (size > DMA_BIT_MASK(32) + 1)
		return ERR_PTR(-ERANGE);

1912
	if (!bitmap_size)
1913 1914
		return ERR_PTR(-EINVAL);

1915 1916 1917 1918 1919
	if (bitmap_size > PAGE_SIZE) {
		extensions = bitmap_size / PAGE_SIZE;
		bitmap_size = PAGE_SIZE;
	}

1920 1921 1922 1923
	mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
	if (!mapping)
		goto err;

1924 1925
	mapping->bitmap_size = bitmap_size;
	mapping->bitmaps = kzalloc(extensions * sizeof(unsigned long *),
1926 1927
				GFP_KERNEL);
	if (!mapping->bitmaps)
1928 1929
		goto err2;

1930
	mapping->bitmaps[0] = kzalloc(bitmap_size, GFP_KERNEL);
1931 1932 1933 1934 1935
	if (!mapping->bitmaps[0])
		goto err3;

	mapping->nr_bitmaps = 1;
	mapping->extensions = extensions;
1936
	mapping->base = base;
1937
	mapping->bits = BITS_PER_BYTE * bitmap_size;
1938

1939 1940 1941 1942
	spin_lock_init(&mapping->lock);

	mapping->domain = iommu_domain_alloc(bus);
	if (!mapping->domain)
1943
		goto err4;
1944 1945 1946

	kref_init(&mapping->kref);
	return mapping;
1947 1948
err4:
	kfree(mapping->bitmaps[0]);
1949
err3:
1950
	kfree(mapping->bitmaps);
1951 1952 1953 1954 1955
err2:
	kfree(mapping);
err:
	return ERR_PTR(err);
}
1956
EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
1957 1958 1959

static void release_iommu_mapping(struct kref *kref)
{
1960
	int i;
1961 1962 1963 1964
	struct dma_iommu_mapping *mapping =
		container_of(kref, struct dma_iommu_mapping, kref);

	iommu_domain_free(mapping->domain);
1965 1966 1967
	for (i = 0; i < mapping->nr_bitmaps; i++)
		kfree(mapping->bitmaps[i]);
	kfree(mapping->bitmaps);
1968 1969 1970
	kfree(mapping);
}

1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988
static int extend_iommu_mapping(struct dma_iommu_mapping *mapping)
{
	int next_bitmap;

	if (mapping->nr_bitmaps > mapping->extensions)
		return -EINVAL;

	next_bitmap = mapping->nr_bitmaps;
	mapping->bitmaps[next_bitmap] = kzalloc(mapping->bitmap_size,
						GFP_ATOMIC);
	if (!mapping->bitmaps[next_bitmap])
		return -ENOMEM;

	mapping->nr_bitmaps++;

	return 0;
}

1989 1990 1991 1992 1993
void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
{
	if (mapping)
		kref_put(&mapping->kref, release_iommu_mapping);
}
1994
EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
1995

1996 1997 1998 1999 2000 2001 2002 2003 2004 2005
static int __arm_iommu_attach_device(struct device *dev,
				     struct dma_iommu_mapping *mapping)
{
	int err;

	err = iommu_attach_device(mapping->domain, dev);
	if (err)
		return err;

	kref_get(&mapping->kref);
2006
	to_dma_iommu_mapping(dev) = mapping;
2007 2008 2009 2010 2011

	pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
	return 0;
}

2012 2013 2014 2015 2016 2017
/**
 * arm_iommu_attach_device
 * @dev: valid struct device pointer
 * @mapping: io address space mapping structure (returned from
 *	arm_iommu_create_mapping)
 *
2018 2019 2020 2021
 * Attaches specified io address space mapping to the provided device.
 * This replaces the dma operations (dma_map_ops pointer) with the
 * IOMMU aware version.
 *
2022 2023
 * More than one client might be attached to the same io address space
 * mapping.
2024 2025 2026 2027 2028 2029
 */
int arm_iommu_attach_device(struct device *dev,
			    struct dma_iommu_mapping *mapping)
{
	int err;

2030
	err = __arm_iommu_attach_device(dev, mapping);
2031 2032 2033
	if (err)
		return err;

2034
	set_dma_ops(dev, &iommu_ops);
2035 2036
	return 0;
}
2037
EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
2038

2039
static void __arm_iommu_detach_device(struct device *dev)
2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050
{
	struct dma_iommu_mapping *mapping;

	mapping = to_dma_iommu_mapping(dev);
	if (!mapping) {
		dev_warn(dev, "Not attached\n");
		return;
	}

	iommu_detach_device(mapping->domain, dev);
	kref_put(&mapping->kref, release_iommu_mapping);
2051
	to_dma_iommu_mapping(dev) = NULL;
2052 2053 2054

	pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
}
2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067

/**
 * arm_iommu_detach_device
 * @dev: valid struct device pointer
 *
 * Detaches the provided device from a previously attached map.
 * This voids the dma operations (dma_map_ops pointer)
 */
void arm_iommu_detach_device(struct device *dev)
{
	__arm_iommu_detach_device(dev);
	set_dma_ops(dev, NULL);
}
2068
EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
2069

2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089
static struct dma_map_ops *arm_get_iommu_dma_map_ops(bool coherent)
{
	return coherent ? &iommu_coherent_ops : &iommu_ops;
}

static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
				    struct iommu_ops *iommu)
{
	struct dma_iommu_mapping *mapping;

	if (!iommu)
		return false;

	mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
	if (IS_ERR(mapping)) {
		pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
				size, dev_name(dev));
		return false;
	}

2090
	if (__arm_iommu_attach_device(dev, mapping)) {
2091 2092 2093 2094 2095 2096 2097 2098 2099 2100 2101
		pr_warn("Failed to attached device %s to IOMMU_mapping\n",
				dev_name(dev));
		arm_iommu_release_mapping(mapping);
		return false;
	}

	return true;
}

static void arm_teardown_iommu_dma_ops(struct device *dev)
{
2102
	struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2103

2104 2105 2106
	if (!mapping)
		return;

2107
	__arm_iommu_detach_device(dev);
2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134
	arm_iommu_release_mapping(mapping);
}

#else

static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
				    struct iommu_ops *iommu)
{
	return false;
}

static void arm_teardown_iommu_dma_ops(struct device *dev) { }

#define arm_get_iommu_dma_map_ops arm_get_dma_map_ops

#endif	/* CONFIG_ARM_DMA_USE_IOMMU */

static struct dma_map_ops *arm_get_dma_map_ops(bool coherent)
{
	return coherent ? &arm_coherent_dma_ops : &arm_dma_ops;
}

void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
			struct iommu_ops *iommu, bool coherent)
{
	struct dma_map_ops *dma_ops;

2135
	dev->archdata.dma_coherent = coherent;
2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147
	if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu))
		dma_ops = arm_get_iommu_dma_map_ops(coherent);
	else
		dma_ops = arm_get_dma_map_ops(coherent);

	set_dma_ops(dev, dma_ops);
}

void arch_teardown_dma_ops(struct device *dev)
{
	arm_teardown_iommu_dma_ops(dev);
}