book3s_pr.c 50.0 KB
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/*
 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
 *
 * Authors:
 *    Alexander Graf <agraf@suse.de>
 *    Kevin Wolf <mail@kevin-wolf.de>
 *    Paul Mackerras <paulus@samba.org>
 *
 * Description:
 * Functions relating to running KVM on Book 3S processors where
 * we don't have access to hypervisor mode, and we run the guest
 * in problem state (user mode).
 *
 * This file is derived from arch/powerpc/kvm/44x.c,
 * by Hollis Blanchard <hollisb@us.ibm.com>.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 */

#include <linux/kvm_host.h>
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#include <linux/export.h>
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#include <linux/err.h>
#include <linux/slab.h>

#include <asm/reg.h>
#include <asm/cputable.h>
#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
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#include <linux/uaccess.h>
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#include <asm/io.h>
#include <asm/kvm_ppc.h>
#include <asm/kvm_book3s.h>
#include <asm/mmu_context.h>
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#include <asm/switch_to.h>
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#include <asm/firmware.h>
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#include <asm/setup.h>
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#include <linux/gfp.h>
#include <linux/sched.h>
#include <linux/vmalloc.h>
#include <linux/highmem.h>
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#include <linux/module.h>
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#include <linux/miscdevice.h>
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#include <asm/asm-prototypes.h>
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#include <asm/tm.h>
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#include "book3s.h"
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#define CREATE_TRACE_POINTS
#include "trace_pr.h"
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/* #define EXIT_DEBUG */
/* #define DEBUG_EXT */

static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
			     ulong msr);
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static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac);
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/* Some compatibility defines */
#ifdef CONFIG_PPC_BOOK3S_32
#define MSR_USER32 MSR_USER
#define MSR_USER64 MSR_USER
#define HW_PAGE_SIZE PAGE_SIZE
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#define HPTE_R_M   _PAGE_COHERENT
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#endif

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static bool kvmppc_is_split_real(struct kvm_vcpu *vcpu)
{
	ulong msr = kvmppc_get_msr(vcpu);
	return (msr & (MSR_IR|MSR_DR)) == MSR_DR;
}

static void kvmppc_fixup_split_real(struct kvm_vcpu *vcpu)
{
	ulong msr = kvmppc_get_msr(vcpu);
	ulong pc = kvmppc_get_pc(vcpu);

	/* We are in DR only split real mode */
	if ((msr & (MSR_IR|MSR_DR)) != MSR_DR)
		return;

	/* We have not fixed up the guest already */
	if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK)
		return;

	/* The code is in fixupable address space */
	if (pc & SPLIT_HACK_MASK)
		return;

	vcpu->arch.hflags |= BOOK3S_HFLAG_SPLIT_HACK;
	kvmppc_set_pc(vcpu, pc | SPLIT_HACK_OFFS);
}

void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu);

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static void kvmppc_core_vcpu_load_pr(struct kvm_vcpu *vcpu, int cpu)
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{
#ifdef CONFIG_PPC_BOOK3S_64
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	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
	memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb));
	svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max;
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	svcpu->in_use = 0;
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	svcpu_put(svcpu);
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#endif
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	/* Disable AIL if supported */
	if (cpu_has_feature(CPU_FTR_HVMODE) &&
	    cpu_has_feature(CPU_FTR_ARCH_207S))
		mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~LPCR_AIL);

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	vcpu->cpu = smp_processor_id();
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#ifdef CONFIG_PPC_BOOK3S_32
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	current->thread.kvm_shadow_vcpu = vcpu->arch.shadow_vcpu;
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#endif
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	if (kvmppc_is_split_real(vcpu))
		kvmppc_fixup_split_real(vcpu);
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	kvmppc_restore_tm_pr(vcpu);
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}

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static void kvmppc_core_vcpu_put_pr(struct kvm_vcpu *vcpu)
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{
#ifdef CONFIG_PPC_BOOK3S_64
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	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
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	if (svcpu->in_use) {
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		kvmppc_copy_from_svcpu(vcpu);
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	}
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	memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb));
	to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max;
	svcpu_put(svcpu);
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#endif

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	if (kvmppc_is_split_real(vcpu))
		kvmppc_unfixup_split_real(vcpu);

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	kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);
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	kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
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	kvmppc_save_tm_pr(vcpu);
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	/* Enable AIL if supported */
	if (cpu_has_feature(CPU_FTR_HVMODE) &&
	    cpu_has_feature(CPU_FTR_ARCH_207S))
		mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_AIL_3);

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	vcpu->cpu = -1;
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}

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/* Copy data needed by real-mode code from vcpu to shadow vcpu */
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void kvmppc_copy_to_svcpu(struct kvm_vcpu *vcpu)
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{
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	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);

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	svcpu->gpr[0] = vcpu->arch.regs.gpr[0];
	svcpu->gpr[1] = vcpu->arch.regs.gpr[1];
	svcpu->gpr[2] = vcpu->arch.regs.gpr[2];
	svcpu->gpr[3] = vcpu->arch.regs.gpr[3];
	svcpu->gpr[4] = vcpu->arch.regs.gpr[4];
	svcpu->gpr[5] = vcpu->arch.regs.gpr[5];
	svcpu->gpr[6] = vcpu->arch.regs.gpr[6];
	svcpu->gpr[7] = vcpu->arch.regs.gpr[7];
	svcpu->gpr[8] = vcpu->arch.regs.gpr[8];
	svcpu->gpr[9] = vcpu->arch.regs.gpr[9];
	svcpu->gpr[10] = vcpu->arch.regs.gpr[10];
	svcpu->gpr[11] = vcpu->arch.regs.gpr[11];
	svcpu->gpr[12] = vcpu->arch.regs.gpr[12];
	svcpu->gpr[13] = vcpu->arch.regs.gpr[13];
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	svcpu->cr  = vcpu->arch.cr;
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	svcpu->xer = vcpu->arch.regs.xer;
	svcpu->ctr = vcpu->arch.regs.ctr;
	svcpu->lr  = vcpu->arch.regs.link;
	svcpu->pc  = vcpu->arch.regs.nip;
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#ifdef CONFIG_PPC_BOOK3S_64
	svcpu->shadow_fscr = vcpu->arch.shadow_fscr;
#endif
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	/*
	 * Now also save the current time base value. We use this
	 * to find the guest purr and spurr value.
	 */
	vcpu->arch.entry_tb = get_tb();
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	vcpu->arch.entry_vtb = get_vtb();
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	if (cpu_has_feature(CPU_FTR_ARCH_207S))
		vcpu->arch.entry_ic = mfspr(SPRN_IC);
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	svcpu->in_use = true;
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	svcpu_put(svcpu);
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}

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static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
{
	ulong guest_msr = kvmppc_get_msr(vcpu);
	ulong smsr = guest_msr;

	/* Guest MSR values */
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE |
		MSR_TM | MSR_TS_MASK;
#else
	smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE;
#endif
	/* Process MSR values */
	smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
	/* External providers the guest reserved */
	smsr |= (guest_msr & vcpu->arch.guest_owned_ext);
	/* 64-bit Process MSR values */
#ifdef CONFIG_PPC_BOOK3S_64
	smsr |= MSR_ISF | MSR_HV;
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#endif
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	/*
	 * in guest privileged state, we want to fail all TM transactions.
	 * So disable MSR TM bit so that all tbegin. will be able to be
	 * trapped into host.
	 */
	if (!(guest_msr & MSR_PR))
		smsr &= ~MSR_TM;
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#endif
	vcpu->arch.shadow_msr = smsr;
}

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/* Copy data touched by real-mode code from shadow vcpu back to vcpu */
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void kvmppc_copy_from_svcpu(struct kvm_vcpu *vcpu)
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{
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	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	ulong old_msr;
#endif
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	/*
	 * Maybe we were already preempted and synced the svcpu from
	 * our preempt notifiers. Don't bother touching this svcpu then.
	 */
	if (!svcpu->in_use)
		goto out;

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	vcpu->arch.regs.gpr[0] = svcpu->gpr[0];
	vcpu->arch.regs.gpr[1] = svcpu->gpr[1];
	vcpu->arch.regs.gpr[2] = svcpu->gpr[2];
	vcpu->arch.regs.gpr[3] = svcpu->gpr[3];
	vcpu->arch.regs.gpr[4] = svcpu->gpr[4];
	vcpu->arch.regs.gpr[5] = svcpu->gpr[5];
	vcpu->arch.regs.gpr[6] = svcpu->gpr[6];
	vcpu->arch.regs.gpr[7] = svcpu->gpr[7];
	vcpu->arch.regs.gpr[8] = svcpu->gpr[8];
	vcpu->arch.regs.gpr[9] = svcpu->gpr[9];
	vcpu->arch.regs.gpr[10] = svcpu->gpr[10];
	vcpu->arch.regs.gpr[11] = svcpu->gpr[11];
	vcpu->arch.regs.gpr[12] = svcpu->gpr[12];
	vcpu->arch.regs.gpr[13] = svcpu->gpr[13];
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	vcpu->arch.cr  = svcpu->cr;
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	vcpu->arch.regs.xer = svcpu->xer;
	vcpu->arch.regs.ctr = svcpu->ctr;
	vcpu->arch.regs.link  = svcpu->lr;
	vcpu->arch.regs.nip  = svcpu->pc;
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	vcpu->arch.shadow_srr1 = svcpu->shadow_srr1;
	vcpu->arch.fault_dar   = svcpu->fault_dar;
	vcpu->arch.fault_dsisr = svcpu->fault_dsisr;
	vcpu->arch.last_inst   = svcpu->last_inst;
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#ifdef CONFIG_PPC_BOOK3S_64
	vcpu->arch.shadow_fscr = svcpu->shadow_fscr;
#endif
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	/*
	 * Update purr and spurr using time base on exit.
	 */
	vcpu->arch.purr += get_tb() - vcpu->arch.entry_tb;
	vcpu->arch.spurr += get_tb() - vcpu->arch.entry_tb;
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	to_book3s(vcpu)->vtb += get_vtb() - vcpu->arch.entry_vtb;
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	if (cpu_has_feature(CPU_FTR_ARCH_207S))
		vcpu->arch.ic += mfspr(SPRN_IC) - vcpu->arch.entry_ic;
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	/*
	 * Unlike other MSR bits, MSR[TS]bits can be changed at guest without
	 * notifying host:
	 *  modified by unprivileged instructions like "tbegin"/"tend"/
	 * "tresume"/"tsuspend" in PR KVM guest.
	 *
	 * It is necessary to sync here to calculate a correct shadow_msr.
	 *
	 * privileged guest's tbegin will be failed at present. So we
	 * only take care of problem state guest.
	 */
	old_msr = kvmppc_get_msr(vcpu);
	if (unlikely((old_msr & MSR_PR) &&
		(vcpu->arch.shadow_srr1 & (MSR_TS_MASK)) !=
				(old_msr & (MSR_TS_MASK)))) {
		old_msr &= ~(MSR_TS_MASK);
		old_msr |= (vcpu->arch.shadow_srr1 & (MSR_TS_MASK));
		kvmppc_set_msr_fast(vcpu, old_msr);
		kvmppc_recalc_shadow_msr(vcpu);
	}
#endif

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	svcpu->in_use = false;

out:
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	svcpu_put(svcpu);
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}

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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
static inline void kvmppc_save_tm_sprs(struct kvm_vcpu *vcpu)
{
	tm_enable();
	vcpu->arch.tfhar = mfspr(SPRN_TFHAR);
	vcpu->arch.texasr = mfspr(SPRN_TEXASR);
	vcpu->arch.tfiar = mfspr(SPRN_TFIAR);
	tm_disable();
}

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void kvmppc_restore_tm_sprs(struct kvm_vcpu *vcpu)
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{
	tm_enable();
	mtspr(SPRN_TFHAR, vcpu->arch.tfhar);
	mtspr(SPRN_TEXASR, vcpu->arch.texasr);
	mtspr(SPRN_TFIAR, vcpu->arch.tfiar);
	tm_disable();
}

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/* loadup math bits which is enabled at kvmppc_get_msr() but not enabled at
 * hardware.
 */
static void kvmppc_handle_lost_math_exts(struct kvm_vcpu *vcpu)
{
	ulong exit_nr;
	ulong ext_diff = (kvmppc_get_msr(vcpu) & ~vcpu->arch.guest_owned_ext) &
		(MSR_FP | MSR_VEC | MSR_VSX);

	if (!ext_diff)
		return;

	if (ext_diff == MSR_FP)
		exit_nr = BOOK3S_INTERRUPT_FP_UNAVAIL;
	else if (ext_diff == MSR_VEC)
		exit_nr = BOOK3S_INTERRUPT_ALTIVEC;
	else
		exit_nr = BOOK3S_INTERRUPT_VSX;

	kvmppc_handle_ext(vcpu, exit_nr, ext_diff);
}

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void kvmppc_save_tm_pr(struct kvm_vcpu *vcpu)
{
	if (!(MSR_TM_ACTIVE(kvmppc_get_msr(vcpu)))) {
		kvmppc_save_tm_sprs(vcpu);
		return;
	}

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	kvmppc_giveup_ext(vcpu, MSR_VSX);

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	preempt_disable();
	_kvmppc_save_tm_pr(vcpu, mfmsr());
	preempt_enable();
}

void kvmppc_restore_tm_pr(struct kvm_vcpu *vcpu)
{
	if (!MSR_TM_ACTIVE(kvmppc_get_msr(vcpu))) {
		kvmppc_restore_tm_sprs(vcpu);
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		if (kvmppc_get_msr(vcpu) & MSR_TM)
			kvmppc_handle_lost_math_exts(vcpu);
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		return;
	}

	preempt_disable();
	_kvmppc_restore_tm_pr(vcpu, kvmppc_get_msr(vcpu));
	preempt_enable();
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	if (kvmppc_get_msr(vcpu) & MSR_TM)
		kvmppc_handle_lost_math_exts(vcpu);

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}
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#endif

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static int kvmppc_core_check_requests_pr(struct kvm_vcpu *vcpu)
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{
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	int r = 1; /* Indicate we want to get back into the guest */

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	/* We misuse TLB_FLUSH to indicate that we want to clear
	   all shadow cache entries */
	if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
		kvmppc_mmu_pte_flush(vcpu, 0, 0);
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	return r;
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}

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/************* MMU Notifiers *************/
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static void do_kvm_unmap_hva(struct kvm *kvm, unsigned long start,
			     unsigned long end)
{
	long i;
	struct kvm_vcpu *vcpu;
	struct kvm_memslots *slots;
	struct kvm_memory_slot *memslot;

	slots = kvm_memslots(kvm);
	kvm_for_each_memslot(memslot, slots) {
		unsigned long hva_start, hva_end;
		gfn_t gfn, gfn_end;

		hva_start = max(start, memslot->userspace_addr);
		hva_end = min(end, memslot->userspace_addr +
					(memslot->npages << PAGE_SHIFT));
		if (hva_start >= hva_end)
			continue;
		/*
		 * {gfn(page) | page intersects with [hva_start, hva_end)} =
		 * {gfn, gfn+1, ..., gfn_end-1}.
		 */
		gfn = hva_to_gfn_memslot(hva_start, memslot);
		gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
		kvm_for_each_vcpu(i, vcpu, kvm)
			kvmppc_mmu_pte_pflush(vcpu, gfn << PAGE_SHIFT,
					      gfn_end << PAGE_SHIFT);
	}
}
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static int kvm_unmap_hva_range_pr(struct kvm *kvm, unsigned long start,
				  unsigned long end)
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{
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	do_kvm_unmap_hva(kvm, start, end);
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	return 0;
}

A
Andres Lagar-Cavilla 已提交
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static int kvm_age_hva_pr(struct kvm *kvm, unsigned long start,
			  unsigned long end)
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{
	/* XXX could be more clever ;) */
	return 0;
}

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static int kvm_test_age_hva_pr(struct kvm *kvm, unsigned long hva)
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{
	/* XXX could be more clever ;) */
	return 0;
}

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static void kvm_set_spte_hva_pr(struct kvm *kvm, unsigned long hva, pte_t pte)
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{
	/* The page will get remapped properly on its next fault */
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	do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE);
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}

/*****************************************/

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static void kvmppc_set_msr_pr(struct kvm_vcpu *vcpu, u64 msr)
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{
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	ulong old_msr = kvmppc_get_msr(vcpu);
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#ifdef EXIT_DEBUG
	printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);
#endif

	msr &= to_book3s(vcpu)->msr_mask;
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	kvmppc_set_msr_fast(vcpu, msr);
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	kvmppc_recalc_shadow_msr(vcpu);

	if (msr & MSR_POW) {
		if (!vcpu->arch.pending_exceptions) {
			kvm_vcpu_block(vcpu);
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			kvm_clear_request(KVM_REQ_UNHALT, vcpu);
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			vcpu->stat.halt_wakeup++;

			/* Unset POW bit after we woke up */
			msr &= ~MSR_POW;
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			kvmppc_set_msr_fast(vcpu, msr);
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		}
	}

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	if (kvmppc_is_split_real(vcpu))
		kvmppc_fixup_split_real(vcpu);
	else
		kvmppc_unfixup_split_real(vcpu);

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	if ((kvmppc_get_msr(vcpu) & (MSR_PR|MSR_IR|MSR_DR)) !=
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		   (old_msr & (MSR_PR|MSR_IR|MSR_DR))) {
		kvmppc_mmu_flush_segments(vcpu);
		kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));

		/* Preload magic page segment when in kernel mode */
		if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) {
			struct kvm_vcpu_arch *a = &vcpu->arch;

			if (msr & MSR_DR)
				kvmppc_mmu_map_segment(vcpu, a->magic_page_ea);
			else
				kvmppc_mmu_map_segment(vcpu, a->magic_page_pa);
		}
	}

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	/*
	 * When switching from 32 to 64-bit, we may have a stale 32-bit
	 * magic page around, we need to flush it. Typically 32-bit magic
	 * page will be instanciated when calling into RTAS. Note: We
	 * assume that such transition only happens while in kernel mode,
	 * ie, we never transition from user 32-bit to kernel 64-bit with
	 * a 32-bit magic page around.
	 */
	if (vcpu->arch.magic_page_pa &&
	    !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) {
		/* going from RTAS to normal kernel code */
		kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa,
				     ~0xFFFUL);
	}

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	/* Preload FPU if it's enabled */
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	if (kvmppc_get_msr(vcpu) & MSR_FP)
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		kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	if (kvmppc_get_msr(vcpu) & MSR_TM)
		kvmppc_handle_lost_math_exts(vcpu);
#endif
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}

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void kvmppc_set_pvr_pr(struct kvm_vcpu *vcpu, u32 pvr)
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{
	u32 host_pvr;

	vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB;
	vcpu->arch.pvr = pvr;
#ifdef CONFIG_PPC_BOOK3S_64
	if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
		kvmppc_mmu_book3s_64_init(vcpu);
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		if (!to_book3s(vcpu)->hior_explicit)
			to_book3s(vcpu)->hior = 0xfff00000;
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		to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
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		vcpu->arch.cpu_type = KVM_CPU_3S_64;
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	} else
#endif
	{
		kvmppc_mmu_book3s_32_init(vcpu);
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		if (!to_book3s(vcpu)->hior_explicit)
			to_book3s(vcpu)->hior = 0;
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		to_book3s(vcpu)->msr_mask = 0xffffffffULL;
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		vcpu->arch.cpu_type = KVM_CPU_3S_32;
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	}

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	kvmppc_sanity_check(vcpu);

542 543 544 545 546 547 548 549 550 551 552 553
	/* If we are in hypervisor level on 970, we can tell the CPU to
	 * treat DCBZ as 32 bytes store */
	vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32;
	if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) &&
	    !strcmp(cur_cpu_spec->platform, "ppc970"))
		vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;

	/* Cell performs badly if MSR_FEx are set. So let's hope nobody
	   really needs them in a VM on Cell and force disable them. */
	if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be"))
		to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1);

554 555 556 557 558 559 560 561 562 563 564 565
	/*
	 * If they're asking for POWER6 or later, set the flag
	 * indicating that we can do multiple large page sizes
	 * and 1TB segments.
	 * Also set the flag that indicates that tlbie has the large
	 * page bit in the RB operand instead of the instruction.
	 */
	switch (PVR_VER(pvr)) {
	case PVR_POWER6:
	case PVR_POWER7:
	case PVR_POWER7p:
	case PVR_POWER8:
566 567
	case PVR_POWER8E:
	case PVR_POWER8NVL:
568 569 570 571 572
		vcpu->arch.hflags |= BOOK3S_HFLAG_MULTI_PGSIZE |
			BOOK3S_HFLAG_NEW_TLBIE;
		break;
	}

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#ifdef CONFIG_PPC_BOOK3S_32
	/* 32 bit Book3S always has 32 byte dcbz */
	vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
#endif

	/* On some CPUs we can execute paired single operations natively */
	asm ( "mfpvr %0" : "=r"(host_pvr));
	switch (host_pvr) {
	case 0x00080200:	/* lonestar 2.0 */
	case 0x00088202:	/* lonestar 2.2 */
	case 0x70000100:	/* gekko 1.0 */
	case 0x00080100:	/* gekko 2.0 */
	case 0x00083203:	/* gekko 2.3a */
	case 0x00083213:	/* gekko 2.3b */
	case 0x00083204:	/* gekko 2.4 */
	case 0x00083214:	/* gekko 2.4e (8SE) - retail HW2 */
	case 0x00087200:	/* broadway */
		vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS;
		/* Enable HID2.PSE - in case we need it later */
		mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29));
	}
}

/* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To
 * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to
 * emulate 32 bytes dcbz length.
 *
 * The Book3s_64 inventors also realized this case and implemented a special bit
 * in the HID5 register, which is a hypervisor ressource. Thus we can't use it.
 *
 * My approach here is to patch the dcbz instruction on executing pages.
 */
static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
{
	struct page *hpage;
	u64 hpage_offset;
	u32 *page;
	int i;

	hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
613
	if (is_error_page(hpage))
614 615 616 617 618 619 620
		return;

	hpage_offset = pte->raddr & ~PAGE_MASK;
	hpage_offset &= ~0xFFFULL;
	hpage_offset /= 4;

	get_page(hpage);
621
	page = kmap_atomic(hpage);
622 623 624

	/* patch dcbz into reserved instruction, so we trap */
	for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++)
625 626
		if ((be32_to_cpu(page[i]) & 0xff0007ff) == INS_DCBZ)
			page[i] &= cpu_to_be32(0xfffffff7);
627

628
	kunmap_atomic(page);
629 630 631
	put_page(hpage);
}

632
static bool kvmppc_visible_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
633 634 635
{
	ulong mp_pa = vcpu->arch.magic_page_pa;

636
	if (!(kvmppc_get_msr(vcpu) & MSR_SF))
637 638
		mp_pa = (uint32_t)mp_pa;

639 640
	gpa &= ~0xFFFULL;
	if (unlikely(mp_pa) && unlikely((mp_pa & KVM_PAM) == (gpa & KVM_PAM))) {
641
		return true;
642 643
	}

644
	return kvm_is_visible_gfn(vcpu->kvm, gpa >> PAGE_SHIFT);
645 646 647 648 649 650
}

int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
			    ulong eaddr, int vec)
{
	bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE);
651
	bool iswrite = false;
652 653 654
	int r = RESUME_GUEST;
	int relocated;
	int page_found = 0;
655
	struct kvmppc_pte pte = { 0 };
656 657
	bool dr = (kvmppc_get_msr(vcpu) & MSR_DR) ? true : false;
	bool ir = (kvmppc_get_msr(vcpu) & MSR_IR) ? true : false;
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	u64 vsid;

	relocated = data ? dr : ir;
661 662
	if (data && (vcpu->arch.fault_dsisr & DSISR_ISSTORE))
		iswrite = true;
663 664 665

	/* Resolve real address if translation turned on */
	if (relocated) {
666
		page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data, iswrite);
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	} else {
		pte.may_execute = true;
		pte.may_read = true;
		pte.may_write = true;
		pte.raddr = eaddr & KVM_PAM;
		pte.eaddr = eaddr;
		pte.vpage = eaddr >> 12;
674
		pte.page_size = MMU_PAGE_64K;
675
		pte.wimg = HPTE_R_M;
676 677
	}

678
	switch (kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) {
679 680 681 682
	case 0:
		pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12));
		break;
	case MSR_DR:
683 684 685 686 687
		if (!data &&
		    (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
		    ((pte.raddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
			pte.raddr &= ~SPLIT_HACK_MASK;
		/* fall through */
688 689 690
	case MSR_IR:
		vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);

691
		if ((kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) == MSR_DR)
692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713
			pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12));
		else
			pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12));
		pte.vpage |= vsid;

		if (vsid == -1)
			page_found = -EINVAL;
		break;
	}

	if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
	   (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
		/*
		 * If we do the dcbz hack, we have to NX on every execution,
		 * so we can patch the executing code. This renders our guest
		 * NX-less.
		 */
		pte.may_execute = !data;
	}

	if (page_found == -ENOENT) {
		/* Page not found in guest PTE entries */
714 715 716 717 718
		u64 ssrr1 = vcpu->arch.shadow_srr1;
		u64 msr = kvmppc_get_msr(vcpu);
		kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
		kvmppc_set_dsisr(vcpu, vcpu->arch.fault_dsisr);
		kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
719 720 721
		kvmppc_book3s_queue_irqprio(vcpu, vec);
	} else if (page_found == -EPERM) {
		/* Storage protection */
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		u32 dsisr = vcpu->arch.fault_dsisr;
		u64 ssrr1 = vcpu->arch.shadow_srr1;
		u64 msr = kvmppc_get_msr(vcpu);
		kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
		dsisr = (dsisr & ~DSISR_NOHPTE) | DSISR_PROTFAULT;
		kvmppc_set_dsisr(vcpu, dsisr);
		kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
729 730 731
		kvmppc_book3s_queue_irqprio(vcpu, vec);
	} else if (page_found == -EINVAL) {
		/* Page not found in guest SLB */
732
		kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
733
		kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80);
734
	} else if (kvmppc_visible_gpa(vcpu, pte.raddr)) {
735 736 737 738 739 740 741 742
		if (data && !(vcpu->arch.fault_dsisr & DSISR_NOHPTE)) {
			/*
			 * There is already a host HPTE there, presumably
			 * a read-only one for a page the guest thinks
			 * is writable, so get rid of it first.
			 */
			kvmppc_mmu_unmap_page(vcpu, &pte);
		}
743
		/* The guest's PTE is not mapped yet. Map on the host */
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		if (kvmppc_mmu_map_page(vcpu, &pte, iswrite) == -EIO) {
			/* Exit KVM if mapping failed */
			run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
			return RESUME_HOST;
		}
749 750 751
		if (data)
			vcpu->stat.sp_storage++;
		else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
752
			 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32)))
753 754 755 756 757
			kvmppc_patch_dcbz(vcpu, &pte);
	} else {
		/* MMIO */
		vcpu->stat.mmio_exits++;
		vcpu->arch.paddr_accessed = pte.raddr;
758
		vcpu->arch.vaddr_accessed = pte.eaddr;
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		r = kvmppc_emulate_mmio(run, vcpu);
		if ( r == RESUME_HOST_NV )
			r = RESUME_HOST;
	}

	return r;
}

/* Give up external provider (FPU, Altivec, VSX) */
void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
{
	struct thread_struct *t = &current->thread;

772 773 774 775 776 777 778 779 780
	/*
	 * VSX instructions can access FP and vector registers, so if
	 * we are giving up VSX, make sure we give up FP and VMX as well.
	 */
	if (msr & MSR_VSX)
		msr |= MSR_FP | MSR_VEC;

	msr &= vcpu->arch.guest_owned_ext;
	if (!msr)
781 782 783 784 785 786
		return;

#ifdef DEBUG_EXT
	printk(KERN_INFO "Giving up ext 0x%lx\n", msr);
#endif

787 788 789 790
	if (msr & MSR_FP) {
		/*
		 * Note that on CPUs with VSX, giveup_fpu stores
		 * both the traditional FP registers and the added VSX
791
		 * registers into thread.fp_state.fpr[].
792
		 */
793
		if (t->regs->msr & MSR_FP)
794
			giveup_fpu(current);
795
		t->fp_save_area = NULL;
796 797
	}

798
#ifdef CONFIG_ALTIVEC
799
	if (msr & MSR_VEC) {
800 801
		if (current->thread.regs->msr & MSR_VEC)
			giveup_altivec(current);
802
		t->vr_save_area = NULL;
803
	}
804
#endif
805

806
	vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX);
807 808 809
	kvmppc_recalc_shadow_msr(vcpu);
}

810 811 812 813 814 815 816 817
/* Give up facility (TAR / EBB / DSCR) */
static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac)
{
#ifdef CONFIG_PPC_BOOK3S_64
	if (!(vcpu->arch.shadow_fscr & (1ULL << fac))) {
		/* Facility not available to the guest, ignore giveup request*/
		return;
	}
818 819 820 821 822 823 824 825

	switch (fac) {
	case FSCR_TAR_LG:
		vcpu->arch.tar = mfspr(SPRN_TAR);
		mtspr(SPRN_TAR, current->thread.tar);
		vcpu->arch.shadow_fscr &= ~FSCR_TAR;
		break;
	}
826 827 828
#endif
}

829 830 831 832 833 834 835 836 837 838
/* Handle external providers (FPU, Altivec, VSX) */
static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
			     ulong msr)
{
	struct thread_struct *t = &current->thread;

	/* When we have paired singles, we emulate in software */
	if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)
		return RESUME_GUEST;

839
	if (!(kvmppc_get_msr(vcpu) & msr)) {
840 841 842 843
		kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
		return RESUME_GUEST;
	}

844 845 846 847 848 849 850 851 852 853 854 855 856 857 858
	if (msr == MSR_VSX) {
		/* No VSX?  Give an illegal instruction interrupt */
#ifdef CONFIG_VSX
		if (!cpu_has_feature(CPU_FTR_VSX))
#endif
		{
			kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
			return RESUME_GUEST;
		}

		/*
		 * We have to load up all the FP and VMX registers before
		 * we can let the guest use VSX instructions.
		 */
		msr = MSR_FP | MSR_VEC | MSR_VSX;
859 860
	}

861 862 863 864 865
	/* See if we already own all the ext(s) needed */
	msr &= ~vcpu->arch.guest_owned_ext;
	if (!msr)
		return RESUME_GUEST;

866 867 868 869
#ifdef DEBUG_EXT
	printk(KERN_INFO "Loading up ext 0x%lx\n", msr);
#endif

870
	if (msr & MSR_FP) {
871
		preempt_disable();
872
		enable_kernel_fp();
873
		load_fp_state(&vcpu->arch.fp);
874
		disable_kernel_fp();
875
		t->fp_save_area = &vcpu->arch.fp;
876
		preempt_enable();
877 878 879
	}

	if (msr & MSR_VEC) {
880
#ifdef CONFIG_ALTIVEC
881
		preempt_disable();
882
		enable_kernel_altivec();
883
		load_vr_state(&vcpu->arch.vr);
884
		disable_kernel_altivec();
885
		t->vr_save_area = &vcpu->arch.vr;
886
		preempt_enable();
887 888 889
#endif
	}

890
	t->regs->msr |= msr;
891 892 893 894 895 896
	vcpu->arch.guest_owned_ext |= msr;
	kvmppc_recalc_shadow_msr(vcpu);

	return RESUME_GUEST;
}

897 898 899 900 901 902 903 904 905 906 907 908
/*
 * Kernel code using FP or VMX could have flushed guest state to
 * the thread_struct; if so, get it back now.
 */
static void kvmppc_handle_lost_ext(struct kvm_vcpu *vcpu)
{
	unsigned long lost_ext;

	lost_ext = vcpu->arch.guest_owned_ext & ~current->thread.regs->msr;
	if (!lost_ext)
		return;

909
	if (lost_ext & MSR_FP) {
910
		preempt_disable();
911
		enable_kernel_fp();
912
		load_fp_state(&vcpu->arch.fp);
913
		disable_kernel_fp();
914
		preempt_enable();
915
	}
916
#ifdef CONFIG_ALTIVEC
917
	if (lost_ext & MSR_VEC) {
918
		preempt_disable();
919
		enable_kernel_altivec();
920
		load_vr_state(&vcpu->arch.vr);
921
		disable_kernel_altivec();
922
		preempt_enable();
923
	}
924
#endif
925 926 927
	current->thread.regs->msr |= lost_ext;
}

928 929
#ifdef CONFIG_PPC_BOOK3S_64

930
void kvmppc_trigger_fac_interrupt(struct kvm_vcpu *vcpu, ulong fac)
931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953
{
	/* Inject the Interrupt Cause field and trigger a guest interrupt */
	vcpu->arch.fscr &= ~(0xffULL << 56);
	vcpu->arch.fscr |= (fac << 56);
	kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FAC_UNAVAIL);
}

static void kvmppc_emulate_fac(struct kvm_vcpu *vcpu, ulong fac)
{
	enum emulation_result er = EMULATE_FAIL;

	if (!(kvmppc_get_msr(vcpu) & MSR_PR))
		er = kvmppc_emulate_instruction(vcpu->run, vcpu);

	if ((er != EMULATE_DONE) && (er != EMULATE_AGAIN)) {
		/* Couldn't emulate, trigger interrupt in guest */
		kvmppc_trigger_fac_interrupt(vcpu, fac);
	}
}

/* Enable facilities (TAR, EBB, DSCR) for the guest */
static int kvmppc_handle_fac(struct kvm_vcpu *vcpu, ulong fac)
{
954
	bool guest_fac_enabled;
955 956
	BUG_ON(!cpu_has_feature(CPU_FTR_ARCH_207S));

957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974
	/*
	 * Not every facility is enabled by FSCR bits, check whether the
	 * guest has this facility enabled at all.
	 */
	switch (fac) {
	case FSCR_TAR_LG:
	case FSCR_EBB_LG:
		guest_fac_enabled = (vcpu->arch.fscr & (1ULL << fac));
		break;
	case FSCR_TM_LG:
		guest_fac_enabled = kvmppc_get_msr(vcpu) & MSR_TM;
		break;
	default:
		guest_fac_enabled = false;
		break;
	}

	if (!guest_fac_enabled) {
975 976 977 978 979 980
		/* Facility not enabled by the guest */
		kvmppc_trigger_fac_interrupt(vcpu, fac);
		return RESUME_GUEST;
	}

	switch (fac) {
981 982 983 984 985 986
	case FSCR_TAR_LG:
		/* TAR switching isn't lazy in Linux yet */
		current->thread.tar = mfspr(SPRN_TAR);
		mtspr(SPRN_TAR, vcpu->arch.tar);
		vcpu->arch.shadow_fscr |= FSCR_TAR;
		break;
987 988 989 990 991 992 993
	default:
		kvmppc_emulate_fac(vcpu, fac);
		break;
	}

	return RESUME_GUEST;
}
994 995 996 997 998 999 1000 1001 1002

void kvmppc_set_fscr(struct kvm_vcpu *vcpu, u64 fscr)
{
	if ((vcpu->arch.fscr & FSCR_TAR) && !(fscr & FSCR_TAR)) {
		/* TAR got dropped, drop it in shadow too */
		kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
	}
	vcpu->arch.fscr = fscr;
}
1003 1004
#endif

1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022
static void kvmppc_setup_debug(struct kvm_vcpu *vcpu)
{
	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
		u64 msr = kvmppc_get_msr(vcpu);

		kvmppc_set_msr(vcpu, msr | MSR_SE);
	}
}

static void kvmppc_clear_debug(struct kvm_vcpu *vcpu)
{
	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
		u64 msr = kvmppc_get_msr(vcpu);

		kvmppc_set_msr(vcpu, msr & ~MSR_SE);
	}
}

1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085
static int kvmppc_exit_pr_progint(struct kvm_run *run, struct kvm_vcpu *vcpu,
				  unsigned int exit_nr)
{
	enum emulation_result er;
	ulong flags;
	u32 last_inst;
	int emul, r;

	/*
	 * shadow_srr1 only contains valid flags if we came here via a program
	 * exception. The other exceptions (emulation assist, FP unavailable,
	 * etc.) do not provide flags in SRR1, so use an illegal-instruction
	 * exception when injecting a program interrupt into the guest.
	 */
	if (exit_nr == BOOK3S_INTERRUPT_PROGRAM)
		flags = vcpu->arch.shadow_srr1 & 0x1f0000ull;
	else
		flags = SRR1_PROGILL;

	emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
	if (emul != EMULATE_DONE)
		return RESUME_GUEST;

	if (kvmppc_get_msr(vcpu) & MSR_PR) {
#ifdef EXIT_DEBUG
		pr_info("Userspace triggered 0x700 exception at\n 0x%lx (0x%x)\n",
			kvmppc_get_pc(vcpu), last_inst);
#endif
		if ((last_inst & 0xff0007ff) != (INS_DCBZ & 0xfffffff7)) {
			kvmppc_core_queue_program(vcpu, flags);
			return RESUME_GUEST;
		}
	}

	vcpu->stat.emulated_inst_exits++;
	er = kvmppc_emulate_instruction(run, vcpu);
	switch (er) {
	case EMULATE_DONE:
		r = RESUME_GUEST_NV;
		break;
	case EMULATE_AGAIN:
		r = RESUME_GUEST;
		break;
	case EMULATE_FAIL:
		pr_crit("%s: emulation at %lx failed (%08x)\n",
			__func__, kvmppc_get_pc(vcpu), last_inst);
		kvmppc_core_queue_program(vcpu, flags);
		r = RESUME_GUEST;
		break;
	case EMULATE_DO_MMIO:
		run->exit_reason = KVM_EXIT_MMIO;
		r = RESUME_HOST_NV;
		break;
	case EMULATE_EXIT_USER:
		r = RESUME_HOST_NV;
		break;
	default:
		BUG();
	}

	return r;
}

1086 1087
int kvmppc_handle_exit_pr(struct kvm_run *run, struct kvm_vcpu *vcpu,
			  unsigned int exit_nr)
1088 1089
{
	int r = RESUME_HOST;
1090
	int s;
1091 1092 1093 1094 1095 1096

	vcpu->stat.sum_exits++;

	run->exit_reason = KVM_EXIT_UNKNOWN;
	run->ready_for_interrupt_injection = 1;

1097
	/* We get here with MSR.EE=1 */
1098

1099
	trace_kvm_exit(exit_nr, vcpu);
1100
	guest_exit();
1101

1102 1103
	switch (exit_nr) {
	case BOOK3S_INTERRUPT_INST_STORAGE:
1104
	{
1105
		ulong shadow_srr1 = vcpu->arch.shadow_srr1;
1106 1107
		vcpu->stat.pf_instruc++;

1108 1109 1110
		if (kvmppc_is_split_real(vcpu))
			kvmppc_fixup_split_real(vcpu);

1111 1112 1113
#ifdef CONFIG_PPC_BOOK3S_32
		/* We set segments as unused segments when invalidating them. So
		 * treat the respective fault as segment fault. */
1114 1115 1116 1117 1118 1119
		{
			struct kvmppc_book3s_shadow_vcpu *svcpu;
			u32 sr;

			svcpu = svcpu_get(vcpu);
			sr = svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT];
1120
			svcpu_put(svcpu);
1121 1122 1123 1124 1125
			if (sr == SR_INVALID) {
				kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
				r = RESUME_GUEST;
				break;
			}
1126 1127 1128 1129
		}
#endif

		/* only care about PTEG not found errors, but leave NX alone */
1130
		if (shadow_srr1 & 0x40000000) {
1131
			int idx = srcu_read_lock(&vcpu->kvm->srcu);
1132
			r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr);
1133
			srcu_read_unlock(&vcpu->kvm->srcu, idx);
1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144
			vcpu->stat.sp_instruc++;
		} else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
			  (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
			/*
			 * XXX If we do the dcbz hack we use the NX bit to flush&patch the page,
			 *     so we can't use the NX bit inside the guest. Let's cross our fingers,
			 *     that no guest that needs the dcbz hack does NX.
			 */
			kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
			r = RESUME_GUEST;
		} else {
1145 1146 1147
			u64 msr = kvmppc_get_msr(vcpu);
			msr |= shadow_srr1 & 0x58000000;
			kvmppc_set_msr_fast(vcpu, msr);
1148 1149 1150 1151
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
1152
	}
1153 1154 1155
	case BOOK3S_INTERRUPT_DATA_STORAGE:
	{
		ulong dar = kvmppc_get_fault_dar(vcpu);
1156
		u32 fault_dsisr = vcpu->arch.fault_dsisr;
1157 1158 1159 1160 1161
		vcpu->stat.pf_storage++;

#ifdef CONFIG_PPC_BOOK3S_32
		/* We set segments as unused segments when invalidating them. So
		 * treat the respective fault as segment fault. */
1162 1163 1164 1165 1166 1167
		{
			struct kvmppc_book3s_shadow_vcpu *svcpu;
			u32 sr;

			svcpu = svcpu_get(vcpu);
			sr = svcpu->sr[dar >> SID_SHIFT];
1168
			svcpu_put(svcpu);
1169 1170 1171 1172 1173
			if (sr == SR_INVALID) {
				kvmppc_mmu_map_segment(vcpu, dar);
				r = RESUME_GUEST;
				break;
			}
1174 1175 1176
		}
#endif

1177 1178 1179 1180 1181 1182 1183
		/*
		 * We need to handle missing shadow PTEs, and
		 * protection faults due to us mapping a page read-only
		 * when the guest thinks it is writable.
		 */
		if (fault_dsisr & (DSISR_NOHPTE | DSISR_PROTFAULT)) {
			int idx = srcu_read_lock(&vcpu->kvm->srcu);
1184
			r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr);
1185
			srcu_read_unlock(&vcpu->kvm->srcu, idx);
1186
		} else {
1187 1188
			kvmppc_set_dar(vcpu, dar);
			kvmppc_set_dsisr(vcpu, fault_dsisr);
1189 1190 1191 1192 1193 1194 1195
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
	}
	case BOOK3S_INTERRUPT_DATA_SEGMENT:
		if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) {
1196
			kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210
			kvmppc_book3s_queue_irqprio(vcpu,
				BOOK3S_INTERRUPT_DATA_SEGMENT);
		}
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_INST_SEGMENT:
		if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) {
			kvmppc_book3s_queue_irqprio(vcpu,
				BOOK3S_INTERRUPT_INST_SEGMENT);
		}
		r = RESUME_GUEST;
		break;
	/* We're good on these - the host merely wanted to get our attention */
	case BOOK3S_INTERRUPT_DECREMENTER:
1211
	case BOOK3S_INTERRUPT_HV_DECREMENTER:
1212
	case BOOK3S_INTERRUPT_DOORBELL:
1213
	case BOOK3S_INTERRUPT_H_DOORBELL:
1214 1215 1216 1217
		vcpu->stat.dec_exits++;
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_EXTERNAL:
1218 1219
	case BOOK3S_INTERRUPT_EXTERNAL_LEVEL:
	case BOOK3S_INTERRUPT_EXTERNAL_HV:
1220 1221 1222 1223 1224 1225 1226
		vcpu->stat.ext_intr_exits++;
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_PERFMON:
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_PROGRAM:
1227
	case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
1228
		r = kvmppc_exit_pr_progint(run, vcpu, exit_nr);
1229 1230
		break;
	case BOOK3S_INTERRUPT_SYSCALL:
1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245
	{
		u32 last_sc;
		int emul;

		/* Get last sc for papr */
		if (vcpu->arch.papr_enabled) {
			/* The sc instuction points SRR0 to the next inst */
			emul = kvmppc_get_last_inst(vcpu, INST_SC, &last_sc);
			if (emul != EMULATE_DONE) {
				kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) - 4);
				r = RESUME_GUEST;
				break;
			}
		}

1246
		if (vcpu->arch.papr_enabled &&
1247
		    (last_sc == 0x44000022) &&
1248
		    !(kvmppc_get_msr(vcpu) & MSR_PR)) {
1249 1250 1251 1252
			/* SC 1 papr hypercalls */
			ulong cmd = kvmppc_get_gpr(vcpu, 3);
			int i;

1253
#ifdef CONFIG_PPC_BOOK3S_64
1254 1255 1256 1257
			if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
				r = RESUME_GUEST;
				break;
			}
1258
#endif
1259 1260 1261 1262 1263 1264 1265 1266 1267 1268

			run->papr_hcall.nr = cmd;
			for (i = 0; i < 9; ++i) {
				ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
				run->papr_hcall.args[i] = gpr;
			}
			run->exit_reason = KVM_EXIT_PAPR_HCALL;
			vcpu->arch.hcall_needed = 1;
			r = RESUME_HOST;
		} else if (vcpu->arch.osi_enabled &&
1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279
		    (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) &&
		    (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) {
			/* MOL hypercalls */
			u64 *gprs = run->osi.gprs;
			int i;

			run->exit_reason = KVM_EXIT_OSI;
			for (i = 0; i < 32; i++)
				gprs[i] = kvmppc_get_gpr(vcpu, i);
			vcpu->arch.osi_needed = 1;
			r = RESUME_HOST_NV;
1280
		} else if (!(kvmppc_get_msr(vcpu) & MSR_PR) &&
1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291
		    (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
			/* KVM PV hypercalls */
			kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
			r = RESUME_GUEST;
		} else {
			/* Guest syscalls */
			vcpu->stat.syscall_exits++;
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
1292
	}
1293 1294 1295 1296 1297
	case BOOK3S_INTERRUPT_FP_UNAVAIL:
	case BOOK3S_INTERRUPT_ALTIVEC:
	case BOOK3S_INTERRUPT_VSX:
	{
		int ext_msr = 0;
1298 1299 1300 1301 1302
		int emul;
		u32 last_inst;

		if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) {
			/* Do paired single instruction emulation */
1303 1304
			emul = kvmppc_get_last_inst(vcpu, INST_GENERIC,
						    &last_inst);
1305
			if (emul == EMULATE_DONE)
1306
				r = kvmppc_exit_pr_progint(run, vcpu, exit_nr);
1307 1308
			else
				r = RESUME_GUEST;
1309

1310
			break;
1311 1312
		}

1313 1314 1315 1316
		/* Enable external provider */
		switch (exit_nr) {
		case BOOK3S_INTERRUPT_FP_UNAVAIL:
			ext_msr = MSR_FP;
1317
			break;
1318 1319 1320

		case BOOK3S_INTERRUPT_ALTIVEC:
			ext_msr = MSR_VEC;
1321
			break;
1322 1323 1324

		case BOOK3S_INTERRUPT_VSX:
			ext_msr = MSR_VSX;
1325 1326
			break;
		}
1327 1328

		r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr);
1329 1330 1331
		break;
	}
	case BOOK3S_INTERRUPT_ALIGNMENT:
1332
	{
1333 1334
		u32 last_inst;
		int emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1335 1336

		if (emul == EMULATE_DONE) {
1337 1338 1339 1340 1341 1342 1343 1344 1345
			u32 dsisr;
			u64 dar;

			dsisr = kvmppc_alignment_dsisr(vcpu, last_inst);
			dar = kvmppc_alignment_dar(vcpu, last_inst);

			kvmppc_set_dsisr(vcpu, dsisr);
			kvmppc_set_dar(vcpu, dar);

1346 1347 1348 1349
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
		}
		r = RESUME_GUEST;
		break;
1350
	}
1351 1352 1353 1354 1355 1356
#ifdef CONFIG_PPC_BOOK3S_64
	case BOOK3S_INTERRUPT_FAC_UNAVAIL:
		kvmppc_handle_fac(vcpu, vcpu->arch.shadow_fscr >> 56);
		r = RESUME_GUEST;
		break;
#endif
1357 1358 1359 1360
	case BOOK3S_INTERRUPT_MACHINE_CHECK:
		kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
		r = RESUME_GUEST;
		break;
1361 1362 1363 1364 1365 1366 1367 1368 1369
	case BOOK3S_INTERRUPT_TRACE:
		if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
			run->exit_reason = KVM_EXIT_DEBUG;
			r = RESUME_HOST;
		} else {
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
1370
	default:
1371
	{
1372
		ulong shadow_srr1 = vcpu->arch.shadow_srr1;
1373 1374
		/* Ugh - bork here! What did we get? */
		printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n",
1375
			exit_nr, kvmppc_get_pc(vcpu), shadow_srr1);
1376 1377 1378 1379
		r = RESUME_HOST;
		BUG();
		break;
	}
1380
	}
1381 1382 1383 1384 1385

	if (!(r & RESUME_HOST)) {
		/* To avoid clobbering exit_reason, only check for signals if
		 * we aren't already exiting to userspace for some other
		 * reason. */
1386 1387 1388 1389 1390 1391 1392

		/*
		 * Interrupts could be timers for the guest which we have to
		 * inject again, so let's postpone them until we're in the guest
		 * and if we really did time things so badly, then we just exit
		 * again due to a host external interrupt.
		 */
1393
		s = kvmppc_prepare_to_enter(vcpu);
S
Scott Wood 已提交
1394
		if (s <= 0)
1395
			r = s;
S
Scott Wood 已提交
1396 1397
		else {
			/* interrupts now hard-disabled */
1398
			kvmppc_fix_ee_before_entry();
1399
		}
S
Scott Wood 已提交
1400

1401
		kvmppc_handle_lost_ext(vcpu);
1402 1403 1404 1405 1406 1407 1408
	}

	trace_kvm_book3s_reenter(r, vcpu);

	return r;
}

1409 1410
static int kvm_arch_vcpu_ioctl_get_sregs_pr(struct kvm_vcpu *vcpu,
					    struct kvm_sregs *sregs)
1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424
{
	struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
	int i;

	sregs->pvr = vcpu->arch.pvr;

	sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1;
	if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
		for (i = 0; i < 64; i++) {
			sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i;
			sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
		}
	} else {
		for (i = 0; i < 16; i++)
1425
			sregs->u.s.ppc32.sr[i] = kvmppc_get_sr(vcpu, i);
1426 1427 1428 1429 1430 1431 1432 1433 1434 1435

		for (i = 0; i < 8; i++) {
			sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw;
			sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw;
		}
	}

	return 0;
}

1436 1437
static int kvm_arch_vcpu_ioctl_set_sregs_pr(struct kvm_vcpu *vcpu,
					    struct kvm_sregs *sregs)
1438 1439 1440 1441
{
	struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
	int i;

1442
	kvmppc_set_pvr_pr(vcpu, sregs->pvr);
1443 1444

	vcpu3s->sdr1 = sregs->u.s.sdr1;
1445
#ifdef CONFIG_PPC_BOOK3S_64
1446
	if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
1447 1448 1449 1450
		/* Flush all SLB entries */
		vcpu->arch.mmu.slbmte(vcpu, 0, 0);
		vcpu->arch.mmu.slbia(vcpu);

1451
		for (i = 0; i < 64; i++) {
1452 1453 1454 1455 1456
			u64 rb = sregs->u.s.ppc64.slb[i].slbe;
			u64 rs = sregs->u.s.ppc64.slb[i].slbv;

			if (rb & SLB_ESID_V)
				vcpu->arch.mmu.slbmte(vcpu, rs, rb);
1457
		}
1458 1459 1460
	} else
#endif
	{
1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481
		for (i = 0; i < 16; i++) {
			vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]);
		}
		for (i = 0; i < 8; i++) {
			kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false,
				       (u32)sregs->u.s.ppc32.ibat[i]);
			kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true,
				       (u32)(sregs->u.s.ppc32.ibat[i] >> 32));
			kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false,
				       (u32)sregs->u.s.ppc32.dbat[i]);
			kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true,
				       (u32)(sregs->u.s.ppc32.dbat[i] >> 32));
		}
	}

	/* Flush the MMU after messing with the segments */
	kvmppc_mmu_pte_flush(vcpu, 0, 0);

	return 0;
}

1482 1483
static int kvmppc_get_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
				 union kvmppc_one_reg *val)
1484
{
1485
	int r = 0;
1486

1487
	switch (id) {
1488 1489 1490
	case KVM_REG_PPC_DEBUG_INST:
		*val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
		break;
1491
	case KVM_REG_PPC_HIOR:
1492
		*val = get_reg_val(id, to_book3s(vcpu)->hior);
1493
		break;
1494 1495 1496
	case KVM_REG_PPC_VTB:
		*val = get_reg_val(id, to_book3s(vcpu)->vtb);
		break;
1497
	case KVM_REG_PPC_LPCR:
1498
	case KVM_REG_PPC_LPCR_64:
1499 1500 1501 1502 1503 1504 1505 1506
		/*
		 * We are only interested in the LPCR_ILE bit
		 */
		if (vcpu->arch.intr_msr & MSR_LE)
			*val = get_reg_val(id, LPCR_ILE);
		else
			*val = get_reg_val(id, 0);
		break;
1507
	default:
1508
		r = -EINVAL;
1509 1510 1511 1512 1513 1514
		break;
	}

	return r;
}

1515 1516 1517 1518 1519 1520 1521 1522
static void kvmppc_set_lpcr_pr(struct kvm_vcpu *vcpu, u64 new_lpcr)
{
	if (new_lpcr & LPCR_ILE)
		vcpu->arch.intr_msr |= MSR_LE;
	else
		vcpu->arch.intr_msr &= ~MSR_LE;
}

1523 1524
static int kvmppc_set_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
				 union kvmppc_one_reg *val)
1525
{
1526
	int r = 0;
1527

1528
	switch (id) {
1529
	case KVM_REG_PPC_HIOR:
1530 1531
		to_book3s(vcpu)->hior = set_reg_val(id, *val);
		to_book3s(vcpu)->hior_explicit = true;
1532
		break;
1533 1534 1535
	case KVM_REG_PPC_VTB:
		to_book3s(vcpu)->vtb = set_reg_val(id, *val);
		break;
1536
	case KVM_REG_PPC_LPCR:
1537
	case KVM_REG_PPC_LPCR_64:
1538 1539
		kvmppc_set_lpcr_pr(vcpu, set_reg_val(id, *val));
		break;
1540
	default:
1541
		r = -EINVAL;
1542 1543 1544 1545 1546 1547
		break;
	}

	return r;
}

1548 1549
static struct kvm_vcpu *kvmppc_core_vcpu_create_pr(struct kvm *kvm,
						   unsigned int id)
1550 1551 1552 1553 1554 1555
{
	struct kvmppc_vcpu_book3s *vcpu_book3s;
	struct kvm_vcpu *vcpu;
	int err = -ENOMEM;
	unsigned long p;

1556 1557
	vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
	if (!vcpu)
1558 1559 1560 1561 1562
		goto out;

	vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s));
	if (!vcpu_book3s)
		goto free_vcpu;
1563
	vcpu->arch.book3s = vcpu_book3s;
1564

1565
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1566 1567 1568 1569
	vcpu->arch.shadow_vcpu =
		kzalloc(sizeof(*vcpu->arch.shadow_vcpu), GFP_KERNEL);
	if (!vcpu->arch.shadow_vcpu)
		goto free_vcpu3s;
1570
#endif
1571 1572 1573 1574 1575

	err = kvm_vcpu_init(vcpu, kvm, id);
	if (err)
		goto free_shadow_vcpu;

1576
	err = -ENOMEM;
1577 1578 1579
	p = __get_free_page(GFP_KERNEL|__GFP_ZERO);
	if (!p)
		goto uninit_vcpu;
1580
	vcpu->arch.shared = (void *)p;
1581
#ifdef CONFIG_PPC_BOOK3S_64
1582 1583 1584 1585 1586 1587 1588
	/* Always start the shared struct in native endian mode */
#ifdef __BIG_ENDIAN__
        vcpu->arch.shared_big_endian = true;
#else
        vcpu->arch.shared_big_endian = false;
#endif

1589 1590 1591 1592 1593
	/*
	 * Default to the same as the host if we're on sufficiently
	 * recent machine that we have 1TB segments;
	 * otherwise default to PPC970FX.
	 */
1594
	vcpu->arch.pvr = 0x3C0301;
1595 1596
	if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
		vcpu->arch.pvr = mfspr(SPRN_PVR);
1597
	vcpu->arch.intr_msr = MSR_SF;
1598 1599 1600 1601
#else
	/* default to book3s_32 (750) */
	vcpu->arch.pvr = 0x84202;
#endif
1602
	kvmppc_set_pvr_pr(vcpu, vcpu->arch.pvr);
1603 1604
	vcpu->arch.slb_nr = 64;

1605
	vcpu->arch.shadow_msr = MSR_USER64 & ~MSR_LE;
1606 1607 1608 1609 1610 1611 1612 1613 1614 1615

	err = kvmppc_mmu_init(vcpu);
	if (err < 0)
		goto uninit_vcpu;

	return vcpu;

uninit_vcpu:
	kvm_vcpu_uninit(vcpu);
free_shadow_vcpu:
1616
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1617 1618
	kfree(vcpu->arch.shadow_vcpu);
free_vcpu3s:
1619
#endif
1620
	vfree(vcpu_book3s);
1621 1622
free_vcpu:
	kmem_cache_free(kvm_vcpu_cache, vcpu);
1623 1624 1625 1626
out:
	return ERR_PTR(err);
}

1627
static void kvmppc_core_vcpu_free_pr(struct kvm_vcpu *vcpu)
1628 1629 1630 1631 1632
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);

	free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
	kvm_vcpu_uninit(vcpu);
1633
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1634 1635
	kfree(vcpu->arch.shadow_vcpu);
#endif
1636
	vfree(vcpu_book3s);
1637
	kmem_cache_free(kvm_vcpu_cache, vcpu);
1638 1639
}

1640
static int kvmppc_vcpu_run_pr(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1641 1642 1643 1644 1645 1646
{
	int ret;
#ifdef CONFIG_ALTIVEC
	unsigned long uninitialized_var(vrsave);
#endif

1647 1648 1649
	/* Check if we can run the vcpu at all */
	if (!vcpu->arch.sane) {
		kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1650 1651
		ret = -EINVAL;
		goto out;
1652 1653
	}

1654 1655
	kvmppc_setup_debug(vcpu);

1656 1657 1658 1659 1660 1661
	/*
	 * Interrupts could be timers for the guest which we have to inject
	 * again, so let's postpone them until we're in the guest and if we
	 * really did time things so badly, then we just exit again due to
	 * a host external interrupt.
	 */
1662
	ret = kvmppc_prepare_to_enter(vcpu);
S
Scott Wood 已提交
1663
	if (ret <= 0)
1664
		goto out;
S
Scott Wood 已提交
1665
	/* interrupts now hard-disabled */
1666

A
Anton Blanchard 已提交
1667 1668
	/* Save FPU, Altivec and VSX state */
	giveup_all(current);
1669 1670

	/* Preload FPU if it's enabled */
1671
	if (kvmppc_get_msr(vcpu) & MSR_FP)
1672 1673
		kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);

1674
	kvmppc_fix_ee_before_entry();
1675 1676 1677

	ret = __kvmppc_vcpu_run(kvm_run, vcpu);

1678 1679
	kvmppc_clear_debug(vcpu);

1680
	/* No need for guest_exit. It's done in handle_exit.
1681
	   We also get here with interrupts enabled. */
1682 1683

	/* Make sure we save the guest FPU/Altivec/VSX state */
1684 1685
	kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);

1686 1687 1688
	/* Make sure we save the guest TAR/EBB/DSCR state */
	kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);

1689
out:
1690
	vcpu->mode = OUTSIDE_GUEST_MODE;
1691 1692 1693
	return ret;
}

1694 1695 1696
/*
 * Get (and clear) the dirty memory log for a memory slot.
 */
1697 1698
static int kvm_vm_ioctl_get_dirty_log_pr(struct kvm *kvm,
					 struct kvm_dirty_log *log)
1699
{
1700
	struct kvm_memslots *slots;
1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715
	struct kvm_memory_slot *memslot;
	struct kvm_vcpu *vcpu;
	ulong ga, ga_end;
	int is_dirty = 0;
	int r;
	unsigned long n;

	mutex_lock(&kvm->slots_lock);

	r = kvm_get_dirty_log(kvm, log, &is_dirty);
	if (r)
		goto out;

	/* If nothing is dirty, don't bother messing with page tables. */
	if (is_dirty) {
1716 1717
		slots = kvm_memslots(kvm);
		memslot = id_to_memslot(slots, log->slot);
1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734

		ga = memslot->base_gfn << PAGE_SHIFT;
		ga_end = ga + (memslot->npages << PAGE_SHIFT);

		kvm_for_each_vcpu(n, vcpu, kvm)
			kvmppc_mmu_pte_pflush(vcpu, ga, ga_end);

		n = kvm_dirty_bitmap_bytes(memslot);
		memset(memslot->dirty_bitmap, 0, n);
	}

	r = 0;
out:
	mutex_unlock(&kvm->slots_lock);
	return r;
}

1735 1736
static void kvmppc_core_flush_memslot_pr(struct kvm *kvm,
					 struct kvm_memory_slot *memslot)
1737
{
1738 1739
	return;
}
1740

1741 1742
static int kvmppc_core_prepare_memory_region_pr(struct kvm *kvm,
					struct kvm_memory_slot *memslot,
1743
					const struct kvm_userspace_memory_region *mem)
1744
{
1745 1746 1747
	return 0;
}

1748
static void kvmppc_core_commit_memory_region_pr(struct kvm *kvm,
1749
				const struct kvm_userspace_memory_region *mem,
1750 1751
				const struct kvm_memory_slot *old,
				const struct kvm_memory_slot *new)
1752
{
1753
	return;
1754 1755
}

1756 1757
static void kvmppc_core_free_memslot_pr(struct kvm_memory_slot *free,
					struct kvm_memory_slot *dont)
1758
{
1759
	return;
1760 1761
}

1762 1763
static int kvmppc_core_create_memslot_pr(struct kvm_memory_slot *slot,
					 unsigned long npages)
1764 1765 1766 1767
{
	return 0;
}

1768

1769
#ifdef CONFIG_PPC64
1770 1771
static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
					 struct kvm_ppc_smmu_info *info)
1772
{
1773 1774 1775 1776
	long int i;
	struct kvm_vcpu *vcpu;

	info->flags = 0;
1777 1778 1779 1780 1781 1782 1783 1784 1785 1786

	/* SLB is always 64 entries */
	info->slb_size = 64;

	/* Standard 4k base page size segment */
	info->sps[0].page_shift = 12;
	info->sps[0].slb_enc = 0;
	info->sps[0].enc[0].page_shift = 12;
	info->sps[0].enc[0].pte_enc = 0;

1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806
	/*
	 * 64k large page size.
	 * We only want to put this in if the CPUs we're emulating
	 * support it, but unfortunately we don't have a vcpu easily
	 * to hand here to test.  Just pick the first vcpu, and if
	 * that doesn't exist yet, report the minimum capability,
	 * i.e., no 64k pages.
	 * 1T segment support goes along with 64k pages.
	 */
	i = 1;
	vcpu = kvm_get_vcpu(kvm, 0);
	if (vcpu && (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) {
		info->flags = KVM_PPC_1T_SEGMENTS;
		info->sps[i].page_shift = 16;
		info->sps[i].slb_enc = SLB_VSID_L | SLB_VSID_LP_01;
		info->sps[i].enc[0].page_shift = 16;
		info->sps[i].enc[0].pte_enc = 1;
		++i;
	}

1807
	/* Standard 16M large page size segment */
1808 1809 1810 1811
	info->sps[i].page_shift = 24;
	info->sps[i].slb_enc = SLB_VSID_L;
	info->sps[i].enc[0].page_shift = 24;
	info->sps[i].enc[0].pte_enc = 0;
1812

1813 1814
	return 0;
}
1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825

static int kvm_configure_mmu_pr(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg)
{
	if (!cpu_has_feature(CPU_FTR_ARCH_300))
		return -ENODEV;
	/* Require flags and process table base and size to all be zero. */
	if (cfg->flags || cfg->process_table)
		return -EINVAL;
	return 0;
}

1826 1827 1828
#else
static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
					 struct kvm_ppc_smmu_info *info)
1829
{
1830 1831
	/* We should not get called */
	BUG();
1832
}
1833
#endif /* CONFIG_PPC64 */
1834

1835 1836 1837
static unsigned int kvm_global_user_count = 0;
static DEFINE_SPINLOCK(kvm_global_user_count_lock);

1838
static int kvmppc_core_init_vm_pr(struct kvm *kvm)
1839
{
1840
	mutex_init(&kvm->arch.hpt_mutex);
1841

1842 1843 1844 1845 1846
#ifdef CONFIG_PPC_BOOK3S_64
	/* Start out with the default set of hcalls enabled */
	kvmppc_pr_init_default_hcalls(kvm);
#endif

1847 1848 1849
	if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
		spin_lock(&kvm_global_user_count_lock);
		if (++kvm_global_user_count == 1)
1850
			pseries_disable_reloc_on_exc();
1851 1852
		spin_unlock(&kvm_global_user_count_lock);
	}
1853 1854 1855
	return 0;
}

1856
static void kvmppc_core_destroy_vm_pr(struct kvm *kvm)
1857
{
1858 1859 1860
#ifdef CONFIG_PPC64
	WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
#endif
1861 1862 1863 1864 1865

	if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
		spin_lock(&kvm_global_user_count_lock);
		BUG_ON(kvm_global_user_count == 0);
		if (--kvm_global_user_count == 0)
1866
			pseries_enable_reloc_on_exc();
1867 1868
		spin_unlock(&kvm_global_user_count_lock);
	}
1869 1870
}

1871
static int kvmppc_core_check_processor_compat_pr(void)
1872
{
1873
	/*
1874 1875 1876 1877 1878 1879 1880
	 * PR KVM can work on POWER9 inside a guest partition
	 * running in HPT mode.  It can't work if we are using
	 * radix translation (because radix provides no way for
	 * a process to have unique translations in quadrant 3)
	 * or in a bare-metal HPT-mode host (because POWER9
	 * uses a modified HPTE format which the PR KVM code
	 * has not been adapted to use).
1881
	 */
1882 1883
	if (cpu_has_feature(CPU_FTR_ARCH_300) &&
	    (radix_enabled() || cpu_has_feature(CPU_FTR_HVMODE)))
1884
		return -EIO;
1885 1886
	return 0;
}
1887

1888 1889 1890 1891 1892
static long kvm_arch_vm_ioctl_pr(struct file *filp,
				 unsigned int ioctl, unsigned long arg)
{
	return -ENOTTY;
}
1893

1894
static struct kvmppc_ops kvm_ops_pr = {
1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924
	.get_sregs = kvm_arch_vcpu_ioctl_get_sregs_pr,
	.set_sregs = kvm_arch_vcpu_ioctl_set_sregs_pr,
	.get_one_reg = kvmppc_get_one_reg_pr,
	.set_one_reg = kvmppc_set_one_reg_pr,
	.vcpu_load   = kvmppc_core_vcpu_load_pr,
	.vcpu_put    = kvmppc_core_vcpu_put_pr,
	.set_msr     = kvmppc_set_msr_pr,
	.vcpu_run    = kvmppc_vcpu_run_pr,
	.vcpu_create = kvmppc_core_vcpu_create_pr,
	.vcpu_free   = kvmppc_core_vcpu_free_pr,
	.check_requests = kvmppc_core_check_requests_pr,
	.get_dirty_log = kvm_vm_ioctl_get_dirty_log_pr,
	.flush_memslot = kvmppc_core_flush_memslot_pr,
	.prepare_memory_region = kvmppc_core_prepare_memory_region_pr,
	.commit_memory_region = kvmppc_core_commit_memory_region_pr,
	.unmap_hva_range = kvm_unmap_hva_range_pr,
	.age_hva  = kvm_age_hva_pr,
	.test_age_hva = kvm_test_age_hva_pr,
	.set_spte_hva = kvm_set_spte_hva_pr,
	.mmu_destroy  = kvmppc_mmu_destroy_pr,
	.free_memslot = kvmppc_core_free_memslot_pr,
	.create_memslot = kvmppc_core_create_memslot_pr,
	.init_vm = kvmppc_core_init_vm_pr,
	.destroy_vm = kvmppc_core_destroy_vm_pr,
	.get_smmu_info = kvm_vm_ioctl_get_smmu_info_pr,
	.emulate_op = kvmppc_core_emulate_op_pr,
	.emulate_mtspr = kvmppc_core_emulate_mtspr_pr,
	.emulate_mfspr = kvmppc_core_emulate_mfspr_pr,
	.fast_vcpu_kick = kvm_vcpu_kick,
	.arch_vm_ioctl  = kvm_arch_vm_ioctl_pr,
1925 1926
#ifdef CONFIG_PPC_BOOK3S_64
	.hcall_implemented = kvmppc_hcall_impl_pr,
1927
	.configure_mmu = kvm_configure_mmu_pr,
1928
#endif
1929
	.giveup_ext = kvmppc_giveup_ext,
1930 1931
};

1932 1933

int kvmppc_book3s_init_pr(void)
1934 1935 1936
{
	int r;

1937 1938
	r = kvmppc_core_check_processor_compat_pr();
	if (r < 0)
1939 1940
		return r;

1941 1942
	kvm_ops_pr.owner = THIS_MODULE;
	kvmppc_pr_ops = &kvm_ops_pr;
1943

1944
	r = kvmppc_mmu_hpte_sysinit();
1945 1946 1947
	return r;
}

1948
void kvmppc_book3s_exit_pr(void)
1949
{
1950
	kvmppc_pr_ops = NULL;
1951 1952 1953
	kvmppc_mmu_hpte_sysexit();
}

1954 1955 1956 1957 1958
/*
 * We only support separate modules for book3s 64
 */
#ifdef CONFIG_PPC_BOOK3S_64

1959 1960
module_init(kvmppc_book3s_init_pr);
module_exit(kvmppc_book3s_exit_pr);
1961 1962

MODULE_LICENSE("GPL");
1963 1964
MODULE_ALIAS_MISCDEV(KVM_MINOR);
MODULE_ALIAS("devname:kvm");
1965
#endif