book3s_pr.c 46.0 KB
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/*
 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
 *
 * Authors:
 *    Alexander Graf <agraf@suse.de>
 *    Kevin Wolf <mail@kevin-wolf.de>
 *    Paul Mackerras <paulus@samba.org>
 *
 * Description:
 * Functions relating to running KVM on Book 3S processors where
 * we don't have access to hypervisor mode, and we run the guest
 * in problem state (user mode).
 *
 * This file is derived from arch/powerpc/kvm/44x.c,
 * by Hollis Blanchard <hollisb@us.ibm.com>.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 */

#include <linux/kvm_host.h>
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#include <linux/export.h>
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#include <linux/err.h>
#include <linux/slab.h>

#include <asm/reg.h>
#include <asm/cputable.h>
#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/kvm_ppc.h>
#include <asm/kvm_book3s.h>
#include <asm/mmu_context.h>
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#include <asm/switch_to.h>
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#include <asm/firmware.h>
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#include <asm/setup.h>
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#include <linux/gfp.h>
#include <linux/sched.h>
#include <linux/vmalloc.h>
#include <linux/highmem.h>
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#include <linux/module.h>
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#include <linux/miscdevice.h>
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#include "book3s.h"
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#define CREATE_TRACE_POINTS
#include "trace_pr.h"
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/* #define EXIT_DEBUG */
/* #define DEBUG_EXT */

static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
			     ulong msr);
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static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac);
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/* Some compatibility defines */
#ifdef CONFIG_PPC_BOOK3S_32
#define MSR_USER32 MSR_USER
#define MSR_USER64 MSR_USER
#define HW_PAGE_SIZE PAGE_SIZE
#endif

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static bool kvmppc_is_split_real(struct kvm_vcpu *vcpu)
{
	ulong msr = kvmppc_get_msr(vcpu);
	return (msr & (MSR_IR|MSR_DR)) == MSR_DR;
}

static void kvmppc_fixup_split_real(struct kvm_vcpu *vcpu)
{
	ulong msr = kvmppc_get_msr(vcpu);
	ulong pc = kvmppc_get_pc(vcpu);

	/* We are in DR only split real mode */
	if ((msr & (MSR_IR|MSR_DR)) != MSR_DR)
		return;

	/* We have not fixed up the guest already */
	if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK)
		return;

	/* The code is in fixupable address space */
	if (pc & SPLIT_HACK_MASK)
		return;

	vcpu->arch.hflags |= BOOK3S_HFLAG_SPLIT_HACK;
	kvmppc_set_pc(vcpu, pc | SPLIT_HACK_OFFS);
}

void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu);

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static void kvmppc_core_vcpu_load_pr(struct kvm_vcpu *vcpu, int cpu)
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{
#ifdef CONFIG_PPC_BOOK3S_64
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	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
	memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb));
	svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max;
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	svcpu->in_use = 0;
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	svcpu_put(svcpu);
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#endif
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	/* Disable AIL if supported */
	if (cpu_has_feature(CPU_FTR_HVMODE) &&
	    cpu_has_feature(CPU_FTR_ARCH_207S))
		mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~LPCR_AIL);

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	vcpu->cpu = smp_processor_id();
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#ifdef CONFIG_PPC_BOOK3S_32
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	current->thread.kvm_shadow_vcpu = vcpu->arch.shadow_vcpu;
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#endif
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	if (kvmppc_is_split_real(vcpu))
		kvmppc_fixup_split_real(vcpu);
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}

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static void kvmppc_core_vcpu_put_pr(struct kvm_vcpu *vcpu)
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{
#ifdef CONFIG_PPC_BOOK3S_64
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	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
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	if (svcpu->in_use) {
		kvmppc_copy_from_svcpu(vcpu, svcpu);
	}
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	memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb));
	to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max;
	svcpu_put(svcpu);
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#endif

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	if (kvmppc_is_split_real(vcpu))
		kvmppc_unfixup_split_real(vcpu);

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	kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);
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	kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
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	/* Enable AIL if supported */
	if (cpu_has_feature(CPU_FTR_HVMODE) &&
	    cpu_has_feature(CPU_FTR_ARCH_207S))
		mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_AIL_3);

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	vcpu->cpu = -1;
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}

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/* Copy data needed by real-mode code from vcpu to shadow vcpu */
void kvmppc_copy_to_svcpu(struct kvmppc_book3s_shadow_vcpu *svcpu,
			  struct kvm_vcpu *vcpu)
{
	svcpu->gpr[0] = vcpu->arch.gpr[0];
	svcpu->gpr[1] = vcpu->arch.gpr[1];
	svcpu->gpr[2] = vcpu->arch.gpr[2];
	svcpu->gpr[3] = vcpu->arch.gpr[3];
	svcpu->gpr[4] = vcpu->arch.gpr[4];
	svcpu->gpr[5] = vcpu->arch.gpr[5];
	svcpu->gpr[6] = vcpu->arch.gpr[6];
	svcpu->gpr[7] = vcpu->arch.gpr[7];
	svcpu->gpr[8] = vcpu->arch.gpr[8];
	svcpu->gpr[9] = vcpu->arch.gpr[9];
	svcpu->gpr[10] = vcpu->arch.gpr[10];
	svcpu->gpr[11] = vcpu->arch.gpr[11];
	svcpu->gpr[12] = vcpu->arch.gpr[12];
	svcpu->gpr[13] = vcpu->arch.gpr[13];
	svcpu->cr  = vcpu->arch.cr;
	svcpu->xer = vcpu->arch.xer;
	svcpu->ctr = vcpu->arch.ctr;
	svcpu->lr  = vcpu->arch.lr;
	svcpu->pc  = vcpu->arch.pc;
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#ifdef CONFIG_PPC_BOOK3S_64
	svcpu->shadow_fscr = vcpu->arch.shadow_fscr;
#endif
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	/*
	 * Now also save the current time base value. We use this
	 * to find the guest purr and spurr value.
	 */
	vcpu->arch.entry_tb = get_tb();
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	vcpu->arch.entry_vtb = get_vtb();
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	if (cpu_has_feature(CPU_FTR_ARCH_207S))
		vcpu->arch.entry_ic = mfspr(SPRN_IC);
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	svcpu->in_use = true;
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}

/* Copy data touched by real-mode code from shadow vcpu back to vcpu */
void kvmppc_copy_from_svcpu(struct kvm_vcpu *vcpu,
			    struct kvmppc_book3s_shadow_vcpu *svcpu)
{
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	/*
	 * vcpu_put would just call us again because in_use hasn't
	 * been updated yet.
	 */
	preempt_disable();

	/*
	 * Maybe we were already preempted and synced the svcpu from
	 * our preempt notifiers. Don't bother touching this svcpu then.
	 */
	if (!svcpu->in_use)
		goto out;

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	vcpu->arch.gpr[0] = svcpu->gpr[0];
	vcpu->arch.gpr[1] = svcpu->gpr[1];
	vcpu->arch.gpr[2] = svcpu->gpr[2];
	vcpu->arch.gpr[3] = svcpu->gpr[3];
	vcpu->arch.gpr[4] = svcpu->gpr[4];
	vcpu->arch.gpr[5] = svcpu->gpr[5];
	vcpu->arch.gpr[6] = svcpu->gpr[6];
	vcpu->arch.gpr[7] = svcpu->gpr[7];
	vcpu->arch.gpr[8] = svcpu->gpr[8];
	vcpu->arch.gpr[9] = svcpu->gpr[9];
	vcpu->arch.gpr[10] = svcpu->gpr[10];
	vcpu->arch.gpr[11] = svcpu->gpr[11];
	vcpu->arch.gpr[12] = svcpu->gpr[12];
	vcpu->arch.gpr[13] = svcpu->gpr[13];
	vcpu->arch.cr  = svcpu->cr;
	vcpu->arch.xer = svcpu->xer;
	vcpu->arch.ctr = svcpu->ctr;
	vcpu->arch.lr  = svcpu->lr;
	vcpu->arch.pc  = svcpu->pc;
	vcpu->arch.shadow_srr1 = svcpu->shadow_srr1;
	vcpu->arch.fault_dar   = svcpu->fault_dar;
	vcpu->arch.fault_dsisr = svcpu->fault_dsisr;
	vcpu->arch.last_inst   = svcpu->last_inst;
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#ifdef CONFIG_PPC_BOOK3S_64
	vcpu->arch.shadow_fscr = svcpu->shadow_fscr;
#endif
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	/*
	 * Update purr and spurr using time base on exit.
	 */
	vcpu->arch.purr += get_tb() - vcpu->arch.entry_tb;
	vcpu->arch.spurr += get_tb() - vcpu->arch.entry_tb;
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	to_book3s(vcpu)->vtb += get_vtb() - vcpu->arch.entry_vtb;
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	if (cpu_has_feature(CPU_FTR_ARCH_207S))
		vcpu->arch.ic += mfspr(SPRN_IC) - vcpu->arch.entry_ic;
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	svcpu->in_use = false;

out:
	preempt_enable();
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}

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static int kvmppc_core_check_requests_pr(struct kvm_vcpu *vcpu)
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{
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	int r = 1; /* Indicate we want to get back into the guest */

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	/* We misuse TLB_FLUSH to indicate that we want to clear
	   all shadow cache entries */
	if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
		kvmppc_mmu_pte_flush(vcpu, 0, 0);
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	return r;
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}

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/************* MMU Notifiers *************/
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static void do_kvm_unmap_hva(struct kvm *kvm, unsigned long start,
			     unsigned long end)
{
	long i;
	struct kvm_vcpu *vcpu;
	struct kvm_memslots *slots;
	struct kvm_memory_slot *memslot;

	slots = kvm_memslots(kvm);
	kvm_for_each_memslot(memslot, slots) {
		unsigned long hva_start, hva_end;
		gfn_t gfn, gfn_end;

		hva_start = max(start, memslot->userspace_addr);
		hva_end = min(end, memslot->userspace_addr +
					(memslot->npages << PAGE_SHIFT));
		if (hva_start >= hva_end)
			continue;
		/*
		 * {gfn(page) | page intersects with [hva_start, hva_end)} =
		 * {gfn, gfn+1, ..., gfn_end-1}.
		 */
		gfn = hva_to_gfn_memslot(hva_start, memslot);
		gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
		kvm_for_each_vcpu(i, vcpu, kvm)
			kvmppc_mmu_pte_pflush(vcpu, gfn << PAGE_SHIFT,
					      gfn_end << PAGE_SHIFT);
	}
}
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static int kvm_unmap_hva_pr(struct kvm *kvm, unsigned long hva)
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{
	trace_kvm_unmap_hva(hva);

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	do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE);
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	return 0;
}

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static int kvm_unmap_hva_range_pr(struct kvm *kvm, unsigned long start,
				  unsigned long end)
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{
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	do_kvm_unmap_hva(kvm, start, end);
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	return 0;
}

A
Andres Lagar-Cavilla 已提交
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static int kvm_age_hva_pr(struct kvm *kvm, unsigned long start,
			  unsigned long end)
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{
	/* XXX could be more clever ;) */
	return 0;
}

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static int kvm_test_age_hva_pr(struct kvm *kvm, unsigned long hva)
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{
	/* XXX could be more clever ;) */
	return 0;
}

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static void kvm_set_spte_hva_pr(struct kvm *kvm, unsigned long hva, pte_t pte)
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{
	/* The page will get remapped properly on its next fault */
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	do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE);
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}

/*****************************************/

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static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
{
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	ulong guest_msr = kvmppc_get_msr(vcpu);
	ulong smsr = guest_msr;
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	/* Guest MSR values */
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	smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE;
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	/* Process MSR values */
	smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
	/* External providers the guest reserved */
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	smsr |= (guest_msr & vcpu->arch.guest_owned_ext);
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	/* 64-bit Process MSR values */
#ifdef CONFIG_PPC_BOOK3S_64
	smsr |= MSR_ISF | MSR_HV;
#endif
	vcpu->arch.shadow_msr = smsr;
}

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static void kvmppc_set_msr_pr(struct kvm_vcpu *vcpu, u64 msr)
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{
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	ulong old_msr = kvmppc_get_msr(vcpu);
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#ifdef EXIT_DEBUG
	printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);
#endif

	msr &= to_book3s(vcpu)->msr_mask;
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	kvmppc_set_msr_fast(vcpu, msr);
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	kvmppc_recalc_shadow_msr(vcpu);

	if (msr & MSR_POW) {
		if (!vcpu->arch.pending_exceptions) {
			kvm_vcpu_block(vcpu);
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			clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
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			vcpu->stat.halt_wakeup++;

			/* Unset POW bit after we woke up */
			msr &= ~MSR_POW;
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			kvmppc_set_msr_fast(vcpu, msr);
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		}
	}

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	if (kvmppc_is_split_real(vcpu))
		kvmppc_fixup_split_real(vcpu);
	else
		kvmppc_unfixup_split_real(vcpu);

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	if ((kvmppc_get_msr(vcpu) & (MSR_PR|MSR_IR|MSR_DR)) !=
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		   (old_msr & (MSR_PR|MSR_IR|MSR_DR))) {
		kvmppc_mmu_flush_segments(vcpu);
		kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));

		/* Preload magic page segment when in kernel mode */
		if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) {
			struct kvm_vcpu_arch *a = &vcpu->arch;

			if (msr & MSR_DR)
				kvmppc_mmu_map_segment(vcpu, a->magic_page_ea);
			else
				kvmppc_mmu_map_segment(vcpu, a->magic_page_pa);
		}
	}

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	/*
	 * When switching from 32 to 64-bit, we may have a stale 32-bit
	 * magic page around, we need to flush it. Typically 32-bit magic
	 * page will be instanciated when calling into RTAS. Note: We
	 * assume that such transition only happens while in kernel mode,
	 * ie, we never transition from user 32-bit to kernel 64-bit with
	 * a 32-bit magic page around.
	 */
	if (vcpu->arch.magic_page_pa &&
	    !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) {
		/* going from RTAS to normal kernel code */
		kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa,
				     ~0xFFFUL);
	}

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	/* Preload FPU if it's enabled */
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	if (kvmppc_get_msr(vcpu) & MSR_FP)
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		kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
}

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void kvmppc_set_pvr_pr(struct kvm_vcpu *vcpu, u32 pvr)
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{
	u32 host_pvr;

	vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB;
	vcpu->arch.pvr = pvr;
#ifdef CONFIG_PPC_BOOK3S_64
	if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
		kvmppc_mmu_book3s_64_init(vcpu);
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		if (!to_book3s(vcpu)->hior_explicit)
			to_book3s(vcpu)->hior = 0xfff00000;
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		to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
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		vcpu->arch.cpu_type = KVM_CPU_3S_64;
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	} else
#endif
	{
		kvmppc_mmu_book3s_32_init(vcpu);
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		if (!to_book3s(vcpu)->hior_explicit)
			to_book3s(vcpu)->hior = 0;
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		to_book3s(vcpu)->msr_mask = 0xffffffffULL;
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		vcpu->arch.cpu_type = KVM_CPU_3S_32;
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	}

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	kvmppc_sanity_check(vcpu);

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	/* If we are in hypervisor level on 970, we can tell the CPU to
	 * treat DCBZ as 32 bytes store */
	vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32;
	if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) &&
	    !strcmp(cur_cpu_spec->platform, "ppc970"))
		vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;

	/* Cell performs badly if MSR_FEx are set. So let's hope nobody
	   really needs them in a VM on Cell and force disable them. */
	if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be"))
		to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1);

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	/*
	 * If they're asking for POWER6 or later, set the flag
	 * indicating that we can do multiple large page sizes
	 * and 1TB segments.
	 * Also set the flag that indicates that tlbie has the large
	 * page bit in the RB operand instead of the instruction.
	 */
	switch (PVR_VER(pvr)) {
	case PVR_POWER6:
	case PVR_POWER7:
	case PVR_POWER7p:
	case PVR_POWER8:
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	case PVR_POWER8E:
	case PVR_POWER8NVL:
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		vcpu->arch.hflags |= BOOK3S_HFLAG_MULTI_PGSIZE |
			BOOK3S_HFLAG_NEW_TLBIE;
		break;
	}

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#ifdef CONFIG_PPC_BOOK3S_32
	/* 32 bit Book3S always has 32 byte dcbz */
	vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
#endif

	/* On some CPUs we can execute paired single operations natively */
	asm ( "mfpvr %0" : "=r"(host_pvr));
	switch (host_pvr) {
	case 0x00080200:	/* lonestar 2.0 */
	case 0x00088202:	/* lonestar 2.2 */
	case 0x70000100:	/* gekko 1.0 */
	case 0x00080100:	/* gekko 2.0 */
	case 0x00083203:	/* gekko 2.3a */
	case 0x00083213:	/* gekko 2.3b */
	case 0x00083204:	/* gekko 2.4 */
	case 0x00083214:	/* gekko 2.4e (8SE) - retail HW2 */
	case 0x00087200:	/* broadway */
		vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS;
		/* Enable HID2.PSE - in case we need it later */
		mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29));
	}
}

/* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To
 * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to
 * emulate 32 bytes dcbz length.
 *
 * The Book3s_64 inventors also realized this case and implemented a special bit
 * in the HID5 register, which is a hypervisor ressource. Thus we can't use it.
 *
 * My approach here is to patch the dcbz instruction on executing pages.
 */
static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
{
	struct page *hpage;
	u64 hpage_offset;
	u32 *page;
	int i;

	hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
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	if (is_error_page(hpage))
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		return;

	hpage_offset = pte->raddr & ~PAGE_MASK;
	hpage_offset &= ~0xFFFULL;
	hpage_offset /= 4;

	get_page(hpage);
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	page = kmap_atomic(hpage);
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	/* patch dcbz into reserved instruction, so we trap */
	for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++)
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		if ((be32_to_cpu(page[i]) & 0xff0007ff) == INS_DCBZ)
			page[i] &= cpu_to_be32(0xfffffff7);
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	kunmap_atomic(page);
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	put_page(hpage);
}

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static bool kvmppc_visible_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
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{
	ulong mp_pa = vcpu->arch.magic_page_pa;

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	if (!(kvmppc_get_msr(vcpu) & MSR_SF))
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		mp_pa = (uint32_t)mp_pa;

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	gpa &= ~0xFFFULL;
	if (unlikely(mp_pa) && unlikely((mp_pa & KVM_PAM) == (gpa & KVM_PAM))) {
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		return true;
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	}

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	return kvm_is_visible_gfn(vcpu->kvm, gpa >> PAGE_SHIFT);
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}

int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
			    ulong eaddr, int vec)
{
	bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE);
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	bool iswrite = false;
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	int r = RESUME_GUEST;
	int relocated;
	int page_found = 0;
	struct kvmppc_pte pte;
	bool is_mmio = false;
542 543
	bool dr = (kvmppc_get_msr(vcpu) & MSR_DR) ? true : false;
	bool ir = (kvmppc_get_msr(vcpu) & MSR_IR) ? true : false;
544 545 546
	u64 vsid;

	relocated = data ? dr : ir;
547 548
	if (data && (vcpu->arch.fault_dsisr & DSISR_ISSTORE))
		iswrite = true;
549 550 551

	/* Resolve real address if translation turned on */
	if (relocated) {
552
		page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data, iswrite);
553 554 555 556 557 558 559
	} else {
		pte.may_execute = true;
		pte.may_read = true;
		pte.may_write = true;
		pte.raddr = eaddr & KVM_PAM;
		pte.eaddr = eaddr;
		pte.vpage = eaddr >> 12;
560
		pte.page_size = MMU_PAGE_64K;
561 562
	}

563
	switch (kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) {
564 565 566 567
	case 0:
		pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12));
		break;
	case MSR_DR:
568 569 570 571 572
		if (!data &&
		    (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
		    ((pte.raddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
			pte.raddr &= ~SPLIT_HACK_MASK;
		/* fall through */
573 574 575
	case MSR_IR:
		vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);

576
		if ((kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) == MSR_DR)
577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598
			pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12));
		else
			pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12));
		pte.vpage |= vsid;

		if (vsid == -1)
			page_found = -EINVAL;
		break;
	}

	if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
	   (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
		/*
		 * If we do the dcbz hack, we have to NX on every execution,
		 * so we can patch the executing code. This renders our guest
		 * NX-less.
		 */
		pte.may_execute = !data;
	}

	if (page_found == -ENOENT) {
		/* Page not found in guest PTE entries */
599 600 601 602 603
		u64 ssrr1 = vcpu->arch.shadow_srr1;
		u64 msr = kvmppc_get_msr(vcpu);
		kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
		kvmppc_set_dsisr(vcpu, vcpu->arch.fault_dsisr);
		kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
604 605 606
		kvmppc_book3s_queue_irqprio(vcpu, vec);
	} else if (page_found == -EPERM) {
		/* Storage protection */
607 608 609 610 611 612 613
		u32 dsisr = vcpu->arch.fault_dsisr;
		u64 ssrr1 = vcpu->arch.shadow_srr1;
		u64 msr = kvmppc_get_msr(vcpu);
		kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
		dsisr = (dsisr & ~DSISR_NOHPTE) | DSISR_PROTFAULT;
		kvmppc_set_dsisr(vcpu, dsisr);
		kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
614 615 616
		kvmppc_book3s_queue_irqprio(vcpu, vec);
	} else if (page_found == -EINVAL) {
		/* Page not found in guest SLB */
617
		kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
618 619
		kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80);
	} else if (!is_mmio &&
620
		   kvmppc_visible_gpa(vcpu, pte.raddr)) {
621 622 623 624 625 626 627 628
		if (data && !(vcpu->arch.fault_dsisr & DSISR_NOHPTE)) {
			/*
			 * There is already a host HPTE there, presumably
			 * a read-only one for a page the guest thinks
			 * is writable, so get rid of it first.
			 */
			kvmppc_mmu_unmap_page(vcpu, &pte);
		}
629
		/* The guest's PTE is not mapped yet. Map on the host */
630
		kvmppc_mmu_map_page(vcpu, &pte, iswrite);
631 632 633
		if (data)
			vcpu->stat.sp_storage++;
		else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
634
			 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32)))
635 636 637 638 639
			kvmppc_patch_dcbz(vcpu, &pte);
	} else {
		/* MMIO */
		vcpu->stat.mmio_exits++;
		vcpu->arch.paddr_accessed = pte.raddr;
640
		vcpu->arch.vaddr_accessed = pte.eaddr;
641 642 643 644 645 646 647 648 649 650 651 652 653
		r = kvmppc_emulate_mmio(run, vcpu);
		if ( r == RESUME_HOST_NV )
			r = RESUME_HOST;
	}

	return r;
}

/* Give up external provider (FPU, Altivec, VSX) */
void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
{
	struct thread_struct *t = &current->thread;

654 655 656 657 658 659 660 661 662
	/*
	 * VSX instructions can access FP and vector registers, so if
	 * we are giving up VSX, make sure we give up FP and VMX as well.
	 */
	if (msr & MSR_VSX)
		msr |= MSR_FP | MSR_VEC;

	msr &= vcpu->arch.guest_owned_ext;
	if (!msr)
663 664 665 666 667 668
		return;

#ifdef DEBUG_EXT
	printk(KERN_INFO "Giving up ext 0x%lx\n", msr);
#endif

669 670 671 672
	if (msr & MSR_FP) {
		/*
		 * Note that on CPUs with VSX, giveup_fpu stores
		 * both the traditional FP registers and the added VSX
673
		 * registers into thread.fp_state.fpr[].
674
		 */
675
		if (t->regs->msr & MSR_FP)
676
			giveup_fpu(current);
677
		t->fp_save_area = NULL;
678 679
	}

680
#ifdef CONFIG_ALTIVEC
681
	if (msr & MSR_VEC) {
682 683
		if (current->thread.regs->msr & MSR_VEC)
			giveup_altivec(current);
684
		t->vr_save_area = NULL;
685
	}
686
#endif
687

688
	vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX);
689 690 691
	kvmppc_recalc_shadow_msr(vcpu);
}

692 693 694 695 696 697 698 699
/* Give up facility (TAR / EBB / DSCR) */
static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac)
{
#ifdef CONFIG_PPC_BOOK3S_64
	if (!(vcpu->arch.shadow_fscr & (1ULL << fac))) {
		/* Facility not available to the guest, ignore giveup request*/
		return;
	}
700 701 702 703 704 705 706 707

	switch (fac) {
	case FSCR_TAR_LG:
		vcpu->arch.tar = mfspr(SPRN_TAR);
		mtspr(SPRN_TAR, current->thread.tar);
		vcpu->arch.shadow_fscr &= ~FSCR_TAR;
		break;
	}
708 709 710
#endif
}

711 712 713 714 715 716 717 718 719 720
/* Handle external providers (FPU, Altivec, VSX) */
static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
			     ulong msr)
{
	struct thread_struct *t = &current->thread;

	/* When we have paired singles, we emulate in software */
	if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)
		return RESUME_GUEST;

721
	if (!(kvmppc_get_msr(vcpu) & msr)) {
722 723 724 725
		kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
		return RESUME_GUEST;
	}

726 727 728 729 730 731 732 733 734 735 736 737 738 739 740
	if (msr == MSR_VSX) {
		/* No VSX?  Give an illegal instruction interrupt */
#ifdef CONFIG_VSX
		if (!cpu_has_feature(CPU_FTR_VSX))
#endif
		{
			kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
			return RESUME_GUEST;
		}

		/*
		 * We have to load up all the FP and VMX registers before
		 * we can let the guest use VSX instructions.
		 */
		msr = MSR_FP | MSR_VEC | MSR_VSX;
741 742
	}

743 744 745 746 747
	/* See if we already own all the ext(s) needed */
	msr &= ~vcpu->arch.guest_owned_ext;
	if (!msr)
		return RESUME_GUEST;

748 749 750 751
#ifdef DEBUG_EXT
	printk(KERN_INFO "Loading up ext 0x%lx\n", msr);
#endif

752
	if (msr & MSR_FP) {
753
		preempt_disable();
754
		enable_kernel_fp();
755
		load_fp_state(&vcpu->arch.fp);
756
		disable_kernel_fp();
757
		t->fp_save_area = &vcpu->arch.fp;
758
		preempt_enable();
759 760 761
	}

	if (msr & MSR_VEC) {
762
#ifdef CONFIG_ALTIVEC
763
		preempt_disable();
764
		enable_kernel_altivec();
765
		load_vr_state(&vcpu->arch.vr);
766
		disable_kernel_altivec();
767
		t->vr_save_area = &vcpu->arch.vr;
768
		preempt_enable();
769 770 771
#endif
	}

772
	t->regs->msr |= msr;
773 774 775 776 777 778
	vcpu->arch.guest_owned_ext |= msr;
	kvmppc_recalc_shadow_msr(vcpu);

	return RESUME_GUEST;
}

779 780 781 782 783 784 785 786 787 788 789 790
/*
 * Kernel code using FP or VMX could have flushed guest state to
 * the thread_struct; if so, get it back now.
 */
static void kvmppc_handle_lost_ext(struct kvm_vcpu *vcpu)
{
	unsigned long lost_ext;

	lost_ext = vcpu->arch.guest_owned_ext & ~current->thread.regs->msr;
	if (!lost_ext)
		return;

791
	if (lost_ext & MSR_FP) {
792
		preempt_disable();
793
		enable_kernel_fp();
794
		load_fp_state(&vcpu->arch.fp);
795
		disable_kernel_fp();
796
		preempt_enable();
797
	}
798
#ifdef CONFIG_ALTIVEC
799
	if (lost_ext & MSR_VEC) {
800
		preempt_disable();
801
		enable_kernel_altivec();
802
		load_vr_state(&vcpu->arch.vr);
803
		disable_kernel_altivec();
804
		preempt_enable();
805
	}
806
#endif
807 808 809
	current->thread.regs->msr |= lost_ext;
}

810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835
#ifdef CONFIG_PPC_BOOK3S_64

static void kvmppc_trigger_fac_interrupt(struct kvm_vcpu *vcpu, ulong fac)
{
	/* Inject the Interrupt Cause field and trigger a guest interrupt */
	vcpu->arch.fscr &= ~(0xffULL << 56);
	vcpu->arch.fscr |= (fac << 56);
	kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FAC_UNAVAIL);
}

static void kvmppc_emulate_fac(struct kvm_vcpu *vcpu, ulong fac)
{
	enum emulation_result er = EMULATE_FAIL;

	if (!(kvmppc_get_msr(vcpu) & MSR_PR))
		er = kvmppc_emulate_instruction(vcpu->run, vcpu);

	if ((er != EMULATE_DONE) && (er != EMULATE_AGAIN)) {
		/* Couldn't emulate, trigger interrupt in guest */
		kvmppc_trigger_fac_interrupt(vcpu, fac);
	}
}

/* Enable facilities (TAR, EBB, DSCR) for the guest */
static int kvmppc_handle_fac(struct kvm_vcpu *vcpu, ulong fac)
{
836
	bool guest_fac_enabled;
837 838
	BUG_ON(!cpu_has_feature(CPU_FTR_ARCH_207S));

839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856
	/*
	 * Not every facility is enabled by FSCR bits, check whether the
	 * guest has this facility enabled at all.
	 */
	switch (fac) {
	case FSCR_TAR_LG:
	case FSCR_EBB_LG:
		guest_fac_enabled = (vcpu->arch.fscr & (1ULL << fac));
		break;
	case FSCR_TM_LG:
		guest_fac_enabled = kvmppc_get_msr(vcpu) & MSR_TM;
		break;
	default:
		guest_fac_enabled = false;
		break;
	}

	if (!guest_fac_enabled) {
857 858 859 860 861 862
		/* Facility not enabled by the guest */
		kvmppc_trigger_fac_interrupt(vcpu, fac);
		return RESUME_GUEST;
	}

	switch (fac) {
863 864 865 866 867 868
	case FSCR_TAR_LG:
		/* TAR switching isn't lazy in Linux yet */
		current->thread.tar = mfspr(SPRN_TAR);
		mtspr(SPRN_TAR, vcpu->arch.tar);
		vcpu->arch.shadow_fscr |= FSCR_TAR;
		break;
869 870 871 872 873 874 875
	default:
		kvmppc_emulate_fac(vcpu, fac);
		break;
	}

	return RESUME_GUEST;
}
876 877 878 879 880 881 882 883 884

void kvmppc_set_fscr(struct kvm_vcpu *vcpu, u64 fscr)
{
	if ((vcpu->arch.fscr & FSCR_TAR) && !(fscr & FSCR_TAR)) {
		/* TAR got dropped, drop it in shadow too */
		kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
	}
	vcpu->arch.fscr = fscr;
}
885 886
#endif

887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904
static void kvmppc_setup_debug(struct kvm_vcpu *vcpu)
{
	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
		u64 msr = kvmppc_get_msr(vcpu);

		kvmppc_set_msr(vcpu, msr | MSR_SE);
	}
}

static void kvmppc_clear_debug(struct kvm_vcpu *vcpu)
{
	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
		u64 msr = kvmppc_get_msr(vcpu);

		kvmppc_set_msr(vcpu, msr & ~MSR_SE);
	}
}

905 906
int kvmppc_handle_exit_pr(struct kvm_run *run, struct kvm_vcpu *vcpu,
			  unsigned int exit_nr)
907 908
{
	int r = RESUME_HOST;
909
	int s;
910 911 912 913 914 915

	vcpu->stat.sum_exits++;

	run->exit_reason = KVM_EXIT_UNKNOWN;
	run->ready_for_interrupt_injection = 1;

916
	/* We get here with MSR.EE=1 */
917

918
	trace_kvm_exit(exit_nr, vcpu);
919
	guest_exit();
920

921 922
	switch (exit_nr) {
	case BOOK3S_INTERRUPT_INST_STORAGE:
923
	{
924
		ulong shadow_srr1 = vcpu->arch.shadow_srr1;
925 926
		vcpu->stat.pf_instruc++;

927 928 929
		if (kvmppc_is_split_real(vcpu))
			kvmppc_fixup_split_real(vcpu);

930 931 932
#ifdef CONFIG_PPC_BOOK3S_32
		/* We set segments as unused segments when invalidating them. So
		 * treat the respective fault as segment fault. */
933 934 935 936 937 938
		{
			struct kvmppc_book3s_shadow_vcpu *svcpu;
			u32 sr;

			svcpu = svcpu_get(vcpu);
			sr = svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT];
939
			svcpu_put(svcpu);
940 941 942 943 944
			if (sr == SR_INVALID) {
				kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
				r = RESUME_GUEST;
				break;
			}
945 946 947 948
		}
#endif

		/* only care about PTEG not found errors, but leave NX alone */
949
		if (shadow_srr1 & 0x40000000) {
950
			int idx = srcu_read_lock(&vcpu->kvm->srcu);
951
			r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr);
952
			srcu_read_unlock(&vcpu->kvm->srcu, idx);
953 954 955 956 957 958 959 960 961 962 963
			vcpu->stat.sp_instruc++;
		} else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
			  (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
			/*
			 * XXX If we do the dcbz hack we use the NX bit to flush&patch the page,
			 *     so we can't use the NX bit inside the guest. Let's cross our fingers,
			 *     that no guest that needs the dcbz hack does NX.
			 */
			kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
			r = RESUME_GUEST;
		} else {
964 965 966
			u64 msr = kvmppc_get_msr(vcpu);
			msr |= shadow_srr1 & 0x58000000;
			kvmppc_set_msr_fast(vcpu, msr);
967 968 969 970
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
971
	}
972 973 974
	case BOOK3S_INTERRUPT_DATA_STORAGE:
	{
		ulong dar = kvmppc_get_fault_dar(vcpu);
975
		u32 fault_dsisr = vcpu->arch.fault_dsisr;
976 977 978 979 980
		vcpu->stat.pf_storage++;

#ifdef CONFIG_PPC_BOOK3S_32
		/* We set segments as unused segments when invalidating them. So
		 * treat the respective fault as segment fault. */
981 982 983 984 985 986
		{
			struct kvmppc_book3s_shadow_vcpu *svcpu;
			u32 sr;

			svcpu = svcpu_get(vcpu);
			sr = svcpu->sr[dar >> SID_SHIFT];
987
			svcpu_put(svcpu);
988 989 990 991 992
			if (sr == SR_INVALID) {
				kvmppc_mmu_map_segment(vcpu, dar);
				r = RESUME_GUEST;
				break;
			}
993 994 995
		}
#endif

996 997 998 999 1000 1001 1002
		/*
		 * We need to handle missing shadow PTEs, and
		 * protection faults due to us mapping a page read-only
		 * when the guest thinks it is writable.
		 */
		if (fault_dsisr & (DSISR_NOHPTE | DSISR_PROTFAULT)) {
			int idx = srcu_read_lock(&vcpu->kvm->srcu);
1003
			r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr);
1004
			srcu_read_unlock(&vcpu->kvm->srcu, idx);
1005
		} else {
1006 1007
			kvmppc_set_dar(vcpu, dar);
			kvmppc_set_dsisr(vcpu, fault_dsisr);
1008 1009 1010 1011 1012 1013 1014
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
	}
	case BOOK3S_INTERRUPT_DATA_SEGMENT:
		if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) {
1015
			kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029
			kvmppc_book3s_queue_irqprio(vcpu,
				BOOK3S_INTERRUPT_DATA_SEGMENT);
		}
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_INST_SEGMENT:
		if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) {
			kvmppc_book3s_queue_irqprio(vcpu,
				BOOK3S_INTERRUPT_INST_SEGMENT);
		}
		r = RESUME_GUEST;
		break;
	/* We're good on these - the host merely wanted to get our attention */
	case BOOK3S_INTERRUPT_DECREMENTER:
1030
	case BOOK3S_INTERRUPT_HV_DECREMENTER:
1031
	case BOOK3S_INTERRUPT_DOORBELL:
1032
	case BOOK3S_INTERRUPT_H_DOORBELL:
1033 1034 1035 1036
		vcpu->stat.dec_exits++;
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_EXTERNAL:
1037 1038
	case BOOK3S_INTERRUPT_EXTERNAL_LEVEL:
	case BOOK3S_INTERRUPT_EXTERNAL_HV:
1039 1040 1041 1042 1043 1044 1045
		vcpu->stat.ext_intr_exits++;
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_PERFMON:
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_PROGRAM:
1046
	case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
1047 1048 1049
	{
		enum emulation_result er;
		ulong flags;
1050 1051
		u32 last_inst;
		int emul;
1052 1053

program_interrupt:
1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064
		/*
		 * shadow_srr1 only contains valid flags if we came here via
		 * a program exception. The other exceptions (emulation assist,
		 * FP unavailable, etc.) do not provide flags in SRR1, so use
		 * an illegal-instruction exception when injecting a program
		 * interrupt into the guest.
		 */
		if (exit_nr == BOOK3S_INTERRUPT_PROGRAM)
			flags = vcpu->arch.shadow_srr1 & 0x1f0000ull;
		else
			flags = SRR1_PROGILL;
1065

1066 1067 1068 1069 1070 1071
		emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
		if (emul != EMULATE_DONE) {
			r = RESUME_GUEST;
			break;
		}

1072
		if (kvmppc_get_msr(vcpu) & MSR_PR) {
1073
#ifdef EXIT_DEBUG
1074 1075
			pr_info("Userspace triggered 0x700 exception at\n 0x%lx (0x%x)\n",
				kvmppc_get_pc(vcpu), last_inst);
1076
#endif
1077
			if ((last_inst & 0xff0007ff) !=
1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095
			    (INS_DCBZ & 0xfffffff7)) {
				kvmppc_core_queue_program(vcpu, flags);
				r = RESUME_GUEST;
				break;
			}
		}

		vcpu->stat.emulated_inst_exits++;
		er = kvmppc_emulate_instruction(run, vcpu);
		switch (er) {
		case EMULATE_DONE:
			r = RESUME_GUEST_NV;
			break;
		case EMULATE_AGAIN:
			r = RESUME_GUEST;
			break;
		case EMULATE_FAIL:
			printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
1096
			       __func__, kvmppc_get_pc(vcpu), last_inst);
1097 1098 1099 1100 1101 1102 1103
			kvmppc_core_queue_program(vcpu, flags);
			r = RESUME_GUEST;
			break;
		case EMULATE_DO_MMIO:
			run->exit_reason = KVM_EXIT_MMIO;
			r = RESUME_HOST_NV;
			break;
1104
		case EMULATE_EXIT_USER:
1105 1106
			r = RESUME_HOST_NV;
			break;
1107 1108 1109 1110 1111 1112
		default:
			BUG();
		}
		break;
	}
	case BOOK3S_INTERRUPT_SYSCALL:
1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127
	{
		u32 last_sc;
		int emul;

		/* Get last sc for papr */
		if (vcpu->arch.papr_enabled) {
			/* The sc instuction points SRR0 to the next inst */
			emul = kvmppc_get_last_inst(vcpu, INST_SC, &last_sc);
			if (emul != EMULATE_DONE) {
				kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) - 4);
				r = RESUME_GUEST;
				break;
			}
		}

1128
		if (vcpu->arch.papr_enabled &&
1129
		    (last_sc == 0x44000022) &&
1130
		    !(kvmppc_get_msr(vcpu) & MSR_PR)) {
1131 1132 1133 1134
			/* SC 1 papr hypercalls */
			ulong cmd = kvmppc_get_gpr(vcpu, 3);
			int i;

1135
#ifdef CONFIG_PPC_BOOK3S_64
1136 1137 1138 1139
			if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
				r = RESUME_GUEST;
				break;
			}
1140
#endif
1141 1142 1143 1144 1145 1146 1147 1148 1149 1150

			run->papr_hcall.nr = cmd;
			for (i = 0; i < 9; ++i) {
				ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
				run->papr_hcall.args[i] = gpr;
			}
			run->exit_reason = KVM_EXIT_PAPR_HCALL;
			vcpu->arch.hcall_needed = 1;
			r = RESUME_HOST;
		} else if (vcpu->arch.osi_enabled &&
1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161
		    (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) &&
		    (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) {
			/* MOL hypercalls */
			u64 *gprs = run->osi.gprs;
			int i;

			run->exit_reason = KVM_EXIT_OSI;
			for (i = 0; i < 32; i++)
				gprs[i] = kvmppc_get_gpr(vcpu, i);
			vcpu->arch.osi_needed = 1;
			r = RESUME_HOST_NV;
1162
		} else if (!(kvmppc_get_msr(vcpu) & MSR_PR) &&
1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173
		    (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
			/* KVM PV hypercalls */
			kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
			r = RESUME_GUEST;
		} else {
			/* Guest syscalls */
			vcpu->stat.syscall_exits++;
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
1174
	}
1175 1176 1177 1178 1179
	case BOOK3S_INTERRUPT_FP_UNAVAIL:
	case BOOK3S_INTERRUPT_ALTIVEC:
	case BOOK3S_INTERRUPT_VSX:
	{
		int ext_msr = 0;
1180 1181 1182 1183 1184
		int emul;
		u32 last_inst;

		if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) {
			/* Do paired single instruction emulation */
1185 1186
			emul = kvmppc_get_last_inst(vcpu, INST_GENERIC,
						    &last_inst);
1187 1188 1189 1190
			if (emul == EMULATE_DONE)
				goto program_interrupt;
			else
				r = RESUME_GUEST;
1191

1192
			break;
1193 1194
		}

1195 1196 1197 1198
		/* Enable external provider */
		switch (exit_nr) {
		case BOOK3S_INTERRUPT_FP_UNAVAIL:
			ext_msr = MSR_FP;
1199
			break;
1200 1201 1202

		case BOOK3S_INTERRUPT_ALTIVEC:
			ext_msr = MSR_VEC;
1203
			break;
1204 1205 1206

		case BOOK3S_INTERRUPT_VSX:
			ext_msr = MSR_VSX;
1207 1208
			break;
		}
1209 1210

		r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr);
1211 1212 1213
		break;
	}
	case BOOK3S_INTERRUPT_ALIGNMENT:
1214
	{
1215 1216
		u32 last_inst;
		int emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1217 1218

		if (emul == EMULATE_DONE) {
1219 1220 1221 1222 1223 1224 1225 1226 1227
			u32 dsisr;
			u64 dar;

			dsisr = kvmppc_alignment_dsisr(vcpu, last_inst);
			dar = kvmppc_alignment_dar(vcpu, last_inst);

			kvmppc_set_dsisr(vcpu, dsisr);
			kvmppc_set_dar(vcpu, dar);

1228 1229 1230 1231
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
		}
		r = RESUME_GUEST;
		break;
1232
	}
1233 1234 1235 1236 1237 1238
#ifdef CONFIG_PPC_BOOK3S_64
	case BOOK3S_INTERRUPT_FAC_UNAVAIL:
		kvmppc_handle_fac(vcpu, vcpu->arch.shadow_fscr >> 56);
		r = RESUME_GUEST;
		break;
#endif
1239 1240 1241 1242
	case BOOK3S_INTERRUPT_MACHINE_CHECK:
		kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
		r = RESUME_GUEST;
		break;
1243 1244 1245 1246 1247 1248 1249 1250 1251
	case BOOK3S_INTERRUPT_TRACE:
		if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
			run->exit_reason = KVM_EXIT_DEBUG;
			r = RESUME_HOST;
		} else {
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
1252
	default:
1253
	{
1254
		ulong shadow_srr1 = vcpu->arch.shadow_srr1;
1255 1256
		/* Ugh - bork here! What did we get? */
		printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n",
1257
			exit_nr, kvmppc_get_pc(vcpu), shadow_srr1);
1258 1259 1260 1261
		r = RESUME_HOST;
		BUG();
		break;
	}
1262
	}
1263 1264 1265 1266 1267

	if (!(r & RESUME_HOST)) {
		/* To avoid clobbering exit_reason, only check for signals if
		 * we aren't already exiting to userspace for some other
		 * reason. */
1268 1269 1270 1271 1272 1273 1274

		/*
		 * Interrupts could be timers for the guest which we have to
		 * inject again, so let's postpone them until we're in the guest
		 * and if we really did time things so badly, then we just exit
		 * again due to a host external interrupt.
		 */
1275
		s = kvmppc_prepare_to_enter(vcpu);
S
Scott Wood 已提交
1276
		if (s <= 0)
1277
			r = s;
S
Scott Wood 已提交
1278 1279
		else {
			/* interrupts now hard-disabled */
1280
			kvmppc_fix_ee_before_entry();
1281
		}
S
Scott Wood 已提交
1282

1283
		kvmppc_handle_lost_ext(vcpu);
1284 1285 1286 1287 1288 1289 1290
	}

	trace_kvm_book3s_reenter(r, vcpu);

	return r;
}

1291 1292
static int kvm_arch_vcpu_ioctl_get_sregs_pr(struct kvm_vcpu *vcpu,
					    struct kvm_sregs *sregs)
1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306
{
	struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
	int i;

	sregs->pvr = vcpu->arch.pvr;

	sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1;
	if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
		for (i = 0; i < 64; i++) {
			sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i;
			sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
		}
	} else {
		for (i = 0; i < 16; i++)
1307
			sregs->u.s.ppc32.sr[i] = kvmppc_get_sr(vcpu, i);
1308 1309 1310 1311 1312 1313 1314 1315 1316 1317

		for (i = 0; i < 8; i++) {
			sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw;
			sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw;
		}
	}

	return 0;
}

1318 1319
static int kvm_arch_vcpu_ioctl_set_sregs_pr(struct kvm_vcpu *vcpu,
					    struct kvm_sregs *sregs)
1320 1321 1322 1323
{
	struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
	int i;

1324
	kvmppc_set_pvr_pr(vcpu, sregs->pvr);
1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353

	vcpu3s->sdr1 = sregs->u.s.sdr1;
	if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
		for (i = 0; i < 64; i++) {
			vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv,
						    sregs->u.s.ppc64.slb[i].slbe);
		}
	} else {
		for (i = 0; i < 16; i++) {
			vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]);
		}
		for (i = 0; i < 8; i++) {
			kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false,
				       (u32)sregs->u.s.ppc32.ibat[i]);
			kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true,
				       (u32)(sregs->u.s.ppc32.ibat[i] >> 32));
			kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false,
				       (u32)sregs->u.s.ppc32.dbat[i]);
			kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true,
				       (u32)(sregs->u.s.ppc32.dbat[i] >> 32));
		}
	}

	/* Flush the MMU after messing with the segments */
	kvmppc_mmu_pte_flush(vcpu, 0, 0);

	return 0;
}

1354 1355
static int kvmppc_get_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
				 union kvmppc_one_reg *val)
1356
{
1357
	int r = 0;
1358

1359
	switch (id) {
1360 1361 1362
	case KVM_REG_PPC_DEBUG_INST:
		*val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
		break;
1363
	case KVM_REG_PPC_HIOR:
1364
		*val = get_reg_val(id, to_book3s(vcpu)->hior);
1365
		break;
1366 1367 1368
	case KVM_REG_PPC_VTB:
		*val = get_reg_val(id, to_book3s(vcpu)->vtb);
		break;
1369
	case KVM_REG_PPC_LPCR:
1370
	case KVM_REG_PPC_LPCR_64:
1371 1372 1373 1374 1375 1376 1377 1378
		/*
		 * We are only interested in the LPCR_ILE bit
		 */
		if (vcpu->arch.intr_msr & MSR_LE)
			*val = get_reg_val(id, LPCR_ILE);
		else
			*val = get_reg_val(id, 0);
		break;
1379
	default:
1380
		r = -EINVAL;
1381 1382 1383 1384 1385 1386
		break;
	}

	return r;
}

1387 1388 1389 1390 1391 1392 1393 1394
static void kvmppc_set_lpcr_pr(struct kvm_vcpu *vcpu, u64 new_lpcr)
{
	if (new_lpcr & LPCR_ILE)
		vcpu->arch.intr_msr |= MSR_LE;
	else
		vcpu->arch.intr_msr &= ~MSR_LE;
}

1395 1396
static int kvmppc_set_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
				 union kvmppc_one_reg *val)
1397
{
1398
	int r = 0;
1399

1400
	switch (id) {
1401
	case KVM_REG_PPC_HIOR:
1402 1403
		to_book3s(vcpu)->hior = set_reg_val(id, *val);
		to_book3s(vcpu)->hior_explicit = true;
1404
		break;
1405 1406 1407
	case KVM_REG_PPC_VTB:
		to_book3s(vcpu)->vtb = set_reg_val(id, *val);
		break;
1408
	case KVM_REG_PPC_LPCR:
1409
	case KVM_REG_PPC_LPCR_64:
1410 1411
		kvmppc_set_lpcr_pr(vcpu, set_reg_val(id, *val));
		break;
1412
	default:
1413
		r = -EINVAL;
1414 1415 1416 1417 1418 1419
		break;
	}

	return r;
}

1420 1421
static struct kvm_vcpu *kvmppc_core_vcpu_create_pr(struct kvm *kvm,
						   unsigned int id)
1422 1423 1424 1425 1426 1427
{
	struct kvmppc_vcpu_book3s *vcpu_book3s;
	struct kvm_vcpu *vcpu;
	int err = -ENOMEM;
	unsigned long p;

1428 1429
	vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
	if (!vcpu)
1430 1431 1432 1433 1434
		goto out;

	vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s));
	if (!vcpu_book3s)
		goto free_vcpu;
1435
	vcpu->arch.book3s = vcpu_book3s;
1436

1437
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1438 1439 1440 1441
	vcpu->arch.shadow_vcpu =
		kzalloc(sizeof(*vcpu->arch.shadow_vcpu), GFP_KERNEL);
	if (!vcpu->arch.shadow_vcpu)
		goto free_vcpu3s;
1442
#endif
1443 1444 1445 1446 1447

	err = kvm_vcpu_init(vcpu, kvm, id);
	if (err)
		goto free_shadow_vcpu;

1448
	err = -ENOMEM;
1449 1450 1451
	p = __get_free_page(GFP_KERNEL|__GFP_ZERO);
	if (!p)
		goto uninit_vcpu;
1452
	vcpu->arch.shared = (void *)p;
1453
#ifdef CONFIG_PPC_BOOK3S_64
1454 1455 1456 1457 1458 1459 1460
	/* Always start the shared struct in native endian mode */
#ifdef __BIG_ENDIAN__
        vcpu->arch.shared_big_endian = true;
#else
        vcpu->arch.shared_big_endian = false;
#endif

1461 1462 1463 1464 1465
	/*
	 * Default to the same as the host if we're on sufficiently
	 * recent machine that we have 1TB segments;
	 * otherwise default to PPC970FX.
	 */
1466
	vcpu->arch.pvr = 0x3C0301;
1467 1468
	if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
		vcpu->arch.pvr = mfspr(SPRN_PVR);
1469
	vcpu->arch.intr_msr = MSR_SF;
1470 1471 1472 1473
#else
	/* default to book3s_32 (750) */
	vcpu->arch.pvr = 0x84202;
#endif
1474
	kvmppc_set_pvr_pr(vcpu, vcpu->arch.pvr);
1475 1476
	vcpu->arch.slb_nr = 64;

1477
	vcpu->arch.shadow_msr = MSR_USER64 & ~MSR_LE;
1478 1479 1480 1481 1482 1483 1484 1485 1486 1487

	err = kvmppc_mmu_init(vcpu);
	if (err < 0)
		goto uninit_vcpu;

	return vcpu;

uninit_vcpu:
	kvm_vcpu_uninit(vcpu);
free_shadow_vcpu:
1488
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1489 1490
	kfree(vcpu->arch.shadow_vcpu);
free_vcpu3s:
1491
#endif
1492
	vfree(vcpu_book3s);
1493 1494
free_vcpu:
	kmem_cache_free(kvm_vcpu_cache, vcpu);
1495 1496 1497 1498
out:
	return ERR_PTR(err);
}

1499
static void kvmppc_core_vcpu_free_pr(struct kvm_vcpu *vcpu)
1500 1501 1502 1503 1504
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);

	free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
	kvm_vcpu_uninit(vcpu);
1505
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1506 1507
	kfree(vcpu->arch.shadow_vcpu);
#endif
1508
	vfree(vcpu_book3s);
1509
	kmem_cache_free(kvm_vcpu_cache, vcpu);
1510 1511
}

1512
static int kvmppc_vcpu_run_pr(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1513 1514 1515 1516 1517 1518
{
	int ret;
#ifdef CONFIG_ALTIVEC
	unsigned long uninitialized_var(vrsave);
#endif

1519 1520 1521
	/* Check if we can run the vcpu at all */
	if (!vcpu->arch.sane) {
		kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1522 1523
		ret = -EINVAL;
		goto out;
1524 1525
	}

1526 1527
	kvmppc_setup_debug(vcpu);

1528 1529 1530 1531 1532 1533
	/*
	 * Interrupts could be timers for the guest which we have to inject
	 * again, so let's postpone them until we're in the guest and if we
	 * really did time things so badly, then we just exit again due to
	 * a host external interrupt.
	 */
1534
	ret = kvmppc_prepare_to_enter(vcpu);
S
Scott Wood 已提交
1535
	if (ret <= 0)
1536
		goto out;
S
Scott Wood 已提交
1537
	/* interrupts now hard-disabled */
1538

A
Anton Blanchard 已提交
1539 1540
	/* Save FPU, Altivec and VSX state */
	giveup_all(current);
1541 1542

	/* Preload FPU if it's enabled */
1543
	if (kvmppc_get_msr(vcpu) & MSR_FP)
1544 1545
		kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);

1546
	kvmppc_fix_ee_before_entry();
1547 1548 1549

	ret = __kvmppc_vcpu_run(kvm_run, vcpu);

1550 1551
	kvmppc_clear_debug(vcpu);

1552
	/* No need for guest_exit. It's done in handle_exit.
1553
	   We also get here with interrupts enabled. */
1554 1555

	/* Make sure we save the guest FPU/Altivec/VSX state */
1556 1557
	kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);

1558 1559 1560
	/* Make sure we save the guest TAR/EBB/DSCR state */
	kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);

1561
out:
1562
	vcpu->mode = OUTSIDE_GUEST_MODE;
1563 1564 1565
	return ret;
}

1566 1567 1568
/*
 * Get (and clear) the dirty memory log for a memory slot.
 */
1569 1570
static int kvm_vm_ioctl_get_dirty_log_pr(struct kvm *kvm,
					 struct kvm_dirty_log *log)
1571
{
1572
	struct kvm_memslots *slots;
1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587
	struct kvm_memory_slot *memslot;
	struct kvm_vcpu *vcpu;
	ulong ga, ga_end;
	int is_dirty = 0;
	int r;
	unsigned long n;

	mutex_lock(&kvm->slots_lock);

	r = kvm_get_dirty_log(kvm, log, &is_dirty);
	if (r)
		goto out;

	/* If nothing is dirty, don't bother messing with page tables. */
	if (is_dirty) {
1588 1589
		slots = kvm_memslots(kvm);
		memslot = id_to_memslot(slots, log->slot);
1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606

		ga = memslot->base_gfn << PAGE_SHIFT;
		ga_end = ga + (memslot->npages << PAGE_SHIFT);

		kvm_for_each_vcpu(n, vcpu, kvm)
			kvmppc_mmu_pte_pflush(vcpu, ga, ga_end);

		n = kvm_dirty_bitmap_bytes(memslot);
		memset(memslot->dirty_bitmap, 0, n);
	}

	r = 0;
out:
	mutex_unlock(&kvm->slots_lock);
	return r;
}

1607 1608
static void kvmppc_core_flush_memslot_pr(struct kvm *kvm,
					 struct kvm_memory_slot *memslot)
1609
{
1610 1611
	return;
}
1612

1613 1614
static int kvmppc_core_prepare_memory_region_pr(struct kvm *kvm,
					struct kvm_memory_slot *memslot,
1615
					const struct kvm_userspace_memory_region *mem)
1616
{
1617 1618 1619
	return 0;
}

1620
static void kvmppc_core_commit_memory_region_pr(struct kvm *kvm,
1621
				const struct kvm_userspace_memory_region *mem,
1622 1623
				const struct kvm_memory_slot *old,
				const struct kvm_memory_slot *new)
1624
{
1625
	return;
1626 1627
}

1628 1629
static void kvmppc_core_free_memslot_pr(struct kvm_memory_slot *free,
					struct kvm_memory_slot *dont)
1630
{
1631
	return;
1632 1633
}

1634 1635
static int kvmppc_core_create_memslot_pr(struct kvm_memory_slot *slot,
					 unsigned long npages)
1636 1637 1638 1639
{
	return 0;
}

1640

1641
#ifdef CONFIG_PPC64
1642 1643
static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
					 struct kvm_ppc_smmu_info *info)
1644
{
1645 1646 1647 1648
	long int i;
	struct kvm_vcpu *vcpu;

	info->flags = 0;
1649 1650 1651 1652 1653 1654 1655 1656 1657 1658

	/* SLB is always 64 entries */
	info->slb_size = 64;

	/* Standard 4k base page size segment */
	info->sps[0].page_shift = 12;
	info->sps[0].slb_enc = 0;
	info->sps[0].enc[0].page_shift = 12;
	info->sps[0].enc[0].pte_enc = 0;

1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678
	/*
	 * 64k large page size.
	 * We only want to put this in if the CPUs we're emulating
	 * support it, but unfortunately we don't have a vcpu easily
	 * to hand here to test.  Just pick the first vcpu, and if
	 * that doesn't exist yet, report the minimum capability,
	 * i.e., no 64k pages.
	 * 1T segment support goes along with 64k pages.
	 */
	i = 1;
	vcpu = kvm_get_vcpu(kvm, 0);
	if (vcpu && (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) {
		info->flags = KVM_PPC_1T_SEGMENTS;
		info->sps[i].page_shift = 16;
		info->sps[i].slb_enc = SLB_VSID_L | SLB_VSID_LP_01;
		info->sps[i].enc[0].page_shift = 16;
		info->sps[i].enc[0].pte_enc = 1;
		++i;
	}

1679
	/* Standard 16M large page size segment */
1680 1681 1682 1683
	info->sps[i].page_shift = 24;
	info->sps[i].slb_enc = SLB_VSID_L;
	info->sps[i].enc[0].page_shift = 24;
	info->sps[i].enc[0].pte_enc = 0;
1684

1685 1686
	return 0;
}
1687 1688 1689
#else
static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
					 struct kvm_ppc_smmu_info *info)
1690
{
1691 1692
	/* We should not get called */
	BUG();
1693
}
1694
#endif /* CONFIG_PPC64 */
1695

1696 1697 1698
static unsigned int kvm_global_user_count = 0;
static DEFINE_SPINLOCK(kvm_global_user_count_lock);

1699
static int kvmppc_core_init_vm_pr(struct kvm *kvm)
1700
{
1701
	mutex_init(&kvm->arch.hpt_mutex);
1702

1703 1704 1705 1706 1707
#ifdef CONFIG_PPC_BOOK3S_64
	/* Start out with the default set of hcalls enabled */
	kvmppc_pr_init_default_hcalls(kvm);
#endif

1708 1709 1710
	if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
		spin_lock(&kvm_global_user_count_lock);
		if (++kvm_global_user_count == 1)
1711
			pseries_disable_reloc_on_exc();
1712 1713
		spin_unlock(&kvm_global_user_count_lock);
	}
1714 1715 1716
	return 0;
}

1717
static void kvmppc_core_destroy_vm_pr(struct kvm *kvm)
1718
{
1719 1720 1721
#ifdef CONFIG_PPC64
	WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
#endif
1722 1723 1724 1725 1726

	if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
		spin_lock(&kvm_global_user_count_lock);
		BUG_ON(kvm_global_user_count == 0);
		if (--kvm_global_user_count == 0)
1727
			pseries_enable_reloc_on_exc();
1728 1729
		spin_unlock(&kvm_global_user_count_lock);
	}
1730 1731
}

1732
static int kvmppc_core_check_processor_compat_pr(void)
1733
{
1734 1735 1736 1737 1738
	/*
	 * Disable KVM for Power9 untill the required bits merged.
	 */
	if (cpu_has_feature(CPU_FTR_ARCH_300))
		return -EIO;
1739 1740
	return 0;
}
1741

1742 1743 1744 1745 1746
static long kvm_arch_vm_ioctl_pr(struct file *filp,
				 unsigned int ioctl, unsigned long arg)
{
	return -ENOTTY;
}
1747

1748
static struct kvmppc_ops kvm_ops_pr = {
1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779
	.get_sregs = kvm_arch_vcpu_ioctl_get_sregs_pr,
	.set_sregs = kvm_arch_vcpu_ioctl_set_sregs_pr,
	.get_one_reg = kvmppc_get_one_reg_pr,
	.set_one_reg = kvmppc_set_one_reg_pr,
	.vcpu_load   = kvmppc_core_vcpu_load_pr,
	.vcpu_put    = kvmppc_core_vcpu_put_pr,
	.set_msr     = kvmppc_set_msr_pr,
	.vcpu_run    = kvmppc_vcpu_run_pr,
	.vcpu_create = kvmppc_core_vcpu_create_pr,
	.vcpu_free   = kvmppc_core_vcpu_free_pr,
	.check_requests = kvmppc_core_check_requests_pr,
	.get_dirty_log = kvm_vm_ioctl_get_dirty_log_pr,
	.flush_memslot = kvmppc_core_flush_memslot_pr,
	.prepare_memory_region = kvmppc_core_prepare_memory_region_pr,
	.commit_memory_region = kvmppc_core_commit_memory_region_pr,
	.unmap_hva = kvm_unmap_hva_pr,
	.unmap_hva_range = kvm_unmap_hva_range_pr,
	.age_hva  = kvm_age_hva_pr,
	.test_age_hva = kvm_test_age_hva_pr,
	.set_spte_hva = kvm_set_spte_hva_pr,
	.mmu_destroy  = kvmppc_mmu_destroy_pr,
	.free_memslot = kvmppc_core_free_memslot_pr,
	.create_memslot = kvmppc_core_create_memslot_pr,
	.init_vm = kvmppc_core_init_vm_pr,
	.destroy_vm = kvmppc_core_destroy_vm_pr,
	.get_smmu_info = kvm_vm_ioctl_get_smmu_info_pr,
	.emulate_op = kvmppc_core_emulate_op_pr,
	.emulate_mtspr = kvmppc_core_emulate_mtspr_pr,
	.emulate_mfspr = kvmppc_core_emulate_mfspr_pr,
	.fast_vcpu_kick = kvm_vcpu_kick,
	.arch_vm_ioctl  = kvm_arch_vm_ioctl_pr,
1780 1781 1782
#ifdef CONFIG_PPC_BOOK3S_64
	.hcall_implemented = kvmppc_hcall_impl_pr,
#endif
1783 1784
};

1785 1786

int kvmppc_book3s_init_pr(void)
1787 1788 1789
{
	int r;

1790 1791
	r = kvmppc_core_check_processor_compat_pr();
	if (r < 0)
1792 1793
		return r;

1794 1795
	kvm_ops_pr.owner = THIS_MODULE;
	kvmppc_pr_ops = &kvm_ops_pr;
1796

1797
	r = kvmppc_mmu_hpte_sysinit();
1798 1799 1800
	return r;
}

1801
void kvmppc_book3s_exit_pr(void)
1802
{
1803
	kvmppc_pr_ops = NULL;
1804 1805 1806
	kvmppc_mmu_hpte_sysexit();
}

1807 1808 1809 1810 1811
/*
 * We only support separate modules for book3s 64
 */
#ifdef CONFIG_PPC_BOOK3S_64

1812 1813
module_init(kvmppc_book3s_init_pr);
module_exit(kvmppc_book3s_exit_pr);
1814 1815

MODULE_LICENSE("GPL");
1816 1817
MODULE_ALIAS_MISCDEV(KVM_MINOR);
MODULE_ALIAS("devname:kvm");
1818
#endif