book3s_pr.c 49.8 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
/*
 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
 *
 * Authors:
 *    Alexander Graf <agraf@suse.de>
 *    Kevin Wolf <mail@kevin-wolf.de>
 *    Paul Mackerras <paulus@samba.org>
 *
 * Description:
 * Functions relating to running KVM on Book 3S processors where
 * we don't have access to hypervisor mode, and we run the guest
 * in problem state (user mode).
 *
 * This file is derived from arch/powerpc/kvm/44x.c,
 * by Hollis Blanchard <hollisb@us.ibm.com>.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 */

#include <linux/kvm_host.h>
23
#include <linux/export.h>
24 25 26 27 28 29 30
#include <linux/err.h>
#include <linux/slab.h>

#include <asm/reg.h>
#include <asm/cputable.h>
#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
31
#include <linux/uaccess.h>
32 33 34 35
#include <asm/io.h>
#include <asm/kvm_ppc.h>
#include <asm/kvm_book3s.h>
#include <asm/mmu_context.h>
36
#include <asm/switch_to.h>
37
#include <asm/firmware.h>
38
#include <asm/setup.h>
39 40 41 42
#include <linux/gfp.h>
#include <linux/sched.h>
#include <linux/vmalloc.h>
#include <linux/highmem.h>
43
#include <linux/module.h>
44
#include <linux/miscdevice.h>
45
#include <asm/asm-prototypes.h>
46
#include <asm/tm.h>
47

48
#include "book3s.h"
49 50 51

#define CREATE_TRACE_POINTS
#include "trace_pr.h"
52 53 54 55 56 57

/* #define EXIT_DEBUG */
/* #define DEBUG_EXT */

static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
			     ulong msr);
58
static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac);
59 60 61 62 63 64

/* Some compatibility defines */
#ifdef CONFIG_PPC_BOOK3S_32
#define MSR_USER32 MSR_USER
#define MSR_USER64 MSR_USER
#define HW_PAGE_SIZE PAGE_SIZE
65
#define HPTE_R_M   _PAGE_COHERENT
66 67
#endif

68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96
static bool kvmppc_is_split_real(struct kvm_vcpu *vcpu)
{
	ulong msr = kvmppc_get_msr(vcpu);
	return (msr & (MSR_IR|MSR_DR)) == MSR_DR;
}

static void kvmppc_fixup_split_real(struct kvm_vcpu *vcpu)
{
	ulong msr = kvmppc_get_msr(vcpu);
	ulong pc = kvmppc_get_pc(vcpu);

	/* We are in DR only split real mode */
	if ((msr & (MSR_IR|MSR_DR)) != MSR_DR)
		return;

	/* We have not fixed up the guest already */
	if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK)
		return;

	/* The code is in fixupable address space */
	if (pc & SPLIT_HACK_MASK)
		return;

	vcpu->arch.hflags |= BOOK3S_HFLAG_SPLIT_HACK;
	kvmppc_set_pc(vcpu, pc | SPLIT_HACK_OFFS);
}

void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu);

97
static void kvmppc_core_vcpu_load_pr(struct kvm_vcpu *vcpu, int cpu)
98 99
{
#ifdef CONFIG_PPC_BOOK3S_64
100 101 102
	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
	memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb));
	svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max;
103
	svcpu->in_use = 0;
104
	svcpu_put(svcpu);
105
#endif
106 107 108 109 110 111

	/* Disable AIL if supported */
	if (cpu_has_feature(CPU_FTR_HVMODE) &&
	    cpu_has_feature(CPU_FTR_ARCH_207S))
		mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~LPCR_AIL);

112
	vcpu->cpu = smp_processor_id();
113
#ifdef CONFIG_PPC_BOOK3S_32
114
	current->thread.kvm_shadow_vcpu = vcpu->arch.shadow_vcpu;
115
#endif
116 117 118

	if (kvmppc_is_split_real(vcpu))
		kvmppc_fixup_split_real(vcpu);
119 120

	kvmppc_restore_tm_pr(vcpu);
121 122
}

123
static void kvmppc_core_vcpu_put_pr(struct kvm_vcpu *vcpu)
124 125
{
#ifdef CONFIG_PPC_BOOK3S_64
126
	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
127
	if (svcpu->in_use) {
128
		kvmppc_copy_from_svcpu(vcpu);
129
	}
130 131 132
	memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb));
	to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max;
	svcpu_put(svcpu);
133 134
#endif

135 136 137
	if (kvmppc_is_split_real(vcpu))
		kvmppc_unfixup_split_real(vcpu);

138
	kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);
139
	kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
140
	kvmppc_save_tm_pr(vcpu);
141 142 143 144 145 146

	/* Enable AIL if supported */
	if (cpu_has_feature(CPU_FTR_HVMODE) &&
	    cpu_has_feature(CPU_FTR_ARCH_207S))
		mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_AIL_3);

147
	vcpu->cpu = -1;
148 149
}

150
/* Copy data needed by real-mode code from vcpu to shadow vcpu */
151
void kvmppc_copy_to_svcpu(struct kvm_vcpu *vcpu)
152
{
153 154
	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);

155 156 157 158 159 160 161 162 163 164 165 166 167 168
	svcpu->gpr[0] = vcpu->arch.regs.gpr[0];
	svcpu->gpr[1] = vcpu->arch.regs.gpr[1];
	svcpu->gpr[2] = vcpu->arch.regs.gpr[2];
	svcpu->gpr[3] = vcpu->arch.regs.gpr[3];
	svcpu->gpr[4] = vcpu->arch.regs.gpr[4];
	svcpu->gpr[5] = vcpu->arch.regs.gpr[5];
	svcpu->gpr[6] = vcpu->arch.regs.gpr[6];
	svcpu->gpr[7] = vcpu->arch.regs.gpr[7];
	svcpu->gpr[8] = vcpu->arch.regs.gpr[8];
	svcpu->gpr[9] = vcpu->arch.regs.gpr[9];
	svcpu->gpr[10] = vcpu->arch.regs.gpr[10];
	svcpu->gpr[11] = vcpu->arch.regs.gpr[11];
	svcpu->gpr[12] = vcpu->arch.regs.gpr[12];
	svcpu->gpr[13] = vcpu->arch.regs.gpr[13];
169
	svcpu->cr  = vcpu->arch.cr;
170 171 172 173
	svcpu->xer = vcpu->arch.regs.xer;
	svcpu->ctr = vcpu->arch.regs.ctr;
	svcpu->lr  = vcpu->arch.regs.link;
	svcpu->pc  = vcpu->arch.regs.nip;
174 175 176
#ifdef CONFIG_PPC_BOOK3S_64
	svcpu->shadow_fscr = vcpu->arch.shadow_fscr;
#endif
177 178 179 180 181
	/*
	 * Now also save the current time base value. We use this
	 * to find the guest purr and spurr value.
	 */
	vcpu->arch.entry_tb = get_tb();
182
	vcpu->arch.entry_vtb = get_vtb();
183 184
	if (cpu_has_feature(CPU_FTR_ARCH_207S))
		vcpu->arch.entry_ic = mfspr(SPRN_IC);
185
	svcpu->in_use = true;
186 187

	svcpu_put(svcpu);
188 189
}

190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212
static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
{
	ulong guest_msr = kvmppc_get_msr(vcpu);
	ulong smsr = guest_msr;

	/* Guest MSR values */
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE |
		MSR_TM | MSR_TS_MASK;
#else
	smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE;
#endif
	/* Process MSR values */
	smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
	/* External providers the guest reserved */
	smsr |= (guest_msr & vcpu->arch.guest_owned_ext);
	/* 64-bit Process MSR values */
#ifdef CONFIG_PPC_BOOK3S_64
	smsr |= MSR_ISF | MSR_HV;
#endif
	vcpu->arch.shadow_msr = smsr;
}

213
/* Copy data touched by real-mode code from shadow vcpu back to vcpu */
214
void kvmppc_copy_from_svcpu(struct kvm_vcpu *vcpu)
215
{
216
	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
217 218 219
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	ulong old_msr;
#endif
220 221 222 223 224 225 226 227

	/*
	 * Maybe we were already preempted and synced the svcpu from
	 * our preempt notifiers. Don't bother touching this svcpu then.
	 */
	if (!svcpu->in_use)
		goto out;

228 229 230 231 232 233 234 235 236 237 238 239 240 241
	vcpu->arch.regs.gpr[0] = svcpu->gpr[0];
	vcpu->arch.regs.gpr[1] = svcpu->gpr[1];
	vcpu->arch.regs.gpr[2] = svcpu->gpr[2];
	vcpu->arch.regs.gpr[3] = svcpu->gpr[3];
	vcpu->arch.regs.gpr[4] = svcpu->gpr[4];
	vcpu->arch.regs.gpr[5] = svcpu->gpr[5];
	vcpu->arch.regs.gpr[6] = svcpu->gpr[6];
	vcpu->arch.regs.gpr[7] = svcpu->gpr[7];
	vcpu->arch.regs.gpr[8] = svcpu->gpr[8];
	vcpu->arch.regs.gpr[9] = svcpu->gpr[9];
	vcpu->arch.regs.gpr[10] = svcpu->gpr[10];
	vcpu->arch.regs.gpr[11] = svcpu->gpr[11];
	vcpu->arch.regs.gpr[12] = svcpu->gpr[12];
	vcpu->arch.regs.gpr[13] = svcpu->gpr[13];
242
	vcpu->arch.cr  = svcpu->cr;
243 244 245 246
	vcpu->arch.regs.xer = svcpu->xer;
	vcpu->arch.regs.ctr = svcpu->ctr;
	vcpu->arch.regs.link  = svcpu->lr;
	vcpu->arch.regs.nip  = svcpu->pc;
247 248 249 250
	vcpu->arch.shadow_srr1 = svcpu->shadow_srr1;
	vcpu->arch.fault_dar   = svcpu->fault_dar;
	vcpu->arch.fault_dsisr = svcpu->fault_dsisr;
	vcpu->arch.last_inst   = svcpu->last_inst;
251 252 253
#ifdef CONFIG_PPC_BOOK3S_64
	vcpu->arch.shadow_fscr = svcpu->shadow_fscr;
#endif
254 255 256 257 258
	/*
	 * Update purr and spurr using time base on exit.
	 */
	vcpu->arch.purr += get_tb() - vcpu->arch.entry_tb;
	vcpu->arch.spurr += get_tb() - vcpu->arch.entry_tb;
259
	to_book3s(vcpu)->vtb += get_vtb() - vcpu->arch.entry_vtb;
260 261
	if (cpu_has_feature(CPU_FTR_ARCH_207S))
		vcpu->arch.ic += mfspr(SPRN_IC) - vcpu->arch.entry_ic;
262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285

#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	/*
	 * Unlike other MSR bits, MSR[TS]bits can be changed at guest without
	 * notifying host:
	 *  modified by unprivileged instructions like "tbegin"/"tend"/
	 * "tresume"/"tsuspend" in PR KVM guest.
	 *
	 * It is necessary to sync here to calculate a correct shadow_msr.
	 *
	 * privileged guest's tbegin will be failed at present. So we
	 * only take care of problem state guest.
	 */
	old_msr = kvmppc_get_msr(vcpu);
	if (unlikely((old_msr & MSR_PR) &&
		(vcpu->arch.shadow_srr1 & (MSR_TS_MASK)) !=
				(old_msr & (MSR_TS_MASK)))) {
		old_msr &= ~(MSR_TS_MASK);
		old_msr |= (vcpu->arch.shadow_srr1 & (MSR_TS_MASK));
		kvmppc_set_msr_fast(vcpu, old_msr);
		kvmppc_recalc_shadow_msr(vcpu);
	}
#endif

286 287 288
	svcpu->in_use = false;

out:
289
	svcpu_put(svcpu);
290 291
}

292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
static inline void kvmppc_save_tm_sprs(struct kvm_vcpu *vcpu)
{
	tm_enable();
	vcpu->arch.tfhar = mfspr(SPRN_TFHAR);
	vcpu->arch.texasr = mfspr(SPRN_TEXASR);
	vcpu->arch.tfiar = mfspr(SPRN_TFIAR);
	tm_disable();
}

static inline void kvmppc_restore_tm_sprs(struct kvm_vcpu *vcpu)
{
	tm_enable();
	mtspr(SPRN_TFHAR, vcpu->arch.tfhar);
	mtspr(SPRN_TEXASR, vcpu->arch.texasr);
	mtspr(SPRN_TFIAR, vcpu->arch.tfiar);
	tm_disable();
}

311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332
/* loadup math bits which is enabled at kvmppc_get_msr() but not enabled at
 * hardware.
 */
static void kvmppc_handle_lost_math_exts(struct kvm_vcpu *vcpu)
{
	ulong exit_nr;
	ulong ext_diff = (kvmppc_get_msr(vcpu) & ~vcpu->arch.guest_owned_ext) &
		(MSR_FP | MSR_VEC | MSR_VSX);

	if (!ext_diff)
		return;

	if (ext_diff == MSR_FP)
		exit_nr = BOOK3S_INTERRUPT_FP_UNAVAIL;
	else if (ext_diff == MSR_VEC)
		exit_nr = BOOK3S_INTERRUPT_ALTIVEC;
	else
		exit_nr = BOOK3S_INTERRUPT_VSX;

	kvmppc_handle_ext(vcpu, exit_nr, ext_diff);
}

333 334 335 336 337 338 339
void kvmppc_save_tm_pr(struct kvm_vcpu *vcpu)
{
	if (!(MSR_TM_ACTIVE(kvmppc_get_msr(vcpu)))) {
		kvmppc_save_tm_sprs(vcpu);
		return;
	}

340 341
	kvmppc_giveup_ext(vcpu, MSR_VSX);

342 343 344 345 346 347 348 349 350
	preempt_disable();
	_kvmppc_save_tm_pr(vcpu, mfmsr());
	preempt_enable();
}

void kvmppc_restore_tm_pr(struct kvm_vcpu *vcpu)
{
	if (!MSR_TM_ACTIVE(kvmppc_get_msr(vcpu))) {
		kvmppc_restore_tm_sprs(vcpu);
351 352
		if (kvmppc_get_msr(vcpu) & MSR_TM)
			kvmppc_handle_lost_math_exts(vcpu);
353 354 355 356 357 358
		return;
	}

	preempt_disable();
	_kvmppc_restore_tm_pr(vcpu, kvmppc_get_msr(vcpu));
	preempt_enable();
359 360 361 362

	if (kvmppc_get_msr(vcpu) & MSR_TM)
		kvmppc_handle_lost_math_exts(vcpu);

363
}
364 365
#endif

366
static int kvmppc_core_check_requests_pr(struct kvm_vcpu *vcpu)
367
{
368 369
	int r = 1; /* Indicate we want to get back into the guest */

370 371 372 373
	/* We misuse TLB_FLUSH to indicate that we want to clear
	   all shadow cache entries */
	if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
		kvmppc_mmu_pte_flush(vcpu, 0, 0);
374 375

	return r;
376 377
}

378
/************* MMU Notifiers *************/
379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407
static void do_kvm_unmap_hva(struct kvm *kvm, unsigned long start,
			     unsigned long end)
{
	long i;
	struct kvm_vcpu *vcpu;
	struct kvm_memslots *slots;
	struct kvm_memory_slot *memslot;

	slots = kvm_memslots(kvm);
	kvm_for_each_memslot(memslot, slots) {
		unsigned long hva_start, hva_end;
		gfn_t gfn, gfn_end;

		hva_start = max(start, memslot->userspace_addr);
		hva_end = min(end, memslot->userspace_addr +
					(memslot->npages << PAGE_SHIFT));
		if (hva_start >= hva_end)
			continue;
		/*
		 * {gfn(page) | page intersects with [hva_start, hva_end)} =
		 * {gfn, gfn+1, ..., gfn_end-1}.
		 */
		gfn = hva_to_gfn_memslot(hva_start, memslot);
		gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
		kvm_for_each_vcpu(i, vcpu, kvm)
			kvmppc_mmu_pte_pflush(vcpu, gfn << PAGE_SHIFT,
					      gfn_end << PAGE_SHIFT);
	}
}
408

409 410
static int kvm_unmap_hva_range_pr(struct kvm *kvm, unsigned long start,
				  unsigned long end)
411
{
412
	do_kvm_unmap_hva(kvm, start, end);
413 414 415 416

	return 0;
}

A
Andres Lagar-Cavilla 已提交
417 418
static int kvm_age_hva_pr(struct kvm *kvm, unsigned long start,
			  unsigned long end)
419 420 421 422 423
{
	/* XXX could be more clever ;) */
	return 0;
}

424
static int kvm_test_age_hva_pr(struct kvm *kvm, unsigned long hva)
425 426 427 428 429
{
	/* XXX could be more clever ;) */
	return 0;
}

430
static void kvm_set_spte_hva_pr(struct kvm *kvm, unsigned long hva, pte_t pte)
431 432
{
	/* The page will get remapped properly on its next fault */
433
	do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE);
434 435 436 437
}

/*****************************************/

438
static void kvmppc_set_msr_pr(struct kvm_vcpu *vcpu, u64 msr)
439
{
440
	ulong old_msr = kvmppc_get_msr(vcpu);
441 442 443 444 445 446

#ifdef EXIT_DEBUG
	printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);
#endif

	msr &= to_book3s(vcpu)->msr_mask;
447
	kvmppc_set_msr_fast(vcpu, msr);
448 449 450 451 452
	kvmppc_recalc_shadow_msr(vcpu);

	if (msr & MSR_POW) {
		if (!vcpu->arch.pending_exceptions) {
			kvm_vcpu_block(vcpu);
453
			kvm_clear_request(KVM_REQ_UNHALT, vcpu);
454 455 456 457
			vcpu->stat.halt_wakeup++;

			/* Unset POW bit after we woke up */
			msr &= ~MSR_POW;
458
			kvmppc_set_msr_fast(vcpu, msr);
459 460 461
		}
	}

462 463 464 465 466
	if (kvmppc_is_split_real(vcpu))
		kvmppc_fixup_split_real(vcpu);
	else
		kvmppc_unfixup_split_real(vcpu);

467
	if ((kvmppc_get_msr(vcpu) & (MSR_PR|MSR_IR|MSR_DR)) !=
468 469 470 471 472 473 474 475 476 477 478 479 480 481 482
		   (old_msr & (MSR_PR|MSR_IR|MSR_DR))) {
		kvmppc_mmu_flush_segments(vcpu);
		kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));

		/* Preload magic page segment when in kernel mode */
		if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) {
			struct kvm_vcpu_arch *a = &vcpu->arch;

			if (msr & MSR_DR)
				kvmppc_mmu_map_segment(vcpu, a->magic_page_ea);
			else
				kvmppc_mmu_map_segment(vcpu, a->magic_page_pa);
		}
	}

483 484 485 486 487 488 489 490 491 492 493 494 495 496 497
	/*
	 * When switching from 32 to 64-bit, we may have a stale 32-bit
	 * magic page around, we need to flush it. Typically 32-bit magic
	 * page will be instanciated when calling into RTAS. Note: We
	 * assume that such transition only happens while in kernel mode,
	 * ie, we never transition from user 32-bit to kernel 64-bit with
	 * a 32-bit magic page around.
	 */
	if (vcpu->arch.magic_page_pa &&
	    !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) {
		/* going from RTAS to normal kernel code */
		kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa,
				     ~0xFFFUL);
	}

498
	/* Preload FPU if it's enabled */
499
	if (kvmppc_get_msr(vcpu) & MSR_FP)
500
		kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
501 502 503 504 505

#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	if (kvmppc_get_msr(vcpu) & MSR_TM)
		kvmppc_handle_lost_math_exts(vcpu);
#endif
506 507
}

508
void kvmppc_set_pvr_pr(struct kvm_vcpu *vcpu, u32 pvr)
509 510 511 512 513 514 515 516
{
	u32 host_pvr;

	vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB;
	vcpu->arch.pvr = pvr;
#ifdef CONFIG_PPC_BOOK3S_64
	if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
		kvmppc_mmu_book3s_64_init(vcpu);
517 518
		if (!to_book3s(vcpu)->hior_explicit)
			to_book3s(vcpu)->hior = 0xfff00000;
519
		to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
520
		vcpu->arch.cpu_type = KVM_CPU_3S_64;
521 522 523 524
	} else
#endif
	{
		kvmppc_mmu_book3s_32_init(vcpu);
525 526
		if (!to_book3s(vcpu)->hior_explicit)
			to_book3s(vcpu)->hior = 0;
527
		to_book3s(vcpu)->msr_mask = 0xffffffffULL;
528
		vcpu->arch.cpu_type = KVM_CPU_3S_32;
529 530
	}

531 532
	kvmppc_sanity_check(vcpu);

533 534 535 536 537 538 539 540 541 542 543 544
	/* If we are in hypervisor level on 970, we can tell the CPU to
	 * treat DCBZ as 32 bytes store */
	vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32;
	if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) &&
	    !strcmp(cur_cpu_spec->platform, "ppc970"))
		vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;

	/* Cell performs badly if MSR_FEx are set. So let's hope nobody
	   really needs them in a VM on Cell and force disable them. */
	if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be"))
		to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1);

545 546 547 548 549 550 551 552 553 554 555 556
	/*
	 * If they're asking for POWER6 or later, set the flag
	 * indicating that we can do multiple large page sizes
	 * and 1TB segments.
	 * Also set the flag that indicates that tlbie has the large
	 * page bit in the RB operand instead of the instruction.
	 */
	switch (PVR_VER(pvr)) {
	case PVR_POWER6:
	case PVR_POWER7:
	case PVR_POWER7p:
	case PVR_POWER8:
557 558
	case PVR_POWER8E:
	case PVR_POWER8NVL:
559 560 561 562 563
		vcpu->arch.hflags |= BOOK3S_HFLAG_MULTI_PGSIZE |
			BOOK3S_HFLAG_NEW_TLBIE;
		break;
	}

564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603
#ifdef CONFIG_PPC_BOOK3S_32
	/* 32 bit Book3S always has 32 byte dcbz */
	vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
#endif

	/* On some CPUs we can execute paired single operations natively */
	asm ( "mfpvr %0" : "=r"(host_pvr));
	switch (host_pvr) {
	case 0x00080200:	/* lonestar 2.0 */
	case 0x00088202:	/* lonestar 2.2 */
	case 0x70000100:	/* gekko 1.0 */
	case 0x00080100:	/* gekko 2.0 */
	case 0x00083203:	/* gekko 2.3a */
	case 0x00083213:	/* gekko 2.3b */
	case 0x00083204:	/* gekko 2.4 */
	case 0x00083214:	/* gekko 2.4e (8SE) - retail HW2 */
	case 0x00087200:	/* broadway */
		vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS;
		/* Enable HID2.PSE - in case we need it later */
		mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29));
	}
}

/* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To
 * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to
 * emulate 32 bytes dcbz length.
 *
 * The Book3s_64 inventors also realized this case and implemented a special bit
 * in the HID5 register, which is a hypervisor ressource. Thus we can't use it.
 *
 * My approach here is to patch the dcbz instruction on executing pages.
 */
static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
{
	struct page *hpage;
	u64 hpage_offset;
	u32 *page;
	int i;

	hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
604
	if (is_error_page(hpage))
605 606 607 608 609 610 611
		return;

	hpage_offset = pte->raddr & ~PAGE_MASK;
	hpage_offset &= ~0xFFFULL;
	hpage_offset /= 4;

	get_page(hpage);
612
	page = kmap_atomic(hpage);
613 614 615

	/* patch dcbz into reserved instruction, so we trap */
	for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++)
616 617
		if ((be32_to_cpu(page[i]) & 0xff0007ff) == INS_DCBZ)
			page[i] &= cpu_to_be32(0xfffffff7);
618

619
	kunmap_atomic(page);
620 621 622
	put_page(hpage);
}

623
static bool kvmppc_visible_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
624 625 626
{
	ulong mp_pa = vcpu->arch.magic_page_pa;

627
	if (!(kvmppc_get_msr(vcpu) & MSR_SF))
628 629
		mp_pa = (uint32_t)mp_pa;

630 631
	gpa &= ~0xFFFULL;
	if (unlikely(mp_pa) && unlikely((mp_pa & KVM_PAM) == (gpa & KVM_PAM))) {
632
		return true;
633 634
	}

635
	return kvm_is_visible_gfn(vcpu->kvm, gpa >> PAGE_SHIFT);
636 637 638 639 640 641
}

int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
			    ulong eaddr, int vec)
{
	bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE);
642
	bool iswrite = false;
643 644 645
	int r = RESUME_GUEST;
	int relocated;
	int page_found = 0;
646
	struct kvmppc_pte pte = { 0 };
647 648
	bool dr = (kvmppc_get_msr(vcpu) & MSR_DR) ? true : false;
	bool ir = (kvmppc_get_msr(vcpu) & MSR_IR) ? true : false;
649 650 651
	u64 vsid;

	relocated = data ? dr : ir;
652 653
	if (data && (vcpu->arch.fault_dsisr & DSISR_ISSTORE))
		iswrite = true;
654 655 656

	/* Resolve real address if translation turned on */
	if (relocated) {
657
		page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data, iswrite);
658 659 660 661 662 663 664
	} else {
		pte.may_execute = true;
		pte.may_read = true;
		pte.may_write = true;
		pte.raddr = eaddr & KVM_PAM;
		pte.eaddr = eaddr;
		pte.vpage = eaddr >> 12;
665
		pte.page_size = MMU_PAGE_64K;
666
		pte.wimg = HPTE_R_M;
667 668
	}

669
	switch (kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) {
670 671 672 673
	case 0:
		pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12));
		break;
	case MSR_DR:
674 675 676 677 678
		if (!data &&
		    (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
		    ((pte.raddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
			pte.raddr &= ~SPLIT_HACK_MASK;
		/* fall through */
679 680 681
	case MSR_IR:
		vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);

682
		if ((kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) == MSR_DR)
683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704
			pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12));
		else
			pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12));
		pte.vpage |= vsid;

		if (vsid == -1)
			page_found = -EINVAL;
		break;
	}

	if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
	   (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
		/*
		 * If we do the dcbz hack, we have to NX on every execution,
		 * so we can patch the executing code. This renders our guest
		 * NX-less.
		 */
		pte.may_execute = !data;
	}

	if (page_found == -ENOENT) {
		/* Page not found in guest PTE entries */
705 706 707 708 709
		u64 ssrr1 = vcpu->arch.shadow_srr1;
		u64 msr = kvmppc_get_msr(vcpu);
		kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
		kvmppc_set_dsisr(vcpu, vcpu->arch.fault_dsisr);
		kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
710 711 712
		kvmppc_book3s_queue_irqprio(vcpu, vec);
	} else if (page_found == -EPERM) {
		/* Storage protection */
713 714 715 716 717 718 719
		u32 dsisr = vcpu->arch.fault_dsisr;
		u64 ssrr1 = vcpu->arch.shadow_srr1;
		u64 msr = kvmppc_get_msr(vcpu);
		kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
		dsisr = (dsisr & ~DSISR_NOHPTE) | DSISR_PROTFAULT;
		kvmppc_set_dsisr(vcpu, dsisr);
		kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
720 721 722
		kvmppc_book3s_queue_irqprio(vcpu, vec);
	} else if (page_found == -EINVAL) {
		/* Page not found in guest SLB */
723
		kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
724
		kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80);
725
	} else if (kvmppc_visible_gpa(vcpu, pte.raddr)) {
726 727 728 729 730 731 732 733
		if (data && !(vcpu->arch.fault_dsisr & DSISR_NOHPTE)) {
			/*
			 * There is already a host HPTE there, presumably
			 * a read-only one for a page the guest thinks
			 * is writable, so get rid of it first.
			 */
			kvmppc_mmu_unmap_page(vcpu, &pte);
		}
734
		/* The guest's PTE is not mapped yet. Map on the host */
735 736 737 738 739
		if (kvmppc_mmu_map_page(vcpu, &pte, iswrite) == -EIO) {
			/* Exit KVM if mapping failed */
			run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
			return RESUME_HOST;
		}
740 741 742
		if (data)
			vcpu->stat.sp_storage++;
		else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
743
			 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32)))
744 745 746 747 748
			kvmppc_patch_dcbz(vcpu, &pte);
	} else {
		/* MMIO */
		vcpu->stat.mmio_exits++;
		vcpu->arch.paddr_accessed = pte.raddr;
749
		vcpu->arch.vaddr_accessed = pte.eaddr;
750 751 752 753 754 755 756 757 758 759 760 761 762
		r = kvmppc_emulate_mmio(run, vcpu);
		if ( r == RESUME_HOST_NV )
			r = RESUME_HOST;
	}

	return r;
}

/* Give up external provider (FPU, Altivec, VSX) */
void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
{
	struct thread_struct *t = &current->thread;

763 764 765 766 767 768 769 770 771
	/*
	 * VSX instructions can access FP and vector registers, so if
	 * we are giving up VSX, make sure we give up FP and VMX as well.
	 */
	if (msr & MSR_VSX)
		msr |= MSR_FP | MSR_VEC;

	msr &= vcpu->arch.guest_owned_ext;
	if (!msr)
772 773 774 775 776 777
		return;

#ifdef DEBUG_EXT
	printk(KERN_INFO "Giving up ext 0x%lx\n", msr);
#endif

778 779 780 781
	if (msr & MSR_FP) {
		/*
		 * Note that on CPUs with VSX, giveup_fpu stores
		 * both the traditional FP registers and the added VSX
782
		 * registers into thread.fp_state.fpr[].
783
		 */
784
		if (t->regs->msr & MSR_FP)
785
			giveup_fpu(current);
786
		t->fp_save_area = NULL;
787 788
	}

789
#ifdef CONFIG_ALTIVEC
790
	if (msr & MSR_VEC) {
791 792
		if (current->thread.regs->msr & MSR_VEC)
			giveup_altivec(current);
793
		t->vr_save_area = NULL;
794
	}
795
#endif
796

797
	vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX);
798 799 800
	kvmppc_recalc_shadow_msr(vcpu);
}

801 802 803 804 805 806 807 808
/* Give up facility (TAR / EBB / DSCR) */
static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac)
{
#ifdef CONFIG_PPC_BOOK3S_64
	if (!(vcpu->arch.shadow_fscr & (1ULL << fac))) {
		/* Facility not available to the guest, ignore giveup request*/
		return;
	}
809 810 811 812 813 814 815 816

	switch (fac) {
	case FSCR_TAR_LG:
		vcpu->arch.tar = mfspr(SPRN_TAR);
		mtspr(SPRN_TAR, current->thread.tar);
		vcpu->arch.shadow_fscr &= ~FSCR_TAR;
		break;
	}
817 818 819
#endif
}

820 821 822 823 824 825 826 827 828 829
/* Handle external providers (FPU, Altivec, VSX) */
static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
			     ulong msr)
{
	struct thread_struct *t = &current->thread;

	/* When we have paired singles, we emulate in software */
	if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)
		return RESUME_GUEST;

830
	if (!(kvmppc_get_msr(vcpu) & msr)) {
831 832 833 834
		kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
		return RESUME_GUEST;
	}

835 836 837 838 839 840 841 842 843 844 845 846 847 848 849
	if (msr == MSR_VSX) {
		/* No VSX?  Give an illegal instruction interrupt */
#ifdef CONFIG_VSX
		if (!cpu_has_feature(CPU_FTR_VSX))
#endif
		{
			kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
			return RESUME_GUEST;
		}

		/*
		 * We have to load up all the FP and VMX registers before
		 * we can let the guest use VSX instructions.
		 */
		msr = MSR_FP | MSR_VEC | MSR_VSX;
850 851
	}

852 853 854 855 856
	/* See if we already own all the ext(s) needed */
	msr &= ~vcpu->arch.guest_owned_ext;
	if (!msr)
		return RESUME_GUEST;

857 858 859 860
#ifdef DEBUG_EXT
	printk(KERN_INFO "Loading up ext 0x%lx\n", msr);
#endif

861
	if (msr & MSR_FP) {
862
		preempt_disable();
863
		enable_kernel_fp();
864
		load_fp_state(&vcpu->arch.fp);
865
		disable_kernel_fp();
866
		t->fp_save_area = &vcpu->arch.fp;
867
		preempt_enable();
868 869 870
	}

	if (msr & MSR_VEC) {
871
#ifdef CONFIG_ALTIVEC
872
		preempt_disable();
873
		enable_kernel_altivec();
874
		load_vr_state(&vcpu->arch.vr);
875
		disable_kernel_altivec();
876
		t->vr_save_area = &vcpu->arch.vr;
877
		preempt_enable();
878 879 880
#endif
	}

881
	t->regs->msr |= msr;
882 883 884 885 886 887
	vcpu->arch.guest_owned_ext |= msr;
	kvmppc_recalc_shadow_msr(vcpu);

	return RESUME_GUEST;
}

888 889 890 891 892 893 894 895 896 897 898 899
/*
 * Kernel code using FP or VMX could have flushed guest state to
 * the thread_struct; if so, get it back now.
 */
static void kvmppc_handle_lost_ext(struct kvm_vcpu *vcpu)
{
	unsigned long lost_ext;

	lost_ext = vcpu->arch.guest_owned_ext & ~current->thread.regs->msr;
	if (!lost_ext)
		return;

900
	if (lost_ext & MSR_FP) {
901
		preempt_disable();
902
		enable_kernel_fp();
903
		load_fp_state(&vcpu->arch.fp);
904
		disable_kernel_fp();
905
		preempt_enable();
906
	}
907
#ifdef CONFIG_ALTIVEC
908
	if (lost_ext & MSR_VEC) {
909
		preempt_disable();
910
		enable_kernel_altivec();
911
		load_vr_state(&vcpu->arch.vr);
912
		disable_kernel_altivec();
913
		preempt_enable();
914
	}
915
#endif
916 917 918
	current->thread.regs->msr |= lost_ext;
}

919 920
#ifdef CONFIG_PPC_BOOK3S_64

921
void kvmppc_trigger_fac_interrupt(struct kvm_vcpu *vcpu, ulong fac)
922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944
{
	/* Inject the Interrupt Cause field and trigger a guest interrupt */
	vcpu->arch.fscr &= ~(0xffULL << 56);
	vcpu->arch.fscr |= (fac << 56);
	kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FAC_UNAVAIL);
}

static void kvmppc_emulate_fac(struct kvm_vcpu *vcpu, ulong fac)
{
	enum emulation_result er = EMULATE_FAIL;

	if (!(kvmppc_get_msr(vcpu) & MSR_PR))
		er = kvmppc_emulate_instruction(vcpu->run, vcpu);

	if ((er != EMULATE_DONE) && (er != EMULATE_AGAIN)) {
		/* Couldn't emulate, trigger interrupt in guest */
		kvmppc_trigger_fac_interrupt(vcpu, fac);
	}
}

/* Enable facilities (TAR, EBB, DSCR) for the guest */
static int kvmppc_handle_fac(struct kvm_vcpu *vcpu, ulong fac)
{
945
	bool guest_fac_enabled;
946 947
	BUG_ON(!cpu_has_feature(CPU_FTR_ARCH_207S));

948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965
	/*
	 * Not every facility is enabled by FSCR bits, check whether the
	 * guest has this facility enabled at all.
	 */
	switch (fac) {
	case FSCR_TAR_LG:
	case FSCR_EBB_LG:
		guest_fac_enabled = (vcpu->arch.fscr & (1ULL << fac));
		break;
	case FSCR_TM_LG:
		guest_fac_enabled = kvmppc_get_msr(vcpu) & MSR_TM;
		break;
	default:
		guest_fac_enabled = false;
		break;
	}

	if (!guest_fac_enabled) {
966 967 968 969 970 971
		/* Facility not enabled by the guest */
		kvmppc_trigger_fac_interrupt(vcpu, fac);
		return RESUME_GUEST;
	}

	switch (fac) {
972 973 974 975 976 977
	case FSCR_TAR_LG:
		/* TAR switching isn't lazy in Linux yet */
		current->thread.tar = mfspr(SPRN_TAR);
		mtspr(SPRN_TAR, vcpu->arch.tar);
		vcpu->arch.shadow_fscr |= FSCR_TAR;
		break;
978 979 980 981 982 983 984
	default:
		kvmppc_emulate_fac(vcpu, fac);
		break;
	}

	return RESUME_GUEST;
}
985 986 987 988 989 990 991 992 993

void kvmppc_set_fscr(struct kvm_vcpu *vcpu, u64 fscr)
{
	if ((vcpu->arch.fscr & FSCR_TAR) && !(fscr & FSCR_TAR)) {
		/* TAR got dropped, drop it in shadow too */
		kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
	}
	vcpu->arch.fscr = fscr;
}
994 995
#endif

996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013
static void kvmppc_setup_debug(struct kvm_vcpu *vcpu)
{
	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
		u64 msr = kvmppc_get_msr(vcpu);

		kvmppc_set_msr(vcpu, msr | MSR_SE);
	}
}

static void kvmppc_clear_debug(struct kvm_vcpu *vcpu)
{
	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
		u64 msr = kvmppc_get_msr(vcpu);

		kvmppc_set_msr(vcpu, msr & ~MSR_SE);
	}
}

1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076
static int kvmppc_exit_pr_progint(struct kvm_run *run, struct kvm_vcpu *vcpu,
				  unsigned int exit_nr)
{
	enum emulation_result er;
	ulong flags;
	u32 last_inst;
	int emul, r;

	/*
	 * shadow_srr1 only contains valid flags if we came here via a program
	 * exception. The other exceptions (emulation assist, FP unavailable,
	 * etc.) do not provide flags in SRR1, so use an illegal-instruction
	 * exception when injecting a program interrupt into the guest.
	 */
	if (exit_nr == BOOK3S_INTERRUPT_PROGRAM)
		flags = vcpu->arch.shadow_srr1 & 0x1f0000ull;
	else
		flags = SRR1_PROGILL;

	emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
	if (emul != EMULATE_DONE)
		return RESUME_GUEST;

	if (kvmppc_get_msr(vcpu) & MSR_PR) {
#ifdef EXIT_DEBUG
		pr_info("Userspace triggered 0x700 exception at\n 0x%lx (0x%x)\n",
			kvmppc_get_pc(vcpu), last_inst);
#endif
		if ((last_inst & 0xff0007ff) != (INS_DCBZ & 0xfffffff7)) {
			kvmppc_core_queue_program(vcpu, flags);
			return RESUME_GUEST;
		}
	}

	vcpu->stat.emulated_inst_exits++;
	er = kvmppc_emulate_instruction(run, vcpu);
	switch (er) {
	case EMULATE_DONE:
		r = RESUME_GUEST_NV;
		break;
	case EMULATE_AGAIN:
		r = RESUME_GUEST;
		break;
	case EMULATE_FAIL:
		pr_crit("%s: emulation at %lx failed (%08x)\n",
			__func__, kvmppc_get_pc(vcpu), last_inst);
		kvmppc_core_queue_program(vcpu, flags);
		r = RESUME_GUEST;
		break;
	case EMULATE_DO_MMIO:
		run->exit_reason = KVM_EXIT_MMIO;
		r = RESUME_HOST_NV;
		break;
	case EMULATE_EXIT_USER:
		r = RESUME_HOST_NV;
		break;
	default:
		BUG();
	}

	return r;
}

1077 1078
int kvmppc_handle_exit_pr(struct kvm_run *run, struct kvm_vcpu *vcpu,
			  unsigned int exit_nr)
1079 1080
{
	int r = RESUME_HOST;
1081
	int s;
1082 1083 1084 1085 1086 1087

	vcpu->stat.sum_exits++;

	run->exit_reason = KVM_EXIT_UNKNOWN;
	run->ready_for_interrupt_injection = 1;

1088
	/* We get here with MSR.EE=1 */
1089

1090
	trace_kvm_exit(exit_nr, vcpu);
1091
	guest_exit();
1092

1093 1094
	switch (exit_nr) {
	case BOOK3S_INTERRUPT_INST_STORAGE:
1095
	{
1096
		ulong shadow_srr1 = vcpu->arch.shadow_srr1;
1097 1098
		vcpu->stat.pf_instruc++;

1099 1100 1101
		if (kvmppc_is_split_real(vcpu))
			kvmppc_fixup_split_real(vcpu);

1102 1103 1104
#ifdef CONFIG_PPC_BOOK3S_32
		/* We set segments as unused segments when invalidating them. So
		 * treat the respective fault as segment fault. */
1105 1106 1107 1108 1109 1110
		{
			struct kvmppc_book3s_shadow_vcpu *svcpu;
			u32 sr;

			svcpu = svcpu_get(vcpu);
			sr = svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT];
1111
			svcpu_put(svcpu);
1112 1113 1114 1115 1116
			if (sr == SR_INVALID) {
				kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
				r = RESUME_GUEST;
				break;
			}
1117 1118 1119 1120
		}
#endif

		/* only care about PTEG not found errors, but leave NX alone */
1121
		if (shadow_srr1 & 0x40000000) {
1122
			int idx = srcu_read_lock(&vcpu->kvm->srcu);
1123
			r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr);
1124
			srcu_read_unlock(&vcpu->kvm->srcu, idx);
1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135
			vcpu->stat.sp_instruc++;
		} else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
			  (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
			/*
			 * XXX If we do the dcbz hack we use the NX bit to flush&patch the page,
			 *     so we can't use the NX bit inside the guest. Let's cross our fingers,
			 *     that no guest that needs the dcbz hack does NX.
			 */
			kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
			r = RESUME_GUEST;
		} else {
1136 1137 1138
			u64 msr = kvmppc_get_msr(vcpu);
			msr |= shadow_srr1 & 0x58000000;
			kvmppc_set_msr_fast(vcpu, msr);
1139 1140 1141 1142
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
1143
	}
1144 1145 1146
	case BOOK3S_INTERRUPT_DATA_STORAGE:
	{
		ulong dar = kvmppc_get_fault_dar(vcpu);
1147
		u32 fault_dsisr = vcpu->arch.fault_dsisr;
1148 1149 1150 1151 1152
		vcpu->stat.pf_storage++;

#ifdef CONFIG_PPC_BOOK3S_32
		/* We set segments as unused segments when invalidating them. So
		 * treat the respective fault as segment fault. */
1153 1154 1155 1156 1157 1158
		{
			struct kvmppc_book3s_shadow_vcpu *svcpu;
			u32 sr;

			svcpu = svcpu_get(vcpu);
			sr = svcpu->sr[dar >> SID_SHIFT];
1159
			svcpu_put(svcpu);
1160 1161 1162 1163 1164
			if (sr == SR_INVALID) {
				kvmppc_mmu_map_segment(vcpu, dar);
				r = RESUME_GUEST;
				break;
			}
1165 1166 1167
		}
#endif

1168 1169 1170 1171 1172 1173 1174
		/*
		 * We need to handle missing shadow PTEs, and
		 * protection faults due to us mapping a page read-only
		 * when the guest thinks it is writable.
		 */
		if (fault_dsisr & (DSISR_NOHPTE | DSISR_PROTFAULT)) {
			int idx = srcu_read_lock(&vcpu->kvm->srcu);
1175
			r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr);
1176
			srcu_read_unlock(&vcpu->kvm->srcu, idx);
1177
		} else {
1178 1179
			kvmppc_set_dar(vcpu, dar);
			kvmppc_set_dsisr(vcpu, fault_dsisr);
1180 1181 1182 1183 1184 1185 1186
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
	}
	case BOOK3S_INTERRUPT_DATA_SEGMENT:
		if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) {
1187
			kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201
			kvmppc_book3s_queue_irqprio(vcpu,
				BOOK3S_INTERRUPT_DATA_SEGMENT);
		}
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_INST_SEGMENT:
		if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) {
			kvmppc_book3s_queue_irqprio(vcpu,
				BOOK3S_INTERRUPT_INST_SEGMENT);
		}
		r = RESUME_GUEST;
		break;
	/* We're good on these - the host merely wanted to get our attention */
	case BOOK3S_INTERRUPT_DECREMENTER:
1202
	case BOOK3S_INTERRUPT_HV_DECREMENTER:
1203
	case BOOK3S_INTERRUPT_DOORBELL:
1204
	case BOOK3S_INTERRUPT_H_DOORBELL:
1205 1206 1207 1208
		vcpu->stat.dec_exits++;
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_EXTERNAL:
1209 1210
	case BOOK3S_INTERRUPT_EXTERNAL_LEVEL:
	case BOOK3S_INTERRUPT_EXTERNAL_HV:
1211 1212 1213 1214 1215 1216 1217
		vcpu->stat.ext_intr_exits++;
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_PERFMON:
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_PROGRAM:
1218
	case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
1219
		r = kvmppc_exit_pr_progint(run, vcpu, exit_nr);
1220 1221
		break;
	case BOOK3S_INTERRUPT_SYSCALL:
1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236
	{
		u32 last_sc;
		int emul;

		/* Get last sc for papr */
		if (vcpu->arch.papr_enabled) {
			/* The sc instuction points SRR0 to the next inst */
			emul = kvmppc_get_last_inst(vcpu, INST_SC, &last_sc);
			if (emul != EMULATE_DONE) {
				kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) - 4);
				r = RESUME_GUEST;
				break;
			}
		}

1237
		if (vcpu->arch.papr_enabled &&
1238
		    (last_sc == 0x44000022) &&
1239
		    !(kvmppc_get_msr(vcpu) & MSR_PR)) {
1240 1241 1242 1243
			/* SC 1 papr hypercalls */
			ulong cmd = kvmppc_get_gpr(vcpu, 3);
			int i;

1244
#ifdef CONFIG_PPC_BOOK3S_64
1245 1246 1247 1248
			if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
				r = RESUME_GUEST;
				break;
			}
1249
#endif
1250 1251 1252 1253 1254 1255 1256 1257 1258 1259

			run->papr_hcall.nr = cmd;
			for (i = 0; i < 9; ++i) {
				ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
				run->papr_hcall.args[i] = gpr;
			}
			run->exit_reason = KVM_EXIT_PAPR_HCALL;
			vcpu->arch.hcall_needed = 1;
			r = RESUME_HOST;
		} else if (vcpu->arch.osi_enabled &&
1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270
		    (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) &&
		    (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) {
			/* MOL hypercalls */
			u64 *gprs = run->osi.gprs;
			int i;

			run->exit_reason = KVM_EXIT_OSI;
			for (i = 0; i < 32; i++)
				gprs[i] = kvmppc_get_gpr(vcpu, i);
			vcpu->arch.osi_needed = 1;
			r = RESUME_HOST_NV;
1271
		} else if (!(kvmppc_get_msr(vcpu) & MSR_PR) &&
1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282
		    (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
			/* KVM PV hypercalls */
			kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
			r = RESUME_GUEST;
		} else {
			/* Guest syscalls */
			vcpu->stat.syscall_exits++;
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
1283
	}
1284 1285 1286 1287 1288
	case BOOK3S_INTERRUPT_FP_UNAVAIL:
	case BOOK3S_INTERRUPT_ALTIVEC:
	case BOOK3S_INTERRUPT_VSX:
	{
		int ext_msr = 0;
1289 1290 1291 1292 1293
		int emul;
		u32 last_inst;

		if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) {
			/* Do paired single instruction emulation */
1294 1295
			emul = kvmppc_get_last_inst(vcpu, INST_GENERIC,
						    &last_inst);
1296
			if (emul == EMULATE_DONE)
1297
				r = kvmppc_exit_pr_progint(run, vcpu, exit_nr);
1298 1299
			else
				r = RESUME_GUEST;
1300

1301
			break;
1302 1303
		}

1304 1305 1306 1307
		/* Enable external provider */
		switch (exit_nr) {
		case BOOK3S_INTERRUPT_FP_UNAVAIL:
			ext_msr = MSR_FP;
1308
			break;
1309 1310 1311

		case BOOK3S_INTERRUPT_ALTIVEC:
			ext_msr = MSR_VEC;
1312
			break;
1313 1314 1315

		case BOOK3S_INTERRUPT_VSX:
			ext_msr = MSR_VSX;
1316 1317
			break;
		}
1318 1319

		r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr);
1320 1321 1322
		break;
	}
	case BOOK3S_INTERRUPT_ALIGNMENT:
1323
	{
1324 1325
		u32 last_inst;
		int emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1326 1327

		if (emul == EMULATE_DONE) {
1328 1329 1330 1331 1332 1333 1334 1335 1336
			u32 dsisr;
			u64 dar;

			dsisr = kvmppc_alignment_dsisr(vcpu, last_inst);
			dar = kvmppc_alignment_dar(vcpu, last_inst);

			kvmppc_set_dsisr(vcpu, dsisr);
			kvmppc_set_dar(vcpu, dar);

1337 1338 1339 1340
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
		}
		r = RESUME_GUEST;
		break;
1341
	}
1342 1343 1344 1345 1346 1347
#ifdef CONFIG_PPC_BOOK3S_64
	case BOOK3S_INTERRUPT_FAC_UNAVAIL:
		kvmppc_handle_fac(vcpu, vcpu->arch.shadow_fscr >> 56);
		r = RESUME_GUEST;
		break;
#endif
1348 1349 1350 1351
	case BOOK3S_INTERRUPT_MACHINE_CHECK:
		kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
		r = RESUME_GUEST;
		break;
1352 1353 1354 1355 1356 1357 1358 1359 1360
	case BOOK3S_INTERRUPT_TRACE:
		if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
			run->exit_reason = KVM_EXIT_DEBUG;
			r = RESUME_HOST;
		} else {
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
1361
	default:
1362
	{
1363
		ulong shadow_srr1 = vcpu->arch.shadow_srr1;
1364 1365
		/* Ugh - bork here! What did we get? */
		printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n",
1366
			exit_nr, kvmppc_get_pc(vcpu), shadow_srr1);
1367 1368 1369 1370
		r = RESUME_HOST;
		BUG();
		break;
	}
1371
	}
1372 1373 1374 1375 1376

	if (!(r & RESUME_HOST)) {
		/* To avoid clobbering exit_reason, only check for signals if
		 * we aren't already exiting to userspace for some other
		 * reason. */
1377 1378 1379 1380 1381 1382 1383

		/*
		 * Interrupts could be timers for the guest which we have to
		 * inject again, so let's postpone them until we're in the guest
		 * and if we really did time things so badly, then we just exit
		 * again due to a host external interrupt.
		 */
1384
		s = kvmppc_prepare_to_enter(vcpu);
S
Scott Wood 已提交
1385
		if (s <= 0)
1386
			r = s;
S
Scott Wood 已提交
1387 1388
		else {
			/* interrupts now hard-disabled */
1389
			kvmppc_fix_ee_before_entry();
1390
		}
S
Scott Wood 已提交
1391

1392
		kvmppc_handle_lost_ext(vcpu);
1393 1394 1395 1396 1397 1398 1399
	}

	trace_kvm_book3s_reenter(r, vcpu);

	return r;
}

1400 1401
static int kvm_arch_vcpu_ioctl_get_sregs_pr(struct kvm_vcpu *vcpu,
					    struct kvm_sregs *sregs)
1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415
{
	struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
	int i;

	sregs->pvr = vcpu->arch.pvr;

	sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1;
	if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
		for (i = 0; i < 64; i++) {
			sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i;
			sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
		}
	} else {
		for (i = 0; i < 16; i++)
1416
			sregs->u.s.ppc32.sr[i] = kvmppc_get_sr(vcpu, i);
1417 1418 1419 1420 1421 1422 1423 1424 1425 1426

		for (i = 0; i < 8; i++) {
			sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw;
			sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw;
		}
	}

	return 0;
}

1427 1428
static int kvm_arch_vcpu_ioctl_set_sregs_pr(struct kvm_vcpu *vcpu,
					    struct kvm_sregs *sregs)
1429 1430 1431 1432
{
	struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
	int i;

1433
	kvmppc_set_pvr_pr(vcpu, sregs->pvr);
1434 1435

	vcpu3s->sdr1 = sregs->u.s.sdr1;
1436
#ifdef CONFIG_PPC_BOOK3S_64
1437
	if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
1438 1439 1440 1441
		/* Flush all SLB entries */
		vcpu->arch.mmu.slbmte(vcpu, 0, 0);
		vcpu->arch.mmu.slbia(vcpu);

1442
		for (i = 0; i < 64; i++) {
1443 1444 1445 1446 1447
			u64 rb = sregs->u.s.ppc64.slb[i].slbe;
			u64 rs = sregs->u.s.ppc64.slb[i].slbv;

			if (rb & SLB_ESID_V)
				vcpu->arch.mmu.slbmte(vcpu, rs, rb);
1448
		}
1449 1450 1451
	} else
#endif
	{
1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472
		for (i = 0; i < 16; i++) {
			vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]);
		}
		for (i = 0; i < 8; i++) {
			kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false,
				       (u32)sregs->u.s.ppc32.ibat[i]);
			kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true,
				       (u32)(sregs->u.s.ppc32.ibat[i] >> 32));
			kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false,
				       (u32)sregs->u.s.ppc32.dbat[i]);
			kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true,
				       (u32)(sregs->u.s.ppc32.dbat[i] >> 32));
		}
	}

	/* Flush the MMU after messing with the segments */
	kvmppc_mmu_pte_flush(vcpu, 0, 0);

	return 0;
}

1473 1474
static int kvmppc_get_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
				 union kvmppc_one_reg *val)
1475
{
1476
	int r = 0;
1477

1478
	switch (id) {
1479 1480 1481
	case KVM_REG_PPC_DEBUG_INST:
		*val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
		break;
1482
	case KVM_REG_PPC_HIOR:
1483
		*val = get_reg_val(id, to_book3s(vcpu)->hior);
1484
		break;
1485 1486 1487
	case KVM_REG_PPC_VTB:
		*val = get_reg_val(id, to_book3s(vcpu)->vtb);
		break;
1488
	case KVM_REG_PPC_LPCR:
1489
	case KVM_REG_PPC_LPCR_64:
1490 1491 1492 1493 1494 1495 1496 1497
		/*
		 * We are only interested in the LPCR_ILE bit
		 */
		if (vcpu->arch.intr_msr & MSR_LE)
			*val = get_reg_val(id, LPCR_ILE);
		else
			*val = get_reg_val(id, 0);
		break;
1498
	default:
1499
		r = -EINVAL;
1500 1501 1502 1503 1504 1505
		break;
	}

	return r;
}

1506 1507 1508 1509 1510 1511 1512 1513
static void kvmppc_set_lpcr_pr(struct kvm_vcpu *vcpu, u64 new_lpcr)
{
	if (new_lpcr & LPCR_ILE)
		vcpu->arch.intr_msr |= MSR_LE;
	else
		vcpu->arch.intr_msr &= ~MSR_LE;
}

1514 1515
static int kvmppc_set_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
				 union kvmppc_one_reg *val)
1516
{
1517
	int r = 0;
1518

1519
	switch (id) {
1520
	case KVM_REG_PPC_HIOR:
1521 1522
		to_book3s(vcpu)->hior = set_reg_val(id, *val);
		to_book3s(vcpu)->hior_explicit = true;
1523
		break;
1524 1525 1526
	case KVM_REG_PPC_VTB:
		to_book3s(vcpu)->vtb = set_reg_val(id, *val);
		break;
1527
	case KVM_REG_PPC_LPCR:
1528
	case KVM_REG_PPC_LPCR_64:
1529 1530
		kvmppc_set_lpcr_pr(vcpu, set_reg_val(id, *val));
		break;
1531
	default:
1532
		r = -EINVAL;
1533 1534 1535 1536 1537 1538
		break;
	}

	return r;
}

1539 1540
static struct kvm_vcpu *kvmppc_core_vcpu_create_pr(struct kvm *kvm,
						   unsigned int id)
1541 1542 1543 1544 1545 1546
{
	struct kvmppc_vcpu_book3s *vcpu_book3s;
	struct kvm_vcpu *vcpu;
	int err = -ENOMEM;
	unsigned long p;

1547 1548
	vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
	if (!vcpu)
1549 1550 1551 1552 1553
		goto out;

	vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s));
	if (!vcpu_book3s)
		goto free_vcpu;
1554
	vcpu->arch.book3s = vcpu_book3s;
1555

1556
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1557 1558 1559 1560
	vcpu->arch.shadow_vcpu =
		kzalloc(sizeof(*vcpu->arch.shadow_vcpu), GFP_KERNEL);
	if (!vcpu->arch.shadow_vcpu)
		goto free_vcpu3s;
1561
#endif
1562 1563 1564 1565 1566

	err = kvm_vcpu_init(vcpu, kvm, id);
	if (err)
		goto free_shadow_vcpu;

1567
	err = -ENOMEM;
1568 1569 1570
	p = __get_free_page(GFP_KERNEL|__GFP_ZERO);
	if (!p)
		goto uninit_vcpu;
1571
	vcpu->arch.shared = (void *)p;
1572
#ifdef CONFIG_PPC_BOOK3S_64
1573 1574 1575 1576 1577 1578 1579
	/* Always start the shared struct in native endian mode */
#ifdef __BIG_ENDIAN__
        vcpu->arch.shared_big_endian = true;
#else
        vcpu->arch.shared_big_endian = false;
#endif

1580 1581 1582 1583 1584
	/*
	 * Default to the same as the host if we're on sufficiently
	 * recent machine that we have 1TB segments;
	 * otherwise default to PPC970FX.
	 */
1585
	vcpu->arch.pvr = 0x3C0301;
1586 1587
	if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
		vcpu->arch.pvr = mfspr(SPRN_PVR);
1588
	vcpu->arch.intr_msr = MSR_SF;
1589 1590 1591 1592
#else
	/* default to book3s_32 (750) */
	vcpu->arch.pvr = 0x84202;
#endif
1593
	kvmppc_set_pvr_pr(vcpu, vcpu->arch.pvr);
1594 1595
	vcpu->arch.slb_nr = 64;

1596
	vcpu->arch.shadow_msr = MSR_USER64 & ~MSR_LE;
1597 1598 1599 1600 1601 1602 1603 1604 1605 1606

	err = kvmppc_mmu_init(vcpu);
	if (err < 0)
		goto uninit_vcpu;

	return vcpu;

uninit_vcpu:
	kvm_vcpu_uninit(vcpu);
free_shadow_vcpu:
1607
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1608 1609
	kfree(vcpu->arch.shadow_vcpu);
free_vcpu3s:
1610
#endif
1611
	vfree(vcpu_book3s);
1612 1613
free_vcpu:
	kmem_cache_free(kvm_vcpu_cache, vcpu);
1614 1615 1616 1617
out:
	return ERR_PTR(err);
}

1618
static void kvmppc_core_vcpu_free_pr(struct kvm_vcpu *vcpu)
1619 1620 1621 1622 1623
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);

	free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
	kvm_vcpu_uninit(vcpu);
1624
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1625 1626
	kfree(vcpu->arch.shadow_vcpu);
#endif
1627
	vfree(vcpu_book3s);
1628
	kmem_cache_free(kvm_vcpu_cache, vcpu);
1629 1630
}

1631
static int kvmppc_vcpu_run_pr(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1632 1633 1634 1635 1636 1637
{
	int ret;
#ifdef CONFIG_ALTIVEC
	unsigned long uninitialized_var(vrsave);
#endif

1638 1639 1640
	/* Check if we can run the vcpu at all */
	if (!vcpu->arch.sane) {
		kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1641 1642
		ret = -EINVAL;
		goto out;
1643 1644
	}

1645 1646
	kvmppc_setup_debug(vcpu);

1647 1648 1649 1650 1651 1652
	/*
	 * Interrupts could be timers for the guest which we have to inject
	 * again, so let's postpone them until we're in the guest and if we
	 * really did time things so badly, then we just exit again due to
	 * a host external interrupt.
	 */
1653
	ret = kvmppc_prepare_to_enter(vcpu);
S
Scott Wood 已提交
1654
	if (ret <= 0)
1655
		goto out;
S
Scott Wood 已提交
1656
	/* interrupts now hard-disabled */
1657

A
Anton Blanchard 已提交
1658 1659
	/* Save FPU, Altivec and VSX state */
	giveup_all(current);
1660 1661

	/* Preload FPU if it's enabled */
1662
	if (kvmppc_get_msr(vcpu) & MSR_FP)
1663 1664
		kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);

1665
	kvmppc_fix_ee_before_entry();
1666 1667 1668

	ret = __kvmppc_vcpu_run(kvm_run, vcpu);

1669 1670
	kvmppc_clear_debug(vcpu);

1671
	/* No need for guest_exit. It's done in handle_exit.
1672
	   We also get here with interrupts enabled. */
1673 1674

	/* Make sure we save the guest FPU/Altivec/VSX state */
1675 1676
	kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);

1677 1678 1679
	/* Make sure we save the guest TAR/EBB/DSCR state */
	kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);

1680
out:
1681
	vcpu->mode = OUTSIDE_GUEST_MODE;
1682 1683 1684
	return ret;
}

1685 1686 1687
/*
 * Get (and clear) the dirty memory log for a memory slot.
 */
1688 1689
static int kvm_vm_ioctl_get_dirty_log_pr(struct kvm *kvm,
					 struct kvm_dirty_log *log)
1690
{
1691
	struct kvm_memslots *slots;
1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706
	struct kvm_memory_slot *memslot;
	struct kvm_vcpu *vcpu;
	ulong ga, ga_end;
	int is_dirty = 0;
	int r;
	unsigned long n;

	mutex_lock(&kvm->slots_lock);

	r = kvm_get_dirty_log(kvm, log, &is_dirty);
	if (r)
		goto out;

	/* If nothing is dirty, don't bother messing with page tables. */
	if (is_dirty) {
1707 1708
		slots = kvm_memslots(kvm);
		memslot = id_to_memslot(slots, log->slot);
1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725

		ga = memslot->base_gfn << PAGE_SHIFT;
		ga_end = ga + (memslot->npages << PAGE_SHIFT);

		kvm_for_each_vcpu(n, vcpu, kvm)
			kvmppc_mmu_pte_pflush(vcpu, ga, ga_end);

		n = kvm_dirty_bitmap_bytes(memslot);
		memset(memslot->dirty_bitmap, 0, n);
	}

	r = 0;
out:
	mutex_unlock(&kvm->slots_lock);
	return r;
}

1726 1727
static void kvmppc_core_flush_memslot_pr(struct kvm *kvm,
					 struct kvm_memory_slot *memslot)
1728
{
1729 1730
	return;
}
1731

1732 1733
static int kvmppc_core_prepare_memory_region_pr(struct kvm *kvm,
					struct kvm_memory_slot *memslot,
1734
					const struct kvm_userspace_memory_region *mem)
1735
{
1736 1737 1738
	return 0;
}

1739
static void kvmppc_core_commit_memory_region_pr(struct kvm *kvm,
1740
				const struct kvm_userspace_memory_region *mem,
1741 1742
				const struct kvm_memory_slot *old,
				const struct kvm_memory_slot *new)
1743
{
1744
	return;
1745 1746
}

1747 1748
static void kvmppc_core_free_memslot_pr(struct kvm_memory_slot *free,
					struct kvm_memory_slot *dont)
1749
{
1750
	return;
1751 1752
}

1753 1754
static int kvmppc_core_create_memslot_pr(struct kvm_memory_slot *slot,
					 unsigned long npages)
1755 1756 1757 1758
{
	return 0;
}

1759

1760
#ifdef CONFIG_PPC64
1761 1762
static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
					 struct kvm_ppc_smmu_info *info)
1763
{
1764 1765 1766 1767
	long int i;
	struct kvm_vcpu *vcpu;

	info->flags = 0;
1768 1769 1770 1771 1772 1773 1774 1775 1776 1777

	/* SLB is always 64 entries */
	info->slb_size = 64;

	/* Standard 4k base page size segment */
	info->sps[0].page_shift = 12;
	info->sps[0].slb_enc = 0;
	info->sps[0].enc[0].page_shift = 12;
	info->sps[0].enc[0].pte_enc = 0;

1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797
	/*
	 * 64k large page size.
	 * We only want to put this in if the CPUs we're emulating
	 * support it, but unfortunately we don't have a vcpu easily
	 * to hand here to test.  Just pick the first vcpu, and if
	 * that doesn't exist yet, report the minimum capability,
	 * i.e., no 64k pages.
	 * 1T segment support goes along with 64k pages.
	 */
	i = 1;
	vcpu = kvm_get_vcpu(kvm, 0);
	if (vcpu && (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) {
		info->flags = KVM_PPC_1T_SEGMENTS;
		info->sps[i].page_shift = 16;
		info->sps[i].slb_enc = SLB_VSID_L | SLB_VSID_LP_01;
		info->sps[i].enc[0].page_shift = 16;
		info->sps[i].enc[0].pte_enc = 1;
		++i;
	}

1798
	/* Standard 16M large page size segment */
1799 1800 1801 1802
	info->sps[i].page_shift = 24;
	info->sps[i].slb_enc = SLB_VSID_L;
	info->sps[i].enc[0].page_shift = 24;
	info->sps[i].enc[0].pte_enc = 0;
1803

1804 1805
	return 0;
}
1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816

static int kvm_configure_mmu_pr(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg)
{
	if (!cpu_has_feature(CPU_FTR_ARCH_300))
		return -ENODEV;
	/* Require flags and process table base and size to all be zero. */
	if (cfg->flags || cfg->process_table)
		return -EINVAL;
	return 0;
}

1817 1818 1819
#else
static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
					 struct kvm_ppc_smmu_info *info)
1820
{
1821 1822
	/* We should not get called */
	BUG();
1823
}
1824
#endif /* CONFIG_PPC64 */
1825

1826 1827 1828
static unsigned int kvm_global_user_count = 0;
static DEFINE_SPINLOCK(kvm_global_user_count_lock);

1829
static int kvmppc_core_init_vm_pr(struct kvm *kvm)
1830
{
1831
	mutex_init(&kvm->arch.hpt_mutex);
1832

1833 1834 1835 1836 1837
#ifdef CONFIG_PPC_BOOK3S_64
	/* Start out with the default set of hcalls enabled */
	kvmppc_pr_init_default_hcalls(kvm);
#endif

1838 1839 1840
	if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
		spin_lock(&kvm_global_user_count_lock);
		if (++kvm_global_user_count == 1)
1841
			pseries_disable_reloc_on_exc();
1842 1843
		spin_unlock(&kvm_global_user_count_lock);
	}
1844 1845 1846
	return 0;
}

1847
static void kvmppc_core_destroy_vm_pr(struct kvm *kvm)
1848
{
1849 1850 1851
#ifdef CONFIG_PPC64
	WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
#endif
1852 1853 1854 1855 1856

	if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
		spin_lock(&kvm_global_user_count_lock);
		BUG_ON(kvm_global_user_count == 0);
		if (--kvm_global_user_count == 0)
1857
			pseries_enable_reloc_on_exc();
1858 1859
		spin_unlock(&kvm_global_user_count_lock);
	}
1860 1861
}

1862
static int kvmppc_core_check_processor_compat_pr(void)
1863
{
1864
	/*
1865 1866 1867 1868 1869 1870 1871
	 * PR KVM can work on POWER9 inside a guest partition
	 * running in HPT mode.  It can't work if we are using
	 * radix translation (because radix provides no way for
	 * a process to have unique translations in quadrant 3)
	 * or in a bare-metal HPT-mode host (because POWER9
	 * uses a modified HPTE format which the PR KVM code
	 * has not been adapted to use).
1872
	 */
1873 1874
	if (cpu_has_feature(CPU_FTR_ARCH_300) &&
	    (radix_enabled() || cpu_has_feature(CPU_FTR_HVMODE)))
1875
		return -EIO;
1876 1877
	return 0;
}
1878

1879 1880 1881 1882 1883
static long kvm_arch_vm_ioctl_pr(struct file *filp,
				 unsigned int ioctl, unsigned long arg)
{
	return -ENOTTY;
}
1884

1885
static struct kvmppc_ops kvm_ops_pr = {
1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915
	.get_sregs = kvm_arch_vcpu_ioctl_get_sregs_pr,
	.set_sregs = kvm_arch_vcpu_ioctl_set_sregs_pr,
	.get_one_reg = kvmppc_get_one_reg_pr,
	.set_one_reg = kvmppc_set_one_reg_pr,
	.vcpu_load   = kvmppc_core_vcpu_load_pr,
	.vcpu_put    = kvmppc_core_vcpu_put_pr,
	.set_msr     = kvmppc_set_msr_pr,
	.vcpu_run    = kvmppc_vcpu_run_pr,
	.vcpu_create = kvmppc_core_vcpu_create_pr,
	.vcpu_free   = kvmppc_core_vcpu_free_pr,
	.check_requests = kvmppc_core_check_requests_pr,
	.get_dirty_log = kvm_vm_ioctl_get_dirty_log_pr,
	.flush_memslot = kvmppc_core_flush_memslot_pr,
	.prepare_memory_region = kvmppc_core_prepare_memory_region_pr,
	.commit_memory_region = kvmppc_core_commit_memory_region_pr,
	.unmap_hva_range = kvm_unmap_hva_range_pr,
	.age_hva  = kvm_age_hva_pr,
	.test_age_hva = kvm_test_age_hva_pr,
	.set_spte_hva = kvm_set_spte_hva_pr,
	.mmu_destroy  = kvmppc_mmu_destroy_pr,
	.free_memslot = kvmppc_core_free_memslot_pr,
	.create_memslot = kvmppc_core_create_memslot_pr,
	.init_vm = kvmppc_core_init_vm_pr,
	.destroy_vm = kvmppc_core_destroy_vm_pr,
	.get_smmu_info = kvm_vm_ioctl_get_smmu_info_pr,
	.emulate_op = kvmppc_core_emulate_op_pr,
	.emulate_mtspr = kvmppc_core_emulate_mtspr_pr,
	.emulate_mfspr = kvmppc_core_emulate_mfspr_pr,
	.fast_vcpu_kick = kvm_vcpu_kick,
	.arch_vm_ioctl  = kvm_arch_vm_ioctl_pr,
1916 1917
#ifdef CONFIG_PPC_BOOK3S_64
	.hcall_implemented = kvmppc_hcall_impl_pr,
1918
	.configure_mmu = kvm_configure_mmu_pr,
1919
#endif
1920
	.giveup_ext = kvmppc_giveup_ext,
1921 1922
};

1923 1924

int kvmppc_book3s_init_pr(void)
1925 1926 1927
{
	int r;

1928 1929
	r = kvmppc_core_check_processor_compat_pr();
	if (r < 0)
1930 1931
		return r;

1932 1933
	kvm_ops_pr.owner = THIS_MODULE;
	kvmppc_pr_ops = &kvm_ops_pr;
1934

1935
	r = kvmppc_mmu_hpte_sysinit();
1936 1937 1938
	return r;
}

1939
void kvmppc_book3s_exit_pr(void)
1940
{
1941
	kvmppc_pr_ops = NULL;
1942 1943 1944
	kvmppc_mmu_hpte_sysexit();
}

1945 1946 1947 1948 1949
/*
 * We only support separate modules for book3s 64
 */
#ifdef CONFIG_PPC_BOOK3S_64

1950 1951
module_init(kvmppc_book3s_init_pr);
module_exit(kvmppc_book3s_exit_pr);
1952 1953

MODULE_LICENSE("GPL");
1954 1955
MODULE_ALIAS_MISCDEV(KVM_MINOR);
MODULE_ALIAS("devname:kvm");
1956
#endif