book3s_pr.c 48.5 KB
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/*
 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
 *
 * Authors:
 *    Alexander Graf <agraf@suse.de>
 *    Kevin Wolf <mail@kevin-wolf.de>
 *    Paul Mackerras <paulus@samba.org>
 *
 * Description:
 * Functions relating to running KVM on Book 3S processors where
 * we don't have access to hypervisor mode, and we run the guest
 * in problem state (user mode).
 *
 * This file is derived from arch/powerpc/kvm/44x.c,
 * by Hollis Blanchard <hollisb@us.ibm.com>.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 */

#include <linux/kvm_host.h>
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#include <linux/export.h>
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#include <linux/err.h>
#include <linux/slab.h>

#include <asm/reg.h>
#include <asm/cputable.h>
#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
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#include <linux/uaccess.h>
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#include <asm/io.h>
#include <asm/kvm_ppc.h>
#include <asm/kvm_book3s.h>
#include <asm/mmu_context.h>
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#include <asm/switch_to.h>
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#include <asm/firmware.h>
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#include <asm/setup.h>
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#include <linux/gfp.h>
#include <linux/sched.h>
#include <linux/vmalloc.h>
#include <linux/highmem.h>
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#include <linux/module.h>
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#include <linux/miscdevice.h>
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#include <asm/asm-prototypes.h>
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#include "book3s.h"
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#define CREATE_TRACE_POINTS
#include "trace_pr.h"
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/* #define EXIT_DEBUG */
/* #define DEBUG_EXT */

static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
			     ulong msr);
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static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac);
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/* Some compatibility defines */
#ifdef CONFIG_PPC_BOOK3S_32
#define MSR_USER32 MSR_USER
#define MSR_USER64 MSR_USER
#define HW_PAGE_SIZE PAGE_SIZE
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#define HPTE_R_M   _PAGE_COHERENT
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#endif

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static bool kvmppc_is_split_real(struct kvm_vcpu *vcpu)
{
	ulong msr = kvmppc_get_msr(vcpu);
	return (msr & (MSR_IR|MSR_DR)) == MSR_DR;
}

static void kvmppc_fixup_split_real(struct kvm_vcpu *vcpu)
{
	ulong msr = kvmppc_get_msr(vcpu);
	ulong pc = kvmppc_get_pc(vcpu);

	/* We are in DR only split real mode */
	if ((msr & (MSR_IR|MSR_DR)) != MSR_DR)
		return;

	/* We have not fixed up the guest already */
	if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK)
		return;

	/* The code is in fixupable address space */
	if (pc & SPLIT_HACK_MASK)
		return;

	vcpu->arch.hflags |= BOOK3S_HFLAG_SPLIT_HACK;
	kvmppc_set_pc(vcpu, pc | SPLIT_HACK_OFFS);
}

void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu);

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static void kvmppc_core_vcpu_load_pr(struct kvm_vcpu *vcpu, int cpu)
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{
#ifdef CONFIG_PPC_BOOK3S_64
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	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
	memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb));
	svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max;
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	svcpu->in_use = 0;
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	svcpu_put(svcpu);
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#endif
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	/* Disable AIL if supported */
	if (cpu_has_feature(CPU_FTR_HVMODE) &&
	    cpu_has_feature(CPU_FTR_ARCH_207S))
		mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~LPCR_AIL);

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	vcpu->cpu = smp_processor_id();
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#ifdef CONFIG_PPC_BOOK3S_32
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	current->thread.kvm_shadow_vcpu = vcpu->arch.shadow_vcpu;
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#endif
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	if (kvmppc_is_split_real(vcpu))
		kvmppc_fixup_split_real(vcpu);
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}

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static void kvmppc_core_vcpu_put_pr(struct kvm_vcpu *vcpu)
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{
#ifdef CONFIG_PPC_BOOK3S_64
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	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
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	if (svcpu->in_use) {
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		kvmppc_copy_from_svcpu(vcpu);
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	}
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	memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb));
	to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max;
	svcpu_put(svcpu);
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#endif

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	if (kvmppc_is_split_real(vcpu))
		kvmppc_unfixup_split_real(vcpu);

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	kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);
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	kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
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	/* Enable AIL if supported */
	if (cpu_has_feature(CPU_FTR_HVMODE) &&
	    cpu_has_feature(CPU_FTR_ARCH_207S))
		mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_AIL_3);

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	vcpu->cpu = -1;
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}

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/* Copy data needed by real-mode code from vcpu to shadow vcpu */
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void kvmppc_copy_to_svcpu(struct kvm_vcpu *vcpu)
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{
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	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);

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	svcpu->gpr[0] = vcpu->arch.regs.gpr[0];
	svcpu->gpr[1] = vcpu->arch.regs.gpr[1];
	svcpu->gpr[2] = vcpu->arch.regs.gpr[2];
	svcpu->gpr[3] = vcpu->arch.regs.gpr[3];
	svcpu->gpr[4] = vcpu->arch.regs.gpr[4];
	svcpu->gpr[5] = vcpu->arch.regs.gpr[5];
	svcpu->gpr[6] = vcpu->arch.regs.gpr[6];
	svcpu->gpr[7] = vcpu->arch.regs.gpr[7];
	svcpu->gpr[8] = vcpu->arch.regs.gpr[8];
	svcpu->gpr[9] = vcpu->arch.regs.gpr[9];
	svcpu->gpr[10] = vcpu->arch.regs.gpr[10];
	svcpu->gpr[11] = vcpu->arch.regs.gpr[11];
	svcpu->gpr[12] = vcpu->arch.regs.gpr[12];
	svcpu->gpr[13] = vcpu->arch.regs.gpr[13];
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	svcpu->cr  = vcpu->arch.cr;
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	svcpu->xer = vcpu->arch.regs.xer;
	svcpu->ctr = vcpu->arch.regs.ctr;
	svcpu->lr  = vcpu->arch.regs.link;
	svcpu->pc  = vcpu->arch.regs.nip;
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#ifdef CONFIG_PPC_BOOK3S_64
	svcpu->shadow_fscr = vcpu->arch.shadow_fscr;
#endif
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	/*
	 * Now also save the current time base value. We use this
	 * to find the guest purr and spurr value.
	 */
	vcpu->arch.entry_tb = get_tb();
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	vcpu->arch.entry_vtb = get_vtb();
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	if (cpu_has_feature(CPU_FTR_ARCH_207S))
		vcpu->arch.entry_ic = mfspr(SPRN_IC);
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	svcpu->in_use = true;
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	svcpu_put(svcpu);
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}

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static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
{
	ulong guest_msr = kvmppc_get_msr(vcpu);
	ulong smsr = guest_msr;

	/* Guest MSR values */
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE |
		MSR_TM | MSR_TS_MASK;
#else
	smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE;
#endif
	/* Process MSR values */
	smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
	/* External providers the guest reserved */
	smsr |= (guest_msr & vcpu->arch.guest_owned_ext);
	/* 64-bit Process MSR values */
#ifdef CONFIG_PPC_BOOK3S_64
	smsr |= MSR_ISF | MSR_HV;
#endif
	vcpu->arch.shadow_msr = smsr;
}

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/* Copy data touched by real-mode code from shadow vcpu back to vcpu */
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void kvmppc_copy_from_svcpu(struct kvm_vcpu *vcpu)
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{
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	struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	ulong old_msr;
#endif
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	/*
	 * Maybe we were already preempted and synced the svcpu from
	 * our preempt notifiers. Don't bother touching this svcpu then.
	 */
	if (!svcpu->in_use)
		goto out;

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	vcpu->arch.regs.gpr[0] = svcpu->gpr[0];
	vcpu->arch.regs.gpr[1] = svcpu->gpr[1];
	vcpu->arch.regs.gpr[2] = svcpu->gpr[2];
	vcpu->arch.regs.gpr[3] = svcpu->gpr[3];
	vcpu->arch.regs.gpr[4] = svcpu->gpr[4];
	vcpu->arch.regs.gpr[5] = svcpu->gpr[5];
	vcpu->arch.regs.gpr[6] = svcpu->gpr[6];
	vcpu->arch.regs.gpr[7] = svcpu->gpr[7];
	vcpu->arch.regs.gpr[8] = svcpu->gpr[8];
	vcpu->arch.regs.gpr[9] = svcpu->gpr[9];
	vcpu->arch.regs.gpr[10] = svcpu->gpr[10];
	vcpu->arch.regs.gpr[11] = svcpu->gpr[11];
	vcpu->arch.regs.gpr[12] = svcpu->gpr[12];
	vcpu->arch.regs.gpr[13] = svcpu->gpr[13];
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	vcpu->arch.cr  = svcpu->cr;
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	vcpu->arch.regs.xer = svcpu->xer;
	vcpu->arch.regs.ctr = svcpu->ctr;
	vcpu->arch.regs.link  = svcpu->lr;
	vcpu->arch.regs.nip  = svcpu->pc;
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	vcpu->arch.shadow_srr1 = svcpu->shadow_srr1;
	vcpu->arch.fault_dar   = svcpu->fault_dar;
	vcpu->arch.fault_dsisr = svcpu->fault_dsisr;
	vcpu->arch.last_inst   = svcpu->last_inst;
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#ifdef CONFIG_PPC_BOOK3S_64
	vcpu->arch.shadow_fscr = svcpu->shadow_fscr;
#endif
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	/*
	 * Update purr and spurr using time base on exit.
	 */
	vcpu->arch.purr += get_tb() - vcpu->arch.entry_tb;
	vcpu->arch.spurr += get_tb() - vcpu->arch.entry_tb;
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	to_book3s(vcpu)->vtb += get_vtb() - vcpu->arch.entry_vtb;
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	if (cpu_has_feature(CPU_FTR_ARCH_207S))
		vcpu->arch.ic += mfspr(SPRN_IC) - vcpu->arch.entry_ic;
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	/*
	 * Unlike other MSR bits, MSR[TS]bits can be changed at guest without
	 * notifying host:
	 *  modified by unprivileged instructions like "tbegin"/"tend"/
	 * "tresume"/"tsuspend" in PR KVM guest.
	 *
	 * It is necessary to sync here to calculate a correct shadow_msr.
	 *
	 * privileged guest's tbegin will be failed at present. So we
	 * only take care of problem state guest.
	 */
	old_msr = kvmppc_get_msr(vcpu);
	if (unlikely((old_msr & MSR_PR) &&
		(vcpu->arch.shadow_srr1 & (MSR_TS_MASK)) !=
				(old_msr & (MSR_TS_MASK)))) {
		old_msr &= ~(MSR_TS_MASK);
		old_msr |= (vcpu->arch.shadow_srr1 & (MSR_TS_MASK));
		kvmppc_set_msr_fast(vcpu, old_msr);
		kvmppc_recalc_shadow_msr(vcpu);
	}
#endif

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	svcpu->in_use = false;

out:
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	svcpu_put(svcpu);
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}

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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
static inline void kvmppc_save_tm_sprs(struct kvm_vcpu *vcpu)
{
	tm_enable();
	vcpu->arch.tfhar = mfspr(SPRN_TFHAR);
	vcpu->arch.texasr = mfspr(SPRN_TEXASR);
	vcpu->arch.tfiar = mfspr(SPRN_TFIAR);
	tm_disable();
}

static inline void kvmppc_restore_tm_sprs(struct kvm_vcpu *vcpu)
{
	tm_enable();
	mtspr(SPRN_TFHAR, vcpu->arch.tfhar);
	mtspr(SPRN_TEXASR, vcpu->arch.texasr);
	mtspr(SPRN_TFIAR, vcpu->arch.tfiar);
	tm_disable();
}

#endif

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static int kvmppc_core_check_requests_pr(struct kvm_vcpu *vcpu)
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{
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	int r = 1; /* Indicate we want to get back into the guest */

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	/* We misuse TLB_FLUSH to indicate that we want to clear
	   all shadow cache entries */
	if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
		kvmppc_mmu_pte_flush(vcpu, 0, 0);
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	return r;
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}

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/************* MMU Notifiers *************/
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static void do_kvm_unmap_hva(struct kvm *kvm, unsigned long start,
			     unsigned long end)
{
	long i;
	struct kvm_vcpu *vcpu;
	struct kvm_memslots *slots;
	struct kvm_memory_slot *memslot;

	slots = kvm_memslots(kvm);
	kvm_for_each_memslot(memslot, slots) {
		unsigned long hva_start, hva_end;
		gfn_t gfn, gfn_end;

		hva_start = max(start, memslot->userspace_addr);
		hva_end = min(end, memslot->userspace_addr +
					(memslot->npages << PAGE_SHIFT));
		if (hva_start >= hva_end)
			continue;
		/*
		 * {gfn(page) | page intersects with [hva_start, hva_end)} =
		 * {gfn, gfn+1, ..., gfn_end-1}.
		 */
		gfn = hva_to_gfn_memslot(hva_start, memslot);
		gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
		kvm_for_each_vcpu(i, vcpu, kvm)
			kvmppc_mmu_pte_pflush(vcpu, gfn << PAGE_SHIFT,
					      gfn_end << PAGE_SHIFT);
	}
}
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static int kvm_unmap_hva_range_pr(struct kvm *kvm, unsigned long start,
				  unsigned long end)
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{
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	do_kvm_unmap_hva(kvm, start, end);
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	return 0;
}

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static int kvm_age_hva_pr(struct kvm *kvm, unsigned long start,
			  unsigned long end)
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{
	/* XXX could be more clever ;) */
	return 0;
}

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static int kvm_test_age_hva_pr(struct kvm *kvm, unsigned long hva)
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{
	/* XXX could be more clever ;) */
	return 0;
}

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static void kvm_set_spte_hva_pr(struct kvm *kvm, unsigned long hva, pte_t pte)
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{
	/* The page will get remapped properly on its next fault */
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	do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE);
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}

/*****************************************/

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static void kvmppc_set_msr_pr(struct kvm_vcpu *vcpu, u64 msr)
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{
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	ulong old_msr = kvmppc_get_msr(vcpu);
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#ifdef EXIT_DEBUG
	printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);
#endif

	msr &= to_book3s(vcpu)->msr_mask;
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	kvmppc_set_msr_fast(vcpu, msr);
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	kvmppc_recalc_shadow_msr(vcpu);

	if (msr & MSR_POW) {
		if (!vcpu->arch.pending_exceptions) {
			kvm_vcpu_block(vcpu);
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			kvm_clear_request(KVM_REQ_UNHALT, vcpu);
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			vcpu->stat.halt_wakeup++;

			/* Unset POW bit after we woke up */
			msr &= ~MSR_POW;
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			kvmppc_set_msr_fast(vcpu, msr);
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		}
	}

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	if (kvmppc_is_split_real(vcpu))
		kvmppc_fixup_split_real(vcpu);
	else
		kvmppc_unfixup_split_real(vcpu);

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	if ((kvmppc_get_msr(vcpu) & (MSR_PR|MSR_IR|MSR_DR)) !=
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		   (old_msr & (MSR_PR|MSR_IR|MSR_DR))) {
		kvmppc_mmu_flush_segments(vcpu);
		kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));

		/* Preload magic page segment when in kernel mode */
		if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) {
			struct kvm_vcpu_arch *a = &vcpu->arch;

			if (msr & MSR_DR)
				kvmppc_mmu_map_segment(vcpu, a->magic_page_ea);
			else
				kvmppc_mmu_map_segment(vcpu, a->magic_page_pa);
		}
	}

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	/*
	 * When switching from 32 to 64-bit, we may have a stale 32-bit
	 * magic page around, we need to flush it. Typically 32-bit magic
	 * page will be instanciated when calling into RTAS. Note: We
	 * assume that such transition only happens while in kernel mode,
	 * ie, we never transition from user 32-bit to kernel 64-bit with
	 * a 32-bit magic page around.
	 */
	if (vcpu->arch.magic_page_pa &&
	    !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) {
		/* going from RTAS to normal kernel code */
		kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa,
				     ~0xFFFUL);
	}

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	/* Preload FPU if it's enabled */
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	if (kvmppc_get_msr(vcpu) & MSR_FP)
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		kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
}

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void kvmppc_set_pvr_pr(struct kvm_vcpu *vcpu, u32 pvr)
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{
	u32 host_pvr;

	vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB;
	vcpu->arch.pvr = pvr;
#ifdef CONFIG_PPC_BOOK3S_64
	if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
		kvmppc_mmu_book3s_64_init(vcpu);
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		if (!to_book3s(vcpu)->hior_explicit)
			to_book3s(vcpu)->hior = 0xfff00000;
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		to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
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		vcpu->arch.cpu_type = KVM_CPU_3S_64;
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	} else
#endif
	{
		kvmppc_mmu_book3s_32_init(vcpu);
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		if (!to_book3s(vcpu)->hior_explicit)
			to_book3s(vcpu)->hior = 0;
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		to_book3s(vcpu)->msr_mask = 0xffffffffULL;
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		vcpu->arch.cpu_type = KVM_CPU_3S_32;
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	}

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	kvmppc_sanity_check(vcpu);

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	/* If we are in hypervisor level on 970, we can tell the CPU to
	 * treat DCBZ as 32 bytes store */
	vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32;
	if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) &&
	    !strcmp(cur_cpu_spec->platform, "ppc970"))
		vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;

	/* Cell performs badly if MSR_FEx are set. So let's hope nobody
	   really needs them in a VM on Cell and force disable them. */
	if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be"))
		to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1);

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	/*
	 * If they're asking for POWER6 or later, set the flag
	 * indicating that we can do multiple large page sizes
	 * and 1TB segments.
	 * Also set the flag that indicates that tlbie has the large
	 * page bit in the RB operand instead of the instruction.
	 */
	switch (PVR_VER(pvr)) {
	case PVR_POWER6:
	case PVR_POWER7:
	case PVR_POWER7p:
	case PVR_POWER8:
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	case PVR_POWER8E:
	case PVR_POWER8NVL:
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		vcpu->arch.hflags |= BOOK3S_HFLAG_MULTI_PGSIZE |
			BOOK3S_HFLAG_NEW_TLBIE;
		break;
	}

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#ifdef CONFIG_PPC_BOOK3S_32
	/* 32 bit Book3S always has 32 byte dcbz */
	vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
#endif

	/* On some CPUs we can execute paired single operations natively */
	asm ( "mfpvr %0" : "=r"(host_pvr));
	switch (host_pvr) {
	case 0x00080200:	/* lonestar 2.0 */
	case 0x00088202:	/* lonestar 2.2 */
	case 0x70000100:	/* gekko 1.0 */
	case 0x00080100:	/* gekko 2.0 */
	case 0x00083203:	/* gekko 2.3a */
	case 0x00083213:	/* gekko 2.3b */
	case 0x00083204:	/* gekko 2.4 */
	case 0x00083214:	/* gekko 2.4e (8SE) - retail HW2 */
	case 0x00087200:	/* broadway */
		vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS;
		/* Enable HID2.PSE - in case we need it later */
		mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29));
	}
}

/* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To
 * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to
 * emulate 32 bytes dcbz length.
 *
 * The Book3s_64 inventors also realized this case and implemented a special bit
 * in the HID5 register, which is a hypervisor ressource. Thus we can't use it.
 *
 * My approach here is to patch the dcbz instruction on executing pages.
 */
static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
{
	struct page *hpage;
	u64 hpage_offset;
	u32 *page;
	int i;

	hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
542
	if (is_error_page(hpage))
543 544 545 546 547 548 549
		return;

	hpage_offset = pte->raddr & ~PAGE_MASK;
	hpage_offset &= ~0xFFFULL;
	hpage_offset /= 4;

	get_page(hpage);
550
	page = kmap_atomic(hpage);
551 552 553

	/* patch dcbz into reserved instruction, so we trap */
	for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++)
554 555
		if ((be32_to_cpu(page[i]) & 0xff0007ff) == INS_DCBZ)
			page[i] &= cpu_to_be32(0xfffffff7);
556

557
	kunmap_atomic(page);
558 559 560
	put_page(hpage);
}

561
static bool kvmppc_visible_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
562 563 564
{
	ulong mp_pa = vcpu->arch.magic_page_pa;

565
	if (!(kvmppc_get_msr(vcpu) & MSR_SF))
566 567
		mp_pa = (uint32_t)mp_pa;

568 569
	gpa &= ~0xFFFULL;
	if (unlikely(mp_pa) && unlikely((mp_pa & KVM_PAM) == (gpa & KVM_PAM))) {
570
		return true;
571 572
	}

573
	return kvm_is_visible_gfn(vcpu->kvm, gpa >> PAGE_SHIFT);
574 575 576 577 578 579
}

int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
			    ulong eaddr, int vec)
{
	bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE);
580
	bool iswrite = false;
581 582 583
	int r = RESUME_GUEST;
	int relocated;
	int page_found = 0;
584
	struct kvmppc_pte pte = { 0 };
585 586
	bool dr = (kvmppc_get_msr(vcpu) & MSR_DR) ? true : false;
	bool ir = (kvmppc_get_msr(vcpu) & MSR_IR) ? true : false;
587 588 589
	u64 vsid;

	relocated = data ? dr : ir;
590 591
	if (data && (vcpu->arch.fault_dsisr & DSISR_ISSTORE))
		iswrite = true;
592 593 594

	/* Resolve real address if translation turned on */
	if (relocated) {
595
		page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data, iswrite);
596 597 598 599 600 601 602
	} else {
		pte.may_execute = true;
		pte.may_read = true;
		pte.may_write = true;
		pte.raddr = eaddr & KVM_PAM;
		pte.eaddr = eaddr;
		pte.vpage = eaddr >> 12;
603
		pte.page_size = MMU_PAGE_64K;
604
		pte.wimg = HPTE_R_M;
605 606
	}

607
	switch (kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) {
608 609 610 611
	case 0:
		pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12));
		break;
	case MSR_DR:
612 613 614 615 616
		if (!data &&
		    (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
		    ((pte.raddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
			pte.raddr &= ~SPLIT_HACK_MASK;
		/* fall through */
617 618 619
	case MSR_IR:
		vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);

620
		if ((kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) == MSR_DR)
621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642
			pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12));
		else
			pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12));
		pte.vpage |= vsid;

		if (vsid == -1)
			page_found = -EINVAL;
		break;
	}

	if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
	   (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
		/*
		 * If we do the dcbz hack, we have to NX on every execution,
		 * so we can patch the executing code. This renders our guest
		 * NX-less.
		 */
		pte.may_execute = !data;
	}

	if (page_found == -ENOENT) {
		/* Page not found in guest PTE entries */
643 644 645 646 647
		u64 ssrr1 = vcpu->arch.shadow_srr1;
		u64 msr = kvmppc_get_msr(vcpu);
		kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
		kvmppc_set_dsisr(vcpu, vcpu->arch.fault_dsisr);
		kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
648 649 650
		kvmppc_book3s_queue_irqprio(vcpu, vec);
	} else if (page_found == -EPERM) {
		/* Storage protection */
651 652 653 654 655 656 657
		u32 dsisr = vcpu->arch.fault_dsisr;
		u64 ssrr1 = vcpu->arch.shadow_srr1;
		u64 msr = kvmppc_get_msr(vcpu);
		kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
		dsisr = (dsisr & ~DSISR_NOHPTE) | DSISR_PROTFAULT;
		kvmppc_set_dsisr(vcpu, dsisr);
		kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
658 659 660
		kvmppc_book3s_queue_irqprio(vcpu, vec);
	} else if (page_found == -EINVAL) {
		/* Page not found in guest SLB */
661
		kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
662
		kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80);
663
	} else if (kvmppc_visible_gpa(vcpu, pte.raddr)) {
664 665 666 667 668 669 670 671
		if (data && !(vcpu->arch.fault_dsisr & DSISR_NOHPTE)) {
			/*
			 * There is already a host HPTE there, presumably
			 * a read-only one for a page the guest thinks
			 * is writable, so get rid of it first.
			 */
			kvmppc_mmu_unmap_page(vcpu, &pte);
		}
672
		/* The guest's PTE is not mapped yet. Map on the host */
673 674 675 676 677
		if (kvmppc_mmu_map_page(vcpu, &pte, iswrite) == -EIO) {
			/* Exit KVM if mapping failed */
			run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
			return RESUME_HOST;
		}
678 679 680
		if (data)
			vcpu->stat.sp_storage++;
		else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
681
			 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32)))
682 683 684 685 686
			kvmppc_patch_dcbz(vcpu, &pte);
	} else {
		/* MMIO */
		vcpu->stat.mmio_exits++;
		vcpu->arch.paddr_accessed = pte.raddr;
687
		vcpu->arch.vaddr_accessed = pte.eaddr;
688 689 690 691 692 693 694 695 696 697 698 699 700
		r = kvmppc_emulate_mmio(run, vcpu);
		if ( r == RESUME_HOST_NV )
			r = RESUME_HOST;
	}

	return r;
}

/* Give up external provider (FPU, Altivec, VSX) */
void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
{
	struct thread_struct *t = &current->thread;

701 702 703 704 705 706 707 708 709
	/*
	 * VSX instructions can access FP and vector registers, so if
	 * we are giving up VSX, make sure we give up FP and VMX as well.
	 */
	if (msr & MSR_VSX)
		msr |= MSR_FP | MSR_VEC;

	msr &= vcpu->arch.guest_owned_ext;
	if (!msr)
710 711 712 713 714 715
		return;

#ifdef DEBUG_EXT
	printk(KERN_INFO "Giving up ext 0x%lx\n", msr);
#endif

716 717 718 719
	if (msr & MSR_FP) {
		/*
		 * Note that on CPUs with VSX, giveup_fpu stores
		 * both the traditional FP registers and the added VSX
720
		 * registers into thread.fp_state.fpr[].
721
		 */
722
		if (t->regs->msr & MSR_FP)
723
			giveup_fpu(current);
724
		t->fp_save_area = NULL;
725 726
	}

727
#ifdef CONFIG_ALTIVEC
728
	if (msr & MSR_VEC) {
729 730
		if (current->thread.regs->msr & MSR_VEC)
			giveup_altivec(current);
731
		t->vr_save_area = NULL;
732
	}
733
#endif
734

735
	vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX);
736 737 738
	kvmppc_recalc_shadow_msr(vcpu);
}

739 740 741 742 743 744 745 746
/* Give up facility (TAR / EBB / DSCR) */
static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac)
{
#ifdef CONFIG_PPC_BOOK3S_64
	if (!(vcpu->arch.shadow_fscr & (1ULL << fac))) {
		/* Facility not available to the guest, ignore giveup request*/
		return;
	}
747 748 749 750 751 752 753 754

	switch (fac) {
	case FSCR_TAR_LG:
		vcpu->arch.tar = mfspr(SPRN_TAR);
		mtspr(SPRN_TAR, current->thread.tar);
		vcpu->arch.shadow_fscr &= ~FSCR_TAR;
		break;
	}
755 756 757
#endif
}

758 759 760 761 762 763 764 765 766 767
/* Handle external providers (FPU, Altivec, VSX) */
static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
			     ulong msr)
{
	struct thread_struct *t = &current->thread;

	/* When we have paired singles, we emulate in software */
	if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)
		return RESUME_GUEST;

768
	if (!(kvmppc_get_msr(vcpu) & msr)) {
769 770 771 772
		kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
		return RESUME_GUEST;
	}

773 774 775 776 777 778 779 780 781 782 783 784 785 786 787
	if (msr == MSR_VSX) {
		/* No VSX?  Give an illegal instruction interrupt */
#ifdef CONFIG_VSX
		if (!cpu_has_feature(CPU_FTR_VSX))
#endif
		{
			kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
			return RESUME_GUEST;
		}

		/*
		 * We have to load up all the FP and VMX registers before
		 * we can let the guest use VSX instructions.
		 */
		msr = MSR_FP | MSR_VEC | MSR_VSX;
788 789
	}

790 791 792 793 794
	/* See if we already own all the ext(s) needed */
	msr &= ~vcpu->arch.guest_owned_ext;
	if (!msr)
		return RESUME_GUEST;

795 796 797 798
#ifdef DEBUG_EXT
	printk(KERN_INFO "Loading up ext 0x%lx\n", msr);
#endif

799
	if (msr & MSR_FP) {
800
		preempt_disable();
801
		enable_kernel_fp();
802
		load_fp_state(&vcpu->arch.fp);
803
		disable_kernel_fp();
804
		t->fp_save_area = &vcpu->arch.fp;
805
		preempt_enable();
806 807 808
	}

	if (msr & MSR_VEC) {
809
#ifdef CONFIG_ALTIVEC
810
		preempt_disable();
811
		enable_kernel_altivec();
812
		load_vr_state(&vcpu->arch.vr);
813
		disable_kernel_altivec();
814
		t->vr_save_area = &vcpu->arch.vr;
815
		preempt_enable();
816 817 818
#endif
	}

819
	t->regs->msr |= msr;
820 821 822 823 824 825
	vcpu->arch.guest_owned_ext |= msr;
	kvmppc_recalc_shadow_msr(vcpu);

	return RESUME_GUEST;
}

826 827 828 829 830 831 832 833 834 835 836 837
/*
 * Kernel code using FP or VMX could have flushed guest state to
 * the thread_struct; if so, get it back now.
 */
static void kvmppc_handle_lost_ext(struct kvm_vcpu *vcpu)
{
	unsigned long lost_ext;

	lost_ext = vcpu->arch.guest_owned_ext & ~current->thread.regs->msr;
	if (!lost_ext)
		return;

838
	if (lost_ext & MSR_FP) {
839
		preempt_disable();
840
		enable_kernel_fp();
841
		load_fp_state(&vcpu->arch.fp);
842
		disable_kernel_fp();
843
		preempt_enable();
844
	}
845
#ifdef CONFIG_ALTIVEC
846
	if (lost_ext & MSR_VEC) {
847
		preempt_disable();
848
		enable_kernel_altivec();
849
		load_vr_state(&vcpu->arch.vr);
850
		disable_kernel_altivec();
851
		preempt_enable();
852
	}
853
#endif
854 855 856
	current->thread.regs->msr |= lost_ext;
}

857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882
#ifdef CONFIG_PPC_BOOK3S_64

static void kvmppc_trigger_fac_interrupt(struct kvm_vcpu *vcpu, ulong fac)
{
	/* Inject the Interrupt Cause field and trigger a guest interrupt */
	vcpu->arch.fscr &= ~(0xffULL << 56);
	vcpu->arch.fscr |= (fac << 56);
	kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FAC_UNAVAIL);
}

static void kvmppc_emulate_fac(struct kvm_vcpu *vcpu, ulong fac)
{
	enum emulation_result er = EMULATE_FAIL;

	if (!(kvmppc_get_msr(vcpu) & MSR_PR))
		er = kvmppc_emulate_instruction(vcpu->run, vcpu);

	if ((er != EMULATE_DONE) && (er != EMULATE_AGAIN)) {
		/* Couldn't emulate, trigger interrupt in guest */
		kvmppc_trigger_fac_interrupt(vcpu, fac);
	}
}

/* Enable facilities (TAR, EBB, DSCR) for the guest */
static int kvmppc_handle_fac(struct kvm_vcpu *vcpu, ulong fac)
{
883
	bool guest_fac_enabled;
884 885
	BUG_ON(!cpu_has_feature(CPU_FTR_ARCH_207S));

886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903
	/*
	 * Not every facility is enabled by FSCR bits, check whether the
	 * guest has this facility enabled at all.
	 */
	switch (fac) {
	case FSCR_TAR_LG:
	case FSCR_EBB_LG:
		guest_fac_enabled = (vcpu->arch.fscr & (1ULL << fac));
		break;
	case FSCR_TM_LG:
		guest_fac_enabled = kvmppc_get_msr(vcpu) & MSR_TM;
		break;
	default:
		guest_fac_enabled = false;
		break;
	}

	if (!guest_fac_enabled) {
904 905 906 907 908 909
		/* Facility not enabled by the guest */
		kvmppc_trigger_fac_interrupt(vcpu, fac);
		return RESUME_GUEST;
	}

	switch (fac) {
910 911 912 913 914 915
	case FSCR_TAR_LG:
		/* TAR switching isn't lazy in Linux yet */
		current->thread.tar = mfspr(SPRN_TAR);
		mtspr(SPRN_TAR, vcpu->arch.tar);
		vcpu->arch.shadow_fscr |= FSCR_TAR;
		break;
916 917 918 919 920 921 922
	default:
		kvmppc_emulate_fac(vcpu, fac);
		break;
	}

	return RESUME_GUEST;
}
923 924 925 926 927 928 929 930 931

void kvmppc_set_fscr(struct kvm_vcpu *vcpu, u64 fscr)
{
	if ((vcpu->arch.fscr & FSCR_TAR) && !(fscr & FSCR_TAR)) {
		/* TAR got dropped, drop it in shadow too */
		kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
	}
	vcpu->arch.fscr = fscr;
}
932 933
#endif

934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951
static void kvmppc_setup_debug(struct kvm_vcpu *vcpu)
{
	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
		u64 msr = kvmppc_get_msr(vcpu);

		kvmppc_set_msr(vcpu, msr | MSR_SE);
	}
}

static void kvmppc_clear_debug(struct kvm_vcpu *vcpu)
{
	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
		u64 msr = kvmppc_get_msr(vcpu);

		kvmppc_set_msr(vcpu, msr & ~MSR_SE);
	}
}

952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014
static int kvmppc_exit_pr_progint(struct kvm_run *run, struct kvm_vcpu *vcpu,
				  unsigned int exit_nr)
{
	enum emulation_result er;
	ulong flags;
	u32 last_inst;
	int emul, r;

	/*
	 * shadow_srr1 only contains valid flags if we came here via a program
	 * exception. The other exceptions (emulation assist, FP unavailable,
	 * etc.) do not provide flags in SRR1, so use an illegal-instruction
	 * exception when injecting a program interrupt into the guest.
	 */
	if (exit_nr == BOOK3S_INTERRUPT_PROGRAM)
		flags = vcpu->arch.shadow_srr1 & 0x1f0000ull;
	else
		flags = SRR1_PROGILL;

	emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
	if (emul != EMULATE_DONE)
		return RESUME_GUEST;

	if (kvmppc_get_msr(vcpu) & MSR_PR) {
#ifdef EXIT_DEBUG
		pr_info("Userspace triggered 0x700 exception at\n 0x%lx (0x%x)\n",
			kvmppc_get_pc(vcpu), last_inst);
#endif
		if ((last_inst & 0xff0007ff) != (INS_DCBZ & 0xfffffff7)) {
			kvmppc_core_queue_program(vcpu, flags);
			return RESUME_GUEST;
		}
	}

	vcpu->stat.emulated_inst_exits++;
	er = kvmppc_emulate_instruction(run, vcpu);
	switch (er) {
	case EMULATE_DONE:
		r = RESUME_GUEST_NV;
		break;
	case EMULATE_AGAIN:
		r = RESUME_GUEST;
		break;
	case EMULATE_FAIL:
		pr_crit("%s: emulation at %lx failed (%08x)\n",
			__func__, kvmppc_get_pc(vcpu), last_inst);
		kvmppc_core_queue_program(vcpu, flags);
		r = RESUME_GUEST;
		break;
	case EMULATE_DO_MMIO:
		run->exit_reason = KVM_EXIT_MMIO;
		r = RESUME_HOST_NV;
		break;
	case EMULATE_EXIT_USER:
		r = RESUME_HOST_NV;
		break;
	default:
		BUG();
	}

	return r;
}

1015 1016
int kvmppc_handle_exit_pr(struct kvm_run *run, struct kvm_vcpu *vcpu,
			  unsigned int exit_nr)
1017 1018
{
	int r = RESUME_HOST;
1019
	int s;
1020 1021 1022 1023 1024 1025

	vcpu->stat.sum_exits++;

	run->exit_reason = KVM_EXIT_UNKNOWN;
	run->ready_for_interrupt_injection = 1;

1026
	/* We get here with MSR.EE=1 */
1027

1028
	trace_kvm_exit(exit_nr, vcpu);
1029
	guest_exit();
1030

1031 1032
	switch (exit_nr) {
	case BOOK3S_INTERRUPT_INST_STORAGE:
1033
	{
1034
		ulong shadow_srr1 = vcpu->arch.shadow_srr1;
1035 1036
		vcpu->stat.pf_instruc++;

1037 1038 1039
		if (kvmppc_is_split_real(vcpu))
			kvmppc_fixup_split_real(vcpu);

1040 1041 1042
#ifdef CONFIG_PPC_BOOK3S_32
		/* We set segments as unused segments when invalidating them. So
		 * treat the respective fault as segment fault. */
1043 1044 1045 1046 1047 1048
		{
			struct kvmppc_book3s_shadow_vcpu *svcpu;
			u32 sr;

			svcpu = svcpu_get(vcpu);
			sr = svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT];
1049
			svcpu_put(svcpu);
1050 1051 1052 1053 1054
			if (sr == SR_INVALID) {
				kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
				r = RESUME_GUEST;
				break;
			}
1055 1056 1057 1058
		}
#endif

		/* only care about PTEG not found errors, but leave NX alone */
1059
		if (shadow_srr1 & 0x40000000) {
1060
			int idx = srcu_read_lock(&vcpu->kvm->srcu);
1061
			r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr);
1062
			srcu_read_unlock(&vcpu->kvm->srcu, idx);
1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073
			vcpu->stat.sp_instruc++;
		} else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
			  (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
			/*
			 * XXX If we do the dcbz hack we use the NX bit to flush&patch the page,
			 *     so we can't use the NX bit inside the guest. Let's cross our fingers,
			 *     that no guest that needs the dcbz hack does NX.
			 */
			kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
			r = RESUME_GUEST;
		} else {
1074 1075 1076
			u64 msr = kvmppc_get_msr(vcpu);
			msr |= shadow_srr1 & 0x58000000;
			kvmppc_set_msr_fast(vcpu, msr);
1077 1078 1079 1080
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
1081
	}
1082 1083 1084
	case BOOK3S_INTERRUPT_DATA_STORAGE:
	{
		ulong dar = kvmppc_get_fault_dar(vcpu);
1085
		u32 fault_dsisr = vcpu->arch.fault_dsisr;
1086 1087 1088 1089 1090
		vcpu->stat.pf_storage++;

#ifdef CONFIG_PPC_BOOK3S_32
		/* We set segments as unused segments when invalidating them. So
		 * treat the respective fault as segment fault. */
1091 1092 1093 1094 1095 1096
		{
			struct kvmppc_book3s_shadow_vcpu *svcpu;
			u32 sr;

			svcpu = svcpu_get(vcpu);
			sr = svcpu->sr[dar >> SID_SHIFT];
1097
			svcpu_put(svcpu);
1098 1099 1100 1101 1102
			if (sr == SR_INVALID) {
				kvmppc_mmu_map_segment(vcpu, dar);
				r = RESUME_GUEST;
				break;
			}
1103 1104 1105
		}
#endif

1106 1107 1108 1109 1110 1111 1112
		/*
		 * We need to handle missing shadow PTEs, and
		 * protection faults due to us mapping a page read-only
		 * when the guest thinks it is writable.
		 */
		if (fault_dsisr & (DSISR_NOHPTE | DSISR_PROTFAULT)) {
			int idx = srcu_read_lock(&vcpu->kvm->srcu);
1113
			r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr);
1114
			srcu_read_unlock(&vcpu->kvm->srcu, idx);
1115
		} else {
1116 1117
			kvmppc_set_dar(vcpu, dar);
			kvmppc_set_dsisr(vcpu, fault_dsisr);
1118 1119 1120 1121 1122 1123 1124
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
	}
	case BOOK3S_INTERRUPT_DATA_SEGMENT:
		if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) {
1125
			kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139
			kvmppc_book3s_queue_irqprio(vcpu,
				BOOK3S_INTERRUPT_DATA_SEGMENT);
		}
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_INST_SEGMENT:
		if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) {
			kvmppc_book3s_queue_irqprio(vcpu,
				BOOK3S_INTERRUPT_INST_SEGMENT);
		}
		r = RESUME_GUEST;
		break;
	/* We're good on these - the host merely wanted to get our attention */
	case BOOK3S_INTERRUPT_DECREMENTER:
1140
	case BOOK3S_INTERRUPT_HV_DECREMENTER:
1141
	case BOOK3S_INTERRUPT_DOORBELL:
1142
	case BOOK3S_INTERRUPT_H_DOORBELL:
1143 1144 1145 1146
		vcpu->stat.dec_exits++;
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_EXTERNAL:
1147 1148
	case BOOK3S_INTERRUPT_EXTERNAL_LEVEL:
	case BOOK3S_INTERRUPT_EXTERNAL_HV:
1149 1150 1151 1152 1153 1154 1155
		vcpu->stat.ext_intr_exits++;
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_PERFMON:
		r = RESUME_GUEST;
		break;
	case BOOK3S_INTERRUPT_PROGRAM:
1156
	case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
1157
		r = kvmppc_exit_pr_progint(run, vcpu, exit_nr);
1158 1159
		break;
	case BOOK3S_INTERRUPT_SYSCALL:
1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174
	{
		u32 last_sc;
		int emul;

		/* Get last sc for papr */
		if (vcpu->arch.papr_enabled) {
			/* The sc instuction points SRR0 to the next inst */
			emul = kvmppc_get_last_inst(vcpu, INST_SC, &last_sc);
			if (emul != EMULATE_DONE) {
				kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) - 4);
				r = RESUME_GUEST;
				break;
			}
		}

1175
		if (vcpu->arch.papr_enabled &&
1176
		    (last_sc == 0x44000022) &&
1177
		    !(kvmppc_get_msr(vcpu) & MSR_PR)) {
1178 1179 1180 1181
			/* SC 1 papr hypercalls */
			ulong cmd = kvmppc_get_gpr(vcpu, 3);
			int i;

1182
#ifdef CONFIG_PPC_BOOK3S_64
1183 1184 1185 1186
			if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
				r = RESUME_GUEST;
				break;
			}
1187
#endif
1188 1189 1190 1191 1192 1193 1194 1195 1196 1197

			run->papr_hcall.nr = cmd;
			for (i = 0; i < 9; ++i) {
				ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
				run->papr_hcall.args[i] = gpr;
			}
			run->exit_reason = KVM_EXIT_PAPR_HCALL;
			vcpu->arch.hcall_needed = 1;
			r = RESUME_HOST;
		} else if (vcpu->arch.osi_enabled &&
1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208
		    (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) &&
		    (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) {
			/* MOL hypercalls */
			u64 *gprs = run->osi.gprs;
			int i;

			run->exit_reason = KVM_EXIT_OSI;
			for (i = 0; i < 32; i++)
				gprs[i] = kvmppc_get_gpr(vcpu, i);
			vcpu->arch.osi_needed = 1;
			r = RESUME_HOST_NV;
1209
		} else if (!(kvmppc_get_msr(vcpu) & MSR_PR) &&
1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220
		    (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
			/* KVM PV hypercalls */
			kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
			r = RESUME_GUEST;
		} else {
			/* Guest syscalls */
			vcpu->stat.syscall_exits++;
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
1221
	}
1222 1223 1224 1225 1226
	case BOOK3S_INTERRUPT_FP_UNAVAIL:
	case BOOK3S_INTERRUPT_ALTIVEC:
	case BOOK3S_INTERRUPT_VSX:
	{
		int ext_msr = 0;
1227 1228 1229 1230 1231
		int emul;
		u32 last_inst;

		if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) {
			/* Do paired single instruction emulation */
1232 1233
			emul = kvmppc_get_last_inst(vcpu, INST_GENERIC,
						    &last_inst);
1234
			if (emul == EMULATE_DONE)
1235
				r = kvmppc_exit_pr_progint(run, vcpu, exit_nr);
1236 1237
			else
				r = RESUME_GUEST;
1238

1239
			break;
1240 1241
		}

1242 1243 1244 1245
		/* Enable external provider */
		switch (exit_nr) {
		case BOOK3S_INTERRUPT_FP_UNAVAIL:
			ext_msr = MSR_FP;
1246
			break;
1247 1248 1249

		case BOOK3S_INTERRUPT_ALTIVEC:
			ext_msr = MSR_VEC;
1250
			break;
1251 1252 1253

		case BOOK3S_INTERRUPT_VSX:
			ext_msr = MSR_VSX;
1254 1255
			break;
		}
1256 1257

		r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr);
1258 1259 1260
		break;
	}
	case BOOK3S_INTERRUPT_ALIGNMENT:
1261
	{
1262 1263
		u32 last_inst;
		int emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1264 1265

		if (emul == EMULATE_DONE) {
1266 1267 1268 1269 1270 1271 1272 1273 1274
			u32 dsisr;
			u64 dar;

			dsisr = kvmppc_alignment_dsisr(vcpu, last_inst);
			dar = kvmppc_alignment_dar(vcpu, last_inst);

			kvmppc_set_dsisr(vcpu, dsisr);
			kvmppc_set_dar(vcpu, dar);

1275 1276 1277 1278
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
		}
		r = RESUME_GUEST;
		break;
1279
	}
1280 1281 1282 1283 1284 1285
#ifdef CONFIG_PPC_BOOK3S_64
	case BOOK3S_INTERRUPT_FAC_UNAVAIL:
		kvmppc_handle_fac(vcpu, vcpu->arch.shadow_fscr >> 56);
		r = RESUME_GUEST;
		break;
#endif
1286 1287 1288 1289
	case BOOK3S_INTERRUPT_MACHINE_CHECK:
		kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
		r = RESUME_GUEST;
		break;
1290 1291 1292 1293 1294 1295 1296 1297 1298
	case BOOK3S_INTERRUPT_TRACE:
		if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
			run->exit_reason = KVM_EXIT_DEBUG;
			r = RESUME_HOST;
		} else {
			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
			r = RESUME_GUEST;
		}
		break;
1299
	default:
1300
	{
1301
		ulong shadow_srr1 = vcpu->arch.shadow_srr1;
1302 1303
		/* Ugh - bork here! What did we get? */
		printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n",
1304
			exit_nr, kvmppc_get_pc(vcpu), shadow_srr1);
1305 1306 1307 1308
		r = RESUME_HOST;
		BUG();
		break;
	}
1309
	}
1310 1311 1312 1313 1314

	if (!(r & RESUME_HOST)) {
		/* To avoid clobbering exit_reason, only check for signals if
		 * we aren't already exiting to userspace for some other
		 * reason. */
1315 1316 1317 1318 1319 1320 1321

		/*
		 * Interrupts could be timers for the guest which we have to
		 * inject again, so let's postpone them until we're in the guest
		 * and if we really did time things so badly, then we just exit
		 * again due to a host external interrupt.
		 */
1322
		s = kvmppc_prepare_to_enter(vcpu);
1323
		if (s <= 0)
1324
			r = s;
1325 1326
		else {
			/* interrupts now hard-disabled */
1327
			kvmppc_fix_ee_before_entry();
1328
		}
1329

1330
		kvmppc_handle_lost_ext(vcpu);
1331 1332 1333 1334 1335 1336 1337
	}

	trace_kvm_book3s_reenter(r, vcpu);

	return r;
}

1338 1339
static int kvm_arch_vcpu_ioctl_get_sregs_pr(struct kvm_vcpu *vcpu,
					    struct kvm_sregs *sregs)
1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353
{
	struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
	int i;

	sregs->pvr = vcpu->arch.pvr;

	sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1;
	if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
		for (i = 0; i < 64; i++) {
			sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i;
			sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
		}
	} else {
		for (i = 0; i < 16; i++)
1354
			sregs->u.s.ppc32.sr[i] = kvmppc_get_sr(vcpu, i);
1355 1356 1357 1358 1359 1360 1361 1362 1363 1364

		for (i = 0; i < 8; i++) {
			sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw;
			sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw;
		}
	}

	return 0;
}

1365 1366
static int kvm_arch_vcpu_ioctl_set_sregs_pr(struct kvm_vcpu *vcpu,
					    struct kvm_sregs *sregs)
1367 1368 1369 1370
{
	struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
	int i;

1371
	kvmppc_set_pvr_pr(vcpu, sregs->pvr);
1372 1373

	vcpu3s->sdr1 = sregs->u.s.sdr1;
1374
#ifdef CONFIG_PPC_BOOK3S_64
1375
	if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
1376 1377 1378 1379
		/* Flush all SLB entries */
		vcpu->arch.mmu.slbmte(vcpu, 0, 0);
		vcpu->arch.mmu.slbia(vcpu);

1380
		for (i = 0; i < 64; i++) {
1381 1382 1383 1384 1385
			u64 rb = sregs->u.s.ppc64.slb[i].slbe;
			u64 rs = sregs->u.s.ppc64.slb[i].slbv;

			if (rb & SLB_ESID_V)
				vcpu->arch.mmu.slbmte(vcpu, rs, rb);
1386
		}
1387 1388 1389
	} else
#endif
	{
1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410
		for (i = 0; i < 16; i++) {
			vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]);
		}
		for (i = 0; i < 8; i++) {
			kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false,
				       (u32)sregs->u.s.ppc32.ibat[i]);
			kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true,
				       (u32)(sregs->u.s.ppc32.ibat[i] >> 32));
			kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false,
				       (u32)sregs->u.s.ppc32.dbat[i]);
			kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true,
				       (u32)(sregs->u.s.ppc32.dbat[i] >> 32));
		}
	}

	/* Flush the MMU after messing with the segments */
	kvmppc_mmu_pte_flush(vcpu, 0, 0);

	return 0;
}

1411 1412
static int kvmppc_get_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
				 union kvmppc_one_reg *val)
1413
{
1414
	int r = 0;
1415

1416
	switch (id) {
1417 1418 1419
	case KVM_REG_PPC_DEBUG_INST:
		*val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
		break;
1420
	case KVM_REG_PPC_HIOR:
1421
		*val = get_reg_val(id, to_book3s(vcpu)->hior);
1422
		break;
1423 1424 1425
	case KVM_REG_PPC_VTB:
		*val = get_reg_val(id, to_book3s(vcpu)->vtb);
		break;
1426
	case KVM_REG_PPC_LPCR:
1427
	case KVM_REG_PPC_LPCR_64:
1428 1429 1430 1431 1432 1433 1434 1435
		/*
		 * We are only interested in the LPCR_ILE bit
		 */
		if (vcpu->arch.intr_msr & MSR_LE)
			*val = get_reg_val(id, LPCR_ILE);
		else
			*val = get_reg_val(id, 0);
		break;
1436
	default:
1437
		r = -EINVAL;
1438 1439 1440 1441 1442 1443
		break;
	}

	return r;
}

1444 1445 1446 1447 1448 1449 1450 1451
static void kvmppc_set_lpcr_pr(struct kvm_vcpu *vcpu, u64 new_lpcr)
{
	if (new_lpcr & LPCR_ILE)
		vcpu->arch.intr_msr |= MSR_LE;
	else
		vcpu->arch.intr_msr &= ~MSR_LE;
}

1452 1453
static int kvmppc_set_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
				 union kvmppc_one_reg *val)
1454
{
1455
	int r = 0;
1456

1457
	switch (id) {
1458
	case KVM_REG_PPC_HIOR:
1459 1460
		to_book3s(vcpu)->hior = set_reg_val(id, *val);
		to_book3s(vcpu)->hior_explicit = true;
1461
		break;
1462 1463 1464
	case KVM_REG_PPC_VTB:
		to_book3s(vcpu)->vtb = set_reg_val(id, *val);
		break;
1465
	case KVM_REG_PPC_LPCR:
1466
	case KVM_REG_PPC_LPCR_64:
1467 1468
		kvmppc_set_lpcr_pr(vcpu, set_reg_val(id, *val));
		break;
1469
	default:
1470
		r = -EINVAL;
1471 1472 1473 1474 1475 1476
		break;
	}

	return r;
}

1477 1478
static struct kvm_vcpu *kvmppc_core_vcpu_create_pr(struct kvm *kvm,
						   unsigned int id)
1479 1480 1481 1482 1483 1484
{
	struct kvmppc_vcpu_book3s *vcpu_book3s;
	struct kvm_vcpu *vcpu;
	int err = -ENOMEM;
	unsigned long p;

1485 1486
	vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
	if (!vcpu)
1487 1488 1489 1490 1491
		goto out;

	vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s));
	if (!vcpu_book3s)
		goto free_vcpu;
1492
	vcpu->arch.book3s = vcpu_book3s;
1493

1494
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1495 1496 1497 1498
	vcpu->arch.shadow_vcpu =
		kzalloc(sizeof(*vcpu->arch.shadow_vcpu), GFP_KERNEL);
	if (!vcpu->arch.shadow_vcpu)
		goto free_vcpu3s;
1499
#endif
1500 1501 1502 1503 1504

	err = kvm_vcpu_init(vcpu, kvm, id);
	if (err)
		goto free_shadow_vcpu;

1505
	err = -ENOMEM;
1506 1507 1508
	p = __get_free_page(GFP_KERNEL|__GFP_ZERO);
	if (!p)
		goto uninit_vcpu;
1509
	vcpu->arch.shared = (void *)p;
1510
#ifdef CONFIG_PPC_BOOK3S_64
1511 1512 1513 1514 1515 1516 1517
	/* Always start the shared struct in native endian mode */
#ifdef __BIG_ENDIAN__
        vcpu->arch.shared_big_endian = true;
#else
        vcpu->arch.shared_big_endian = false;
#endif

1518 1519 1520 1521 1522
	/*
	 * Default to the same as the host if we're on sufficiently
	 * recent machine that we have 1TB segments;
	 * otherwise default to PPC970FX.
	 */
1523
	vcpu->arch.pvr = 0x3C0301;
1524 1525
	if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
		vcpu->arch.pvr = mfspr(SPRN_PVR);
1526
	vcpu->arch.intr_msr = MSR_SF;
1527 1528 1529 1530
#else
	/* default to book3s_32 (750) */
	vcpu->arch.pvr = 0x84202;
#endif
1531
	kvmppc_set_pvr_pr(vcpu, vcpu->arch.pvr);
1532 1533
	vcpu->arch.slb_nr = 64;

1534
	vcpu->arch.shadow_msr = MSR_USER64 & ~MSR_LE;
1535 1536 1537 1538 1539 1540 1541 1542 1543 1544

	err = kvmppc_mmu_init(vcpu);
	if (err < 0)
		goto uninit_vcpu;

	return vcpu;

uninit_vcpu:
	kvm_vcpu_uninit(vcpu);
free_shadow_vcpu:
1545
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1546 1547
	kfree(vcpu->arch.shadow_vcpu);
free_vcpu3s:
1548
#endif
1549
	vfree(vcpu_book3s);
1550 1551
free_vcpu:
	kmem_cache_free(kvm_vcpu_cache, vcpu);
1552 1553 1554 1555
out:
	return ERR_PTR(err);
}

1556
static void kvmppc_core_vcpu_free_pr(struct kvm_vcpu *vcpu)
1557 1558 1559 1560 1561
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);

	free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
	kvm_vcpu_uninit(vcpu);
1562
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1563 1564
	kfree(vcpu->arch.shadow_vcpu);
#endif
1565
	vfree(vcpu_book3s);
1566
	kmem_cache_free(kvm_vcpu_cache, vcpu);
1567 1568
}

1569
static int kvmppc_vcpu_run_pr(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1570 1571 1572 1573 1574 1575
{
	int ret;
#ifdef CONFIG_ALTIVEC
	unsigned long uninitialized_var(vrsave);
#endif

1576 1577 1578
	/* Check if we can run the vcpu at all */
	if (!vcpu->arch.sane) {
		kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1579 1580
		ret = -EINVAL;
		goto out;
1581 1582
	}

1583 1584
	kvmppc_setup_debug(vcpu);

1585 1586 1587 1588 1589 1590
	/*
	 * Interrupts could be timers for the guest which we have to inject
	 * again, so let's postpone them until we're in the guest and if we
	 * really did time things so badly, then we just exit again due to
	 * a host external interrupt.
	 */
1591
	ret = kvmppc_prepare_to_enter(vcpu);
1592
	if (ret <= 0)
1593
		goto out;
1594
	/* interrupts now hard-disabled */
1595

1596 1597
	/* Save FPU, Altivec and VSX state */
	giveup_all(current);
1598 1599

	/* Preload FPU if it's enabled */
1600
	if (kvmppc_get_msr(vcpu) & MSR_FP)
1601 1602
		kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);

1603
	kvmppc_fix_ee_before_entry();
1604 1605 1606

	ret = __kvmppc_vcpu_run(kvm_run, vcpu);

1607 1608
	kvmppc_clear_debug(vcpu);

1609
	/* No need for guest_exit. It's done in handle_exit.
1610
	   We also get here with interrupts enabled. */
1611 1612

	/* Make sure we save the guest FPU/Altivec/VSX state */
1613 1614
	kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);

1615 1616 1617
	/* Make sure we save the guest TAR/EBB/DSCR state */
	kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);

1618
out:
1619
	vcpu->mode = OUTSIDE_GUEST_MODE;
1620 1621 1622
	return ret;
}

1623 1624 1625
/*
 * Get (and clear) the dirty memory log for a memory slot.
 */
1626 1627
static int kvm_vm_ioctl_get_dirty_log_pr(struct kvm *kvm,
					 struct kvm_dirty_log *log)
1628
{
1629
	struct kvm_memslots *slots;
1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644
	struct kvm_memory_slot *memslot;
	struct kvm_vcpu *vcpu;
	ulong ga, ga_end;
	int is_dirty = 0;
	int r;
	unsigned long n;

	mutex_lock(&kvm->slots_lock);

	r = kvm_get_dirty_log(kvm, log, &is_dirty);
	if (r)
		goto out;

	/* If nothing is dirty, don't bother messing with page tables. */
	if (is_dirty) {
1645 1646
		slots = kvm_memslots(kvm);
		memslot = id_to_memslot(slots, log->slot);
1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663

		ga = memslot->base_gfn << PAGE_SHIFT;
		ga_end = ga + (memslot->npages << PAGE_SHIFT);

		kvm_for_each_vcpu(n, vcpu, kvm)
			kvmppc_mmu_pte_pflush(vcpu, ga, ga_end);

		n = kvm_dirty_bitmap_bytes(memslot);
		memset(memslot->dirty_bitmap, 0, n);
	}

	r = 0;
out:
	mutex_unlock(&kvm->slots_lock);
	return r;
}

1664 1665
static void kvmppc_core_flush_memslot_pr(struct kvm *kvm,
					 struct kvm_memory_slot *memslot)
1666
{
1667 1668
	return;
}
1669

1670 1671
static int kvmppc_core_prepare_memory_region_pr(struct kvm *kvm,
					struct kvm_memory_slot *memslot,
1672
					const struct kvm_userspace_memory_region *mem)
1673
{
1674 1675 1676
	return 0;
}

1677
static void kvmppc_core_commit_memory_region_pr(struct kvm *kvm,
1678
				const struct kvm_userspace_memory_region *mem,
1679 1680
				const struct kvm_memory_slot *old,
				const struct kvm_memory_slot *new)
1681
{
1682
	return;
1683 1684
}

1685 1686
static void kvmppc_core_free_memslot_pr(struct kvm_memory_slot *free,
					struct kvm_memory_slot *dont)
1687
{
1688
	return;
1689 1690
}

1691 1692
static int kvmppc_core_create_memslot_pr(struct kvm_memory_slot *slot,
					 unsigned long npages)
1693 1694 1695 1696
{
	return 0;
}

1697

1698
#ifdef CONFIG_PPC64
1699 1700
static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
					 struct kvm_ppc_smmu_info *info)
1701
{
1702 1703 1704 1705
	long int i;
	struct kvm_vcpu *vcpu;

	info->flags = 0;
1706 1707 1708 1709 1710 1711 1712 1713 1714 1715

	/* SLB is always 64 entries */
	info->slb_size = 64;

	/* Standard 4k base page size segment */
	info->sps[0].page_shift = 12;
	info->sps[0].slb_enc = 0;
	info->sps[0].enc[0].page_shift = 12;
	info->sps[0].enc[0].pte_enc = 0;

1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735
	/*
	 * 64k large page size.
	 * We only want to put this in if the CPUs we're emulating
	 * support it, but unfortunately we don't have a vcpu easily
	 * to hand here to test.  Just pick the first vcpu, and if
	 * that doesn't exist yet, report the minimum capability,
	 * i.e., no 64k pages.
	 * 1T segment support goes along with 64k pages.
	 */
	i = 1;
	vcpu = kvm_get_vcpu(kvm, 0);
	if (vcpu && (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) {
		info->flags = KVM_PPC_1T_SEGMENTS;
		info->sps[i].page_shift = 16;
		info->sps[i].slb_enc = SLB_VSID_L | SLB_VSID_LP_01;
		info->sps[i].enc[0].page_shift = 16;
		info->sps[i].enc[0].pte_enc = 1;
		++i;
	}

1736
	/* Standard 16M large page size segment */
1737 1738 1739 1740
	info->sps[i].page_shift = 24;
	info->sps[i].slb_enc = SLB_VSID_L;
	info->sps[i].enc[0].page_shift = 24;
	info->sps[i].enc[0].pte_enc = 0;
1741

1742 1743
	return 0;
}
1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754

static int kvm_configure_mmu_pr(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg)
{
	if (!cpu_has_feature(CPU_FTR_ARCH_300))
		return -ENODEV;
	/* Require flags and process table base and size to all be zero. */
	if (cfg->flags || cfg->process_table)
		return -EINVAL;
	return 0;
}

1755 1756 1757
#else
static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
					 struct kvm_ppc_smmu_info *info)
1758
{
1759 1760
	/* We should not get called */
	BUG();
1761
}
1762
#endif /* CONFIG_PPC64 */
1763

1764 1765 1766
static unsigned int kvm_global_user_count = 0;
static DEFINE_SPINLOCK(kvm_global_user_count_lock);

1767
static int kvmppc_core_init_vm_pr(struct kvm *kvm)
1768
{
1769
	mutex_init(&kvm->arch.hpt_mutex);
1770

1771 1772 1773 1774 1775
#ifdef CONFIG_PPC_BOOK3S_64
	/* Start out with the default set of hcalls enabled */
	kvmppc_pr_init_default_hcalls(kvm);
#endif

1776 1777 1778
	if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
		spin_lock(&kvm_global_user_count_lock);
		if (++kvm_global_user_count == 1)
1779
			pseries_disable_reloc_on_exc();
1780 1781
		spin_unlock(&kvm_global_user_count_lock);
	}
1782 1783 1784
	return 0;
}

1785
static void kvmppc_core_destroy_vm_pr(struct kvm *kvm)
1786
{
1787 1788 1789
#ifdef CONFIG_PPC64
	WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
#endif
1790 1791 1792 1793 1794

	if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
		spin_lock(&kvm_global_user_count_lock);
		BUG_ON(kvm_global_user_count == 0);
		if (--kvm_global_user_count == 0)
1795
			pseries_enable_reloc_on_exc();
1796 1797
		spin_unlock(&kvm_global_user_count_lock);
	}
1798 1799
}

1800
static int kvmppc_core_check_processor_compat_pr(void)
1801
{
1802
	/*
1803 1804 1805 1806 1807 1808 1809
	 * PR KVM can work on POWER9 inside a guest partition
	 * running in HPT mode.  It can't work if we are using
	 * radix translation (because radix provides no way for
	 * a process to have unique translations in quadrant 3)
	 * or in a bare-metal HPT-mode host (because POWER9
	 * uses a modified HPTE format which the PR KVM code
	 * has not been adapted to use).
1810
	 */
1811 1812
	if (cpu_has_feature(CPU_FTR_ARCH_300) &&
	    (radix_enabled() || cpu_has_feature(CPU_FTR_HVMODE)))
1813
		return -EIO;
1814 1815
	return 0;
}
1816

1817 1818 1819 1820 1821
static long kvm_arch_vm_ioctl_pr(struct file *filp,
				 unsigned int ioctl, unsigned long arg)
{
	return -ENOTTY;
}
1822

1823
static struct kvmppc_ops kvm_ops_pr = {
1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853
	.get_sregs = kvm_arch_vcpu_ioctl_get_sregs_pr,
	.set_sregs = kvm_arch_vcpu_ioctl_set_sregs_pr,
	.get_one_reg = kvmppc_get_one_reg_pr,
	.set_one_reg = kvmppc_set_one_reg_pr,
	.vcpu_load   = kvmppc_core_vcpu_load_pr,
	.vcpu_put    = kvmppc_core_vcpu_put_pr,
	.set_msr     = kvmppc_set_msr_pr,
	.vcpu_run    = kvmppc_vcpu_run_pr,
	.vcpu_create = kvmppc_core_vcpu_create_pr,
	.vcpu_free   = kvmppc_core_vcpu_free_pr,
	.check_requests = kvmppc_core_check_requests_pr,
	.get_dirty_log = kvm_vm_ioctl_get_dirty_log_pr,
	.flush_memslot = kvmppc_core_flush_memslot_pr,
	.prepare_memory_region = kvmppc_core_prepare_memory_region_pr,
	.commit_memory_region = kvmppc_core_commit_memory_region_pr,
	.unmap_hva_range = kvm_unmap_hva_range_pr,
	.age_hva  = kvm_age_hva_pr,
	.test_age_hva = kvm_test_age_hva_pr,
	.set_spte_hva = kvm_set_spte_hva_pr,
	.mmu_destroy  = kvmppc_mmu_destroy_pr,
	.free_memslot = kvmppc_core_free_memslot_pr,
	.create_memslot = kvmppc_core_create_memslot_pr,
	.init_vm = kvmppc_core_init_vm_pr,
	.destroy_vm = kvmppc_core_destroy_vm_pr,
	.get_smmu_info = kvm_vm_ioctl_get_smmu_info_pr,
	.emulate_op = kvmppc_core_emulate_op_pr,
	.emulate_mtspr = kvmppc_core_emulate_mtspr_pr,
	.emulate_mfspr = kvmppc_core_emulate_mfspr_pr,
	.fast_vcpu_kick = kvm_vcpu_kick,
	.arch_vm_ioctl  = kvm_arch_vm_ioctl_pr,
1854 1855
#ifdef CONFIG_PPC_BOOK3S_64
	.hcall_implemented = kvmppc_hcall_impl_pr,
1856
	.configure_mmu = kvm_configure_mmu_pr,
1857
#endif
1858
	.giveup_ext = kvmppc_giveup_ext,
1859 1860
};

1861 1862

int kvmppc_book3s_init_pr(void)
1863 1864 1865
{
	int r;

1866 1867
	r = kvmppc_core_check_processor_compat_pr();
	if (r < 0)
1868 1869
		return r;

1870 1871
	kvm_ops_pr.owner = THIS_MODULE;
	kvmppc_pr_ops = &kvm_ops_pr;
1872

1873
	r = kvmppc_mmu_hpte_sysinit();
1874 1875 1876
	return r;
}

1877
void kvmppc_book3s_exit_pr(void)
1878
{
1879
	kvmppc_pr_ops = NULL;
1880 1881 1882
	kvmppc_mmu_hpte_sysexit();
}

1883 1884 1885 1886 1887
/*
 * We only support separate modules for book3s 64
 */
#ifdef CONFIG_PPC_BOOK3S_64

1888 1889
module_init(kvmppc_book3s_init_pr);
module_exit(kvmppc_book3s_exit_pr);
1890 1891

MODULE_LICENSE("GPL");
1892 1893
MODULE_ALIAS_MISCDEV(KVM_MINOR);
MODULE_ALIAS("devname:kvm");
1894
#endif
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