fsi.c 31.1 KB
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/*
 * Fifo-attached Serial Interface (FSI) support for SH7724
 *
 * Copyright (C) 2009 Renesas Solutions Corp.
 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
 *
 * Based on ssi.c
 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/delay.h>
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#include <linux/pm_runtime.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <sound/soc.h>
#include <sound/sh_fsi.h>

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/* PortA/PortB register */
#define REG_DO_FMT	0x0000
#define REG_DOFF_CTL	0x0004
#define REG_DOFF_ST	0x0008
#define REG_DI_FMT	0x000C
#define REG_DIFF_CTL	0x0010
#define REG_DIFF_ST	0x0014
#define REG_CKG1	0x0018
#define REG_CKG2	0x001C
#define REG_DIDT	0x0020
#define REG_DODT	0x0024
#define REG_MUTE_ST	0x0028
#define REG_OUT_SEL	0x0030
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/* master register */
#define MST_CLK_RST	0x0210
#define MST_SOFT_RST	0x0214
#define MST_FIFO_SZ	0x0218

/* core register (depend on FSI version) */
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#define A_MST_CTLR	0x0180
#define B_MST_CTLR	0x01A0
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#define CPU_INT_ST	0x01F4
#define CPU_IEMSK	0x01F8
#define CPU_IMSK	0x01FC
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#define INT_ST		0x0200
#define IEMSK		0x0204
#define IMSK		0x0208

/* DO_FMT */
/* DI_FMT */
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#define CR_BWS_24	(0x0 << 20) /* FSI2 */
#define CR_BWS_16	(0x1 << 20) /* FSI2 */
#define CR_BWS_20	(0x2 << 20) /* FSI2 */

#define CR_DTMD_PCM		(0x0 << 8) /* FSI2 */
#define CR_DTMD_SPDIF_PCM	(0x1 << 8) /* FSI2 */
#define CR_DTMD_SPDIF_STREAM	(0x2 << 8) /* FSI2 */

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#define CR_MONO		(0x0 << 4)
#define CR_MONO_D	(0x1 << 4)
#define CR_PCM		(0x2 << 4)
#define CR_I2S		(0x3 << 4)
#define CR_TDM		(0x4 << 4)
#define CR_TDM_D	(0x5 << 4)
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/* DOFF_CTL */
/* DIFF_CTL */
#define IRQ_HALF	0x00100000
#define FIFO_CLR	0x00000001

/* DOFF_ST */
#define ERR_OVER	0x00000010
#define ERR_UNDER	0x00000001
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#define ST_ERR		(ERR_OVER | ERR_UNDER)
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/* CKG1 */
#define ACKMD_MASK	0x00007000
#define BPFMD_MASK	0x00000700
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#define DIMD		(1 << 4)
#define DOMD		(1 << 0)
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/* A/B MST_CTLR */
#define BP	(1 << 4)	/* Fix the signal of Biphase output */
#define SE	(1 << 0)	/* Fix the master clock */

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/* CLK_RST */
#define B_CLK		0x00000010
#define A_CLK		0x00000001

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/* IO SHIFT / MACRO */
#define BI_SHIFT	12
#define BO_SHIFT	8
#define AI_SHIFT	4
#define AO_SHIFT	0
#define AB_IO(param, shift)	(param << shift)
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/* SOFT_RST */
#define PBSR		(1 << 12) /* Port B Software Reset */
#define PASR		(1 <<  8) /* Port A Software Reset */
#define IR		(1 <<  4) /* Interrupt Reset */
#define FSISR		(1 <<  0) /* Software Reset */

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/* OUT_SEL (FSI2) */
#define DMMD		(1 << 4) /* SPDIF output timing 0: Biphase only */
				 /*			1: Biphase and serial */

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/* FIFO_SZ */
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#define FIFO_SZ_MASK	0x7
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#define FSI_RATES SNDRV_PCM_RATE_8000_96000

#define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)

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typedef int (*set_rate_func)(struct device *dev, int is_porta, int rate, int enable);

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/*
 * FSI driver use below type name for variable
 *
 * xxx_len	: data length
 * xxx_width	: data width
 * xxx_offset	: data offset
 * xxx_num	: number of data
 */

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/*
 *		struct
 */
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struct fsi_stream {
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	struct snd_pcm_substream *substream;

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	int fifo_max_num;
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	int buff_offset;
	int buff_len;
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	int period_len;
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	int period_num;
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	int uerr_num;
	int oerr_num;
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};

struct fsi_priv {
	void __iomem *base;
	struct fsi_master *master;

	struct fsi_stream playback;
	struct fsi_stream capture;
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	int chan_num:16;
	int clk_master:1;

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	long rate;
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	/* for suspend/resume */
	u32 saved_do_fmt;
	u32 saved_di_fmt;
	u32 saved_ckg1;
	u32 saved_ckg2;
	u32 saved_out_sel;
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};

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struct fsi_core {
	int ver;

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	u32 int_st;
	u32 iemsk;
	u32 imsk;
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	u32 a_mclk;
	u32 b_mclk;
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};

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struct fsi_master {
	void __iomem *base;
	int irq;
	struct fsi_priv fsia;
	struct fsi_priv fsib;
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	struct fsi_core *core;
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	struct sh_fsi_platform_info *info;
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	spinlock_t lock;
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	/* for suspend/resume */
	u32 saved_a_mclk;
	u32 saved_b_mclk;
	u32 saved_iemsk;
	u32 saved_imsk;
	u32 saved_clk_rst;
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};

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/*
 *		basic read write function
 */
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static void __fsi_reg_write(u32 reg, u32 data)
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{
	/* valid data area is 24bit */
	data &= 0x00ffffff;

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	__raw_writel(data, reg);
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}

static u32 __fsi_reg_read(u32 reg)
{
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	return __raw_readl(reg);
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}

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static void __fsi_reg_mask_set(u32 reg, u32 mask, u32 data)
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{
	u32 val = __fsi_reg_read(reg);

	val &= ~mask;
	val |= data & mask;

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	__fsi_reg_write(reg, val);
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}

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#define fsi_reg_write(p, r, d)\
	__fsi_reg_write((u32)(p->base + REG_##r), d)
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#define fsi_reg_read(p, r)\
	__fsi_reg_read((u32)(p->base + REG_##r))
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#define fsi_reg_mask_set(p, r, m, d)\
	__fsi_reg_mask_set((u32)(p->base + REG_##r), m, d)
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#define fsi_master_read(p, r) _fsi_master_read(p, MST_##r)
#define fsi_core_read(p, r)   _fsi_master_read(p, p->core->r)
static u32 _fsi_master_read(struct fsi_master *master, u32 reg)
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{
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	u32 ret;
	unsigned long flags;

	spin_lock_irqsave(&master->lock, flags);
	ret = __fsi_reg_read((u32)(master->base + reg));
	spin_unlock_irqrestore(&master->lock, flags);

	return ret;
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}

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#define fsi_master_mask_set(p, r, m, d) _fsi_master_mask_set(p, MST_##r, m, d)
#define fsi_core_mask_set(p, r, m, d)  _fsi_master_mask_set(p, p->core->r, m, d)
static void _fsi_master_mask_set(struct fsi_master *master,
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			       u32 reg, u32 mask, u32 data)
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{
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	unsigned long flags;

	spin_lock_irqsave(&master->lock, flags);
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	__fsi_reg_mask_set((u32)(master->base + reg), mask, data);
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	spin_unlock_irqrestore(&master->lock, flags);
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}

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/*
 *		basic function
 */
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static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
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{
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	return fsi->master;
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}

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static int fsi_is_clk_master(struct fsi_priv *fsi)
{
	return fsi->clk_master;
}

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static int fsi_is_port_a(struct fsi_priv *fsi)
{
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	return fsi->master->base == fsi->base;
}
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static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
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{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
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	return  rtd->cpu_dai;
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}

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static struct fsi_priv *fsi_get_priv_frm_dai(struct snd_soc_dai *dai)
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{
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	struct fsi_master *master = snd_soc_dai_get_drvdata(dai);
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	if (dai->id == 0)
		return &master->fsia;
	else
		return &master->fsib;
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}

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static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
{
	return fsi_get_priv_frm_dai(fsi_get_dai(substream));
}

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static set_rate_func fsi_get_info_set_rate(struct fsi_master *master)
{
	if (!master->info)
		return NULL;

	return master->info->set_rate;
}

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static u32 fsi_get_info_flags(struct fsi_priv *fsi)
{
	int is_porta = fsi_is_port_a(fsi);
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	struct fsi_master *master = fsi_get_master(fsi);
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	if (!master->info)
		return 0;

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	return is_porta ? master->info->porta_flags :
		master->info->portb_flags;
}

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static inline int fsi_stream_is_play(int stream)
{
	return stream == SNDRV_PCM_STREAM_PLAYBACK;
}

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Kuninori Morimoto 已提交
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static inline int fsi_is_play(struct snd_pcm_substream *substream)
{
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	return fsi_stream_is_play(substream->stream);
}

static inline struct fsi_stream *fsi_get_stream(struct fsi_priv *fsi,
						int is_play)
{
	return is_play ? &fsi->playback : &fsi->capture;
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}

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static u32 fsi_get_port_shift(struct fsi_priv *fsi, int is_play)
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{
	int is_porta = fsi_is_port_a(fsi);
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	u32 shift;
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	if (is_porta)
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		shift = is_play ? AO_SHIFT : AI_SHIFT;
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	else
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		shift = is_play ? BO_SHIFT : BI_SHIFT;
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	return shift;
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}

static void fsi_stream_push(struct fsi_priv *fsi,
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			    int is_play,
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			    struct snd_pcm_substream *substream,
			    u32 buffer_len,
			    u32 period_len)
{
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	struct fsi_stream *io = fsi_get_stream(fsi, is_play);

	io->substream	= substream;
	io->buff_len	= buffer_len;
	io->buff_offset	= 0;
	io->period_len	= period_len;
	io->period_num	= 0;
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	io->oerr_num	= -1; /* ignore 1st err */
	io->uerr_num	= -1; /* ignore 1st err */
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}

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static void fsi_stream_pop(struct fsi_priv *fsi, int is_play)
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{
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	struct fsi_stream *io = fsi_get_stream(fsi, is_play);
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	struct snd_soc_dai *dai = fsi_get_dai(io->substream);


	if (io->oerr_num > 0)
		dev_err(dai->dev, "over_run = %d\n", io->oerr_num);

	if (io->uerr_num > 0)
		dev_err(dai->dev, "under_run = %d\n", io->uerr_num);
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	io->substream	= NULL;
	io->buff_len	= 0;
	io->buff_offset	= 0;
	io->period_len	= 0;
	io->period_num	= 0;
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	io->oerr_num	= 0;
	io->uerr_num	= 0;
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}

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static int fsi_get_fifo_data_num(struct fsi_priv *fsi, int is_play)
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{
	u32 status;
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	int data_num;
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	status = is_play ?
		fsi_reg_read(fsi, DOFF_ST) :
		fsi_reg_read(fsi, DIFF_ST);

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	data_num = 0x1ff & (status >> 8);
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	data_num *= fsi->chan_num;
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	return data_num;
}
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static int fsi_len2num(int len, int width)
{
	return len / width;
}

#define fsi_num2offset(a, b) fsi_num2len(a, b)
static int fsi_num2len(int num, int width)
{
	return num * width;
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}

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static int fsi_get_frame_width(struct fsi_priv *fsi, int is_play)
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{
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	struct fsi_stream *io = fsi_get_stream(fsi, is_play);
	struct snd_pcm_substream *substream = io->substream;
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	struct snd_pcm_runtime *runtime = substream->runtime;

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	return frames_to_bytes(runtime, 1) / fsi->chan_num;
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}

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static void fsi_count_fifo_err(struct fsi_priv *fsi)
{
	u32 ostatus = fsi_reg_read(fsi, DOFF_ST);
	u32 istatus = fsi_reg_read(fsi, DIFF_ST);

	if (ostatus & ERR_OVER)
		fsi->playback.oerr_num++;

	if (ostatus & ERR_UNDER)
		fsi->playback.uerr_num++;

	if (istatus & ERR_OVER)
		fsi->capture.oerr_num++;

	if (istatus & ERR_UNDER)
		fsi->capture.uerr_num++;

	fsi_reg_write(fsi, DOFF_ST, 0);
	fsi_reg_write(fsi, DIFF_ST, 0);
}

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/*
 *		dma function
 */

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static u8 *fsi_dma_get_area(struct fsi_priv *fsi, int stream)
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{
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	int is_play = fsi_stream_is_play(stream);
	struct fsi_stream *io = fsi_get_stream(fsi, is_play);

	return io->substream->runtime->dma_area + io->buff_offset;
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}

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static void fsi_dma_soft_push16(struct fsi_priv *fsi, int num)
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{
	u16 *start;
	int i;

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	start  = (u16 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_PLAYBACK);
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	for (i = 0; i < num; i++)
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		fsi_reg_write(fsi, DODT, ((u32)*(start + i) << 8));
}

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static void fsi_dma_soft_pop16(struct fsi_priv *fsi, int num)
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{
	u16 *start;
	int i;

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	start  = (u16 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_CAPTURE);

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	for (i = 0; i < num; i++)
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		*(start + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8);
}

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static void fsi_dma_soft_push32(struct fsi_priv *fsi, int num)
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{
	u32 *start;
	int i;

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	start  = (u32 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_PLAYBACK);

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	for (i = 0; i < num; i++)
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		fsi_reg_write(fsi, DODT, *(start + i));
}

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static void fsi_dma_soft_pop32(struct fsi_priv *fsi, int num)
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{
	u32 *start;
	int i;

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	start  = (u32 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_CAPTURE);
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	for (i = 0; i < num; i++)
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		*(start + i) = fsi_reg_read(fsi, DIDT);
}

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/*
 *		irq function
 */
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static void fsi_irq_enable(struct fsi_priv *fsi, int is_play)
{
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	u32 data = AB_IO(1, fsi_get_port_shift(fsi, is_play));
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	struct fsi_master *master = fsi_get_master(fsi);
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	fsi_core_mask_set(master, imsk,  data, data);
	fsi_core_mask_set(master, iemsk, data, data);
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}

static void fsi_irq_disable(struct fsi_priv *fsi, int is_play)
{
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	u32 data = AB_IO(1, fsi_get_port_shift(fsi, is_play));
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	struct fsi_master *master = fsi_get_master(fsi);
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	fsi_core_mask_set(master, imsk,  data, 0);
	fsi_core_mask_set(master, iemsk, data, 0);
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}

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static u32 fsi_irq_get_status(struct fsi_master *master)
{
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	return fsi_core_read(master, int_st);
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}

static void fsi_irq_clear_status(struct fsi_priv *fsi)
{
	u32 data = 0;
	struct fsi_master *master = fsi_get_master(fsi);

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	data |= AB_IO(1, fsi_get_port_shift(fsi, 0));
	data |= AB_IO(1, fsi_get_port_shift(fsi, 1));
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	/* clear interrupt factor */
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	fsi_core_mask_set(master, int_st, data, 0);
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}

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/*
 *		SPDIF master clock function
 *
 * These functions are used later FSI2
 */
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static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
{
	struct fsi_master *master = fsi_get_master(fsi);
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	u32 mask, val;
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	if (master->core->ver < 2) {
		pr_err("fsi: register access err (%s)\n", __func__);
		return;
	}

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	mask = BP | SE;
	val = enable ? mask : 0;

	fsi_is_port_a(fsi) ?
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		fsi_core_mask_set(master, a_mclk, mask, val) :
		fsi_core_mask_set(master, b_mclk, mask, val);
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}

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/*
 *		ctrl function
 */
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static void fsi_clk_ctrl(struct fsi_priv *fsi, int enable)
{
	u32 val = fsi_is_port_a(fsi) ? (1 << 0) : (1 << 4);
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	struct fsi_master *master = fsi_get_master(fsi);
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	if (enable)
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		fsi_master_mask_set(master, CLK_RST, val, val);
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	else
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		fsi_master_mask_set(master, CLK_RST, val, 0);
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}

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static void fsi_fifo_init(struct fsi_priv *fsi,
			  int is_play,
			  struct snd_soc_dai *dai)
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{
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	struct fsi_master *master = fsi_get_master(fsi);
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	struct fsi_stream *io = fsi_get_stream(fsi, is_play);
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	u32 shift, i;
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	/* get on-chip RAM capacity */
	shift = fsi_master_read(master, FIFO_SZ);
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	shift >>= fsi_get_port_shift(fsi, is_play);
	shift &= FIFO_SZ_MASK;
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	io->fifo_max_num = 256 << shift;
	dev_dbg(dai->dev, "fifo = %d words\n", io->fifo_max_num);
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	/*
	 * The maximum number of sample data varies depending
	 * on the number of channels selected for the format.
	 *
	 * FIFOs are used in 4-channel units in 3-channel mode
	 * and in 8-channel units in 5- to 7-channel mode
	 * meaning that more FIFOs than the required size of DPRAM
	 * are used.
	 *
	 * ex) if 256 words of DP-RAM is connected
	 * 1 channel:  256 (256 x 1 = 256)
	 * 2 channels: 128 (128 x 2 = 256)
	 * 3 channels:  64 ( 64 x 3 = 192)
	 * 4 channels:  64 ( 64 x 4 = 256)
	 * 5 channels:  32 ( 32 x 5 = 160)
	 * 6 channels:  32 ( 32 x 6 = 192)
	 * 7 channels:  32 ( 32 x 7 = 224)
	 * 8 channels:  32 ( 32 x 8 = 256)
	 */
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	for (i = 1; i < fsi->chan_num; i <<= 1)
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		io->fifo_max_num >>= 1;
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	dev_dbg(dai->dev, "%d channel %d store\n",
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		fsi->chan_num, io->fifo_max_num);
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	/*
	 * set interrupt generation factor
	 * clear FIFO
	 */
	if (is_play) {
		fsi_reg_write(fsi,	DOFF_CTL, IRQ_HALF);
		fsi_reg_mask_set(fsi,	DOFF_CTL, FIFO_CLR, FIFO_CLR);
	} else {
		fsi_reg_write(fsi,	DIFF_CTL, IRQ_HALF);
		fsi_reg_mask_set(fsi,	DIFF_CTL, FIFO_CLR, FIFO_CLR);
	}
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}

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static void fsi_soft_all_reset(struct fsi_master *master)
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{
	/* port AB reset */
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	fsi_master_mask_set(master, SOFT_RST, PASR | PBSR, 0);
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	mdelay(10);

	/* soft reset */
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	fsi_master_mask_set(master, SOFT_RST, FSISR, 0);
	fsi_master_mask_set(master, SOFT_RST, FSISR, FSISR);
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	mdelay(10);
}

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static int fsi_fifo_data_ctrl(struct fsi_priv *fsi, int stream)
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{
	struct snd_pcm_runtime *runtime;
	struct snd_pcm_substream *substream = NULL;
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	int is_play = fsi_stream_is_play(stream);
	struct fsi_stream *io = fsi_get_stream(fsi, is_play);
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	int data_residue_num;
	int data_num;
	int data_num_max;
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	int ch_width;
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	int over_period;
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	void (*fn)(struct fsi_priv *fsi, int size);
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	if (!fsi			||
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	    !io->substream		||
	    !io->substream->runtime)
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		return -EINVAL;

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	over_period	= 0;
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	substream	= io->substream;
657
	runtime		= substream->runtime;
658 659 660 661

	/* FSI FIFO has limit.
	 * So, this driver can not send periods data at a time
	 */
662 663
	if (io->buff_offset >=
	    fsi_num2offset(io->period_num + 1, io->period_len)) {
664

665
		over_period = 1;
666
		io->period_num = (io->period_num + 1) % runtime->periods;
667

668 669
		if (0 == io->period_num)
			io->buff_offset = 0;
670 671 672
	}

	/* get 1 channel data width */
673
	ch_width = fsi_get_frame_width(fsi, is_play);
674

675
	/* get residue data number of alsa */
676
	data_residue_num = fsi_len2num(io->buff_len - io->buff_offset,
677 678 679 680 681 682 683 684 685
				       ch_width);

	if (is_play) {
		/*
		 * for play-back
		 *
		 * data_num_max	: number of FSI fifo free space
		 * data_num	: number of ALSA residue data
		 */
686
		data_num_max  = io->fifo_max_num * fsi->chan_num;
687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721
		data_num_max -= fsi_get_fifo_data_num(fsi, is_play);

		data_num = data_residue_num;

		switch (ch_width) {
		case 2:
			fn = fsi_dma_soft_push16;
			break;
		case 4:
			fn = fsi_dma_soft_push32;
			break;
		default:
			return -EINVAL;
		}
	} else {
		/*
		 * for capture
		 *
		 * data_num_max	: number of ALSA free space
		 * data_num	: number of data in FSI fifo
		 */
		data_num_max = data_residue_num;
		data_num     = fsi_get_fifo_data_num(fsi, is_play);

		switch (ch_width) {
		case 2:
			fn = fsi_dma_soft_pop16;
			break;
		case 4:
			fn = fsi_dma_soft_pop32;
			break;
		default:
			return -EINVAL;
		}
	}
722

723
	data_num = min(data_num, data_num_max);
724

725
	fn(fsi, data_num);
726

727
	/* update buff_offset */
728
	io->buff_offset += fsi_num2offset(data_num, ch_width);
729

730
	if (over_period)
731 732
		snd_pcm_period_elapsed(substream);

733
	return 0;
734 735
}

736
static int fsi_data_pop(struct fsi_priv *fsi)
737
{
738
	return fsi_fifo_data_ctrl(fsi, SNDRV_PCM_STREAM_CAPTURE);
739
}
740

741
static int fsi_data_push(struct fsi_priv *fsi)
742
{
743
	return fsi_fifo_data_ctrl(fsi, SNDRV_PCM_STREAM_PLAYBACK);
744 745
}

746 747
static irqreturn_t fsi_interrupt(int irq, void *data)
{
748
	struct fsi_master *master = data;
749
	u32 int_st = fsi_irq_get_status(master);
750 751

	/* clear irq status */
752 753
	fsi_master_mask_set(master, SOFT_RST, IR, 0);
	fsi_master_mask_set(master, SOFT_RST, IR, IR);
754

755
	if (int_st & AB_IO(1, AO_SHIFT))
756
		fsi_data_push(&master->fsia);
757
	if (int_st & AB_IO(1, BO_SHIFT))
758
		fsi_data_push(&master->fsib);
759
	if (int_st & AB_IO(1, AI_SHIFT))
760
		fsi_data_pop(&master->fsia);
761
	if (int_st & AB_IO(1, BI_SHIFT))
762 763 764 765
		fsi_data_pop(&master->fsib);

	fsi_count_fifo_err(&master->fsia);
	fsi_count_fifo_err(&master->fsib);
766

767 768
	fsi_irq_clear_status(&master->fsia);
	fsi_irq_clear_status(&master->fsib);
769 770 771 772

	return IRQ_HANDLED;
}

773 774 775
/*
 *		dai ops
 */
776 777 778 779

static int fsi_dai_startup(struct snd_pcm_substream *substream,
			   struct snd_soc_dai *dai)
{
780
	struct fsi_priv *fsi = fsi_get_priv(substream);
781
	u32 flags = fsi_get_info_flags(fsi);
782
	u32 data;
K
Kuninori Morimoto 已提交
783
	int is_play = fsi_is_play(substream);
784

785
	pm_runtime_get_sync(dai->dev);
786 787 788 789


	/* clock inversion (CKG2) */
	data = 0;
790 791 792 793 794 795 796 797 798
	if (SH_FSI_LRM_INV & flags)
		data |= 1 << 12;
	if (SH_FSI_BRM_INV & flags)
		data |= 1 << 8;
	if (SH_FSI_LRS_INV & flags)
		data |= 1 << 4;
	if (SH_FSI_BRS_INV & flags)
		data |= 1 << 0;

799 800
	fsi_reg_write(fsi, CKG2, data);

801 802 803 804 805
	/* irq clear */
	fsi_irq_disable(fsi, is_play);
	fsi_irq_clear_status(fsi);

	/* fifo init */
806
	fsi_fifo_init(fsi, is_play, dai);
807

808
	return 0;
809 810 811 812 813
}

static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
			     struct snd_soc_dai *dai)
{
814
	struct fsi_priv *fsi = fsi_get_priv(substream);
K
Kuninori Morimoto 已提交
815
	int is_play = fsi_is_play(substream);
816
	struct fsi_master *master = fsi_get_master(fsi);
817
	set_rate_func set_rate = fsi_get_info_set_rate(master);
818 819 820

	fsi_irq_disable(fsi, is_play);

821 822
	if (fsi_is_clk_master(fsi)) {
		fsi_clk_ctrl(fsi, 0);
823
		set_rate(dai->dev, fsi_is_port_a(fsi), fsi->rate, 0);
824 825
	}

826 827
	fsi->rate = 0;

828
	pm_runtime_put_sync(dai->dev);
829 830 831 832 833
}

static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
			   struct snd_soc_dai *dai)
{
834
	struct fsi_priv *fsi = fsi_get_priv(substream);
835
	struct snd_pcm_runtime *runtime = substream->runtime;
K
Kuninori Morimoto 已提交
836
	int is_play = fsi_is_play(substream);
837 838 839 840
	int ret = 0;

	switch (cmd) {
	case SNDRV_PCM_TRIGGER_START:
841
		fsi_stream_push(fsi, is_play, substream,
842 843
				frames_to_bytes(runtime, runtime->buffer_size),
				frames_to_bytes(runtime, runtime->period_size));
844
		ret = is_play ? fsi_data_push(fsi) : fsi_data_pop(fsi);
845
		fsi_irq_enable(fsi, is_play);
846 847 848
		break;
	case SNDRV_PCM_TRIGGER_STOP:
		fsi_irq_disable(fsi, is_play);
849
		fsi_stream_pop(fsi, is_play);
850 851 852 853 854 855
		break;
	}

	return ret;
}

856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897
static int fsi_set_fmt_dai(struct fsi_priv *fsi, unsigned int fmt)
{
	u32 data = 0;

	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_I2S:
		data = CR_I2S;
		fsi->chan_num = 2;
		break;
	case SND_SOC_DAIFMT_LEFT_J:
		data = CR_PCM;
		fsi->chan_num = 2;
		break;
	default:
		return -EINVAL;
	}

	fsi_reg_write(fsi, DO_FMT, data);
	fsi_reg_write(fsi, DI_FMT, data);

	return 0;
}

static int fsi_set_fmt_spdif(struct fsi_priv *fsi)
{
	struct fsi_master *master = fsi_get_master(fsi);
	u32 data = 0;

	if (master->core->ver < 2)
		return -EINVAL;

	data = CR_BWS_16 | CR_DTMD_SPDIF_PCM | CR_PCM;
	fsi->chan_num = 2;
	fsi_spdif_clk_ctrl(fsi, 1);
	fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD);

	fsi_reg_write(fsi, DO_FMT, data);
	fsi_reg_write(fsi, DI_FMT, data);

	return 0;
}

898 899 900
static int fsi_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
	struct fsi_priv *fsi = fsi_get_priv_frm_dai(dai);
901 902
	struct fsi_master *master = fsi_get_master(fsi);
	set_rate_func set_rate = fsi_get_info_set_rate(master);
903
	u32 flags = fsi_get_info_flags(fsi);
904 905 906 907 908 909 910 911 912
	u32 data = 0;
	int ret;

	pm_runtime_get_sync(dai->dev);

	/* set master/slave audio interface */
	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBM_CFM:
		data = DIMD | DOMD;
913
		fsi->clk_master = 1;
914 915 916 917 918 919 920
		break;
	case SND_SOC_DAIFMT_CBS_CFS:
		break;
	default:
		ret = -EINVAL;
		goto set_fmt_exit;
	}
921 922 923 924 925 926 927

	if (fsi_is_clk_master(fsi) && !set_rate) {
		dev_err(dai->dev, "platform doesn't have set_rate\n");
		ret = -EINVAL;
		goto set_fmt_exit;
	}

928
	fsi_reg_mask_set(fsi, CKG1, (DIMD | DOMD), data);
929 930 931 932 933 934 935 936 937 938 939 940

	/* set format */
	switch (flags & SH_FSI_FMT_MASK) {
	case SH_FSI_FMT_DAI:
		ret = fsi_set_fmt_dai(fsi, fmt & SND_SOC_DAIFMT_FORMAT_MASK);
		break;
	case SH_FSI_FMT_SPDIF:
		ret = fsi_set_fmt_spdif(fsi);
		break;
	default:
		ret = -EINVAL;
	}
941 942 943 944 945 946 947

set_fmt_exit:
	pm_runtime_put_sync(dai->dev);

	return ret;
}

948 949 950 951 952 953
static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
			     struct snd_pcm_hw_params *params,
			     struct snd_soc_dai *dai)
{
	struct fsi_priv *fsi = fsi_get_priv(substream);
	struct fsi_master *master = fsi_get_master(fsi);
954
	set_rate_func set_rate = fsi_get_info_set_rate(master);
955
	int fsi_ver = master->core->ver;
956
	long rate = params_rate(params);
957 958
	int ret;

959
	if (!fsi_is_clk_master(fsi))
960 961
		return 0;

962 963 964
	ret = set_rate(dai->dev, fsi_is_port_a(fsi), rate, 1);
	if (ret < 0) /* error */
		return ret;
965

966
	fsi->rate = rate;
967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028
	if (ret > 0) {
		u32 data = 0;

		switch (ret & SH_FSI_ACKMD_MASK) {
		default:
			/* FALL THROUGH */
		case SH_FSI_ACKMD_512:
			data |= (0x0 << 12);
			break;
		case SH_FSI_ACKMD_256:
			data |= (0x1 << 12);
			break;
		case SH_FSI_ACKMD_128:
			data |= (0x2 << 12);
			break;
		case SH_FSI_ACKMD_64:
			data |= (0x3 << 12);
			break;
		case SH_FSI_ACKMD_32:
			if (fsi_ver < 2)
				dev_err(dai->dev, "unsupported ACKMD\n");
			else
				data |= (0x4 << 12);
			break;
		}

		switch (ret & SH_FSI_BPFMD_MASK) {
		default:
			/* FALL THROUGH */
		case SH_FSI_BPFMD_32:
			data |= (0x0 << 8);
			break;
		case SH_FSI_BPFMD_64:
			data |= (0x1 << 8);
			break;
		case SH_FSI_BPFMD_128:
			data |= (0x2 << 8);
			break;
		case SH_FSI_BPFMD_256:
			data |= (0x3 << 8);
			break;
		case SH_FSI_BPFMD_512:
			data |= (0x4 << 8);
			break;
		case SH_FSI_BPFMD_16:
			if (fsi_ver < 2)
				dev_err(dai->dev, "unsupported ACKMD\n");
			else
				data |= (0x7 << 8);
			break;
		}

		fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
		udelay(10);
		fsi_clk_ctrl(fsi, 1);
		ret = 0;
	}

	return ret;

}

1029 1030 1031 1032
static struct snd_soc_dai_ops fsi_dai_ops = {
	.startup	= fsi_dai_startup,
	.shutdown	= fsi_dai_shutdown,
	.trigger	= fsi_dai_trigger,
1033
	.set_fmt	= fsi_dai_set_fmt,
1034
	.hw_params	= fsi_dai_hw_params,
1035 1036
};

1037 1038 1039
/*
 *		pcm ops
 */
1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087

static struct snd_pcm_hardware fsi_pcm_hardware = {
	.info =		SNDRV_PCM_INFO_INTERLEAVED	|
			SNDRV_PCM_INFO_MMAP		|
			SNDRV_PCM_INFO_MMAP_VALID	|
			SNDRV_PCM_INFO_PAUSE,
	.formats		= FSI_FMTS,
	.rates			= FSI_RATES,
	.rate_min		= 8000,
	.rate_max		= 192000,
	.channels_min		= 1,
	.channels_max		= 2,
	.buffer_bytes_max	= 64 * 1024,
	.period_bytes_min	= 32,
	.period_bytes_max	= 8192,
	.periods_min		= 1,
	.periods_max		= 32,
	.fifo_size		= 256,
};

static int fsi_pcm_open(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	int ret = 0;

	snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);

	ret = snd_pcm_hw_constraint_integer(runtime,
					    SNDRV_PCM_HW_PARAM_PERIODS);

	return ret;
}

static int fsi_hw_params(struct snd_pcm_substream *substream,
			 struct snd_pcm_hw_params *hw_params)
{
	return snd_pcm_lib_malloc_pages(substream,
					params_buffer_bytes(hw_params));
}

static int fsi_hw_free(struct snd_pcm_substream *substream)
{
	return snd_pcm_lib_free_pages(substream);
}

static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
1088
	struct fsi_priv *fsi = fsi_get_priv(substream);
1089
	struct fsi_stream *io = fsi_get_stream(fsi, fsi_is_play(substream));
1090 1091
	long location;

1092
	location = (io->buff_offset - 1);
1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106
	if (location < 0)
		location = 0;

	return bytes_to_frames(runtime, location);
}

static struct snd_pcm_ops fsi_pcm_ops = {
	.open		= fsi_pcm_open,
	.ioctl		= snd_pcm_lib_ioctl,
	.hw_params	= fsi_hw_params,
	.hw_free	= fsi_hw_free,
	.pointer	= fsi_pointer,
};

1107 1108 1109
/*
 *		snd_soc_platform
 */
1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133

#define PREALLOC_BUFFER		(32 * 1024)
#define PREALLOC_BUFFER_MAX	(32 * 1024)

static void fsi_pcm_free(struct snd_pcm *pcm)
{
	snd_pcm_lib_preallocate_free_for_all(pcm);
}

static int fsi_pcm_new(struct snd_card *card,
		       struct snd_soc_dai *dai,
		       struct snd_pcm *pcm)
{
	/*
	 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
	 * in MMAP mode (i.e. aplay -M)
	 */
	return snd_pcm_lib_preallocate_pages_for_all(
		pcm,
		SNDRV_DMA_TYPE_CONTINUOUS,
		snd_dma_continuous_data(GFP_KERNEL),
		PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
}

1134 1135 1136
/*
 *		alsa struct
 */
1137

1138
static struct snd_soc_dai_driver fsi_soc_dai[] = {
1139
	{
1140
		.name			= "fsia-dai",
1141 1142 1143 1144 1145 1146
		.playback = {
			.rates		= FSI_RATES,
			.formats	= FSI_FMTS,
			.channels_min	= 1,
			.channels_max	= 8,
		},
1147 1148 1149 1150 1151 1152
		.capture = {
			.rates		= FSI_RATES,
			.formats	= FSI_FMTS,
			.channels_min	= 1,
			.channels_max	= 8,
		},
1153 1154 1155
		.ops = &fsi_dai_ops,
	},
	{
1156
		.name			= "fsib-dai",
1157 1158 1159 1160 1161 1162
		.playback = {
			.rates		= FSI_RATES,
			.formats	= FSI_FMTS,
			.channels_min	= 1,
			.channels_max	= 8,
		},
1163 1164 1165 1166 1167 1168
		.capture = {
			.rates		= FSI_RATES,
			.formats	= FSI_FMTS,
			.channels_min	= 1,
			.channels_max	= 8,
		},
1169 1170 1171 1172
		.ops = &fsi_dai_ops,
	},
};

1173 1174
static struct snd_soc_platform_driver fsi_soc_platform = {
	.ops		= &fsi_pcm_ops,
1175 1176 1177 1178
	.pcm_new	= fsi_pcm_new,
	.pcm_free	= fsi_pcm_free,
};

1179 1180 1181
/*
 *		platform function
 */
1182 1183 1184

static int fsi_probe(struct platform_device *pdev)
{
1185
	struct fsi_master *master;
1186
	const struct platform_device_id	*id_entry;
1187 1188 1189 1190
	struct resource *res;
	unsigned int irq;
	int ret;

1191 1192 1193 1194 1195 1196
	id_entry = pdev->id_entry;
	if (!id_entry) {
		dev_err(&pdev->dev, "unknown fsi device\n");
		return -ENODEV;
	}

1197 1198
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	irq = platform_get_irq(pdev, 0);
1199
	if (!res || (int)irq <= 0) {
1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218
		dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
		ret = -ENODEV;
		goto exit;
	}

	master = kzalloc(sizeof(*master), GFP_KERNEL);
	if (!master) {
		dev_err(&pdev->dev, "Could not allocate master\n");
		ret = -ENOMEM;
		goto exit;
	}

	master->base = ioremap_nocache(res->start, resource_size(res));
	if (!master->base) {
		ret = -ENXIO;
		dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
		goto exit_kfree;
	}

1219
	/* master setting */
1220 1221
	master->irq		= irq;
	master->info		= pdev->dev.platform_data;
1222 1223 1224 1225
	master->core		= (struct fsi_core *)id_entry->driver_data;
	spin_lock_init(&master->lock);

	/* FSI A setting */
1226
	master->fsia.base	= master->base;
1227
	master->fsia.master	= master;
1228 1229

	/* FSI B setting */
1230
	master->fsib.base	= master->base + 0x40;
1231
	master->fsib.master	= master;
1232

1233
	pm_runtime_enable(&pdev->dev);
1234
	dev_set_drvdata(&pdev->dev, master);
1235

1236
	pm_runtime_get_sync(&pdev->dev);
1237
	fsi_soft_all_reset(master);
1238
	pm_runtime_put_sync(&pdev->dev);
1239

1240 1241
	ret = request_irq(irq, &fsi_interrupt, IRQF_DISABLED,
			  id_entry->name, master);
1242 1243
	if (ret) {
		dev_err(&pdev->dev, "irq request err\n");
1244
		goto exit_iounmap;
1245 1246
	}

1247
	ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform);
1248 1249 1250 1251 1252
	if (ret < 0) {
		dev_err(&pdev->dev, "cannot snd soc register\n");
		goto exit_free_irq;
	}

1253 1254 1255 1256 1257 1258
	ret = snd_soc_register_dais(&pdev->dev, fsi_soc_dai,
				    ARRAY_SIZE(fsi_soc_dai));
	if (ret < 0) {
		dev_err(&pdev->dev, "cannot snd dai register\n");
		goto exit_snd_soc;
	}
1259

1260 1261 1262 1263
	return ret;

exit_snd_soc:
	snd_soc_unregister_platform(&pdev->dev);
1264 1265 1266 1267
exit_free_irq:
	free_irq(irq, master);
exit_iounmap:
	iounmap(master->base);
1268
	pm_runtime_disable(&pdev->dev);
1269 1270 1271 1272 1273 1274 1275 1276 1277
exit_kfree:
	kfree(master);
	master = NULL;
exit:
	return ret;
}

static int fsi_remove(struct platform_device *pdev)
{
1278 1279
	struct fsi_master *master;

1280
	master = dev_get_drvdata(&pdev->dev);
1281

1282
	free_irq(master->irq, master);
1283
	pm_runtime_disable(&pdev->dev);
1284

1285 1286
	snd_soc_unregister_dais(&pdev->dev, ARRAY_SIZE(fsi_soc_dai));
	snd_soc_unregister_platform(&pdev->dev);
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	iounmap(master->base);
	kfree(master);
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	return 0;
}

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static void __fsi_suspend(struct fsi_priv *fsi,
			  struct device *dev,
			  set_rate_func set_rate)
{
	fsi->saved_do_fmt	= fsi_reg_read(fsi, DO_FMT);
	fsi->saved_di_fmt	= fsi_reg_read(fsi, DI_FMT);
	fsi->saved_ckg1		= fsi_reg_read(fsi, CKG1);
	fsi->saved_ckg2		= fsi_reg_read(fsi, CKG2);
	fsi->saved_out_sel	= fsi_reg_read(fsi, OUT_SEL);

	if (fsi_is_clk_master(fsi))
		set_rate(dev, fsi_is_port_a(fsi), fsi->rate, 0);
}

static void __fsi_resume(struct fsi_priv *fsi,
			 struct device *dev,
			 set_rate_func set_rate)
{
	fsi_reg_write(fsi, DO_FMT,	fsi->saved_do_fmt);
	fsi_reg_write(fsi, DI_FMT,	fsi->saved_di_fmt);
	fsi_reg_write(fsi, CKG1,	fsi->saved_ckg1);
	fsi_reg_write(fsi, CKG2,	fsi->saved_ckg2);
	fsi_reg_write(fsi, OUT_SEL,	fsi->saved_out_sel);

	if (fsi_is_clk_master(fsi))
		set_rate(dev, fsi_is_port_a(fsi), fsi->rate, 1);
}

static int fsi_suspend(struct device *dev)
{
	struct fsi_master *master = dev_get_drvdata(dev);
	set_rate_func set_rate = fsi_get_info_set_rate(master);

	pm_runtime_get_sync(dev);

	__fsi_suspend(&master->fsia, dev, set_rate);
	__fsi_suspend(&master->fsib, dev, set_rate);

	master->saved_a_mclk	= fsi_core_read(master, a_mclk);
	master->saved_b_mclk	= fsi_core_read(master, b_mclk);
	master->saved_iemsk	= fsi_core_read(master, iemsk);
	master->saved_imsk	= fsi_core_read(master, imsk);
	master->saved_clk_rst	= fsi_master_read(master, CLK_RST);

	pm_runtime_put_sync(dev);

	return 0;
}

static int fsi_resume(struct device *dev)
{
	struct fsi_master *master = dev_get_drvdata(dev);
	set_rate_func set_rate = fsi_get_info_set_rate(master);

	pm_runtime_get_sync(dev);

	__fsi_resume(&master->fsia, dev, set_rate);
	__fsi_resume(&master->fsib, dev, set_rate);

	fsi_core_mask_set(master, a_mclk, 0xffff, master->saved_a_mclk);
	fsi_core_mask_set(master, b_mclk, 0xffff, master->saved_b_mclk);
	fsi_core_mask_set(master, iemsk, 0xffff, master->saved_iemsk);
	fsi_core_mask_set(master, imsk, 0xffff, master->saved_imsk);
	fsi_master_mask_set(master, CLK_RST, 0xffff, master->saved_clk_rst);

	pm_runtime_put_sync(dev);

	return 0;
}

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static int fsi_runtime_nop(struct device *dev)
{
	/* Runtime PM callback shared between ->runtime_suspend()
	 * and ->runtime_resume(). Simply returns success.
	 *
	 * This driver re-initializes all registers after
	 * pm_runtime_get_sync() anyway so there is no need
	 * to save and restore registers here.
	 */
	return 0;
}

static struct dev_pm_ops fsi_pm_ops = {
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	.suspend		= fsi_suspend,
	.resume			= fsi_resume,
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	.runtime_suspend	= fsi_runtime_nop,
	.runtime_resume		= fsi_runtime_nop,
};

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static struct fsi_core fsi1_core = {
	.ver	= 1,

	/* Interrupt */
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	.int_st	= INT_ST,
	.iemsk	= IEMSK,
	.imsk	= IMSK,
};

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static struct fsi_core fsi2_core = {
	.ver	= 2,

	/* Interrupt */
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	.int_st	= CPU_INT_ST,
	.iemsk	= CPU_IEMSK,
	.imsk	= CPU_IMSK,
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	.a_mclk	= A_MST_CTLR,
	.b_mclk	= B_MST_CTLR,
1401 1402 1403
};

static struct platform_device_id fsi_id_table[] = {
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	{ "sh_fsi",	(kernel_ulong_t)&fsi1_core },
	{ "sh_fsi2",	(kernel_ulong_t)&fsi2_core },
1406
	{},
1407
};
1408
MODULE_DEVICE_TABLE(platform, fsi_id_table);
1409

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static struct platform_driver fsi_driver = {
	.driver 	= {
1412
		.name	= "fsi-pcm-audio",
1413
		.pm	= &fsi_pm_ops,
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	},
	.probe		= fsi_probe,
	.remove		= fsi_remove,
1417
	.id_table	= fsi_id_table,
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};

static int __init fsi_mobile_init(void)
{
	return platform_driver_register(&fsi_driver);
}

static void __exit fsi_mobile_exit(void)
{
	platform_driver_unregister(&fsi_driver);
}
1429

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module_init(fsi_mobile_init);
module_exit(fsi_mobile_exit);

MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
1436
MODULE_ALIAS("platform:fsi-pcm-audio");