at91sam9260.dtsi 26.5 KB
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/*
 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
 *
 *  Copyright (C) 2011 Atmel,
 *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
 *                2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
 *
 * Licensed under GPLv2 or later.
 */

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#include "skeleton.dtsi"
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#include <dt-bindings/pinctrl/at91.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/at91.h>
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/ {
	model = "Atmel AT91SAM9260 family SoC";
	compatible = "atmel,at91sam9260";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
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		serial5 = &uart0;
		serial6 = &uart1;
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		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
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		i2c0 = &i2c0;
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		ssc0 = &ssc0;
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	};
	cpus {
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		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
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		};
	};

	memory {
		reg = <0x20000000 0x04000000>;
	};

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	clocks {
		slow_xtal: slow_xtal {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <0>;
		};

		main_xtal: main_xtal {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <0>;
		};

		adc_op_clk: adc_op_clk{
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <5000000>;
		};
	};

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	sram0: sram@002ff000 {
		compatible = "mmio-sram";
		reg = <0x002ff000 0x2000>;
	};

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	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
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				#interrupt-cells = <3>;
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				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
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				atmel,external-irqs = <29 30 31>;
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			};

			ramc0: ramc@ffffea00 {
				compatible = "atmel,at91sam9260-sdramc";
				reg = <0xffffea00 0x200>;
			};

			pmc: pmc@fffffc00 {
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				compatible = "atmel,at91sam9260-pmc";
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				reg = <0xfffffc00 0x100>;
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				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				interrupt-controller;
				#address-cells = <1>;
				#size-cells = <0>;
				#interrupt-cells = <1>;

				main_osc: main_osc {
					compatible = "atmel,at91rm9200-clk-main-osc";
					#clock-cells = <0>;
					interrupts-extended = <&pmc AT91_PMC_MOSCS>;
					clocks = <&main_xtal>;
				};

				main: mainck {
					compatible = "atmel,at91rm9200-clk-main";
					#clock-cells = <0>;
					clocks = <&main_osc>;
				};

				slow_rc_osc: slow_rc_osc {
					compatible = "fixed-clock";
					#clock-cells = <0>;
					clock-frequency = <32768>;
					clock-accuracy = <50000000>;
				};

				clk32k: slck {
					compatible = "atmel,at91sam9260-clk-slow";
					#clock-cells = <0>;
					clocks = <&slow_rc_osc>, <&slow_xtal>;
				};

				plla: pllack {
					compatible = "atmel,at91rm9200-clk-pll";
					#clock-cells = <0>;
					interrupts-extended = <&pmc AT91_PMC_LOCKA>;
					clocks = <&main>;
					reg = <0>;
					atmel,clk-input-range = <1000000 32000000>;
					#atmel,pll-clk-output-range-cells = <4>;
					atmel,pll-clk-output-ranges = <80000000 160000000 0 1>,
								<150000000 240000000 2 1>;
				};

				pllb: pllbck {
					compatible = "atmel,at91rm9200-clk-pll";
					#clock-cells = <0>;
					interrupts-extended = <&pmc AT91_PMC_LOCKB>;
					clocks = <&main>;
					reg = <1>;
					atmel,clk-input-range = <1000000 5000000>;
					#atmel,pll-clk-output-range-cells = <4>;
					atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
				};

				mck: masterck {
					compatible = "atmel,at91rm9200-clk-master";
					#clock-cells = <0>;
					interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
					clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
					atmel,clk-output-range = <0 105000000>;
					atmel,clk-divisors = <1 2 4 0>;
				};

				usb: usbck {
					compatible = "atmel,at91rm9200-clk-usb";
					#clock-cells = <0>;
					atmel,clk-divisors = <1 2 4 0>;
					clocks = <&pllb>;
				};

				prog: progck {
					compatible = "atmel,at91rm9200-clk-programmable";
					#address-cells = <1>;
					#size-cells = <0>;
					interrupt-parent = <&pmc>;
					clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;

					prog0: prog0 {
						#clock-cells = <0>;
						reg = <0>;
						interrupts = <AT91_PMC_PCKRDY(0)>;
					};

					prog1: prog1 {
						#clock-cells = <0>;
						reg = <1>;
						interrupts = <AT91_PMC_PCKRDY(1)>;
					};
				};

				systemck {
					compatible = "atmel,at91rm9200-clk-system";
					#address-cells = <1>;
					#size-cells = <0>;

					uhpck: uhpck {
						#clock-cells = <0>;
						reg = <6>;
						clocks = <&usb>;
					};

					udpck: udpck {
						#clock-cells = <0>;
						reg = <7>;
						clocks = <&usb>;
					};

					pck0: pck0 {
						#clock-cells = <0>;
						reg = <8>;
						clocks = <&prog0>;
					};

					pck1: pck1 {
						#clock-cells = <0>;
						reg = <9>;
						clocks = <&prog1>;
					};
				};

				periphck {
					compatible = "atmel,at91rm9200-clk-peripheral";
					#address-cells = <1>;
					#size-cells = <0>;
					clocks = <&mck>;

					pioA_clk: pioA_clk {
						#clock-cells = <0>;
						reg = <2>;
					};

					pioB_clk: pioB_clk {
						#clock-cells = <0>;
						reg = <3>;
					};

					pioC_clk: pioC_clk {
						#clock-cells = <0>;
						reg = <4>;
					};

					adc_clk: adc_clk {
						#clock-cells = <0>;
						reg = <5>;
					};

					usart0_clk: usart0_clk {
						#clock-cells = <0>;
						reg = <6>;
					};

					usart1_clk: usart1_clk {
						#clock-cells = <0>;
						reg = <7>;
					};

					usart2_clk: usart2_clk {
						#clock-cells = <0>;
						reg = <8>;
					};

					mci0_clk: mci0_clk {
						#clock-cells = <0>;
						reg = <9>;
					};

					udc_clk: udc_clk {
						#clock-cells = <0>;
						reg = <10>;
					};

					twi0_clk: twi0_clk {
						reg = <11>;
						#clock-cells = <0>;
					};

					spi0_clk: spi0_clk {
						#clock-cells = <0>;
						reg = <12>;
					};

					spi1_clk: spi1_clk {
						#clock-cells = <0>;
						reg = <13>;
					};

					ssc0_clk: ssc0_clk {
						#clock-cells = <0>;
						reg = <14>;
					};

					tc0_clk: tc0_clk {
						#clock-cells = <0>;
						reg = <17>;
					};

					tc1_clk: tc1_clk {
						#clock-cells = <0>;
						reg = <18>;
					};

					tc2_clk: tc2_clk {
						#clock-cells = <0>;
						reg = <19>;
					};

					ohci_clk: ohci_clk {
						#clock-cells = <0>;
						reg = <20>;
					};

					macb0_clk: macb0_clk {
						#clock-cells = <0>;
						reg = <21>;
					};

					isi_clk: isi_clk {
						#clock-cells = <0>;
						reg = <22>;
					};

					usart3_clk: usart3_clk {
						#clock-cells = <0>;
						reg = <23>;
					};

					uart0_clk: uart0_clk {
						#clock-cells = <0>;
						reg = <24>;
					};

					uart1_clk: uart1_clk {
						#clock-cells = <0>;
						reg = <25>;
					};

					tc3_clk: tc3_clk {
						#clock-cells = <0>;
						reg = <26>;
					};

					tc4_clk: tc4_clk {
						#clock-cells = <0>;
						reg = <27>;
					};

					tc5_clk: tc5_clk {
						#clock-cells = <0>;
						reg = <28>;
					};
				};
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			};

			rstc@fffffd00 {
				compatible = "atmel,at91sam9260-rstc";
				reg = <0xfffffd00 0x10>;
			};

			shdwc@fffffd10 {
				compatible = "atmel,at91sam9260-shdwc";
				reg = <0xfffffd10 0x10>;
			};

			pit: timer@fffffd30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffd30 0xf>;
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				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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				clocks = <&mck>;
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			};

			tcb0: timer@fffa0000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfffa0000 0x100>;
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				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
					      18 IRQ_TYPE_LEVEL_HIGH 0
					      19 IRQ_TYPE_LEVEL_HIGH 0>;
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				clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
				clock-names = "t0_clk", "t1_clk", "t2_clk";
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			};

			tcb1: timer@fffdc000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfffdc000 0x100>;
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				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
					      27 IRQ_TYPE_LEVEL_HIGH 0
					      28 IRQ_TYPE_LEVEL_HIGH 0>;
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				clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>;
				clock-names = "t0_clk", "t1_clk", "t2_clk";
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			};

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			pinctrl@fffff400 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff400 0xfffff400 0x600>;

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				atmel,mux-mask = <
				      /*    A         B     */
				       0xffffffff 0xffc00c3b  /* pioA */
				       0xffffffff 0x7fff3ccf  /* pioB */
				       0xffffffff 0x007fffff  /* pioC */
				      >;

				/* shared pinctrl settings */
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				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
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							<AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB14 periph A */
							 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PB15 periph with pullup */
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					};
				};

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				usart0 {
					pinctrl_usart0: usart0-0 {
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						atmel,pins =
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							<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB4 periph A */
							 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB5 periph A */
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					};

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					pinctrl_usart0_rts: usart0_rts-0 {
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						atmel,pins =
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							<AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB26 periph A */
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					};

					pinctrl_usart0_cts: usart0_cts-0 {
						atmel,pins =
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							<AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB27 periph A */
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					};

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					pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
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						atmel,pins =
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							<AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB24 periph A */
							 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB22 periph A */
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					};

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					pinctrl_usart0_dcd: usart0_dcd-0 {
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						atmel,pins =
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							<AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB23 periph A */
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					};

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					pinctrl_usart0_ri: usart0_ri-0 {
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						atmel,pins =
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							<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB25 periph A */
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					};
				};

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				usart1 {
					pinctrl_usart1: usart1-0 {
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						atmel,pins =
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							<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PB6 periph A with pullup */
							 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB7 periph A */
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					};

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					pinctrl_usart1_rts: usart1_rts-0 {
						atmel,pins =
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							<AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB28 periph A */
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					};

					pinctrl_usart1_cts: usart1_cts-0 {
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						atmel,pins =
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							<AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB29 periph A */
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					};
				};

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				usart2 {
					pinctrl_usart2: usart2-0 {
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						atmel,pins =
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							<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PB8 periph A with pullup */
							 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB9 periph A */
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					};

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					pinctrl_usart2_rts: usart2_rts-0 {
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						atmel,pins =
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							<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA4 periph A */
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					};

					pinctrl_usart2_cts: usart2_cts-0 {
						atmel,pins =
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							<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA5 periph A */
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					};
				};

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				usart3 {
					pinctrl_usart3: usart3-0 {
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						atmel,pins =
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							<AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PB10 periph A with pullup */
							 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB11 periph A */
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					};

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					pinctrl_usart3_rts: usart3_rts-0 {
						atmel,pins =
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							<AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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					};

					pinctrl_usart3_cts: usart3_cts-0 {
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						atmel,pins =
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							<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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					};
				};

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				uart0 {
					pinctrl_uart0: uart0-0 {
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						atmel,pins =
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							<AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA31 periph B with pullup */
							 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA30 periph B */
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					};
				};

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				uart1 {
					pinctrl_uart1: uart1-0 {
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						atmel,pins =
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							<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PB12 periph A with pullup */
							 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB13 periph A */
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					};
				};
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				nand {
					pinctrl_nand: nand-0 {
						atmel,pins =
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							<AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP	/* PC13 gpio RDY pin pull_up */
							 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;	/* PC14 gpio enable pin pull_up */
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					};
				};

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				macb {
					pinctrl_macb_rmii: macb_rmii-0 {
						atmel,pins =
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							<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA12 periph A */
							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA13 periph A */
							 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA14 periph A */
							 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA15 periph A */
							 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA16 periph A */
							 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA17 periph A */
							 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA18 periph A */
							 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA19 periph A */
							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA20 periph A */
							 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA21 periph A */
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					};

					pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
						atmel,pins =
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							<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA22 periph B */
							 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA23 periph B */
							 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA24 periph B */
							 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA25 periph B */
							 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA26 periph B */
							 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA27 periph B */
							 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA28 periph B */
							 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA29 periph B */
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					};

					pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
						atmel,pins =
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							<AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA10 periph B */
							 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA11 periph B */
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							 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA22 periph B */
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							 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA25 periph B */
							 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA26 periph B */
							 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA27 periph B */
							 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA28 periph B */
							 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA29 periph B */
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					};
				};

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				mmc0 {
					pinctrl_mmc0_clk: mmc0_clk-0 {
						atmel,pins =
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							<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA8 periph A */
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					};

					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
						atmel,pins =
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							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA7 periph A with pullup */
							 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA6 periph A with pullup */
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					};

					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
						atmel,pins =
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							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA9 periph A with pullup */
							 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA10 periph A with pullup */
							 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA11 periph A with pullup */
587 588 589 590
					};

					pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
						atmel,pins =
591 592
							<AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA1 periph B with pullup */
							 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;	/* PA0 periph B with pullup */
593 594 595 596
					};

					pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
						atmel,pins =
597 598 599
							<AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA5 periph B with pullup */
							 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA4 periph B with pullup */
							 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;	/* PA3 periph B with pullup */
600 601 602
					};
				};

603 604 605
				ssc0 {
					pinctrl_ssc0_tx: ssc0_tx-0 {
						atmel,pins =
606 607 608
							<AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB16 periph A */
							 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB17 periph A */
							 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB18 periph A */
609 610 611 612
					};

					pinctrl_ssc0_rx: ssc0_rx-0 {
						atmel,pins =
613 614 615
							<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB19 periph A */
							 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB20 periph A */
							 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB21 periph A */
616 617 618
					};
				};

619 620 621
				spi0 {
					pinctrl_spi0: spi0-0 {
						atmel,pins =
622 623 624
							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA0 periph A SPI0_MISO pin */
							 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA1 periph A SPI0_MOSI pin */
							 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA2 periph A SPI0_SPCK pin */
625 626 627 628 629 630
					};
				};

				spi1 {
					pinctrl_spi1: spi1-0 {
						atmel,pins =
631 632 633
							<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB0 periph A SPI1_MISO pin */
							 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB1 periph A SPI1_MOSI pin */
							 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB2 periph A SPI1_SPCK pin */
634 635 636
					};
				};

637 638 639 640 641 642 643 644
				i2c_gpio0 {
					pinctrl_i2c_gpio0: i2c_gpio0-0 {
						atmel,pins =
							<AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
							 AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
					};
				};

645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717
				tcb0 {
					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
						atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
						atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
						atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
						atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
						atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
						atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
						atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
						atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
						atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				tcb1 {
					pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
						atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
						atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
						atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
						atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
						atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
						atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
						atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
						atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
						atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
718 719 720
					};
				};

721 722 723
				pioA: gpio@fffff400 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
724
					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
725 726 727 728
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
729
					clocks = <&pioA_clk>;
730 731 732 733 734
				};

				pioB: gpio@fffff600 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
735
					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
736 737 738 739
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
740
					clocks = <&pioB_clk>;
741 742 743 744 745
				};

				pioC: gpio@fffff800 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
746
					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
747 748 749 750
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
751
					clocks = <&pioC_clk>;
752
				};
753 754 755
			};

			dbgu: serial@fffff200 {
756
				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
757
				reg = <0xfffff200 0x200>;
758
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
759 760
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
761 762
				clocks = <&mck>;
				clock-names = "usart";
763 764 765 766 767 768
				status = "disabled";
			};

			usart0: serial@fffb0000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffb0000 0x200>;
769
				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
770 771
				atmel,use-dma-rx;
				atmel,use-dma-tx;
772
				pinctrl-names = "default";
773
				pinctrl-0 = <&pinctrl_usart0>;
774 775
				clocks = <&usart0_clk>;
				clock-names = "usart";
776 777 778 779 780 781
				status = "disabled";
			};

			usart1: serial@fffb4000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffb4000 0x200>;
782
				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
783 784
				atmel,use-dma-rx;
				atmel,use-dma-tx;
785
				pinctrl-names = "default";
786
				pinctrl-0 = <&pinctrl_usart1>;
787 788
				clocks = <&usart1_clk>;
				clock-names = "usart";
789 790 791 792 793 794
				status = "disabled";
			};

			usart2: serial@fffb8000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffb8000 0x200>;
795
				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
796 797
				atmel,use-dma-rx;
				atmel,use-dma-tx;
798
				pinctrl-names = "default";
799
				pinctrl-0 = <&pinctrl_usart2>;
800 801
				clocks = <&usart2_clk>;
				clock-names = "usart";
802 803 804 805 806 807
				status = "disabled";
			};

			usart3: serial@fffd0000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffd0000 0x200>;
808
				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
809 810
				atmel,use-dma-rx;
				atmel,use-dma-tx;
811
				pinctrl-names = "default";
812
				pinctrl-0 = <&pinctrl_usart3>;
813 814
				clocks = <&usart3_clk>;
				clock-names = "usart";
815 816 817
				status = "disabled";
			};

818
			uart0: serial@fffd4000 {
819 820
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffd4000 0x200>;
821
				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
822 823
				atmel,use-dma-rx;
				atmel,use-dma-tx;
824
				pinctrl-names = "default";
825
				pinctrl-0 = <&pinctrl_uart0>;
826 827
				clocks = <&uart0_clk>;
				clock-names = "usart";
828 829 830
				status = "disabled";
			};

831
			uart1: serial@fffd8000 {
832 833
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffd8000 0x200>;
834
				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
835 836
				atmel,use-dma-rx;
				atmel,use-dma-tx;
837
				pinctrl-names = "default";
838
				pinctrl-0 = <&pinctrl_uart1>;
839 840
				clocks = <&uart1_clk>;
				clock-names = "usart";
841 842 843 844
				status = "disabled";
			};

			macb0: ethernet@fffc4000 {
845
				compatible = "cdns,at91sam9260-macb", "cdns,macb";
846
				reg = <0xfffc4000 0x100>;
847
				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
848 849
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_macb_rmii>;
850 851
				clocks = <&macb0_clk>, <&macb0_clk>;
				clock-names = "hclk", "pclk";
852 853 854 855
				status = "disabled";
			};

			usb1: gadget@fffa4000 {
856
				compatible = "atmel,at91sam9260-udc";
857
				reg = <0xfffa4000 0x4000>;
858
				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
859 860
				clocks = <&udc_clk>, <&udpck>;
				clock-names = "pclk", "hclk";
861 862
				status = "disabled";
			};
863

864 865 866
			i2c0: i2c@fffac000 {
				compatible = "atmel,at91sam9260-i2c";
				reg = <0xfffac000 0x100>;
867
				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
868 869
				#address-cells = <1>;
				#size-cells = <0>;
870
				clocks = <&twi0_clk>;
871 872 873
				status = "disabled";
			};

874 875 876
			mmc0: mmc@fffa8000 {
				compatible = "atmel,hsmci";
				reg = <0xfffa8000 0x600>;
877
				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
878 879
				#address-cells = <1>;
				#size-cells = <0>;
880
				pinctrl-names = "default";
881 882
				clocks = <&mci0_clk>;
				clock-names = "mci_clk";
883 884 885
				status = "disabled";
			};

886 887 888
			ssc0: ssc@fffbc000 {
				compatible = "atmel,at91rm9200-ssc";
				reg = <0xfffbc000 0x4000>;
889
				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
890 891
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
892 893
				clocks = <&ssc0_clk>;
				clock-names = "pclk";
894
				status = "disabled";
895 896
			};

897 898 899 900 901
			spi0: spi@fffc8000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xfffc8000 0x200>;
902
				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
903 904
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi0>;
905 906
				clocks = <&spi0_clk>;
				clock-names = "spi_clk";
907 908 909 910 911 912 913 914
				status = "disabled";
			};

			spi1: spi@fffcc000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xfffcc000 0x200>;
915
				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
916 917
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi1>;
918 919
				clocks = <&spi1_clk>;
				clock-names = "spi_clk";
920 921 922
				status = "disabled";
			};

923
			adc0: adc@fffe0000 {
924 925
				#address-cells = <1>;
				#size-cells = <0>;
926 927
				compatible = "atmel,at91sam9260-adc";
				reg = <0xfffe0000 0x100>;
928
				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
929 930
				clocks = <&adc_clk>, <&adc_op_clk>;
				clock-names = "adc_clk", "adc_op_clk";
931 932 933 934
				atmel,adc-use-external-triggers;
				atmel,adc-channels-used = <0xf>;
				atmel,adc-vref = <3300>;
				atmel,adc-startup-time = <15>;
935 936 937
				atmel,adc-res = <8 10>;
				atmel,adc-res-names = "lowres", "highres";
				atmel,adc-use-res = "highres";
938 939

				trigger@0 {
940
					reg = <0>;
941 942 943 944
					trigger-name = "timer-counter-0";
					trigger-value = <0x1>;
				};
				trigger@1 {
945
					reg = <1>;
946 947 948 949 950
					trigger-name = "timer-counter-1";
					trigger-value = <0x3>;
				};

				trigger@2 {
951
					reg = <2>;
952 953 954 955 956
					trigger-name = "timer-counter-2";
					trigger-value = <0x5>;
				};

				trigger@3 {
957
					reg = <3>;
958
					trigger-name = "external";
959
					trigger-value = <0xd>;
960 961 962
					trigger-external;
				};
			};
963

964 965 966 967 968 969 970 971
			rtc@fffffd20 {
				compatible = "atmel,at91sam9260-rtt";
				reg = <0xfffffd20 0x10>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&clk32k>;
				status = "disabled";
			};

972 973 974
			watchdog@fffffd40 {
				compatible = "atmel,at91sam9260-wdt";
				reg = <0xfffffd40 0x10>;
975 976 977 978
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				atmel,watchdog-type = "hardware";
				atmel,reset-type = "all";
				atmel,dbg-halt;
979 980
				status = "disabled";
			};
B
Boris Brezillon 已提交
981 982 983 984 985 986

			gpbr: syscon@fffffd50 {
				compatible = "atmel,at91sam9260-gpbr", "syscon";
				reg = <0xfffffd50 0x10>;
				status = "disabled";
			};
987 988 989 990 991 992 993 994 995 996 997
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
			       0xffffe800 0x200
			      >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
998 999
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;
1000 1001
			gpios = <&pioC 13 GPIO_ACTIVE_HIGH
				 &pioC 14 GPIO_ACTIVE_HIGH
1002 1003 1004 1005 1006 1007 1008 1009
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00500000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00500000 0x100000>;
1010
			interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
1011 1012
			clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
			clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1013 1014 1015 1016 1017 1018
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
1019 1020
		gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
			 &pioA 24 GPIO_ACTIVE_HIGH /* scl */
1021 1022 1023 1024 1025 1026
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
1027 1028
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_gpio0>;
1029 1030 1031
		status = "disabled";
	};
};