pc.c 32.9 KB
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/*
 * QEMU PC System Emulator
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 *
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 * Copyright (c) 2003-2004 Fabrice Bellard
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
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#include "hw.h"
#include "pc.h"
#include "fdc.h"
#include "pci.h"
#include "block.h"
#include "sysemu.h"
#include "audio/audio.h"
#include "net.h"
#include "smbus.h"
#include "boards.h"
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#include "monitor.h"
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#include "fw_cfg.h"
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#include "virtio-blk.h"
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#include "virtio-balloon.h"
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#include "virtio-console.h"
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#include "hpet_emul.h"
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#include "watchdog.h"
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#include "smbios.h"
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/* output Bochs bios info messages */
//#define DEBUG_BIOS

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#define BIOS_FILENAME "bios.bin"
#define VGABIOS_FILENAME "vgabios.bin"
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#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
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#define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)

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/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
#define ACPI_DATA_SIZE       0x10000
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#define BIOS_CFG_IOPORT 0x510
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#define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
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#define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
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#define MAX_IDE_BUS 2

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static fdctrl_t *floppy_controller;
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static RTCState *rtc_state;
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static PITState *pit;
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static IOAPICState *ioapic;
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static PCIDevice *i440fx_state;
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static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
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{
}

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/* MSDOS compatibility mode FPU exception support */
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static qemu_irq ferr_irq;
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/* XXX: add IGNNE support */
void cpu_set_ferr(CPUX86State *s)
{
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    qemu_irq_raise(ferr_irq);
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}

static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
{
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    qemu_irq_lower(ferr_irq);
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}

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/* TSC handling */
uint64_t cpu_get_tsc(CPUX86State *env)
{
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    /* Note: when using kqemu, it is more logical to return the host TSC
       because kqemu does not trap the RDTSC instruction for
       performance reasons */
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#ifdef CONFIG_KQEMU
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    if (env->kqemu_enabled) {
        return cpu_get_real_ticks();
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    } else
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#endif
    {
        return cpu_get_ticks();
    }
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}

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/* SMM support */
void cpu_smm_update(CPUState *env)
{
    if (i440fx_state && env == first_cpu)
        i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
}


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/* IRQ handling */
int cpu_get_pic_interrupt(CPUState *env)
{
    int intno;

    intno = apic_get_interrupt(env);
    if (intno >= 0) {
        /* set irq request if a PIC irq is still pending */
        /* XXX: improve that */
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        pic_update_irq(isa_pic);
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        return intno;
    }
    /* read the irq from the PIC */
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    if (!apic_accept_pic_intr(env))
        return -1;

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    intno = pic_read_irq(isa_pic);
    return intno;
}

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static void pic_irq_request(void *opaque, int irq, int level)
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{
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    CPUState *env = first_cpu;

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    if (env->apic_state) {
        while (env) {
            if (apic_accept_pic_intr(env))
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                apic_deliver_pic_intr(env, level);
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            env = env->next_cpu;
        }
    } else {
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        if (level)
            cpu_interrupt(env, CPU_INTERRUPT_HARD);
        else
            cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
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    }
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}

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/* PC cmos mappings */

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#define REG_EQUIPMENT_BYTE          0x14

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static int cmos_get_fd_drive_type(int fd0)
{
    int val;

    switch (fd0) {
    case 0:
        /* 1.44 Mb 3"5 drive */
        val = 4;
        break;
    case 1:
        /* 2.88 Mb 3"5 drive */
        val = 5;
        break;
    case 2:
        /* 1.2 Mb 5"5 drive */
        val = 2;
        break;
    default:
        val = 0;
        break;
    }
    return val;
}

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static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
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{
    RTCState *s = rtc_state;
    int cylinders, heads, sectors;
    bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
    rtc_set_memory(s, type_ofs, 47);
    rtc_set_memory(s, info_ofs, cylinders);
    rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
    rtc_set_memory(s, info_ofs + 2, heads);
    rtc_set_memory(s, info_ofs + 3, 0xff);
    rtc_set_memory(s, info_ofs + 4, 0xff);
    rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
    rtc_set_memory(s, info_ofs + 6, cylinders);
    rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
    rtc_set_memory(s, info_ofs + 8, sectors);
}

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/* convert boot_device letter to something recognizable by the bios */
static int boot_device2nibble(char boot_device)
{
    switch(boot_device) {
    case 'a':
    case 'b':
        return 0x01; /* floppy boot */
    case 'c':
        return 0x02; /* hard drive boot */
    case 'd':
        return 0x03; /* CD-ROM boot */
    case 'n':
        return 0x04; /* Network boot */
    }
    return 0;
}

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/* copy/pasted from cmos_init, should be made a general function
 and used there as well */
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static int pc_boot_set(void *opaque, const char *boot_device)
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{
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    Monitor *mon = cur_mon;
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#define PC_MAX_BOOT_DEVICES 3
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    RTCState *s = (RTCState *)opaque;
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    int nbds, bds[3] = { 0, };
    int i;

    nbds = strlen(boot_device);
    if (nbds > PC_MAX_BOOT_DEVICES) {
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        monitor_printf(mon, "Too many boot devices for PC\n");
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        return(1);
    }
    for (i = 0; i < nbds; i++) {
        bds[i] = boot_device2nibble(boot_device[i]);
        if (bds[i] == 0) {
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            monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
                           boot_device[i]);
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            return(1);
        }
    }
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
    rtc_set_memory(s, 0x38, (bds[2] << 4));
    return(0);
}

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/* hd_table must contain 4 block drivers */
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static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
                      const char *boot_device, BlockDriverState **hd_table)
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{
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    RTCState *s = rtc_state;
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    int nbds, bds[3] = { 0, };
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    int val;
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    int fd0, fd1, nb;
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    int i;
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    /* various important CMOS locations needed by PC/Bochs bios */
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    /* memory size */
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    val = 640; /* base memory in K */
    rtc_set_memory(s, 0x15, val);
    rtc_set_memory(s, 0x16, val >> 8);

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    val = (ram_size / 1024) - 1024;
    if (val > 65535)
        val = 65535;
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    rtc_set_memory(s, 0x17, val);
    rtc_set_memory(s, 0x18, val >> 8);
    rtc_set_memory(s, 0x30, val);
    rtc_set_memory(s, 0x31, val >> 8);
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    if (above_4g_mem_size) {
        rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
        rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
        rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
    }

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    if (ram_size > (16 * 1024 * 1024))
        val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
    else
        val = 0;
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    if (val > 65535)
        val = 65535;
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    rtc_set_memory(s, 0x34, val);
    rtc_set_memory(s, 0x35, val >> 8);
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    /* set the number of CPU */
    rtc_set_memory(s, 0x5f, smp_cpus - 1);

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    /* set boot devices, and disable floppy signature check if requested */
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#define PC_MAX_BOOT_DEVICES 3
    nbds = strlen(boot_device);
    if (nbds > PC_MAX_BOOT_DEVICES) {
        fprintf(stderr, "Too many boot devices for PC\n");
        exit(1);
    }
    for (i = 0; i < nbds; i++) {
        bds[i] = boot_device2nibble(boot_device[i]);
        if (bds[i] == 0) {
            fprintf(stderr, "Invalid boot device for PC: '%c'\n",
                    boot_device[i]);
            exit(1);
        }
    }
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
    rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
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    /* floppy type */

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    fd0 = fdctrl_get_drive_type(floppy_controller, 0);
    fd1 = fdctrl_get_drive_type(floppy_controller, 1);
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    val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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    rtc_set_memory(s, 0x10, val);
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    val = 0;
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    nb = 0;
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    if (fd0 < 3)
        nb++;
    if (fd1 < 3)
        nb++;
    switch (nb) {
    case 0:
        break;
    case 1:
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        val |= 0x01; /* 1 drive, ready for boot */
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        break;
    case 2:
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        val |= 0x41; /* 2 drives, ready for boot */
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        break;
    }
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    val |= 0x02; /* FPU is there */
    val |= 0x04; /* PS/2 mouse installed */
    rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);

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    /* hard drives */

    rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
    if (hd_table[0])
        cmos_init_hd(0x19, 0x1b, hd_table[0]);
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    if (hd_table[1])
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        cmos_init_hd(0x1a, 0x24, hd_table[1]);

    val = 0;
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    for (i = 0; i < 4; i++) {
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        if (hd_table[i]) {
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            int cylinders, heads, sectors, translation;
            /* NOTE: bdrv_get_geometry_hint() returns the physical
                geometry.  It is always such that: 1 <= sects <= 63, 1
                <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
                geometry can be different if a translation is done. */
            translation = bdrv_get_translation_hint(hd_table[i]);
            if (translation == BIOS_ATA_TRANSLATION_AUTO) {
                bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
                if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
                    /* No translation. */
                    translation = 0;
                } else {
                    /* LBA translation. */
                    translation = 1;
                }
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            } else {
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                translation--;
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            }
            val |= translation << (i * 2);
        }
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    }
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    rtc_set_memory(s, 0x39, val);
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}

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void ioport_set_a20(int enable)
{
    /* XXX: send to all CPUs ? */
    cpu_x86_set_a20(first_cpu, enable);
}

int ioport_get_a20(void)
{
    return ((first_cpu->a20_mask >> 20) & 1);
}

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static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
{
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    ioport_set_a20((val >> 1) & 1);
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    /* XXX: bit 0 is fast reset */
}

static uint32_t ioport92_read(void *opaque, uint32_t addr)
{
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    return ioport_get_a20() << 1;
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}

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/***********************************************************/
/* Bochs BIOS debug ports */

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static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
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{
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    static const char shutdown_str[8] = "Shutdown";
    static int shutdown_index = 0;
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    switch(addr) {
        /* Bochs BIOS messages */
    case 0x400:
    case 0x401:
        fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
        exit(1);
    case 0x402:
    case 0x403:
#ifdef DEBUG_BIOS
        fprintf(stderr, "%c", val);
#endif
        break;
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    case 0x8900:
        /* same as Bochs power off */
        if (val == shutdown_str[shutdown_index]) {
            shutdown_index++;
            if (shutdown_index == 8) {
                shutdown_index = 0;
                qemu_system_shutdown_request();
            }
        } else {
            shutdown_index = 0;
        }
        break;
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        /* LGPL'ed VGA BIOS messages */
    case 0x501:
    case 0x502:
        fprintf(stderr, "VGA BIOS panic, line %d\n", val);
        exit(1);
    case 0x500:
    case 0x503:
#ifdef DEBUG_BIOS
        fprintf(stderr, "%c", val);
#endif
        break;
    }
}

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extern uint64_t node_cpumask[MAX_NODES];

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static void bochs_bios_init(void)
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{
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    void *fw_cfg;
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    uint8_t *smbios_table;
    size_t smbios_len;
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    uint64_t *numa_fw_cfg;
    int i, j;
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    register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
    register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
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    register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
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    register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
    register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
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    fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
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    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
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    fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
                     acpi_tables_len);
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    smbios_table = smbios_get_table(&smbios_len);
    if (smbios_table)
        fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
                         smbios_table, smbios_len);
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    /* allocate memory for the NUMA channel: one (64bit) word for the number
     * of nodes, one word for each VCPU->node and one word for each node to
     * hold the amount of memory.
     */
    numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
    numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
    for (i = 0; i < smp_cpus; i++) {
        for (j = 0; j < nb_numa_nodes; j++) {
            if (node_cpumask[j] & (1 << i)) {
                numa_fw_cfg[i + 1] = cpu_to_le64(j);
                break;
            }
        }
    }
    for (i = 0; i < nb_numa_nodes; i++) {
        numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
    }
    fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
                     (1 + smp_cpus + nb_numa_nodes) * 8);
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}

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/* Generate an initial boot sector which sets state and jump to
   a specified vector */
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static void generate_bootsect(target_phys_addr_t option_rom,
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                              uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
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{
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    uint8_t rom[512], *p, *reloc;
    uint8_t sum;
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    int i;

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    memset(rom, 0, sizeof(rom));

    p = rom;
    /* Make sure we have an option rom signature */
    *p++ = 0x55;
    *p++ = 0xaa;
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    /* ROM size in sectors*/
    *p++ = 1;
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    /* Hook int19 */
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    *p++ = 0x50;		/* push ax */
    *p++ = 0x1e;		/* push ds */
    *p++ = 0x31; *p++ = 0xc0;	/* xor ax, ax */
    *p++ = 0x8e; *p++ = 0xd8;	/* mov ax, ds */
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    *p++ = 0xc7; *p++ = 0x06;   /* movvw _start,0x64 */
    *p++ = 0x64; *p++ = 0x00;
    reloc = p;
    *p++ = 0x00; *p++ = 0x00;

    *p++ = 0x8c; *p++ = 0x0e;   /* mov cs,0x66 */
    *p++ = 0x66; *p++ = 0x00;

    *p++ = 0x1f;		/* pop ds */
    *p++ = 0x58;		/* pop ax */
    *p++ = 0xcb;		/* lret */
    
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    /* Actual code */
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    *reloc = (p - rom);

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    *p++ = 0xfa;		/* CLI */
    *p++ = 0xfc;		/* CLD */

    for (i = 0; i < 6; i++) {
	if (i == 1)		/* Skip CS */
	    continue;

	*p++ = 0xb8;		/* MOV AX,imm16 */
	*p++ = segs[i];
	*p++ = segs[i] >> 8;
	*p++ = 0x8e;		/* MOV <seg>,AX */
	*p++ = 0xc0 + (i << 3);
    }

    for (i = 0; i < 8; i++) {
	*p++ = 0x66;		/* 32-bit operand size */
	*p++ = 0xb8 + i;	/* MOV <reg>,imm32 */
	*p++ = gpr[i];
	*p++ = gpr[i] >> 8;
	*p++ = gpr[i] >> 16;
	*p++ = gpr[i] >> 24;
    }

    *p++ = 0xea;		/* JMP FAR */
    *p++ = ip;			/* IP */
    *p++ = ip >> 8;
    *p++ = segs[1];		/* CS */
    *p++ = segs[1] >> 8;

551 552 553 554 555 556
    /* sign rom */
    sum = 0;
    for (i = 0; i < (sizeof(rom) - 1); i++)
        sum += rom[i];
    rom[sizeof(rom) - 1] = -sum;

557
    cpu_physical_memory_write_rom(option_rom, rom, sizeof(rom));
T
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558
}
B
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559

T
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560 561 562 563 564 565 566 567 568 569 570 571 572 573
static long get_file_size(FILE *f)
{
    long where, size;

    /* XXX: on Unix systems, using fstat() probably makes more sense */

    where = ftell(f);
    fseek(f, 0, SEEK_END);
    size = ftell(f);
    fseek(f, where, SEEK_SET);

    return size;
}

574
static void load_linux(target_phys_addr_t option_rom,
575
                       const char *kernel_filename,
T
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576 577 578 579 580 581 582 583 584 585
		       const char *initrd_filename,
		       const char *kernel_cmdline)
{
    uint16_t protocol;
    uint32_t gpr[8];
    uint16_t seg[6];
    uint16_t real_seg;
    int setup_size, kernel_size, initrd_size, cmdline_size;
    uint32_t initrd_max;
    uint8_t header[1024];
586
    target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
T
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587 588 589 590 591 592 593 594 595 596 597 598 599 600 601
    FILE *f, *fi;

    /* Align to 16 bytes as a paranoia measure */
    cmdline_size = (strlen(kernel_cmdline)+16) & ~15;

    /* load the kernel header */
    f = fopen(kernel_filename, "rb");
    if (!f || !(kernel_size = get_file_size(f)) ||
	fread(header, 1, 1024, f) != 1024) {
	fprintf(stderr, "qemu: could not load kernel '%s'\n",
		kernel_filename);
	exit(1);
    }

    /* kernel protocol version */
B
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602
#if 0
T
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603
    fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
B
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604
#endif
T
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605 606 607 608 609 610 611
    if (ldl_p(header+0x202) == 0x53726448)
	protocol = lduw_p(header+0x206);
    else
	protocol = 0;

    if (protocol < 0x200 || !(header[0x211] & 0x01)) {
	/* Low kernel */
612 613 614
	real_addr    = 0x90000;
	cmdline_addr = 0x9a000 - cmdline_size;
	prot_addr    = 0x10000;
T
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615 616
    } else if (protocol < 0x202) {
	/* High but ancient kernel */
617 618 619
	real_addr    = 0x90000;
	cmdline_addr = 0x9a000 - cmdline_size;
	prot_addr    = 0x100000;
T
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620 621
    } else {
	/* High and recent kernel */
622 623 624
	real_addr    = 0x10000;
	cmdline_addr = 0x20000;
	prot_addr    = 0x100000;
T
ths 已提交
625 626
    }

B
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627
#if 0
T
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628
    fprintf(stderr,
629 630 631
	    "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
	    "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
	    "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
632 633 634
	    real_addr,
	    cmdline_addr,
	    prot_addr);
B
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635
#endif
T
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636 637 638 639 640 641 642 643 644 645 646

    /* highest address for loading the initrd */
    if (protocol >= 0x203)
	initrd_max = ldl_p(header+0x22c);
    else
	initrd_max = 0x37ffffff;

    if (initrd_max >= ram_size-ACPI_DATA_SIZE)
	initrd_max = ram_size-ACPI_DATA_SIZE-1;

    /* kernel command line */
647
    pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
T
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648 649

    if (protocol >= 0x202) {
650
	stl_p(header+0x228, cmdline_addr);
T
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651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683
    } else {
	stw_p(header+0x20, 0xA33F);
	stw_p(header+0x22, cmdline_addr-real_addr);
    }

    /* loader type */
    /* High nybble = B reserved for Qemu; low nybble is revision number.
       If this code is substantially changed, you may want to consider
       incrementing the revision. */
    if (protocol >= 0x200)
	header[0x210] = 0xB0;

    /* heap */
    if (protocol >= 0x201) {
	header[0x211] |= 0x80;	/* CAN_USE_HEAP */
	stw_p(header+0x224, cmdline_addr-real_addr-0x200);
    }

    /* load initrd */
    if (initrd_filename) {
	if (protocol < 0x200) {
	    fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
	    exit(1);
	}

	fi = fopen(initrd_filename, "rb");
	if (!fi) {
	    fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
		    initrd_filename);
	    exit(1);
	}

	initrd_size = get_file_size(fi);
684
	initrd_addr = (initrd_max-initrd_size) & ~4095;
T
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685

686 687
        fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
                "\n", initrd_size, initrd_addr);
T
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688

689
	if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
T
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690 691 692 693 694 695
	    fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
		    initrd_filename);
	    exit(1);
	}
	fclose(fi);

696
	stl_p(header+0x218, initrd_addr);
T
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697 698 699 700
	stl_p(header+0x21c, initrd_size);
    }

    /* store the finalized header and load the rest of the kernel */
701
    cpu_physical_memory_write(real_addr, header, 1024);
T
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702 703 704 705 706 707 708 709

    setup_size = header[0x1f1];
    if (setup_size == 0)
	setup_size = 4;

    setup_size = (setup_size+1)*512;
    kernel_size -= setup_size;	/* Size of protected-mode code */

710 711
    if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
	!fread_targphys_ok(prot_addr, kernel_size, f)) {
T
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712 713 714 715 716 717 718
	fprintf(stderr, "qemu: read error on kernel '%s'\n",
		kernel_filename);
	exit(1);
    }
    fclose(f);

    /* generate bootsector to set up the initial register state */
719
    real_seg = real_addr >> 4;
T
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720 721 722 723 724
    seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
    seg[1] = real_seg+0x20;	/* CS */
    memset(gpr, 0, sizeof gpr);
    gpr[4] = cmdline_addr-real_addr-16;	/* SP (-16 is paranoia) */

725
    generate_bootsect(option_rom, gpr, seg, 0);
T
ths 已提交
726 727
}

728 729 730 731 732 733
static void main_cpu_reset(void *opaque)
{
    CPUState *env = opaque;
    cpu_reset(env);
}

B
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734 735 736 737 738 739
static const int ide_iobase[2] = { 0x1f0, 0x170 };
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
static const int ide_irq[2] = { 14, 15 };

#define NE2000_NB_MAX 6

740
static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
B
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741 742
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };

743 744 745
static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };

746 747 748
static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };

749
#ifdef HAS_AUDIO
P
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750
static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766
{
    struct soundhw *c;
    int audio_enabled = 0;

    for (c = soundhw; !audio_enabled && c->name; ++c) {
        audio_enabled = c->enabled;
    }

    if (audio_enabled) {
        AudioState *s;

        s = AUD_init ();
        if (s) {
            for (c = soundhw; c->name; ++c) {
                if (c->enabled) {
                    if (c->isa) {
P
pbrook 已提交
767
                        c->init.init_isa (s, pic);
768 769 770 771 772 773 774 775 776 777 778 779 780
                    }
                    else {
                        if (pci_bus) {
                            c->init.init_pci (pci_bus, s);
                        }
                    }
                }
            }
        }
    }
}
#endif

P
pbrook 已提交
781
static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
782 783 784 785 786
{
    static int nb_ne2k = 0;

    if (nb_ne2k == NE2000_NB_MAX)
        return;
P
pbrook 已提交
787
    isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
788 789 790
    nb_ne2k++;
}

791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811
static int load_option_rom(const char *oprom, target_phys_addr_t start,
                           target_phys_addr_t end)
{
        int size;

        size = get_image_size(oprom);
        if (size > 0 && start + size > end) {
            fprintf(stderr, "Not enough space to load option rom '%s'\n",
                    oprom);
            exit(1);
        }
        size = load_image_targphys(oprom, start, end - start);
        if (size < 0) {
            fprintf(stderr, "Could not load option rom '%s'\n", oprom);
            exit(1);
        }
        /* Round up optiom rom size to the next 2k boundary */
        size = (size + 2047) & ~2047;
        return size;
}

B
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812
/* PC hardware initialisation */
813
static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
814
                     const char *boot_device,
B
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815
                     const char *kernel_filename, const char *kernel_cmdline,
816
                     const char *initrd_filename,
817
                     int pci_enabled, const char *cpu_model)
B
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818 819
{
    char buf[1024];
T
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820
    int ret, linux_boot, i;
P
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821
    ram_addr_t ram_addr, bios_offset, option_rom_offset;
822
    ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
823
    int bios_size, isa_bios_size, oprom_area_size;
B
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824
    PCIBus *pci_bus;
P
pbrook 已提交
825
    int piix3_devfn = -1;
826
    CPUState *env;
P
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827 828
    qemu_irq *cpu_irq;
    qemu_irq *i8259;
T
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829 830 831
    int index;
    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
    BlockDriverState *fd[MAX_FD];
A
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832
    int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
833

834 835 836 837 838 839 840
    if (ram_size >= 0xe0000000 ) {
        above_4g_mem_size = ram_size - 0xe0000000;
        below_4g_mem_size = 0xe0000000;
    } else {
        below_4g_mem_size = ram_size;
    }

B
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841 842
    linux_boot = (kernel_filename != NULL);

843
    /* init CPUs */
844 845 846 847 848 849 850 851
    if (cpu_model == NULL) {
#ifdef TARGET_X86_64
        cpu_model = "qemu64";
#else
        cpu_model = "qemu32";
#endif
    }
    
852
    for(i = 0; i < smp_cpus; i++) {
B
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853 854 855 856 857
        env = cpu_init(cpu_model);
        if (!env) {
            fprintf(stderr, "Unable to find x86 CPU definition\n");
            exit(1);
        }
858
        if (i != 0)
B
bellard 已提交
859
            env->halted = 1;
860 861 862 863 864 865 866 867 868 869
        if (smp_cpus > 1) {
            /* XXX: enable it in all cases */
            env->cpuid_features |= CPUID_APIC;
        }
        qemu_register_reset(main_cpu_reset, env);
        if (pci_enabled) {
            apic_init(env);
        }
    }

A
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870 871
    vmport_init();

B
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872
    /* allocate RAM */
873 874 875 876 877 878 879 880 881 882 883 884
    ram_addr = qemu_ram_alloc(0xa0000);
    cpu_register_physical_memory(0, 0xa0000, ram_addr);

    /* Allocate, even though we won't register, so we don't break the
     * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
     * and some bios areas, which will be registered later
     */
    ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
    ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
    cpu_register_physical_memory(0x100000,
                 below_4g_mem_size - 0x100000,
                 ram_addr);
885 886 887

    /* above 4giga memory allocation */
    if (above_4g_mem_size > 0) {
888 889
        ram_addr = qemu_ram_alloc(above_4g_mem_size);
        cpu_register_physical_memory(0x100000000ULL,
890
                                     above_4g_mem_size,
891
                                     ram_addr);
892
    }
B
bellard 已提交
893

894

B
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895
    /* BIOS load */
896 897 898
    if (bios_name == NULL)
        bios_name = BIOS_FILENAME;
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
B
bellard 已提交
899
    bios_size = get_image_size(buf);
900
    if (bios_size <= 0 ||
B
bellard 已提交
901
        (bios_size % 65536) != 0) {
B
bellard 已提交
902 903
        goto bios_error;
    }
B
bellard 已提交
904
    bios_offset = qemu_ram_alloc(bios_size);
P
pbrook 已提交
905
    ret = load_image(buf, qemu_get_ram_ptr(bios_offset));
B
bellard 已提交
906 907
    if (ret != bios_size) {
    bios_error:
B
bellard 已提交
908
        fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
B
bellard 已提交
909 910
        exit(1);
    }
B
bellard 已提交
911 912 913 914
    /* map the last 128KB of the BIOS in ISA space */
    isa_bios_size = bios_size;
    if (isa_bios_size > (128 * 1024))
        isa_bios_size = 128 * 1024;
915 916
    cpu_register_physical_memory(0x100000 - isa_bios_size,
                                 isa_bios_size,
B
bellard 已提交
917
                                 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
918

919

920 921 922

    option_rom_offset = qemu_ram_alloc(0x20000);
    oprom_area_size = 0;
923
    cpu_register_physical_memory(0xc0000, 0x20000, option_rom_offset);
924 925 926 927 928 929 930 931

    if (using_vga) {
        /* VGA BIOS load */
        if (cirrus_vga_enabled) {
            snprintf(buf, sizeof(buf), "%s/%s", bios_dir,
                     VGABIOS_CIRRUS_FILENAME);
        } else {
            snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
B
bellard 已提交
932
        }
933 934 935 936 937 938 939 940 941
        oprom_area_size = load_option_rom(buf, 0xc0000, 0xe0000);
    }
    /* Although video roms can grow larger than 0x8000, the area between
     * 0xc0000 - 0xc8000 is reserved for them. It means we won't be looking
     * for any other kind of option rom inside this area */
    if (oprom_area_size < 0x8000)
        oprom_area_size = 0x8000;

    if (linux_boot) {
942
        load_linux(0xc0000 + oprom_area_size,
943 944 945 946 947 948 949
                   kernel_filename, initrd_filename, kernel_cmdline);
        oprom_area_size += 2048;
    }

    for (i = 0; i < nb_option_roms; i++) {
        oprom_area_size += load_option_rom(option_rom[i],
                                           0xc0000 + oprom_area_size, 0xe0000);
950 951
    }

B
bellard 已提交
952
    /* map all the bios at the top of memory */
953
    cpu_register_physical_memory((uint32_t)(-bios_size),
B
bellard 已提交
954
                                 bios_size, bios_offset | IO_MEM_ROM);
955

B
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956 957
    bochs_bios_init();

958
    cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
P
pbrook 已提交
959 960 961
    i8259 = i8259_init(cpu_irq[0]);
    ferr_irq = i8259[13];

B
bellard 已提交
962
    if (pci_enabled) {
P
pbrook 已提交
963
        pci_bus = i440fx_init(&i440fx_state, i8259);
964
        piix3_devfn = piix3_init(pci_bus, -1);
B
bellard 已提交
965 966
    } else {
        pci_bus = NULL;
B
bellard 已提交
967 968
    }

B
bellard 已提交
969
    /* init basic PC hardware */
B
bellard 已提交
970
    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
B
bellard 已提交
971

972 973
    register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);

B
bellard 已提交
974 975
    if (cirrus_vga_enabled) {
        if (pci_enabled) {
P
pbrook 已提交
976
            pci_cirrus_vga_init(pci_bus, vga_ram_size);
B
bellard 已提交
977
        } else {
P
pbrook 已提交
978
            isa_cirrus_vga_init(vga_ram_size);
B
bellard 已提交
979
        }
980 981
    } else if (vmsvga_enabled) {
        if (pci_enabled)
P
pbrook 已提交
982
            pci_vmsvga_init(pci_bus, vga_ram_size);
983 984
        else
            fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
985
    } else if (std_vga_enabled) {
B
bellard 已提交
986
        if (pci_enabled) {
P
pbrook 已提交
987
            pci_vga_init(pci_bus, vga_ram_size, 0, 0);
B
bellard 已提交
988
        } else {
P
pbrook 已提交
989
            isa_vga_init(vga_ram_size);
B
bellard 已提交
990
        }
B
bellard 已提交
991
    }
B
bellard 已提交
992

993
    rtc_state = rtc_init(0x70, i8259[8], 2000);
B
bellard 已提交
994

995 996
    qemu_register_boot_set(pc_boot_set, rtc_state);

B
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997 998 999
    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);

1000 1001 1002
    if (pci_enabled) {
        ioapic = ioapic_init();
    }
P
pbrook 已提交
1003
    pit = pit_init(0x40, i8259[0]);
B
bellard 已提交
1004
    pcspk_init(pit);
A
aliguori 已提交
1005 1006 1007
    if (!no_hpet) {
        hpet_init(i8259);
    }
1008 1009 1010
    if (pci_enabled) {
        pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
    }
B
bellard 已提交
1011

1012 1013
    for(i = 0; i < MAX_SERIAL_PORTS; i++) {
        if (serial_hds[i]) {
A
aurel32 已提交
1014 1015
            serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
                        serial_hds[i]);
1016 1017
        }
    }
B
bellard 已提交
1018

1019 1020
    for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
        if (parallel_hds[i]) {
P
pbrook 已提交
1021 1022
            parallel_init(parallel_io[i], i8259[parallel_irq[i]],
                          parallel_hds[i]);
1023 1024 1025
        }
    }

R
Richard W.M. Jones 已提交
1026 1027
    watchdog_pc_init(pci_bus);

1028
    for(i = 0; i < nb_nics; i++) {
1029 1030 1031
        NICInfo *nd = &nd_table[i];

        if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
P
pbrook 已提交
1032
            pc_init_ne2k_isa(nd, i8259);
1033 1034
        else
            pci_nic_init(pci_bus, nd, -1, "ne2k_pci");
1035
    }
B
bellard 已提交
1036

1037 1038
    qemu_system_hot_add_init();

T
ths 已提交
1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051
    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
        fprintf(stderr, "qemu: too many IDE bus\n");
        exit(1);
    }

    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
        index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
	if (index != -1)
	    hd[i] = drives_table[index].bdrv;
	else
	    hd[i] = NULL;
    }

1052
    if (pci_enabled) {
T
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1053
        pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1054
    } else {
T
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1055
        for(i = 0; i < MAX_IDE_BUS; i++) {
P
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1056
            isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
T
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1057
	                 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
B
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1058
        }
B
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1059
    }
B
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1060

P
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1061
    i8042_init(i8259[1], i8259[12], 0x60);
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1062
    DMA_init(0);
1063
#ifdef HAS_AUDIO
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    audio_init(pci_enabled ? pci_bus : NULL, i8259);
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#endif
B
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1066

T
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1067 1068 1069 1070 1071 1072 1073 1074
    for(i = 0; i < MAX_FD; i++) {
        index = drive_get_index(IF_FLOPPY, 0, i);
	if (index != -1)
	    fd[i] = drives_table[index].bdrv;
	else
	    fd[i] = NULL;
    }
    floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
B
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1075

1076
    cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
B
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1077

B
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1078
    if (pci_enabled && usb_enabled) {
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1079
        usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
B
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1080 1081
    }

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1082
    if (pci_enabled && acpi_enabled) {
1083
        uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
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1084 1085 1086
        i2c_bus *smbus;

        /* TODO: Populate SPD eeprom data.  */
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        smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1088
        for (i = 0; i < 8; i++) {
P
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1089
            smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
1090
        }
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1091
    }
1092

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    if (i440fx_state) {
        i440fx_init_memory_mappings(i440fx_state);
    }
T
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1096

P
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1097
    if (pci_enabled) {
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	int max_bus;
        int bus, unit;
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        void *scsi;
1101

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        max_bus = drive_get_max_bus(IF_SCSI);

	for (bus = 0; bus <= max_bus; bus++) {
            scsi = lsi_scsi_init(pci_bus, -1);
            for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
	        index = drive_get_index(IF_SCSI, bus, unit);
		if (index == -1)
		    continue;
		lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
	    }
        }
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    }
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    /* Add virtio block devices */
    if (pci_enabled) {
        int index;
        int unit_id = 0;

        while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1121
            virtio_blk_init(pci_bus, drives_table[index].bdrv);
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            unit_id++;
        }
    }
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    /* Add virtio balloon device */
    if (pci_enabled)
        virtio_balloon_init(pci_bus);
1129 1130 1131 1132 1133 1134 1135 1136

    /* Add virtio console devices */
    if (pci_enabled) {
        for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
            if (virtcon_hds[i])
                virtio_console_init(pci_bus, virtcon_hds[i]);
        }
    }
B
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}
B
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1138

1139
static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
1140
                        const char *boot_device,
1141
                        const char *kernel_filename,
1142
                        const char *kernel_cmdline,
1143 1144
                        const char *initrd_filename,
                        const char *cpu_model)
1145
{
1146
    pc_init1(ram_size, vga_ram_size, boot_device,
1147
             kernel_filename, kernel_cmdline,
1148
             initrd_filename, 1, cpu_model);
1149 1150
}

1151
static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
1152
                        const char *boot_device,
1153
                        const char *kernel_filename,
1154
                        const char *kernel_cmdline,
1155 1156
                        const char *initrd_filename,
                        const char *cpu_model)
1157
{
1158
    pc_init1(ram_size, vga_ram_size, boot_device,
1159
             kernel_filename, kernel_cmdline,
1160
             initrd_filename, 0, cpu_model);
1161 1162
}

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/* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
   BIOS will read it and start S3 resume at POST Entry */
void cmos_set_s3_resume(void)
{
    if (rtc_state)
        rtc_set_memory(rtc_state, 0xF, 0xFE);
}

B
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QEMUMachine pc_machine = {
A
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1172 1173 1174
    .name = "pc",
    .desc = "Standard PC",
    .init = pc_init_pci,
1175
    .max_cpus = 255,
1176 1177 1178
};

QEMUMachine isapc_machine = {
A
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1179 1180 1181
    .name = "isapc",
    .desc = "ISA-only PC",
    .init = pc_init_isa,
1182
    .max_cpus = 1,
B
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};