fdc.c 64.3 KB
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/*
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 * QEMU Floppy disk emulator (Intel 82078)
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 *
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 * Copyright (c) 2003, 2007 Jocelyn Mayer
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 * Copyright (c) 2008 Hervé Poussineau
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
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/*
 * The controller is used in Sun4m systems in a slightly different
 * way. There are changes in DOR register and DMA is not available.
 */
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#include "hw.h"
#include "fdc.h"
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#include "qemu-error.h"
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#include "qemu-timer.h"
#include "isa.h"
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#include "sysbus.h"
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#include "qdev-addr.h"
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#include "blockdev.h"
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#include "sysemu.h"
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/********************************************************/
/* debug Floppy devices */
//#define DEBUG_FLOPPY

#ifdef DEBUG_FLOPPY
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#define FLOPPY_DPRINTF(fmt, ...)                                \
    do { printf("FLOPPY: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define FLOPPY_DPRINTF(fmt, ...)
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#endif

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#define FLOPPY_ERROR(fmt, ...)                                          \
    do { printf("FLOPPY ERROR: %s: " fmt, __func__ , ## __VA_ARGS__); } while (0)
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/********************************************************/
/* Floppy drive emulation                               */

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#define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
#define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))

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/* Will always be a fixed parameter for us */
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#define FD_SECTOR_LEN          512
#define FD_SECTOR_SC           2   /* Sector size code */
#define FD_RESET_SENSEI_COUNT  4   /* Number of sense interrupts on RESET */
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typedef struct FDCtrl FDCtrl;

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/* Floppy disk drive emulation */
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typedef enum FDiskFlags {
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    FDISK_DBL_SIDES  = 0x01,
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} FDiskFlags;
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typedef struct FDrive {
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    FDCtrl *fdctrl;
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    BlockDriverState *bs;
    /* Drive status */
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    FDriveType drive;
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    uint8_t perpendicular;    /* 2.88 MB access mode    */
    /* Position */
    uint8_t head;
    uint8_t track;
    uint8_t sect;
    /* Media */
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    FDiskFlags flags;
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    uint8_t last_sect;        /* Nb sector per track    */
    uint8_t max_track;        /* Nb of tracks           */
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    uint16_t bps;             /* Bytes per sector       */
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    uint8_t ro;               /* Is read-only           */
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    uint8_t media_changed;    /* Is media changed       */
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    uint8_t media_rate;       /* Data rate of medium    */
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} FDrive;
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static void fd_init(FDrive *drv)
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{
    /* Drive */
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    drv->drive = FDRIVE_DRV_NONE;
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    drv->perpendicular = 0;
    /* Disk */
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    drv->last_sect = 0;
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    drv->max_track = 0;
}

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#define NUM_SIDES(drv) ((drv)->flags & FDISK_DBL_SIDES ? 2 : 1)

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static int fd_sector_calc(uint8_t head, uint8_t track, uint8_t sect,
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                          uint8_t last_sect, uint8_t num_sides)
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{
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    return (((track * num_sides) + head) * last_sect) + sect - 1;
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}

/* Returns current position, in sectors, for given drive */
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static int fd_sector(FDrive *drv)
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{
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    return fd_sector_calc(drv->head, drv->track, drv->sect, drv->last_sect,
                          NUM_SIDES(drv));
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}

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/* Seek to a new position:
 * returns 0 if already on right track
 * returns 1 if track changed
 * returns 2 if track is invalid
 * returns 3 if sector is invalid
 * returns 4 if seek is disabled
 */
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static int fd_seek(FDrive *drv, uint8_t head, uint8_t track, uint8_t sect,
                   int enable_seek)
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{
    uint32_t sector;
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    int ret;

    if (track > drv->max_track ||
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        (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
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        FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
                       head, track, sect, 1,
                       (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
                       drv->max_track, drv->last_sect);
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        return 2;
    }
    if (sect > drv->last_sect) {
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        FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
                       head, track, sect, 1,
                       (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
                       drv->max_track, drv->last_sect);
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        return 3;
    }
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    sector = fd_sector_calc(head, track, sect, drv->last_sect, NUM_SIDES(drv));
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    ret = 0;
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    if (sector != fd_sector(drv)) {
#if 0
        if (!enable_seek) {
            FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
                         head, track, sect, 1, drv->max_track, drv->last_sect);
            return 4;
        }
#endif
        drv->head = head;
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        if (drv->track != track)
            ret = 1;
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        drv->track = track;
        drv->sect = sect;
    }

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    return ret;
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}

/* Set drive back to track 0 */
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static void fd_recalibrate(FDrive *drv)
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{
    FLOPPY_DPRINTF("recalibrate\n");
    drv->head = 0;
    drv->track = 0;
    drv->sect = 1;
}

/* Revalidate a disk drive after a disk change */
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static void fd_revalidate(FDrive *drv)
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{
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    int nb_heads, max_track, last_sect, ro;
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    FDriveType drive;
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    FDriveRate rate;
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    FLOPPY_DPRINTF("revalidate\n");
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    if (drv->bs != NULL && bdrv_is_inserted(drv->bs)) {
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        ro = bdrv_is_read_only(drv->bs);
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        bdrv_get_floppy_geometry_hint(drv->bs, &nb_heads, &max_track,
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                                      &last_sect, drv->drive, &drive, &rate);
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        if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
            FLOPPY_DPRINTF("User defined disk (%d %d %d)",
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                           nb_heads - 1, max_track, last_sect);
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        } else {
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            FLOPPY_DPRINTF("Floppy disk (%d h %d t %d s) %s\n", nb_heads,
                           max_track, last_sect, ro ? "ro" : "rw");
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        }
        if (nb_heads == 1) {
            drv->flags &= ~FDISK_DBL_SIDES;
        } else {
            drv->flags |= FDISK_DBL_SIDES;
        }
        drv->max_track = max_track;
        drv->last_sect = last_sect;
        drv->ro = ro;
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        drv->drive = drive;
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        drv->media_rate = rate;
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    } else {
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        FLOPPY_DPRINTF("No disk in drive\n");
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        drv->last_sect = 0;
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        drv->max_track = 0;
        drv->flags &= ~FDISK_DBL_SIDES;
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    }
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}

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/********************************************************/
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/* Intel 82078 floppy disk controller emulation          */
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static void fdctrl_reset(FDCtrl *fdctrl, int do_irq);
static void fdctrl_reset_fifo(FDCtrl *fdctrl);
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static int fdctrl_transfer_handler (void *opaque, int nchan,
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                                    int dma_pos, int dma_len);
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static void fdctrl_raise_irq(FDCtrl *fdctrl, uint8_t status0);
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static FDrive *get_cur_drv(FDCtrl *fdctrl);
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static uint32_t fdctrl_read_statusA(FDCtrl *fdctrl);
static uint32_t fdctrl_read_statusB(FDCtrl *fdctrl);
static uint32_t fdctrl_read_dor(FDCtrl *fdctrl);
static void fdctrl_write_dor(FDCtrl *fdctrl, uint32_t value);
static uint32_t fdctrl_read_tape(FDCtrl *fdctrl);
static void fdctrl_write_tape(FDCtrl *fdctrl, uint32_t value);
static uint32_t fdctrl_read_main_status(FDCtrl *fdctrl);
static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value);
static uint32_t fdctrl_read_data(FDCtrl *fdctrl);
static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value);
static uint32_t fdctrl_read_dir(FDCtrl *fdctrl);
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static void fdctrl_write_ccr(FDCtrl *fdctrl, uint32_t value);
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enum {
    FD_DIR_WRITE   = 0,
    FD_DIR_READ    = 1,
    FD_DIR_SCANE   = 2,
    FD_DIR_SCANL   = 3,
    FD_DIR_SCANH   = 4,
};

enum {
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    FD_STATE_MULTI  = 0x01,	/* multi track flag */
    FD_STATE_FORMAT = 0x02,	/* format flag */
    FD_STATE_SEEK   = 0x04,	/* seek flag */
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};

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enum {
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    FD_REG_SRA = 0x00,
    FD_REG_SRB = 0x01,
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    FD_REG_DOR = 0x02,
    FD_REG_TDR = 0x03,
    FD_REG_MSR = 0x04,
    FD_REG_DSR = 0x04,
    FD_REG_FIFO = 0x05,
    FD_REG_DIR = 0x07,
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    FD_REG_CCR = 0x07,
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};

enum {
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    FD_CMD_READ_TRACK = 0x02,
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    FD_CMD_SPECIFY = 0x03,
    FD_CMD_SENSE_DRIVE_STATUS = 0x04,
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    FD_CMD_WRITE = 0x05,
    FD_CMD_READ = 0x06,
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    FD_CMD_RECALIBRATE = 0x07,
    FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
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    FD_CMD_WRITE_DELETED = 0x09,
    FD_CMD_READ_ID = 0x0a,
    FD_CMD_READ_DELETED = 0x0c,
    FD_CMD_FORMAT_TRACK = 0x0d,
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    FD_CMD_DUMPREG = 0x0e,
    FD_CMD_SEEK = 0x0f,
    FD_CMD_VERSION = 0x10,
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    FD_CMD_SCAN_EQUAL = 0x11,
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    FD_CMD_PERPENDICULAR_MODE = 0x12,
    FD_CMD_CONFIGURE = 0x13,
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    FD_CMD_LOCK = 0x14,
    FD_CMD_VERIFY = 0x16,
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    FD_CMD_POWERDOWN_MODE = 0x17,
    FD_CMD_PART_ID = 0x18,
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    FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
    FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
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    FD_CMD_SAVE = 0x2e,
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    FD_CMD_OPTION = 0x33,
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    FD_CMD_RESTORE = 0x4e,
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    FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
    FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
    FD_CMD_FORMAT_AND_WRITE = 0xcd,
    FD_CMD_RELATIVE_SEEK_IN = 0xcf,
};

enum {
    FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
    FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
    FD_CONFIG_POLL  = 0x10, /* Poll enabled */
    FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
    FD_CONFIG_EIS   = 0x40, /* No implied seeks */
};

enum {
    FD_SR0_EQPMT    = 0x10,
    FD_SR0_SEEK     = 0x20,
    FD_SR0_ABNTERM  = 0x40,
    FD_SR0_INVCMD   = 0x80,
    FD_SR0_RDYCHG   = 0xc0,
};

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enum {
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    FD_SR1_MA       = 0x01, /* Missing address mark */
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    FD_SR1_NW       = 0x02, /* Not writable */
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    FD_SR1_EC       = 0x80, /* End of cylinder */
};

enum {
    FD_SR2_SNS      = 0x04, /* Scan not satisfied */
    FD_SR2_SEH      = 0x08, /* Scan equal hit */
};

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enum {
    FD_SRA_DIR      = 0x01,
    FD_SRA_nWP      = 0x02,
    FD_SRA_nINDX    = 0x04,
    FD_SRA_HDSEL    = 0x08,
    FD_SRA_nTRK0    = 0x10,
    FD_SRA_STEP     = 0x20,
    FD_SRA_nDRV2    = 0x40,
    FD_SRA_INTPEND  = 0x80,
};

enum {
    FD_SRB_MTR0     = 0x01,
    FD_SRB_MTR1     = 0x02,
    FD_SRB_WGATE    = 0x04,
    FD_SRB_RDATA    = 0x08,
    FD_SRB_WDATA    = 0x10,
    FD_SRB_DR0      = 0x20,
};

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enum {
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#if MAX_FD == 4
    FD_DOR_SELMASK  = 0x03,
#else
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    FD_DOR_SELMASK  = 0x01,
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#endif
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    FD_DOR_nRESET   = 0x04,
    FD_DOR_DMAEN    = 0x08,
    FD_DOR_MOTEN0   = 0x10,
    FD_DOR_MOTEN1   = 0x20,
    FD_DOR_MOTEN2   = 0x40,
    FD_DOR_MOTEN3   = 0x80,
};

enum {
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#if MAX_FD == 4
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    FD_TDR_BOOTSEL  = 0x0c,
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#else
    FD_TDR_BOOTSEL  = 0x04,
#endif
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};

enum {
    FD_DSR_DRATEMASK= 0x03,
    FD_DSR_PWRDOWN  = 0x40,
    FD_DSR_SWRESET  = 0x80,
};

enum {
    FD_MSR_DRV0BUSY = 0x01,
    FD_MSR_DRV1BUSY = 0x02,
    FD_MSR_DRV2BUSY = 0x04,
    FD_MSR_DRV3BUSY = 0x08,
    FD_MSR_CMDBUSY  = 0x10,
    FD_MSR_NONDMA   = 0x20,
    FD_MSR_DIO      = 0x40,
    FD_MSR_RQM      = 0x80,
};

enum {
    FD_DIR_DSKCHG   = 0x80,
};

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#define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
#define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
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#define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
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struct FDCtrl {
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    MemoryRegion iomem;
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    qemu_irq irq;
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    /* Controller state */
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    QEMUTimer *result_timer;
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    int dma_chann;
    /* Controller's identification */
    uint8_t version;
    /* HW */
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    uint8_t sra;
    uint8_t srb;
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    uint8_t dor;
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    uint8_t dor_vmstate; /* only used as temp during vmstate */
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    uint8_t tdr;
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    uint8_t dsr;
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    uint8_t msr;
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    uint8_t cur_drv;
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    uint8_t status0;
    uint8_t status1;
    uint8_t status2;
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    /* Command FIFO */
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    uint8_t *fifo;
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    int32_t fifo_size;
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    uint32_t data_pos;
    uint32_t data_len;
    uint8_t data_state;
    uint8_t data_dir;
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    uint8_t eot; /* last wanted sector */
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    /* States kept only to be returned back */
    /* precompensation */
    uint8_t precomp_trk;
    uint8_t config;
    uint8_t lock;
    /* Power down config (also with status regB access mode */
    uint8_t pwrd;
    /* Floppy drives */
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    uint8_t num_floppies;
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    /* Sun4m quirks? */
    int sun4m;
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    FDrive drives[MAX_FD];
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    int reset_sensei;
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    uint32_t check_media_rate;
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    /* Timers state */
    uint8_t timer0;
    uint8_t timer1;
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};

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typedef struct FDCtrlSysBus {
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    SysBusDevice busdev;
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    struct FDCtrl state;
} FDCtrlSysBus;
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typedef struct FDCtrlISABus {
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    ISADevice busdev;
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    uint32_t iobase;
    uint32_t irq;
    uint32_t dma;
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    struct FDCtrl state;
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    int32_t bootindexA;
    int32_t bootindexB;
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} FDCtrlISABus;
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static uint32_t fdctrl_read (void *opaque, uint32_t reg)
{
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    FDCtrl *fdctrl = opaque;
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    uint32_t retval;

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    reg &= 7;
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    switch (reg) {
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    case FD_REG_SRA:
        retval = fdctrl_read_statusA(fdctrl);
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        break;
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    case FD_REG_SRB:
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        retval = fdctrl_read_statusB(fdctrl);
        break;
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    case FD_REG_DOR:
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        retval = fdctrl_read_dor(fdctrl);
        break;
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    case FD_REG_TDR:
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        retval = fdctrl_read_tape(fdctrl);
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        break;
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    case FD_REG_MSR:
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        retval = fdctrl_read_main_status(fdctrl);
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        break;
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    case FD_REG_FIFO:
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        retval = fdctrl_read_data(fdctrl);
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        break;
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    case FD_REG_DIR:
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        retval = fdctrl_read_dir(fdctrl);
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        break;
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    default:
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        retval = (uint32_t)(-1);
        break;
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    }
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    FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
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    return retval;
}

static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value)
{
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    FDCtrl *fdctrl = opaque;
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    FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);

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    reg &= 7;
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    switch (reg) {
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    case FD_REG_DOR:
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        fdctrl_write_dor(fdctrl, value);
        break;
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    case FD_REG_TDR:
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        fdctrl_write_tape(fdctrl, value);
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        break;
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    case FD_REG_DSR:
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        fdctrl_write_rate(fdctrl, value);
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        break;
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    case FD_REG_FIFO:
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        fdctrl_write_data(fdctrl, value);
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        break;
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    case FD_REG_CCR:
        fdctrl_write_ccr(fdctrl, value);
        break;
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    default:
510
        break;
511
    }
512 513
}

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static uint64_t fdctrl_read_mem (void *opaque, target_phys_addr_t reg,
                                 unsigned ize)
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{
517
    return fdctrl_read(opaque, (uint32_t)reg);
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}

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static void fdctrl_write_mem (void *opaque, target_phys_addr_t reg,
                              uint64_t value, unsigned size)
B
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522
{
523
    fdctrl_write(opaque, (uint32_t)reg, value);
B
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524 525
}

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static const MemoryRegionOps fdctrl_mem_ops = {
    .read = fdctrl_read_mem,
    .write = fdctrl_write_mem,
    .endianness = DEVICE_NATIVE_ENDIAN,
B
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};

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static const MemoryRegionOps fdctrl_mem_strict_ops = {
    .read = fdctrl_read_mem,
    .write = fdctrl_write_mem,
    .endianness = DEVICE_NATIVE_ENDIAN,
    .valid = {
        .min_access_size = 1,
        .max_access_size = 1,
    },
540 541
};

542 543 544 545
static bool fdrive_media_changed_needed(void *opaque)
{
    FDrive *drive = opaque;

546
    return (drive->bs != NULL && drive->media_changed != 1);
547 548 549 550 551 552 553 554 555 556 557 558 559
}

static const VMStateDescription vmstate_fdrive_media_changed = {
    .name = "fdrive/media_changed",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField[]) {
        VMSTATE_UINT8(media_changed, FDrive),
        VMSTATE_END_OF_LIST()
    }
};

560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577
static bool fdrive_media_rate_needed(void *opaque)
{
    FDrive *drive = opaque;

    return drive->fdctrl->check_media_rate;
}

static const VMStateDescription vmstate_fdrive_media_rate = {
    .name = "fdrive/media_rate",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField[]) {
        VMSTATE_UINT8(media_rate, FDrive),
        VMSTATE_END_OF_LIST()
    }
};

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static const VMStateDescription vmstate_fdrive = {
    .name = "fdrive",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
583
    .fields      = (VMStateField[]) {
B
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        VMSTATE_UINT8(head, FDrive),
        VMSTATE_UINT8(track, FDrive),
        VMSTATE_UINT8(sect, FDrive),
J
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        VMSTATE_END_OF_LIST()
588 589 590 591 592
    },
    .subsections = (VMStateSubsection[]) {
        {
            .vmsd = &vmstate_fdrive_media_changed,
            .needed = &fdrive_media_changed_needed,
593 594 595
        } , {
            .vmsd = &vmstate_fdrive_media_rate,
            .needed = &fdrive_media_rate_needed,
596 597 598
        } , {
            /* empty */
        }
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    }
};
601

602
static void fdc_pre_save(void *opaque)
603
{
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604
    FDCtrl *s = opaque;
605

J
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    s->dor_vmstate = s->dor | GET_CUR_DRV(s);
607 608
}

609
static int fdc_post_load(void *opaque, int version_id)
610
{
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611
    FDCtrl *s = opaque;
612

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    SET_CUR_DRV(s, s->dor_vmstate & FD_DOR_SELMASK);
    s->dor = s->dor_vmstate & ~FD_DOR_SELMASK;
615 616 617
    return 0;
}

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static const VMStateDescription vmstate_fdc = {
619
    .name = "fdc",
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    .version_id = 2,
    .minimum_version_id = 2,
    .minimum_version_id_old = 2,
    .pre_save = fdc_pre_save,
    .post_load = fdc_post_load,
    .fields      = (VMStateField []) {
        /* Controller State */
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        VMSTATE_UINT8(sra, FDCtrl),
        VMSTATE_UINT8(srb, FDCtrl),
        VMSTATE_UINT8(dor_vmstate, FDCtrl),
        VMSTATE_UINT8(tdr, FDCtrl),
        VMSTATE_UINT8(dsr, FDCtrl),
        VMSTATE_UINT8(msr, FDCtrl),
        VMSTATE_UINT8(status0, FDCtrl),
        VMSTATE_UINT8(status1, FDCtrl),
        VMSTATE_UINT8(status2, FDCtrl),
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        /* Command FIFO */
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        VMSTATE_VARRAY_INT32(fifo, FDCtrl, fifo_size, 0, vmstate_info_uint8,
                             uint8_t),
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        VMSTATE_UINT32(data_pos, FDCtrl),
        VMSTATE_UINT32(data_len, FDCtrl),
        VMSTATE_UINT8(data_state, FDCtrl),
        VMSTATE_UINT8(data_dir, FDCtrl),
        VMSTATE_UINT8(eot, FDCtrl),
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        /* States kept only to be returned back */
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        VMSTATE_UINT8(timer0, FDCtrl),
        VMSTATE_UINT8(timer1, FDCtrl),
        VMSTATE_UINT8(precomp_trk, FDCtrl),
        VMSTATE_UINT8(config, FDCtrl),
        VMSTATE_UINT8(lock, FDCtrl),
        VMSTATE_UINT8(pwrd, FDCtrl),
        VMSTATE_UINT8_EQUAL(num_floppies, FDCtrl),
        VMSTATE_STRUCT_ARRAY(drives, FDCtrl, MAX_FD, 1,
                             vmstate_fdrive, FDrive),
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        VMSTATE_END_OF_LIST()
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    }
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};
657

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static void fdctrl_external_reset_sysbus(DeviceState *d)
659
{
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    FDCtrlSysBus *sys = container_of(d, FDCtrlSysBus, busdev.qdev);
    FDCtrl *s = &sys->state;
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    fdctrl_reset(s, 0);
}

static void fdctrl_external_reset_isa(DeviceState *d)
{
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    FDCtrlISABus *isa = container_of(d, FDCtrlISABus, busdev.qdev);
    FDCtrl *s = &isa->state;
670 671 672 673

    fdctrl_reset(s, 0);
}

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static void fdctrl_handle_tc(void *opaque, int irq, int level)
{
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    //FDCtrl *s = opaque;
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677 678 679 680 681 682 683

    if (level) {
        // XXX
        FLOPPY_DPRINTF("TC pulsed\n");
    }
}

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/* Change IRQ state */
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static void fdctrl_reset_irq(FDCtrl *fdctrl)
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686
{
B
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687 688
    if (!(fdctrl->sra & FD_SRA_INTPEND))
        return;
689
    FLOPPY_DPRINTF("Reset interrupt\n");
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    qemu_set_irq(fdctrl->irq, 0);
B
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    fdctrl->sra &= ~FD_SRA_INTPEND;
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692 693
}

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static void fdctrl_raise_irq(FDCtrl *fdctrl, uint8_t status0)
B
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{
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696 697 698 699 700
    /* Sparc mutation */
    if (fdctrl->sun4m && (fdctrl->msr & FD_MSR_CMDBUSY)) {
        /* XXX: not sure */
        fdctrl->msr &= ~FD_MSR_CMDBUSY;
        fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
B
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        fdctrl->status0 = status0;
702
        return;
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703
    }
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    if (!(fdctrl->sra & FD_SRA_INTPEND)) {
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        qemu_set_irq(fdctrl->irq, 1);
B
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        fdctrl->sra |= FD_SRA_INTPEND;
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707
    }
708
    fdctrl->reset_sensei = 0;
B
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709 710
    fdctrl->status0 = status0;
    FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
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711 712
}

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/* Reset controller */
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static void fdctrl_reset(FDCtrl *fdctrl, int do_irq)
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715 716 717
{
    int i;

B
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718
    FLOPPY_DPRINTF("reset controller\n");
719
    fdctrl_reset_irq(fdctrl);
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    /* Initialise controller */
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721 722 723 724
    fdctrl->sra = 0;
    fdctrl->srb = 0xc0;
    if (!fdctrl->drives[1].bs)
        fdctrl->sra |= FD_SRA_nDRV2;
725
    fdctrl->cur_drv = 0;
B
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    fdctrl->dor = FD_DOR_nRESET;
B
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727
    fdctrl->dor |= (fdctrl->dma_chann != -1) ? FD_DOR_DMAEN : 0;
B
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    fdctrl->msr = FD_MSR_RQM;
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    /* FIFO state */
730 731
    fdctrl->data_pos = 0;
    fdctrl->data_len = 0;
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    fdctrl->data_state = 0;
733
    fdctrl->data_dir = FD_DIR_WRITE;
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    for (i = 0; i < MAX_FD; i++)
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        fd_recalibrate(&fdctrl->drives[i]);
736
    fdctrl_reset_fifo(fdctrl);
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    if (do_irq) {
738
        fdctrl_raise_irq(fdctrl, FD_SR0_RDYCHG);
739
        fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT;
B
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    }
741 742
}

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static inline FDrive *drv0(FDCtrl *fdctrl)
744
{
B
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    return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2];
746 747
}

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static inline FDrive *drv1(FDCtrl *fdctrl)
749
{
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    if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2))
        return &fdctrl->drives[1];
    else
        return &fdctrl->drives[0];
754 755
}

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#if MAX_FD == 4
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static inline FDrive *drv2(FDCtrl *fdctrl)
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{
    if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2))
        return &fdctrl->drives[2];
    else
        return &fdctrl->drives[1];
}

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static inline FDrive *drv3(FDCtrl *fdctrl)
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{
    if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2))
        return &fdctrl->drives[3];
    else
        return &fdctrl->drives[2];
}
#endif

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static FDrive *get_cur_drv(FDCtrl *fdctrl)
775
{
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    switch (fdctrl->cur_drv) {
        case 0: return drv0(fdctrl);
        case 1: return drv1(fdctrl);
#if MAX_FD == 4
        case 2: return drv2(fdctrl);
        case 3: return drv3(fdctrl);
#endif
        default: return NULL;
    }
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785 786
}

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/* Status A register : 0x00 (read-only) */
B
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static uint32_t fdctrl_read_statusA(FDCtrl *fdctrl)
B
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789 790 791 792 793 794 795 796
{
    uint32_t retval = fdctrl->sra;

    FLOPPY_DPRINTF("status register A: 0x%02x\n", retval);

    return retval;
}

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/* Status B register : 0x01 (read-only) */
B
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798
static uint32_t fdctrl_read_statusB(FDCtrl *fdctrl)
B
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799
{
B
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800 801 802 803 804
    uint32_t retval = fdctrl->srb;

    FLOPPY_DPRINTF("status register B: 0x%02x\n", retval);

    return retval;
B
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805 806 807
}

/* Digital output register : 0x02 */
B
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808
static uint32_t fdctrl_read_dor(FDCtrl *fdctrl)
B
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809
{
B
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810
    uint32_t retval = fdctrl->dor;
B
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811 812

    /* Selected drive */
813
    retval |= fdctrl->cur_drv;
B
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814 815 816 817 818
    FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);

    return retval;
}

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819
static void fdctrl_write_dor(FDCtrl *fdctrl, uint32_t value)
B
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820 821
{
    FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
B
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822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838

    /* Motors */
    if (value & FD_DOR_MOTEN0)
        fdctrl->srb |= FD_SRB_MTR0;
    else
        fdctrl->srb &= ~FD_SRB_MTR0;
    if (value & FD_DOR_MOTEN1)
        fdctrl->srb |= FD_SRB_MTR1;
    else
        fdctrl->srb &= ~FD_SRB_MTR1;

    /* Drive */
    if (value & 1)
        fdctrl->srb |= FD_SRB_DR0;
    else
        fdctrl->srb &= ~FD_SRB_DR0;

B
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839
    /* Reset */
840
    if (!(value & FD_DOR_nRESET)) {
B
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841
        if (fdctrl->dor & FD_DOR_nRESET) {
B
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842
            FLOPPY_DPRINTF("controller enter RESET state\n");
B
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843 844
        }
    } else {
B
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845
        if (!(fdctrl->dor & FD_DOR_nRESET)) {
B
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846
            FLOPPY_DPRINTF("controller out of RESET state\n");
847
            fdctrl_reset(fdctrl, 1);
B
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848
            fdctrl->dsr &= ~FD_DSR_PWRDOWN;
B
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849 850 851
        }
    }
    /* Selected drive */
852
    fdctrl->cur_drv = value & FD_DOR_SELMASK;
B
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853 854

    fdctrl->dor = value;
B
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855 856 857
}

/* Tape drive register : 0x03 */
B
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858
static uint32_t fdctrl_read_tape(FDCtrl *fdctrl)
B
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859
{
B
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860
    uint32_t retval = fdctrl->tdr;
B
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861 862 863 864 865 866

    FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);

    return retval;
}

B
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867
static void fdctrl_write_tape(FDCtrl *fdctrl, uint32_t value)
B
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868 869
{
    /* Reset mode */
B
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870
    if (!(fdctrl->dor & FD_DOR_nRESET)) {
B
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871
        FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
B
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872 873 874 875
        return;
    }
    FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
    /* Disk boot selection indicator */
B
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876
    fdctrl->tdr = value & FD_TDR_BOOTSEL;
B
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877 878 879 880
    /* Tape indicators: never allow */
}

/* Main status register : 0x04 (read) */
B
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881
static uint32_t fdctrl_read_main_status(FDCtrl *fdctrl)
B
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882
{
B
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883
    uint32_t retval = fdctrl->msr;
B
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884

B
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885
    fdctrl->dsr &= ~FD_DSR_PWRDOWN;
B
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886
    fdctrl->dor |= FD_DOR_nRESET;
B
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887

888 889 890 891 892 893
    /* Sparc mutation */
    if (fdctrl->sun4m) {
        retval |= FD_MSR_DIO;
        fdctrl_reset_irq(fdctrl);
    };

B
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894 895 896 897 898 899
    FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);

    return retval;
}

/* Data select rate register : 0x04 (write) */
B
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900
static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value)
B
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901 902
{
    /* Reset mode */
B
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903
    if (!(fdctrl->dor & FD_DOR_nRESET)) {
904 905 906
        FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
        return;
    }
B
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907 908
    FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
    /* Reset: autoclear */
909
    if (value & FD_DSR_SWRESET) {
B
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910
        fdctrl->dor &= ~FD_DOR_nRESET;
911
        fdctrl_reset(fdctrl, 1);
B
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912
        fdctrl->dor |= FD_DOR_nRESET;
B
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913
    }
914
    if (value & FD_DSR_PWRDOWN) {
915
        fdctrl_reset(fdctrl, 1);
B
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916
    }
B
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917
    fdctrl->dsr = value;
B
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918 919
}

920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936
/* Configuration control register: 0x07 (write) */
static void fdctrl_write_ccr(FDCtrl *fdctrl, uint32_t value)
{
    /* Reset mode */
    if (!(fdctrl->dor & FD_DOR_nRESET)) {
        FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
        return;
    }
    FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value);

    /* Only the rate selection bits used in AT mode, and we
     * store those in the DSR.
     */
    fdctrl->dsr = (fdctrl->dsr & ~FD_DSR_DRATEMASK) |
                  (value & FD_DSR_DRATEMASK);
}

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static int fdctrl_media_changed(FDrive *drv)
B
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938 939
{
    int ret;
940

941
    if (!drv->bs)
B
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942
        return 0;
943 944 945 946 947 948 949 950
    if (drv->media_changed) {
        drv->media_changed = 0;
        ret = 1;
    } else {
        ret = bdrv_media_changed(drv->bs);
        if (ret < 0) {
            ret = 0;            /* we don't know, assume no */
        }
951
    }
B
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952 953 954 955 956 957
    if (ret) {
        fd_revalidate(drv);
    }
    return ret;
}

B
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958
/* Digital input register : 0x07 (read-only) */
B
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959
static uint32_t fdctrl_read_dir(FDCtrl *fdctrl)
B
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960 961 962
{
    uint32_t retval = 0;

963
    if (fdctrl_media_changed(get_cur_drv(fdctrl))) {
964
        retval |= FD_DIR_DSKCHG;
965
    }
966
    if (retval != 0) {
967
        FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
968
    }
B
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969 970 971 972 973

    return retval;
}

/* FIFO state control */
B
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974
static void fdctrl_reset_fifo(FDCtrl *fdctrl)
B
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975
{
976 977
    fdctrl->data_dir = FD_DIR_WRITE;
    fdctrl->data_pos = 0;
B
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978
    fdctrl->msr &= ~(FD_MSR_CMDBUSY | FD_MSR_DIO);
B
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979 980 981
}

/* Set FIFO status for the host to read */
B
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982
static void fdctrl_set_fifo(FDCtrl *fdctrl, int fifo_len, int do_irq)
B
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983
{
984 985 986
    fdctrl->data_dir = FD_DIR_READ;
    fdctrl->data_len = fifo_len;
    fdctrl->data_pos = 0;
B
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987
    fdctrl->msr |= FD_MSR_CMDBUSY | FD_MSR_RQM | FD_MSR_DIO;
B
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988
    if (do_irq)
989
        fdctrl_raise_irq(fdctrl, 0x00);
B
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990 991 992
}

/* Set an error: unimplemented/unknown command */
B
Blue Swirl 已提交
993
static void fdctrl_unimplemented(FDCtrl *fdctrl, int direction)
B
bellard 已提交
994
{
B
blueswir1 已提交
995
    FLOPPY_ERROR("unimplemented command 0x%02x\n", fdctrl->fifo[0]);
996
    fdctrl->fifo[0] = FD_SR0_INVCMD;
997
    fdctrl_set_fifo(fdctrl, 1, 0);
B
bellard 已提交
998 999
}

B
blueswir1 已提交
1000
/* Seek to next sector */
B
Blue Swirl 已提交
1001
static int fdctrl_seek_to_next_sect(FDCtrl *fdctrl, FDrive *cur_drv)
B
blueswir1 已提交
1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033
{
    FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
                   cur_drv->head, cur_drv->track, cur_drv->sect,
                   fd_sector(cur_drv));
    /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
       error in fact */
    if (cur_drv->sect >= cur_drv->last_sect ||
        cur_drv->sect == fdctrl->eot) {
        cur_drv->sect = 1;
        if (FD_MULTI_TRACK(fdctrl->data_state)) {
            if (cur_drv->head == 0 &&
                (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
                cur_drv->head = 1;
            } else {
                cur_drv->head = 0;
                cur_drv->track++;
                if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
                    return 0;
            }
        } else {
            cur_drv->track++;
            return 0;
        }
        FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
                       cur_drv->head, cur_drv->track,
                       cur_drv->sect, fd_sector(cur_drv));
    } else {
        cur_drv->sect++;
    }
    return 1;
}

B
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1034
/* Callback for transfer end (stop or abort) */
B
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1035 1036
static void fdctrl_stop_transfer(FDCtrl *fdctrl, uint8_t status0,
                                 uint8_t status1, uint8_t status2)
B
bellard 已提交
1037
{
B
Blue Swirl 已提交
1038
    FDrive *cur_drv;
B
bellard 已提交
1039

1040
    cur_drv = get_cur_drv(fdctrl);
B
bellard 已提交
1041 1042
    FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
                   status0, status1, status2,
B
blueswir1 已提交
1043 1044
                   status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl));
    fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1045 1046 1047 1048 1049 1050 1051
    fdctrl->fifo[1] = status1;
    fdctrl->fifo[2] = status2;
    fdctrl->fifo[3] = cur_drv->track;
    fdctrl->fifo[4] = cur_drv->head;
    fdctrl->fifo[5] = cur_drv->sect;
    fdctrl->fifo[6] = FD_SECTOR_SC;
    fdctrl->data_dir = FD_DIR_READ;
B
blueswir1 已提交
1052
    if (!(fdctrl->msr & FD_MSR_NONDMA)) {
1053
        DMA_release_DREQ(fdctrl->dma_chann);
1054
    }
B
blueswir1 已提交
1055
    fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
B
blueswir1 已提交
1056
    fdctrl->msr &= ~FD_MSR_NONDMA;
1057
    fdctrl_set_fifo(fdctrl, 7, 1);
B
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1058 1059 1060
}

/* Prepare a data transfer (either DMA or FIFO) */
B
Blue Swirl 已提交
1061
static void fdctrl_start_transfer(FDCtrl *fdctrl, int direction)
B
bellard 已提交
1062
{
B
Blue Swirl 已提交
1063
    FDrive *cur_drv;
B
bellard 已提交
1064
    uint8_t kh, kt, ks;
B
blueswir1 已提交
1065
    int did_seek = 0;
B
bellard 已提交
1066

B
blueswir1 已提交
1067
    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1068 1069 1070 1071
    cur_drv = get_cur_drv(fdctrl);
    kt = fdctrl->fifo[2];
    kh = fdctrl->fifo[3];
    ks = fdctrl->fifo[4];
B
bellard 已提交
1072
    FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
B
blueswir1 已提交
1073
                   GET_CUR_DRV(fdctrl), kh, kt, ks,
1074 1075
                   fd_sector_calc(kh, kt, ks, cur_drv->last_sect,
                                  NUM_SIDES(cur_drv)));
B
blueswir1 已提交
1076
    switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
B
bellard 已提交
1077 1078
    case 2:
        /* sect too big */
1079
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1080 1081 1082
        fdctrl->fifo[3] = kt;
        fdctrl->fifo[4] = kh;
        fdctrl->fifo[5] = ks;
B
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1083 1084 1085
        return;
    case 3:
        /* track too big */
B
blueswir1 已提交
1086
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1087 1088 1089
        fdctrl->fifo[3] = kt;
        fdctrl->fifo[4] = kh;
        fdctrl->fifo[5] = ks;
B
bellard 已提交
1090 1091 1092
        return;
    case 4:
        /* No seek enabled */
1093
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1094 1095 1096
        fdctrl->fifo[3] = kt;
        fdctrl->fifo[4] = kh;
        fdctrl->fifo[5] = ks;
B
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1097 1098 1099 1100 1101 1102 1103
        return;
    case 1:
        did_seek = 1;
        break;
    default:
        break;
    }
B
blueswir1 已提交
1104

1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117
    /* Check the data rate. If the programmed data rate does not match
     * the currently inserted medium, the operation has to fail. */
    if (fdctrl->check_media_rate &&
        (fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
        FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
                       fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
        fdctrl->fifo[3] = kt;
        fdctrl->fifo[4] = kh;
        fdctrl->fifo[5] = ks;
        return;
    }

B
bellard 已提交
1118
    /* Set the FIFO state */
1119 1120
    fdctrl->data_dir = direction;
    fdctrl->data_pos = 0;
B
blueswir1 已提交
1121
    fdctrl->msr |= FD_MSR_CMDBUSY;
1122 1123 1124 1125
    if (fdctrl->fifo[0] & 0x80)
        fdctrl->data_state |= FD_STATE_MULTI;
    else
        fdctrl->data_state &= ~FD_STATE_MULTI;
B
bellard 已提交
1126
    if (did_seek)
1127 1128 1129 1130 1131 1132
        fdctrl->data_state |= FD_STATE_SEEK;
    else
        fdctrl->data_state &= ~FD_STATE_SEEK;
    if (fdctrl->fifo[5] == 00) {
        fdctrl->data_len = fdctrl->fifo[8];
    } else {
1133
        int tmp;
T
ths 已提交
1134
        fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1135
        tmp = (fdctrl->fifo[6] - ks + 1);
1136
        if (fdctrl->fifo[0] & 0x80)
1137
            tmp += fdctrl->fifo[6];
1138
        fdctrl->data_len *= tmp;
1139
    }
1140
    fdctrl->eot = fdctrl->fifo[6];
B
blueswir1 已提交
1141
    if (fdctrl->dor & FD_DOR_DMAEN) {
B
bellard 已提交
1142 1143
        int dma_mode;
        /* DMA transfer are enabled. Check if DMA channel is well programmed */
1144
        dma_mode = DMA_get_channel_mode(fdctrl->dma_chann);
B
bellard 已提交
1145
        dma_mode = (dma_mode >> 2) & 3;
1146
        FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1147
                       dma_mode, direction,
1148
                       (128 << fdctrl->fifo[5]) *
1149
                       (cur_drv->last_sect - ks + 1), fdctrl->data_len);
B
bellard 已提交
1150 1151 1152 1153 1154
        if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
              direction == FD_DIR_SCANH) && dma_mode == 0) ||
            (direction == FD_DIR_WRITE && dma_mode == 2) ||
            (direction == FD_DIR_READ && dma_mode == 1)) {
            /* No access is allowed until DMA transfer has completed */
B
blueswir1 已提交
1155
            fdctrl->msr &= ~FD_MSR_RQM;
B
bellard 已提交
1156
            /* Now, we just have to wait for the DMA controller to
B
bellard 已提交
1157 1158
             * recall us...
             */
1159 1160
            DMA_hold_DREQ(fdctrl->dma_chann);
            DMA_schedule(fdctrl->dma_chann);
B
bellard 已提交
1161
            return;
1162
        } else {
1163
            FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
B
bellard 已提交
1164 1165 1166
        }
    }
    FLOPPY_DPRINTF("start non-DMA transfer\n");
B
blueswir1 已提交
1167
    fdctrl->msr |= FD_MSR_NONDMA;
B
blueswir1 已提交
1168 1169
    if (direction != FD_DIR_WRITE)
        fdctrl->msr |= FD_MSR_DIO;
B
bellard 已提交
1170
    /* IO based transfer: calculate len */
1171
    fdctrl_raise_irq(fdctrl, 0x00);
B
bellard 已提交
1172 1173 1174 1175 1176

    return;
}

/* Prepare a transfer of deleted data */
B
Blue Swirl 已提交
1177
static void fdctrl_start_transfer_del(FDCtrl *fdctrl, int direction)
B
bellard 已提交
1178
{
B
blueswir1 已提交
1179 1180
    FLOPPY_ERROR("fdctrl_start_transfer_del() unimplemented\n");

B
bellard 已提交
1181 1182 1183
    /* We don't handle deleted data,
     * so we don't return *ANYTHING*
     */
1184
    fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
B
bellard 已提交
1185 1186 1187
}

/* handlers for DMA transfers */
B
bellard 已提交
1188 1189
static int fdctrl_transfer_handler (void *opaque, int nchan,
                                    int dma_pos, int dma_len)
B
bellard 已提交
1190
{
B
Blue Swirl 已提交
1191 1192
    FDCtrl *fdctrl;
    FDrive *cur_drv;
1193
    int len, start_pos, rel_pos;
B
bellard 已提交
1194 1195
    uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;

1196
    fdctrl = opaque;
B
blueswir1 已提交
1197
    if (fdctrl->msr & FD_MSR_RQM) {
B
bellard 已提交
1198 1199 1200
        FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
        return 0;
    }
1201 1202 1203
    cur_drv = get_cur_drv(fdctrl);
    if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
        fdctrl->data_dir == FD_DIR_SCANH)
B
blueswir1 已提交
1204
        status2 = FD_SR2_SNS;
B
bellard 已提交
1205 1206
    if (dma_len > fdctrl->data_len)
        dma_len = fdctrl->data_len;
1207
    if (cur_drv->bs == NULL) {
1208
        if (fdctrl->data_dir == FD_DIR_WRITE)
1209
            fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1210
        else
1211
            fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1212
        len = 0;
1213 1214
        goto transfer_error;
    }
1215
    rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
B
bellard 已提交
1216 1217
    for (start_pos = fdctrl->data_pos; fdctrl->data_pos < dma_len;) {
        len = dma_len - fdctrl->data_pos;
1218 1219
        if (len + rel_pos > FD_SECTOR_LEN)
            len = FD_SECTOR_LEN - rel_pos;
B
bellard 已提交
1220 1221
        FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
                       "(%d-0x%08x 0x%08x)\n", len, dma_len, fdctrl->data_pos,
B
blueswir1 已提交
1222
                       fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head,
1223
                       cur_drv->track, cur_drv->sect, fd_sector(cur_drv),
1224
                       fd_sector(cur_drv) * FD_SECTOR_LEN);
1225
        if (fdctrl->data_dir != FD_DIR_WRITE ||
1226
            len < FD_SECTOR_LEN || rel_pos != 0) {
1227 1228
            /* READ & SCAN commands and realign to a sector for WRITE */
            if (bdrv_read(cur_drv->bs, fd_sector(cur_drv),
1229
                          fdctrl->fifo, 1) < 0) {
B
bellard 已提交
1230 1231 1232
                FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
                               fd_sector(cur_drv));
                /* Sure, image size is too small... */
1233
                memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
B
bellard 已提交
1234
            }
1235
        }
1236 1237 1238
        switch (fdctrl->data_dir) {
        case FD_DIR_READ:
            /* READ commands */
B
bellard 已提交
1239 1240
            DMA_write_memory (nchan, fdctrl->fifo + rel_pos,
                              fdctrl->data_pos, len);
1241 1242
            break;
        case FD_DIR_WRITE:
1243
            /* WRITE commands */
1244 1245 1246 1247 1248 1249 1250 1251 1252 1253
            if (cur_drv->ro) {
                /* Handle readonly medium early, no need to do DMA, touch the
                 * LED or attempt any writes. A real floppy doesn't attempt
                 * to write to readonly media either. */
                fdctrl_stop_transfer(fdctrl,
                                     FD_SR0_ABNTERM | FD_SR0_SEEK, FD_SR1_NW,
                                     0x00);
                goto transfer_error;
            }

B
bellard 已提交
1254 1255
            DMA_read_memory (nchan, fdctrl->fifo + rel_pos,
                             fdctrl->data_pos, len);
1256
            if (bdrv_write(cur_drv->bs, fd_sector(cur_drv),
1257
                           fdctrl->fifo, 1) < 0) {
B
blueswir1 已提交
1258
                FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
1259
                fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1260
                goto transfer_error;
1261
            }
1262 1263 1264
            break;
        default:
            /* SCAN commands */
1265
            {
1266
                uint8_t tmpbuf[FD_SECTOR_LEN];
1267
                int ret;
B
bellard 已提交
1268
                DMA_read_memory (nchan, tmpbuf, fdctrl->data_pos, len);
1269
                ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
B
bellard 已提交
1270
                if (ret == 0) {
B
blueswir1 已提交
1271
                    status2 = FD_SR2_SEH;
B
bellard 已提交
1272 1273
                    goto end_transfer;
                }
1274 1275
                if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
                    (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
B
bellard 已提交
1276 1277 1278 1279
                    status2 = 0x00;
                    goto end_transfer;
                }
            }
1280
            break;
B
bellard 已提交
1281
        }
1282 1283
        fdctrl->data_pos += len;
        rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1284
        if (rel_pos == 0) {
B
bellard 已提交
1285
            /* Seek to next sector */
B
blueswir1 已提交
1286 1287
            if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv))
                break;
B
bellard 已提交
1288 1289
        }
    }
1290
 end_transfer:
1291 1292
    len = fdctrl->data_pos - start_pos;
    FLOPPY_DPRINTF("end transfer %d %d %d\n",
1293
                   fdctrl->data_pos, len, fdctrl->data_len);
1294 1295 1296
    if (fdctrl->data_dir == FD_DIR_SCANE ||
        fdctrl->data_dir == FD_DIR_SCANL ||
        fdctrl->data_dir == FD_DIR_SCANH)
B
blueswir1 已提交
1297
        status2 = FD_SR2_SEH;
1298
    if (FD_DID_SEEK(fdctrl->data_state))
1299
        status0 |= FD_SR0_SEEK;
1300
    fdctrl->data_len -= len;
1301
    fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1302
 transfer_error:
B
bellard 已提交
1303

1304
    return len;
B
bellard 已提交
1305 1306 1307
}

/* Data register : 0x05 */
B
Blue Swirl 已提交
1308
static uint32_t fdctrl_read_data(FDCtrl *fdctrl)
B
bellard 已提交
1309
{
B
Blue Swirl 已提交
1310
    FDrive *cur_drv;
B
bellard 已提交
1311
    uint32_t retval = 0;
B
blueswir1 已提交
1312
    int pos;
B
bellard 已提交
1313

1314
    cur_drv = get_cur_drv(fdctrl);
B
blueswir1 已提交
1315 1316 1317
    fdctrl->dsr &= ~FD_DSR_PWRDOWN;
    if (!(fdctrl->msr & FD_MSR_RQM) || !(fdctrl->msr & FD_MSR_DIO)) {
        FLOPPY_ERROR("controller not ready for reading\n");
B
bellard 已提交
1318 1319
        return 0;
    }
1320
    pos = fdctrl->data_pos;
B
blueswir1 已提交
1321
    if (fdctrl->msr & FD_MSR_NONDMA) {
B
bellard 已提交
1322 1323
        pos %= FD_SECTOR_LEN;
        if (pos == 0) {
B
blueswir1 已提交
1324 1325 1326 1327 1328 1329
            if (fdctrl->data_pos != 0)
                if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
                    FLOPPY_DPRINTF("error seeking to next sector %d\n",
                                   fd_sector(cur_drv));
                    return 0;
                }
B
blueswir1 已提交
1330 1331 1332 1333 1334 1335
            if (bdrv_read(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
                FLOPPY_DPRINTF("error getting sector %d\n",
                               fd_sector(cur_drv));
                /* Sure, image size is too small... */
                memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
            }
B
bellard 已提交
1336 1337
        }
    }
1338 1339 1340
    retval = fdctrl->fifo[pos];
    if (++fdctrl->data_pos == fdctrl->data_len) {
        fdctrl->data_pos = 0;
1341
        /* Switch from transfer mode to status mode
B
bellard 已提交
1342 1343
         * then from status mode to command mode
         */
B
blueswir1 已提交
1344
        if (fdctrl->msr & FD_MSR_NONDMA) {
1345
            fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1346
        } else {
1347
            fdctrl_reset_fifo(fdctrl);
1348 1349
            fdctrl_reset_irq(fdctrl);
        }
B
bellard 已提交
1350 1351 1352 1353 1354 1355
    }
    FLOPPY_DPRINTF("data register: 0x%02x\n", retval);

    return retval;
}

B
Blue Swirl 已提交
1356
static void fdctrl_format_sector(FDCtrl *fdctrl)
B
bellard 已提交
1357
{
B
Blue Swirl 已提交
1358
    FDrive *cur_drv;
1359
    uint8_t kh, kt, ks;
B
bellard 已提交
1360

B
blueswir1 已提交
1361
    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1362 1363 1364 1365 1366
    cur_drv = get_cur_drv(fdctrl);
    kt = fdctrl->fifo[6];
    kh = fdctrl->fifo[7];
    ks = fdctrl->fifo[8];
    FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
B
blueswir1 已提交
1367
                   GET_CUR_DRV(fdctrl), kh, kt, ks,
1368 1369
                   fd_sector_calc(kh, kt, ks, cur_drv->last_sect,
                                  NUM_SIDES(cur_drv)));
1370
    switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1371 1372
    case 2:
        /* sect too big */
1373
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1374 1375 1376 1377 1378 1379
        fdctrl->fifo[3] = kt;
        fdctrl->fifo[4] = kh;
        fdctrl->fifo[5] = ks;
        return;
    case 3:
        /* track too big */
B
blueswir1 已提交
1380
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1381 1382 1383 1384 1385 1386
        fdctrl->fifo[3] = kt;
        fdctrl->fifo[4] = kh;
        fdctrl->fifo[5] = ks;
        return;
    case 4:
        /* No seek enabled */
1387
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400
        fdctrl->fifo[3] = kt;
        fdctrl->fifo[4] = kh;
        fdctrl->fifo[5] = ks;
        return;
    case 1:
        fdctrl->data_state |= FD_STATE_SEEK;
        break;
    default:
        break;
    }
    memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
    if (cur_drv->bs == NULL ||
        bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
T
ths 已提交
1401
        FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1402
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1403
    } else {
1404 1405 1406 1407
        if (cur_drv->sect == cur_drv->last_sect) {
            fdctrl->data_state &= ~FD_STATE_FORMAT;
            /* Last sector done */
            if (FD_DID_SEEK(fdctrl->data_state))
1408
                fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1409 1410 1411 1412 1413 1414 1415
            else
                fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
        } else {
            /* More to do */
            fdctrl->data_pos = 0;
            fdctrl->data_len = 4;
        }
1416 1417 1418
    }
}

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static void fdctrl_handle_lock(FDCtrl *fdctrl, int direction)
1420 1421 1422
{
    fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
    fdctrl->fifo[0] = fdctrl->lock << 4;
1423
    fdctrl_set_fifo(fdctrl, 1, 0);
1424 1425
}

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static void fdctrl_handle_dumpreg(FDCtrl *fdctrl, int direction)
1427
{
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    FDrive *cur_drv = get_cur_drv(fdctrl);
1429 1430 1431 1432

    /* Drives position */
    fdctrl->fifo[0] = drv0(fdctrl)->track;
    fdctrl->fifo[1] = drv1(fdctrl)->track;
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#if MAX_FD == 4
    fdctrl->fifo[2] = drv2(fdctrl)->track;
    fdctrl->fifo[3] = drv3(fdctrl)->track;
#else
1437 1438
    fdctrl->fifo[2] = 0;
    fdctrl->fifo[3] = 0;
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#endif
1440 1441
    /* timers */
    fdctrl->fifo[4] = fdctrl->timer0;
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    fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0);
1443 1444 1445 1446 1447 1448 1449 1450
    fdctrl->fifo[6] = cur_drv->last_sect;
    fdctrl->fifo[7] = (fdctrl->lock << 7) |
        (cur_drv->perpendicular << 2);
    fdctrl->fifo[8] = fdctrl->config;
    fdctrl->fifo[9] = fdctrl->precomp_trk;
    fdctrl_set_fifo(fdctrl, 10, 0);
}

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static void fdctrl_handle_version(FDCtrl *fdctrl, int direction)
1452 1453 1454
{
    /* Controller's version */
    fdctrl->fifo[0] = fdctrl->version;
1455
    fdctrl_set_fifo(fdctrl, 1, 0);
1456 1457
}

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static void fdctrl_handle_partid(FDCtrl *fdctrl, int direction)
1459 1460 1461 1462 1463
{
    fdctrl->fifo[0] = 0x41; /* Stepping 1 */
    fdctrl_set_fifo(fdctrl, 1, 0);
}

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static void fdctrl_handle_restore(FDCtrl *fdctrl, int direction)
1465
{
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    FDrive *cur_drv = get_cur_drv(fdctrl);
1467 1468 1469 1470

    /* Drives position */
    drv0(fdctrl)->track = fdctrl->fifo[3];
    drv1(fdctrl)->track = fdctrl->fifo[4];
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#if MAX_FD == 4
    drv2(fdctrl)->track = fdctrl->fifo[5];
    drv3(fdctrl)->track = fdctrl->fifo[6];
#endif
1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486
    /* timers */
    fdctrl->timer0 = fdctrl->fifo[7];
    fdctrl->timer1 = fdctrl->fifo[8];
    cur_drv->last_sect = fdctrl->fifo[9];
    fdctrl->lock = fdctrl->fifo[10] >> 7;
    cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
    fdctrl->config = fdctrl->fifo[11];
    fdctrl->precomp_trk = fdctrl->fifo[12];
    fdctrl->pwrd = fdctrl->fifo[13];
    fdctrl_reset_fifo(fdctrl);
}

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static void fdctrl_handle_save(FDCtrl *fdctrl, int direction)
1488
{
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    FDrive *cur_drv = get_cur_drv(fdctrl);
1490 1491 1492 1493 1494 1495

    fdctrl->fifo[0] = 0;
    fdctrl->fifo[1] = 0;
    /* Drives position */
    fdctrl->fifo[2] = drv0(fdctrl)->track;
    fdctrl->fifo[3] = drv1(fdctrl)->track;
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#if MAX_FD == 4
    fdctrl->fifo[4] = drv2(fdctrl)->track;
    fdctrl->fifo[5] = drv3(fdctrl)->track;
#else
1500 1501
    fdctrl->fifo[4] = 0;
    fdctrl->fifo[5] = 0;
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#endif
1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513
    /* timers */
    fdctrl->fifo[6] = fdctrl->timer0;
    fdctrl->fifo[7] = fdctrl->timer1;
    fdctrl->fifo[8] = cur_drv->last_sect;
    fdctrl->fifo[9] = (fdctrl->lock << 7) |
        (cur_drv->perpendicular << 2);
    fdctrl->fifo[10] = fdctrl->config;
    fdctrl->fifo[11] = fdctrl->precomp_trk;
    fdctrl->fifo[12] = fdctrl->pwrd;
    fdctrl->fifo[13] = 0;
    fdctrl->fifo[14] = 0;
1514
    fdctrl_set_fifo(fdctrl, 15, 0);
1515 1516
}

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static void fdctrl_handle_readid(FDCtrl *fdctrl, int direction)
1518
{
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    FDrive *cur_drv = get_cur_drv(fdctrl);
1520 1521 1522

    cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
    qemu_mod_timer(fdctrl->result_timer,
1523
                   qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 50));
1524 1525
}

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static void fdctrl_handle_format_track(FDCtrl *fdctrl, int direction)
1527
{
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    FDrive *cur_drv;
1529

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    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554
    cur_drv = get_cur_drv(fdctrl);
    fdctrl->data_state |= FD_STATE_FORMAT;
    if (fdctrl->fifo[0] & 0x80)
        fdctrl->data_state |= FD_STATE_MULTI;
    else
        fdctrl->data_state &= ~FD_STATE_MULTI;
    fdctrl->data_state &= ~FD_STATE_SEEK;
    cur_drv->bps =
        fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
#if 0
    cur_drv->last_sect =
        cur_drv->flags & FDISK_DBL_SIDES ? fdctrl->fifo[3] :
        fdctrl->fifo[3] / 2;
#else
    cur_drv->last_sect = fdctrl->fifo[3];
#endif
    /* TODO: implement format using DMA expected by the Bochs BIOS
     * and Linux fdformat (read 3 bytes per sector via DMA and fill
     * the sector with the specified fill byte
     */
    fdctrl->data_state &= ~FD_STATE_FORMAT;
    fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
}

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static void fdctrl_handle_specify(FDCtrl *fdctrl, int direction)
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{
    fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
    fdctrl->timer1 = fdctrl->fifo[2] >> 1;
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    if (fdctrl->fifo[2] & 1)
        fdctrl->dor &= ~FD_DOR_DMAEN;
    else
        fdctrl->dor |= FD_DOR_DMAEN;
1563 1564 1565 1566
    /* No result back */
    fdctrl_reset_fifo(fdctrl);
}

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static void fdctrl_handle_sense_drive_status(FDCtrl *fdctrl, int direction)
1568
{
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    FDrive *cur_drv;
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    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1572 1573 1574 1575 1576 1577
    cur_drv = get_cur_drv(fdctrl);
    cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
    /* 1 Byte status back */
    fdctrl->fifo[0] = (cur_drv->ro << 6) |
        (cur_drv->track == 0 ? 0x10 : 0x00) |
        (cur_drv->head << 2) |
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        GET_CUR_DRV(fdctrl) |
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        0x28;
    fdctrl_set_fifo(fdctrl, 1, 0);
}

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static void fdctrl_handle_recalibrate(FDCtrl *fdctrl, int direction)
1584
{
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    FDrive *cur_drv;
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    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1588 1589 1590 1591 1592 1593 1594
    cur_drv = get_cur_drv(fdctrl);
    fd_recalibrate(cur_drv);
    fdctrl_reset_fifo(fdctrl);
    /* Raise Interrupt */
    fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
}

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static void fdctrl_handle_sense_interrupt_status(FDCtrl *fdctrl, int direction)
1596
{
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    FDrive *cur_drv = get_cur_drv(fdctrl);
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1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610
    if(fdctrl->reset_sensei > 0) {
        fdctrl->fifo[0] =
            FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei;
        fdctrl->reset_sensei--;
    } else {
        /* XXX: status0 handling is broken for read/write
           commands, so we do this hack. It should be suppressed
           ASAP */
        fdctrl->fifo[0] =
            FD_SR0_SEEK | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
    }

1611 1612 1613
    fdctrl->fifo[1] = cur_drv->track;
    fdctrl_set_fifo(fdctrl, 2, 0);
    fdctrl_reset_irq(fdctrl);
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    fdctrl->status0 = FD_SR0_RDYCHG;
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}

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static void fdctrl_handle_seek(FDCtrl *fdctrl, int direction)
1618
{
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    FDrive *cur_drv;
1620

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    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1622 1623
    cur_drv = get_cur_drv(fdctrl);
    fdctrl_reset_fifo(fdctrl);
1624 1625 1626
    /* The seek command just sends step pulses to the drive and doesn't care if
     * there is a medium inserted of if it's banging the head against the drive.
     */
1627
    if (fdctrl->fifo[2] > cur_drv->max_track) {
1628
        cur_drv->track = cur_drv->max_track;
1629 1630 1631
    } else {
        cur_drv->track = fdctrl->fifo[2];
    }
1632 1633
    /* Raise Interrupt */
    fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1634 1635
}

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static void fdctrl_handle_perpendicular_mode(FDCtrl *fdctrl, int direction)
1637
{
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    FDrive *cur_drv = get_cur_drv(fdctrl);
1639 1640 1641 1642

    if (fdctrl->fifo[1] & 0x80)
        cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
    /* No result back */
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    fdctrl_reset_fifo(fdctrl);
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}

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static void fdctrl_handle_configure(FDCtrl *fdctrl, int direction)
1647 1648 1649 1650 1651 1652 1653
{
    fdctrl->config = fdctrl->fifo[2];
    fdctrl->precomp_trk =  fdctrl->fifo[3];
    /* No result back */
    fdctrl_reset_fifo(fdctrl);
}

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static void fdctrl_handle_powerdown_mode(FDCtrl *fdctrl, int direction)
1655 1656 1657
{
    fdctrl->pwrd = fdctrl->fifo[1];
    fdctrl->fifo[0] = fdctrl->fifo[1];
1658
    fdctrl_set_fifo(fdctrl, 1, 0);
1659 1660
}

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static void fdctrl_handle_option(FDCtrl *fdctrl, int direction)
1662 1663 1664 1665 1666
{
    /* No result back */
    fdctrl_reset_fifo(fdctrl);
}

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static void fdctrl_handle_drive_specification_command(FDCtrl *fdctrl, int direction)
1668
{
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    FDrive *cur_drv = get_cur_drv(fdctrl);
1670 1671 1672 1673 1674 1675 1676

    if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80) {
        /* Command parameters done */
        if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
            fdctrl->fifo[0] = fdctrl->fifo[1];
            fdctrl->fifo[2] = 0;
            fdctrl->fifo[3] = 0;
1677
            fdctrl_set_fifo(fdctrl, 4, 0);
1678 1679 1680 1681 1682 1683
        } else {
            fdctrl_reset_fifo(fdctrl);
        }
    } else if (fdctrl->data_len > 7) {
        /* ERROR */
        fdctrl->fifo[0] = 0x80 |
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            (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1685
        fdctrl_set_fifo(fdctrl, 1, 0);
1686 1687 1688
    }
}

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static void fdctrl_handle_relative_seek_out(FDCtrl *fdctrl, int direction)
1690
{
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    FDrive *cur_drv;
1692

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    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1694 1695 1696 1697 1698 1699 1700
    cur_drv = get_cur_drv(fdctrl);
    if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
        cur_drv->track = cur_drv->max_track - 1;
    } else {
        cur_drv->track += fdctrl->fifo[2];
    }
    fdctrl_reset_fifo(fdctrl);
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    /* Raise Interrupt */
1702 1703 1704
    fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
}

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static void fdctrl_handle_relative_seek_in(FDCtrl *fdctrl, int direction)
1706
{
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    FDrive *cur_drv;
1708

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    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720
    cur_drv = get_cur_drv(fdctrl);
    if (fdctrl->fifo[2] > cur_drv->track) {
        cur_drv->track = 0;
    } else {
        cur_drv->track -= fdctrl->fifo[2];
    }
    fdctrl_reset_fifo(fdctrl);
    /* Raise Interrupt */
    fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
}

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static const struct {
    uint8_t value;
    uint8_t mask;
    const char* name;
    int parameters;
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    void (*handler)(FDCtrl *fdctrl, int direction);
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    int direction;
} handlers[] = {
    { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
    { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
    { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
    { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
    { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
    { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
    { FD_CMD_READ_TRACK, 0xbf, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
    { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
    { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
    { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
    { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
    { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_unimplemented },
    { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
    { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
    { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
    { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
    { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
    { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
    { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
    { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
    { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
    { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
    { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command },
    { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
    { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
    { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
    { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
    { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
    { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
    { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
    { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
    { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
};
/* Associate command to an index in the 'handlers' array */
static uint8_t command_to_handler[256];

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static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value)
1766
{
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    FDrive *cur_drv;
1768
    int pos;
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    /* Reset mode */
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    if (!(fdctrl->dor & FD_DOR_nRESET)) {
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        FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
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        return;
    }
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    if (!(fdctrl->msr & FD_MSR_RQM) || (fdctrl->msr & FD_MSR_DIO)) {
        FLOPPY_ERROR("controller not ready for writing\n");
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        return;
    }
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    fdctrl->dsr &= ~FD_DSR_PWRDOWN;
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    /* Is it write command time ? */
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    if (fdctrl->msr & FD_MSR_NONDMA) {
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        /* FIFO data write */
1783 1784 1785 1786
        pos = fdctrl->data_pos++;
        pos %= FD_SECTOR_LEN;
        fdctrl->fifo[pos] = value;
        if (pos == FD_SECTOR_LEN - 1 ||
1787
            fdctrl->data_pos == fdctrl->data_len) {
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            cur_drv = get_cur_drv(fdctrl);
            if (bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
                FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
                return;
            }
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            if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
                FLOPPY_DPRINTF("error seeking to next sector %d\n",
                               fd_sector(cur_drv));
                return;
            }
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        }
1799
        /* Switch from transfer mode to status mode
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         * then from status mode to command mode
         */
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        if (fdctrl->data_pos == fdctrl->data_len)
1803
            fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
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        return;
    }
1806
    if (fdctrl->data_pos == 0) {
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        /* Command */
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        pos = command_to_handler[value & 0xff];
        FLOPPY_DPRINTF("%s command\n", handlers[pos].name);
        fdctrl->data_len = handlers[pos].parameters + 1;
1811
        fdctrl->msr |= FD_MSR_CMDBUSY;
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    }
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1814
    FLOPPY_DPRINTF("%s: %02x\n", __func__, value);
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    fdctrl->fifo[fdctrl->data_pos++] = value;
    if (fdctrl->data_pos == fdctrl->data_len) {
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        /* We now have all parameters
         * and will be able to treat the command
         */
1820 1821
        if (fdctrl->data_state & FD_STATE_FORMAT) {
            fdctrl_format_sector(fdctrl);
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1822 1823
            return;
        }
1824

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1825 1826 1827
        pos = command_to_handler[fdctrl->fifo[0] & 0xff];
        FLOPPY_DPRINTF("treat %s command\n", handlers[pos].name);
        (*handlers[pos].handler)(fdctrl, handlers[pos].direction);
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1828 1829
    }
}
1830 1831 1832

static void fdctrl_result_timer(void *opaque)
{
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1833 1834
    FDCtrl *fdctrl = opaque;
    FDrive *cur_drv = get_cur_drv(fdctrl);
1835

1836 1837 1838 1839 1840 1841 1842
    /* Pretend we are spinning.
     * This is needed for Coherent, which uses READ ID to check for
     * sector interleaving.
     */
    if (cur_drv->last_sect != 0) {
        cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
    }
1843 1844 1845 1846 1847 1848 1849 1850 1851
    /* READ_ID can't automatically succeed! */
    if (fdctrl->check_media_rate &&
        (fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
        FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
                       fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
    } else {
        fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
    }
1852
}
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1854
static void fdctrl_change_cb(void *opaque, bool load)
1855 1856 1857 1858 1859 1860 1861 1862 1863 1864
{
    FDrive *drive = opaque;

    drive->media_changed = 1;
}

static const BlockDevOps fdctrl_block_ops = {
    .change_media_cb = fdctrl_change_cb,
};

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/* Init functions */
1866
static int fdctrl_connect_drives(FDCtrl *fdctrl)
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{
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    unsigned int i;
1869
    FDrive *drive;
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1870 1871

    for (i = 0; i < MAX_FD; i++) {
1872
        drive = &fdctrl->drives[i];
1873
        drive->fdctrl = fdctrl;
1874

1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885
        if (drive->bs) {
            if (bdrv_get_on_error(drive->bs, 0) != BLOCK_ERR_STOP_ENOSPC) {
                error_report("fdc doesn't support drive option werror");
                return -1;
            }
            if (bdrv_get_on_error(drive->bs, 1) != BLOCK_ERR_REPORT) {
                error_report("fdc doesn't support drive option rerror");
                return -1;
            }
        }

1886 1887 1888
        fd_init(drive);
        fd_revalidate(drive);
        if (drive->bs) {
1889 1890
            drive->media_changed = 1;
            bdrv_set_dev_ops(drive->bs, &fdctrl_block_ops, drive);
1891
        }
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    }
1893
    return 0;
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1894 1895
}

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void fdctrl_init_sysbus(qemu_irq irq, int dma_chann,
                        target_phys_addr_t mmio_base, DriveInfo **fds)
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1898
{
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1899
    FDCtrl *fdctrl;
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    DeviceState *dev;
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1901
    FDCtrlSysBus *sys;
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1902 1903

    dev = qdev_create(NULL, "sysbus-fdc");
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    sys = DO_UPCAST(FDCtrlSysBus, busdev.qdev, dev);
1905 1906
    fdctrl = &sys->state;
    fdctrl->dma_chann = dma_chann; /* FIXME */
1907
    if (fds[0]) {
1908
        qdev_prop_set_drive_nofail(dev, "driveA", fds[0]->bdrv);
1909 1910
    }
    if (fds[1]) {
1911
        qdev_prop_set_drive_nofail(dev, "driveB", fds[1]->bdrv);
1912
    }
M
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    qdev_init_nofail(dev);
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    sysbus_connect_irq(&sys->busdev, 0, irq);
    sysbus_mmio_map(&sys->busdev, 0, mmio_base);
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}

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void sun4m_fdctrl_init(qemu_irq irq, target_phys_addr_t io_base,
                       DriveInfo **fds, qemu_irq *fdc_tc)
B
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{
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1921
    DeviceState *dev;
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1922
    FDCtrlSysBus *sys;
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1923

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1924
    dev = qdev_create(NULL, "SUNW,fdtwo");
1925
    if (fds[0]) {
1926
        qdev_prop_set_drive_nofail(dev, "drive", fds[0]->bdrv);
1927
    }
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1928
    qdev_init_nofail(dev);
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1929
    sys = DO_UPCAST(FDCtrlSysBus, busdev.qdev, dev);
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1930 1931
    sysbus_connect_irq(&sys->busdev, 0, irq);
    sysbus_mmio_map(&sys->busdev, 0, io_base);
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    *fdc_tc = qdev_get_gpio_in(dev, 0);
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}
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1934

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1935
static int fdctrl_init_common(FDCtrl *fdctrl)
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{
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1937 1938
    int i, j;
    static int command_tables_inited = 0;
B
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1939

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1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953
    /* Fill 'command_to_handler' lookup table */
    if (!command_tables_inited) {
        command_tables_inited = 1;
        for (i = ARRAY_SIZE(handlers) - 1; i >= 0; i--) {
            for (j = 0; j < sizeof(command_to_handler); j++) {
                if ((j & handlers[i].mask) == handlers[i].value) {
                    command_to_handler[j] = i;
                }
            }
        }
    }

    FLOPPY_DPRINTF("init controller\n");
    fdctrl->fifo = qemu_memalign(512, FD_SECTOR_LEN);
J
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1954
    fdctrl->fifo_size = 512;
1955
    fdctrl->result_timer = qemu_new_timer_ns(vm_clock,
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1956 1957 1958 1959
                                          fdctrl_result_timer, fdctrl);

    fdctrl->version = 0x90; /* Intel 82078 controller */
    fdctrl->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
J
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1960
    fdctrl->num_floppies = MAX_FD;
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1962 1963
    if (fdctrl->dma_chann != -1)
        DMA_register_channel(fdctrl->dma_chann, &fdctrl_transfer_handler, fdctrl);
1964
    return fdctrl_connect_drives(fdctrl);
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}

1967
static const MemoryRegionPortio fdc_portio_list[] = {
1968
    { 1, 5, 1, .read = fdctrl_read, .write = fdctrl_write },
1969 1970
    { 7, 1, 1, .read = fdctrl_read, .write = fdctrl_write },
    PORTIO_END_OF_LIST(),
1971 1972
};

1973
static int isabus_fdc_init1(ISADevice *dev)
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{
B
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    FDCtrlISABus *isa = DO_UPCAST(FDCtrlISABus, busdev, dev);
    FDCtrl *fdctrl = &isa->state;
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    int ret;
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1979
    isa_register_portio_list(dev, isa->iobase, fdc_portio_list, fdctrl, "fdc");
1980

1981 1982
    isa_init_irq(&isa->busdev, &fdctrl->irq, isa->irq);
    fdctrl->dma_chann = isa->dma;
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1984
    qdev_set_legacy_instance_id(&dev->qdev, isa->iobase, 2);
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1985
    ret = fdctrl_init_common(fdctrl);
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1987 1988 1989
    add_boot_device_path(isa->bootindexA, &dev->qdev, "/floppy@0");
    add_boot_device_path(isa->bootindexB, &dev->qdev, "/floppy@1");

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    return ret;
G
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1991 1992
}

1993
static int sysbus_fdc_init1(SysBusDevice *dev)
B
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1994
{
B
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1995 1996
    FDCtrlSysBus *sys = DO_UPCAST(FDCtrlSysBus, busdev, dev);
    FDCtrl *fdctrl = &sys->state;
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    int ret;
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1998

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    memory_region_init_io(&fdctrl->iomem, &fdctrl_mem_ops, fdctrl, "fdc", 0x08);
2000
    sysbus_init_mmio(dev, &fdctrl->iomem);
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    sysbus_init_irq(dev, &fdctrl->irq);
    qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
2003
    fdctrl->dma_chann = -1;
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2004

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2005
    qdev_set_legacy_instance_id(&dev->qdev, 0 /* io */, 2); /* FIXME */
J
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2006
    ret = fdctrl_init_common(fdctrl);
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    return ret;
B
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2009 2010
}

2011
static int sun4m_fdc_init1(SysBusDevice *dev)
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2012
{
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    FDCtrl *fdctrl = &(FROM_SYSBUS(FDCtrlSysBus, dev)->state);
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A
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    memory_region_init_io(&fdctrl->iomem, &fdctrl_mem_strict_ops, fdctrl,
                          "fdctrl", 0x08);
2017
    sysbus_init_mmio(dev, &fdctrl->iomem);
G
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2018 2019 2020 2021
    sysbus_init_irq(dev, &fdctrl->irq);
    qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);

    fdctrl->sun4m = 1;
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2022
    qdev_set_legacy_instance_id(&dev->qdev, 0 /* io */, 2); /* FIXME */
J
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2023
    return fdctrl_init_common(fdctrl);
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2024
}
B
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2025

K
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2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037
void fdc_get_bs(BlockDriverState *bs[], ISADevice *dev)
{
    FDCtrlISABus *isa = DO_UPCAST(FDCtrlISABus, busdev, dev);
    FDCtrl *fdctrl = &isa->state;
    int i;

    for (i = 0; i < MAX_FD; i++) {
        bs[i] = fdctrl->drives[i].bs;
    }
}


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2038 2039 2040 2041 2042 2043 2044 2045 2046 2047
static const VMStateDescription vmstate_isa_fdc ={
    .name = "fdc",
    .version_id = 2,
    .minimum_version_id = 2,
    .fields = (VMStateField []) {
        VMSTATE_STRUCT(state, FDCtrlISABus, 0, vmstate_fdc, FDCtrl),
        VMSTATE_END_OF_LIST()
    }
};

2048
static Property isa_fdc_properties[] = {
2049 2050 2051
    DEFINE_PROP_HEX32("iobase", FDCtrlISABus, iobase, 0x3f0),
    DEFINE_PROP_UINT32("irq", FDCtrlISABus, irq, 6),
    DEFINE_PROP_UINT32("dma", FDCtrlISABus, dma, 2),
2052 2053 2054 2055
    DEFINE_PROP_DRIVE("driveA", FDCtrlISABus, state.drives[0].bs),
    DEFINE_PROP_DRIVE("driveB", FDCtrlISABus, state.drives[1].bs),
    DEFINE_PROP_INT32("bootindexA", FDCtrlISABus, bootindexA, -1),
    DEFINE_PROP_INT32("bootindexB", FDCtrlISABus, bootindexB, -1),
2056 2057
    DEFINE_PROP_BIT("check_media_rate", FDCtrlISABus, state.check_media_rate,
                    0, true),
2058 2059 2060
    DEFINE_PROP_END_OF_LIST(),
};

2061 2062
static void isabus_fdc_class_init1(ObjectClass *klass, void *data)
{
2063
    DeviceClass *dc = DEVICE_CLASS(klass);
2064 2065
    ISADeviceClass *ic = ISA_DEVICE_CLASS(klass);
    ic->init = isabus_fdc_init1;
2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077
    dc->fw_name = "fdc";
    dc->no_user = 1;
    dc->reset = fdctrl_external_reset_isa;
    dc->vmsd = &vmstate_isa_fdc;
    dc->props = isa_fdc_properties;
}

static TypeInfo isa_fdc_info = {
    .name          = "isa-fdc",
    .parent        = TYPE_ISA_DEVICE,
    .instance_size = sizeof(FDCtrlISABus),
    .class_init    = isabus_fdc_class_init1,
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2078 2079
};

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2080 2081 2082 2083 2084 2085 2086 2087 2088 2089
static const VMStateDescription vmstate_sysbus_fdc ={
    .name = "fdc",
    .version_id = 2,
    .minimum_version_id = 2,
    .fields = (VMStateField []) {
        VMSTATE_STRUCT(state, FDCtrlSysBus, 0, vmstate_fdc, FDCtrl),
        VMSTATE_END_OF_LIST()
    }
};

2090 2091 2092 2093
static Property sysbus_fdc_properties[] = {
    DEFINE_PROP_DRIVE("driveA", FDCtrlSysBus, state.drives[0].bs),
    DEFINE_PROP_DRIVE("driveB", FDCtrlSysBus, state.drives[1].bs),
    DEFINE_PROP_END_OF_LIST(),
B
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2094 2095
};

2096 2097
static void sysbus_fdc_class_init(ObjectClass *klass, void *data)
{
2098
    DeviceClass *dc = DEVICE_CLASS(klass);
2099 2100 2101
    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);

    k->init = sysbus_fdc_init1;
2102 2103 2104
    dc->reset = fdctrl_external_reset_sysbus;
    dc->vmsd = &vmstate_sysbus_fdc;
    dc->props = sysbus_fdc_properties;
2105 2106
}

2107 2108 2109 2110 2111
static TypeInfo sysbus_fdc_info = {
    .name          = "sysbus-fdc",
    .parent        = TYPE_SYS_BUS_DEVICE,
    .instance_size = sizeof(FDCtrlSysBus),
    .class_init    = sysbus_fdc_class_init,
2112 2113 2114 2115 2116 2117 2118 2119 2120
};

static Property sun4m_fdc_properties[] = {
    DEFINE_PROP_DRIVE("drive", FDCtrlSysBus, state.drives[0].bs),
    DEFINE_PROP_END_OF_LIST(),
};

static void sun4m_fdc_class_init(ObjectClass *klass, void *data)
{
2121
    DeviceClass *dc = DEVICE_CLASS(klass);
2122 2123 2124
    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);

    k->init = sun4m_fdc_init1;
2125 2126 2127
    dc->reset = fdctrl_external_reset_sysbus;
    dc->vmsd = &vmstate_sysbus_fdc;
    dc->props = sun4m_fdc_properties;
2128 2129
}

2130 2131 2132 2133 2134
static TypeInfo sun4m_fdc_info = {
    .name          = "SUNW,fdtwo",
    .parent        = TYPE_SYS_BUS_DEVICE,
    .instance_size = sizeof(FDCtrlSysBus),
    .class_init    = sun4m_fdc_class_init,
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2135 2136
};

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Andreas Färber 已提交
2137
static void fdc_register_types(void)
B
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2138
{
2139 2140 2141
    type_register_static(&isa_fdc_info);
    type_register_static(&sysbus_fdc_info);
    type_register_static(&sun4m_fdc_info);
B
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2142 2143
}

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2144
type_init(fdc_register_types)