- 17 6月, 2012 1 次提交
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由 Andrew Lunn 提交于
When the ethernet driver was built as a module, it would lock the machine when loaded. At boot the ethernet clks are unused, so get turned off. Later, when the module is loaded, the probe function would access the hardware before the clock was restarted, and the machine would lock. It has also been determined that when the clk is turned off, the interface forgets its MAC address, which for most systems, is set by the boot loader. When the machine setup file creates a platform device for the interface, prepare and enable the clock for the interface. This will ensure it is not turned off. However, if the setup file only instantiates one platform device, the other will have its clk disabled, thus maybe saving a little power. Report-by: NSimon Baatz <gmbnomis@gmail.com> Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NSimon Baatz <gmbnomis@gmail.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 15 5月, 2012 1 次提交
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由 Jamie Lentin 提交于
Add default configuration for NAND, to be enabled in your board config. Ensure clock gating is set appropriately when the NAND is enabled. Acked-by: NJason Cooper <jason@lakedaemon.net> Signed-off-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 09 5月, 2012 14 次提交
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由 Andrew Lunn 提交于
Add a varient of the basic clk-gate code. This variant calls a function before gating the clock off. This function is used to disable the SATA or PCIe PHY. Now that all the drivers prepare and enable there clk as needed, there is no need for the common code to keep track of which clocks need gating on. Let the common clock framework turn off clocks which are not used. Buy using the added clk varient, when the clk framework turns off SATA or PCIe clocks, we also disabled SATA and PCIe PHYs which were not needed. The function kirkwood_pcie_id() can now be called outside of __init code, so remove this property for it, and functions it calls. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Prepare and enable the clocks when the board indicates the pcie buses will be used. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Some orion platforms can gate the XOR driver clock. If the clock exisits, unable/disable it as appropriate. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Some orion platforms support gating of the clock. If the clock exists enable/disbale it as appropriate. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Some orion devices can gate the SDIO clock. If the clock exists, enable/disable it as appropriate. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Not all orion platforms can gate the clock, but if it does exist, enable/disable it as appropriate. v2: Fix the name of the clkdev entry. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Not all platforms support gating the clock, so it is not an error if the clock does not exist. However, if it does exist, we should enable/disable it as appropriate. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
The Orion kirkwood chips have a gatable clock per SATA channel. Add code to get and enable this clk if it exists. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Let the machine pass to the platform which clock is used by the uart. Enable the clock and use clk_get_rate() to determine its rate. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Remove tclk from platform data. This makes the platform data structure empty, so remove it. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
The t_clk is moved from the shared part of the ethernet driver into the per port section. Each port can have its own gated clock, which it needs to enable/disable, as oppossed to there being one clock shared by all ports. In practice, only kirkwood supports this at the moment. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Remove now redundant tclk from SPI platform data. This makes the platform data empty, so remove it. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Andrew Lunn 提交于
Add tclk as a fixed rate clock for all platforms. In addition, on kirkwood, add a gated clock for most of the clocks which can be gated. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> [mturquette@linaro.org: removed redundant CLKDEV_LOOKUP from Kconfig] [mturquette@linaro.org: removed redundant clk.h from mach-dove/common.c] Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 16 3月, 2012 3 次提交
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由 Jason Cooper 提交于
Signed-off-by: NJason Cooper <jason@lakedaemon.net> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Jason Cooper 提交于
We need to absorb kirkwood_init() into kirkwood_dt_init() so that as we convert drivers, we can remove the platform call, eg kirkwood_rtc_init(). This maintains compatibility with non-fdt configurations because they still call kirkwood_init() in common.c. As drivers are converted, we will reinstate the 'static' qualifier in common.c. Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Andrew Lunn 提交于
It is not used anywhere in the sound driver. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 10 2月, 2012 1 次提交
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由 Andrew Lunn 提交于
The patch "ARM: orion: Consolidate USB platform setup code.", commit 4fcd3f37 broke USB on TS-7800 and other orion5x boards, because the wrong type of PHY was being passed to the EHCI driver in the platform data. Orion5x needs EHCI_PHY_ORION and all the others want EHCI_PHY_NA. Allow the mach- code to tell the generic plat-orion code which USB PHY enum to place into the platform data. Version 2: Rebase to v3.3-rc2. Reported-by: NAmbroz Bizjak <ambrop7@gmail.com> Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NAmbroz Bizjak <ambrop7@gmail.com> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 05 1月, 2012 1 次提交
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由 Russell King 提交于
Hook these platforms restart code into the new restart hook rather than using arch_reset(). Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 14 12月, 2011 3 次提交
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NMichael Walle <michael@walle.cc> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Move the *_mbus_dram_info structure into the orion platform and call it orion_mbus_dram_info everywhere. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NMichael Walle <michael@walle.cc> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Martin Michlmayr 提交于
Recognize the Kirkwood 6282 revision A1 chip since products using this chip are shipping now, such as the QNAP TS-x19P II devices. Signed-off-by: NMartin Michlmayr <tbm@cyrius.com> Acked-by: NLennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 17 5月, 2011 12 次提交
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
This change removes the interrupt resource. The driver does not use it. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Tested using the test program in Documentation/rtc.txt Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Changing eg 0xffffffff to DMA_BIT_MASK(32) etc allows easier side by side comparision of identical code which can be consolidated. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 04 3月, 2011 3 次提交
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由 Lennert Buytenhek 提交于
This patch makes the various mach dirs that use the plat-orion time code pass in timer and bridge addresses explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Nicolas Pitre 提交于
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Eric Cooper 提交于
Use the machine-specific kexec_reinit hook to make sure PCIe is enabled before starting a new kernel. Signed-off-by: NEric Cooper <ecc@cmu.edu> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 22 10月, 2010 1 次提交
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由 Simon Guinot 提交于
According to the Marvell LSP, the Sample at Reset regiter bit 21 can be used to detect TCLK on 6281 and 6282 devices. This patch has only been tested on LaCie boards. Signed-off-by: NSimon Guinot <sguinot@lacie.com> Acked-by: NLennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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