entry_32.S 42.7 KB
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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 *  Copyright (C) 1991,1992  Linus Torvalds
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 *
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 * entry_32.S contains the system-call and low-level fault and trap handling routines.
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 *
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 * Stack layout while running C code:
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 *	ptrace needs to have all registers on the stack.
 *	If the order here is changed, it needs to be
 *	updated in fork.c:copy_process(), signal.c:do_signal(),
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 *	ptrace.c and ptrace.h
 *
 *	 0(%esp) - %ebx
 *	 4(%esp) - %ecx
 *	 8(%esp) - %edx
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 *	 C(%esp) - %esi
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 *	10(%esp) - %edi
 *	14(%esp) - %ebp
 *	18(%esp) - %eax
 *	1C(%esp) - %ds
 *	20(%esp) - %es
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 *	24(%esp) - %fs
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 *	28(%esp) - %gs		saved iff !CONFIG_X86_32_LAZY_GS
 *	2C(%esp) - orig_eax
 *	30(%esp) - %eip
 *	34(%esp) - %cs
 *	38(%esp) - %eflags
 *	3C(%esp) - %oldesp
 *	40(%esp) - %oldss
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 */

#include <linux/linkage.h>
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#include <linux/err.h>
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#include <asm/thread_info.h>
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#include <asm/irqflags.h>
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#include <asm/errno.h>
#include <asm/segment.h>
#include <asm/smp.h>
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#include <asm/percpu.h>
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#include <asm/processor-flags.h>
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#include <asm/irq_vectors.h>
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#include <asm/cpufeatures.h>
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#include <asm/alternative-asm.h>
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#include <asm/asm.h>
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#include <asm/smap.h>
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#include <asm/frame.h>
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#include <asm/nospec-branch.h>
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#include "calling.h"

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	.section .entry.text, "ax"

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/*
 * We use macros for low-level operations which need to be overridden
 * for paravirtualization.  The following will never clobber any registers:
 *   INTERRUPT_RETURN (aka. "iret")
 *   GET_CR0_INTO_EAX (aka. "movl %cr0, %eax")
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 *   ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit").
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 *
 * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must
 * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY).
 * Allowing a register to be clobbered can shrink the paravirt replacement
 * enough to patch inline, increasing performance.
 */

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#ifdef CONFIG_PREEMPTION
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# define preempt_stop(clobbers)	DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF
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#else
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# define preempt_stop(clobbers)
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#endif

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.macro TRACE_IRQS_IRET
#ifdef CONFIG_TRACE_IRQFLAGS
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	testl	$X86_EFLAGS_IF, PT_EFLAGS(%esp)     # interrupts off?
	jz	1f
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	TRACE_IRQS_ON
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#endif
.endm

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#define PTI_SWITCH_MASK         (1 << PAGE_SHIFT)

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/*
 * User gs save/restore
 *
 * %gs is used for userland TLS and kernel only uses it for stack
 * canary which is required to be at %gs:20 by gcc.  Read the comment
 * at the top of stackprotector.h for more info.
 *
 * Local labels 98 and 99 are used.
 */
#ifdef CONFIG_X86_32_LAZY_GS

 /* unfortunately push/pop can't be no-op */
.macro PUSH_GS
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	pushl	$0
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.endm
.macro POP_GS pop=0
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	addl	$(4 + \pop), %esp
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.endm
.macro POP_GS_EX
.endm

 /* all the rest are no-op */
.macro PTGS_TO_GS
.endm
.macro PTGS_TO_GS_EX
.endm
.macro GS_TO_REG reg
.endm
.macro REG_TO_PTGS reg
.endm
.macro SET_KERNEL_GS reg
.endm

#else	/* CONFIG_X86_32_LAZY_GS */

.macro PUSH_GS
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	pushl	%gs
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.endm

.macro POP_GS pop=0
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98:	popl	%gs
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  .if \pop <> 0
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	add	$\pop, %esp
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  .endif
.endm
.macro POP_GS_EX
.pushsection .fixup, "ax"
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99:	movl	$0, (%esp)
	jmp	98b
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.popsection
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	_ASM_EXTABLE(98b, 99b)
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.endm

.macro PTGS_TO_GS
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98:	mov	PT_GS(%esp), %gs
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.endm
.macro PTGS_TO_GS_EX
.pushsection .fixup, "ax"
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99:	movl	$0, PT_GS(%esp)
	jmp	98b
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.popsection
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	_ASM_EXTABLE(98b, 99b)
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.endm

.macro GS_TO_REG reg
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	movl	%gs, \reg
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.endm
.macro REG_TO_PTGS reg
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	movl	\reg, PT_GS(%esp)
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.endm
.macro SET_KERNEL_GS reg
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	movl	$(__KERNEL_STACK_CANARY), \reg
	movl	\reg, %gs
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.endm

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#endif /* CONFIG_X86_32_LAZY_GS */
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/* Unconditionally switch to user cr3 */
.macro SWITCH_TO_USER_CR3 scratch_reg:req
	ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI

	movl	%cr3, \scratch_reg
	orl	$PTI_SWITCH_MASK, \scratch_reg
	movl	\scratch_reg, %cr3
.Lend_\@:
.endm

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.macro BUG_IF_WRONG_CR3 no_user_check=0
#ifdef CONFIG_DEBUG_ENTRY
	ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
	.if \no_user_check == 0
	/* coming from usermode? */
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	testl	$USER_SEGMENT_RPL_MASK, PT_CS(%esp)
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	jz	.Lend_\@
	.endif
	/* On user-cr3? */
	movl	%cr3, %eax
	testl	$PTI_SWITCH_MASK, %eax
	jnz	.Lend_\@
	/* From userspace with kernel cr3 - BUG */
	ud2
.Lend_\@:
#endif
.endm

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/*
 * Switch to kernel cr3 if not already loaded and return current cr3 in
 * \scratch_reg
 */
.macro SWITCH_TO_KERNEL_CR3 scratch_reg:req
	ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
	movl	%cr3, \scratch_reg
	/* Test if we are already on kernel CR3 */
	testl	$PTI_SWITCH_MASK, \scratch_reg
	jz	.Lend_\@
	andl	$(~PTI_SWITCH_MASK), \scratch_reg
	movl	\scratch_reg, %cr3
	/* Return original CR3 in \scratch_reg */
	orl	$PTI_SWITCH_MASK, \scratch_reg
.Lend_\@:
.endm

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#define CS_FROM_ENTRY_STACK	(1 << 31)
#define CS_FROM_USER_CR3	(1 << 30)
#define CS_FROM_KERNEL		(1 << 29)
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#define CS_FROM_ESPFIX		(1 << 28)
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.macro FIXUP_FRAME
	/*
	 * The high bits of the CS dword (__csh) are used for CS_FROM_*.
	 * Clear them in case hardware didn't do this for us.
	 */
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	andl	$0x0000ffff, 4*4(%esp)
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#ifdef CONFIG_VM86
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	testl	$X86_EFLAGS_VM, 5*4(%esp)
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	jnz	.Lfrom_usermode_no_fixup_\@
#endif
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	testl	$USER_SEGMENT_RPL_MASK, 4*4(%esp)
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	jnz	.Lfrom_usermode_no_fixup_\@

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	orl	$CS_FROM_KERNEL, 4*4(%esp)
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	/*
	 * When we're here from kernel mode; the (exception) stack looks like:
	 *
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	 *  6*4(%esp) - <previous context>
	 *  5*4(%esp) - flags
	 *  4*4(%esp) - cs
	 *  3*4(%esp) - ip
	 *  2*4(%esp) - orig_eax
	 *  1*4(%esp) - gs / function
	 *  0*4(%esp) - fs
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	 *
	 * Lets build a 5 entry IRET frame after that, such that struct pt_regs
	 * is complete and in particular regs->sp is correct. This gives us
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	 * the original 6 enties as gap:
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	 *
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	 * 14*4(%esp) - <previous context>
	 * 13*4(%esp) - gap / flags
	 * 12*4(%esp) - gap / cs
	 * 11*4(%esp) - gap / ip
	 * 10*4(%esp) - gap / orig_eax
	 *  9*4(%esp) - gap / gs / function
	 *  8*4(%esp) - gap / fs
	 *  7*4(%esp) - ss
	 *  6*4(%esp) - sp
	 *  5*4(%esp) - flags
	 *  4*4(%esp) - cs
	 *  3*4(%esp) - ip
	 *  2*4(%esp) - orig_eax
	 *  1*4(%esp) - gs / function
	 *  0*4(%esp) - fs
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	 */

	pushl	%ss		# ss
	pushl	%esp		# sp (points at ss)
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	addl	$7*4, (%esp)	# point sp back at the previous context
	pushl	7*4(%esp)	# flags
	pushl	7*4(%esp)	# cs
	pushl	7*4(%esp)	# ip
	pushl	7*4(%esp)	# orig_eax
	pushl	7*4(%esp)	# gs / function
	pushl	7*4(%esp)	# fs
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.Lfrom_usermode_no_fixup_\@:
.endm

.macro IRET_FRAME
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	/*
	 * We're called with %ds, %es, %fs, and %gs from the interrupted
	 * frame, so we shouldn't use them.  Also, we may be in ESPFIX
	 * mode and therefore have a nonzero SS base and an offset ESP,
	 * so any attempt to access the stack needs to use SS.  (except for
	 * accesses through %esp, which automatically use SS.)
	 */
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	testl $CS_FROM_KERNEL, 1*4(%esp)
	jz .Lfinished_frame_\@

	/*
	 * Reconstruct the 3 entry IRET frame right after the (modified)
	 * regs->sp without lowering %esp in between, such that an NMI in the
	 * middle doesn't scribble our stack.
	 */
	pushl	%eax
	pushl	%ecx
	movl	5*4(%esp), %eax		# (modified) regs->sp

	movl	4*4(%esp), %ecx		# flags
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	movl	%ecx, %ss:-1*4(%eax)
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	movl	3*4(%esp), %ecx		# cs
	andl	$0x0000ffff, %ecx
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	movl	%ecx, %ss:-2*4(%eax)
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	movl	2*4(%esp), %ecx		# ip
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	movl	%ecx, %ss:-3*4(%eax)
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	movl	1*4(%esp), %ecx		# eax
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	movl	%ecx, %ss:-4*4(%eax)
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	popl	%ecx
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	lea	-4*4(%eax), %esp
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	popl	%eax
.Lfinished_frame_\@:
.endm

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.macro SAVE_ALL pt_regs_ax=%eax switch_stacks=0 skip_gs=0 unwind_espfix=0
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	cld
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.if \skip_gs == 0
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	PUSH_GS
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.endif
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	pushl	%fs
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	pushl	%eax
	movl	$(__KERNEL_PERCPU), %eax
	movl	%eax, %fs
.if \unwind_espfix > 0
	UNWIND_ESPFIX_STACK
.endif
	popl	%eax

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	FIXUP_FRAME
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	pushl	%es
	pushl	%ds
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	pushl	\pt_regs_ax
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	pushl	%ebp
	pushl	%edi
	pushl	%esi
	pushl	%edx
	pushl	%ecx
	pushl	%ebx
	movl	$(__USER_DS), %edx
	movl	%edx, %ds
	movl	%edx, %es
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.if \skip_gs == 0
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	SET_KERNEL_GS %edx
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.endif
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	/* Switch to kernel stack if necessary */
.if \switch_stacks > 0
	SWITCH_TO_KERNEL_STACK
.endif
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.endm
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.macro SAVE_ALL_NMI cr3_reg:req unwind_espfix=0
	SAVE_ALL unwind_espfix=\unwind_espfix
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	BUG_IF_WRONG_CR3

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	/*
	 * Now switch the CR3 when PTI is enabled.
	 *
	 * We can enter with either user or kernel cr3, the code will
	 * store the old cr3 in \cr3_reg and switches to the kernel cr3
	 * if necessary.
	 */
	SWITCH_TO_KERNEL_CR3 scratch_reg=\cr3_reg

.Lend_\@:
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.endm
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.macro RESTORE_INT_REGS
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	popl	%ebx
	popl	%ecx
	popl	%edx
	popl	%esi
	popl	%edi
	popl	%ebp
	popl	%eax
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.endm
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.macro RESTORE_REGS pop=0
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	RESTORE_INT_REGS
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1:	popl	%ds
2:	popl	%es
3:	popl	%fs
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	POP_GS \pop
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	IRET_FRAME
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.pushsection .fixup, "ax"
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4:	movl	$0, (%esp)
	jmp	1b
5:	movl	$0, (%esp)
	jmp	2b
6:	movl	$0, (%esp)
	jmp	3b
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.popsection
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	_ASM_EXTABLE(1b, 4b)
	_ASM_EXTABLE(2b, 5b)
	_ASM_EXTABLE(3b, 6b)
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	POP_GS_EX
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.endm
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.macro RESTORE_ALL_NMI cr3_reg:req pop=0
	/*
	 * Now switch the CR3 when PTI is enabled.
	 *
	 * We enter with kernel cr3 and switch the cr3 to the value
	 * stored on \cr3_reg, which is either a user or a kernel cr3.
	 */
	ALTERNATIVE "jmp .Lswitched_\@", "", X86_FEATURE_PTI

	testl	$PTI_SWITCH_MASK, \cr3_reg
	jz	.Lswitched_\@

	/* User cr3 in \cr3_reg - write it to hardware cr3 */
	movl	\cr3_reg, %cr3

.Lswitched_\@:

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	BUG_IF_WRONG_CR3

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	RESTORE_REGS pop=\pop
.endm

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.macro CHECK_AND_APPLY_ESPFIX
#ifdef CONFIG_X86_ESPFIX32
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#define GDT_ESPFIX_OFFSET (GDT_ENTRY_ESPFIX_SS * 8)
#define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + GDT_ESPFIX_OFFSET
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	ALTERNATIVE	"jmp .Lend_\@", "", X86_BUG_ESPFIX

	movl	PT_EFLAGS(%esp), %eax		# mix EFLAGS, SS and CS
	/*
	 * Warning: PT_OLDSS(%esp) contains the wrong/random values if we
	 * are returning to the kernel.
	 * See comments in process.c:copy_thread() for details.
	 */
	movb	PT_OLDSS(%esp), %ah
	movb	PT_CS(%esp), %al
	andl	$(X86_EFLAGS_VM | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax
	cmpl	$((SEGMENT_LDT << 8) | USER_RPL), %eax
	jne	.Lend_\@	# returning to user-space with LDT SS

	/*
	 * Setup and switch to ESPFIX stack
	 *
	 * We're returning to userspace with a 16 bit stack. The CPU will not
	 * restore the high word of ESP for us on executing iret... This is an
	 * "official" bug of all the x86-compatible CPUs, which we can work
	 * around to make dosemu and wine happy. We do this by preloading the
	 * high word of ESP with the high word of the userspace ESP while
	 * compensating for the offset by changing to the ESPFIX segment with
	 * a base address that matches for the difference.
	 */
	mov	%esp, %edx			/* load kernel esp */
	mov	PT_OLDESP(%esp), %eax		/* load userspace esp */
	mov	%dx, %ax			/* eax: new kernel esp */
	sub	%eax, %edx			/* offset (low word is 0) */
	shr	$16, %edx
	mov	%dl, GDT_ESPFIX_SS + 4		/* bits 16..23 */
	mov	%dh, GDT_ESPFIX_SS + 7		/* bits 24..31 */
	pushl	$__ESPFIX_SS
	pushl	%eax				/* new kernel esp */
	/*
	 * Disable interrupts, but do not irqtrace this section: we
	 * will soon execute iret and the tracer was already set to
	 * the irqstate after the IRET:
	 */
	DISABLE_INTERRUPTS(CLBR_ANY)
	lss	(%esp), %esp			/* switch to espfix segment */
.Lend_\@:
#endif /* CONFIG_X86_ESPFIX32 */
.endm
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/*
 * Called with pt_regs fully populated and kernel segments loaded,
 * so we can access PER_CPU and use the integer registers.
 *
 * We need to be very careful here with the %esp switch, because an NMI
 * can happen everywhere. If the NMI handler finds itself on the
 * entry-stack, it will overwrite the task-stack and everything we
 * copied there. So allocate the stack-frame on the task-stack and
 * switch to it before we do any copying.
 */
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.macro SWITCH_TO_KERNEL_STACK

	ALTERNATIVE     "", "jmp .Lend_\@", X86_FEATURE_XENPV

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	BUG_IF_WRONG_CR3

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	SWITCH_TO_KERNEL_CR3 scratch_reg=%eax

	/*
	 * %eax now contains the entry cr3 and we carry it forward in
	 * that register for the time this macro runs
	 */

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	/* Are we on the entry stack? Bail out if not! */
	movl	PER_CPU_VAR(cpu_entry_area), %ecx
	addl	$CPU_ENTRY_AREA_entry_stack + SIZEOF_entry_stack, %ecx
	subl	%esp, %ecx	/* ecx = (end of entry_stack) - esp */
	cmpl	$SIZEOF_entry_stack, %ecx
	jae	.Lend_\@

	/* Load stack pointer into %esi and %edi */
	movl	%esp, %esi
	movl	%esi, %edi

	/* Move %edi to the top of the entry stack */
	andl	$(MASK_entry_stack), %edi
	addl	$(SIZEOF_entry_stack), %edi

	/* Load top of task-stack into %edi */
	movl	TSS_entry2task_stack(%edi), %edi

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	/* Special case - entry from kernel mode via entry stack */
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#ifdef CONFIG_VM86
	movl	PT_EFLAGS(%esp), %ecx		# mix EFLAGS and CS
	movb	PT_CS(%esp), %cl
	andl	$(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %ecx
#else
	movl	PT_CS(%esp), %ecx
	andl	$SEGMENT_RPL_MASK, %ecx
#endif
	cmpl	$USER_RPL, %ecx
	jb	.Lentry_from_kernel_\@
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	/* Bytes to copy */
	movl	$PTREGS_SIZE, %ecx

#ifdef CONFIG_VM86
	testl	$X86_EFLAGS_VM, PT_EFLAGS(%esi)
	jz	.Lcopy_pt_regs_\@

	/*
	 * Stack-frame contains 4 additional segment registers when
	 * coming from VM86 mode
	 */
	addl	$(4 * 4), %ecx

#endif
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.Lcopy_pt_regs_\@:
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	/* Allocate frame on task-stack */
	subl	%ecx, %edi

	/* Switch to task-stack */
	movl	%edi, %esp

	/*
	 * We are now on the task-stack and can safely copy over the
	 * stack-frame
	 */
	shrl	$2, %ecx
	cld
	rep movsl

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	jmp .Lend_\@

.Lentry_from_kernel_\@:

	/*
	 * This handles the case when we enter the kernel from
	 * kernel-mode and %esp points to the entry-stack. When this
	 * happens we need to switch to the task-stack to run C code,
	 * but switch back to the entry-stack again when we approach
	 * iret and return to the interrupted code-path. This usually
	 * happens when we hit an exception while restoring user-space
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	 * segment registers on the way back to user-space or when the
	 * sysenter handler runs with eflags.tf set.
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	 *
	 * When we switch to the task-stack here, we can't trust the
	 * contents of the entry-stack anymore, as the exception handler
	 * might be scheduled out or moved to another CPU. Therefore we
	 * copy the complete entry-stack to the task-stack and set a
	 * marker in the iret-frame (bit 31 of the CS dword) to detect
	 * what we've done on the iret path.
	 *
	 * On the iret path we copy everything back and switch to the
	 * entry-stack, so that the interrupted kernel code-path
	 * continues on the same stack it was interrupted with.
	 *
	 * Be aware that an NMI can happen anytime in this code.
	 *
	 * %esi: Entry-Stack pointer (same as %esp)
	 * %edi: Top of the task stack
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	 * %eax: CR3 on kernel entry
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	 */

	/* Calculate number of bytes on the entry stack in %ecx */
	movl	%esi, %ecx

	/* %ecx to the top of entry-stack */
	andl	$(MASK_entry_stack), %ecx
	addl	$(SIZEOF_entry_stack), %ecx

	/* Number of bytes on the entry stack to %ecx */
	sub	%esi, %ecx

	/* Mark stackframe as coming from entry stack */
	orl	$CS_FROM_ENTRY_STACK, PT_CS(%esp)

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	/*
	 * Test the cr3 used to enter the kernel and add a marker
	 * so that we can switch back to it before iret.
	 */
	testl	$PTI_SWITCH_MASK, %eax
	jz	.Lcopy_pt_regs_\@
	orl	$CS_FROM_USER_CR3, PT_CS(%esp)

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	/*
	 * %esi and %edi are unchanged, %ecx contains the number of
	 * bytes to copy. The code at .Lcopy_pt_regs_\@ will allocate
	 * the stack-frame on task-stack and copy everything over
	 */
	jmp .Lcopy_pt_regs_\@

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.Lend_\@:
.endm

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/*
 * Switch back from the kernel stack to the entry stack.
 *
 * The %esp register must point to pt_regs on the task stack. It will
 * first calculate the size of the stack-frame to copy, depending on
 * whether we return to VM86 mode or not. With that it uses 'rep movsl'
 * to copy the contents of the stack over to the entry stack.
 *
 * We must be very careful here, as we can't trust the contents of the
 * task-stack once we switched to the entry-stack. When an NMI happens
 * while on the entry-stack, the NMI handler will switch back to the top
 * of the task stack, overwriting our stack-frame we are about to copy.
 * Therefore we switch the stack only after everything is copied over.
 */
.macro SWITCH_TO_ENTRY_STACK

	ALTERNATIVE     "", "jmp .Lend_\@", X86_FEATURE_XENPV

	/* Bytes to copy */
	movl	$PTREGS_SIZE, %ecx

#ifdef CONFIG_VM86
	testl	$(X86_EFLAGS_VM), PT_EFLAGS(%esp)
	jz	.Lcopy_pt_regs_\@

	/* Additional 4 registers to copy when returning to VM86 mode */
	addl    $(4 * 4), %ecx

.Lcopy_pt_regs_\@:
#endif

	/* Initialize source and destination for movsl */
	movl	PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %edi
	subl	%ecx, %edi
	movl	%esp, %esi

	/* Save future stack pointer in %ebx */
	movl	%edi, %ebx

	/* Copy over the stack-frame */
	shrl	$2, %ecx
	cld
	rep movsl

	/*
	 * Switch to entry-stack - needs to happen after everything is
	 * copied because the NMI handler will overwrite the task-stack
	 * when on entry-stack
	 */
	movl	%ebx, %esp

.Lend_\@:
.endm

667 668
/*
 * This macro handles the case when we return to kernel-mode on the iret
669
 * path and have to switch back to the entry stack and/or user-cr3
670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714
 *
 * See the comments below the .Lentry_from_kernel_\@ label in the
 * SWITCH_TO_KERNEL_STACK macro for more details.
 */
.macro PARANOID_EXIT_TO_KERNEL_MODE

	/*
	 * Test if we entered the kernel with the entry-stack. Most
	 * likely we did not, because this code only runs on the
	 * return-to-kernel path.
	 */
	testl	$CS_FROM_ENTRY_STACK, PT_CS(%esp)
	jz	.Lend_\@

	/* Unlikely slow-path */

	/* Clear marker from stack-frame */
	andl	$(~CS_FROM_ENTRY_STACK), PT_CS(%esp)

	/* Copy the remaining task-stack contents to entry-stack */
	movl	%esp, %esi
	movl	PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %edi

	/* Bytes on the task-stack to ecx */
	movl	PER_CPU_VAR(cpu_tss_rw + TSS_sp1), %ecx
	subl	%esi, %ecx

	/* Allocate stack-frame on entry-stack */
	subl	%ecx, %edi

	/*
	 * Save future stack-pointer, we must not switch until the
	 * copy is done, otherwise the NMI handler could destroy the
	 * contents of the task-stack we are about to copy.
	 */
	movl	%edi, %ebx

	/* Do the copy */
	shrl	$2, %ecx
	cld
	rep movsl

	/* Safe to switch to entry-stack now */
	movl	%ebx, %esp

715 716 717 718 719 720 721 722 723 724 725 726
	/*
	 * We came from entry-stack and need to check if we also need to
	 * switch back to user cr3.
	 */
	testl	$CS_FROM_USER_CR3, PT_CS(%esp)
	jz	.Lend_\@

	/* Clear marker from stack-frame */
	andl	$(~CS_FROM_USER_CR3), PT_CS(%esp)

	SWITCH_TO_USER_CR3 scratch_reg=%eax

727 728
.Lend_\@:
.endm
729 730 731 732
/*
 * %eax: prev task
 * %edx: next task
 */
733
SYM_CODE_START(__switch_to_asm)
734 735 736 737 738 739 740 741
	/*
	 * Save callee-saved registers
	 * This must match the order in struct inactive_task_frame
	 */
	pushl	%ebp
	pushl	%ebx
	pushl	%edi
	pushl	%esi
742 743 744 745 746
	/*
	 * Flags are saved to prevent AC leakage. This could go
	 * away if objtool would have 32bit support to verify
	 * the STAC/CLAC correctness.
	 */
747
	pushfl
748 749 750 751 752

	/* switch stack */
	movl	%esp, TASK_threadsp(%eax)
	movl	TASK_threadsp(%edx), %esp

753
#ifdef CONFIG_STACKPROTECTOR
754 755 756 757
	movl	TASK_stack_canary(%edx), %ebx
	movl	%ebx, PER_CPU_VAR(stack_canary)+stack_canary_offset
#endif

758 759 760 761 762 763 764 765
#ifdef CONFIG_RETPOLINE
	/*
	 * When switching from a shallower to a deeper call stack
	 * the RSB may either underflow or use entries populated
	 * with userspace addresses. On CPUs where those concerns
	 * exist, overwrite the RSB with entries which capture
	 * speculative execution to prevent attack.
	 */
766
	FILL_RETURN_BUFFER %ebx, RSB_CLEAR_LOOPS, X86_FEATURE_RSB_CTXSW
767 768
#endif

769
	/* Restore flags or the incoming task to restore AC state. */
770
	popfl
771
	/* restore callee-saved registers */
772 773 774 775 776 777
	popl	%esi
	popl	%edi
	popl	%ebx
	popl	%ebp

	jmp	__switch_to
778
SYM_CODE_END(__switch_to_asm)
779

780 781 782 783 784 785 786
/*
 * The unwinder expects the last frame on the stack to always be at the same
 * offset from the end of the page, which allows it to validate the stack.
 * Calling schedule_tail() directly would break that convention because its an
 * asmlinkage function so its argument has to be pushed on the stack.  This
 * wrapper creates a proper "end of stack" frame header before the call.
 */
787
SYM_FUNC_START(schedule_tail_wrapper)
788 789 790 791 792 793 794 795
	FRAME_BEGIN

	pushl	%eax
	call	schedule_tail
	popl	%eax

	FRAME_END
	ret
796
SYM_FUNC_END(schedule_tail_wrapper)
797 798 799 800
/*
 * A newly forked process directly context switches into this address.
 *
 * eax: prev task we switched from
801 802
 * ebx: kernel thread func (NULL for user thread)
 * edi: kernel thread arg
803
 */
804
SYM_CODE_START(ret_from_fork)
805
	call	schedule_tail_wrapper
806

807 808 809 810
	testl	%ebx, %ebx
	jnz	1f		/* kernel threads are uncommon */

2:
811
	/* When we fork, we trace the syscall return in the child, too. */
812
	movl    %esp, %eax
813
	call    syscall_return_slowpath
814
	STACKLEAK_ERASE
815 816
	jmp     restore_all

817 818
	/* kernel thread */
1:	movl	%edi, %eax
819
	CALL_NOSPEC ebx
820
	/*
821 822 823
	 * A kernel thread is allowed to return here after successfully
	 * calling do_execve().  Exit to userspace to complete the execve()
	 * syscall.
824
	 */
825 826
	movl	$0, PT_EAX(%esp)
	jmp	2b
827
SYM_CODE_END(ret_from_fork)
828

L
Linus Torvalds 已提交
829 830 831 832 833 834 835 836
/*
 * Return to user mode is not as complex as all this looks,
 * but we want the default path for a system call return to
 * go as quickly as possible which is why some of this is
 * less clear than it otherwise should be.
 */

	# userspace resumption stub bypassing syscall exit tracing
837
SYM_CODE_START_LOCAL(ret_from_exception)
838
	preempt_stop(CLBR_ANY)
L
Linus Torvalds 已提交
839
ret_from_intr:
840
#ifdef CONFIG_VM86
841 842 843
	movl	PT_EFLAGS(%esp), %eax		# mix EFLAGS and CS
	movb	PT_CS(%esp), %al
	andl	$(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax
844 845
#else
	/*
846
	 * We can be coming here from child spawned by kernel_thread().
847
	 */
848 849
	movl	PT_CS(%esp), %eax
	andl	$SEGMENT_RPL_MASK, %eax
850
#endif
851
	cmpl	$USER_RPL, %eax
852
	jb	restore_all_kernel		# not returning to v8086 or userspace
853

854
	DISABLE_INTERRUPTS(CLBR_ANY)
855
	TRACE_IRQS_OFF
856 857
	movl	%esp, %eax
	call	prepare_exit_to_usermode
858
	jmp	restore_all
859
SYM_CODE_END(ret_from_exception)
L
Linus Torvalds 已提交
860

861
SYM_ENTRY(__begin_SYSENTER_singlestep_region, SYM_L_GLOBAL, SYM_A_NONE)
862 863 864 865 866 867 868 869 870
/*
 * All code from here through __end_SYSENTER_singlestep_region is subject
 * to being single-stepped if a user program sets TF and executes SYSENTER.
 * There is absolutely nothing that we can do to prevent this from happening
 * (thanks Intel!).  To keep our handling of this situation as simple as
 * possible, we handle TF just like AC and NT, except that our #DB handler
 * will ignore all of the single-step traps generated in this range.
 */

871
#ifdef CONFIG_XEN_PV
872 873 874 875
/*
 * Xen doesn't set %esp to be precisely what the normal SYSENTER
 * entry point expects, so fix it up before using the normal path.
 */
876
SYM_CODE_START(xen_sysenter_target)
877
	addl	$5*4, %esp			/* remove xen-provided frame */
878
	jmp	.Lsysenter_past_esp
879
SYM_CODE_END(xen_sysenter_target)
880 881
#endif

882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913
/*
 * 32-bit SYSENTER entry.
 *
 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
 * if X86_FEATURE_SEP is available.  This is the preferred system call
 * entry on 32-bit systems.
 *
 * The SYSENTER instruction, in principle, should *only* occur in the
 * vDSO.  In practice, a small number of Android devices were shipped
 * with a copy of Bionic that inlined a SYSENTER instruction.  This
 * never happened in any of Google's Bionic versions -- it only happened
 * in a narrow range of Intel-provided versions.
 *
 * SYSENTER loads SS, ESP, CS, and EIP from previously programmed MSRs.
 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
 * SYSENTER does not save anything on the stack,
 * and does not save old EIP (!!!), ESP, or EFLAGS.
 *
 * To avoid losing track of EFLAGS.VM (and thus potentially corrupting
 * user and/or vm86 state), we explicitly disable the SYSENTER
 * instruction in vm86 mode by reprogramming the MSRs.
 *
 * Arguments:
 * eax  system call number
 * ebx  arg1
 * ecx  arg2
 * edx  arg3
 * esi  arg4
 * edi  arg5
 * ebp  user stack
 * 0(%ebp) arg6
 */
914
SYM_FUNC_START(entry_SYSENTER_32)
915 916 917 918 919 920 921
	/*
	 * On entry-stack with all userspace-regs live - save and
	 * restore eflags and %eax to use it as scratch-reg for the cr3
	 * switch.
	 */
	pushfl
	pushl	%eax
922
	BUG_IF_WRONG_CR3 no_user_check=1
923 924 925 926 927
	SWITCH_TO_KERNEL_CR3 scratch_reg=%eax
	popl	%eax
	popfl

	/* Stack empty again, switch to task stack */
928
	movl	TSS_entry2task_stack(%esp), %esp
929

930
.Lsysenter_past_esp:
931
	pushl	$__USER_DS		/* pt_regs->ss */
932
	pushl	%ebp			/* pt_regs->sp (stashed in bp) */
933 934 935 936 937
	pushfl				/* pt_regs->flags (except IF = 0) */
	orl	$X86_EFLAGS_IF, (%esp)	/* Fix IF */
	pushl	$__USER_CS		/* pt_regs->cs */
	pushl	$0			/* pt_regs->ip = 0 (placeholder) */
	pushl	%eax			/* pt_regs->orig_ax */
938
	SAVE_ALL pt_regs_ax=$-ENOSYS	/* save rest, stack already switched */
939

940
	/*
941 942
	 * SYSENTER doesn't filter flags, so we need to clear NT, AC
	 * and TF ourselves.  To save a few cycles, we can check whether
943 944 945 946
	 * either was set instead of doing an unconditional popfq.
	 * This needs to happen before enabling interrupts so that
	 * we don't get preempted with NT set.
	 *
947 948 949 950 951 952
	 * If TF is set, we will single-step all the way to here -- do_debug
	 * will ignore all the traps.  (Yes, this is slow, but so is
	 * single-stepping in general.  This allows us to avoid having
	 * a more complicated code to handle the case where a user program
	 * forces us to single-step through the SYSENTER entry code.)
	 *
953 954 955 956 957 958
	 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
	 * out-of-line as an optimization: NT is unlikely to be set in the
	 * majority of the cases and instead of polluting the I$ unnecessarily,
	 * we're keeping that code behind a branch which will predict as
	 * not-taken and therefore its instructions won't be fetched.
	 */
959
	testl	$X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, PT_EFLAGS(%esp)
960 961 962
	jnz	.Lsysenter_fix_flags
.Lsysenter_flags_fixed:

963
	/*
964 965
	 * User mode is traced as though IRQs are on, and SYSENTER
	 * turned them off.
966
	 */
967
	TRACE_IRQS_OFF
968 969 970

	movl	%esp, %eax
	call	do_fast_syscall_32
971 972 973
	/* XEN PV guests always use IRET path */
	ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
		    "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
974

975 976
	STACKLEAK_ERASE

977 978
/* Opportunistic SYSEXIT */
	TRACE_IRQS_ON			/* User mode traces as IRQs on. */
979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995

	/*
	 * Setup entry stack - we keep the pointer in %eax and do the
	 * switch after almost all user-state is restored.
	 */

	/* Load entry stack pointer and allocate frame for eflags/eax */
	movl	PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %eax
	subl	$(2*4), %eax

	/* Copy eflags and eax to entry stack */
	movl	PT_EFLAGS(%esp), %edi
	movl	PT_EAX(%esp), %esi
	movl	%edi, (%eax)
	movl	%esi, 4(%eax)

	/* Restore user registers and segments */
996 997
	movl	PT_EIP(%esp), %edx	/* pt_regs->ip */
	movl	PT_OLDESP(%esp), %ecx	/* pt_regs->sp */
998 999
1:	mov	PT_FS(%esp), %fs
	PTGS_TO_GS
1000

1001 1002 1003 1004 1005
	popl	%ebx			/* pt_regs->bx */
	addl	$2*4, %esp		/* skip pt_regs->cx and pt_regs->dx */
	popl	%esi			/* pt_regs->si */
	popl	%edi			/* pt_regs->di */
	popl	%ebp			/* pt_regs->bp */
1006 1007 1008

	/* Switch to entry stack */
	movl	%eax, %esp
1009

1010 1011 1012
	/* Now ready to switch the cr3 */
	SWITCH_TO_USER_CR3 scratch_reg=%eax

1013 1014 1015 1016 1017
	/*
	 * Restore all flags except IF. (We restore IF separately because
	 * STI gives a one-instruction window in which we won't be interrupted,
	 * whereas POPF does not.)
	 */
1018
	btrl	$X86_EFLAGS_IF_BIT, (%esp)
1019
	BUG_IF_WRONG_CR3 no_user_check=1
1020
	popfl
1021
	popl	%eax
1022

1023 1024 1025 1026
	/*
	 * Return back to the vDSO, which will pop ecx and edx.
	 * Don't bother with DS and ES (they already contain __USER_DS).
	 */
1027 1028
	sti
	sysexit
R
Roland McGrath 已提交
1029

1030 1031 1032
.pushsection .fixup, "ax"
2:	movl	$0, PT_FS(%esp)
	jmp	1b
1033
.popsection
1034
	_ASM_EXTABLE(1b, 2b)
1035
	PTGS_TO_GS_EX
1036 1037 1038 1039 1040

.Lsysenter_fix_flags:
	pushl	$X86_EFLAGS_FIXED
	popfl
	jmp	.Lsysenter_flags_fixed
1041
SYM_ENTRY(__end_SYSENTER_singlestep_region, SYM_L_GLOBAL, SYM_A_NONE)
1042
SYM_FUNC_END(entry_SYSENTER_32)
L
Linus Torvalds 已提交
1043

1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071
/*
 * 32-bit legacy system call entry.
 *
 * 32-bit x86 Linux system calls traditionally used the INT $0x80
 * instruction.  INT $0x80 lands here.
 *
 * This entry point can be used by any 32-bit perform system calls.
 * Instances of INT $0x80 can be found inline in various programs and
 * libraries.  It is also used by the vDSO's __kernel_vsyscall
 * fallback for hardware that doesn't support a faster entry method.
 * Restarted 32-bit system calls also fall back to INT $0x80
 * regardless of what instruction was originally used to do the system
 * call.  (64-bit programs can use INT $0x80 as well, but they can
 * only run on 64-bit kernels and therefore land in
 * entry_INT80_compat.)
 *
 * This is considered a slow path.  It is not used by most libc
 * implementations on modern hardware except during process startup.
 *
 * Arguments:
 * eax  system call number
 * ebx  arg1
 * ecx  arg2
 * edx  arg3
 * esi  arg4
 * edi  arg5
 * ebp  arg6
 */
1072
SYM_FUNC_START(entry_INT80_32)
1073
	ASM_CLAC
1074
	pushl	%eax			/* pt_regs->orig_ax */
1075 1076

	SAVE_ALL pt_regs_ax=$-ENOSYS switch_stacks=1	/* save rest */
1077 1078

	/*
1079 1080
	 * User mode is traced as though IRQs are on, and the interrupt gate
	 * turned them off.
1081
	 */
1082
	TRACE_IRQS_OFF
1083 1084

	movl	%esp, %eax
1085
	call	do_int80_syscall_32
1086
.Lsyscall_32_done:
L
Linus Torvalds 已提交
1087

1088 1089
	STACKLEAK_ERASE

L
Linus Torvalds 已提交
1090
restore_all:
1091
	TRACE_IRQS_ON
1092
	SWITCH_TO_ENTRY_STACK
1093
	CHECK_AND_APPLY_ESPFIX
1094

1095 1096 1097
	/* Switch back to user CR3 */
	SWITCH_TO_USER_CR3 scratch_reg=%eax

1098 1099
	BUG_IF_WRONG_CR3

1100 1101
	/* Restore user state */
	RESTORE_REGS pop=4			# skip orig_eax/error_code
1102
.Lirq_return:
1103 1104 1105 1106 1107
	/*
	 * ARCH_HAS_MEMBARRIER_SYNC_CORE rely on IRET core serialization
	 * when returning from IPI handler and when returning from
	 * scheduler to user-space.
	 */
I
Ingo Molnar 已提交
1108
	INTERRUPT_RETURN
1109

1110
restore_all_kernel:
T
Thomas Gleixner 已提交
1111
#ifdef CONFIG_PREEMPTION
1112 1113 1114 1115 1116 1117 1118 1119
	DISABLE_INTERRUPTS(CLBR_ANY)
	cmpl	$0, PER_CPU_VAR(__preempt_count)
	jnz	.Lno_preempt
	testl	$X86_EFLAGS_IF, PT_EFLAGS(%esp)	# interrupts off (exception path) ?
	jz	.Lno_preempt
	call	preempt_schedule_irq
.Lno_preempt:
#endif
1120
	TRACE_IRQS_IRET
1121
	PARANOID_EXIT_TO_KERNEL_MODE
1122
	BUG_IF_WRONG_CR3
1123 1124 1125
	RESTORE_REGS 4
	jmp	.Lirq_return

1126
.section .fixup, "ax"
1127
SYM_CODE_START(iret_exc)
1128 1129
	pushl	$0				# no error code
	pushl	$do_iret_error
1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142

#ifdef CONFIG_DEBUG_ENTRY
	/*
	 * The stack-frame here is the one that iret faulted on, so its a
	 * return-to-user frame. We are on kernel-cr3 because we come here from
	 * the fixup code. This confuses the CR3 checker, so switch to user-cr3
	 * as the checker expects it.
	 */
	pushl	%eax
	SWITCH_TO_USER_CR3 scratch_reg=%eax
	popl	%eax
#endif

1143
	jmp	common_exception
1144
SYM_CODE_END(iret_exc)
L
Linus Torvalds 已提交
1145
.previous
1146
	_ASM_EXTABLE(.Lirq_return, iret_exc)
1147
SYM_FUNC_END(entry_INT80_32)
L
Linus Torvalds 已提交
1148

1149
.macro FIXUP_ESPFIX_STACK
1150 1151 1152 1153 1154 1155
/*
 * Switch back for ESPFIX stack to the normal zerobased stack
 *
 * We can't call C functions using the ESPFIX stack. This code reads
 * the high word of the segment base from the GDT and swiches to the
 * normal stack and adjusts ESP with the matching offset.
1156 1157 1158 1159
 *
 * We might be on user CR3 here, so percpu data is not mapped and we can't
 * access the GDT through the percpu segment.  Instead, use SGDT to find
 * the cpu_entry_area alias of the GDT.
1160
 */
1161
#ifdef CONFIG_X86_ESPFIX32
1162
	/* fixup the stack */
1163 1164 1165 1166 1167 1168 1169 1170 1171 1172
	pushl	%ecx
	subl	$2*4, %esp
	sgdt	(%esp)
	movl	2(%esp), %ecx				/* GDT address */
	/*
	 * Careful: ECX is a linear pointer, so we need to force base
	 * zero.  %cs is the only known-linear segment we have right now.
	 */
	mov	%cs:GDT_ESPFIX_OFFSET + 4(%ecx), %al	/* bits 16..23 */
	mov	%cs:GDT_ESPFIX_OFFSET + 7(%ecx), %ah	/* bits 24..31 */
1173
	shl	$16, %eax
1174 1175
	addl	$2*4, %esp
	popl	%ecx
1176 1177 1178 1179
	addl	%esp, %eax			/* the adjusted stack pointer */
	pushl	$__KERNEL_DS
	pushl	%eax
	lss	(%esp), %esp			/* switch to the normal stack segment */
1180
#endif
1181
.endm
1182

1183
.macro UNWIND_ESPFIX_STACK
1184
	/* It's safe to clobber %eax, all other regs need to be preserved */
1185
#ifdef CONFIG_X86_ESPFIX32
1186
	movl	%ss, %eax
1187
	/* see if on espfix stack */
1188
	cmpw	$__ESPFIX_SS, %ax
1189
	jne	.Lno_fixup_\@
1190 1191
	/* switch to normal stack */
	FIXUP_ESPFIX_STACK
1192
.Lno_fixup_\@:
1193
#endif
1194
.endm
L
Linus Torvalds 已提交
1195 1196

/*
1197 1198
 * Build the entry stubs with some assembler magic.
 * We pack 1 stub into every 8-byte block.
L
Linus Torvalds 已提交
1199
 */
1200
	.align 8
1201
SYM_CODE_START(irq_entries_start)
1202 1203
    vector=FIRST_EXTERNAL_VECTOR
    .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
1204
	pushl	$(~vector+0x80)			/* Note: always in signed byte range */
1205 1206 1207 1208
    vector=vector+1
	jmp	common_interrupt
	.align	8
    .endr
1209
SYM_CODE_END(irq_entries_start)
1210

1211 1212
#ifdef CONFIG_X86_LOCAL_APIC
	.align 8
1213
SYM_CODE_START(spurious_entries_start)
1214 1215 1216 1217 1218 1219 1220
    vector=FIRST_SYSTEM_VECTOR
    .rept (NR_VECTORS - FIRST_SYSTEM_VECTOR)
	pushl	$(~vector+0x80)			/* Note: always in signed byte range */
    vector=vector+1
	jmp	common_spurious
	.align	8
    .endr
1221
SYM_CODE_END(spurious_entries_start)
1222

1223
SYM_CODE_START_LOCAL(common_spurious)
1224 1225 1226 1227 1228 1229 1230 1231
	ASM_CLAC
	addl	$-0x80, (%esp)			/* Adjust vector into the [-256, -1] range */
	SAVE_ALL switch_stacks=1
	ENCODE_FRAME_POINTER
	TRACE_IRQS_OFF
	movl	%esp, %eax
	call	smp_spurious_interrupt
	jmp	ret_from_intr
1232
SYM_CODE_END(common_spurious)
1233 1234
#endif

1235 1236 1237 1238
/*
 * the CPU automatically disables interrupts when executing an IRQ vector,
 * so IRQ-flags tracing has to follow that:
 */
1239
	.p2align CONFIG_X86_L1_CACHE_SHIFT
1240
SYM_CODE_START_LOCAL(common_interrupt)
1241
	ASM_CLAC
1242
	addl	$-0x80, (%esp)			/* Adjust vector into the [-256, -1] range */
1243 1244

	SAVE_ALL switch_stacks=1
1245
	ENCODE_FRAME_POINTER
1246
	TRACE_IRQS_OFF
1247 1248 1249
	movl	%esp, %eax
	call	do_IRQ
	jmp	ret_from_intr
1250
SYM_CODE_END(common_interrupt)
L
Linus Torvalds 已提交
1251

1252
#define BUILD_INTERRUPT3(name, nr, fn)			\
1253
SYM_FUNC_START(name)					\
1254 1255 1256 1257 1258 1259 1260 1261
	ASM_CLAC;					\
	pushl	$~(nr);					\
	SAVE_ALL switch_stacks=1;			\
	ENCODE_FRAME_POINTER;				\
	TRACE_IRQS_OFF					\
	movl	%esp, %eax;				\
	call	fn;					\
	jmp	ret_from_intr;				\
1262
SYM_FUNC_END(name)
L
Linus Torvalds 已提交
1263

1264 1265
#define BUILD_INTERRUPT(name, nr)		\
	BUILD_INTERRUPT3(name, nr, smp_##name);	\
T
Tejun Heo 已提交
1266

L
Linus Torvalds 已提交
1267
/* The include is where all of the SMP etc. interrupts come from */
1268
#include <asm/entry_arch.h>
L
Linus Torvalds 已提交
1269

1270
SYM_CODE_START(coprocessor_error)
1271
	ASM_CLAC
1272 1273
	pushl	$0
	pushl	$do_coprocessor_error
1274
	jmp	common_exception
1275
SYM_CODE_END(coprocessor_error)
L
Linus Torvalds 已提交
1276

1277
SYM_CODE_START(simd_coprocessor_error)
1278
	ASM_CLAC
1279
	pushl	$0
1280 1281
#ifdef CONFIG_X86_INVD_BUG
	/* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */
1282 1283
	ALTERNATIVE "pushl	$do_general_protection",	\
		    "pushl	$do_simd_coprocessor_error",	\
1284
		    X86_FEATURE_XMM
1285
#else
1286
	pushl	$do_simd_coprocessor_error
1287
#endif
1288
	jmp	common_exception
1289
SYM_CODE_END(simd_coprocessor_error)
L
Linus Torvalds 已提交
1290

1291
SYM_CODE_START(device_not_available)
1292
	ASM_CLAC
1293
	pushl	$0
1294
	pushl	$do_device_not_available
1295
	jmp	common_exception
1296
SYM_CODE_END(device_not_available)
L
Linus Torvalds 已提交
1297

1298
#ifdef CONFIG_PARAVIRT
1299
SYM_CODE_START(native_iret)
I
Ingo Molnar 已提交
1300
	iret
1301
	_ASM_EXTABLE(native_iret, iret_exc)
1302
SYM_CODE_END(native_iret)
1303 1304
#endif

1305
SYM_CODE_START(overflow)
1306
	ASM_CLAC
1307 1308
	pushl	$0
	pushl	$do_overflow
1309
	jmp	common_exception
1310
SYM_CODE_END(overflow)
L
Linus Torvalds 已提交
1311

1312
SYM_CODE_START(bounds)
1313
	ASM_CLAC
1314 1315
	pushl	$0
	pushl	$do_bounds
1316
	jmp	common_exception
1317
SYM_CODE_END(bounds)
L
Linus Torvalds 已提交
1318

1319
SYM_CODE_START(invalid_op)
1320
	ASM_CLAC
1321 1322
	pushl	$0
	pushl	$do_invalid_op
1323
	jmp	common_exception
1324
SYM_CODE_END(invalid_op)
L
Linus Torvalds 已提交
1325

1326
SYM_CODE_START(coprocessor_segment_overrun)
1327
	ASM_CLAC
1328 1329
	pushl	$0
	pushl	$do_coprocessor_segment_overrun
1330
	jmp	common_exception
1331
SYM_CODE_END(coprocessor_segment_overrun)
L
Linus Torvalds 已提交
1332

1333
SYM_CODE_START(invalid_TSS)
1334
	ASM_CLAC
1335
	pushl	$do_invalid_TSS
1336
	jmp	common_exception
1337
SYM_CODE_END(invalid_TSS)
L
Linus Torvalds 已提交
1338

1339
SYM_CODE_START(segment_not_present)
1340
	ASM_CLAC
1341
	pushl	$do_segment_not_present
1342
	jmp	common_exception
1343
SYM_CODE_END(segment_not_present)
L
Linus Torvalds 已提交
1344

1345
SYM_CODE_START(stack_segment)
1346
	ASM_CLAC
1347
	pushl	$do_stack_segment
1348
	jmp	common_exception
1349
SYM_CODE_END(stack_segment)
L
Linus Torvalds 已提交
1350

1351
SYM_CODE_START(alignment_check)
1352
	ASM_CLAC
1353
	pushl	$do_alignment_check
1354
	jmp	common_exception
1355
SYM_CODE_END(alignment_check)
L
Linus Torvalds 已提交
1356

1357
SYM_CODE_START(divide_error)
1358
	ASM_CLAC
1359 1360
	pushl	$0				# no error code
	pushl	$do_divide_error
1361
	jmp	common_exception
1362
SYM_CODE_END(divide_error)
L
Linus Torvalds 已提交
1363 1364

#ifdef CONFIG_X86_MCE
1365
SYM_CODE_START(machine_check)
1366
	ASM_CLAC
1367
	pushl	$0
1368
	pushl	$do_mce
1369
	jmp	common_exception
1370
SYM_CODE_END(machine_check)
L
Linus Torvalds 已提交
1371 1372
#endif

1373
SYM_CODE_START(spurious_interrupt_bug)
1374
	ASM_CLAC
1375 1376
	pushl	$0
	pushl	$do_spurious_interrupt_bug
1377
	jmp	common_exception
1378
SYM_CODE_END(spurious_interrupt_bug)
L
Linus Torvalds 已提交
1379

1380
#ifdef CONFIG_XEN_PV
1381
SYM_FUNC_START(xen_hypervisor_callback)
1382 1383 1384 1385 1386 1387 1388
	/*
	 * Check to see if we got the event in the critical
	 * region in xen_iret_direct, after we've reenabled
	 * events and checked for pending events.  This simulates
	 * iret instruction's behaviour where it delivers a
	 * pending interrupt when enabling interrupts:
	 */
1389
	cmpl	$xen_iret_start_crit, (%esp)
1390
	jb	1f
1391
	cmpl	$xen_iret_end_crit, (%esp)
1392
	jae	1f
1393 1394 1395 1396 1397 1398 1399
	call	xen_iret_crit_fixup
1:
	pushl	$-1				/* orig_ax = -1 => not a system call */
	SAVE_ALL
	ENCODE_FRAME_POINTER
	TRACE_IRQS_OFF
	mov	%esp, %eax
1400
	call	xen_evtchn_do_upcall
T
Thomas Gleixner 已提交
1401
#ifndef CONFIG_PREEMPTION
1402
	call	xen_maybe_preempt_hcall
1403
#endif
1404
	jmp	ret_from_intr
1405
SYM_FUNC_END(xen_hypervisor_callback)
1406

1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418
/*
 * Hypervisor uses this for application faults while it executes.
 * We get here for two reasons:
 *  1. Fault while reloading DS, ES, FS or GS
 *  2. Fault while executing IRET
 * Category 1 we fix up by reattempting the load, and zeroing the segment
 * register if the load fails.
 * Category 2 we fix up by jumping to do_iret_error. We cannot use the
 * normal Linux return path in this case because if we use the IRET hypercall
 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
 * We distinguish between categories by maintaining a status value in EAX.
 */
1419
SYM_FUNC_START(xen_failsafe_callback)
1420 1421 1422 1423 1424 1425
	pushl	%eax
	movl	$1, %eax
1:	mov	4(%esp), %ds
2:	mov	8(%esp), %es
3:	mov	12(%esp), %fs
4:	mov	16(%esp), %gs
1426 1427
	/* EAX == 0 => Category 1 (Bad segment)
	   EAX != 0 => Category 2 (Bad IRET) */
1428 1429 1430 1431 1432 1433
	testl	%eax, %eax
	popl	%eax
	lea	16(%esp), %esp
	jz	5f
	jmp	iret_exc
5:	pushl	$-1				/* orig_ax = -1 => not a system call */
1434
	SAVE_ALL
1435
	ENCODE_FRAME_POINTER
1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450
	jmp	ret_from_exception

.section .fixup, "ax"
6:	xorl	%eax, %eax
	movl	%eax, 4(%esp)
	jmp	1b
7:	xorl	%eax, %eax
	movl	%eax, 8(%esp)
	jmp	2b
8:	xorl	%eax, %eax
	movl	%eax, 12(%esp)
	jmp	3b
9:	xorl	%eax, %eax
	movl	%eax, 16(%esp)
	jmp	4b
1451
.previous
1452 1453 1454 1455
	_ASM_EXTABLE(1b, 6b)
	_ASM_EXTABLE(2b, 7b)
	_ASM_EXTABLE(3b, 8b)
	_ASM_EXTABLE(4b, 9b)
1456
SYM_FUNC_END(xen_failsafe_callback)
1457
#endif /* CONFIG_XEN_PV */
1458

1459
#ifdef CONFIG_XEN_PVHVM
1460
BUILD_INTERRUPT3(xen_hvm_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
1461
		 xen_evtchn_do_upcall)
1462
#endif
1463

1464 1465 1466 1467

#if IS_ENABLED(CONFIG_HYPERV)

BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
1468
		 hyperv_vector_handler)
1469

1470 1471 1472
BUILD_INTERRUPT3(hyperv_reenlightenment_vector, HYPERV_REENLIGHTENMENT_VECTOR,
		 hyperv_reenlightenment_intr)

1473 1474 1475
BUILD_INTERRUPT3(hv_stimer0_callback_vector, HYPERV_STIMER0_VECTOR,
		 hv_stimer0_vector_handler)

1476
#endif /* CONFIG_HYPERV */
1477

1478
SYM_CODE_START(page_fault)
1479
	ASM_CLAC
1480 1481
	pushl	$do_page_fault
	jmp	common_exception_read_cr2
1482
SYM_CODE_END(page_fault)
1483

1484
SYM_CODE_START_LOCAL_NOALIGN(common_exception_read_cr2)
1485
	/* the function address is in %gs's slot on the stack */
1486
	SAVE_ALL switch_stacks=1 skip_gs=1 unwind_espfix=1
1487 1488 1489 1490 1491

	ENCODE_FRAME_POINTER

	/* fixup %gs */
	GS_TO_REG %ecx
1492
	movl	PT_GS(%esp), %edi
1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503
	REG_TO_PTGS %ecx
	SET_KERNEL_GS %ecx

	GET_CR2_INTO(%ecx)			# might clobber %eax

	/* fixup orig %eax */
	movl	PT_ORIG_EAX(%esp), %edx		# get the error code
	movl	$-1, PT_ORIG_EAX(%esp)		# no syscall to restart

	TRACE_IRQS_OFF
	movl	%esp, %eax			# pt_regs pointer
1504
	CALL_NOSPEC edi
1505
	jmp	ret_from_exception
1506
SYM_CODE_END(common_exception_read_cr2)
1507

1508
SYM_CODE_START_LOCAL_NOALIGN(common_exception)
1509
	/* the function address is in %gs's slot on the stack */
1510
	SAVE_ALL switch_stacks=1 skip_gs=1 unwind_espfix=1
1511
	ENCODE_FRAME_POINTER
1512 1513

	/* fixup %gs */
1514
	GS_TO_REG %ecx
1515
	movl	PT_GS(%esp), %edi		# get the function address
1516 1517
	REG_TO_PTGS %ecx
	SET_KERNEL_GS %ecx
1518 1519 1520 1521 1522

	/* fixup orig %eax */
	movl	PT_ORIG_EAX(%esp), %edx		# get the error code
	movl	$-1, PT_ORIG_EAX(%esp)		# no syscall to restart

1523
	TRACE_IRQS_OFF
1524
	movl	%esp, %eax			# pt_regs pointer
1525
	CALL_NOSPEC edi
1526
	jmp	ret_from_exception
1527
SYM_CODE_END(common_exception)
1528

1529
SYM_CODE_START(debug)
1530
	/*
1531
	 * Entry from sysenter is now handled in common_exception
1532
	 */
1533
	ASM_CLAC
1534
	pushl	$0
1535 1536
	pushl	$do_debug
	jmp	common_exception
1537
SYM_CODE_END(debug)
1538

1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580
#ifdef CONFIG_DOUBLEFAULT
SYM_CODE_START(double_fault)
1:
	/*
	 * This is a task gate handler, not an interrupt gate handler.
	 * The error code is on the stack, but the stack is otherwise
	 * empty.  Interrupts are off.  Our state is sane with the following
	 * exceptions:
	 *
	 *  - CR0.TS is set.  "TS" literally means "task switched".
	 *  - EFLAGS.NT is set because we're a "nested task".
	 *  - The doublefault TSS has back_link set and has been marked busy.
	 *  - TR points to the doublefault TSS and the normal TSS is busy.
	 *  - CR3 is the normal kernel PGD.  This would be delightful, except
	 *    that the CPU didn't bother to save the old CR3 anywhere.  This
	 *    would make it very awkward to return back to the context we came
	 *    from.
	 *
	 * The rest of EFLAGS is sanitized for us, so we don't need to
	 * worry about AC or DF.
	 *
	 * Don't even bother popping the error code.  It's always zero,
	 * and ignoring it makes us a bit more robust against buggy
	 * hypervisor task gate implementations.
	 *
	 * We will manually undo the task switch instead of doing a
	 * task-switching IRET.
	 */

	clts				/* clear CR0.TS */
	pushl	$X86_EFLAGS_FIXED
	popfl				/* clear EFLAGS.NT */

	call	doublefault_shim

	/* We don't support returning, so we have no IRET here. */
1:
	hlt
	jmp 1b
SYM_CODE_END(double_fault)
#endif

1581
/*
1582 1583 1584 1585 1586
 * NMI is doubly nasty.  It can happen on the first instruction of
 * entry_SYSENTER_32 (just like #DB), but it can also interrupt the beginning
 * of the #DB handler even if that #DB in turn hit before entry_SYSENTER_32
 * switched stacks.  We handle both conditions by simply checking whether we
 * interrupted kernel code running on the SYSENTER stack.
1587
 */
1588
SYM_CODE_START(nmi)
1589
	ASM_CLAC
1590

1591
#ifdef CONFIG_X86_ESPFIX32
P
Peter Zijlstra 已提交
1592 1593 1594 1595
	/*
	 * ESPFIX_SS is only ever set on the return to user path
	 * after we've switched to the entry stack.
	 */
1596 1597 1598 1599
	pushl	%eax
	movl	%ss, %eax
	cmpw	$__ESPFIX_SS, %ax
	popl	%eax
1600
	je	.Lnmi_espfix_stack
1601
#endif
1602 1603

	pushl	%eax				# pt_regs->orig_ax
1604
	SAVE_ALL_NMI cr3_reg=%edi
1605
	ENCODE_FRAME_POINTER
1606 1607
	xorl	%edx, %edx			# zero error code
	movl	%esp, %eax			# pt_regs pointer
1608 1609

	/* Are we currently on the SYSENTER stack? */
1610
	movl	PER_CPU_VAR(cpu_entry_area), %ecx
1611 1612 1613
	addl	$CPU_ENTRY_AREA_entry_stack + SIZEOF_entry_stack, %ecx
	subl	%eax, %ecx	/* ecx = (end of entry_stack) - esp */
	cmpl	$SIZEOF_entry_stack, %ecx
1614 1615 1616
	jb	.Lnmi_from_sysenter_stack

	/* Not on SYSENTER stack. */
1617
	call	do_nmi
1618
	jmp	.Lnmi_return
1619

1620 1621 1622 1623 1624
.Lnmi_from_sysenter_stack:
	/*
	 * We're on the SYSENTER stack.  Switch off.  No one (not even debug)
	 * is using the thread stack right now, so it's safe for us to use it.
	 */
1625
	movl	%esp, %ebx
1626 1627
	movl	PER_CPU_VAR(cpu_current_top_of_stack), %esp
	call	do_nmi
1628
	movl	%ebx, %esp
1629 1630

.Lnmi_return:
P
Peter Zijlstra 已提交
1631 1632 1633 1634 1635
#ifdef CONFIG_X86_ESPFIX32
	testl	$CS_FROM_ESPFIX, PT_CS(%esp)
	jnz	.Lnmi_from_espfix
#endif

1636
	CHECK_AND_APPLY_ESPFIX
1637
	RESTORE_ALL_NMI cr3_reg=%edi pop=4
1638
	jmp	.Lirq_return
1639

1640
#ifdef CONFIG_X86_ESPFIX32
1641
.Lnmi_espfix_stack:
1642
	/*
P
Peter Zijlstra 已提交
1643
	 * Create the pointer to LSS back
1644
	 */
1645 1646 1647
	pushl	%ss
	pushl	%esp
	addl	$4, (%esp)
P
Peter Zijlstra 已提交
1648 1649 1650 1651 1652 1653 1654 1655 1656

	/* Copy the (short) IRET frame */
	pushl	4*4(%esp)	# flags
	pushl	4*4(%esp)	# cs
	pushl	4*4(%esp)	# ip

	pushl	%eax		# orig_ax

	SAVE_ALL_NMI cr3_reg=%edi unwind_espfix=1
1657
	ENCODE_FRAME_POINTER
P
Peter Zijlstra 已提交
1658 1659 1660 1661

	/* clear CS_FROM_KERNEL, set CS_FROM_ESPFIX */
	xorl	$(CS_FROM_ESPFIX | CS_FROM_KERNEL), PT_CS(%esp)

1662
	xorl	%edx, %edx			# zero error code
P
Peter Zijlstra 已提交
1663 1664 1665 1666
	movl	%esp, %eax			# pt_regs pointer
	jmp	.Lnmi_from_sysenter_stack

.Lnmi_from_espfix:
1667
	RESTORE_ALL_NMI cr3_reg=%edi
P
Peter Zijlstra 已提交
1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678
	/*
	 * Because we cleared CS_FROM_KERNEL, IRET_FRAME 'forgot' to
	 * fix up the gap and long frame:
	 *
	 *  3 - original frame	(exception)
	 *  2 - ESPFIX block	(above)
	 *  6 - gap		(FIXUP_FRAME)
	 *  5 - long frame	(FIXUP_FRAME)
	 *  1 - orig_ax
	 */
	lss	(1+5+6)*4(%esp), %esp			# back to espfix stack
1679
	jmp	.Lirq_return
1680
#endif
1681
SYM_CODE_END(nmi)
1682

1683
SYM_CODE_START(int3)
1684
	ASM_CLAC
1685
	pushl	$0
1686 1687
	pushl	$do_int3
	jmp	common_exception
1688
SYM_CODE_END(int3)
1689

1690
SYM_CODE_START(general_protection)
1691
	ASM_CLAC
1692
	pushl	$do_general_protection
1693
	jmp	common_exception
1694
SYM_CODE_END(general_protection)
1695

G
Gleb Natapov 已提交
1696
#ifdef CONFIG_KVM_GUEST
1697
SYM_CODE_START(async_page_fault)
1698
	ASM_CLAC
1699
	pushl	$do_async_page_fault
1700
	jmp	common_exception_read_cr2
1701
SYM_CODE_END(async_page_fault)
G
Gleb Natapov 已提交
1702
#endif
1703

1704
SYM_CODE_START(rewind_stack_do_exit)
1705 1706 1707 1708 1709 1710 1711 1712
	/* Prevent any naive code from trying to unwind to our caller. */
	xorl	%ebp, %ebp

	movl	PER_CPU_VAR(cpu_current_top_of_stack), %esi
	leal	-TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%esi), %esp

	call	do_exit
1:	jmp 1b
1713
SYM_CODE_END(rewind_stack_do_exit)