cputable.c 66.9 KB
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/*
 *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
 *
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 *  Modifications for ppc64:
 *      Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
 *
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 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */

#include <linux/string.h>
#include <linux/sched.h>
#include <linux/threads.h>
#include <linux/init.h>
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#include <linux/export.h>
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#include <asm/oprofile_impl.h>
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#include <asm/cputable.h>
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#include <asm/prom.h>		/* for PTRRELOC on ARCH=ppc */
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#include <asm/mmu.h>
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#include <asm/setup.h>
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struct cpu_spec* cur_cpu_spec = NULL;
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EXPORT_SYMBOL(cur_cpu_spec);
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/* The platform string corresponding to the real PVR */
const char *powerpc_base_platform;

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/* NOTE:
 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
 * the responsibility of the appropriate CPU save/restore functions to
 * eventually copy these settings over. Those save/restore aren't yet
 * part of the cputable though. That has to be fixed for both ppc32
 * and ppc64
 */
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#ifdef CONFIG_PPC32
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extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
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extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
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extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
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#endif /* CONFIG_PPC32 */
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#ifdef CONFIG_PPC64
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extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);
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extern void __restore_cpu_pa6t(void);
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extern void __restore_cpu_ppc970(void);
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extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
extern void __restore_cpu_power7(void);
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extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
extern void __restore_cpu_power8(void);
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extern void __restore_cpu_a2(void);
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#endif /* CONFIG_PPC64 */
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#if defined(CONFIG_E500)
extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
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extern void __restore_cpu_e5500(void);
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extern void __restore_cpu_e6500(void);
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#endif /* CONFIG_E500 */
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/* This table only contains "desktop" CPUs, it need to be filled with embedded
 * ones as well...
 */
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#define COMMON_USER		(PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
				 PPC_FEATURE_HAS_MMU)
#define COMMON_USER_PPC64	(COMMON_USER | PPC_FEATURE_64)
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#define COMMON_USER_POWER4	(COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
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#define COMMON_USER_POWER5	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
#define COMMON_USER_POWER5_PLUS	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
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#define COMMON_USER_POWER6	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
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				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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				 PPC_FEATURE_TRUE_LE | \
				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
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#define COMMON_USER_POWER7	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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				 PPC_FEATURE_TRUE_LE | \
				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
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#define COMMON_USER2_POWER7	(PPC_FEATURE2_DSCR)
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#define COMMON_USER_POWER8	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
				 PPC_FEATURE_TRUE_LE | \
				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
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#define COMMON_USER_PA6T	(COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
				 PPC_FEATURE_TRUE_LE | \
				 PPC_FEATURE_HAS_ALTIVEC_COMP)
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#ifdef CONFIG_PPC_BOOK3E_64
#define COMMON_USER_BOOKE	(COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
#else
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#define COMMON_USER_BOOKE	(PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
				 PPC_FEATURE_BOOKE)
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#endif
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static struct cpu_spec __initdata cpu_specs[] = {
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#ifdef CONFIG_PPC_BOOK3S_64
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	{	/* Power3 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00400000,
		.cpu_name		= "POWER3 (630)",
		.cpu_features		= CPU_FTRS_POWER3,
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		.cpu_user_features	= COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power3",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "power3",
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	},
	{	/* Power3+ */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00410000,
		.cpu_name		= "POWER3 (630+)",
		.cpu_features		= CPU_FTRS_POWER3,
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		.cpu_user_features	= COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power3",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "power3",
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	},
	{	/* Northstar */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00330000,
		.cpu_name		= "RS64-II (northstar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "rs64",
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	},
	{	/* Pulsar */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00340000,
		.cpu_name		= "RS64-III (pulsar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "rs64",
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	},
	{	/* I-star */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00360000,
		.cpu_name		= "RS64-III (icestar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "rs64",
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	},
	{	/* S-star */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00370000,
		.cpu_name		= "RS64-IV (sstar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "rs64",
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	},
	{	/* Power4 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00350000,
		.cpu_name		= "POWER4 (gp)",
		.cpu_features		= CPU_FTRS_POWER4,
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		.cpu_user_features	= COMMON_USER_POWER4,
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		.mmu_features		= MMU_FTRS_POWER4,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power4",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.platform		= "power4",
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	},
	{	/* Power4+ */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00380000,
		.cpu_name		= "POWER4+ (gq)",
		.cpu_features		= CPU_FTRS_POWER4,
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		.cpu_user_features	= COMMON_USER_POWER4,
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		.mmu_features		= MMU_FTRS_POWER4,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power4",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.platform		= "power4",
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	},
	{	/* PPC970 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00390000,
		.cpu_name		= "PPC970",
		.cpu_features		= CPU_FTRS_PPC970,
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		.cpu_user_features	= COMMON_USER_POWER4 |
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			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTRS_PPC970,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
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		.cpu_restore		= __restore_cpu_ppc970,
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		.oprofile_cpu_type	= "ppc64/970",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.platform		= "ppc970",
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	},
	{	/* PPC970FX */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003c0000,
		.cpu_name		= "PPC970FX",
		.cpu_features		= CPU_FTRS_PPC970,
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		.cpu_user_features	= COMMON_USER_POWER4 |
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			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTRS_PPC970,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
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		.cpu_restore		= __restore_cpu_ppc970,
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		.oprofile_cpu_type	= "ppc64/970",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.platform		= "ppc970",
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	},
	{	/* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x00440100,
		.cpu_name		= "PPC970MP",
		.cpu_features		= CPU_FTRS_PPC970,
		.cpu_user_features	= COMMON_USER_POWER4 |
			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTRS_PPC970,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
		.cpu_restore		= __restore_cpu_ppc970,
		.oprofile_cpu_type	= "ppc64/970MP",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.platform		= "ppc970",
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	},
	{	/* PPC970MP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00440000,
		.cpu_name		= "PPC970MP",
		.cpu_features		= CPU_FTRS_PPC970,
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		.cpu_user_features	= COMMON_USER_POWER4 |
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			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTRS_PPC970,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
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		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970MP,
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		.cpu_restore		= __restore_cpu_ppc970,
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		.oprofile_cpu_type	= "ppc64/970MP",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.platform		= "ppc970",
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	},
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	{	/* PPC970GX */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00450000,
		.cpu_name		= "PPC970GX",
		.cpu_features		= CPU_FTRS_PPC970,
		.cpu_user_features	= COMMON_USER_POWER4 |
			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTRS_PPC970,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
		.oprofile_cpu_type	= "ppc64/970",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.platform		= "ppc970",
	},
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	{	/* Power5 GR */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003a0000,
		.cpu_name		= "POWER5 (gr)",
		.cpu_features		= CPU_FTRS_POWER5,
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		.cpu_user_features	= COMMON_USER_POWER5,
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		.mmu_features		= MMU_FTRS_POWER5,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power5",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		/* SIHV / SIPR bits are implemented on POWER4+ (GQ)
		 * and above but only works on POWER5 and above
		 */
		.oprofile_mmcra_sihv	= MMCRA_SIHV,
		.oprofile_mmcra_sipr	= MMCRA_SIPR,
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		.platform		= "power5",
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	},
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	{	/* Power5++ */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x003b0300,
		.cpu_name		= "POWER5+ (gs)",
		.cpu_features		= CPU_FTRS_POWER5,
		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
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		.mmu_features		= MMU_FTRS_POWER5,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
		.oprofile_cpu_type	= "ppc64/power5++",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.oprofile_mmcra_sihv	= MMCRA_SIHV,
		.oprofile_mmcra_sipr	= MMCRA_SIPR,
		.platform		= "power5+",
	},
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	{	/* Power5 GS */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003b0000,
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		.cpu_name		= "POWER5+ (gs)",
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		.cpu_features		= CPU_FTRS_POWER5,
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		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
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		.mmu_features		= MMU_FTRS_POWER5,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power5+",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.oprofile_mmcra_sihv	= MMCRA_SIHV,
		.oprofile_mmcra_sipr	= MMCRA_SIPR,
378
		.platform		= "power5+",
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	},
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	{	/* POWER6 in P5+ mode; 2.04-compliant processor */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x0f000001,
		.cpu_name		= "POWER5+",
		.cpu_features		= CPU_FTRS_POWER5,
		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
386
		.mmu_features		= MMU_FTRS_POWER5,
387 388
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
389 390
		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",
		.oprofile_type		= PPC_OPROFILE_POWER4,
391 392
		.platform		= "power5+",
	},
393 394 395
	{	/* Power6 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003e0000,
396 397 398 399
		.cpu_name		= "POWER6 (raw)",
		.cpu_features		= CPU_FTRS_POWER6,
		.cpu_user_features	= COMMON_USER_POWER6 |
			PPC_FEATURE_POWER6_EXT,
400
		.mmu_features		= MMU_FTRS_POWER6,
401 402 403
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
404
		.pmc_type		= PPC_PMC_IBM,
405 406 407 408 409 410 411 412 413 414 415 416
		.oprofile_cpu_type	= "ppc64/power6",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.oprofile_mmcra_sihv	= POWER6_MMCRA_SIHV,
		.oprofile_mmcra_sipr	= POWER6_MMCRA_SIPR,
		.oprofile_mmcra_clear	= POWER6_MMCRA_THRM |
			POWER6_MMCRA_OTHER,
		.platform		= "power6x",
	},
	{	/* 2.05-compliant processor, i.e. Power6 "architected" mode */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x0f000002,
		.cpu_name		= "POWER6 (architected)",
417 418
		.cpu_features		= CPU_FTRS_POWER6,
		.cpu_user_features	= COMMON_USER_POWER6,
419
		.mmu_features		= MMU_FTRS_POWER6,
420 421
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
422 423
		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",
		.oprofile_type		= PPC_OPROFILE_POWER4,
424 425
		.platform		= "power6",
	},
426 427 428 429 430 431
	{	/* 2.06-compliant processor, i.e. Power7 "architected" mode */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x0f000003,
		.cpu_name		= "POWER7 (architected)",
		.cpu_features		= CPU_FTRS_POWER7,
		.cpu_user_features	= COMMON_USER_POWER7,
432
		.cpu_user_features2	= COMMON_USER2_POWER7,
433
		.mmu_features		= MMU_FTRS_POWER7,
434 435
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
436 437
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",
438 439
		.cpu_setup		= __setup_cpu_power7,
		.cpu_restore		= __restore_cpu_power7,
440 441
		.platform		= "power7",
	},
442 443 444 445 446 447 448 449 450 451 452 453 454 455 456
	{	/* 2.07-compliant processor, i.e. Power8 "architected" mode */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x0f000004,
		.cpu_name		= "POWER8 (architected)",
		.cpu_features		= CPU_FTRS_POWER8,
		.cpu_user_features	= COMMON_USER_POWER8,
		.mmu_features		= MMU_FTRS_POWER8,
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",
		.cpu_setup		= __setup_cpu_power8,
		.cpu_restore		= __restore_cpu_power8,
		.platform		= "power8",
	},
457 458 459
	{	/* Power7 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003f0000,
460
		.cpu_name		= "POWER7 (raw)",
461 462
		.cpu_features		= CPU_FTRS_POWER7,
		.cpu_user_features	= COMMON_USER_POWER7,
463
		.cpu_user_features2	= COMMON_USER2_POWER7,
464
		.mmu_features		= MMU_FTRS_POWER7,
465 466 467 468 469 470
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
		.pmc_type		= PPC_PMC_IBM,
		.oprofile_cpu_type	= "ppc64/power7",
		.oprofile_type		= PPC_OPROFILE_POWER4,
471 472
		.cpu_setup		= __setup_cpu_power7,
		.cpu_restore		= __restore_cpu_power7,
473 474
		.platform		= "power7",
	},
475 476 477 478 479 480
	{	/* Power7+ */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x004A0000,
		.cpu_name		= "POWER7+ (raw)",
		.cpu_features		= CPU_FTRS_POWER7,
		.cpu_user_features	= COMMON_USER_POWER7,
481
		.cpu_user_features	= COMMON_USER2_POWER7,
482
		.mmu_features		= MMU_FTRS_POWER7,
483 484 485 486 487 488
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
		.pmc_type		= PPC_PMC_IBM,
		.oprofile_cpu_type	= "ppc64/power7",
		.oprofile_type		= PPC_OPROFILE_POWER4,
489 490
		.cpu_setup		= __setup_cpu_power7,
		.cpu_restore		= __restore_cpu_power7,
491 492
		.platform		= "power7+",
	},
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	{	/* Power8 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x004b0000,
		.cpu_name		= "POWER8 (raw)",
		.cpu_features		= CPU_FTRS_POWER8,
		.cpu_user_features	= COMMON_USER_POWER8,
		.mmu_features		= MMU_FTRS_POWER8,
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
		.pmc_type		= PPC_PMC_IBM,
		.oprofile_cpu_type	= "ppc64/power8",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.cpu_setup		= __setup_cpu_power8,
		.cpu_restore		= __restore_cpu_power8,
		.platform		= "power8",
	},
510
	{	/* Cell Broadband Engine */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00700000,
		.cpu_name		= "Cell Broadband Engine",
		.cpu_features		= CPU_FTRS_CELL,
		.cpu_user_features	= COMMON_USER_PPC64 |
516 517
			PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
			PPC_FEATURE_SMT,
518
		.mmu_features		= MMU_FTRS_CELL,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
521
		.num_pmcs		= 4,
522
		.pmc_type		= PPC_PMC_IBM,
523 524
		.oprofile_cpu_type	= "ppc64/cell-be",
		.oprofile_type		= PPC_OPROFILE_CELL,
525
		.platform		= "ppc-cell-be",
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	},
527 528 529 530 531 532
	{	/* PA Semi PA6T */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00900000,
		.cpu_name		= "PA6T",
		.cpu_features		= CPU_FTRS_PA6T,
		.cpu_user_features	= COMMON_USER_PA6T,
533
		.mmu_features		= MMU_FTRS_PA6T,
534 535 536
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 6,
537
		.pmc_type		= PPC_PMC_PA6T,
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		.cpu_setup		= __setup_cpu_pa6t,
		.cpu_restore		= __restore_cpu_pa6t,
540 541
		.oprofile_cpu_type	= "ppc64/pa6t",
		.oprofile_type		= PPC_OPROFILE_PA6T,
542 543
		.platform		= "pa6t",
	},
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	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "POWER4 (compatible)",
		.cpu_features		= CPU_FTRS_COMPATIBLE,
		.cpu_user_features	= COMMON_USER_PPC64,
550
		.mmu_features		= MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
554
		.pmc_type		= PPC_PMC_IBM,
555
		.platform		= "power4",
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	}
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#endif	/* CONFIG_PPC_BOOK3S_64 */

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#ifdef CONFIG_PPC32
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#if CLASSIC_PPC
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	{	/* 601 */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00010000,
		.cpu_name		= "601",
565
		.cpu_features		= CPU_FTRS_PPC601,
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		.cpu_user_features	= COMMON_USER | PPC_FEATURE_601_INSTR |
567
			PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
568
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
571
		.machine_check		= machine_check_generic,
572
		.platform		= "ppc601",
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	},
	{	/* 603 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00030000,
		.cpu_name		= "603",
578
		.cpu_features		= CPU_FTRS_603,
579
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
580
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
583
		.cpu_setup		= __setup_cpu_603,
584
		.machine_check		= machine_check_generic,
585
		.platform		= "ppc603",
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	},
	{	/* 603e */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00060000,
		.cpu_name		= "603e",
591
		.cpu_features		= CPU_FTRS_603,
592
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
593
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
596
		.cpu_setup		= __setup_cpu_603,
597
		.machine_check		= machine_check_generic,
598
		.platform		= "ppc603",
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	},
	{	/* 603ev */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00070000,
		.cpu_name		= "603ev",
604
		.cpu_features		= CPU_FTRS_603,
605
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
606
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
609
		.cpu_setup		= __setup_cpu_603,
610
		.machine_check		= machine_check_generic,
611
		.platform		= "ppc603",
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	},
	{	/* 604 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00040000,
		.cpu_name		= "604",
617
		.cpu_features		= CPU_FTRS_604,
618
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
619
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 2,
623
		.cpu_setup		= __setup_cpu_604,
624
		.machine_check		= machine_check_generic,
625
		.platform		= "ppc604",
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	},
	{	/* 604e */
		.pvr_mask		= 0xfffff000,
		.pvr_value		= 0x00090000,
		.cpu_name		= "604e",
631
		.cpu_features		= CPU_FTRS_604,
632
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
633
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
637
		.cpu_setup		= __setup_cpu_604,
638
		.machine_check		= machine_check_generic,
639
		.platform		= "ppc604",
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	},
	{	/* 604r */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00090000,
		.cpu_name		= "604r",
645
		.cpu_features		= CPU_FTRS_604,
646
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
647
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
651
		.cpu_setup		= __setup_cpu_604,
652
		.machine_check		= machine_check_generic,
653
		.platform		= "ppc604",
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	},
	{	/* 604ev */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x000a0000,
		.cpu_name		= "604ev",
659
		.cpu_features		= CPU_FTRS_604,
660
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
661
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
665
		.cpu_setup		= __setup_cpu_604,
666
		.machine_check		= machine_check_generic,
667
		.platform		= "ppc604",
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	},
	{	/* 740/750 (0x4202, don't support TAU ?) */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x00084202,
		.cpu_name		= "740/750",
673
		.cpu_features		= CPU_FTRS_740_NOTAU,
674
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
675
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
679
		.cpu_setup		= __setup_cpu_750,
680
		.machine_check		= machine_check_generic,
681
		.platform		= "ppc750",
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	},
	{	/* 750CX (80100 and 8010x?) */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x00080100,
		.cpu_name		= "750CX",
687
		.cpu_features		= CPU_FTRS_750,
688
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
689
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
693
		.cpu_setup		= __setup_cpu_750cx,
694
		.machine_check		= machine_check_generic,
695
		.platform		= "ppc750",
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	},
	{	/* 750CX (82201 and 82202) */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x00082200,
		.cpu_name		= "750CX",
701
		.cpu_features		= CPU_FTRS_750,
702
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
703
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
707
		.pmc_type		= PPC_PMC_IBM,
708
		.cpu_setup		= __setup_cpu_750cx,
709
		.machine_check		= machine_check_generic,
710
		.platform		= "ppc750",
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	},
	{	/* 750CXe (82214) */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x00082210,
		.cpu_name		= "750CXe",
716
		.cpu_features		= CPU_FTRS_750,
717
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
718
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
722
		.pmc_type		= PPC_PMC_IBM,
723
		.cpu_setup		= __setup_cpu_750cx,
724
		.machine_check		= machine_check_generic,
725
		.platform		= "ppc750",
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	},
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	{	/* 750CXe "Gekko" (83214) */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x00083214,
		.cpu_name		= "750CXe",
731
		.cpu_features		= CPU_FTRS_750,
732
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
733
		.mmu_features		= MMU_FTR_HPTE_TABLE,
734 735 736
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
737
		.pmc_type		= PPC_PMC_IBM,
738
		.cpu_setup		= __setup_cpu_750cx,
739
		.machine_check		= machine_check_generic,
740
		.platform		= "ppc750",
741
	},
742 743 744
	{	/* 750CL (and "Broadway") */
		.pvr_mask		= 0xfffff0e0,
		.pvr_value		= 0x00087000,
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		.cpu_name		= "750CL",
746
		.cpu_features		= CPU_FTRS_750CL,
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		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
748
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
752
		.pmc_type		= PPC_PMC_IBM,
753
		.cpu_setup		= __setup_cpu_750,
754
		.machine_check		= machine_check_generic,
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		.platform		= "ppc750",
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		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
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	{	/* 745/755 */
		.pvr_mask		= 0xfffff000,
		.pvr_value		= 0x00083000,
		.cpu_name		= "745/755",
763
		.cpu_features		= CPU_FTRS_750,
764
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
765
		.mmu_features		= MMU_FTR_HPTE_TABLE,
766 767 768
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
769
		.pmc_type		= PPC_PMC_IBM,
770
		.cpu_setup		= __setup_cpu_750,
771
		.machine_check		= machine_check_generic,
772
		.platform		= "ppc750",
773
	},
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	{	/* 750FX rev 1.x */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x70000100,
		.cpu_name		= "750FX",
778
		.cpu_features		= CPU_FTRS_750FX1,
779
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
780
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
784
		.pmc_type		= PPC_PMC_IBM,
785
		.cpu_setup		= __setup_cpu_750,
786
		.machine_check		= machine_check_generic,
787
		.platform		= "ppc750",
788 789
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 750FX rev 2.0 must disable HID0[DPM] */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x70000200,
		.cpu_name		= "750FX",
795
		.cpu_features		= CPU_FTRS_750FX2,
796
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
797
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
801
		.pmc_type		= PPC_PMC_IBM,
802
		.cpu_setup		= __setup_cpu_750,
803
		.machine_check		= machine_check_generic,
804
		.platform		= "ppc750",
805 806
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 750FX (All revs except 2.0) */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x70000000,
		.cpu_name		= "750FX",
812
		.cpu_features		= CPU_FTRS_750FX,
813
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
814
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
818
		.pmc_type		= PPC_PMC_IBM,
819
		.cpu_setup		= __setup_cpu_750fx,
820
		.machine_check		= machine_check_generic,
821
		.platform		= "ppc750",
822 823
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 750GX */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x70020000,
		.cpu_name		= "750GX",
829
		.cpu_features		= CPU_FTRS_750GX,
830
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
831
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
835
		.pmc_type		= PPC_PMC_IBM,
836
		.cpu_setup		= __setup_cpu_750fx,
837
		.machine_check		= machine_check_generic,
838
		.platform		= "ppc750",
839 840
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 740/750 (L2CR bit need fixup for 740) */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00080000,
		.cpu_name		= "740/750",
846
		.cpu_features		= CPU_FTRS_740,
847
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
848
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
852
		.pmc_type		= PPC_PMC_IBM,
853
		.cpu_setup		= __setup_cpu_750,
854
		.machine_check		= machine_check_generic,
855
		.platform		= "ppc750",
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	},
	{	/* 7400 rev 1.1 ? (no TAU) */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x000c1101,
		.cpu_name		= "7400 (1.1)",
861
		.cpu_features		= CPU_FTRS_7400_NOTAU,
862 863
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
864
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
868
		.pmc_type		= PPC_PMC_G4,
869
		.cpu_setup		= __setup_cpu_7400,
870
		.machine_check		= machine_check_generic,
871
		.platform		= "ppc7400",
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	},
	{	/* 7400 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x000c0000,
		.cpu_name		= "7400",
877
		.cpu_features		= CPU_FTRS_7400,
878 879
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
880
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
884
		.pmc_type		= PPC_PMC_G4,
885
		.cpu_setup		= __setup_cpu_7400,
886
		.machine_check		= machine_check_generic,
887
		.platform		= "ppc7400",
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	},
	{	/* 7410 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x800c0000,
		.cpu_name		= "7410",
893
		.cpu_features		= CPU_FTRS_7400,
894 895
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
896
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
900
		.pmc_type		= PPC_PMC_G4,
901
		.cpu_setup		= __setup_cpu_7410,
902
		.machine_check		= machine_check_generic,
903
		.platform		= "ppc7400",
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	},
	{	/* 7450 2.0 - no doze/nap */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80000200,
		.cpu_name		= "7450",
909
		.cpu_features		= CPU_FTRS_7450_20,
910 911
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
912
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
916
		.pmc_type		= PPC_PMC_G4,
917 918
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
919
		.oprofile_type		= PPC_OPROFILE_G4,
920
		.machine_check		= machine_check_generic,
921
		.platform		= "ppc7450",
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	},
	{	/* 7450 2.1 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80000201,
		.cpu_name		= "7450",
927
		.cpu_features		= CPU_FTRS_7450_21,
928 929
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
930
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
934
		.pmc_type		= PPC_PMC_G4,
935 936
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
937
		.oprofile_type		= PPC_OPROFILE_G4,
938
		.machine_check		= machine_check_generic,
939
		.platform		= "ppc7450",
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	},
	{	/* 7450 2.3 and newer */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80000000,
		.cpu_name		= "7450",
945
		.cpu_features		= CPU_FTRS_7450_23,
946 947
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
948
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
952
		.pmc_type		= PPC_PMC_G4,
953 954
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
955
		.oprofile_type		= PPC_OPROFILE_G4,
956
		.machine_check		= machine_check_generic,
957
		.platform		= "ppc7450",
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	},
	{	/* 7455 rev 1.x */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x80010100,
		.cpu_name		= "7455",
963
		.cpu_features		= CPU_FTRS_7455_1,
964 965
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
966
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
970
		.pmc_type		= PPC_PMC_G4,
971 972
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
973
		.oprofile_type		= PPC_OPROFILE_G4,
974
		.machine_check		= machine_check_generic,
975
		.platform		= "ppc7450",
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	},
	{	/* 7455 rev 2.0 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80010200,
		.cpu_name		= "7455",
981
		.cpu_features		= CPU_FTRS_7455_20,
982 983
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
984
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
988
		.pmc_type		= PPC_PMC_G4,
989 990
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
991
		.oprofile_type		= PPC_OPROFILE_G4,
992
		.machine_check		= machine_check_generic,
993
		.platform		= "ppc7450",
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	},
	{	/* 7455 others */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80010000,
		.cpu_name		= "7455",
999
		.cpu_features		= CPU_FTRS_7455,
1000 1001
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1002
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1006
		.pmc_type		= PPC_PMC_G4,
1007 1008
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1009
		.oprofile_type		= PPC_OPROFILE_G4,
1010
		.machine_check		= machine_check_generic,
1011
		.platform		= "ppc7450",
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	},
	{	/* 7447/7457 Rev 1.0 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80020100,
		.cpu_name		= "7447/7457",
1017
		.cpu_features		= CPU_FTRS_7447_10,
1018 1019
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1020
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1024
		.pmc_type		= PPC_PMC_G4,
1025 1026
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1027
		.oprofile_type		= PPC_OPROFILE_G4,
1028
		.machine_check		= machine_check_generic,
1029
		.platform		= "ppc7450",
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	},
	{	/* 7447/7457 Rev 1.1 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80020101,
		.cpu_name		= "7447/7457",
1035
		.cpu_features		= CPU_FTRS_7447_10,
1036 1037
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1038
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1042
		.pmc_type		= PPC_PMC_G4,
1043 1044
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1045
		.oprofile_type		= PPC_OPROFILE_G4,
1046
		.machine_check		= machine_check_generic,
1047
		.platform		= "ppc7450",
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	},
	{	/* 7447/7457 Rev 1.2 and later */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80020000,
		.cpu_name		= "7447/7457",
1053
		.cpu_features		= CPU_FTRS_7447,
1054
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1055
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1059
		.pmc_type		= PPC_PMC_G4,
1060 1061
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1062
		.oprofile_type		= PPC_OPROFILE_G4,
1063
		.machine_check		= machine_check_generic,
1064
		.platform		= "ppc7450",
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	},
	{	/* 7447A */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80030000,
		.cpu_name		= "7447A",
1070
		.cpu_features		= CPU_FTRS_7447A,
1071 1072
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1073
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1074 1075 1076
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1077
		.pmc_type		= PPC_PMC_G4,
1078 1079
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1080
		.oprofile_type		= PPC_OPROFILE_G4,
1081
		.machine_check		= machine_check_generic,
1082
		.platform		= "ppc7450",
1083 1084 1085 1086 1087
	},
	{	/* 7448 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80040000,
		.cpu_name		= "7448",
1088
		.cpu_features		= CPU_FTRS_7448,
1089 1090
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1091
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1095
		.pmc_type		= PPC_PMC_G4,
1096 1097
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1098
		.oprofile_type		= PPC_OPROFILE_G4,
1099
		.machine_check		= machine_check_generic,
1100
		.platform		= "ppc7450",
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	},
	{	/* 82xx (8240, 8245, 8260 are all 603e cores) */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00810000,
		.cpu_name		= "82xx",
1106
		.cpu_features		= CPU_FTRS_82XX,
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		.cpu_user_features	= COMMON_USER,
1108
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1111
		.cpu_setup		= __setup_cpu_603,
1112
		.machine_check		= machine_check_generic,
1113
		.platform		= "ppc603",
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	},
	{	/* All G2_LE (603e core, plus some) have the same pvr */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00820000,
		.cpu_name		= "G2_LE",
1119
		.cpu_features		= CPU_FTRS_G2_LE,
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		.cpu_user_features	= COMMON_USER,
1121
		.mmu_features		= MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1124
		.cpu_setup		= __setup_cpu_603,
1125
		.machine_check		= machine_check_generic,
1126
		.platform		= "ppc603",
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	},
1128
	{	/* e300c1 (a 603e core, plus some) on 83xx */
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		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00830000,
1131
		.cpu_name		= "e300c1",
1132
		.cpu_features		= CPU_FTRS_E300,
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		.cpu_user_features	= COMMON_USER,
1134
		.mmu_features		= MMU_FTR_USE_HIGH_BATS,
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1135 1136
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1137
		.cpu_setup		= __setup_cpu_603,
1138
		.machine_check		= machine_check_generic,
1139
		.platform		= "ppc603",
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	},
1141 1142 1143 1144
	{	/* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00840000,
		.cpu_name		= "e300c2",
1145
		.cpu_features		= CPU_FTRS_E300C2,
1146
		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1147 1148
		.mmu_features		= MMU_FTR_USE_HIGH_BATS |
			MMU_FTR_NEED_DTLB_SW_LRU,
1149 1150 1151
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_603,
1152
		.machine_check		= machine_check_generic,
1153 1154
		.platform		= "ppc603",
	},
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	{	/* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1156 1157 1158 1159 1160
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00850000,
		.cpu_name		= "e300c3",
		.cpu_features		= CPU_FTRS_E300,
		.cpu_user_features	= COMMON_USER,
1161 1162
		.mmu_features		= MMU_FTR_USE_HIGH_BATS |
			MMU_FTR_NEED_DTLB_SW_LRU,
1163 1164 1165
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_603,
1166 1167 1168
		.num_pmcs		= 4,
		.oprofile_cpu_type	= "ppc/e300",
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
1169 1170
		.platform		= "ppc603",
	},
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	{	/* e300c4 (e300c1, plus one IU) */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00860000,
		.cpu_name		= "e300c4",
		.cpu_features		= CPU_FTRS_E300,
		.cpu_user_features	= COMMON_USER,
1177 1178
		.mmu_features		= MMU_FTR_USE_HIGH_BATS |
			MMU_FTR_NEED_DTLB_SW_LRU,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_603,
1182
		.machine_check		= machine_check_generic,
1183 1184 1185
		.num_pmcs		= 4,
		.oprofile_cpu_type	= "ppc/e300",
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
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		.platform		= "ppc603",
	},
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	{	/* default match, we assume split I/D cache & TB (non-601)... */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic PPC)",
1192
		.cpu_features		= CPU_FTRS_CLASSIC32,
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		.cpu_user_features	= COMMON_USER,
1194
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1197
		.machine_check		= machine_check_generic,
1198
		.platform		= "ppc603",
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	},
#endif /* CLASSIC_PPC */
#ifdef CONFIG_8xx
	{	/* 8xx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00500000,
		.cpu_name		= "8xx",
		/* CPU_FTR_MAYBE_CAN_DOZE is possible,
		 * if the 8xx code is there.... */
1208
		.cpu_features		= CPU_FTRS_8XX,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1210
		.mmu_features		= MMU_FTR_TYPE_8xx,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1213
		.platform		= "ppc823",
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1214 1215 1216 1217 1218 1219 1220
	},
#endif /* CONFIG_8xx */
#ifdef CONFIG_40x
	{	/* 403GC */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x00200200,
		.cpu_name		= "403GC",
1221
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1223
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1226
		.machine_check		= machine_check_4xx,
1227
		.platform		= "ppc403",
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	},
	{	/* 403GCX */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x00201400,
		.cpu_name		= "403GCX",
1233
		.cpu_features		= CPU_FTRS_40X,
1234 1235
		.cpu_user_features	= PPC_FEATURE_32 |
		 	PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1236
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1239
		.machine_check		= machine_check_4xx,
1240
		.platform		= "ppc403",
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	},
	{	/* 403G ?? */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00200000,
		.cpu_name		= "403G ??",
1246
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1248
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1251
		.machine_check		= machine_check_4xx,
1252
		.platform		= "ppc403",
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	},
	{	/* 405GP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x40110000,
		.cpu_name		= "405GP",
1258
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1261
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1264
		.machine_check		= machine_check_4xx,
1265
		.platform		= "ppc405",
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	},
	{	/* STB 03xxx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x40130000,
		.cpu_name		= "STB03xxx",
1271
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1274
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1277
		.machine_check		= machine_check_4xx,
1278
		.platform		= "ppc405",
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	},
	{	/* STB 04xxx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41810000,
		.cpu_name		= "STB04xxx",
1284
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1287
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1290
		.machine_check		= machine_check_4xx,
1291
		.platform		= "ppc405",
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	},
	{	/* NP405L */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41610000,
		.cpu_name		= "NP405L",
1297
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1300
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1303
		.machine_check		= machine_check_4xx,
1304
		.platform		= "ppc405",
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	},
	{	/* NP4GS3 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x40B10000,
		.cpu_name		= "NP4GS3",
1310
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1313
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1316
		.machine_check		= machine_check_4xx,
1317
		.platform		= "ppc405",
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	},
	{   /* NP405H */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41410000,
		.cpu_name		= "NP405H",
1323
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1326
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1329
		.machine_check		= machine_check_4xx,
1330
		.platform		= "ppc405",
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	},
	{	/* 405GPr */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x50910000,
		.cpu_name		= "405GPr",
1336
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1339
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1342
		.machine_check		= machine_check_4xx,
1343
		.platform		= "ppc405",
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	},
	{   /* STBx25xx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x51510000,
		.cpu_name		= "STBx25xx",
1349
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1352
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1355
		.machine_check		= machine_check_4xx,
1356
		.platform		= "ppc405",
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	},
	{	/* 405LP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41F10000,
		.cpu_name		= "405LP",
1362
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1364
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1367
		.machine_check		= machine_check_4xx,
1368
		.platform		= "ppc405",
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	},
	{	/* Xilinx Virtex-II Pro  */
1371
		.pvr_mask		= 0xfffff000,
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		.pvr_value		= 0x20010000,
		.cpu_name		= "Virtex-II Pro",
1374
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1377
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1380
		.machine_check		= machine_check_4xx,
1381
		.platform		= "ppc405",
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	},
1383 1384 1385 1386 1387 1388 1389
	{	/* Xilinx Virtex-4 FX */
		.pvr_mask		= 0xfffff000,
		.pvr_value		= 0x20011000,
		.cpu_name		= "Virtex-4 FX",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1390
		.mmu_features		= MMU_FTR_TYPE_40x,
1391 1392
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1393
		.machine_check		= machine_check_4xx,
1394
		.platform		= "ppc405",
1395
	},
1396 1397 1398 1399
	{	/* 405EP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x51210000,
		.cpu_name		= "405EP",
1400
		.cpu_features		= CPU_FTRS_40X,
1401 1402
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1403
		.mmu_features		= MMU_FTR_TYPE_40x,
1404 1405
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1406
		.machine_check		= machine_check_4xx,
1407 1408
		.platform		= "ppc405",
	},
1409 1410 1411 1412
	{	/* 405EX Rev. A/B with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910007,
		.cpu_name		= "405EX Rev. A/B",
1413
		.cpu_features		= CPU_FTRS_40X,
1414 1415
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1416
		.mmu_features		= MMU_FTR_TYPE_40x,
1417 1418
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1419
		.machine_check		= machine_check_4xx,
1420
		.platform		= "ppc405",
1421
	},
1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514
	{	/* 405EX Rev. C without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x1291000d,
		.cpu_name		= "405EX Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EX Rev. C with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x1291000f,
		.cpu_name		= "405EX Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EX Rev. D without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910003,
		.cpu_name		= "405EX Rev. D",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EX Rev. D with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910005,
		.cpu_name		= "405EX Rev. D",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. A/B without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910001,
		.cpu_name		= "405EXr Rev. A/B",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. C without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910009,
		.cpu_name		= "405EXr Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. C with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x1291000b,
		.cpu_name		= "405EXr Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. D without Security */
		.pvr_mask		= 0xffff000f,
1515
		.pvr_value		= 0x12910000,
1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529
		.cpu_name		= "405EXr Rev. D",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. D with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910002,
		.cpu_name		= "405EXr Rev. D",
1530 1531 1532
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1533
		.mmu_features		= MMU_FTR_TYPE_40x,
1534 1535 1536 1537 1538
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
1539 1540 1541 1542 1543 1544 1545 1546
	{
		/* 405EZ */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41510000,
		.cpu_name		= "405EZ",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1547
		.mmu_features		= MMU_FTR_TYPE_40x,
1548 1549 1550 1551 1552
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565
	{	/* APM8018X */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x7ff11432,
		.cpu_name		= "APM8018X",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
1566 1567 1568 1569 1570 1571 1572
	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic 40x PPC)",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1573
		.mmu_features		= MMU_FTR_TYPE_40x,
1574 1575 1576 1577 1578
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	}
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1579 1580 1581

#endif /* CONFIG_40x */
#ifdef CONFIG_44x
M
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1582 1583 1584
	{
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000850,
1585 1586 1587
		.cpu_name		= "440GR Rev. A",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1588
		.mmu_features		= MMU_FTR_TYPE_44x,
1589 1590
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1591
		.machine_check		= machine_check_4xx,
1592 1593 1594 1595 1596
		.platform		= "ppc440",
	},
	{ /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000858,
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1597
		.cpu_name		= "440EP Rev. A",
1598
		.cpu_features		= CPU_FTRS_44X,
1599
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1600
		.mmu_features		= MMU_FTR_TYPE_44x,
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Matt Porter 已提交
1601 1602
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1603
		.cpu_setup		= __setup_cpu_440ep,
1604
		.machine_check		= machine_check_4xx,
1605
		.platform		= "ppc440",
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1606 1607 1608 1609
	},
	{
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x400008d3,
1610
		.cpu_name		= "440GR Rev. B",
1611
		.cpu_features		= CPU_FTRS_44X,
1612
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1613
		.mmu_features		= MMU_FTR_TYPE_44x,
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Matt Porter 已提交
1614 1615
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1616
		.machine_check		= machine_check_4xx,
1617
		.platform		= "ppc440",
M
Matt Porter 已提交
1618
	},
1619 1620 1621 1622 1623 1624
	{ /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000ff7,
		.pvr_value		= 0x400008d4,
		.cpu_name		= "440EP Rev. C",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1625
		.mmu_features		= MMU_FTR_TYPE_44x,
1626 1627 1628 1629 1630 1631
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_440ep,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc440",
	},
1632 1633 1634 1635
	{ /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x400008db,
		.cpu_name		= "440EP Rev. B",
1636 1637
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1638
		.mmu_features		= MMU_FTR_TYPE_44x,
1639 1640
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1641
		.cpu_setup		= __setup_cpu_440ep,
1642
		.machine_check		= machine_check_4xx,
1643
		.platform		= "ppc440",
1644 1645 1646
	},
	{ /* 440GRX */
		.pvr_mask		= 0xf0000ffb,
1647
		.pvr_value		= 0x200008D0,
1648 1649 1650
		.cpu_name		= "440GRX",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1651
		.mmu_features		= MMU_FTR_TYPE_44x,
1652 1653
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1654
		.cpu_setup		= __setup_cpu_440grx,
1655
		.machine_check		= machine_check_440A,
1656
		.platform		= "ppc440",
1657
	},
1658 1659 1660 1661 1662 1663
	{ /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000ffb,
		.pvr_value		= 0x200008D8,
		.cpu_name		= "440EPX",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1664
		.mmu_features		= MMU_FTR_TYPE_44x,
1665 1666 1667
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_440epx,
1668
		.machine_check		= machine_check_440A,
1669 1670
		.platform		= "ppc440",
	},
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Stephen Rothwell 已提交
1671
	{	/* 440GP Rev. B */
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Linus Torvalds 已提交
1672 1673 1674
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000440,
		.cpu_name		= "440GP Rev. B",
1675
		.cpu_features		= CPU_FTRS_44X,
1676
		.cpu_user_features	= COMMON_USER_BOOKE,
1677
		.mmu_features		= MMU_FTR_TYPE_44x,
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Linus Torvalds 已提交
1678 1679
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1680
		.machine_check		= machine_check_4xx,
1681
		.platform		= "ppc440gp",
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Linus Torvalds 已提交
1682
	},
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1683
	{	/* 440GP Rev. C */
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Linus Torvalds 已提交
1684 1685 1686
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000481,
		.cpu_name		= "440GP Rev. C",
1687
		.cpu_features		= CPU_FTRS_44X,
1688
		.cpu_user_features	= COMMON_USER_BOOKE,
1689
		.mmu_features		= MMU_FTR_TYPE_44x,
L
Linus Torvalds 已提交
1690 1691
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1692
		.machine_check		= machine_check_4xx,
1693
		.platform		= "ppc440gp",
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Linus Torvalds 已提交
1694 1695 1696 1697 1698
	},
	{ /* 440GX Rev. A */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000850,
		.cpu_name		= "440GX Rev. A",
1699
		.cpu_features		= CPU_FTRS_44X,
1700
		.cpu_user_features	= COMMON_USER_BOOKE,
1701
		.mmu_features		= MMU_FTR_TYPE_44x,
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Linus Torvalds 已提交
1702 1703
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1704 1705
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1706
		.platform		= "ppc440",
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Linus Torvalds 已提交
1707 1708 1709 1710 1711
	},
	{ /* 440GX Rev. B */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000851,
		.cpu_name		= "440GX Rev. B",
1712
		.cpu_features		= CPU_FTRS_44X,
1713
		.cpu_user_features	= COMMON_USER_BOOKE,
1714
		.mmu_features		= MMU_FTR_TYPE_44x,
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Linus Torvalds 已提交
1715 1716
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1717 1718
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1719
		.platform		= "ppc440",
L
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1720 1721 1722 1723 1724
	},
	{ /* 440GX Rev. C */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000892,
		.cpu_name		= "440GX Rev. C",
1725
		.cpu_features		= CPU_FTRS_44X,
1726
		.cpu_user_features	= COMMON_USER_BOOKE,
1727
		.mmu_features		= MMU_FTR_TYPE_44x,
L
Linus Torvalds 已提交
1728 1729
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1730 1731
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1732
		.platform		= "ppc440",
L
Linus Torvalds 已提交
1733
	},
1734 1735 1736 1737
	{ /* 440GX Rev. F */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000894,
		.cpu_name		= "440GX Rev. F",
1738
		.cpu_features		= CPU_FTRS_44X,
1739
		.cpu_user_features	= COMMON_USER_BOOKE,
1740
		.mmu_features		= MMU_FTR_TYPE_44x,
1741 1742
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1743 1744
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1745
		.platform		= "ppc440",
1746
	},
1747
	{ /* 440SP Rev. A */
1748 1749
		.pvr_mask		= 0xfff00fff,
		.pvr_value		= 0x53200891,
1750
		.cpu_name		= "440SP Rev. A",
1751
		.cpu_features		= CPU_FTRS_44X,
1752
		.cpu_user_features	= COMMON_USER_BOOKE,
1753
		.mmu_features		= MMU_FTR_TYPE_44x,
1754 1755
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1756
		.machine_check		= machine_check_4xx,
1757
		.platform		= "ppc440",
1758
	},
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Roland Dreier 已提交
1759
	{ /* 440SPe Rev. A */
1760 1761 1762 1763 1764
		.pvr_mask               = 0xfff00fff,
		.pvr_value              = 0x53400890,
		.cpu_name               = "440SPe Rev. A",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features      = COMMON_USER_BOOKE,
1765
		.mmu_features		= MMU_FTR_TYPE_44x,
1766 1767
		.icache_bsize           = 32,
		.dcache_bsize           = 32,
1768 1769
		.cpu_setup		= __setup_cpu_440spe,
		.machine_check		= machine_check_440A,
1770 1771 1772 1773 1774 1775
		.platform               = "ppc440",
	},
	{ /* 440SPe Rev. B */
		.pvr_mask		= 0xfff00fff,
		.pvr_value		= 0x53400891,
		.cpu_name		= "440SPe Rev. B",
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Kumar Gala 已提交
1776
		.cpu_features		= CPU_FTRS_44X,
1777
		.cpu_user_features	= COMMON_USER_BOOKE,
1778
		.mmu_features		= MMU_FTR_TYPE_44x,
R
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1779 1780
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1781 1782
		.cpu_setup		= __setup_cpu_440spe,
		.machine_check		= machine_check_440A,
1783
		.platform		= "ppc440",
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Roland Dreier 已提交
1784
	},
1785 1786 1787 1788 1789 1790
	{ /* 440 in Xilinx Virtex-5 FXT */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x7ff21910,
		.cpu_name		= "440 in Virtex-5 FXT",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1791
		.mmu_features		= MMU_FTR_TYPE_44x,
1792 1793
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1794 1795
		.cpu_setup		= __setup_cpu_440x5,
		.machine_check		= machine_check_440A,
1796 1797
		.platform		= "ppc440",
	},
1798
	{ /* 460EX */
1799
		.pvr_mask		= 0xffff0006,
1800 1801
		.pvr_value		= 0x13020002,
		.cpu_name		= "460EX",
1802
		.cpu_features		= CPU_FTRS_440x6,
1803
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1804
		.mmu_features		= MMU_FTR_TYPE_44x,
1805 1806 1807 1808 1809 1810
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460ex,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823
	{ /* 460EX Rev B */
		.pvr_mask		= 0xffff0007,
		.pvr_value		= 0x13020004,
		.cpu_name		= "460EX Rev. B",
		.cpu_features		= CPU_FTRS_440x6,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_44x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460ex,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1824
	{ /* 460GT */
1825
		.pvr_mask		= 0xffff0006,
1826 1827
		.pvr_value		= 0x13020000,
		.cpu_name		= "460GT",
1828
		.cpu_features		= CPU_FTRS_440x6,
1829
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1830
		.mmu_features		= MMU_FTR_TYPE_44x,
1831 1832
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1833
		.cpu_setup		= __setup_cpu_460gt,
1834 1835 1836
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849
	{ /* 460GT Rev B */
		.pvr_mask		= 0xffff0007,
		.pvr_value		= 0x13020005,
		.cpu_name		= "460GT Rev. B",
		.cpu_features		= CPU_FTRS_440x6,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_44x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460gt,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862
	{ /* 460SX */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x13541800,
		.cpu_name		= "460SX",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
		.mmu_features		= MMU_FTR_TYPE_44x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460sx,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1863
	{ /* 464 in APM821xx */
1864
		.pvr_mask		= 0xfffffff0,
1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876
		.pvr_value		= 0x12C41C80,
		.cpu_name		= "APM821XX",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_44x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_apm821xx,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1877 1878 1879
	{ /* 476 DD2 core */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x11a52080,
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Dave Kleikamp 已提交
1880
		.cpu_name		= "476",
1881
		.cpu_features		= CPU_FTRS_47X | CPU_FTR_476_DD2,
D
Dave Kleikamp 已提交
1882
		.cpu_user_features	= COMMON_USER_BOOKE |
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1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_47x |
			MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
		.icache_bsize		= 32,
		.dcache_bsize		= 128,
		.machine_check		= machine_check_47x,
		.platform		= "ppc470",
	},
	{ /* 476fpe */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x7ff50000,
		.cpu_name		= "476fpe",
		.cpu_features		= CPU_FTRS_47X | CPU_FTR_476_DD2,
		.cpu_user_features	= COMMON_USER_BOOKE |
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1897 1898 1899
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_47x |
			MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913
		.icache_bsize		= 32,
		.dcache_bsize		= 128,
		.machine_check		= machine_check_47x,
		.platform		= "ppc470",
	},
	{ /* 476 iss */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00050000,
		.cpu_name		= "476",
		.cpu_features		= CPU_FTRS_47X,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_47x |
			MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
D
Dave Kleikamp 已提交
1914 1915
		.icache_bsize		= 32,
		.dcache_bsize		= 128,
1916
		.machine_check		= machine_check_47x,
D
Dave Kleikamp 已提交
1917 1918
		.platform		= "ppc470",
	},
1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932
	{ /* 476 others */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x11a50000,
		.cpu_name		= "476",
		.cpu_features		= CPU_FTRS_47X,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_47x |
			MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
		.icache_bsize		= 32,
		.dcache_bsize		= 128,
		.machine_check		= machine_check_47x,
		.platform		= "ppc470",
	},
1933 1934 1935 1936 1937 1938
	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic 44x PPC)",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1939
		.mmu_features		= MMU_FTR_TYPE_44x,
1940 1941 1942 1943 1944
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc440",
	}
L
Linus Torvalds 已提交
1945
#endif /* CONFIG_44x */
1946
#ifdef CONFIG_E200
S
Stephen Rothwell 已提交
1947
	{	/* e200z5 */
1948 1949 1950 1951
		.pvr_mask		= 0xfff00000,
		.pvr_value		= 0x81000000,
		.cpu_name		= "e200z5",
		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1952
		.cpu_features		= CPU_FTRS_E200,
1953 1954
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_EFP_SINGLE |
1955
			PPC_FEATURE_UNIFIED_CACHE,
1956
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
1957
		.dcache_bsize		= 32,
1958
		.machine_check		= machine_check_e200,
1959
		.platform		= "ppc5554",
1960
	},
S
Stephen Rothwell 已提交
1961
	{	/* e200z6 */
1962 1963 1964 1965
		.pvr_mask		= 0xfff00000,
		.pvr_value		= 0x81100000,
		.cpu_name		= "e200z6",
		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1966
		.cpu_features		= CPU_FTRS_E200,
1967
		.cpu_user_features	= COMMON_USER_BOOKE |
1968 1969
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1970
			PPC_FEATURE_UNIFIED_CACHE,
1971
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
1972
		.dcache_bsize		= 32,
1973
		.machine_check		= machine_check_e200,
1974
		.platform		= "ppc5554",
1975
	},
1976 1977 1978 1979 1980 1981 1982 1983
	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic E200 PPC)",
		.cpu_features		= CPU_FTRS_E200,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_EFP_SINGLE |
			PPC_FEATURE_UNIFIED_CACHE,
1984
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
1985
		.dcache_bsize		= 32,
1986
		.cpu_setup		= __setup_cpu_e200,
1987 1988
		.machine_check		= machine_check_e200,
		.platform		= "ppc5554",
1989
	}
1990
#endif /* CONFIG_E200 */
1991
#endif /* CONFIG_PPC32 */
1992
#ifdef CONFIG_E500
1993
#ifdef CONFIG_PPC32
S
Stephen Rothwell 已提交
1994
	{	/* e500 */
L
Linus Torvalds 已提交
1995 1996 1997
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80200000,
		.cpu_name		= "e500",
1998
		.cpu_features		= CPU_FTRS_E500,
1999
		.cpu_user_features	= COMMON_USER_BOOKE |
2000 2001
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2002
		.cpu_user_features2	= PPC_FEATURE2_ISEL,
2003
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
L
Linus Torvalds 已提交
2004 2005 2006
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
2007
		.oprofile_cpu_type	= "ppc/e500",
2008
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
2009
		.cpu_setup		= __setup_cpu_e500v1,
2010
		.machine_check		= machine_check_e500,
2011
		.platform		= "ppc8540",
L
Linus Torvalds 已提交
2012
	},
S
Stephen Rothwell 已提交
2013
	{	/* e500v2 */
2014 2015 2016
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80210000,
		.cpu_name		= "e500v2",
2017
		.cpu_features		= CPU_FTRS_E500_2,
2018
		.cpu_user_features	= COMMON_USER_BOOKE |
2019 2020 2021
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP |
			PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
2022
		.cpu_user_features2	= PPC_FEATURE2_ISEL,
2023
		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
2024 2025 2026
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
2027
		.oprofile_cpu_type	= "ppc/e500",
2028
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
2029
		.cpu_setup		= __setup_cpu_e500v2,
2030
		.machine_check		= machine_check_e500,
2031
		.platform		= "ppc8548",
2032
	},
2033 2034 2035 2036 2037 2038
	{	/* e500mc */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80230000,
		.cpu_name		= "e500mc",
		.cpu_features		= CPU_FTRS_E500MC,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2039
		.cpu_user_features2	= PPC_FEATURE2_ISEL,
2040
		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2041
			MMU_FTR_USE_TLBILX,
2042 2043 2044
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 4,
S
Scott Wood 已提交
2045
		.oprofile_cpu_type	= "ppc/e500mc",
2046
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
2047
		.cpu_setup		= __setup_cpu_e500mc,
2048
		.machine_check		= machine_check_e500mc,
2049 2050
		.platform		= "ppce500mc",
	},
2051 2052 2053 2054 2055
#endif /* CONFIG_PPC32 */
	{	/* e5500 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80240000,
		.cpu_name		= "e5500",
2056
		.cpu_features		= CPU_FTRS_E5500,
2057
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2058
		.cpu_user_features2	= PPC_FEATURE2_ISEL,
2059 2060 2061 2062 2063 2064 2065 2066
		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
			MMU_FTR_USE_TLBILX,
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 4,
		.oprofile_cpu_type	= "ppc/e500mc",
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
		.cpu_setup		= __setup_cpu_e5500,
2067
#ifndef CONFIG_PPC32
2068
		.cpu_restore		= __restore_cpu_e5500,
2069
#endif
2070 2071 2072
		.machine_check		= machine_check_e500mc,
		.platform		= "ppce5500",
	},
2073 2074 2075 2076 2077
	{	/* e6500 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80400000,
		.cpu_name		= "e6500",
		.cpu_features		= CPU_FTRS_E6500,
2078 2079
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
			PPC_FEATURE_HAS_ALTIVEC_COMP,
2080
		.cpu_user_features2	= PPC_FEATURE2_ISEL,
2081 2082 2083 2084 2085 2086 2087
		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
			MMU_FTR_USE_TLBILX,
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 4,
		.oprofile_cpu_type	= "ppc/e6500",
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
2088
		.cpu_setup		= __setup_cpu_e6500,
2089
#ifndef CONFIG_PPC32
2090
		.cpu_restore		= __restore_cpu_e6500,
2091
#endif
2092 2093 2094
		.machine_check		= machine_check_e500mc,
		.platform		= "ppce6500",
	},
2095
#ifdef CONFIG_PPC32
L
Linus Torvalds 已提交
2096 2097 2098
	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
2099 2100 2101 2102 2103
		.cpu_name		= "(generic E500 PPC)",
		.cpu_features		= CPU_FTRS_E500,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2104
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
L
Linus Torvalds 已提交
2105 2106
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
2107
		.machine_check		= machine_check_e500,
2108
		.platform		= "powerpc",
2109
	}
S
Stephen Rothwell 已提交
2110
#endif /* CONFIG_PPC32 */
2111
#endif /* CONFIG_E500 */
2112

2113 2114 2115 2116 2117 2118 2119
#ifdef CONFIG_PPC_A2
	{	/* Standard A2 (>= DD2) + FPU core */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00480000,
		.cpu_name		= "A2 (>= DD2)",
		.cpu_features		= CPU_FTRS_A2,
		.cpu_user_features	= COMMON_USER_PPC64,
2120
		.mmu_features		= MMU_FTRS_A2,
2121 2122 2123 2124 2125 2126 2127 2128
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 0,
		.cpu_setup		= __setup_cpu_a2,
		.cpu_restore		= __restore_cpu_a2,
		.machine_check		= machine_check_generic,
		.platform		= "ppca2",
	},
2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148
	{	/* This is a default entry to get going, to be replaced by
		 * a real one at some stage
		 */
#define CPU_FTRS_BASE_BOOK3E	(CPU_FTR_USE_TB | \
	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
	    CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "Book3E",
		.cpu_features		= CPU_FTRS_BASE_BOOK3E,
		.cpu_user_features	= COMMON_USER_PPC64,
		.mmu_features		= MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
					  MMU_FTR_USE_TLBIVAX_BCAST |
					  MMU_FTR_LOCK_BCAST_INVAL,
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 0,
		.machine_check		= machine_check_generic,
		.platform		= "power6",
	},
2149
#endif /* CONFIG_PPC_A2 */
L
Linus Torvalds 已提交
2150
};
2151

2152 2153
static struct cpu_spec the_cpu_spec;

2154 2155
static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
					       struct cpu_spec *s)
2156
{
2157
	struct cpu_spec *t = &the_cpu_spec;
2158 2159
	struct cpu_spec old;

2160
	t = PTRRELOC(t);
2161 2162 2163 2164
	old = *t;

	/* Copy everything, then do fixups */
	*t = *s;
2165

2166 2167 2168 2169 2170
	/*
	 * If we are overriding a previous value derived from the real
	 * PVR with a new value obtained using a logical PVR value,
	 * don't modify the performance monitor fields.
	 */
2171 2172 2173 2174 2175 2176 2177 2178
	if (old.num_pmcs && !s->num_pmcs) {
		t->num_pmcs = old.num_pmcs;
		t->pmc_type = old.pmc_type;
		t->oprofile_type = old.oprofile_type;
		t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
		t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
		t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;

2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191
		/*
		 * If we have passed through this logic once before and
		 * have pulled the default case because the real PVR was
		 * not found inside cpu_specs[], then we are possibly
		 * running in compatibility mode. In that case, let the
		 * oprofiler know which set of compatibility counters to
		 * pull from by making sure the oprofile_cpu_type string
		 * is set to that of compatibility mode. If the
		 * oprofile_cpu_type already has a value, then we are
		 * possibly overriding a real PVR with a logical one,
		 * and, in that case, keep the current value for
		 * oprofile_cpu_type.
		 */
2192
		if (old.oprofile_cpu_type != NULL) {
2193 2194
			t->oprofile_cpu_type = old.oprofile_cpu_type;
			t->oprofile_type = old.oprofile_type;
2195
		}
2196
	}
2197 2198

	*PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2199

2200 2201 2202 2203 2204 2205
	/*
	 * Set the base platform string once; assumes
	 * we're called with real pvr first.
	 */
	if (*PTRRELOC(&powerpc_base_platform) == NULL)
		*PTRRELOC(&powerpc_base_platform) = t->platform;
2206

2207
#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2208 2209 2210 2211 2212 2213
	/* ppc64 and booke expect identify_cpu to also call setup_cpu for
	 * that processor. I will consolidate that at a later time, for now,
	 * just use #ifdef. We also don't need to PTRRELOC the function
	 * pointer on ppc64 and booke as we are running at 0 in real mode
	 * on ppc64 and reloc_offset is always 0 on booke.
	 */
2214 2215
	if (t->cpu_setup) {
		t->cpu_setup(offset, t);
2216
	}
2217
#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2218 2219

	return t;
2220 2221 2222 2223 2224 2225 2226 2227 2228 2229
}

struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
{
	struct cpu_spec *s = cpu_specs;
	int i;

	s = PTRRELOC(s);

	for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2230 2231
		if ((pvr & s->pvr_mask) == s->pvr_value)
			return setup_cpu_spec(offset, s);
2232 2233
	}

2234
	BUG();
2235

2236 2237
	return NULL;
}