cputable.c 62.0 KB
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/*
 *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
 *
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 *  Modifications for ppc64:
 *      Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
 *
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 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */

#include <linux/string.h>
#include <linux/sched.h>
#include <linux/threads.h>
#include <linux/init.h>
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#include <linux/module.h>

#include <asm/oprofile_impl.h>
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#include <asm/cputable.h>
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#include <asm/prom.h>		/* for PTRRELOC on ARCH=ppc */
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#include <asm/mmu.h>
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struct cpu_spec* cur_cpu_spec = NULL;
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EXPORT_SYMBOL(cur_cpu_spec);
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/* The platform string corresponding to the real PVR */
const char *powerpc_base_platform;

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/* NOTE:
 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
 * the responsibility of the appropriate CPU save/restore functions to
 * eventually copy these settings over. Those save/restore aren't yet
 * part of the cputable though. That has to be fixed for both ppc32
 * and ppc64
 */
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#ifdef CONFIG_PPC32
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extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
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extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
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#endif /* CONFIG_PPC32 */
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#ifdef CONFIG_PPC64
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extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
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extern void __restore_cpu_pa6t(void);
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extern void __restore_cpu_ppc970(void);
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extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
extern void __restore_cpu_power7(void);
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#endif /* CONFIG_PPC64 */
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/* This table only contains "desktop" CPUs, it need to be filled with embedded
 * ones as well...
 */
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#define COMMON_USER		(PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
				 PPC_FEATURE_HAS_MMU)
#define COMMON_USER_PPC64	(COMMON_USER | PPC_FEATURE_64)
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#define COMMON_USER_POWER4	(COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
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#define COMMON_USER_POWER5	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
#define COMMON_USER_POWER5_PLUS	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
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#define COMMON_USER_POWER6	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
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				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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				 PPC_FEATURE_TRUE_LE | \
				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
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#define COMMON_USER_POWER7	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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				 PPC_FEATURE_TRUE_LE | \
				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
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#define COMMON_USER_PA6T	(COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
				 PPC_FEATURE_TRUE_LE | \
				 PPC_FEATURE_HAS_ALTIVEC_COMP)
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#ifdef CONFIG_PPC_BOOK3E_64
#define COMMON_USER_BOOKE	(COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
#else
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#define COMMON_USER_BOOKE	(PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
				 PPC_FEATURE_BOOKE)
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#endif
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static struct cpu_spec __initdata cpu_specs[] = {
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#ifdef CONFIG_PPC_BOOK3S_64
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	{	/* Power3 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00400000,
		.cpu_name		= "POWER3 (630)",
		.cpu_features		= CPU_FTRS_POWER3,
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		.cpu_user_features	= COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power3",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.machine_check		= machine_check_generic,
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		.platform		= "power3",
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	},
	{	/* Power3+ */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00410000,
		.cpu_name		= "POWER3 (630+)",
		.cpu_features		= CPU_FTRS_POWER3,
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		.cpu_user_features	= COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power3",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.machine_check		= machine_check_generic,
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		.platform		= "power3",
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	},
	{	/* Northstar */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00330000,
		.cpu_name		= "RS64-II (northstar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.machine_check		= machine_check_generic,
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		.platform		= "rs64",
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	},
	{	/* Pulsar */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00340000,
		.cpu_name		= "RS64-III (pulsar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.machine_check		= machine_check_generic,
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		.platform		= "rs64",
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	},
	{	/* I-star */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00360000,
		.cpu_name		= "RS64-III (icestar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.machine_check		= machine_check_generic,
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		.platform		= "rs64",
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	},
	{	/* S-star */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00370000,
		.cpu_name		= "RS64-IV (sstar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.machine_check		= machine_check_generic,
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		.platform		= "rs64",
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	},
	{	/* Power4 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00350000,
		.cpu_name		= "POWER4 (gp)",
		.cpu_features		= CPU_FTRS_POWER4,
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		.cpu_user_features	= COMMON_USER_POWER4,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power4",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.machine_check		= machine_check_generic,
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		.platform		= "power4",
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	},
	{	/* Power4+ */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00380000,
		.cpu_name		= "POWER4+ (gq)",
		.cpu_features		= CPU_FTRS_POWER4,
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		.cpu_user_features	= COMMON_USER_POWER4,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power4",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.machine_check		= machine_check_generic,
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		.platform		= "power4",
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	},
	{	/* PPC970 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00390000,
		.cpu_name		= "PPC970",
		.cpu_features		= CPU_FTRS_PPC970,
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		.cpu_user_features	= COMMON_USER_POWER4 |
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			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
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		.cpu_restore		= __restore_cpu_ppc970,
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		.oprofile_cpu_type	= "ppc64/970",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.machine_check		= machine_check_generic,
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		.platform		= "ppc970",
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	},
	{	/* PPC970FX */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003c0000,
		.cpu_name		= "PPC970FX",
		.cpu_features		= CPU_FTRS_PPC970,
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		.cpu_user_features	= COMMON_USER_POWER4 |
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			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
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		.cpu_restore		= __restore_cpu_ppc970,
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		.oprofile_cpu_type	= "ppc64/970",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.machine_check		= machine_check_generic,
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		.platform		= "ppc970",
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	},
	{	/* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x00440100,
		.cpu_name		= "PPC970MP",
		.cpu_features		= CPU_FTRS_PPC970,
		.cpu_user_features	= COMMON_USER_POWER4 |
			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
		.cpu_restore		= __restore_cpu_ppc970,
		.oprofile_cpu_type	= "ppc64/970MP",
		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.machine_check		= machine_check_generic,
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		.platform		= "ppc970",
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	},
	{	/* PPC970MP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00440000,
		.cpu_name		= "PPC970MP",
		.cpu_features		= CPU_FTRS_PPC970,
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		.cpu_user_features	= COMMON_USER_POWER4 |
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			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
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		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970MP,
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		.cpu_restore		= __restore_cpu_ppc970,
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		.oprofile_cpu_type	= "ppc64/970MP",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.machine_check		= machine_check_generic,
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		.platform		= "ppc970",
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	},
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	{	/* PPC970GX */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00450000,
		.cpu_name		= "PPC970GX",
		.cpu_features		= CPU_FTRS_PPC970,
		.cpu_user_features	= COMMON_USER_POWER4 |
			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
		.oprofile_cpu_type	= "ppc64/970",
		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.machine_check		= machine_check_generic,
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		.platform		= "ppc970",
	},
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	{	/* Power5 GR */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003a0000,
		.cpu_name		= "POWER5 (gr)",
		.cpu_features		= CPU_FTRS_POWER5,
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		.cpu_user_features	= COMMON_USER_POWER5,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power5",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		/* SIHV / SIPR bits are implemented on POWER4+ (GQ)
		 * and above but only works on POWER5 and above
		 */
		.oprofile_mmcra_sihv	= MMCRA_SIHV,
		.oprofile_mmcra_sipr	= MMCRA_SIPR,
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		.machine_check		= machine_check_generic,
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		.platform		= "power5",
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	},
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	{	/* Power5++ */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x003b0300,
		.cpu_name		= "POWER5+ (gs)",
		.cpu_features		= CPU_FTRS_POWER5,
		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
		.oprofile_cpu_type	= "ppc64/power5++",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.oprofile_mmcra_sihv	= MMCRA_SIHV,
		.oprofile_mmcra_sipr	= MMCRA_SIPR,
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		.machine_check		= machine_check_generic,
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		.platform		= "power5+",
	},
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	{	/* Power5 GS */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003b0000,
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		.cpu_name		= "POWER5+ (gs)",
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		.cpu_features		= CPU_FTRS_POWER5,
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		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power5+",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.oprofile_mmcra_sihv	= MMCRA_SIHV,
		.oprofile_mmcra_sipr	= MMCRA_SIPR,
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		.machine_check		= machine_check_generic,
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		.platform		= "power5+",
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	},
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	{	/* POWER6 in P5+ mode; 2.04-compliant processor */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x0f000001,
		.cpu_name		= "POWER5+",
		.cpu_features		= CPU_FTRS_POWER5,
		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
385
		.mmu_features		= MMU_FTR_HPTE_TABLE,
386 387
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
388
		.machine_check		= machine_check_generic,
389 390
		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",
		.oprofile_type		= PPC_OPROFILE_POWER4,
391 392
		.platform		= "power5+",
	},
393 394 395
	{	/* Power6 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003e0000,
396 397 398 399
		.cpu_name		= "POWER6 (raw)",
		.cpu_features		= CPU_FTRS_POWER6,
		.cpu_user_features	= COMMON_USER_POWER6 |
			PPC_FEATURE_POWER6_EXT,
400
		.mmu_features		= MMU_FTR_HPTE_TABLE,
401 402 403
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
404
		.pmc_type		= PPC_PMC_IBM,
405 406 407 408 409 410
		.oprofile_cpu_type	= "ppc64/power6",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.oprofile_mmcra_sihv	= POWER6_MMCRA_SIHV,
		.oprofile_mmcra_sipr	= POWER6_MMCRA_SIPR,
		.oprofile_mmcra_clear	= POWER6_MMCRA_THRM |
			POWER6_MMCRA_OTHER,
411
		.machine_check		= machine_check_generic,
412 413 414 415 416 417
		.platform		= "power6x",
	},
	{	/* 2.05-compliant processor, i.e. Power6 "architected" mode */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x0f000002,
		.cpu_name		= "POWER6 (architected)",
418 419
		.cpu_features		= CPU_FTRS_POWER6,
		.cpu_user_features	= COMMON_USER_POWER6,
420
		.mmu_features		= MMU_FTR_HPTE_TABLE,
421 422
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
423
		.machine_check		= machine_check_generic,
424 425
		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",
		.oprofile_type		= PPC_OPROFILE_POWER4,
426 427
		.platform		= "power6",
	},
428 429 430 431 432 433
	{	/* 2.06-compliant processor, i.e. Power7 "architected" mode */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x0f000003,
		.cpu_name		= "POWER7 (architected)",
		.cpu_features		= CPU_FTRS_POWER7,
		.cpu_user_features	= COMMON_USER_POWER7,
434 435
		.mmu_features		= MMU_FTR_HPTE_TABLE |
			MMU_FTR_TLBIE_206,
436 437 438
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.machine_check		= machine_check_generic,
439 440
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",
441 442
		.platform		= "power7",
	},
443 444 445
	{	/* Power7 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003f0000,
446
		.cpu_name		= "POWER7 (raw)",
447 448
		.cpu_features		= CPU_FTRS_POWER7,
		.cpu_user_features	= COMMON_USER_POWER7,
449 450
		.mmu_features		= MMU_FTR_HPTE_TABLE |
			MMU_FTR_TLBIE_206,
451 452 453 454 455 456 457 458 459 460 461 462 463 464
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
		.pmc_type		= PPC_PMC_IBM,
		.cpu_setup		= __setup_cpu_power7,
		.cpu_restore		= __restore_cpu_power7,
		.oprofile_cpu_type	= "ppc64/power7",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.oprofile_mmcra_sihv	= POWER6_MMCRA_SIHV,
		.oprofile_mmcra_sipr	= POWER6_MMCRA_SIPR,
		.oprofile_mmcra_clear	= POWER6_MMCRA_THRM |
			POWER6_MMCRA_OTHER,
		.platform		= "power7",
	},
465
	{	/* Cell Broadband Engine */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00700000,
		.cpu_name		= "Cell Broadband Engine",
		.cpu_features		= CPU_FTRS_CELL,
		.cpu_user_features	= COMMON_USER_PPC64 |
471 472
			PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
			PPC_FEATURE_SMT,
473
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
476
		.num_pmcs		= 4,
477
		.pmc_type		= PPC_PMC_IBM,
478 479
		.oprofile_cpu_type	= "ppc64/cell-be",
		.oprofile_type		= PPC_OPROFILE_CELL,
480
		.machine_check		= machine_check_generic,
481
		.platform		= "ppc-cell-be",
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	},
483 484 485 486 487 488
	{	/* PA Semi PA6T */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00900000,
		.cpu_name		= "PA6T",
		.cpu_features		= CPU_FTRS_PA6T,
		.cpu_user_features	= COMMON_USER_PA6T,
489
		.mmu_features		= MMU_FTR_HPTE_TABLE,
490 491 492
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 6,
493
		.pmc_type		= PPC_PMC_PA6T,
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		.cpu_setup		= __setup_cpu_pa6t,
		.cpu_restore		= __restore_cpu_pa6t,
496 497
		.oprofile_cpu_type	= "ppc64/pa6t",
		.oprofile_type		= PPC_OPROFILE_PA6T,
498
		.machine_check		= machine_check_generic,
499 500
		.platform		= "pa6t",
	},
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	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "POWER4 (compatible)",
		.cpu_features		= CPU_FTRS_COMPATIBLE,
		.cpu_user_features	= COMMON_USER_PPC64,
507
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
511
		.pmc_type		= PPC_PMC_IBM,
512
		.machine_check		= machine_check_generic,
513
		.platform		= "power4",
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	}
515 516
#endif	/* CONFIG_PPC_BOOK3S_64 */

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#ifdef CONFIG_PPC32
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#if CLASSIC_PPC
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	{	/* 601 */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00010000,
		.cpu_name		= "601",
523
		.cpu_features		= CPU_FTRS_PPC601,
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		.cpu_user_features	= COMMON_USER | PPC_FEATURE_601_INSTR |
525
			PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
526
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
529
		.machine_check		= machine_check_generic,
530
		.platform		= "ppc601",
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	},
	{	/* 603 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00030000,
		.cpu_name		= "603",
536
		.cpu_features		= CPU_FTRS_603,
537
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
538
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
541
		.cpu_setup		= __setup_cpu_603,
542
		.machine_check		= machine_check_generic,
543
		.platform		= "ppc603",
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	},
	{	/* 603e */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00060000,
		.cpu_name		= "603e",
549
		.cpu_features		= CPU_FTRS_603,
550
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
551
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
554
		.cpu_setup		= __setup_cpu_603,
555
		.machine_check		= machine_check_generic,
556
		.platform		= "ppc603",
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	},
	{	/* 603ev */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00070000,
		.cpu_name		= "603ev",
562
		.cpu_features		= CPU_FTRS_603,
563
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
564
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
567
		.cpu_setup		= __setup_cpu_603,
568
		.machine_check		= machine_check_generic,
569
		.platform		= "ppc603",
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	},
	{	/* 604 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00040000,
		.cpu_name		= "604",
575
		.cpu_features		= CPU_FTRS_604,
576
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
577
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 2,
581
		.cpu_setup		= __setup_cpu_604,
582
		.machine_check		= machine_check_generic,
583
		.platform		= "ppc604",
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	},
	{	/* 604e */
		.pvr_mask		= 0xfffff000,
		.pvr_value		= 0x00090000,
		.cpu_name		= "604e",
589
		.cpu_features		= CPU_FTRS_604,
590
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
591
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
595
		.cpu_setup		= __setup_cpu_604,
596
		.machine_check		= machine_check_generic,
597
		.platform		= "ppc604",
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	},
	{	/* 604r */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00090000,
		.cpu_name		= "604r",
603
		.cpu_features		= CPU_FTRS_604,
604
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
605
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
609
		.cpu_setup		= __setup_cpu_604,
610
		.machine_check		= machine_check_generic,
611
		.platform		= "ppc604",
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	},
	{	/* 604ev */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x000a0000,
		.cpu_name		= "604ev",
617
		.cpu_features		= CPU_FTRS_604,
618
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
619
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
623
		.cpu_setup		= __setup_cpu_604,
624
		.machine_check		= machine_check_generic,
625
		.platform		= "ppc604",
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	},
	{	/* 740/750 (0x4202, don't support TAU ?) */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x00084202,
		.cpu_name		= "740/750",
631
		.cpu_features		= CPU_FTRS_740_NOTAU,
632
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
633
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
637
		.cpu_setup		= __setup_cpu_750,
638
		.machine_check		= machine_check_generic,
639
		.platform		= "ppc750",
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	},
	{	/* 750CX (80100 and 8010x?) */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x00080100,
		.cpu_name		= "750CX",
645
		.cpu_features		= CPU_FTRS_750,
646
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
647
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
651
		.cpu_setup		= __setup_cpu_750cx,
652
		.machine_check		= machine_check_generic,
653
		.platform		= "ppc750",
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	},
	{	/* 750CX (82201 and 82202) */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x00082200,
		.cpu_name		= "750CX",
659
		.cpu_features		= CPU_FTRS_750,
660
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
661
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
665
		.pmc_type		= PPC_PMC_IBM,
666
		.cpu_setup		= __setup_cpu_750cx,
667
		.machine_check		= machine_check_generic,
668
		.platform		= "ppc750",
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	},
	{	/* 750CXe (82214) */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x00082210,
		.cpu_name		= "750CXe",
674
		.cpu_features		= CPU_FTRS_750,
675
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
676
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
680
		.pmc_type		= PPC_PMC_IBM,
681
		.cpu_setup		= __setup_cpu_750cx,
682
		.machine_check		= machine_check_generic,
683
		.platform		= "ppc750",
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	},
685 686 687 688
	{	/* 750CXe "Gekko" (83214) */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x00083214,
		.cpu_name		= "750CXe",
689
		.cpu_features		= CPU_FTRS_750,
690
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
691
		.mmu_features		= MMU_FTR_HPTE_TABLE,
692 693 694
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
695
		.pmc_type		= PPC_PMC_IBM,
696
		.cpu_setup		= __setup_cpu_750cx,
697
		.machine_check		= machine_check_generic,
698
		.platform		= "ppc750",
699
	},
700 701 702
	{	/* 750CL (and "Broadway") */
		.pvr_mask		= 0xfffff0e0,
		.pvr_value		= 0x00087000,
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		.cpu_name		= "750CL",
704
		.cpu_features		= CPU_FTRS_750CL,
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		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
706
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
710
		.pmc_type		= PPC_PMC_IBM,
711
		.cpu_setup		= __setup_cpu_750,
712
		.machine_check		= machine_check_generic,
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		.platform		= "ppc750",
714 715
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
717 718 719 720
	{	/* 745/755 */
		.pvr_mask		= 0xfffff000,
		.pvr_value		= 0x00083000,
		.cpu_name		= "745/755",
721
		.cpu_features		= CPU_FTRS_750,
722
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
723
		.mmu_features		= MMU_FTR_HPTE_TABLE,
724 725 726
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
727
		.pmc_type		= PPC_PMC_IBM,
728
		.cpu_setup		= __setup_cpu_750,
729
		.machine_check		= machine_check_generic,
730
		.platform		= "ppc750",
731
	},
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	{	/* 750FX rev 1.x */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x70000100,
		.cpu_name		= "750FX",
736
		.cpu_features		= CPU_FTRS_750FX1,
737
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
738
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
742
		.pmc_type		= PPC_PMC_IBM,
743
		.cpu_setup		= __setup_cpu_750,
744
		.machine_check		= machine_check_generic,
745
		.platform		= "ppc750",
746 747
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 750FX rev 2.0 must disable HID0[DPM] */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x70000200,
		.cpu_name		= "750FX",
753
		.cpu_features		= CPU_FTRS_750FX2,
754
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
755
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
759
		.pmc_type		= PPC_PMC_IBM,
760
		.cpu_setup		= __setup_cpu_750,
761
		.machine_check		= machine_check_generic,
762
		.platform		= "ppc750",
763 764
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 750FX (All revs except 2.0) */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x70000000,
		.cpu_name		= "750FX",
770
		.cpu_features		= CPU_FTRS_750FX,
771
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
772
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
776
		.pmc_type		= PPC_PMC_IBM,
777
		.cpu_setup		= __setup_cpu_750fx,
778
		.machine_check		= machine_check_generic,
779
		.platform		= "ppc750",
780 781
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 750GX */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x70020000,
		.cpu_name		= "750GX",
787
		.cpu_features		= CPU_FTRS_750GX,
788
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
789
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
793
		.pmc_type		= PPC_PMC_IBM,
794
		.cpu_setup		= __setup_cpu_750fx,
795
		.machine_check		= machine_check_generic,
796
		.platform		= "ppc750",
797 798
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 740/750 (L2CR bit need fixup for 740) */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00080000,
		.cpu_name		= "740/750",
804
		.cpu_features		= CPU_FTRS_740,
805
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
806
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
810
		.pmc_type		= PPC_PMC_IBM,
811
		.cpu_setup		= __setup_cpu_750,
812
		.machine_check		= machine_check_generic,
813
		.platform		= "ppc750",
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	},
	{	/* 7400 rev 1.1 ? (no TAU) */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x000c1101,
		.cpu_name		= "7400 (1.1)",
819
		.cpu_features		= CPU_FTRS_7400_NOTAU,
820 821
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
822
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
826
		.pmc_type		= PPC_PMC_G4,
827
		.cpu_setup		= __setup_cpu_7400,
828
		.machine_check		= machine_check_generic,
829
		.platform		= "ppc7400",
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	},
	{	/* 7400 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x000c0000,
		.cpu_name		= "7400",
835
		.cpu_features		= CPU_FTRS_7400,
836 837
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
838
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
842
		.pmc_type		= PPC_PMC_G4,
843
		.cpu_setup		= __setup_cpu_7400,
844
		.machine_check		= machine_check_generic,
845
		.platform		= "ppc7400",
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	},
	{	/* 7410 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x800c0000,
		.cpu_name		= "7410",
851
		.cpu_features		= CPU_FTRS_7400,
852 853
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
854
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
858
		.pmc_type		= PPC_PMC_G4,
859
		.cpu_setup		= __setup_cpu_7410,
860
		.machine_check		= machine_check_generic,
861
		.platform		= "ppc7400",
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	},
	{	/* 7450 2.0 - no doze/nap */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80000200,
		.cpu_name		= "7450",
867
		.cpu_features		= CPU_FTRS_7450_20,
868 869
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
870
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
874
		.pmc_type		= PPC_PMC_G4,
875 876
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
877
		.oprofile_type		= PPC_OPROFILE_G4,
878
		.machine_check		= machine_check_generic,
879
		.platform		= "ppc7450",
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	},
	{	/* 7450 2.1 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80000201,
		.cpu_name		= "7450",
885
		.cpu_features		= CPU_FTRS_7450_21,
886 887
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
888
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
892
		.pmc_type		= PPC_PMC_G4,
893 894
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
895
		.oprofile_type		= PPC_OPROFILE_G4,
896
		.machine_check		= machine_check_generic,
897
		.platform		= "ppc7450",
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	},
	{	/* 7450 2.3 and newer */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80000000,
		.cpu_name		= "7450",
903
		.cpu_features		= CPU_FTRS_7450_23,
904 905
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
906
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
910
		.pmc_type		= PPC_PMC_G4,
911 912
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
913
		.oprofile_type		= PPC_OPROFILE_G4,
914
		.machine_check		= machine_check_generic,
915
		.platform		= "ppc7450",
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	},
	{	/* 7455 rev 1.x */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x80010100,
		.cpu_name		= "7455",
921
		.cpu_features		= CPU_FTRS_7455_1,
922 923
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
924
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
928
		.pmc_type		= PPC_PMC_G4,
929 930
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
931
		.oprofile_type		= PPC_OPROFILE_G4,
932
		.machine_check		= machine_check_generic,
933
		.platform		= "ppc7450",
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	},
	{	/* 7455 rev 2.0 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80010200,
		.cpu_name		= "7455",
939
		.cpu_features		= CPU_FTRS_7455_20,
940 941
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
942
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
946
		.pmc_type		= PPC_PMC_G4,
947 948
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
949
		.oprofile_type		= PPC_OPROFILE_G4,
950
		.machine_check		= machine_check_generic,
951
		.platform		= "ppc7450",
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	},
	{	/* 7455 others */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80010000,
		.cpu_name		= "7455",
957
		.cpu_features		= CPU_FTRS_7455,
958 959
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
960
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
964
		.pmc_type		= PPC_PMC_G4,
965 966
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
967
		.oprofile_type		= PPC_OPROFILE_G4,
968
		.machine_check		= machine_check_generic,
969
		.platform		= "ppc7450",
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	},
	{	/* 7447/7457 Rev 1.0 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80020100,
		.cpu_name		= "7447/7457",
975
		.cpu_features		= CPU_FTRS_7447_10,
976 977
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
978
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
982
		.pmc_type		= PPC_PMC_G4,
983 984
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
985
		.oprofile_type		= PPC_OPROFILE_G4,
986
		.machine_check		= machine_check_generic,
987
		.platform		= "ppc7450",
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	},
	{	/* 7447/7457 Rev 1.1 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80020101,
		.cpu_name		= "7447/7457",
993
		.cpu_features		= CPU_FTRS_7447_10,
994 995
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
996
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1000
		.pmc_type		= PPC_PMC_G4,
1001 1002
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1003
		.oprofile_type		= PPC_OPROFILE_G4,
1004
		.machine_check		= machine_check_generic,
1005
		.platform		= "ppc7450",
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	},
	{	/* 7447/7457 Rev 1.2 and later */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80020000,
		.cpu_name		= "7447/7457",
1011
		.cpu_features		= CPU_FTRS_7447,
1012
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1013
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1017
		.pmc_type		= PPC_PMC_G4,
1018 1019
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1020
		.oprofile_type		= PPC_OPROFILE_G4,
1021
		.machine_check		= machine_check_generic,
1022
		.platform		= "ppc7450",
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	},
	{	/* 7447A */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80030000,
		.cpu_name		= "7447A",
1028
		.cpu_features		= CPU_FTRS_7447A,
1029 1030
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1031
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1032 1033 1034
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1035
		.pmc_type		= PPC_PMC_G4,
1036 1037
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1038
		.oprofile_type		= PPC_OPROFILE_G4,
1039
		.machine_check		= machine_check_generic,
1040
		.platform		= "ppc7450",
1041 1042 1043 1044 1045
	},
	{	/* 7448 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80040000,
		.cpu_name		= "7448",
1046
		.cpu_features		= CPU_FTRS_7448,
1047 1048
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1049
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1053
		.pmc_type		= PPC_PMC_G4,
1054 1055
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1056
		.oprofile_type		= PPC_OPROFILE_G4,
1057
		.machine_check		= machine_check_generic,
1058
		.platform		= "ppc7450",
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	},
	{	/* 82xx (8240, 8245, 8260 are all 603e cores) */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00810000,
		.cpu_name		= "82xx",
1064
		.cpu_features		= CPU_FTRS_82XX,
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		.cpu_user_features	= COMMON_USER,
1066
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1069
		.cpu_setup		= __setup_cpu_603,
1070
		.machine_check		= machine_check_generic,
1071
		.platform		= "ppc603",
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	},
	{	/* All G2_LE (603e core, plus some) have the same pvr */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00820000,
		.cpu_name		= "G2_LE",
1077
		.cpu_features		= CPU_FTRS_G2_LE,
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		.cpu_user_features	= COMMON_USER,
1079
		.mmu_features		= MMU_FTR_USE_HIGH_BATS,
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1080 1081
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1082
		.cpu_setup		= __setup_cpu_603,
1083
		.machine_check		= machine_check_generic,
1084
		.platform		= "ppc603",
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	},
1086
	{	/* e300c1 (a 603e core, plus some) on 83xx */
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		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00830000,
1089
		.cpu_name		= "e300c1",
1090
		.cpu_features		= CPU_FTRS_E300,
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		.cpu_user_features	= COMMON_USER,
1092
		.mmu_features		= MMU_FTR_USE_HIGH_BATS,
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1093 1094
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1095
		.cpu_setup		= __setup_cpu_603,
1096
		.machine_check		= machine_check_generic,
1097
		.platform		= "ppc603",
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	},
1099 1100 1101 1102
	{	/* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00840000,
		.cpu_name		= "e300c2",
1103
		.cpu_features		= CPU_FTRS_E300C2,
1104
		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1105 1106
		.mmu_features		= MMU_FTR_USE_HIGH_BATS |
			MMU_FTR_NEED_DTLB_SW_LRU,
1107 1108 1109
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_603,
1110
		.machine_check		= machine_check_generic,
1111 1112
		.platform		= "ppc603",
	},
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	{	/* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1114 1115 1116 1117 1118
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00850000,
		.cpu_name		= "e300c3",
		.cpu_features		= CPU_FTRS_E300,
		.cpu_user_features	= COMMON_USER,
1119 1120
		.mmu_features		= MMU_FTR_USE_HIGH_BATS |
			MMU_FTR_NEED_DTLB_SW_LRU,
1121 1122 1123
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_603,
1124 1125 1126
		.num_pmcs		= 4,
		.oprofile_cpu_type	= "ppc/e300",
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
1127 1128
		.platform		= "ppc603",
	},
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	{	/* e300c4 (e300c1, plus one IU) */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00860000,
		.cpu_name		= "e300c4",
		.cpu_features		= CPU_FTRS_E300,
		.cpu_user_features	= COMMON_USER,
1135 1136
		.mmu_features		= MMU_FTR_USE_HIGH_BATS |
			MMU_FTR_NEED_DTLB_SW_LRU,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_603,
1140
		.machine_check		= machine_check_generic,
1141 1142 1143
		.num_pmcs		= 4,
		.oprofile_cpu_type	= "ppc/e300",
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
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		.platform		= "ppc603",
	},
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	{	/* default match, we assume split I/D cache & TB (non-601)... */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic PPC)",
1150
		.cpu_features		= CPU_FTRS_CLASSIC32,
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		.cpu_user_features	= COMMON_USER,
1152
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1155
		.machine_check		= machine_check_generic,
1156
		.platform		= "ppc603",
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	},
#endif /* CLASSIC_PPC */
#ifdef CONFIG_8xx
	{	/* 8xx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00500000,
		.cpu_name		= "8xx",
		/* CPU_FTR_MAYBE_CAN_DOZE is possible,
		 * if the 8xx code is there.... */
1166
		.cpu_features		= CPU_FTRS_8XX,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1168
		.mmu_features		= MMU_FTR_TYPE_8xx,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1171
		.platform		= "ppc823",
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	},
#endif /* CONFIG_8xx */
#ifdef CONFIG_40x
	{	/* 403GC */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x00200200,
		.cpu_name		= "403GC",
1179
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1181
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1184
		.machine_check		= machine_check_4xx,
1185
		.platform		= "ppc403",
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	},
	{	/* 403GCX */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x00201400,
		.cpu_name		= "403GCX",
1191
		.cpu_features		= CPU_FTRS_40X,
1192 1193
		.cpu_user_features	= PPC_FEATURE_32 |
		 	PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1194
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1197
		.machine_check		= machine_check_4xx,
1198
		.platform		= "ppc403",
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	},
	{	/* 403G ?? */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00200000,
		.cpu_name		= "403G ??",
1204
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1206
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1209
		.machine_check		= machine_check_4xx,
1210
		.platform		= "ppc403",
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	},
	{	/* 405GP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x40110000,
		.cpu_name		= "405GP",
1216
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1219
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1222
		.machine_check		= machine_check_4xx,
1223
		.platform		= "ppc405",
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	},
	{	/* STB 03xxx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x40130000,
		.cpu_name		= "STB03xxx",
1229
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1232
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1235
		.machine_check		= machine_check_4xx,
1236
		.platform		= "ppc405",
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	},
	{	/* STB 04xxx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41810000,
		.cpu_name		= "STB04xxx",
1242
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1245
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1248
		.machine_check		= machine_check_4xx,
1249
		.platform		= "ppc405",
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	},
	{	/* NP405L */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41610000,
		.cpu_name		= "NP405L",
1255
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1258
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1261
		.machine_check		= machine_check_4xx,
1262
		.platform		= "ppc405",
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	},
	{	/* NP4GS3 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x40B10000,
		.cpu_name		= "NP4GS3",
1268
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1271
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1274
		.machine_check		= machine_check_4xx,
1275
		.platform		= "ppc405",
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	},
	{   /* NP405H */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41410000,
		.cpu_name		= "NP405H",
1281
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1284
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1287
		.machine_check		= machine_check_4xx,
1288
		.platform		= "ppc405",
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	},
	{	/* 405GPr */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x50910000,
		.cpu_name		= "405GPr",
1294
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1297
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1300
		.machine_check		= machine_check_4xx,
1301
		.platform		= "ppc405",
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	},
	{   /* STBx25xx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x51510000,
		.cpu_name		= "STBx25xx",
1307
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1310
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1313
		.machine_check		= machine_check_4xx,
1314
		.platform		= "ppc405",
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	},
	{	/* 405LP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41F10000,
		.cpu_name		= "405LP",
1320
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1322
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1325
		.machine_check		= machine_check_4xx,
1326
		.platform		= "ppc405",
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	},
	{	/* Xilinx Virtex-II Pro  */
1329
		.pvr_mask		= 0xfffff000,
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		.pvr_value		= 0x20010000,
		.cpu_name		= "Virtex-II Pro",
1332
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1335
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1338
		.machine_check		= machine_check_4xx,
1339
		.platform		= "ppc405",
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	},
1341 1342 1343 1344 1345 1346 1347
	{	/* Xilinx Virtex-4 FX */
		.pvr_mask		= 0xfffff000,
		.pvr_value		= 0x20011000,
		.cpu_name		= "Virtex-4 FX",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1348
		.mmu_features		= MMU_FTR_TYPE_40x,
1349 1350
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1351
		.machine_check		= machine_check_4xx,
1352
		.platform		= "ppc405",
1353
	},
1354 1355 1356 1357
	{	/* 405EP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x51210000,
		.cpu_name		= "405EP",
1358
		.cpu_features		= CPU_FTRS_40X,
1359 1360
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1361
		.mmu_features		= MMU_FTR_TYPE_40x,
1362 1363
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1364
		.machine_check		= machine_check_4xx,
1365 1366
		.platform		= "ppc405",
	},
1367 1368 1369 1370
	{	/* 405EX Rev. A/B with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910007,
		.cpu_name		= "405EX Rev. A/B",
1371
		.cpu_features		= CPU_FTRS_40X,
1372 1373
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1374
		.mmu_features		= MMU_FTR_TYPE_40x,
1375 1376
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1377
		.machine_check		= machine_check_4xx,
1378
		.platform		= "ppc405",
1379
	},
1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472
	{	/* 405EX Rev. C without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x1291000d,
		.cpu_name		= "405EX Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EX Rev. C with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x1291000f,
		.cpu_name		= "405EX Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EX Rev. D without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910003,
		.cpu_name		= "405EX Rev. D",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EX Rev. D with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910005,
		.cpu_name		= "405EX Rev. D",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. A/B without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910001,
		.cpu_name		= "405EXr Rev. A/B",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. C without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910009,
		.cpu_name		= "405EXr Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. C with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x1291000b,
		.cpu_name		= "405EXr Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. D without Security */
		.pvr_mask		= 0xffff000f,
1473
		.pvr_value		= 0x12910000,
1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487
		.cpu_name		= "405EXr Rev. D",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. D with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910002,
		.cpu_name		= "405EXr Rev. D",
1488 1489 1490
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1491
		.mmu_features		= MMU_FTR_TYPE_40x,
1492 1493 1494 1495 1496
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
1497 1498 1499 1500 1501 1502 1503 1504
	{
		/* 405EZ */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41510000,
		.cpu_name		= "405EZ",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1505
		.mmu_features		= MMU_FTR_TYPE_40x,
1506 1507 1508 1509 1510
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
1511 1512 1513 1514 1515 1516 1517
	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic 40x PPC)",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1518
		.mmu_features		= MMU_FTR_TYPE_40x,
1519 1520 1521 1522 1523
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	}
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Linus Torvalds 已提交
1524 1525 1526

#endif /* CONFIG_40x */
#ifdef CONFIG_44x
M
Matt Porter 已提交
1527 1528 1529
	{
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000850,
1530 1531 1532
		.cpu_name		= "440GR Rev. A",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1533
		.mmu_features		= MMU_FTR_TYPE_44x,
1534 1535
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1536
		.machine_check		= machine_check_4xx,
1537 1538 1539 1540 1541
		.platform		= "ppc440",
	},
	{ /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000858,
M
Matt Porter 已提交
1542
		.cpu_name		= "440EP Rev. A",
1543
		.cpu_features		= CPU_FTRS_44X,
1544
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1545
		.mmu_features		= MMU_FTR_TYPE_44x,
M
Matt Porter 已提交
1546 1547
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1548
		.cpu_setup		= __setup_cpu_440ep,
1549
		.machine_check		= machine_check_4xx,
1550
		.platform		= "ppc440",
M
Matt Porter 已提交
1551 1552 1553 1554
	},
	{
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x400008d3,
1555
		.cpu_name		= "440GR Rev. B",
1556
		.cpu_features		= CPU_FTRS_44X,
1557
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1558
		.mmu_features		= MMU_FTR_TYPE_44x,
M
Matt Porter 已提交
1559 1560
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1561
		.machine_check		= machine_check_4xx,
1562
		.platform		= "ppc440",
M
Matt Porter 已提交
1563
	},
1564 1565 1566 1567 1568 1569
	{ /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000ff7,
		.pvr_value		= 0x400008d4,
		.cpu_name		= "440EP Rev. C",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1570
		.mmu_features		= MMU_FTR_TYPE_44x,
1571 1572 1573 1574 1575 1576
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_440ep,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc440",
	},
1577 1578 1579 1580
	{ /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x400008db,
		.cpu_name		= "440EP Rev. B",
1581 1582
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1583
		.mmu_features		= MMU_FTR_TYPE_44x,
1584 1585
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1586
		.cpu_setup		= __setup_cpu_440ep,
1587
		.machine_check		= machine_check_4xx,
1588
		.platform		= "ppc440",
1589 1590 1591
	},
	{ /* 440GRX */
		.pvr_mask		= 0xf0000ffb,
1592
		.pvr_value		= 0x200008D0,
1593 1594 1595
		.cpu_name		= "440GRX",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1596
		.mmu_features		= MMU_FTR_TYPE_44x,
1597 1598
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1599
		.cpu_setup		= __setup_cpu_440grx,
1600
		.machine_check		= machine_check_440A,
1601
		.platform		= "ppc440",
1602
	},
1603 1604 1605 1606 1607 1608
	{ /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000ffb,
		.pvr_value		= 0x200008D8,
		.cpu_name		= "440EPX",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1609
		.mmu_features		= MMU_FTR_TYPE_44x,
1610 1611 1612
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_440epx,
1613
		.machine_check		= machine_check_440A,
1614 1615
		.platform		= "ppc440",
	},
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Stephen Rothwell 已提交
1616
	{	/* 440GP Rev. B */
L
Linus Torvalds 已提交
1617 1618 1619
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000440,
		.cpu_name		= "440GP Rev. B",
1620
		.cpu_features		= CPU_FTRS_44X,
1621
		.cpu_user_features	= COMMON_USER_BOOKE,
1622
		.mmu_features		= MMU_FTR_TYPE_44x,
L
Linus Torvalds 已提交
1623 1624
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1625
		.machine_check		= machine_check_4xx,
1626
		.platform		= "ppc440gp",
L
Linus Torvalds 已提交
1627
	},
S
Stephen Rothwell 已提交
1628
	{	/* 440GP Rev. C */
L
Linus Torvalds 已提交
1629 1630 1631
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000481,
		.cpu_name		= "440GP Rev. C",
1632
		.cpu_features		= CPU_FTRS_44X,
1633
		.cpu_user_features	= COMMON_USER_BOOKE,
1634
		.mmu_features		= MMU_FTR_TYPE_44x,
L
Linus Torvalds 已提交
1635 1636
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1637
		.machine_check		= machine_check_4xx,
1638
		.platform		= "ppc440gp",
L
Linus Torvalds 已提交
1639 1640 1641 1642 1643
	},
	{ /* 440GX Rev. A */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000850,
		.cpu_name		= "440GX Rev. A",
1644
		.cpu_features		= CPU_FTRS_44X,
1645
		.cpu_user_features	= COMMON_USER_BOOKE,
1646
		.mmu_features		= MMU_FTR_TYPE_44x,
L
Linus Torvalds 已提交
1647 1648
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1649 1650
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1651
		.platform		= "ppc440",
L
Linus Torvalds 已提交
1652 1653 1654 1655 1656
	},
	{ /* 440GX Rev. B */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000851,
		.cpu_name		= "440GX Rev. B",
1657
		.cpu_features		= CPU_FTRS_44X,
1658
		.cpu_user_features	= COMMON_USER_BOOKE,
1659
		.mmu_features		= MMU_FTR_TYPE_44x,
L
Linus Torvalds 已提交
1660 1661
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1662 1663
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1664
		.platform		= "ppc440",
L
Linus Torvalds 已提交
1665 1666 1667 1668 1669
	},
	{ /* 440GX Rev. C */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000892,
		.cpu_name		= "440GX Rev. C",
1670
		.cpu_features		= CPU_FTRS_44X,
1671
		.cpu_user_features	= COMMON_USER_BOOKE,
1672
		.mmu_features		= MMU_FTR_TYPE_44x,
L
Linus Torvalds 已提交
1673 1674
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1675 1676
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1677
		.platform		= "ppc440",
L
Linus Torvalds 已提交
1678
	},
1679 1680 1681 1682
	{ /* 440GX Rev. F */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000894,
		.cpu_name		= "440GX Rev. F",
1683
		.cpu_features		= CPU_FTRS_44X,
1684
		.cpu_user_features	= COMMON_USER_BOOKE,
1685
		.mmu_features		= MMU_FTR_TYPE_44x,
1686 1687
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1688 1689
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1690
		.platform		= "ppc440",
1691
	},
1692
	{ /* 440SP Rev. A */
1693 1694
		.pvr_mask		= 0xfff00fff,
		.pvr_value		= 0x53200891,
1695
		.cpu_name		= "440SP Rev. A",
1696
		.cpu_features		= CPU_FTRS_44X,
1697
		.cpu_user_features	= COMMON_USER_BOOKE,
1698
		.mmu_features		= MMU_FTR_TYPE_44x,
1699 1700
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1701
		.machine_check		= machine_check_4xx,
1702
		.platform		= "ppc440",
1703
	},
R
Roland Dreier 已提交
1704
	{ /* 440SPe Rev. A */
1705 1706 1707 1708 1709
		.pvr_mask               = 0xfff00fff,
		.pvr_value              = 0x53400890,
		.cpu_name               = "440SPe Rev. A",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features      = COMMON_USER_BOOKE,
1710
		.mmu_features		= MMU_FTR_TYPE_44x,
1711 1712
		.icache_bsize           = 32,
		.dcache_bsize           = 32,
1713 1714
		.cpu_setup		= __setup_cpu_440spe,
		.machine_check		= machine_check_440A,
1715 1716 1717 1718 1719 1720
		.platform               = "ppc440",
	},
	{ /* 440SPe Rev. B */
		.pvr_mask		= 0xfff00fff,
		.pvr_value		= 0x53400891,
		.cpu_name		= "440SPe Rev. B",
K
Kumar Gala 已提交
1721
		.cpu_features		= CPU_FTRS_44X,
1722
		.cpu_user_features	= COMMON_USER_BOOKE,
1723
		.mmu_features		= MMU_FTR_TYPE_44x,
R
Roland Dreier 已提交
1724 1725
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1726 1727
		.cpu_setup		= __setup_cpu_440spe,
		.machine_check		= machine_check_440A,
1728
		.platform		= "ppc440",
R
Roland Dreier 已提交
1729
	},
1730 1731 1732 1733 1734 1735
	{ /* 440 in Xilinx Virtex-5 FXT */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x7ff21910,
		.cpu_name		= "440 in Virtex-5 FXT",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1736
		.mmu_features		= MMU_FTR_TYPE_44x,
1737 1738
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1739 1740
		.cpu_setup		= __setup_cpu_440x5,
		.machine_check		= machine_check_440A,
1741 1742
		.platform		= "ppc440",
	},
1743
	{ /* 460EX */
1744
		.pvr_mask		= 0xffff0006,
1745 1746
		.pvr_value		= 0x13020002,
		.cpu_name		= "460EX",
1747
		.cpu_features		= CPU_FTRS_440x6,
1748
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1749
		.mmu_features		= MMU_FTR_TYPE_44x,
1750 1751 1752 1753 1754 1755
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460ex,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768
	{ /* 460EX Rev B */
		.pvr_mask		= 0xffff0007,
		.pvr_value		= 0x13020004,
		.cpu_name		= "460EX Rev. B",
		.cpu_features		= CPU_FTRS_440x6,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_44x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460ex,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1769
	{ /* 460GT */
1770
		.pvr_mask		= 0xffff0006,
1771 1772
		.pvr_value		= 0x13020000,
		.cpu_name		= "460GT",
1773
		.cpu_features		= CPU_FTRS_440x6,
1774
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1775
		.mmu_features		= MMU_FTR_TYPE_44x,
1776 1777
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1778
		.cpu_setup		= __setup_cpu_460gt,
1779 1780 1781
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794
	{ /* 460GT Rev B */
		.pvr_mask		= 0xffff0007,
		.pvr_value		= 0x13020005,
		.cpu_name		= "460GT Rev. B",
		.cpu_features		= CPU_FTRS_440x6,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_44x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460gt,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807
	{ /* 460SX */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x13541800,
		.cpu_name		= "460SX",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
		.mmu_features		= MMU_FTR_TYPE_44x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460sx,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
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Dave Kleikamp 已提交
1808 1809 1810 1811 1812 1813 1814 1815 1816
	{ /* 476 core */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x11a50000,
		.cpu_name		= "476",
		.cpu_features		= CPU_FTRS_47X,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_47x |
			MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830
		.icache_bsize		= 32,
		.dcache_bsize		= 128,
		.machine_check		= machine_check_47x,
		.platform		= "ppc470",
	},
	{ /* 476 iss */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00050000,
		.cpu_name		= "476",
		.cpu_features		= CPU_FTRS_47X,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_47x |
			MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
D
Dave Kleikamp 已提交
1831 1832
		.icache_bsize		= 32,
		.dcache_bsize		= 128,
1833
		.machine_check		= machine_check_47x,
D
Dave Kleikamp 已提交
1834 1835
		.platform		= "ppc470",
	},
1836 1837 1838 1839 1840 1841
	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic 44x PPC)",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1842
		.mmu_features		= MMU_FTR_TYPE_44x,
1843 1844 1845 1846 1847
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc440",
	}
L
Linus Torvalds 已提交
1848
#endif /* CONFIG_44x */
1849
#ifdef CONFIG_E200
S
Stephen Rothwell 已提交
1850
	{	/* e200z5 */
1851 1852 1853 1854
		.pvr_mask		= 0xfff00000,
		.pvr_value		= 0x81000000,
		.cpu_name		= "e200z5",
		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1855
		.cpu_features		= CPU_FTRS_E200,
1856 1857
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_EFP_SINGLE |
1858
			PPC_FEATURE_UNIFIED_CACHE,
1859
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
1860
		.dcache_bsize		= 32,
1861
		.machine_check		= machine_check_e200,
1862
		.platform		= "ppc5554",
1863
	},
S
Stephen Rothwell 已提交
1864
	{	/* e200z6 */
1865 1866 1867 1868
		.pvr_mask		= 0xfff00000,
		.pvr_value		= 0x81100000,
		.cpu_name		= "e200z6",
		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1869
		.cpu_features		= CPU_FTRS_E200,
1870
		.cpu_user_features	= COMMON_USER_BOOKE |
1871 1872
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1873
			PPC_FEATURE_UNIFIED_CACHE,
1874
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
1875
		.dcache_bsize		= 32,
1876
		.machine_check		= machine_check_e200,
1877
		.platform		= "ppc5554",
1878
	},
1879 1880 1881 1882 1883 1884 1885 1886
	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic E200 PPC)",
		.cpu_features		= CPU_FTRS_E200,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_EFP_SINGLE |
			PPC_FEATURE_UNIFIED_CACHE,
1887
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
1888
		.dcache_bsize		= 32,
1889
		.cpu_setup		= __setup_cpu_e200,
1890 1891
		.machine_check		= machine_check_e200,
		.platform		= "ppc5554",
1892
	}
1893 1894
#endif /* CONFIG_E200 */
#ifdef CONFIG_E500
S
Stephen Rothwell 已提交
1895
	{	/* e500 */
L
Linus Torvalds 已提交
1896 1897 1898
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80200000,
		.cpu_name		= "e500",
1899
		.cpu_features		= CPU_FTRS_E500,
1900
		.cpu_user_features	= COMMON_USER_BOOKE |
1901 1902
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1903
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
L
Linus Torvalds 已提交
1904 1905 1906
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
1907
		.oprofile_cpu_type	= "ppc/e500",
1908
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
1909
		.cpu_setup		= __setup_cpu_e500v1,
1910
		.machine_check		= machine_check_e500,
1911
		.platform		= "ppc8540",
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1912
	},
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1913
	{	/* e500v2 */
1914 1915 1916
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80210000,
		.cpu_name		= "e500v2",
1917
		.cpu_features		= CPU_FTRS_E500_2,
1918
		.cpu_user_features	= COMMON_USER_BOOKE |
1919 1920 1921
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP |
			PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
1922
		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
1923 1924 1925
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
1926
		.oprofile_cpu_type	= "ppc/e500",
1927
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
1928
		.cpu_setup		= __setup_cpu_e500v2,
1929
		.machine_check		= machine_check_e500,
1930
		.platform		= "ppc8548",
1931
	},
1932 1933 1934 1935 1936 1937
	{	/* e500mc */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80230000,
		.cpu_name		= "e500mc",
		.cpu_features		= CPU_FTRS_E500MC,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1938
		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1939
			MMU_FTR_USE_TLBILX,
1940 1941 1942
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 4,
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1943
		.oprofile_cpu_type	= "ppc/e500mc",
1944
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
1945
		.cpu_setup		= __setup_cpu_e500mc,
1946
		.machine_check		= machine_check_e500mc,
1947 1948
		.platform		= "ppce500mc",
	},
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	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
1952 1953 1954 1955 1956
		.cpu_name		= "(generic E500 PPC)",
		.cpu_features		= CPU_FTRS_E500,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1957
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
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1958 1959
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1960
		.machine_check		= machine_check_e500,
1961
		.platform		= "powerpc",
1962
	}
1963
#endif /* CONFIG_E500 */
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Stephen Rothwell 已提交
1964
#endif /* CONFIG_PPC32 */
1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987

#ifdef CONFIG_PPC_BOOK3E_64
	{	/* This is a default entry to get going, to be replaced by
		 * a real one at some stage
		 */
#define CPU_FTRS_BASE_BOOK3E	(CPU_FTR_USE_TB | \
	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
	    CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "Book3E",
		.cpu_features		= CPU_FTRS_BASE_BOOK3E,
		.cpu_user_features	= COMMON_USER_PPC64,
		.mmu_features		= MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
					  MMU_FTR_USE_TLBIVAX_BCAST |
					  MMU_FTR_LOCK_BCAST_INVAL,
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 0,
		.machine_check		= machine_check_generic,
		.platform		= "power6",
	},
#endif
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1988
};
1989

1990 1991
static struct cpu_spec the_cpu_spec;

1992
static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s)
1993
{
1994
	struct cpu_spec *t = &the_cpu_spec;
1995 1996
	struct cpu_spec old;

1997
	t = PTRRELOC(t);
1998 1999 2000 2001
	old = *t;

	/* Copy everything, then do fixups */
	*t = *s;
2002

2003 2004 2005 2006 2007
	/*
	 * If we are overriding a previous value derived from the real
	 * PVR with a new value obtained using a logical PVR value,
	 * don't modify the performance monitor fields.
	 */
2008 2009 2010 2011 2012 2013 2014 2015
	if (old.num_pmcs && !s->num_pmcs) {
		t->num_pmcs = old.num_pmcs;
		t->pmc_type = old.pmc_type;
		t->oprofile_type = old.oprofile_type;
		t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
		t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
		t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;

2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028
		/*
		 * If we have passed through this logic once before and
		 * have pulled the default case because the real PVR was
		 * not found inside cpu_specs[], then we are possibly
		 * running in compatibility mode. In that case, let the
		 * oprofiler know which set of compatibility counters to
		 * pull from by making sure the oprofile_cpu_type string
		 * is set to that of compatibility mode. If the
		 * oprofile_cpu_type already has a value, then we are
		 * possibly overriding a real PVR with a logical one,
		 * and, in that case, keep the current value for
		 * oprofile_cpu_type.
		 */
2029
		if (old.oprofile_cpu_type != NULL) {
2030 2031
			t->oprofile_cpu_type = old.oprofile_cpu_type;
			t->oprofile_type = old.oprofile_type;
2032
		}
2033
	}
2034 2035

	*PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2036

2037 2038 2039 2040 2041 2042
	/*
	 * Set the base platform string once; assumes
	 * we're called with real pvr first.
	 */
	if (*PTRRELOC(&powerpc_base_platform) == NULL)
		*PTRRELOC(&powerpc_base_platform) = t->platform;
2043

2044
#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2045 2046 2047 2048 2049 2050 2051 2052 2053
	/* ppc64 and booke expect identify_cpu to also call setup_cpu for
	 * that processor. I will consolidate that at a later time, for now,
	 * just use #ifdef. We also don't need to PTRRELOC the function
	 * pointer on ppc64 and booke as we are running at 0 in real mode
	 * on ppc64 and reloc_offset is always 0 on booke.
	 */
	if (s->cpu_setup) {
		s->cpu_setup(offset, s);
	}
2054
#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066
}

struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
{
	struct cpu_spec *s = cpu_specs;
	int i;

	s = PTRRELOC(s);

	for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
		if ((pvr & s->pvr_mask) == s->pvr_value) {
			setup_cpu_spec(offset, s);
2067 2068
			return s;
		}
2069 2070
	}

2071
	BUG();
2072

2073 2074
	return NULL;
}