cputable.c 66.3 KB
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/*
 *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
 *
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 *  Modifications for ppc64:
 *      Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
 *
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 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */

#include <linux/string.h>
#include <linux/sched.h>
#include <linux/threads.h>
#include <linux/init.h>
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#include <linux/export.h>
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#include <asm/oprofile_impl.h>
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#include <asm/cputable.h>
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#include <asm/prom.h>		/* for PTRRELOC on ARCH=ppc */
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#include <asm/mmu.h>
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#include <asm/setup.h>
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struct cpu_spec* cur_cpu_spec = NULL;
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EXPORT_SYMBOL(cur_cpu_spec);
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/* The platform string corresponding to the real PVR */
const char *powerpc_base_platform;

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/* NOTE:
 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
 * the responsibility of the appropriate CPU save/restore functions to
 * eventually copy these settings over. Those save/restore aren't yet
 * part of the cputable though. That has to be fixed for both ppc32
 * and ppc64
 */
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#ifdef CONFIG_PPC32
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extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
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extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
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extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
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#endif /* CONFIG_PPC32 */
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#ifdef CONFIG_PPC64
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extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);
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extern void __restore_cpu_pa6t(void);
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extern void __restore_cpu_ppc970(void);
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extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
extern void __restore_cpu_power7(void);
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extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
extern void __restore_cpu_power8(void);
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extern void __restore_cpu_a2(void);
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#endif /* CONFIG_PPC64 */
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#if defined(CONFIG_E500)
extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
extern void __restore_cpu_e5500(void);
#endif /* CONFIG_E500 */
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/* This table only contains "desktop" CPUs, it need to be filled with embedded
 * ones as well...
 */
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#define COMMON_USER		(PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
				 PPC_FEATURE_HAS_MMU)
#define COMMON_USER_PPC64	(COMMON_USER | PPC_FEATURE_64)
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#define COMMON_USER_POWER4	(COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
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#define COMMON_USER_POWER5	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
#define COMMON_USER_POWER5_PLUS	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
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#define COMMON_USER_POWER6	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
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				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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				 PPC_FEATURE_TRUE_LE | \
				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
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#define COMMON_USER_POWER7	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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				 PPC_FEATURE_TRUE_LE | \
				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
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#define COMMON_USER_POWER8	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
				 PPC_FEATURE_TRUE_LE | \
				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
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#define COMMON_USER_PA6T	(COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
				 PPC_FEATURE_TRUE_LE | \
				 PPC_FEATURE_HAS_ALTIVEC_COMP)
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#ifdef CONFIG_PPC_BOOK3E_64
#define COMMON_USER_BOOKE	(COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
#else
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#define COMMON_USER_BOOKE	(PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
				 PPC_FEATURE_BOOKE)
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#endif
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static struct cpu_spec __initdata cpu_specs[] = {
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#ifdef CONFIG_PPC_BOOK3S_64
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	{	/* Power3 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00400000,
		.cpu_name		= "POWER3 (630)",
		.cpu_features		= CPU_FTRS_POWER3,
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		.cpu_user_features	= COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power3",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "power3",
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	},
	{	/* Power3+ */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00410000,
		.cpu_name		= "POWER3 (630+)",
		.cpu_features		= CPU_FTRS_POWER3,
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		.cpu_user_features	= COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power3",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "power3",
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	},
	{	/* Northstar */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00330000,
		.cpu_name		= "RS64-II (northstar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "rs64",
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	},
	{	/* Pulsar */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00340000,
		.cpu_name		= "RS64-III (pulsar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "rs64",
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	},
	{	/* I-star */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00360000,
		.cpu_name		= "RS64-III (icestar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "rs64",
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	},
	{	/* S-star */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00370000,
		.cpu_name		= "RS64-IV (sstar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "rs64",
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	},
	{	/* Power4 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00350000,
		.cpu_name		= "POWER4 (gp)",
		.cpu_features		= CPU_FTRS_POWER4,
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		.cpu_user_features	= COMMON_USER_POWER4,
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		.mmu_features		= MMU_FTRS_POWER4,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power4",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.platform		= "power4",
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	},
	{	/* Power4+ */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00380000,
		.cpu_name		= "POWER4+ (gq)",
		.cpu_features		= CPU_FTRS_POWER4,
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		.cpu_user_features	= COMMON_USER_POWER4,
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		.mmu_features		= MMU_FTRS_POWER4,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power4",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.platform		= "power4",
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	},
	{	/* PPC970 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00390000,
		.cpu_name		= "PPC970",
		.cpu_features		= CPU_FTRS_PPC970,
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		.cpu_user_features	= COMMON_USER_POWER4 |
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			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTRS_PPC970,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
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		.cpu_restore		= __restore_cpu_ppc970,
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		.oprofile_cpu_type	= "ppc64/970",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.platform		= "ppc970",
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	},
	{	/* PPC970FX */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003c0000,
		.cpu_name		= "PPC970FX",
		.cpu_features		= CPU_FTRS_PPC970,
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		.cpu_user_features	= COMMON_USER_POWER4 |
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			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTRS_PPC970,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
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		.cpu_restore		= __restore_cpu_ppc970,
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		.oprofile_cpu_type	= "ppc64/970",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.platform		= "ppc970",
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	},
	{	/* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x00440100,
		.cpu_name		= "PPC970MP",
		.cpu_features		= CPU_FTRS_PPC970,
		.cpu_user_features	= COMMON_USER_POWER4 |
			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
		.cpu_restore		= __restore_cpu_ppc970,
		.oprofile_cpu_type	= "ppc64/970MP",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.platform		= "ppc970",
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	},
	{	/* PPC970MP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00440000,
		.cpu_name		= "PPC970MP",
		.cpu_features		= CPU_FTRS_PPC970,
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		.cpu_user_features	= COMMON_USER_POWER4 |
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			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTRS_PPC970,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
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		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970MP,
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		.cpu_restore		= __restore_cpu_ppc970,
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		.oprofile_cpu_type	= "ppc64/970MP",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.platform		= "ppc970",
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	},
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	{	/* PPC970GX */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00450000,
		.cpu_name		= "PPC970GX",
		.cpu_features		= CPU_FTRS_PPC970,
		.cpu_user_features	= COMMON_USER_POWER4 |
			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTRS_PPC970,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
		.oprofile_cpu_type	= "ppc64/970",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.platform		= "ppc970",
	},
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	{	/* Power5 GR */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003a0000,
		.cpu_name		= "POWER5 (gr)",
		.cpu_features		= CPU_FTRS_POWER5,
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		.cpu_user_features	= COMMON_USER_POWER5,
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		.mmu_features		= MMU_FTRS_POWER5,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power5",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		/* SIHV / SIPR bits are implemented on POWER4+ (GQ)
		 * and above but only works on POWER5 and above
		 */
		.oprofile_mmcra_sihv	= MMCRA_SIHV,
		.oprofile_mmcra_sipr	= MMCRA_SIPR,
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		.platform		= "power5",
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	},
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	{	/* Power5++ */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x003b0300,
		.cpu_name		= "POWER5+ (gs)",
		.cpu_features		= CPU_FTRS_POWER5,
		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
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		.mmu_features		= MMU_FTRS_POWER5,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
		.oprofile_cpu_type	= "ppc64/power5++",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.oprofile_mmcra_sihv	= MMCRA_SIHV,
		.oprofile_mmcra_sipr	= MMCRA_SIPR,
		.platform		= "power5+",
	},
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	{	/* Power5 GS */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003b0000,
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		.cpu_name		= "POWER5+ (gs)",
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		.cpu_features		= CPU_FTRS_POWER5,
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		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
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		.mmu_features		= MMU_FTRS_POWER5,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power5+",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.oprofile_mmcra_sihv	= MMCRA_SIHV,
		.oprofile_mmcra_sipr	= MMCRA_SIPR,
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		.platform		= "power5+",
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	},
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	{	/* POWER6 in P5+ mode; 2.04-compliant processor */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x0f000001,
		.cpu_name		= "POWER5+",
		.cpu_features		= CPU_FTRS_POWER5,
		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
383
		.mmu_features		= MMU_FTRS_POWER5,
384 385
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
386 387
		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",
		.oprofile_type		= PPC_OPROFILE_POWER4,
388 389
		.platform		= "power5+",
	},
390 391 392
	{	/* Power6 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003e0000,
393 394 395 396
		.cpu_name		= "POWER6 (raw)",
		.cpu_features		= CPU_FTRS_POWER6,
		.cpu_user_features	= COMMON_USER_POWER6 |
			PPC_FEATURE_POWER6_EXT,
397
		.mmu_features		= MMU_FTRS_POWER6,
398 399 400
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
401
		.pmc_type		= PPC_PMC_IBM,
402 403 404 405 406 407 408 409 410 411 412 413
		.oprofile_cpu_type	= "ppc64/power6",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.oprofile_mmcra_sihv	= POWER6_MMCRA_SIHV,
		.oprofile_mmcra_sipr	= POWER6_MMCRA_SIPR,
		.oprofile_mmcra_clear	= POWER6_MMCRA_THRM |
			POWER6_MMCRA_OTHER,
		.platform		= "power6x",
	},
	{	/* 2.05-compliant processor, i.e. Power6 "architected" mode */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x0f000002,
		.cpu_name		= "POWER6 (architected)",
414 415
		.cpu_features		= CPU_FTRS_POWER6,
		.cpu_user_features	= COMMON_USER_POWER6,
416
		.mmu_features		= MMU_FTRS_POWER6,
417 418
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
419 420
		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",
		.oprofile_type		= PPC_OPROFILE_POWER4,
421 422
		.platform		= "power6",
	},
423 424 425 426 427 428
	{	/* 2.06-compliant processor, i.e. Power7 "architected" mode */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x0f000003,
		.cpu_name		= "POWER7 (architected)",
		.cpu_features		= CPU_FTRS_POWER7,
		.cpu_user_features	= COMMON_USER_POWER7,
429
		.mmu_features		= MMU_FTRS_POWER7,
430 431
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
432 433
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",
434 435
		.cpu_setup		= __setup_cpu_power7,
		.cpu_restore		= __restore_cpu_power7,
436 437
		.platform		= "power7",
	},
438 439 440 441 442 443 444 445 446 447 448 449 450 451 452
	{	/* 2.07-compliant processor, i.e. Power8 "architected" mode */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x0f000004,
		.cpu_name		= "POWER8 (architected)",
		.cpu_features		= CPU_FTRS_POWER8,
		.cpu_user_features	= COMMON_USER_POWER8,
		.mmu_features		= MMU_FTRS_POWER8,
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",
		.cpu_setup		= __setup_cpu_power8,
		.cpu_restore		= __restore_cpu_power8,
		.platform		= "power8",
	},
453 454 455
	{	/* Power7 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003f0000,
456
		.cpu_name		= "POWER7 (raw)",
457 458
		.cpu_features		= CPU_FTRS_POWER7,
		.cpu_user_features	= COMMON_USER_POWER7,
459
		.mmu_features		= MMU_FTRS_POWER7,
460 461 462 463 464 465
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
		.pmc_type		= PPC_PMC_IBM,
		.oprofile_cpu_type	= "ppc64/power7",
		.oprofile_type		= PPC_OPROFILE_POWER4,
466 467
		.cpu_setup		= __setup_cpu_power7,
		.cpu_restore		= __restore_cpu_power7,
468 469
		.platform		= "power7",
	},
470 471 472 473 474 475
	{	/* Power7+ */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x004A0000,
		.cpu_name		= "POWER7+ (raw)",
		.cpu_features		= CPU_FTRS_POWER7,
		.cpu_user_features	= COMMON_USER_POWER7,
476
		.mmu_features		= MMU_FTRS_POWER7,
477 478 479 480 481 482
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
		.pmc_type		= PPC_PMC_IBM,
		.oprofile_cpu_type	= "ppc64/power7",
		.oprofile_type		= PPC_OPROFILE_POWER4,
483 484
		.cpu_setup		= __setup_cpu_power7,
		.cpu_restore		= __restore_cpu_power7,
485 486
		.platform		= "power7+",
	},
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	{	/* Power8 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x004b0000,
		.cpu_name		= "POWER8 (raw)",
		.cpu_features		= CPU_FTRS_POWER8,
		.cpu_user_features	= COMMON_USER_POWER8,
		.mmu_features		= MMU_FTRS_POWER8,
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
		.pmc_type		= PPC_PMC_IBM,
		.oprofile_cpu_type	= "ppc64/power8",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.cpu_setup		= __setup_cpu_power8,
		.cpu_restore		= __restore_cpu_power8,
		.platform		= "power8",
	},
504
	{	/* Cell Broadband Engine */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00700000,
		.cpu_name		= "Cell Broadband Engine",
		.cpu_features		= CPU_FTRS_CELL,
		.cpu_user_features	= COMMON_USER_PPC64 |
510 511
			PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
			PPC_FEATURE_SMT,
512
		.mmu_features		= MMU_FTRS_CELL,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
515
		.num_pmcs		= 4,
516
		.pmc_type		= PPC_PMC_IBM,
517 518
		.oprofile_cpu_type	= "ppc64/cell-be",
		.oprofile_type		= PPC_OPROFILE_CELL,
519
		.platform		= "ppc-cell-be",
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	},
521 522 523 524 525 526
	{	/* PA Semi PA6T */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00900000,
		.cpu_name		= "PA6T",
		.cpu_features		= CPU_FTRS_PA6T,
		.cpu_user_features	= COMMON_USER_PA6T,
527
		.mmu_features		= MMU_FTRS_PA6T,
528 529 530
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 6,
531
		.pmc_type		= PPC_PMC_PA6T,
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		.cpu_setup		= __setup_cpu_pa6t,
		.cpu_restore		= __restore_cpu_pa6t,
534 535
		.oprofile_cpu_type	= "ppc64/pa6t",
		.oprofile_type		= PPC_OPROFILE_PA6T,
536 537
		.platform		= "pa6t",
	},
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	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "POWER4 (compatible)",
		.cpu_features		= CPU_FTRS_COMPATIBLE,
		.cpu_user_features	= COMMON_USER_PPC64,
544
		.mmu_features		= MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
548
		.pmc_type		= PPC_PMC_IBM,
549
		.platform		= "power4",
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	}
551 552
#endif	/* CONFIG_PPC_BOOK3S_64 */

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#ifdef CONFIG_PPC32
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#if CLASSIC_PPC
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	{	/* 601 */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00010000,
		.cpu_name		= "601",
559
		.cpu_features		= CPU_FTRS_PPC601,
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		.cpu_user_features	= COMMON_USER | PPC_FEATURE_601_INSTR |
561
			PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
562
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
565
		.machine_check		= machine_check_generic,
566
		.platform		= "ppc601",
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	},
	{	/* 603 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00030000,
		.cpu_name		= "603",
572
		.cpu_features		= CPU_FTRS_603,
573
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
574
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
577
		.cpu_setup		= __setup_cpu_603,
578
		.machine_check		= machine_check_generic,
579
		.platform		= "ppc603",
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	},
	{	/* 603e */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00060000,
		.cpu_name		= "603e",
585
		.cpu_features		= CPU_FTRS_603,
586
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
587
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
590
		.cpu_setup		= __setup_cpu_603,
591
		.machine_check		= machine_check_generic,
592
		.platform		= "ppc603",
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	},
	{	/* 603ev */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00070000,
		.cpu_name		= "603ev",
598
		.cpu_features		= CPU_FTRS_603,
599
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
600
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
603
		.cpu_setup		= __setup_cpu_603,
604
		.machine_check		= machine_check_generic,
605
		.platform		= "ppc603",
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	},
	{	/* 604 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00040000,
		.cpu_name		= "604",
611
		.cpu_features		= CPU_FTRS_604,
612
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
613
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 2,
617
		.cpu_setup		= __setup_cpu_604,
618
		.machine_check		= machine_check_generic,
619
		.platform		= "ppc604",
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	},
	{	/* 604e */
		.pvr_mask		= 0xfffff000,
		.pvr_value		= 0x00090000,
		.cpu_name		= "604e",
625
		.cpu_features		= CPU_FTRS_604,
626
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
627
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
631
		.cpu_setup		= __setup_cpu_604,
632
		.machine_check		= machine_check_generic,
633
		.platform		= "ppc604",
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	},
	{	/* 604r */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00090000,
		.cpu_name		= "604r",
639
		.cpu_features		= CPU_FTRS_604,
640
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
641
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
645
		.cpu_setup		= __setup_cpu_604,
646
		.machine_check		= machine_check_generic,
647
		.platform		= "ppc604",
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	},
	{	/* 604ev */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x000a0000,
		.cpu_name		= "604ev",
653
		.cpu_features		= CPU_FTRS_604,
654
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
655
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
659
		.cpu_setup		= __setup_cpu_604,
660
		.machine_check		= machine_check_generic,
661
		.platform		= "ppc604",
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	},
	{	/* 740/750 (0x4202, don't support TAU ?) */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x00084202,
		.cpu_name		= "740/750",
667
		.cpu_features		= CPU_FTRS_740_NOTAU,
668
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
669
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
673
		.cpu_setup		= __setup_cpu_750,
674
		.machine_check		= machine_check_generic,
675
		.platform		= "ppc750",
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	},
	{	/* 750CX (80100 and 8010x?) */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x00080100,
		.cpu_name		= "750CX",
681
		.cpu_features		= CPU_FTRS_750,
682
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
683
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
687
		.cpu_setup		= __setup_cpu_750cx,
688
		.machine_check		= machine_check_generic,
689
		.platform		= "ppc750",
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	},
	{	/* 750CX (82201 and 82202) */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x00082200,
		.cpu_name		= "750CX",
695
		.cpu_features		= CPU_FTRS_750,
696
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
697
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
701
		.pmc_type		= PPC_PMC_IBM,
702
		.cpu_setup		= __setup_cpu_750cx,
703
		.machine_check		= machine_check_generic,
704
		.platform		= "ppc750",
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	},
	{	/* 750CXe (82214) */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x00082210,
		.cpu_name		= "750CXe",
710
		.cpu_features		= CPU_FTRS_750,
711
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
712
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
716
		.pmc_type		= PPC_PMC_IBM,
717
		.cpu_setup		= __setup_cpu_750cx,
718
		.machine_check		= machine_check_generic,
719
		.platform		= "ppc750",
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	},
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	{	/* 750CXe "Gekko" (83214) */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x00083214,
		.cpu_name		= "750CXe",
725
		.cpu_features		= CPU_FTRS_750,
726
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
727
		.mmu_features		= MMU_FTR_HPTE_TABLE,
728 729 730
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
731
		.pmc_type		= PPC_PMC_IBM,
732
		.cpu_setup		= __setup_cpu_750cx,
733
		.machine_check		= machine_check_generic,
734
		.platform		= "ppc750",
735
	},
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	{	/* 750CL (and "Broadway") */
		.pvr_mask		= 0xfffff0e0,
		.pvr_value		= 0x00087000,
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		.cpu_name		= "750CL",
740
		.cpu_features		= CPU_FTRS_750CL,
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		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
742
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
746
		.pmc_type		= PPC_PMC_IBM,
747
		.cpu_setup		= __setup_cpu_750,
748
		.machine_check		= machine_check_generic,
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		.platform		= "ppc750",
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		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
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	{	/* 745/755 */
		.pvr_mask		= 0xfffff000,
		.pvr_value		= 0x00083000,
		.cpu_name		= "745/755",
757
		.cpu_features		= CPU_FTRS_750,
758
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
759
		.mmu_features		= MMU_FTR_HPTE_TABLE,
760 761 762
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
763
		.pmc_type		= PPC_PMC_IBM,
764
		.cpu_setup		= __setup_cpu_750,
765
		.machine_check		= machine_check_generic,
766
		.platform		= "ppc750",
767
	},
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	{	/* 750FX rev 1.x */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x70000100,
		.cpu_name		= "750FX",
772
		.cpu_features		= CPU_FTRS_750FX1,
773
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
774
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
778
		.pmc_type		= PPC_PMC_IBM,
779
		.cpu_setup		= __setup_cpu_750,
780
		.machine_check		= machine_check_generic,
781
		.platform		= "ppc750",
782 783
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 750FX rev 2.0 must disable HID0[DPM] */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x70000200,
		.cpu_name		= "750FX",
789
		.cpu_features		= CPU_FTRS_750FX2,
790
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
791
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
795
		.pmc_type		= PPC_PMC_IBM,
796
		.cpu_setup		= __setup_cpu_750,
797
		.machine_check		= machine_check_generic,
798
		.platform		= "ppc750",
799 800
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 750FX (All revs except 2.0) */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x70000000,
		.cpu_name		= "750FX",
806
		.cpu_features		= CPU_FTRS_750FX,
807
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
808
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
812
		.pmc_type		= PPC_PMC_IBM,
813
		.cpu_setup		= __setup_cpu_750fx,
814
		.machine_check		= machine_check_generic,
815
		.platform		= "ppc750",
816 817
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 750GX */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x70020000,
		.cpu_name		= "750GX",
823
		.cpu_features		= CPU_FTRS_750GX,
824
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
825
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
829
		.pmc_type		= PPC_PMC_IBM,
830
		.cpu_setup		= __setup_cpu_750fx,
831
		.machine_check		= machine_check_generic,
832
		.platform		= "ppc750",
833 834
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 740/750 (L2CR bit need fixup for 740) */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00080000,
		.cpu_name		= "740/750",
840
		.cpu_features		= CPU_FTRS_740,
841
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
842
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
846
		.pmc_type		= PPC_PMC_IBM,
847
		.cpu_setup		= __setup_cpu_750,
848
		.machine_check		= machine_check_generic,
849
		.platform		= "ppc750",
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	},
	{	/* 7400 rev 1.1 ? (no TAU) */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x000c1101,
		.cpu_name		= "7400 (1.1)",
855
		.cpu_features		= CPU_FTRS_7400_NOTAU,
856 857
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
858
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
862
		.pmc_type		= PPC_PMC_G4,
863
		.cpu_setup		= __setup_cpu_7400,
864
		.machine_check		= machine_check_generic,
865
		.platform		= "ppc7400",
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	},
	{	/* 7400 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x000c0000,
		.cpu_name		= "7400",
871
		.cpu_features		= CPU_FTRS_7400,
872 873
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
874
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
878
		.pmc_type		= PPC_PMC_G4,
879
		.cpu_setup		= __setup_cpu_7400,
880
		.machine_check		= machine_check_generic,
881
		.platform		= "ppc7400",
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	},
	{	/* 7410 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x800c0000,
		.cpu_name		= "7410",
887
		.cpu_features		= CPU_FTRS_7400,
888 889
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
890
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
894
		.pmc_type		= PPC_PMC_G4,
895
		.cpu_setup		= __setup_cpu_7410,
896
		.machine_check		= machine_check_generic,
897
		.platform		= "ppc7400",
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	},
	{	/* 7450 2.0 - no doze/nap */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80000200,
		.cpu_name		= "7450",
903
		.cpu_features		= CPU_FTRS_7450_20,
904 905
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
906
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
910
		.pmc_type		= PPC_PMC_G4,
911 912
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
913
		.oprofile_type		= PPC_OPROFILE_G4,
914
		.machine_check		= machine_check_generic,
915
		.platform		= "ppc7450",
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	},
	{	/* 7450 2.1 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80000201,
		.cpu_name		= "7450",
921
		.cpu_features		= CPU_FTRS_7450_21,
922 923
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
924
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
928
		.pmc_type		= PPC_PMC_G4,
929 930
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
931
		.oprofile_type		= PPC_OPROFILE_G4,
932
		.machine_check		= machine_check_generic,
933
		.platform		= "ppc7450",
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	},
	{	/* 7450 2.3 and newer */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80000000,
		.cpu_name		= "7450",
939
		.cpu_features		= CPU_FTRS_7450_23,
940 941
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
942
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
946
		.pmc_type		= PPC_PMC_G4,
947 948
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
949
		.oprofile_type		= PPC_OPROFILE_G4,
950
		.machine_check		= machine_check_generic,
951
		.platform		= "ppc7450",
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	},
	{	/* 7455 rev 1.x */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x80010100,
		.cpu_name		= "7455",
957
		.cpu_features		= CPU_FTRS_7455_1,
958 959
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
960
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
964
		.pmc_type		= PPC_PMC_G4,
965 966
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
967
		.oprofile_type		= PPC_OPROFILE_G4,
968
		.machine_check		= machine_check_generic,
969
		.platform		= "ppc7450",
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	},
	{	/* 7455 rev 2.0 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80010200,
		.cpu_name		= "7455",
975
		.cpu_features		= CPU_FTRS_7455_20,
976 977
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
978
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
982
		.pmc_type		= PPC_PMC_G4,
983 984
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
985
		.oprofile_type		= PPC_OPROFILE_G4,
986
		.machine_check		= machine_check_generic,
987
		.platform		= "ppc7450",
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	},
	{	/* 7455 others */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80010000,
		.cpu_name		= "7455",
993
		.cpu_features		= CPU_FTRS_7455,
994 995
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
996
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1000
		.pmc_type		= PPC_PMC_G4,
1001 1002
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1003
		.oprofile_type		= PPC_OPROFILE_G4,
1004
		.machine_check		= machine_check_generic,
1005
		.platform		= "ppc7450",
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	},
	{	/* 7447/7457 Rev 1.0 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80020100,
		.cpu_name		= "7447/7457",
1011
		.cpu_features		= CPU_FTRS_7447_10,
1012 1013
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1014
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1018
		.pmc_type		= PPC_PMC_G4,
1019 1020
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1021
		.oprofile_type		= PPC_OPROFILE_G4,
1022
		.machine_check		= machine_check_generic,
1023
		.platform		= "ppc7450",
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	},
	{	/* 7447/7457 Rev 1.1 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80020101,
		.cpu_name		= "7447/7457",
1029
		.cpu_features		= CPU_FTRS_7447_10,
1030 1031
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1032
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1036
		.pmc_type		= PPC_PMC_G4,
1037 1038
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1039
		.oprofile_type		= PPC_OPROFILE_G4,
1040
		.machine_check		= machine_check_generic,
1041
		.platform		= "ppc7450",
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	},
	{	/* 7447/7457 Rev 1.2 and later */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80020000,
		.cpu_name		= "7447/7457",
1047
		.cpu_features		= CPU_FTRS_7447,
1048
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1049
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1053
		.pmc_type		= PPC_PMC_G4,
1054 1055
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1056
		.oprofile_type		= PPC_OPROFILE_G4,
1057
		.machine_check		= machine_check_generic,
1058
		.platform		= "ppc7450",
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	},
	{	/* 7447A */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80030000,
		.cpu_name		= "7447A",
1064
		.cpu_features		= CPU_FTRS_7447A,
1065 1066
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1067
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1068 1069 1070
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1071
		.pmc_type		= PPC_PMC_G4,
1072 1073
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1074
		.oprofile_type		= PPC_OPROFILE_G4,
1075
		.machine_check		= machine_check_generic,
1076
		.platform		= "ppc7450",
1077 1078 1079 1080 1081
	},
	{	/* 7448 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80040000,
		.cpu_name		= "7448",
1082
		.cpu_features		= CPU_FTRS_7448,
1083 1084
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1085
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1089
		.pmc_type		= PPC_PMC_G4,
1090 1091
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1092
		.oprofile_type		= PPC_OPROFILE_G4,
1093
		.machine_check		= machine_check_generic,
1094
		.platform		= "ppc7450",
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	},
	{	/* 82xx (8240, 8245, 8260 are all 603e cores) */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00810000,
		.cpu_name		= "82xx",
1100
		.cpu_features		= CPU_FTRS_82XX,
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		.cpu_user_features	= COMMON_USER,
1102
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1105
		.cpu_setup		= __setup_cpu_603,
1106
		.machine_check		= machine_check_generic,
1107
		.platform		= "ppc603",
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	},
	{	/* All G2_LE (603e core, plus some) have the same pvr */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00820000,
		.cpu_name		= "G2_LE",
1113
		.cpu_features		= CPU_FTRS_G2_LE,
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		.cpu_user_features	= COMMON_USER,
1115
		.mmu_features		= MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1118
		.cpu_setup		= __setup_cpu_603,
1119
		.machine_check		= machine_check_generic,
1120
		.platform		= "ppc603",
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	},
1122
	{	/* e300c1 (a 603e core, plus some) on 83xx */
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		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00830000,
1125
		.cpu_name		= "e300c1",
1126
		.cpu_features		= CPU_FTRS_E300,
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		.cpu_user_features	= COMMON_USER,
1128
		.mmu_features		= MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1131
		.cpu_setup		= __setup_cpu_603,
1132
		.machine_check		= machine_check_generic,
1133
		.platform		= "ppc603",
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	},
1135 1136 1137 1138
	{	/* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00840000,
		.cpu_name		= "e300c2",
1139
		.cpu_features		= CPU_FTRS_E300C2,
1140
		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1141 1142
		.mmu_features		= MMU_FTR_USE_HIGH_BATS |
			MMU_FTR_NEED_DTLB_SW_LRU,
1143 1144 1145
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_603,
1146
		.machine_check		= machine_check_generic,
1147 1148
		.platform		= "ppc603",
	},
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	{	/* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1150 1151 1152 1153 1154
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00850000,
		.cpu_name		= "e300c3",
		.cpu_features		= CPU_FTRS_E300,
		.cpu_user_features	= COMMON_USER,
1155 1156
		.mmu_features		= MMU_FTR_USE_HIGH_BATS |
			MMU_FTR_NEED_DTLB_SW_LRU,
1157 1158 1159
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_603,
1160 1161 1162
		.num_pmcs		= 4,
		.oprofile_cpu_type	= "ppc/e300",
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
1163 1164
		.platform		= "ppc603",
	},
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	{	/* e300c4 (e300c1, plus one IU) */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00860000,
		.cpu_name		= "e300c4",
		.cpu_features		= CPU_FTRS_E300,
		.cpu_user_features	= COMMON_USER,
1171 1172
		.mmu_features		= MMU_FTR_USE_HIGH_BATS |
			MMU_FTR_NEED_DTLB_SW_LRU,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_603,
1176
		.machine_check		= machine_check_generic,
1177 1178 1179
		.num_pmcs		= 4,
		.oprofile_cpu_type	= "ppc/e300",
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
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		.platform		= "ppc603",
	},
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	{	/* default match, we assume split I/D cache & TB (non-601)... */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic PPC)",
1186
		.cpu_features		= CPU_FTRS_CLASSIC32,
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		.cpu_user_features	= COMMON_USER,
1188
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1191
		.machine_check		= machine_check_generic,
1192
		.platform		= "ppc603",
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	},
#endif /* CLASSIC_PPC */
#ifdef CONFIG_8xx
	{	/* 8xx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00500000,
		.cpu_name		= "8xx",
		/* CPU_FTR_MAYBE_CAN_DOZE is possible,
		 * if the 8xx code is there.... */
1202
		.cpu_features		= CPU_FTRS_8XX,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1204
		.mmu_features		= MMU_FTR_TYPE_8xx,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1207
		.platform		= "ppc823",
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	},
#endif /* CONFIG_8xx */
#ifdef CONFIG_40x
	{	/* 403GC */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x00200200,
		.cpu_name		= "403GC",
1215
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1217
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1220
		.machine_check		= machine_check_4xx,
1221
		.platform		= "ppc403",
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	},
	{	/* 403GCX */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x00201400,
		.cpu_name		= "403GCX",
1227
		.cpu_features		= CPU_FTRS_40X,
1228 1229
		.cpu_user_features	= PPC_FEATURE_32 |
		 	PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1230
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1233
		.machine_check		= machine_check_4xx,
1234
		.platform		= "ppc403",
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	},
	{	/* 403G ?? */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00200000,
		.cpu_name		= "403G ??",
1240
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1242
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1245
		.machine_check		= machine_check_4xx,
1246
		.platform		= "ppc403",
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	},
	{	/* 405GP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x40110000,
		.cpu_name		= "405GP",
1252
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1255
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1258
		.machine_check		= machine_check_4xx,
1259
		.platform		= "ppc405",
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	},
	{	/* STB 03xxx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x40130000,
		.cpu_name		= "STB03xxx",
1265
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1268
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1271
		.machine_check		= machine_check_4xx,
1272
		.platform		= "ppc405",
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	},
	{	/* STB 04xxx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41810000,
		.cpu_name		= "STB04xxx",
1278
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1281
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1284
		.machine_check		= machine_check_4xx,
1285
		.platform		= "ppc405",
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	},
	{	/* NP405L */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41610000,
		.cpu_name		= "NP405L",
1291
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1294
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1297
		.machine_check		= machine_check_4xx,
1298
		.platform		= "ppc405",
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	},
	{	/* NP4GS3 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x40B10000,
		.cpu_name		= "NP4GS3",
1304
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1307
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1310
		.machine_check		= machine_check_4xx,
1311
		.platform		= "ppc405",
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	},
	{   /* NP405H */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41410000,
		.cpu_name		= "NP405H",
1317
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1320
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1323
		.machine_check		= machine_check_4xx,
1324
		.platform		= "ppc405",
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	},
	{	/* 405GPr */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x50910000,
		.cpu_name		= "405GPr",
1330
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1333
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1336
		.machine_check		= machine_check_4xx,
1337
		.platform		= "ppc405",
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	},
	{   /* STBx25xx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x51510000,
		.cpu_name		= "STBx25xx",
1343
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1346
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1349
		.machine_check		= machine_check_4xx,
1350
		.platform		= "ppc405",
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	},
	{	/* 405LP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41F10000,
		.cpu_name		= "405LP",
1356
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1358
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1361
		.machine_check		= machine_check_4xx,
1362
		.platform		= "ppc405",
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	},
	{	/* Xilinx Virtex-II Pro  */
1365
		.pvr_mask		= 0xfffff000,
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		.pvr_value		= 0x20010000,
		.cpu_name		= "Virtex-II Pro",
1368
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1371
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1374
		.machine_check		= machine_check_4xx,
1375
		.platform		= "ppc405",
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	},
1377 1378 1379 1380 1381 1382 1383
	{	/* Xilinx Virtex-4 FX */
		.pvr_mask		= 0xfffff000,
		.pvr_value		= 0x20011000,
		.cpu_name		= "Virtex-4 FX",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1384
		.mmu_features		= MMU_FTR_TYPE_40x,
1385 1386
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1387
		.machine_check		= machine_check_4xx,
1388
		.platform		= "ppc405",
1389
	},
1390 1391 1392 1393
	{	/* 405EP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x51210000,
		.cpu_name		= "405EP",
1394
		.cpu_features		= CPU_FTRS_40X,
1395 1396
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1397
		.mmu_features		= MMU_FTR_TYPE_40x,
1398 1399
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1400
		.machine_check		= machine_check_4xx,
1401 1402
		.platform		= "ppc405",
	},
1403 1404 1405 1406
	{	/* 405EX Rev. A/B with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910007,
		.cpu_name		= "405EX Rev. A/B",
1407
		.cpu_features		= CPU_FTRS_40X,
1408 1409
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1410
		.mmu_features		= MMU_FTR_TYPE_40x,
1411 1412
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1413
		.machine_check		= machine_check_4xx,
1414
		.platform		= "ppc405",
1415
	},
1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508
	{	/* 405EX Rev. C without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x1291000d,
		.cpu_name		= "405EX Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EX Rev. C with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x1291000f,
		.cpu_name		= "405EX Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EX Rev. D without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910003,
		.cpu_name		= "405EX Rev. D",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EX Rev. D with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910005,
		.cpu_name		= "405EX Rev. D",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. A/B without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910001,
		.cpu_name		= "405EXr Rev. A/B",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. C without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910009,
		.cpu_name		= "405EXr Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. C with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x1291000b,
		.cpu_name		= "405EXr Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. D without Security */
		.pvr_mask		= 0xffff000f,
1509
		.pvr_value		= 0x12910000,
1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523
		.cpu_name		= "405EXr Rev. D",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. D with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910002,
		.cpu_name		= "405EXr Rev. D",
1524 1525 1526
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1527
		.mmu_features		= MMU_FTR_TYPE_40x,
1528 1529 1530 1531 1532
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
1533 1534 1535 1536 1537 1538 1539 1540
	{
		/* 405EZ */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41510000,
		.cpu_name		= "405EZ",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1541
		.mmu_features		= MMU_FTR_TYPE_40x,
1542 1543 1544 1545 1546
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559
	{	/* APM8018X */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x7ff11432,
		.cpu_name		= "APM8018X",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
1560 1561 1562 1563 1564 1565 1566
	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic 40x PPC)",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1567
		.mmu_features		= MMU_FTR_TYPE_40x,
1568 1569 1570 1571 1572
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	}
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Linus Torvalds 已提交
1573 1574 1575

#endif /* CONFIG_40x */
#ifdef CONFIG_44x
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1576 1577 1578
	{
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000850,
1579 1580 1581
		.cpu_name		= "440GR Rev. A",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1582
		.mmu_features		= MMU_FTR_TYPE_44x,
1583 1584
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1585
		.machine_check		= machine_check_4xx,
1586 1587 1588 1589 1590
		.platform		= "ppc440",
	},
	{ /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000858,
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1591
		.cpu_name		= "440EP Rev. A",
1592
		.cpu_features		= CPU_FTRS_44X,
1593
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1594
		.mmu_features		= MMU_FTR_TYPE_44x,
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Matt Porter 已提交
1595 1596
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1597
		.cpu_setup		= __setup_cpu_440ep,
1598
		.machine_check		= machine_check_4xx,
1599
		.platform		= "ppc440",
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1600 1601 1602 1603
	},
	{
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x400008d3,
1604
		.cpu_name		= "440GR Rev. B",
1605
		.cpu_features		= CPU_FTRS_44X,
1606
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1607
		.mmu_features		= MMU_FTR_TYPE_44x,
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Matt Porter 已提交
1608 1609
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1610
		.machine_check		= machine_check_4xx,
1611
		.platform		= "ppc440",
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Matt Porter 已提交
1612
	},
1613 1614 1615 1616 1617 1618
	{ /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000ff7,
		.pvr_value		= 0x400008d4,
		.cpu_name		= "440EP Rev. C",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1619
		.mmu_features		= MMU_FTR_TYPE_44x,
1620 1621 1622 1623 1624 1625
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_440ep,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc440",
	},
1626 1627 1628 1629
	{ /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x400008db,
		.cpu_name		= "440EP Rev. B",
1630 1631
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1632
		.mmu_features		= MMU_FTR_TYPE_44x,
1633 1634
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1635
		.cpu_setup		= __setup_cpu_440ep,
1636
		.machine_check		= machine_check_4xx,
1637
		.platform		= "ppc440",
1638 1639 1640
	},
	{ /* 440GRX */
		.pvr_mask		= 0xf0000ffb,
1641
		.pvr_value		= 0x200008D0,
1642 1643 1644
		.cpu_name		= "440GRX",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1645
		.mmu_features		= MMU_FTR_TYPE_44x,
1646 1647
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1648
		.cpu_setup		= __setup_cpu_440grx,
1649
		.machine_check		= machine_check_440A,
1650
		.platform		= "ppc440",
1651
	},
1652 1653 1654 1655 1656 1657
	{ /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000ffb,
		.pvr_value		= 0x200008D8,
		.cpu_name		= "440EPX",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1658
		.mmu_features		= MMU_FTR_TYPE_44x,
1659 1660 1661
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_440epx,
1662
		.machine_check		= machine_check_440A,
1663 1664
		.platform		= "ppc440",
	},
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1665
	{	/* 440GP Rev. B */
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1666 1667 1668
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000440,
		.cpu_name		= "440GP Rev. B",
1669
		.cpu_features		= CPU_FTRS_44X,
1670
		.cpu_user_features	= COMMON_USER_BOOKE,
1671
		.mmu_features		= MMU_FTR_TYPE_44x,
L
Linus Torvalds 已提交
1672 1673
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1674
		.machine_check		= machine_check_4xx,
1675
		.platform		= "ppc440gp",
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Linus Torvalds 已提交
1676
	},
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1677
	{	/* 440GP Rev. C */
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Linus Torvalds 已提交
1678 1679 1680
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000481,
		.cpu_name		= "440GP Rev. C",
1681
		.cpu_features		= CPU_FTRS_44X,
1682
		.cpu_user_features	= COMMON_USER_BOOKE,
1683
		.mmu_features		= MMU_FTR_TYPE_44x,
L
Linus Torvalds 已提交
1684 1685
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1686
		.machine_check		= machine_check_4xx,
1687
		.platform		= "ppc440gp",
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Linus Torvalds 已提交
1688 1689 1690 1691 1692
	},
	{ /* 440GX Rev. A */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000850,
		.cpu_name		= "440GX Rev. A",
1693
		.cpu_features		= CPU_FTRS_44X,
1694
		.cpu_user_features	= COMMON_USER_BOOKE,
1695
		.mmu_features		= MMU_FTR_TYPE_44x,
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Linus Torvalds 已提交
1696 1697
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1698 1699
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1700
		.platform		= "ppc440",
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Linus Torvalds 已提交
1701 1702 1703 1704 1705
	},
	{ /* 440GX Rev. B */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000851,
		.cpu_name		= "440GX Rev. B",
1706
		.cpu_features		= CPU_FTRS_44X,
1707
		.cpu_user_features	= COMMON_USER_BOOKE,
1708
		.mmu_features		= MMU_FTR_TYPE_44x,
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Linus Torvalds 已提交
1709 1710
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1711 1712
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1713
		.platform		= "ppc440",
L
Linus Torvalds 已提交
1714 1715 1716 1717 1718
	},
	{ /* 440GX Rev. C */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000892,
		.cpu_name		= "440GX Rev. C",
1719
		.cpu_features		= CPU_FTRS_44X,
1720
		.cpu_user_features	= COMMON_USER_BOOKE,
1721
		.mmu_features		= MMU_FTR_TYPE_44x,
L
Linus Torvalds 已提交
1722 1723
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1724 1725
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1726
		.platform		= "ppc440",
L
Linus Torvalds 已提交
1727
	},
1728 1729 1730 1731
	{ /* 440GX Rev. F */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000894,
		.cpu_name		= "440GX Rev. F",
1732
		.cpu_features		= CPU_FTRS_44X,
1733
		.cpu_user_features	= COMMON_USER_BOOKE,
1734
		.mmu_features		= MMU_FTR_TYPE_44x,
1735 1736
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1737 1738
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1739
		.platform		= "ppc440",
1740
	},
1741
	{ /* 440SP Rev. A */
1742 1743
		.pvr_mask		= 0xfff00fff,
		.pvr_value		= 0x53200891,
1744
		.cpu_name		= "440SP Rev. A",
1745
		.cpu_features		= CPU_FTRS_44X,
1746
		.cpu_user_features	= COMMON_USER_BOOKE,
1747
		.mmu_features		= MMU_FTR_TYPE_44x,
1748 1749
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1750
		.machine_check		= machine_check_4xx,
1751
		.platform		= "ppc440",
1752
	},
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Roland Dreier 已提交
1753
	{ /* 440SPe Rev. A */
1754 1755 1756 1757 1758
		.pvr_mask               = 0xfff00fff,
		.pvr_value              = 0x53400890,
		.cpu_name               = "440SPe Rev. A",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features      = COMMON_USER_BOOKE,
1759
		.mmu_features		= MMU_FTR_TYPE_44x,
1760 1761
		.icache_bsize           = 32,
		.dcache_bsize           = 32,
1762 1763
		.cpu_setup		= __setup_cpu_440spe,
		.machine_check		= machine_check_440A,
1764 1765 1766 1767 1768 1769
		.platform               = "ppc440",
	},
	{ /* 440SPe Rev. B */
		.pvr_mask		= 0xfff00fff,
		.pvr_value		= 0x53400891,
		.cpu_name		= "440SPe Rev. B",
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Kumar Gala 已提交
1770
		.cpu_features		= CPU_FTRS_44X,
1771
		.cpu_user_features	= COMMON_USER_BOOKE,
1772
		.mmu_features		= MMU_FTR_TYPE_44x,
R
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1773 1774
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1775 1776
		.cpu_setup		= __setup_cpu_440spe,
		.machine_check		= machine_check_440A,
1777
		.platform		= "ppc440",
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Roland Dreier 已提交
1778
	},
1779 1780 1781 1782 1783 1784
	{ /* 440 in Xilinx Virtex-5 FXT */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x7ff21910,
		.cpu_name		= "440 in Virtex-5 FXT",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1785
		.mmu_features		= MMU_FTR_TYPE_44x,
1786 1787
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1788 1789
		.cpu_setup		= __setup_cpu_440x5,
		.machine_check		= machine_check_440A,
1790 1791
		.platform		= "ppc440",
	},
1792
	{ /* 460EX */
1793
		.pvr_mask		= 0xffff0006,
1794 1795
		.pvr_value		= 0x13020002,
		.cpu_name		= "460EX",
1796
		.cpu_features		= CPU_FTRS_440x6,
1797
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1798
		.mmu_features		= MMU_FTR_TYPE_44x,
1799 1800 1801 1802 1803 1804
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460ex,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817
	{ /* 460EX Rev B */
		.pvr_mask		= 0xffff0007,
		.pvr_value		= 0x13020004,
		.cpu_name		= "460EX Rev. B",
		.cpu_features		= CPU_FTRS_440x6,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_44x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460ex,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1818
	{ /* 460GT */
1819
		.pvr_mask		= 0xffff0006,
1820 1821
		.pvr_value		= 0x13020000,
		.cpu_name		= "460GT",
1822
		.cpu_features		= CPU_FTRS_440x6,
1823
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1824
		.mmu_features		= MMU_FTR_TYPE_44x,
1825 1826
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1827
		.cpu_setup		= __setup_cpu_460gt,
1828 1829 1830
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843
	{ /* 460GT Rev B */
		.pvr_mask		= 0xffff0007,
		.pvr_value		= 0x13020005,
		.cpu_name		= "460GT Rev. B",
		.cpu_features		= CPU_FTRS_440x6,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_44x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460gt,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856
	{ /* 460SX */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x13541800,
		.cpu_name		= "460SX",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
		.mmu_features		= MMU_FTR_TYPE_44x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460sx,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1857
	{ /* 464 in APM821xx */
1858
		.pvr_mask		= 0xfffffff0,
1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870
		.pvr_value		= 0x12C41C80,
		.cpu_name		= "APM821XX",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_44x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_apm821xx,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1871 1872 1873
	{ /* 476 DD2 core */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x11a52080,
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Dave Kleikamp 已提交
1874
		.cpu_name		= "476",
1875
		.cpu_features		= CPU_FTRS_47X | CPU_FTR_476_DD2,
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Dave Kleikamp 已提交
1876
		.cpu_user_features	= COMMON_USER_BOOKE |
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1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_47x |
			MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
		.icache_bsize		= 32,
		.dcache_bsize		= 128,
		.machine_check		= machine_check_47x,
		.platform		= "ppc470",
	},
	{ /* 476fpe */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x7ff50000,
		.cpu_name		= "476fpe",
		.cpu_features		= CPU_FTRS_47X | CPU_FTR_476_DD2,
		.cpu_user_features	= COMMON_USER_BOOKE |
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1891 1892 1893
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_47x |
			MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907
		.icache_bsize		= 32,
		.dcache_bsize		= 128,
		.machine_check		= machine_check_47x,
		.platform		= "ppc470",
	},
	{ /* 476 iss */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00050000,
		.cpu_name		= "476",
		.cpu_features		= CPU_FTRS_47X,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_47x |
			MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
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Dave Kleikamp 已提交
1908 1909
		.icache_bsize		= 32,
		.dcache_bsize		= 128,
1910
		.machine_check		= machine_check_47x,
D
Dave Kleikamp 已提交
1911 1912
		.platform		= "ppc470",
	},
1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926
	{ /* 476 others */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x11a50000,
		.cpu_name		= "476",
		.cpu_features		= CPU_FTRS_47X,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_47x |
			MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
		.icache_bsize		= 32,
		.dcache_bsize		= 128,
		.machine_check		= machine_check_47x,
		.platform		= "ppc470",
	},
1927 1928 1929 1930 1931 1932
	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic 44x PPC)",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1933
		.mmu_features		= MMU_FTR_TYPE_44x,
1934 1935 1936 1937 1938
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc440",
	}
L
Linus Torvalds 已提交
1939
#endif /* CONFIG_44x */
1940
#ifdef CONFIG_E200
S
Stephen Rothwell 已提交
1941
	{	/* e200z5 */
1942 1943 1944 1945
		.pvr_mask		= 0xfff00000,
		.pvr_value		= 0x81000000,
		.cpu_name		= "e200z5",
		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1946
		.cpu_features		= CPU_FTRS_E200,
1947 1948
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_EFP_SINGLE |
1949
			PPC_FEATURE_UNIFIED_CACHE,
1950
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
1951
		.dcache_bsize		= 32,
1952
		.machine_check		= machine_check_e200,
1953
		.platform		= "ppc5554",
1954
	},
S
Stephen Rothwell 已提交
1955
	{	/* e200z6 */
1956 1957 1958 1959
		.pvr_mask		= 0xfff00000,
		.pvr_value		= 0x81100000,
		.cpu_name		= "e200z6",
		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1960
		.cpu_features		= CPU_FTRS_E200,
1961
		.cpu_user_features	= COMMON_USER_BOOKE |
1962 1963
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1964
			PPC_FEATURE_UNIFIED_CACHE,
1965
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
1966
		.dcache_bsize		= 32,
1967
		.machine_check		= machine_check_e200,
1968
		.platform		= "ppc5554",
1969
	},
1970 1971 1972 1973 1974 1975 1976 1977
	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic E200 PPC)",
		.cpu_features		= CPU_FTRS_E200,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_EFP_SINGLE |
			PPC_FEATURE_UNIFIED_CACHE,
1978
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
1979
		.dcache_bsize		= 32,
1980
		.cpu_setup		= __setup_cpu_e200,
1981 1982
		.machine_check		= machine_check_e200,
		.platform		= "ppc5554",
1983
	}
1984
#endif /* CONFIG_E200 */
1985
#endif /* CONFIG_PPC32 */
1986
#ifdef CONFIG_E500
1987
#ifdef CONFIG_PPC32
S
Stephen Rothwell 已提交
1988
	{	/* e500 */
L
Linus Torvalds 已提交
1989 1990 1991
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80200000,
		.cpu_name		= "e500",
1992
		.cpu_features		= CPU_FTRS_E500,
1993
		.cpu_user_features	= COMMON_USER_BOOKE |
1994 1995
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1996
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
L
Linus Torvalds 已提交
1997 1998 1999
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
2000
		.oprofile_cpu_type	= "ppc/e500",
2001
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
2002
		.cpu_setup		= __setup_cpu_e500v1,
2003
		.machine_check		= machine_check_e500,
2004
		.platform		= "ppc8540",
L
Linus Torvalds 已提交
2005
	},
S
Stephen Rothwell 已提交
2006
	{	/* e500v2 */
2007 2008 2009
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80210000,
		.cpu_name		= "e500v2",
2010
		.cpu_features		= CPU_FTRS_E500_2,
2011
		.cpu_user_features	= COMMON_USER_BOOKE |
2012 2013 2014
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP |
			PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
2015
		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
2016 2017 2018
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
2019
		.oprofile_cpu_type	= "ppc/e500",
2020
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
2021
		.cpu_setup		= __setup_cpu_e500v2,
2022
		.machine_check		= machine_check_e500,
2023
		.platform		= "ppc8548",
2024
	},
2025 2026 2027 2028 2029 2030
	{	/* e500mc */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80230000,
		.cpu_name		= "e500mc",
		.cpu_features		= CPU_FTRS_E500MC,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2031
		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2032
			MMU_FTR_USE_TLBILX,
2033 2034 2035
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 4,
S
Scott Wood 已提交
2036
		.oprofile_cpu_type	= "ppc/e500mc",
2037
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
2038
		.cpu_setup		= __setup_cpu_e500mc,
2039
		.machine_check		= machine_check_e500mc,
2040 2041
		.platform		= "ppce500mc",
	},
2042 2043 2044 2045 2046
#endif /* CONFIG_PPC32 */
	{	/* e5500 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80240000,
		.cpu_name		= "e5500",
2047
		.cpu_features		= CPU_FTRS_E5500,
2048
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2049 2050 2051 2052 2053 2054 2055 2056
		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
			MMU_FTR_USE_TLBILX,
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 4,
		.oprofile_cpu_type	= "ppc/e500mc",
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
		.cpu_setup		= __setup_cpu_e5500,
2057
#ifndef CONFIG_PPC32
2058
		.cpu_restore		= __restore_cpu_e5500,
2059
#endif
2060 2061 2062
		.machine_check		= machine_check_e500mc,
		.platform		= "ppce5500",
	},
2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076
	{	/* e6500 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80400000,
		.cpu_name		= "e6500",
		.cpu_features		= CPU_FTRS_E6500,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
			MMU_FTR_USE_TLBILX,
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 4,
		.oprofile_cpu_type	= "ppc/e6500",
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
		.cpu_setup		= __setup_cpu_e5500,
2077
#ifndef CONFIG_PPC32
2078
		.cpu_restore		= __restore_cpu_e5500,
2079
#endif
2080 2081 2082
		.machine_check		= machine_check_e500mc,
		.platform		= "ppce6500",
	},
2083
#ifdef CONFIG_PPC32
L
Linus Torvalds 已提交
2084 2085 2086
	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
2087 2088 2089 2090 2091
		.cpu_name		= "(generic E500 PPC)",
		.cpu_features		= CPU_FTRS_E500,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2092
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
L
Linus Torvalds 已提交
2093 2094
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
2095
		.machine_check		= machine_check_e500,
2096
		.platform		= "powerpc",
2097
	}
S
Stephen Rothwell 已提交
2098
#endif /* CONFIG_PPC32 */
2099
#endif /* CONFIG_E500 */
2100

2101 2102 2103 2104 2105 2106 2107
#ifdef CONFIG_PPC_A2
	{	/* Standard A2 (>= DD2) + FPU core */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00480000,
		.cpu_name		= "A2 (>= DD2)",
		.cpu_features		= CPU_FTRS_A2,
		.cpu_user_features	= COMMON_USER_PPC64,
2108
		.mmu_features		= MMU_FTRS_A2,
2109 2110 2111 2112 2113 2114 2115 2116
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 0,
		.cpu_setup		= __setup_cpu_a2,
		.cpu_restore		= __restore_cpu_a2,
		.machine_check		= machine_check_generic,
		.platform		= "ppca2",
	},
2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136
	{	/* This is a default entry to get going, to be replaced by
		 * a real one at some stage
		 */
#define CPU_FTRS_BASE_BOOK3E	(CPU_FTR_USE_TB | \
	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
	    CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "Book3E",
		.cpu_features		= CPU_FTRS_BASE_BOOK3E,
		.cpu_user_features	= COMMON_USER_PPC64,
		.mmu_features		= MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
					  MMU_FTR_USE_TLBIVAX_BCAST |
					  MMU_FTR_LOCK_BCAST_INVAL,
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 0,
		.machine_check		= machine_check_generic,
		.platform		= "power6",
	},
2137
#endif /* CONFIG_PPC_A2 */
L
Linus Torvalds 已提交
2138
};
2139

2140 2141
static struct cpu_spec the_cpu_spec;

2142 2143
static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
					       struct cpu_spec *s)
2144
{
2145
	struct cpu_spec *t = &the_cpu_spec;
2146 2147
	struct cpu_spec old;

2148
	t = PTRRELOC(t);
2149 2150 2151 2152
	old = *t;

	/* Copy everything, then do fixups */
	*t = *s;
2153

2154 2155 2156 2157 2158
	/*
	 * If we are overriding a previous value derived from the real
	 * PVR with a new value obtained using a logical PVR value,
	 * don't modify the performance monitor fields.
	 */
2159 2160 2161 2162 2163 2164 2165 2166
	if (old.num_pmcs && !s->num_pmcs) {
		t->num_pmcs = old.num_pmcs;
		t->pmc_type = old.pmc_type;
		t->oprofile_type = old.oprofile_type;
		t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
		t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
		t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;

2167 2168 2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179
		/*
		 * If we have passed through this logic once before and
		 * have pulled the default case because the real PVR was
		 * not found inside cpu_specs[], then we are possibly
		 * running in compatibility mode. In that case, let the
		 * oprofiler know which set of compatibility counters to
		 * pull from by making sure the oprofile_cpu_type string
		 * is set to that of compatibility mode. If the
		 * oprofile_cpu_type already has a value, then we are
		 * possibly overriding a real PVR with a logical one,
		 * and, in that case, keep the current value for
		 * oprofile_cpu_type.
		 */
2180
		if (old.oprofile_cpu_type != NULL) {
2181 2182
			t->oprofile_cpu_type = old.oprofile_cpu_type;
			t->oprofile_type = old.oprofile_type;
2183
		}
2184
	}
2185 2186

	*PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2187

2188 2189 2190 2191 2192 2193
	/*
	 * Set the base platform string once; assumes
	 * we're called with real pvr first.
	 */
	if (*PTRRELOC(&powerpc_base_platform) == NULL)
		*PTRRELOC(&powerpc_base_platform) = t->platform;
2194

2195
#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2196 2197 2198 2199 2200 2201
	/* ppc64 and booke expect identify_cpu to also call setup_cpu for
	 * that processor. I will consolidate that at a later time, for now,
	 * just use #ifdef. We also don't need to PTRRELOC the function
	 * pointer on ppc64 and booke as we are running at 0 in real mode
	 * on ppc64 and reloc_offset is always 0 on booke.
	 */
2202 2203
	if (t->cpu_setup) {
		t->cpu_setup(offset, t);
2204
	}
2205
#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2206 2207

	return t;
2208 2209 2210 2211 2212 2213 2214 2215 2216 2217
}

struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
{
	struct cpu_spec *s = cpu_specs;
	int i;

	s = PTRRELOC(s);

	for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2218 2219
		if ((pvr & s->pvr_mask) == s->pvr_value)
			return setup_cpu_spec(offset, s);
2220 2221
	}

2222
	BUG();
2223

2224 2225
	return NULL;
}