cputable.c 65.0 KB
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/*
 *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
 *
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 *  Modifications for ppc64:
 *      Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
 *
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 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */

#include <linux/string.h>
#include <linux/sched.h>
#include <linux/threads.h>
#include <linux/init.h>
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#include <linux/export.h>
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#include <asm/oprofile_impl.h>
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#include <asm/cputable.h>
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#include <asm/prom.h>		/* for PTRRELOC on ARCH=ppc */
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#include <asm/mmu.h>
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#include <asm/setup.h>
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struct cpu_spec* cur_cpu_spec = NULL;
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EXPORT_SYMBOL(cur_cpu_spec);
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/* The platform string corresponding to the real PVR */
const char *powerpc_base_platform;

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/* NOTE:
 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
 * the responsibility of the appropriate CPU save/restore functions to
 * eventually copy these settings over. Those save/restore aren't yet
 * part of the cputable though. That has to be fixed for both ppc32
 * and ppc64
 */
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#ifdef CONFIG_PPC32
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extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
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extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
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extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
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#endif /* CONFIG_PPC32 */
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#ifdef CONFIG_PPC64
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extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);
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extern void __restore_cpu_pa6t(void);
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extern void __restore_cpu_ppc970(void);
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extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
extern void __restore_cpu_power7(void);
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extern void __restore_cpu_a2(void);
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#endif /* CONFIG_PPC64 */
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#if defined(CONFIG_E500)
extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
extern void __restore_cpu_e5500(void);
#endif /* CONFIG_E500 */
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/* This table only contains "desktop" CPUs, it need to be filled with embedded
 * ones as well...
 */
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#define COMMON_USER		(PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
				 PPC_FEATURE_HAS_MMU)
#define COMMON_USER_PPC64	(COMMON_USER | PPC_FEATURE_64)
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#define COMMON_USER_POWER4	(COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
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#define COMMON_USER_POWER5	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
#define COMMON_USER_POWER5_PLUS	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
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#define COMMON_USER_POWER6	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
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				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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				 PPC_FEATURE_TRUE_LE | \
				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
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#define COMMON_USER_POWER7	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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				 PPC_FEATURE_TRUE_LE | \
				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
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#define COMMON_USER_PA6T	(COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
				 PPC_FEATURE_TRUE_LE | \
				 PPC_FEATURE_HAS_ALTIVEC_COMP)
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#ifdef CONFIG_PPC_BOOK3E_64
#define COMMON_USER_BOOKE	(COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
#else
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#define COMMON_USER_BOOKE	(PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
				 PPC_FEATURE_BOOKE)
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#endif
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static struct cpu_spec __initdata cpu_specs[] = {
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#ifdef CONFIG_PPC_BOOK3S_64
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	{	/* Power3 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00400000,
		.cpu_name		= "POWER3 (630)",
		.cpu_features		= CPU_FTRS_POWER3,
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		.cpu_user_features	= COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power3",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "power3",
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	},
	{	/* Power3+ */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00410000,
		.cpu_name		= "POWER3 (630+)",
		.cpu_features		= CPU_FTRS_POWER3,
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		.cpu_user_features	= COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power3",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "power3",
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	},
	{	/* Northstar */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00330000,
		.cpu_name		= "RS64-II (northstar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "rs64",
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	},
	{	/* Pulsar */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00340000,
		.cpu_name		= "RS64-III (pulsar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "rs64",
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	},
	{	/* I-star */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00360000,
		.cpu_name		= "RS64-III (icestar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "rs64",
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	},
	{	/* S-star */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00370000,
		.cpu_name		= "RS64-IV (sstar)",
		.cpu_features		= CPU_FTRS_RS64,
		.cpu_user_features	= COMMON_USER_PPC64,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/rs64",
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		.oprofile_type		= PPC_OPROFILE_RS64,
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		.platform		= "rs64",
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	},
	{	/* Power4 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00350000,
		.cpu_name		= "POWER4 (gp)",
		.cpu_features		= CPU_FTRS_POWER4,
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		.cpu_user_features	= COMMON_USER_POWER4,
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		.mmu_features		= MMU_FTRS_POWER4,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power4",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.platform		= "power4",
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	},
	{	/* Power4+ */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00380000,
		.cpu_name		= "POWER4+ (gq)",
		.cpu_features		= CPU_FTRS_POWER4,
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		.cpu_user_features	= COMMON_USER_POWER4,
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		.mmu_features		= MMU_FTRS_POWER4,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power4",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.platform		= "power4",
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	},
	{	/* PPC970 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00390000,
		.cpu_name		= "PPC970",
		.cpu_features		= CPU_FTRS_PPC970,
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		.cpu_user_features	= COMMON_USER_POWER4 |
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			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTRS_PPC970,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
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		.cpu_restore		= __restore_cpu_ppc970,
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		.oprofile_cpu_type	= "ppc64/970",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.platform		= "ppc970",
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	},
	{	/* PPC970FX */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003c0000,
		.cpu_name		= "PPC970FX",
		.cpu_features		= CPU_FTRS_PPC970,
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		.cpu_user_features	= COMMON_USER_POWER4 |
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			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTRS_PPC970,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
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		.cpu_restore		= __restore_cpu_ppc970,
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		.oprofile_cpu_type	= "ppc64/970",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.platform		= "ppc970",
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	},
	{	/* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x00440100,
		.cpu_name		= "PPC970MP",
		.cpu_features		= CPU_FTRS_PPC970,
		.cpu_user_features	= COMMON_USER_POWER4 |
			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
		.cpu_restore		= __restore_cpu_ppc970,
		.oprofile_cpu_type	= "ppc64/970MP",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.platform		= "ppc970",
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	},
	{	/* PPC970MP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00440000,
		.cpu_name		= "PPC970MP",
		.cpu_features		= CPU_FTRS_PPC970,
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		.cpu_user_features	= COMMON_USER_POWER4 |
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			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTRS_PPC970,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
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		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970MP,
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		.cpu_restore		= __restore_cpu_ppc970,
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		.oprofile_cpu_type	= "ppc64/970MP",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.platform		= "ppc970",
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	},
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	{	/* PPC970GX */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00450000,
		.cpu_name		= "PPC970GX",
		.cpu_features		= CPU_FTRS_PPC970,
		.cpu_user_features	= COMMON_USER_POWER4 |
			PPC_FEATURE_HAS_ALTIVEC_COMP,
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		.mmu_features		= MMU_FTRS_PPC970,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 8,
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		.pmc_type		= PPC_PMC_IBM,
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		.cpu_setup		= __setup_cpu_ppc970,
		.oprofile_cpu_type	= "ppc64/970",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.platform		= "ppc970",
	},
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	{	/* Power5 GR */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003a0000,
		.cpu_name		= "POWER5 (gr)",
		.cpu_features		= CPU_FTRS_POWER5,
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		.cpu_user_features	= COMMON_USER_POWER5,
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		.mmu_features		= MMU_FTRS_POWER5,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power5",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		/* SIHV / SIPR bits are implemented on POWER4+ (GQ)
		 * and above but only works on POWER5 and above
		 */
		.oprofile_mmcra_sihv	= MMCRA_SIHV,
		.oprofile_mmcra_sipr	= MMCRA_SIPR,
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		.platform		= "power5",
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	},
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	{	/* Power5++ */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x003b0300,
		.cpu_name		= "POWER5+ (gs)",
		.cpu_features		= CPU_FTRS_POWER5,
		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
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		.mmu_features		= MMU_FTRS_POWER5,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
		.oprofile_cpu_type	= "ppc64/power5++",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.oprofile_mmcra_sihv	= MMCRA_SIHV,
		.oprofile_mmcra_sipr	= MMCRA_SIPR,
		.platform		= "power5+",
	},
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	{	/* Power5 GS */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003b0000,
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		.cpu_name		= "POWER5+ (gs)",
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		.cpu_features		= CPU_FTRS_POWER5,
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		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
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		.mmu_features		= MMU_FTRS_POWER5,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
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		.pmc_type		= PPC_PMC_IBM,
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		.oprofile_cpu_type	= "ppc64/power5+",
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		.oprofile_type		= PPC_OPROFILE_POWER4,
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		.oprofile_mmcra_sihv	= MMCRA_SIHV,
		.oprofile_mmcra_sipr	= MMCRA_SIPR,
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		.platform		= "power5+",
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	},
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	{	/* POWER6 in P5+ mode; 2.04-compliant processor */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x0f000001,
		.cpu_name		= "POWER5+",
		.cpu_features		= CPU_FTRS_POWER5,
		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
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		.mmu_features		= MMU_FTRS_POWER5,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
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		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",
		.oprofile_type		= PPC_OPROFILE_POWER4,
382 383
		.platform		= "power5+",
	},
384 385 386
	{	/* Power6 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003e0000,
387 388 389 390
		.cpu_name		= "POWER6 (raw)",
		.cpu_features		= CPU_FTRS_POWER6,
		.cpu_user_features	= COMMON_USER_POWER6 |
			PPC_FEATURE_POWER6_EXT,
391
		.mmu_features		= MMU_FTRS_POWER6,
392 393 394
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
395
		.pmc_type		= PPC_PMC_IBM,
396 397 398 399 400 401 402 403 404 405 406 407
		.oprofile_cpu_type	= "ppc64/power6",
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.oprofile_mmcra_sihv	= POWER6_MMCRA_SIHV,
		.oprofile_mmcra_sipr	= POWER6_MMCRA_SIPR,
		.oprofile_mmcra_clear	= POWER6_MMCRA_THRM |
			POWER6_MMCRA_OTHER,
		.platform		= "power6x",
	},
	{	/* 2.05-compliant processor, i.e. Power6 "architected" mode */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x0f000002,
		.cpu_name		= "POWER6 (architected)",
408 409
		.cpu_features		= CPU_FTRS_POWER6,
		.cpu_user_features	= COMMON_USER_POWER6,
410
		.mmu_features		= MMU_FTRS_POWER6,
411 412
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
413 414
		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",
		.oprofile_type		= PPC_OPROFILE_POWER4,
415 416
		.platform		= "power6",
	},
417 418 419 420 421 422
	{	/* 2.06-compliant processor, i.e. Power7 "architected" mode */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x0f000003,
		.cpu_name		= "POWER7 (architected)",
		.cpu_features		= CPU_FTRS_POWER7,
		.cpu_user_features	= COMMON_USER_POWER7,
423
		.mmu_features		= MMU_FTRS_POWER7,
424 425
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
426 427
		.oprofile_type		= PPC_OPROFILE_POWER4,
		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",
428 429
		.cpu_setup		= __setup_cpu_power7,
		.cpu_restore		= __restore_cpu_power7,
430 431
		.platform		= "power7",
	},
432 433 434
	{	/* Power7 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x003f0000,
435
		.cpu_name		= "POWER7 (raw)",
436 437
		.cpu_features		= CPU_FTRS_POWER7,
		.cpu_user_features	= COMMON_USER_POWER7,
438
		.mmu_features		= MMU_FTRS_POWER7,
439 440 441 442 443 444
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
		.pmc_type		= PPC_PMC_IBM,
		.oprofile_cpu_type	= "ppc64/power7",
		.oprofile_type		= PPC_OPROFILE_POWER4,
445 446
		.cpu_setup		= __setup_cpu_power7,
		.cpu_restore		= __restore_cpu_power7,
447 448
		.platform		= "power7",
	},
449 450 451 452 453 454
	{	/* Power7+ */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x004A0000,
		.cpu_name		= "POWER7+ (raw)",
		.cpu_features		= CPU_FTRS_POWER7,
		.cpu_user_features	= COMMON_USER_POWER7,
455
		.mmu_features		= MMU_FTRS_POWER7,
456 457 458 459 460 461
		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
		.pmc_type		= PPC_PMC_IBM,
		.oprofile_cpu_type	= "ppc64/power7",
		.oprofile_type		= PPC_OPROFILE_POWER4,
462 463
		.cpu_setup		= __setup_cpu_power7,
		.cpu_restore		= __restore_cpu_power7,
464 465
		.platform		= "power7+",
	},
466
	{	/* Cell Broadband Engine */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00700000,
		.cpu_name		= "Cell Broadband Engine",
		.cpu_features		= CPU_FTRS_CELL,
		.cpu_user_features	= COMMON_USER_PPC64 |
472 473
			PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
			PPC_FEATURE_SMT,
474
		.mmu_features		= MMU_FTRS_CELL,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
477
		.num_pmcs		= 4,
478
		.pmc_type		= PPC_PMC_IBM,
479 480
		.oprofile_cpu_type	= "ppc64/cell-be",
		.oprofile_type		= PPC_OPROFILE_CELL,
481
		.platform		= "ppc-cell-be",
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	},
483 484 485 486 487 488
	{	/* PA Semi PA6T */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00900000,
		.cpu_name		= "PA6T",
		.cpu_features		= CPU_FTRS_PA6T,
		.cpu_user_features	= COMMON_USER_PA6T,
489
		.mmu_features		= MMU_FTRS_PA6T,
490 491 492
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 6,
493
		.pmc_type		= PPC_PMC_PA6T,
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		.cpu_setup		= __setup_cpu_pa6t,
		.cpu_restore		= __restore_cpu_pa6t,
496 497
		.oprofile_cpu_type	= "ppc64/pa6t",
		.oprofile_type		= PPC_OPROFILE_PA6T,
498 499
		.platform		= "pa6t",
	},
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	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "POWER4 (compatible)",
		.cpu_features		= CPU_FTRS_COMPATIBLE,
		.cpu_user_features	= COMMON_USER_PPC64,
506
		.mmu_features		= MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
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		.icache_bsize		= 128,
		.dcache_bsize		= 128,
		.num_pmcs		= 6,
510
		.pmc_type		= PPC_PMC_IBM,
511
		.platform		= "power4",
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	}
513 514
#endif	/* CONFIG_PPC_BOOK3S_64 */

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#ifdef CONFIG_PPC32
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#if CLASSIC_PPC
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	{	/* 601 */
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		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00010000,
		.cpu_name		= "601",
521
		.cpu_features		= CPU_FTRS_PPC601,
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		.cpu_user_features	= COMMON_USER | PPC_FEATURE_601_INSTR |
523
			PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
524
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
527
		.machine_check		= machine_check_generic,
528
		.platform		= "ppc601",
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	},
	{	/* 603 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00030000,
		.cpu_name		= "603",
534
		.cpu_features		= CPU_FTRS_603,
535
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
536
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
539
		.cpu_setup		= __setup_cpu_603,
540
		.machine_check		= machine_check_generic,
541
		.platform		= "ppc603",
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	},
	{	/* 603e */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00060000,
		.cpu_name		= "603e",
547
		.cpu_features		= CPU_FTRS_603,
548
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
549
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
552
		.cpu_setup		= __setup_cpu_603,
553
		.machine_check		= machine_check_generic,
554
		.platform		= "ppc603",
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	},
	{	/* 603ev */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00070000,
		.cpu_name		= "603ev",
560
		.cpu_features		= CPU_FTRS_603,
561
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
562
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
565
		.cpu_setup		= __setup_cpu_603,
566
		.machine_check		= machine_check_generic,
567
		.platform		= "ppc603",
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	},
	{	/* 604 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00040000,
		.cpu_name		= "604",
573
		.cpu_features		= CPU_FTRS_604,
574
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
575
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 2,
579
		.cpu_setup		= __setup_cpu_604,
580
		.machine_check		= machine_check_generic,
581
		.platform		= "ppc604",
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	},
	{	/* 604e */
		.pvr_mask		= 0xfffff000,
		.pvr_value		= 0x00090000,
		.cpu_name		= "604e",
587
		.cpu_features		= CPU_FTRS_604,
588
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
589
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
593
		.cpu_setup		= __setup_cpu_604,
594
		.machine_check		= machine_check_generic,
595
		.platform		= "ppc604",
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	},
	{	/* 604r */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00090000,
		.cpu_name		= "604r",
601
		.cpu_features		= CPU_FTRS_604,
602
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
603
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
607
		.cpu_setup		= __setup_cpu_604,
608
		.machine_check		= machine_check_generic,
609
		.platform		= "ppc604",
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	},
	{	/* 604ev */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x000a0000,
		.cpu_name		= "604ev",
615
		.cpu_features		= CPU_FTRS_604,
616
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
617
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
621
		.cpu_setup		= __setup_cpu_604,
622
		.machine_check		= machine_check_generic,
623
		.platform		= "ppc604",
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	},
	{	/* 740/750 (0x4202, don't support TAU ?) */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x00084202,
		.cpu_name		= "740/750",
629
		.cpu_features		= CPU_FTRS_740_NOTAU,
630
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
631
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
635
		.cpu_setup		= __setup_cpu_750,
636
		.machine_check		= machine_check_generic,
637
		.platform		= "ppc750",
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	},
	{	/* 750CX (80100 and 8010x?) */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x00080100,
		.cpu_name		= "750CX",
643
		.cpu_features		= CPU_FTRS_750,
644
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
645
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
649
		.cpu_setup		= __setup_cpu_750cx,
650
		.machine_check		= machine_check_generic,
651
		.platform		= "ppc750",
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	},
	{	/* 750CX (82201 and 82202) */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x00082200,
		.cpu_name		= "750CX",
657
		.cpu_features		= CPU_FTRS_750,
658
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
659
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
663
		.pmc_type		= PPC_PMC_IBM,
664
		.cpu_setup		= __setup_cpu_750cx,
665
		.machine_check		= machine_check_generic,
666
		.platform		= "ppc750",
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	},
	{	/* 750CXe (82214) */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x00082210,
		.cpu_name		= "750CXe",
672
		.cpu_features		= CPU_FTRS_750,
673
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
674
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
678
		.pmc_type		= PPC_PMC_IBM,
679
		.cpu_setup		= __setup_cpu_750cx,
680
		.machine_check		= machine_check_generic,
681
		.platform		= "ppc750",
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	},
683 684 685 686
	{	/* 750CXe "Gekko" (83214) */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x00083214,
		.cpu_name		= "750CXe",
687
		.cpu_features		= CPU_FTRS_750,
688
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
689
		.mmu_features		= MMU_FTR_HPTE_TABLE,
690 691 692
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
693
		.pmc_type		= PPC_PMC_IBM,
694
		.cpu_setup		= __setup_cpu_750cx,
695
		.machine_check		= machine_check_generic,
696
		.platform		= "ppc750",
697
	},
698 699 700
	{	/* 750CL (and "Broadway") */
		.pvr_mask		= 0xfffff0e0,
		.pvr_value		= 0x00087000,
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		.cpu_name		= "750CL",
702
		.cpu_features		= CPU_FTRS_750CL,
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		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
704
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
708
		.pmc_type		= PPC_PMC_IBM,
709
		.cpu_setup		= __setup_cpu_750,
710
		.machine_check		= machine_check_generic,
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		.platform		= "ppc750",
712 713
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
715 716 717 718
	{	/* 745/755 */
		.pvr_mask		= 0xfffff000,
		.pvr_value		= 0x00083000,
		.cpu_name		= "745/755",
719
		.cpu_features		= CPU_FTRS_750,
720
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
721
		.mmu_features		= MMU_FTR_HPTE_TABLE,
722 723 724
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
725
		.pmc_type		= PPC_PMC_IBM,
726
		.cpu_setup		= __setup_cpu_750,
727
		.machine_check		= machine_check_generic,
728
		.platform		= "ppc750",
729
	},
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	{	/* 750FX rev 1.x */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x70000100,
		.cpu_name		= "750FX",
734
		.cpu_features		= CPU_FTRS_750FX1,
735
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
736
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
740
		.pmc_type		= PPC_PMC_IBM,
741
		.cpu_setup		= __setup_cpu_750,
742
		.machine_check		= machine_check_generic,
743
		.platform		= "ppc750",
744 745
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 750FX rev 2.0 must disable HID0[DPM] */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x70000200,
		.cpu_name		= "750FX",
751
		.cpu_features		= CPU_FTRS_750FX2,
752
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
753
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
757
		.pmc_type		= PPC_PMC_IBM,
758
		.cpu_setup		= __setup_cpu_750,
759
		.machine_check		= machine_check_generic,
760
		.platform		= "ppc750",
761 762
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 750FX (All revs except 2.0) */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x70000000,
		.cpu_name		= "750FX",
768
		.cpu_features		= CPU_FTRS_750FX,
769
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
770
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
774
		.pmc_type		= PPC_PMC_IBM,
775
		.cpu_setup		= __setup_cpu_750fx,
776
		.machine_check		= machine_check_generic,
777
		.platform		= "ppc750",
778 779
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 750GX */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x70020000,
		.cpu_name		= "750GX",
785
		.cpu_features		= CPU_FTRS_750GX,
786
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
787
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
791
		.pmc_type		= PPC_PMC_IBM,
792
		.cpu_setup		= __setup_cpu_750fx,
793
		.machine_check		= machine_check_generic,
794
		.platform		= "ppc750",
795 796
		.oprofile_cpu_type      = "ppc/750",
		.oprofile_type		= PPC_OPROFILE_G4,
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	},
	{	/* 740/750 (L2CR bit need fixup for 740) */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00080000,
		.cpu_name		= "740/750",
802
		.cpu_features		= CPU_FTRS_740,
803
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
804
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
808
		.pmc_type		= PPC_PMC_IBM,
809
		.cpu_setup		= __setup_cpu_750,
810
		.machine_check		= machine_check_generic,
811
		.platform		= "ppc750",
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	},
	{	/* 7400 rev 1.1 ? (no TAU) */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x000c1101,
		.cpu_name		= "7400 (1.1)",
817
		.cpu_features		= CPU_FTRS_7400_NOTAU,
818 819
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
820
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
824
		.pmc_type		= PPC_PMC_G4,
825
		.cpu_setup		= __setup_cpu_7400,
826
		.machine_check		= machine_check_generic,
827
		.platform		= "ppc7400",
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	},
	{	/* 7400 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x000c0000,
		.cpu_name		= "7400",
833
		.cpu_features		= CPU_FTRS_7400,
834 835
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
836
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
840
		.pmc_type		= PPC_PMC_G4,
841
		.cpu_setup		= __setup_cpu_7400,
842
		.machine_check		= machine_check_generic,
843
		.platform		= "ppc7400",
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	},
	{	/* 7410 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x800c0000,
		.cpu_name		= "7410",
849
		.cpu_features		= CPU_FTRS_7400,
850 851
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
852
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
856
		.pmc_type		= PPC_PMC_G4,
857
		.cpu_setup		= __setup_cpu_7410,
858
		.machine_check		= machine_check_generic,
859
		.platform		= "ppc7400",
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	},
	{	/* 7450 2.0 - no doze/nap */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80000200,
		.cpu_name		= "7450",
865
		.cpu_features		= CPU_FTRS_7450_20,
866 867
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
868
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
872
		.pmc_type		= PPC_PMC_G4,
873 874
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
875
		.oprofile_type		= PPC_OPROFILE_G4,
876
		.machine_check		= machine_check_generic,
877
		.platform		= "ppc7450",
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	},
	{	/* 7450 2.1 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80000201,
		.cpu_name		= "7450",
883
		.cpu_features		= CPU_FTRS_7450_21,
884 885
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
886
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
890
		.pmc_type		= PPC_PMC_G4,
891 892
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
893
		.oprofile_type		= PPC_OPROFILE_G4,
894
		.machine_check		= machine_check_generic,
895
		.platform		= "ppc7450",
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	},
	{	/* 7450 2.3 and newer */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80000000,
		.cpu_name		= "7450",
901
		.cpu_features		= CPU_FTRS_7450_23,
902 903
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
904
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
908
		.pmc_type		= PPC_PMC_G4,
909 910
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
911
		.oprofile_type		= PPC_OPROFILE_G4,
912
		.machine_check		= machine_check_generic,
913
		.platform		= "ppc7450",
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	},
	{	/* 7455 rev 1.x */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x80010100,
		.cpu_name		= "7455",
919
		.cpu_features		= CPU_FTRS_7455_1,
920 921
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
922
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
926
		.pmc_type		= PPC_PMC_G4,
927 928
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
929
		.oprofile_type		= PPC_OPROFILE_G4,
930
		.machine_check		= machine_check_generic,
931
		.platform		= "ppc7450",
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	},
	{	/* 7455 rev 2.0 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80010200,
		.cpu_name		= "7455",
937
		.cpu_features		= CPU_FTRS_7455_20,
938 939
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
940
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
944
		.pmc_type		= PPC_PMC_G4,
945 946
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
947
		.oprofile_type		= PPC_OPROFILE_G4,
948
		.machine_check		= machine_check_generic,
949
		.platform		= "ppc7450",
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	},
	{	/* 7455 others */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80010000,
		.cpu_name		= "7455",
955
		.cpu_features		= CPU_FTRS_7455,
956 957
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
958
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
962
		.pmc_type		= PPC_PMC_G4,
963 964
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
965
		.oprofile_type		= PPC_OPROFILE_G4,
966
		.machine_check		= machine_check_generic,
967
		.platform		= "ppc7450",
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	},
	{	/* 7447/7457 Rev 1.0 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80020100,
		.cpu_name		= "7447/7457",
973
		.cpu_features		= CPU_FTRS_7447_10,
974 975
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
976
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
980
		.pmc_type		= PPC_PMC_G4,
981 982
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
983
		.oprofile_type		= PPC_OPROFILE_G4,
984
		.machine_check		= machine_check_generic,
985
		.platform		= "ppc7450",
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	},
	{	/* 7447/7457 Rev 1.1 */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x80020101,
		.cpu_name		= "7447/7457",
991
		.cpu_features		= CPU_FTRS_7447_10,
992 993
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
994
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
998
		.pmc_type		= PPC_PMC_G4,
999 1000
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1001
		.oprofile_type		= PPC_OPROFILE_G4,
1002
		.machine_check		= machine_check_generic,
1003
		.platform		= "ppc7450",
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	},
	{	/* 7447/7457 Rev 1.2 and later */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80020000,
		.cpu_name		= "7447/7457",
1009
		.cpu_features		= CPU_FTRS_7447,
1010
		.cpu_user_features	= COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1011
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1015
		.pmc_type		= PPC_PMC_G4,
1016 1017
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1018
		.oprofile_type		= PPC_OPROFILE_G4,
1019
		.machine_check		= machine_check_generic,
1020
		.platform		= "ppc7450",
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	},
	{	/* 7447A */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80030000,
		.cpu_name		= "7447A",
1026
		.cpu_features		= CPU_FTRS_7447A,
1027 1028
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1029
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1030 1031 1032
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1033
		.pmc_type		= PPC_PMC_G4,
1034 1035
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1036
		.oprofile_type		= PPC_OPROFILE_G4,
1037
		.machine_check		= machine_check_generic,
1038
		.platform		= "ppc7450",
1039 1040 1041 1042 1043
	},
	{	/* 7448 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80040000,
		.cpu_name		= "7448",
1044
		.cpu_features		= CPU_FTRS_7448,
1045 1046
		.cpu_user_features	= COMMON_USER |
			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1047
		.mmu_features		= MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 6,
1051
		.pmc_type		= PPC_PMC_G4,
1052 1053
		.cpu_setup		= __setup_cpu_745x,
		.oprofile_cpu_type      = "ppc/7450",
1054
		.oprofile_type		= PPC_OPROFILE_G4,
1055
		.machine_check		= machine_check_generic,
1056
		.platform		= "ppc7450",
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	},
	{	/* 82xx (8240, 8245, 8260 are all 603e cores) */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00810000,
		.cpu_name		= "82xx",
1062
		.cpu_features		= CPU_FTRS_82XX,
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		.cpu_user_features	= COMMON_USER,
1064
		.mmu_features		= 0,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1067
		.cpu_setup		= __setup_cpu_603,
1068
		.machine_check		= machine_check_generic,
1069
		.platform		= "ppc603",
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	},
	{	/* All G2_LE (603e core, plus some) have the same pvr */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00820000,
		.cpu_name		= "G2_LE",
1075
		.cpu_features		= CPU_FTRS_G2_LE,
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		.cpu_user_features	= COMMON_USER,
1077
		.mmu_features		= MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1080
		.cpu_setup		= __setup_cpu_603,
1081
		.machine_check		= machine_check_generic,
1082
		.platform		= "ppc603",
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	},
1084
	{	/* e300c1 (a 603e core, plus some) on 83xx */
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		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00830000,
1087
		.cpu_name		= "e300c1",
1088
		.cpu_features		= CPU_FTRS_E300,
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		.cpu_user_features	= COMMON_USER,
1090
		.mmu_features		= MMU_FTR_USE_HIGH_BATS,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1093
		.cpu_setup		= __setup_cpu_603,
1094
		.machine_check		= machine_check_generic,
1095
		.platform		= "ppc603",
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	},
1097 1098 1099 1100
	{	/* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00840000,
		.cpu_name		= "e300c2",
1101
		.cpu_features		= CPU_FTRS_E300C2,
1102
		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1103 1104
		.mmu_features		= MMU_FTR_USE_HIGH_BATS |
			MMU_FTR_NEED_DTLB_SW_LRU,
1105 1106 1107
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_603,
1108
		.machine_check		= machine_check_generic,
1109 1110
		.platform		= "ppc603",
	},
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	{	/* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1112 1113 1114 1115 1116
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00850000,
		.cpu_name		= "e300c3",
		.cpu_features		= CPU_FTRS_E300,
		.cpu_user_features	= COMMON_USER,
1117 1118
		.mmu_features		= MMU_FTR_USE_HIGH_BATS |
			MMU_FTR_NEED_DTLB_SW_LRU,
1119 1120 1121
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_603,
1122 1123 1124
		.num_pmcs		= 4,
		.oprofile_cpu_type	= "ppc/e300",
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
1125 1126
		.platform		= "ppc603",
	},
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	{	/* e300c4 (e300c1, plus one IU) */
		.pvr_mask		= 0x7fff0000,
		.pvr_value		= 0x00860000,
		.cpu_name		= "e300c4",
		.cpu_features		= CPU_FTRS_E300,
		.cpu_user_features	= COMMON_USER,
1133 1134
		.mmu_features		= MMU_FTR_USE_HIGH_BATS |
			MMU_FTR_NEED_DTLB_SW_LRU,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_603,
1138
		.machine_check		= machine_check_generic,
1139 1140 1141
		.num_pmcs		= 4,
		.oprofile_cpu_type	= "ppc/e300",
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
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		.platform		= "ppc603",
	},
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	{	/* default match, we assume split I/D cache & TB (non-601)... */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic PPC)",
1148
		.cpu_features		= CPU_FTRS_CLASSIC32,
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		.cpu_user_features	= COMMON_USER,
1150
		.mmu_features		= MMU_FTR_HPTE_TABLE,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1153
		.machine_check		= machine_check_generic,
1154
		.platform		= "ppc603",
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	},
#endif /* CLASSIC_PPC */
#ifdef CONFIG_8xx
	{	/* 8xx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00500000,
		.cpu_name		= "8xx",
		/* CPU_FTR_MAYBE_CAN_DOZE is possible,
		 * if the 8xx code is there.... */
1164
		.cpu_features		= CPU_FTRS_8XX,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1166
		.mmu_features		= MMU_FTR_TYPE_8xx,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1169
		.platform		= "ppc823",
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	},
#endif /* CONFIG_8xx */
#ifdef CONFIG_40x
	{	/* 403GC */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x00200200,
		.cpu_name		= "403GC",
1177
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1179
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1182
		.machine_check		= machine_check_4xx,
1183
		.platform		= "ppc403",
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	},
	{	/* 403GCX */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x00201400,
		.cpu_name		= "403GCX",
1189
		.cpu_features		= CPU_FTRS_40X,
1190 1191
		.cpu_user_features	= PPC_FEATURE_32 |
		 	PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1192
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1195
		.machine_check		= machine_check_4xx,
1196
		.platform		= "ppc403",
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	},
	{	/* 403G ?? */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00200000,
		.cpu_name		= "403G ??",
1202
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1204
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 16,
		.dcache_bsize		= 16,
1207
		.machine_check		= machine_check_4xx,
1208
		.platform		= "ppc403",
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	},
	{	/* 405GP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x40110000,
		.cpu_name		= "405GP",
1214
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1217
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1220
		.machine_check		= machine_check_4xx,
1221
		.platform		= "ppc405",
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	},
	{	/* STB 03xxx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x40130000,
		.cpu_name		= "STB03xxx",
1227
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1230
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1233
		.machine_check		= machine_check_4xx,
1234
		.platform		= "ppc405",
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	},
	{	/* STB 04xxx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41810000,
		.cpu_name		= "STB04xxx",
1240
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1243
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1246
		.machine_check		= machine_check_4xx,
1247
		.platform		= "ppc405",
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	},
	{	/* NP405L */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41610000,
		.cpu_name		= "NP405L",
1253
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1256
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1259
		.machine_check		= machine_check_4xx,
1260
		.platform		= "ppc405",
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	},
	{	/* NP4GS3 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x40B10000,
		.cpu_name		= "NP4GS3",
1266
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1269
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1272
		.machine_check		= machine_check_4xx,
1273
		.platform		= "ppc405",
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	},
	{   /* NP405H */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41410000,
		.cpu_name		= "NP405H",
1279
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1282
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1285
		.machine_check		= machine_check_4xx,
1286
		.platform		= "ppc405",
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	},
	{	/* 405GPr */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x50910000,
		.cpu_name		= "405GPr",
1292
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1295
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1298
		.machine_check		= machine_check_4xx,
1299
		.platform		= "ppc405",
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	},
	{   /* STBx25xx */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x51510000,
		.cpu_name		= "STBx25xx",
1305
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1308
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1311
		.machine_check		= machine_check_4xx,
1312
		.platform		= "ppc405",
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	},
	{	/* 405LP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41F10000,
		.cpu_name		= "405LP",
1318
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1320
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1323
		.machine_check		= machine_check_4xx,
1324
		.platform		= "ppc405",
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	},
	{	/* Xilinx Virtex-II Pro  */
1327
		.pvr_mask		= 0xfffff000,
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		.pvr_value		= 0x20010000,
		.cpu_name		= "Virtex-II Pro",
1330
		.cpu_features		= CPU_FTRS_40X,
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		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1333
		.mmu_features		= MMU_FTR_TYPE_40x,
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		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1336
		.machine_check		= machine_check_4xx,
1337
		.platform		= "ppc405",
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	},
1339 1340 1341 1342 1343 1344 1345
	{	/* Xilinx Virtex-4 FX */
		.pvr_mask		= 0xfffff000,
		.pvr_value		= 0x20011000,
		.cpu_name		= "Virtex-4 FX",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1346
		.mmu_features		= MMU_FTR_TYPE_40x,
1347 1348
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1349
		.machine_check		= machine_check_4xx,
1350
		.platform		= "ppc405",
1351
	},
1352 1353 1354 1355
	{	/* 405EP */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x51210000,
		.cpu_name		= "405EP",
1356
		.cpu_features		= CPU_FTRS_40X,
1357 1358
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1359
		.mmu_features		= MMU_FTR_TYPE_40x,
1360 1361
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1362
		.machine_check		= machine_check_4xx,
1363 1364
		.platform		= "ppc405",
	},
1365 1366 1367 1368
	{	/* 405EX Rev. A/B with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910007,
		.cpu_name		= "405EX Rev. A/B",
1369
		.cpu_features		= CPU_FTRS_40X,
1370 1371
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1372
		.mmu_features		= MMU_FTR_TYPE_40x,
1373 1374
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1375
		.machine_check		= machine_check_4xx,
1376
		.platform		= "ppc405",
1377
	},
1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470
	{	/* 405EX Rev. C without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x1291000d,
		.cpu_name		= "405EX Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EX Rev. C with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x1291000f,
		.cpu_name		= "405EX Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EX Rev. D without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910003,
		.cpu_name		= "405EX Rev. D",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EX Rev. D with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910005,
		.cpu_name		= "405EX Rev. D",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. A/B without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910001,
		.cpu_name		= "405EXr Rev. A/B",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. C without Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910009,
		.cpu_name		= "405EXr Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. C with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x1291000b,
		.cpu_name		= "405EXr Rev. C",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. D without Security */
		.pvr_mask		= 0xffff000f,
1471
		.pvr_value		= 0x12910000,
1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485
		.cpu_name		= "405EXr Rev. D",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
	{	/* 405EXr Rev. D with Security */
		.pvr_mask		= 0xffff000f,
		.pvr_value		= 0x12910002,
		.cpu_name		= "405EXr Rev. D",
1486 1487 1488
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1489
		.mmu_features		= MMU_FTR_TYPE_40x,
1490 1491 1492 1493 1494
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
1495 1496 1497 1498 1499 1500 1501 1502
	{
		/* 405EZ */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x41510000,
		.cpu_name		= "405EZ",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1503
		.mmu_features		= MMU_FTR_TYPE_40x,
1504 1505 1506 1507 1508
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521
	{	/* APM8018X */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x7ff11432,
		.cpu_name		= "APM8018X",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
		.mmu_features		= MMU_FTR_TYPE_40x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	},
1522 1523 1524 1525 1526 1527 1528
	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic 40x PPC)",
		.cpu_features		= CPU_FTRS_40X,
		.cpu_user_features	= PPC_FEATURE_32 |
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1529
		.mmu_features		= MMU_FTR_TYPE_40x,
1530 1531 1532 1533 1534
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc405",
	}
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Linus Torvalds 已提交
1535 1536 1537

#endif /* CONFIG_40x */
#ifdef CONFIG_44x
M
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1538 1539 1540
	{
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000850,
1541 1542 1543
		.cpu_name		= "440GR Rev. A",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1544
		.mmu_features		= MMU_FTR_TYPE_44x,
1545 1546
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1547
		.machine_check		= machine_check_4xx,
1548 1549 1550 1551 1552
		.platform		= "ppc440",
	},
	{ /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000858,
M
Matt Porter 已提交
1553
		.cpu_name		= "440EP Rev. A",
1554
		.cpu_features		= CPU_FTRS_44X,
1555
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1556
		.mmu_features		= MMU_FTR_TYPE_44x,
M
Matt Porter 已提交
1557 1558
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1559
		.cpu_setup		= __setup_cpu_440ep,
1560
		.machine_check		= machine_check_4xx,
1561
		.platform		= "ppc440",
M
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1562 1563 1564 1565
	},
	{
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x400008d3,
1566
		.cpu_name		= "440GR Rev. B",
1567
		.cpu_features		= CPU_FTRS_44X,
1568
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1569
		.mmu_features		= MMU_FTR_TYPE_44x,
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Matt Porter 已提交
1570 1571
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1572
		.machine_check		= machine_check_4xx,
1573
		.platform		= "ppc440",
M
Matt Porter 已提交
1574
	},
1575 1576 1577 1578 1579 1580
	{ /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000ff7,
		.pvr_value		= 0x400008d4,
		.cpu_name		= "440EP Rev. C",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1581
		.mmu_features		= MMU_FTR_TYPE_44x,
1582 1583 1584 1585 1586 1587
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_440ep,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc440",
	},
1588 1589 1590 1591
	{ /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x400008db,
		.cpu_name		= "440EP Rev. B",
1592 1593
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1594
		.mmu_features		= MMU_FTR_TYPE_44x,
1595 1596
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1597
		.cpu_setup		= __setup_cpu_440ep,
1598
		.machine_check		= machine_check_4xx,
1599
		.platform		= "ppc440",
1600 1601 1602
	},
	{ /* 440GRX */
		.pvr_mask		= 0xf0000ffb,
1603
		.pvr_value		= 0x200008D0,
1604 1605 1606
		.cpu_name		= "440GRX",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1607
		.mmu_features		= MMU_FTR_TYPE_44x,
1608 1609
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1610
		.cpu_setup		= __setup_cpu_440grx,
1611
		.machine_check		= machine_check_440A,
1612
		.platform		= "ppc440",
1613
	},
1614 1615 1616 1617 1618 1619
	{ /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
		.pvr_mask		= 0xf0000ffb,
		.pvr_value		= 0x200008D8,
		.cpu_name		= "440EPX",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1620
		.mmu_features		= MMU_FTR_TYPE_44x,
1621 1622 1623
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_440epx,
1624
		.machine_check		= machine_check_440A,
1625 1626
		.platform		= "ppc440",
	},
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Stephen Rothwell 已提交
1627
	{	/* 440GP Rev. B */
L
Linus Torvalds 已提交
1628 1629 1630
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000440,
		.cpu_name		= "440GP Rev. B",
1631
		.cpu_features		= CPU_FTRS_44X,
1632
		.cpu_user_features	= COMMON_USER_BOOKE,
1633
		.mmu_features		= MMU_FTR_TYPE_44x,
L
Linus Torvalds 已提交
1634 1635
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1636
		.machine_check		= machine_check_4xx,
1637
		.platform		= "ppc440gp",
L
Linus Torvalds 已提交
1638
	},
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Stephen Rothwell 已提交
1639
	{	/* 440GP Rev. C */
L
Linus Torvalds 已提交
1640 1641 1642
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x40000481,
		.cpu_name		= "440GP Rev. C",
1643
		.cpu_features		= CPU_FTRS_44X,
1644
		.cpu_user_features	= COMMON_USER_BOOKE,
1645
		.mmu_features		= MMU_FTR_TYPE_44x,
L
Linus Torvalds 已提交
1646 1647
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1648
		.machine_check		= machine_check_4xx,
1649
		.platform		= "ppc440gp",
L
Linus Torvalds 已提交
1650 1651 1652 1653 1654
	},
	{ /* 440GX Rev. A */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000850,
		.cpu_name		= "440GX Rev. A",
1655
		.cpu_features		= CPU_FTRS_44X,
1656
		.cpu_user_features	= COMMON_USER_BOOKE,
1657
		.mmu_features		= MMU_FTR_TYPE_44x,
L
Linus Torvalds 已提交
1658 1659
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1660 1661
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1662
		.platform		= "ppc440",
L
Linus Torvalds 已提交
1663 1664 1665 1666 1667
	},
	{ /* 440GX Rev. B */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000851,
		.cpu_name		= "440GX Rev. B",
1668
		.cpu_features		= CPU_FTRS_44X,
1669
		.cpu_user_features	= COMMON_USER_BOOKE,
1670
		.mmu_features		= MMU_FTR_TYPE_44x,
L
Linus Torvalds 已提交
1671 1672
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1673 1674
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1675
		.platform		= "ppc440",
L
Linus Torvalds 已提交
1676 1677 1678 1679 1680
	},
	{ /* 440GX Rev. C */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000892,
		.cpu_name		= "440GX Rev. C",
1681
		.cpu_features		= CPU_FTRS_44X,
1682
		.cpu_user_features	= COMMON_USER_BOOKE,
1683
		.mmu_features		= MMU_FTR_TYPE_44x,
L
Linus Torvalds 已提交
1684 1685
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1686 1687
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1688
		.platform		= "ppc440",
L
Linus Torvalds 已提交
1689
	},
1690 1691 1692 1693
	{ /* 440GX Rev. F */
		.pvr_mask		= 0xf0000fff,
		.pvr_value		= 0x50000894,
		.cpu_name		= "440GX Rev. F",
1694
		.cpu_features		= CPU_FTRS_44X,
1695
		.cpu_user_features	= COMMON_USER_BOOKE,
1696
		.mmu_features		= MMU_FTR_TYPE_44x,
1697 1698
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1699 1700
		.cpu_setup		= __setup_cpu_440gx,
		.machine_check		= machine_check_440A,
1701
		.platform		= "ppc440",
1702
	},
1703
	{ /* 440SP Rev. A */
1704 1705
		.pvr_mask		= 0xfff00fff,
		.pvr_value		= 0x53200891,
1706
		.cpu_name		= "440SP Rev. A",
1707
		.cpu_features		= CPU_FTRS_44X,
1708
		.cpu_user_features	= COMMON_USER_BOOKE,
1709
		.mmu_features		= MMU_FTR_TYPE_44x,
1710 1711
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1712
		.machine_check		= machine_check_4xx,
1713
		.platform		= "ppc440",
1714
	},
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Roland Dreier 已提交
1715
	{ /* 440SPe Rev. A */
1716 1717 1718 1719 1720
		.pvr_mask               = 0xfff00fff,
		.pvr_value              = 0x53400890,
		.cpu_name               = "440SPe Rev. A",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features      = COMMON_USER_BOOKE,
1721
		.mmu_features		= MMU_FTR_TYPE_44x,
1722 1723
		.icache_bsize           = 32,
		.dcache_bsize           = 32,
1724 1725
		.cpu_setup		= __setup_cpu_440spe,
		.machine_check		= machine_check_440A,
1726 1727 1728 1729 1730 1731
		.platform               = "ppc440",
	},
	{ /* 440SPe Rev. B */
		.pvr_mask		= 0xfff00fff,
		.pvr_value		= 0x53400891,
		.cpu_name		= "440SPe Rev. B",
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Kumar Gala 已提交
1732
		.cpu_features		= CPU_FTRS_44X,
1733
		.cpu_user_features	= COMMON_USER_BOOKE,
1734
		.mmu_features		= MMU_FTR_TYPE_44x,
R
Roland Dreier 已提交
1735 1736
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1737 1738
		.cpu_setup		= __setup_cpu_440spe,
		.machine_check		= machine_check_440A,
1739
		.platform		= "ppc440",
R
Roland Dreier 已提交
1740
	},
1741 1742 1743 1744 1745 1746
	{ /* 440 in Xilinx Virtex-5 FXT */
		.pvr_mask		= 0xfffffff0,
		.pvr_value		= 0x7ff21910,
		.cpu_name		= "440 in Virtex-5 FXT",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1747
		.mmu_features		= MMU_FTR_TYPE_44x,
1748 1749
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1750 1751
		.cpu_setup		= __setup_cpu_440x5,
		.machine_check		= machine_check_440A,
1752 1753
		.platform		= "ppc440",
	},
1754
	{ /* 460EX */
1755
		.pvr_mask		= 0xffff0006,
1756 1757
		.pvr_value		= 0x13020002,
		.cpu_name		= "460EX",
1758
		.cpu_features		= CPU_FTRS_440x6,
1759
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1760
		.mmu_features		= MMU_FTR_TYPE_44x,
1761 1762 1763 1764 1765 1766
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460ex,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779
	{ /* 460EX Rev B */
		.pvr_mask		= 0xffff0007,
		.pvr_value		= 0x13020004,
		.cpu_name		= "460EX Rev. B",
		.cpu_features		= CPU_FTRS_440x6,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_44x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460ex,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1780
	{ /* 460GT */
1781
		.pvr_mask		= 0xffff0006,
1782 1783
		.pvr_value		= 0x13020000,
		.cpu_name		= "460GT",
1784
		.cpu_features		= CPU_FTRS_440x6,
1785
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1786
		.mmu_features		= MMU_FTR_TYPE_44x,
1787 1788
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
1789
		.cpu_setup		= __setup_cpu_460gt,
1790 1791 1792
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805
	{ /* 460GT Rev B */
		.pvr_mask		= 0xffff0007,
		.pvr_value		= 0x13020005,
		.cpu_name		= "460GT Rev. B",
		.cpu_features		= CPU_FTRS_440x6,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_44x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460gt,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818
	{ /* 460SX */
		.pvr_mask		= 0xffffff00,
		.pvr_value		= 0x13541800,
		.cpu_name		= "460SX",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
		.mmu_features		= MMU_FTR_TYPE_44x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_460sx,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1819
	{ /* 464 in APM821xx */
1820
		.pvr_mask		= 0xfffffff0,
1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832
		.pvr_value		= 0x12C41C80,
		.cpu_name		= "APM821XX",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_44x,
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.cpu_setup		= __setup_cpu_apm821xx,
		.machine_check		= machine_check_440A,
		.platform		= "ppc440",
	},
1833 1834 1835
	{ /* 476 DD2 core */
		.pvr_mask		= 0xffffffff,
		.pvr_value		= 0x11a52080,
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Dave Kleikamp 已提交
1836
		.cpu_name		= "476",
1837
		.cpu_features		= CPU_FTRS_47X | CPU_FTR_476_DD2,
D
Dave Kleikamp 已提交
1838
		.cpu_user_features	= COMMON_USER_BOOKE |
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1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_47x |
			MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
		.icache_bsize		= 32,
		.dcache_bsize		= 128,
		.machine_check		= machine_check_47x,
		.platform		= "ppc470",
	},
	{ /* 476fpe */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x7ff50000,
		.cpu_name		= "476fpe",
		.cpu_features		= CPU_FTRS_47X | CPU_FTR_476_DD2,
		.cpu_user_features	= COMMON_USER_BOOKE |
D
Dave Kleikamp 已提交
1853 1854 1855
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_47x |
			MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869
		.icache_bsize		= 32,
		.dcache_bsize		= 128,
		.machine_check		= machine_check_47x,
		.platform		= "ppc470",
	},
	{ /* 476 iss */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00050000,
		.cpu_name		= "476",
		.cpu_features		= CPU_FTRS_47X,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_47x |
			MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
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Dave Kleikamp 已提交
1870 1871
		.icache_bsize		= 32,
		.dcache_bsize		= 128,
1872
		.machine_check		= machine_check_47x,
D
Dave Kleikamp 已提交
1873 1874
		.platform		= "ppc470",
	},
1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888
	{ /* 476 others */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x11a50000,
		.cpu_name		= "476",
		.cpu_features		= CPU_FTRS_47X,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_47x |
			MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
		.icache_bsize		= 32,
		.dcache_bsize		= 128,
		.machine_check		= machine_check_47x,
		.platform		= "ppc470",
	},
1889 1890 1891 1892 1893 1894
	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic 44x PPC)",
		.cpu_features		= CPU_FTRS_44X,
		.cpu_user_features	= COMMON_USER_BOOKE,
1895
		.mmu_features		= MMU_FTR_TYPE_44x,
1896 1897 1898 1899 1900
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.machine_check		= machine_check_4xx,
		.platform		= "ppc440",
	}
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Linus Torvalds 已提交
1901
#endif /* CONFIG_44x */
1902
#ifdef CONFIG_E200
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Stephen Rothwell 已提交
1903
	{	/* e200z5 */
1904 1905 1906 1907
		.pvr_mask		= 0xfff00000,
		.pvr_value		= 0x81000000,
		.cpu_name		= "e200z5",
		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1908
		.cpu_features		= CPU_FTRS_E200,
1909 1910
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_EFP_SINGLE |
1911
			PPC_FEATURE_UNIFIED_CACHE,
1912
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
1913
		.dcache_bsize		= 32,
1914
		.machine_check		= machine_check_e200,
1915
		.platform		= "ppc5554",
1916
	},
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Stephen Rothwell 已提交
1917
	{	/* e200z6 */
1918 1919 1920 1921
		.pvr_mask		= 0xfff00000,
		.pvr_value		= 0x81100000,
		.cpu_name		= "e200z6",
		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1922
		.cpu_features		= CPU_FTRS_E200,
1923
		.cpu_user_features	= COMMON_USER_BOOKE |
1924 1925
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1926
			PPC_FEATURE_UNIFIED_CACHE,
1927
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
1928
		.dcache_bsize		= 32,
1929
		.machine_check		= machine_check_e200,
1930
		.platform		= "ppc5554",
1931
	},
1932 1933 1934 1935 1936 1937 1938 1939
	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "(generic E200 PPC)",
		.cpu_features		= CPU_FTRS_E200,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_EFP_SINGLE |
			PPC_FEATURE_UNIFIED_CACHE,
1940
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
1941
		.dcache_bsize		= 32,
1942
		.cpu_setup		= __setup_cpu_e200,
1943 1944
		.machine_check		= machine_check_e200,
		.platform		= "ppc5554",
1945
	}
1946
#endif /* CONFIG_E200 */
1947
#endif /* CONFIG_PPC32 */
1948
#ifdef CONFIG_E500
1949
#ifdef CONFIG_PPC32
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Stephen Rothwell 已提交
1950
	{	/* e500 */
L
Linus Torvalds 已提交
1951 1952 1953
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80200000,
		.cpu_name		= "e500",
1954
		.cpu_features		= CPU_FTRS_E500,
1955
		.cpu_user_features	= COMMON_USER_BOOKE |
1956 1957
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1958
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
L
Linus Torvalds 已提交
1959 1960 1961
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
1962
		.oprofile_cpu_type	= "ppc/e500",
1963
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
1964
		.cpu_setup		= __setup_cpu_e500v1,
1965
		.machine_check		= machine_check_e500,
1966
		.platform		= "ppc8540",
L
Linus Torvalds 已提交
1967
	},
S
Stephen Rothwell 已提交
1968
	{	/* e500v2 */
1969 1970 1971
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80210000,
		.cpu_name		= "e500v2",
1972
		.cpu_features		= CPU_FTRS_E500_2,
1973
		.cpu_user_features	= COMMON_USER_BOOKE |
1974 1975 1976
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP |
			PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
1977
		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
1978 1979 1980
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
		.num_pmcs		= 4,
1981
		.oprofile_cpu_type	= "ppc/e500",
1982
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
1983
		.cpu_setup		= __setup_cpu_e500v2,
1984
		.machine_check		= machine_check_e500,
1985
		.platform		= "ppc8548",
1986
	},
1987 1988 1989 1990 1991 1992
	{	/* e500mc */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80230000,
		.cpu_name		= "e500mc",
		.cpu_features		= CPU_FTRS_E500MC,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1993
		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1994
			MMU_FTR_USE_TLBILX,
1995 1996 1997
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 4,
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Scott Wood 已提交
1998
		.oprofile_cpu_type	= "ppc/e500mc",
1999
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
2000
		.cpu_setup		= __setup_cpu_e500mc,
2001
		.machine_check		= machine_check_e500mc,
2002 2003
		.platform		= "ppce500mc",
	},
2004 2005 2006 2007 2008
#endif /* CONFIG_PPC32 */
	{	/* e5500 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80240000,
		.cpu_name		= "e5500",
2009
		.cpu_features		= CPU_FTRS_E5500,
2010
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2011 2012 2013 2014 2015 2016 2017 2018
		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
			MMU_FTR_USE_TLBILX,
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 4,
		.oprofile_cpu_type	= "ppc/e500mc",
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
		.cpu_setup		= __setup_cpu_e5500,
2019
#ifndef CONFIG_PPC32
2020
		.cpu_restore		= __restore_cpu_e5500,
2021
#endif
2022 2023 2024
		.machine_check		= machine_check_e500mc,
		.platform		= "ppce5500",
	},
2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038
	{	/* e6500 */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x80400000,
		.cpu_name		= "e6500",
		.cpu_features		= CPU_FTRS_E6500,
		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
			MMU_FTR_USE_TLBILX,
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 4,
		.oprofile_cpu_type	= "ppc/e6500",
		.oprofile_type		= PPC_OPROFILE_FSL_EMB,
		.cpu_setup		= __setup_cpu_e5500,
2039
#ifndef CONFIG_PPC32
2040
		.cpu_restore		= __restore_cpu_e5500,
2041
#endif
2042 2043 2044
		.machine_check		= machine_check_e500mc,
		.platform		= "ppce6500",
	},
2045
#ifdef CONFIG_PPC32
L
Linus Torvalds 已提交
2046 2047 2048
	{	/* default match */
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
2049 2050 2051 2052 2053
		.cpu_name		= "(generic E500 PPC)",
		.cpu_features		= CPU_FTRS_E500,
		.cpu_user_features	= COMMON_USER_BOOKE |
			PPC_FEATURE_HAS_SPE_COMP |
			PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2054
		.mmu_features		= MMU_FTR_TYPE_FSL_E,
L
Linus Torvalds 已提交
2055 2056
		.icache_bsize		= 32,
		.dcache_bsize		= 32,
2057
		.machine_check		= machine_check_e500,
2058
		.platform		= "powerpc",
2059
	}
S
Stephen Rothwell 已提交
2060
#endif /* CONFIG_PPC32 */
2061
#endif /* CONFIG_E500 */
2062

2063 2064 2065 2066 2067 2068 2069
#ifdef CONFIG_PPC_A2
	{	/* Standard A2 (>= DD2) + FPU core */
		.pvr_mask		= 0xffff0000,
		.pvr_value		= 0x00480000,
		.cpu_name		= "A2 (>= DD2)",
		.cpu_features		= CPU_FTRS_A2,
		.cpu_user_features	= COMMON_USER_PPC64,
2070
		.mmu_features		= MMU_FTRS_A2,
2071 2072 2073 2074 2075 2076 2077 2078
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 0,
		.cpu_setup		= __setup_cpu_a2,
		.cpu_restore		= __restore_cpu_a2,
		.machine_check		= machine_check_generic,
		.platform		= "ppca2",
	},
2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098
	{	/* This is a default entry to get going, to be replaced by
		 * a real one at some stage
		 */
#define CPU_FTRS_BASE_BOOK3E	(CPU_FTR_USE_TB | \
	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
	    CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
		.pvr_mask		= 0x00000000,
		.pvr_value		= 0x00000000,
		.cpu_name		= "Book3E",
		.cpu_features		= CPU_FTRS_BASE_BOOK3E,
		.cpu_user_features	= COMMON_USER_PPC64,
		.mmu_features		= MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
					  MMU_FTR_USE_TLBIVAX_BCAST |
					  MMU_FTR_LOCK_BCAST_INVAL,
		.icache_bsize		= 64,
		.dcache_bsize		= 64,
		.num_pmcs		= 0,
		.machine_check		= machine_check_generic,
		.platform		= "power6",
	},
2099
#endif /* CONFIG_PPC_A2 */
L
Linus Torvalds 已提交
2100
};
2101

2102 2103
static struct cpu_spec the_cpu_spec;

2104 2105
static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
					       struct cpu_spec *s)
2106
{
2107
	struct cpu_spec *t = &the_cpu_spec;
2108 2109
	struct cpu_spec old;

2110
	t = PTRRELOC(t);
2111 2112 2113 2114
	old = *t;

	/* Copy everything, then do fixups */
	*t = *s;
2115

2116 2117 2118 2119 2120
	/*
	 * If we are overriding a previous value derived from the real
	 * PVR with a new value obtained using a logical PVR value,
	 * don't modify the performance monitor fields.
	 */
2121 2122 2123 2124 2125 2126 2127 2128
	if (old.num_pmcs && !s->num_pmcs) {
		t->num_pmcs = old.num_pmcs;
		t->pmc_type = old.pmc_type;
		t->oprofile_type = old.oprofile_type;
		t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
		t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
		t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;

2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141
		/*
		 * If we have passed through this logic once before and
		 * have pulled the default case because the real PVR was
		 * not found inside cpu_specs[], then we are possibly
		 * running in compatibility mode. In that case, let the
		 * oprofiler know which set of compatibility counters to
		 * pull from by making sure the oprofile_cpu_type string
		 * is set to that of compatibility mode. If the
		 * oprofile_cpu_type already has a value, then we are
		 * possibly overriding a real PVR with a logical one,
		 * and, in that case, keep the current value for
		 * oprofile_cpu_type.
		 */
2142
		if (old.oprofile_cpu_type != NULL) {
2143 2144
			t->oprofile_cpu_type = old.oprofile_cpu_type;
			t->oprofile_type = old.oprofile_type;
2145
		}
2146
	}
2147 2148

	*PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2149

2150 2151 2152 2153 2154 2155
	/*
	 * Set the base platform string once; assumes
	 * we're called with real pvr first.
	 */
	if (*PTRRELOC(&powerpc_base_platform) == NULL)
		*PTRRELOC(&powerpc_base_platform) = t->platform;
2156

2157
#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2158 2159 2160 2161 2162 2163
	/* ppc64 and booke expect identify_cpu to also call setup_cpu for
	 * that processor. I will consolidate that at a later time, for now,
	 * just use #ifdef. We also don't need to PTRRELOC the function
	 * pointer on ppc64 and booke as we are running at 0 in real mode
	 * on ppc64 and reloc_offset is always 0 on booke.
	 */
2164 2165
	if (t->cpu_setup) {
		t->cpu_setup(offset, t);
2166
	}
2167
#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2168 2169

	return t;
2170 2171 2172 2173 2174 2175 2176 2177 2178 2179
}

struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
{
	struct cpu_spec *s = cpu_specs;
	int i;

	s = PTRRELOC(s);

	for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2180 2181
		if ((pvr & s->pvr_mask) == s->pvr_value)
			return setup_cpu_spec(offset, s);
2182 2183
	}

2184
	BUG();
2185

2186 2187
	return NULL;
}