* Conflicts:
  src/main/scala/xiangshan/decoupled-frontend/PreDecode.scala

tage: fix phist support

* set instruction to NOP when exception

* stop req in f1 when tlb miss
* pass down req when page fault

* XSCore: expand to 2 width
* Frontend: add itlb(width 2)

Remove hit signal in BranchPredictionBundle
Remove meta signal in BranchPredictionBundle
Add display function for Some bundle

* fix a bug calculating fall through address using pftAddr
* pipelining ftq dequeue
* do not write ftb sram when entry content does not change

* when a replay redirect comes straight after a mispredict redirect
  of the same ftqIdx, the ifuWbPtr is exactly idx+1, while the previous
  implementation of method 'set_status_between' set all status in
  such case

* PredDecode.scala: fix getBasicBlockIdx
* FrontendBundle.scala: fix Offset width

Add cfiUpdate debug info

    *BPU: move resetVector from IFU to BPU
    *ICache: remove useless `val`s and `def`s in HasICacheParameters
    *IFU: clean up HasIFUConst/Change cut function
    *PreDecode: replace "16"s with "PredictWidth"s

Fix bug that Tage update pc error

and modify some log