* RS: optimize numExist signal

* RS: fix some typo

* RS: optimize deq logic for block-nonfeedback rs

* WaitTable: add waittable framework

* WaitTable: get replay info from RedirectGenerator

* StoreQueue: maintain issuePtr for load rs

* RS: add loadWait to rs (only for load Unit's rs)

* WaitTable: fix update logic

* StoreQueue: fix issuePtr update logic

* chore: set loadWaitBit in ibuffer

* StoreQueue: fix issuePtrExt update logic

Former logic does not work well with mmio logic

We may also make sure that issuePtrExt is not before cmtPtrExt

* WaitTable: write with priority

* StoreQueue: fix issuePtrExt update logic for mmio

* chore: fix typos

* CSR: add slvpredctrl

* slvpredctrl will control load violation predict micro architecture

* WaitTable: use xor folded pc to index waittable
Co-authored-by: NZhangZifei <1773908404@qq.com>

* intWb: set wb.valid when !fpwen to allow writeback if !fpwen and !rfwen

* rs: fix replay delay to avoid deadlock

* load: fix tlb feedback

* RS: pass ExuConfigs instead of wake-up port number to rs

* RS: store's rs's base-src dont care fp wake-up

But this would not work(for syntax bug) until other modules change

1. divide into three block
2. change io port:
  broadcastUop -> fastUopsIn
  selectUop    -> fastUopOut
  extraPorts   -> slowPorts
  etc.
the cross sub block io is not wrapped, to it later

TODO:
1. fix dispatch
2. support replay in reservation stations
3. refactor lsroq/dcache

The redirect may be speculative and the branch instruction may be replayed.
pnpc should be set to the updated pnpc, the same as the newly-fetched instructions.