In all reference designs the FCLK1 runs at 150MHz, but the bootloader
doesn't set it up like that. Set the divider to 8 to generate the
correct clock. Fixes (a.o.) the DMA speed being too slow.
Signed-off-by: NMike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

The index used to iterate over the possible PHYs in axiemac_phy_init was an
unsigned int and decremented. Therefor it was always >= 0 and never exited
the loop.
Signed-off-by: NPatrick van Gelder <patrick.vangelder@nl.bosch.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add a short description in the ZYNQ documentation how to prepare a SD card and
copy the related images to SD card.
Signed-off-by: NJohannes Krottmayer <krjdev@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Fpga returns error value when fails, error status should be
printed in hex format.
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Remove below config options and convert them to macros. They have never
been configured to different values than default one. And also it makes
sense to reduce the config_whitelist.
CONFIG_SYS_ZYNQ_SPI_WAIT
CONFIG_SYS_ZYNQ_QSPI_WAIT
CONFIG_XILINX_SPI_IDLE_VAL
Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Disable PCS autonegotiation if fixed-link node is present in device tree.
This way systems with multiple GEM instances with a combination of
SGMII-fixed and SGMII-PHY will work.
Reported-by: NGoran Marinkovic <goran.marinkovic@psi.ch>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Change mini u-boot qspi spi-max-frequency to 108Mhz, make the
frequency similar to full u-boot qspi flash spi-max-frequency.
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Align clock output names with node references.
Signed-off-by: NSaeed Nowshadi <saeed.nowshadi@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Reduce console buffer size to 1kbyte to accommodate memory
allocations in mini u-boot for zynqmp.
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable CONFIG_DEFINE_TCM_OCM_MMAP to map TCM and OCM memory.
Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable alternative memory test for zynq platforms.
Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Added support for zynq aes load & loadp commands.
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

In case of aes decryption destination address range must be flushed
before transferring decrypted data to destination.
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

AES engine cannot be used if has not been enabled at boot time
with an encrypted boot image.
Signed-off-by: NIbai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Acked-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

This patch checks fpga config completion when a bitstream is loaded
into PL.
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Correct the PL bitstream loading sequence for zynqaes command by
clearing the loaded PL bitstream before loading the new encrypted
bitstream using the zynq aes command. This was done by setting
the PROG_B same as in case of fpgaload commands.
This patch fixes the issue of loading the encrypted PL bitstream
onto the PL in which a bitstream has already been loaded
successfully.
Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

There is no need to panic all the time when pmufw config object loading
failed. The patch improves function logic to report permission deny case
and also panic only for SPL case.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NLuca Ceresoli <luca@lucaceresoli.net>

alt_ref_clk is applicable only for PS extended version.
For PS base version there is no separate alt_ref_clk.
It is tied with ref_clk, so remove it from driver.
Signed-off-by: NRajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

There is no reason not to let U-Boot to update memory node by default. In
past this was disabled by purpose to be able to test different memory
configurations from one U-Boot instance.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Driver is not calling gd anywhere that's why there is not need to define
it.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Use proper number to be aligned with xspi0 boot mode.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Fixes for 2020.07
-----------------

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/701059103

- Fixes for atheros and cubox
- Toradex: mostly environment
- i.MX7: DDR fixes
- switch to DM
- sabrelite : fix MMC access

Rsync all defconfig files using moveconfig.py
Signed-off-by: NTom Rini <trini@konsulko.com>

Signed-off-by: NTom Rini <trini@konsulko.com>

After enabling SPL_OF_CONTROL, SPL_DM and SPL_DM_MMC the MMC
initialization code is not longer needed.

This patch removes the unused code.
Signed-off-by: NWalter Lozano <walter.lozano@collabora.com>

In order to take the beneficts of DT and DM in SPL, like reusing the code
and avoid redundancy, enable SPL_OF_CONTROL, SPL_DM and SPL_DM_MMC.

With this new configuration SPL image is 50 KB, higher than the
38 KB from the previous version, but it still under the 68 KB limit.
Signed-off-by: NWalter Lozano <walter.lozano@collabora.com>

In SPL legacy code only one MMC device is created, based on BOOT_CFG
register, which can be either SD or eMMC. In this context
board_boot_order return always MMC1 when configure to boot from
SD/eMMC. After switching to DM both SD and eMMC devices are created
based on the information available on DT, but as board_boot_order
only returns MMC1 is not possible to boot from eMMC.

This patch customizes board_boot_order taking into account BOOT_CFG
register to point to correct MMC1 / MMC2 device. Additionally, handle
IO mux for the desired boot device.
Signed-off-by: NWalter Lozano <walter.lozano@collabora.com>

Signed-off-by: NWalter Lozano <walter.lozano@collabora.com>

Convert to DM_ETH to avoid board removal from the project.
Signed-off-by: NFabio Estevam <festevam@gmail.com>

Convert to DM_ETH to avoid board removal from the project.
Signed-off-by: NFabio Estevam <festevam@gmail.com>

Convert to DM_ETH to avoid board removal from the project.
Signed-off-by: NFabio Estevam <festevam@gmail.com>

Current aliases missed gpio0 node, and this node shoud be
aliased to gpio index 0 to align with i.MX8QXP. Otherwise, we
will get below message when running "gpio status" command, and
see the reason by "dm uclass".

=> gpio status
Device 'gpio@5d090000': seq 0 is in use by 'gpio@5d080000'
Device 'gpio@5d0a0000': seq 1 is in use by 'gpio@5d090000'
Device 'gpio@5d0b0000': seq 2 is in use by 'gpio@5d0a0000'

=> dm uclass
uclass 36: gpio
0   * gpio@5d080000 @ fbaefb90, seq 0, (req -1)
1   * gpio@5d090000 @ fbaefc70, seq 1, (req 0)
2   * gpio@5d0a0000 @ fbaefd50, seq 2, (req 1)
3   * gpio@5d0b0000 @ fbaefe30, seq 5, (req 2)
4   * gpio@5d0c0000 @ fbaeff10, seq 3, (req 3)
5   * gpio@5d0d0000 @ fbaefff0, seq 4, (req 4)
6   * gpio@5d0e0000 @ fbaf00d0, seq 6, (req 5)
7   * gpio@5d0f0000 @ fbaf01b0, seq 7, (req 6)
Signed-off-by: NYe Li <ye.li@nxp.com>

Since the i.MX8 GPIO banks are indexed from 0 not 1 on other i.MX
platforms, so we have to adjust the index accordingly.
Signed-off-by: NAdrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: NYe Li <ye.li@nxp.com>

We need to change the environment offset to avoid corrupting the U-Boot
binary when saving it.
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
Reviewed-by: NFabio Estevam <festevam@gmail.com>

This fixes the boot from USB loader, which is critical to easy the
manufacture process.
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
Reviewed-by: NFabio Estevam <festevam@gmail.com>

Select default U-Boot and SPL text base for the MX7 SoC. The U-Boot
text base is picked as the one used by various MX7 boards. The SPL
text base however is different.

The SPL text base is set to 0x912000 instead of the usual 0x911000,
that is because the 0x911000 value cannot work. Using 0x911000 as a
SPL text base will result in the DCD header being placed below the
0x911000 address, which is a reserved SRAM area which must not be
used. This will actually trigger eMMC boot failure on MX7D at least.
Hence the increment.

Update all boards affected by this SPL problem to the new SPL_TEXT_BASE.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

There are systems where board_early_init_f() is plain empty. Switch
the config option from "select" to "imply", to permit user to unset
the BOARD_EARLY_INIT_F if it were to be empty.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

The iMX7 defines further DDRC ZQCTLx registers, however those were
thus far missing from the list of registers and not programmed. On
systems with LPDDR2 or DDR3, those registers must be programmed with
correct values, otherwise the DRAM may not work. However, existing
systems which worked without programming these registers before are
now setting those registers to 0, which is the default value, so no
functional change there.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Update README to extract firmware from scripts
Signed-off-by: NOliver Graute <oliver.graute@kococonnector.com>

This is needed to obtain the MAC from EEPROM/OTP only after the final
env is populated, otherwise the ethaddr might be overriden.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Claudius Heine <ch@denx.de>
Cc: Harald Seiler <hws@denx.de>
Cc: Ludwig Zenz <lzenz@dh-electronics.com>
Cc: Stefano Babic <sbabic@denx.de>