Enable support for loadables in SEC firmware FIT image. Currently
support is added for single loadable image.

Brief description of implementation:
  Add two more address pointers (loadable_h, loadable_l) as arguments to
  sec_firmware_init() api.
  Create new api: sec_firmware_checks_copy_loadable() to check if loadables
  node is present in SEC firmware FIT image. If present, verify loadable
  image and copies it to secure DDR memory.
  Populate address pointers with secure DDR memory addresses where loadable
  is copied.

Example use-case could be trusted OS (tee.bin) as loadables node in SEC
firmware FIT image.
Signed-off-by: NSumit Garg <sumit.garg@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Change DDR allocated for secure memory from 2 MB to 66 MB. This
additional 64 MB secure memory is required for trusted OS running
in Trusted Execution Environment using ARMv8 TrustZone.
Signed-off-by: NSumit Garg <sumit.garg@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Signed-off-by: NAmrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: NAmrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Because COMFIG_DM_USB has been enabled and will not use it anymore.
Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

use Kconfig to select xhci accordingly.
Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Use Kconfig to select QE-HDLC and USB pin-mux.
Signed-off-by: NRan Wang <ran.wang_1@nxp.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Since TX delay is now enabled only in PHY_INTERFACE_MODE_RGMII_ID
PHY_INTERFACE_MODE_RGMII_TXID.

These change where introduced in phy driver in commit 05b29aa0
("net: phy: realtek: fix enabling of the TX-delay for RTL8211F").
Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

On ls1012a soc, core clock source frequency is fixed at 100Mhz.
Generic timer frequency is core clock source divided by 4, which
is 25Mhz.
Signed-off-by: NTang Yuantian <andy.tang@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Memory allocated via malloc is not guaranteed to be zeroized.
So explicitly use calloc instead of malloc.
Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

This macro is defined, but not referenced by anyone.

I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This macro is defined, but not referenced by anyone.

I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NMinkyu Kang <mk7.kang@samsung.com>

This macro is defined, but not referenced by anyone.

I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

This macro is defined, but not referenced by anyone.

I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This macro is defined, but not referenced by anyone.

I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This macro is defined, but not referenced by anyone.

I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This macro is defined, but not referenced by anyone.

I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NMinkyu Kang <mk7.kang@samsung.com>

This comment creates a wrong entry in config_whitelist.txt.

I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This macro is defined, but not referenced by anyone.

I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This macro is defined, but not referenced by anyone.

I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This macro only appears in commented-out lines.  It is not referenced
by anyone.

I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This macro is defined, but not referenced by anyone.

I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

This macro is defined, but not referenced by anyone.

I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This macro is defined, but not referenced by anyone.

I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Heiko Schocher<hs@denx.de>

CONFIG_SYS_I2C_FTI2C010 is not enabled by anyone.

Commit 28527096 ("dm: i2c: Add a note to I2C drivers which need
conversion") prompted to convert this driver to DM before June 2017,
but not converted yet.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NHeiko Schocher <hs@denx.de>

This driver was used by Blackfin boards, but Blackfin support is
gone.  There is no user of this driver.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NHeiko Schocher <hs@denx.de>

The supported sleep states are generic on Intel processors. Move the
ASL definition to the common place.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

On some platforms (eg: Braswell), the FSP will not produce the
graphics info HOB unless you plug some cables to the display
interface (eg: HDMI) on the board. Add such notes in the FSP
video driver.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Intel Braswell FSP requires SPI controller settings to be locked down,
let's do this in the chrryhill.dts and remove previous Kconfig option.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.

Rather than passively doing the opcode configuration, let's add a
simple DTS property "intel,spi-lock-down" and let the driver call
the opcode configuration function if required by such FSP.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This reverts commit 1e6ebee6.

It's not appropriate to call the Intel SPI driver specific stuff in
the FSP codes. We may add a simple DTS property "intel,spi-lock-down"
and let the Intel SPI driver call these stuff instead.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>

In an S3 resume path, MRC cache is mandatory. Enforce the dependency
in the Kconfig.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Imply does not work for a Kconfig choice. Update ENV_IS_IN_SPI_FLASH
to be the default one for Intel Braswell.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

It was observed that when booting Linux kernel on Intel Cherry Hill
board, unexpected crash happens quite randomly. Sometimes kernel
just oops, while sometimes kernel throws MCE errors and hangs:

  mce: [Hardware Error]: Machine check events logged
  mce: [Hardware Error]: CPU 0: Machine Check: 0 Bank 4: c400000000010151
  mce: [Hardware Error]: TSC 0 ADDR 130f3f2c0
  mce: [Hardware Error]: PROCESSOR 0:406c3 TIME 1508160686 SOCKET 0 APIC 0 microcode 363

This looks like a hardware error per mcelog. After debugging, it
seems turning off turbo mode on the processor does not expose this
behavior, although U-Boot runs OK with turbo mode on. Suspect it is
related to an errata of Braswell processor.

To fix this, remove the Braswell cpu driver which does the turbo
mode configuration, and switch to use the generic cpu-x86 driver.
Also there is a configuration option in the FSP that turns on the
turbo mode and that has been turned off too.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

With latest codes on mainstream master, Intel Galileo board does not
boot unfortunately. Git biset leads to b383d6c0 "bootstage: Convert
to use malloc()".

Disable bootstage support to make it boot again. The root cause needs
to be investigated however.

Fixes: b383d6c0 ("bootstage: Convert to use malloc()")
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>

The U-Boot binary may trip over its actual allocated size in the storage.
In such a case, the environment will not be readable anymore (because
corrupted when the new image was flashed), and any attempt at using saveenv
to reconstruct the environment will result in a corrupted U-Boot binary.
Reviewed-by: NAndre Przywara <andre.przywara@arm.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>