Pull request for UEFI sub-system for v2019.10-rc3

This pull request provides corrections for the SetVirtualAddress runtime
service and avoids possible calls to NULL by consumers of the
EFI_PXE_BASE_CODE_PROTOCOL.

- Misc gen5 fixes

- Fix sifive serial y-modem transfer.
- Access CSRs using CSR numbers.
- Update doc sifive-fu540
- Support big endian hosts and target.

Commit 7f95104d ("efi_loader: detach runtime in ExitBootServices()")
added a call to efi_runtime_detach() to ExitBootServices() but did not
remove the call in SetVirtualAddressMap().

Remove the superfluous function call.

Correct a comment referring to efi_runtime_detach().

Fixes: 7f95104d ("efi_loader: detach runtime in ExitBootServices()")
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

Check the parameters DescriptorSize and DescriptiorVersion of
SetVirtualAddressMap() as prescribed by the UEFI specification.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

U-Boot implements the EFI_PXE_BASE_CODE_PROTOCOL because GRUB uses the mode
information for booting via PXE. All function pointers in the protocol were
NULL up to now which will cause immediate crashes when the services of the
protocol are called.

Create function stubs for all services of the protocol returning
EFI_UNSUPPORTED.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

The socfpga gen5 SPL manually zeroed bss in board_init_f(). Now that the
DDR driver does not use bss any more, bss is not used before board_init_r()
and we can remove this hack.

bss is normally zeroed by crt0.S, but after board_init_f(), before
board_init_r(). socfpga just had this double-zeroing because it invalidly
used bss in board_init_f() already (during DDR initialization).
Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

Bring cyclone5 / arria5 / arria10 in line with convention and use
u-boot.img as CONFIG_SPL_FS_LOAD_PAYLOAD_NAME.
Signed-off-by: NDalon Westergreen <dalon.westergreen@intel.com>

The CONFIG name should be SYSRESET_SOCFPGA_S10 instead of
SYSRESET_SOCFPGA_STRATIX10.
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>

Signed-off-by: NMarcus Comstedt <marcus@mc.pp.se>
Cc: Rick Chen <rick@andestech.com>
Reviewed-by: NRick Chen <rick@andestech.com>

All ELF fields whose values are inspected by the code are converted to
CPU byteorder first.  Values which are copied verbatim (relocation
fixups) are not swapped to CPU byteorder and back as it is not needed.
Signed-off-by: NMarcus Comstedt <marcus@mc.pp.se>
Cc: Rick Chen <rick@andestech.com>
Reviewed-by: NRick Chen <rick@andestech.com>

We should explicitly load DTB from TFTP server or MMC/SD card
for Linux booting. This will allow us:
1. To use different Linux DTB for SiFive Unleashed board with
   expansion board connected.
2. Avoid re-flashing OpenSBI firmware whenever board connections
   change.

This patch updates reference bootlog in SiFive FU540 README
as-per above.
Signed-off-by: NAnup Patel <anup.patel@wdc.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NJoe Hershberger <joe.hershberger@ni.com>

We should prefer accessing CSRs using their CSR numbers
because:
1. It compiles fine with older toolchains.
2. We can use latest CSR names in #define macro names of CSR
   numbers as-per RISC-V spec.
3. We can access newly added CSRs even if toolchain does not
   recognize newly added CSRs by name.

This commit is inspired from Linux kernel commit a3182c91ef4e
("RISC-V: Access CSRs using CSR numbers").
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NRick Chen <rick@andestech.com>
Reviewed-by: NAnup Patel <anup.patel@wdc.com>
Reviewed-by: NLukas Auer <lukas.auer@aisec.fraunhofer.de>

This syncs csr.h with Linux kernel 5.2, and imports asm.h that
is required by csr.h.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NRick Chen <rick@andestech.com>
Reviewed-by: NAnup Patel <anup.patel@wdc.com>
Reviewed-by: NLukas Auer <lukas.auer@aisec.fraunhofer.de>

In y-modem transfer mode, tstc/getc fail to check if there is any
data available / received in RX FIFO, and so y-modem transfer never
succeeds. Using receive watermark bit within ip register fixes the
issue.

This patch is based on commit c7392b7bc4e1 ("Use the RX watermark
interrupt pending bit for TSTC") available at[1]

[1] https://github.com/sifive/HiFive_U-Boot/tree/regressionSigned-off-by: NSagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: NAnup Patel <anup.patel@wdc.com>
Tested-by: NAnup Patel <anup.patel@wdc.com>
Reviewed-by: NPadmarao Begari <padmarao.begari@microchip.com>
Tested-by: NPadmarao Begari <padmarao.begari@microchip.com>

Rsync all defconfig files using moveconfig.py
Signed-off-by: NTom Rini <trini@konsulko.com>

Signed-off-by: NTom Rini <trini@konsulko.com>

- Various improvements to Keymile boards - mostly DT conversation
  (Pascal & Holger)
- Removal of now unsupported Keymile boards (Pascal & Holger)
- Small MVEBU PCI fix (Marek)
- Turris Omnia defconfig update (Marek)
- Misc Allied Telesis defconfig updates (Chris)

- amlogic: add support for the SEI Robotic SEI510

- More DaVinci updates and fixes
- PCIe support on am65x
- Watchdog converted to DM
- Assorted other bugfixes

- environment cleanup
- HiKey 960 support
- Some PCI fixes

We do not need to split binman, buildman, dtoc and patman test suite
runs into 3 jobs.  Instead, run them as a single job.
Signed-off-by: NTom Rini <trini@konsulko.com>

The way that some of the tests here are designed, they expect USER to be
set in the environment.  This is not the case in the docker images, so
set a reasonable value.
Signed-off-by: NTom Rini <trini@konsulko.com>

A previous commit...

commit 2a51e16b ("configs: Make USE_TINY_PRINTF depend on SPL||TPL and be default")

...causes the System Firmware version string during SPL boot to no longer
getting printed to the console as expected. To fix this issue rework the
handling of that string to only use basic printf() syntax rather than
for example disabling CONFIG_USE_TINY_PRINTF on affected devices, this
way maintaining most of the memory size benefit the initial patch brings
when it comes to SPL.
Signed-off-by: NAndreas Dannenberg <dannenberg@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Do not fail if any of the requested subtypes are not available, but set the
number of resources to 0 and continue parsing the resource ranges.

Based on Linux kernel patch by Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>

Historically there have been various boot options, SPI flash,
NAND or NOR. The NOR flash is mutually exclusive with MMC, but
it isn't mutually exclusive with NAND or SPI Flash, so this patch
enables both NAND flash and SPI Flash when booting from NOR.
Signed-off-by: NAdam Ford <aford173@gmail.com>

The configuration with NOR is mutually exclusive with MMC, and as
such, the filesystem commands were disabled.  With the USB host
enabled, this patch enables the file system command which can
be executed on storage devices attached to the USB.
Signed-off-by: NAdam Ford <aford173@gmail.com>

The current size allocated to U-Boot is 384k, but U-Boot has grown
to 436K which means that saving the environmental variables wipes
out part of the U-Boot source and the board ceases to function.
Due to the sector and erase size for the NOR part and a desire to
not have to change partition sizes often, this patch moves the
U-Boot environmental variables to an offset of 1M so saveenv
does not brick the board.  This patch also sets up MTDIDS and
MTDPARTS to clearly show where U-Boot and U-Boot's environmental
variables are located.
Signed-off-by: NAdam Ford <aford173@gmail.com>

A previous patch for enabling the NAND config set a flag called
CONFIG_SKIP_LOWLEVEL_INIT when it should have been called
CONFIG_SKIP_LOWLEVEL_INIT_ONLY.  The affect this had was creating
a delay on startup for the NOR version which is XIP and doesn't have
SPL, so the lowlevel initialization functions need to operate.
This delay was not really noticeable at first, but the delays have been
getting longer, finally reached the point of nearly seven seconds
before the board would appear to start.

This patch sets the CONFIG_SKIP_LOWLEVEL_INIT_ONLY instead which means
"The normal CP15 init (such as enabling the instruction cache) is still
performed" per the README.  It doesn't appear to have any adverse
behavior on the SPI Flash or the NAND flash boards which use SPL.

Fixes: 93f33627 ("ARM: configs: Add da850evm_nand to boot from NAND")
Signed-off-by: NAdam Ford <aford173@gmail.com>

Enable support for Intel E1000 based PCIe ethernet cards that
can be used to test PCIe RC functionality on AM65x EVM.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Add needed device-tree nodes to support PCIe 0
and SERDES on AM65x SoC. The nodes are kept
disabled by default.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Enable support for PCIe and related configurations
on AM654 EVM platform.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Add a new SERDES driver for TI's AM654x SoC which configures
the SERDES only for PCIe. Support fo USB3 can be added later.

SERDES in am654x has three input clocks (left input, external
reference clock and right input) and two output clocks (left
output and right output) in addition to a PLL mux clock which
the SERDES uses for Clock Multiplier Unit (CMU refclock).

The PLL mux clock can select from one of the three input
clocks. The right output can select between left input and
external reference clock while the left output can select
between the right input and external reference clock.

The driver has support to select PLL mux and left/right output
mux as specified in device tree.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Add driver supporting PCIe root-complex available
on TI's AM65x SoC.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Current dev_read_*() API lacks support to get address and size
of a "reg" property by name or index. Add support for the same.

Livetree support has been added but not tested on real hardware.

The existing unit tests testing reading address from device-tree
have been updated to test address as well as size.
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Add support for clk_is_match() which is required to
know if two clock pointers point to the same exact
physical clock.

Also add a unit test for the new API.
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Failure log for ti_sci_power_domain_on/off is as below:
"ti_sci_power_domain_on: get/set_device failed (-19)"

The above information is useless for debug without information
on what specific device access failed. So add that information as well.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

This commit adds support for the B&R brsmarc1 SoM.

The SoM is based on TI's AM335x SoC.
Mainly vxWorks 6.9.4.x is running on the board,
doing some PLC stuff on various carrier boards.
Signed-off-by: NHannes Schmelzer <hannes.schmelzer@br-automation.com>

This patch disables DM watchdog support for SPL builds and uses
the legacy omap watchdog driver on TI AM335x chipsets.

The following build error is reported if DM watchdog support was
enabled in SPL:

  CC      spl/drivers/usb/gadget/rndis.o
  LD      spl/drivers/usb/gadget/built-in.o
  LD      spl/drivers/usb/musb-new/built-in.o
  LD      spl/drivers/built-in.o
  LD      spl/u-boot-spl
arm-linux-ld.bfd: u-boot-spl section .u_boot_list will not fit in region .sram
arm-linux-ld.bfd: region .sram overflowed by 440 bytes
make[1]: *** [spl/u-boot-spl] Error 1
make: *** [spl/u-boot-spl] Error 2

Adjusted WATCHDOG_RESET macro accordingly. Earlier it was pointing
to hw_watchdog_reset. Since CONFIG_WATCHDOG replaces CONFIG_HW_WATCHDOG,
now WATCHDOG_RESET macro points to watchdog_reset. This watchdog_reset
is not defined anywhere for am33xx/omap2 and needs to be defined. Fixed
this by simply calling hw_watchdog_reset in watchdog_reset.

Built and tested on AM335x device (BeagleboneBlack), compile tested for
all other AM33xx/omap2 based boards.
Signed-off-by: NSuniel Mahesh <sunil.m@techveda.org>
[trini: Fix watchdog.h logic]
Signed-off-by: NTom Rini <trini@konsulko.com>

The non-DM version of this driver used to set BAR0 register after the
calls to pci_set_region.
I found out that for some strange reason the ath10k driver in kernel
fails to work if this is done the other way around.
I know that Linux's driver should not depend on how U-Boot does things,
but for some strange reason it does and this seems to be the simplest
solution. Fix it since it caused regressions on Omnia.
Signed-off-by: NMarek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Phil Sutter <phil@nwl.cc>
Cc: VlaoMao <vlaomao@gmail.com>
Tested-by: NChris Packham <judge.packham@gmail.com>
Reviewed-by: NStefan Roese <sr@denx.de>
Signed-off-by: NStefan Roese <sr@denx.de>