Use a single rule that works for all phases.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename this options so that CONFIG_IS_ENABLED can be used with it.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename these options so that CONFIG_IS_ENABLED can be used with them.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename this option so that CONFIG_IS_ENABLED can be used with it.

Oddly there is already an SPL_CACHE option. Drop it in favour of this one.

Drop the special SPL Makefile rule which is now superfluous.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename these options so that CONFIG_IS_ENABLED can be used with them.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename these options so that CONFIG_IS_ENABLED can be used with them.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename these options so that CONFIG_IS_ENABLED can be used with them.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename these options so that CONFIG_IS_ENABLED can be used with them.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename these options so that CONFIG_IS_ENABLED can be used with them.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
[trini: Fixup some incorrect renames]
Signed-off-by: NTom Rini <trini@konsulko.com>

Add iMX8ULP DDR initialization driver which loads the DDR timing
parameters and executes the training procedure.

When enabling IMX8ULP_DRAM_PHY_PLL_BYPASS, using PHY PLL bypass mode
to do DDR init
Signed-off-by: NYe Li <ye.li@nxp.com>

This rule should not be in the top-level Makefile. Now that we have a
consistent set of I2C Kconfigs for U-Boot proper, SPL and TPL, we can move
it.

Make use of the existing SPL/TPL rule in drivers/Makefile instead.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename these options so that CONFIG_IS_ENABLED can be used with them.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Rename these options so that CONFIG_IS_ENABLED can be used with them.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename these options so that CONFIG_IS_ENABLED can be used with them.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename this option so that CONFIG_IS_ENABLED can be used with it.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename this option so that CONFIG_IS_ENABLED can be used with it.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename this option so that CONFIG_IS_ENABLED can be used with it.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename this option so that CONFIG_IS_ENABLED can be used with it.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename this option so that CONFIG_IS_ENABLED can be used with it.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename this option so that CONFIG_IS_ENABLED can be used with it.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>

These don't belong in the drivers Makefile so move them down into
the correct place.
Signed-off-by: NSimon Glass <sjg@chromium.org>
[trini: Fixup some missing dependencies this exposed]
Signed-off-by: NTom Rini <trini@konsulko.com>

A new driver uclass is created to handle the reboot mode control.

The new uclass driver is updating an environment variable with the
configured reboot mode. The mode is extracted from a map provided
at initialization time. The map contains a list of modes
and associated ids.
Signed-off-by: NNandor Han <nandor.han@vaisala.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add PCIe PHY driver support for Pro5, LD20 and PXs3 SoCs.
Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com>

The _SUPPORT suffix is from an earlier time and interferes with use of
the CONFIG_IS_ENABLED() macro. Rename the option to drop the suffix.

Tidy up the TODO that prompted this.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This commit add an option TPL_BOOTCOUNT_LIMIT to
use bootcount on TPL.
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This uclass is intended to provide a way to obtain information about a
U-Boot board. But the concept of a U-Boot 'board' is the whole system,
not just one circuit board, meaning that 'board' is something of a
misnomer for this uclass.

In addition, the name 'board' is a bit overused in U-Boot and we want to
use the same uclass to provide SMBIOS information.

The obvious name is 'system' but that is so vague as to be meaningless.
Use 'sysinfo' instead, since this uclass is aimed at providing information
on the system.

Rename everything accordingly.

Note: Due to the patch delta caused by the symbol renames, this patch
shows some renamed files as being deleted in one place and created in
another.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Add a new subsystem that handles multiplexer controllers. The API is the
same as in Linux.
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NPratyush Yadav <p.yadav@ti.com>
[trini: Update some error calls to use different functions or pass
        correct arguments]
Signed-off-by: NTom Rini <trini@konsulko.com>

The patch does sed 's/SPL_FPGA_SUPPORT/SPL_FPGA/g' but also fixing Makefile
and zynqmp.c to simplify if/endif logic in zynqmp.c.

This change is mostly done to be able to use CONFIG_IS_ENABLED macro and
obj-$(CONFIG_$(SPL_)FPGA) in Makefile. For them symbols need to be in sync.

And removing one line from Topic Miami boards which is not needed because
symbol is not enabled via Kconfig.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Port hypervisor related code from Mini-OS. This is referencing the code
of Mini-OS from [1] by Huang Shijie and Volodymyr Babchuk which is for
ARM64.
Update essential arch code to support required bit operations, memory
barriers etc.

Copyright for the bits ported belong to at least the following authors,
please see related files for details:

Copyright (c) 2002-2003, K A Fraser
Copyright (c) 2005, Grzegorz Milos, gm281@cam.ac.uk,Intel Research Cambridge
Copyright (c) 2014, Karim Allah Ahmed <karim.allah.ahmed@gmail.com>

[1] - https://github.com/zyzii/mini-os.gitSigned-off-by: NOleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: NAnastasiia Lukianenko <anastasiia_lukianenko@epam.com>
[trini: Drop wmb() from musb-net/linux-compat.h now]
Signed-off-by: NTom Rini <trini@konsulko.com>

Add a new uclass for button that implements two functions:
- button_get_by_label
- button_get_status
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com>

Since commit 1517126f ("ARM: uniphier: select DM_ETH"), DM-based
drivers/net/smc911x.c is compiled, but it is never probed because the
parent node lacks the DM-based driver.

I need a skeleton driver to populate child devices (but the next commit
will move more hardware settings to the this driver).

I put this to drivers/bus/uniphier-system-bus.c because this is the
same path as the driver in Linux kernel.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Add Rockchip USB2PHY driver with initial support.

This will help to use it for EHCI controller in host
mode, and USB 3.0 controller in otg mode.

More functionality like charge, vbus detection will
add it in future changes.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Signed-off-by: NFrank Wang <frank.wang@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Descend to drivers/soc directory unconditionally for SPL and U-Boot
builds. Individual drivers can have their own config to check what needs
to be built for SPL. There should be no increase in SPL code size
due to this change.

This is required on K3 SoCs to support DMA in SPL.
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA. This allows to use
macros such as CONFIG_IS_ENABLED() that allow conditional compilation of
code for SPL and U-Boot.
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add a uclass for reading a random number seed from a random number
generator device.
Signed-off-by: NSughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
Reviewed-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Make the board driver available in the SPL too. The board driver is a way
to provide useful information about the board and that can be useful in
the SPL too.
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add an option for building cache drivers in SPL.
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

Add a simple PMC for sandbox to permit tests to run.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

When ax25-ae350 try to enable v5l2 cache
driver in SPL configuration, it need this
option for cache support in SPL.
Signed-off-by: NRick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>

Move MTD-related lines out of the root Makefile. Put them in their
respective directories. Enclose some of these new lines to skip them
when building the SPL. MTD core files and some MTD device drivers are
compiled in a mtd.o object and included in the final object only if
MTD support is required (there are two different symbols for that, one
for U-Boot and one for the SPL).

Now that all defconfigs have been fixed, we can stop the logic where
enabling a command selects the core files to compile. This logic is
broken since selecting a symbol with a 'depends on' will not enforce
this secondary dependency.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>