at91sam9x5.dtsi 23.9 KB
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/*
 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
 *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
 *                   AT91SAM9X25, AT91SAM9X35 SoC
 *
 *  Copyright (C) 2012 Atmel,
 *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

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#include "skeleton.dtsi"
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#include <dt-bindings/dma/at91.h>
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#include <dt-bindings/pinctrl/at91.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
	model = "Atmel AT91SAM9x5 family SoC";
	compatible = "atmel,at91sam9x5";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
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		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
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		ssc0 = &ssc0;
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		pwm0 = &pwm0;
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	};
	cpus {
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		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
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		};
	};

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	memory {
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		reg = <0x20000000 0x10000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
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				#interrupt-cells = <3>;
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				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
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				atmel,external-irqs = <31>;
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			};

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			ramc0: ramc@ffffe800 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe800 0x200>;
			};

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			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

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			rstc@fffffe00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffe00 0x10>;
			};

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			shdwc@fffffe10 {
				compatible = "atmel,at91sam9x5-shdwc";
				reg = <0xfffffe10 0x10>;
			};

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			pit: timer@fffffe30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffe30 0xf>;
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				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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			};

			tcb0: timer@f8008000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf8008000 0x100>;
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				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
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			};

			tcb1: timer@f800c000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf800c000 0x100>;
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				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
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			};

			dma0: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
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				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
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				#dma-cells = <2>;
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			};

			dma1: dma-controller@ffffee00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffee00 0x200>;
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				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
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				#dma-cells = <2>;
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			};

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			pinctrl@fffff400 {
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				#address-cells = <1>;
				#size-cells = <1>;
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				compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
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				ranges = <0xfffff400 0xfffff400 0x800>;

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				/* shared pinctrl settings */
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				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
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							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA9 periph A */
							 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA10 periph A with pullup */
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					};
				};

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				usart0 {
					pinctrl_usart0: usart0-0 {
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						atmel,pins =
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							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA0 periph A with pullup */
							 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA1 periph A */
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					};

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					pinctrl_usart0_rts: usart0_rts-0 {
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						atmel,pins =
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							<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA2 periph A */
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					};

					pinctrl_usart0_cts: usart0_cts-0 {
						atmel,pins =
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							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA3 periph A */
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					};
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					pinctrl_usart0_sck: usart0_sck-0 {
						atmel,pins =
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							<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA4 periph A */
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					};
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				};

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				usart1 {
					pinctrl_usart1: usart1-0 {
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						atmel,pins =
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							<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA5 periph A with pullup */
							 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA6 periph A */
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					};

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					pinctrl_usart1_rts: usart1_rts-0 {
						atmel,pins =
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							<AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC27 periph C */
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					};

					pinctrl_usart1_cts: usart1_cts-0 {
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						atmel,pins =
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							<AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC28 periph C */
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					};
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					pinctrl_usart1_sck: usart1_sck-0 {
						atmel,pins =
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							<AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC29 periph C */
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					};
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				};

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				usart2 {
					pinctrl_usart2: usart2-0 {
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						atmel,pins =
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							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA7 periph A with pullup */
							 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA8 periph A */
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					};

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					pinctrl_usart2_rts: usart2_rts-0 {
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						atmel,pins =
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							<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB0 periph B */
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					};

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					pinctrl_usart2_cts: usart2_cts-0 {
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						atmel,pins =
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							<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB1 periph B */
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					};
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					pinctrl_usart2_sck: usart2_sck-0 {
						atmel,pins =
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							<AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB2 periph B */
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					};
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				};

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				uart0 {
					pinctrl_uart0: uart0-0 {
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						atmel,pins =
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							<AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE	/* PC8 periph C */
							 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;	/* PC9 periph C with pullup */
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					};
				};

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				uart1 {
					pinctrl_uart1: uart1-0 {
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						atmel,pins =
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							<AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE	/* PC16 periph C */
							 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;	/* PC17 periph C with pullup */
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					};
				};
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				nand {
					pinctrl_nand: nand-0 {
						atmel,pins =
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							<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD0 periph A Read Enable */
							 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD1 periph A Write Enable */
							 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD2 periph A Address Latch Enable */
							 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD3 periph A Command Latch Enable */
							 AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP	/* PD4 gpio Chip Enable pin pull_up */
							 AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP	/* PD5 gpio RDY/BUSY pin pull_up */
							 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD6 periph A Data bit 0 */
							 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD7 periph A Data bit 1 */
							 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD8 periph A Data bit 2 */
							 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD9 periph A Data bit 3 */
							 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD10 periph A Data bit 4 */
							 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD11 periph A Data bit 5 */
							 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD12 periph A Data bit 6 */
							 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD13 periph A Data bit 7 */
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					};

					pinctrl_nand_16bits: nand_16bits-0 {
						atmel,pins =
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							<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD14 periph A Data bit 8 */
							 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD15 periph A Data bit 9 */
							 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD16 periph A Data bit 10 */
							 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD17 periph A Data bit 11 */
							 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD18 periph A Data bit 12 */
							 AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD19 periph A Data bit 13 */
							 AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PD20 periph A Data bit 14 */
							 AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD21 periph A Data bit 15 */
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					};
				};

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				mmc0 {
					pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
						atmel,pins =
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							<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA17 periph A */
							 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA16 periph A with pullup */
							 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA15 periph A with pullup */
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					};

					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
						atmel,pins =
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							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA18 periph A with pullup */
							 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA19 periph A with pullup */
							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA20 periph A with pullup */
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					};
				};

				mmc1 {
					pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
						atmel,pins =
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							<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA13 periph B */
							 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA12 periph B with pullup */
							 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;	/* PA11 periph B with pullup */
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					};

					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
						atmel,pins =
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							<AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA2 periph B with pullup */
							 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA3 periph B with pullup */
							 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;	/* PA4 periph B with pullup */
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					};
				};

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				ssc0 {
					pinctrl_ssc0_tx: ssc0_tx-0 {
						atmel,pins =
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							<AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA24 periph B */
							 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA25 periph B */
							 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA26 periph B */
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					};

					pinctrl_ssc0_rx: ssc0_rx-0 {
						atmel,pins =
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							<AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA27 periph B */
							 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA28 periph B */
							 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA29 periph B */
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					};
				};

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				spi0 {
					pinctrl_spi0: spi0-0 {
						atmel,pins =
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							<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA11 periph A SPI0_MISO pin */
							 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA12 periph A SPI0_MOSI pin */
							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA13 periph A SPI0_SPCK pin */
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					};
				};

				spi1 {
					pinctrl_spi1: spi1-0 {
						atmel,pins =
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							<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA21 periph B SPI1_MISO pin */
							 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA22 periph B SPI1_MOSI pin */
							 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA23 periph B SPI1_SPCK pin */
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					};
				};

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				i2c0 {
					pinctrl_i2c0: i2c0-0 {
						atmel,pins =
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							<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA30 periph A I2C0 data */
							 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA31 periph A I2C0 clock */
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					};
				};

				i2c1 {
					pinctrl_i2c1: i2c1-0 {
						atmel,pins =
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							<AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE	/* PC0 periph C I2C1 data */
							 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC1 periph C I2C1 clock */
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					};
				};

				i2c2 {
					pinctrl_i2c2: i2c2-0 {
						atmel,pins =
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							<AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB4 periph B I2C2 data */
							 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB5 periph B I2C2 clock */
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					};
				};

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				i2c_gpio0 {
					pinctrl_i2c_gpio0: i2c_gpio0-0 {
						atmel,pins =
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							<AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE	/* PA30 gpio multidrive I2C0 data */
							 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;	/* PA31 gpio multidrive I2C0 clock */
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					};
				};

				i2c_gpio1 {
					pinctrl_i2c_gpio1: i2c_gpio1-0 {
						atmel,pins =
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							<AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE	/* PC0 gpio multidrive I2C1 data */
							 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;	/* PC1 gpio multidrive I2C1 clock */
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					};
				};

				i2c_gpio2 {
					pinctrl_i2c_gpio2: i2c_gpio2-0 {
						atmel,pins =
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							<AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE	/* PB4 gpio multidrive I2C2 data */
							 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;	/* PB5 gpio multidrive I2C2 clock */
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					};
				};

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				tcb0 {
					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
						atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
						atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
						atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
						atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
						atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
						atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
						atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
						atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
						atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				tcb1 {
					pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
						atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
						atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
						atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
						atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
						atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
						atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
						atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
						atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
						atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};
				};

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				pioA: gpio@fffff400 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
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					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
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					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioB: gpio@fffff600 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
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					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
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					#gpio-cells = <2>;
					gpio-controller;
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					#gpio-lines = <19>;
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					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioC: gpio@fffff800 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
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					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
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					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioD: gpio@fffffa00 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
482
					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
483 484
					#gpio-cells = <2>;
					gpio-controller;
485
					#gpio-lines = <22>;
486 487 488
					interrupt-controller;
					#interrupt-cells = <2>;
				};
489 490
			};

491 492 493
			ssc0: ssc@f0010000 {
				compatible = "atmel,at91sam9g45-ssc";
				reg = <0xf0010000 0x4000>;
494
				interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
495 496 497
				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
				       <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
				dma-names = "tx", "rx";
498 499 500 501 502
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
				status = "disabled";
			};

503 504 505
			mmc0: mmc@f0008000 {
				compatible = "atmel,hsmci";
				reg = <0xf0008000 0x600>;
506
				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
507
				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
508
				dma-names = "rxtx";
509
				pinctrl-names = "default";
510 511 512 513 514 515 516 517
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			mmc1: mmc@f000c000 {
				compatible = "atmel,hsmci";
				reg = <0xf000c000 0x600>;
518
				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
519
				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
520
				dma-names = "rxtx";
521
				pinctrl-names = "default";
522 523 524 525 526
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

527 528 529
			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
530
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
531 532
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
533 534 535 536 537 538
				status = "disabled";
			};

			usart0: serial@f801c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf801c000 0x200>;
539
				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
540
				pinctrl-names = "default";
541
				pinctrl-0 = <&pinctrl_usart0>;
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				status = "disabled";
			};

			usart1: serial@f8020000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8020000 0x200>;
548
				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
549
				pinctrl-names = "default";
550
				pinctrl-0 = <&pinctrl_usart1>;
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				status = "disabled";
			};

			usart2: serial@f8024000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8024000 0x200>;
557
				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
558
				pinctrl-names = "default";
559
				pinctrl-0 = <&pinctrl_usart2>;
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				status = "disabled";
			};

563 564 565
			i2c0: i2c@f8010000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8010000 0x100>;
566
				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
567 568
				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
				       <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
569
				dma-names = "tx", "rx";
570 571
				#address-cells = <1>;
				#size-cells = <0>;
572 573
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_i2c0>;
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				status = "disabled";
			};

			i2c1: i2c@f8014000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8014000 0x100>;
580
				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
581 582
				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
				       <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
583
				dma-names = "tx", "rx";
584 585
				#address-cells = <1>;
				#size-cells = <0>;
586 587
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_i2c1>;
588 589 590 591 592 593
				status = "disabled";
			};

			i2c2: i2c@f8018000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8018000 0x100>;
594
				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
595 596
				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
				       <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
597
				dma-names = "tx", "rx";
598 599
				#address-cells = <1>;
				#size-cells = <0>;
600 601
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_i2c2>;
602 603 604
				status = "disabled";
			};

605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622
			uart0: serial@f8040000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8040000 0x200>;
				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart0>;
				status = "disabled";
			};

			uart1: serial@f8044000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8044000 0x200>;
				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart1>;
				status = "disabled";
			};

623
			adc0: adc@f804c000 {
624 625
				#address-cells = <1>;
				#size-cells = <0>;
626 627
				compatible = "atmel,at91sam9260-adc";
				reg = <0xf804c000 0x100>;
628
				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
629
				atmel,adc-use-external-triggers;
630 631 632
				atmel,adc-channels-used = <0xffff>;
				atmel,adc-vref = <3300>;
				atmel,adc-startup-time = <40>;
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				atmel,adc-res = <8 10>;
				atmel,adc-res-names = "lowres", "highres";
				atmel,adc-use-res = "highres";
636 637

				trigger@0 {
638
					reg = <0>;
639 640 641 642 643 644
					trigger-name = "external-rising";
					trigger-value = <0x1>;
					trigger-external;
				};

				trigger@1 {
645
					reg = <1>;
646 647 648 649 650 651
					trigger-name = "external-falling";
					trigger-value = <0x2>;
					trigger-external;
				};

				trigger@2 {
652
					reg = <2>;
653 654 655 656 657 658
					trigger-name = "external-any";
					trigger-value = <0x3>;
					trigger-external;
				};

				trigger@3 {
659
					reg = <3>;
660 661 662 663
					trigger-name = "continuous";
					trigger-value = <0x6>;
				};
			};
664 665 666 667 668 669

			spi0: spi@f0000000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xf0000000 0x100>;
670
				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
671 672 673
				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
				       <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
				dma-names = "tx", "rx";
674 675
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi0>;
676 677 678 679 680 681 682 683
				status = "disabled";
			};

			spi1: spi@f0004000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xf0004000 0x100>;
684
				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
685 686 687
				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
				       <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
				dma-names = "tx", "rx";
688 689
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi1>;
690 691
				status = "disabled";
			};
692

693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754
			usb2: gadget@f803c000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91sam9rl-udc";
				reg = <0x00500000 0x80000
				       0xf803c000 0x400>;
				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
				status = "disabled";

				ep0 {
					reg = <0>;
					atmel,fifo-size = <64>;
					atmel,nb-banks = <1>;
				};

				ep1 {
					reg = <1>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <2>;
					atmel,can-dma;
					atmel,can-isoc;
				};

				ep2 {
					reg = <2>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <2>;
					atmel,can-dma;
					atmel,can-isoc;
				};

				ep3 {
					reg = <3>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <3>;
					atmel,can-dma;
				};

				ep4 {
					reg = <4>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <3>;
					atmel,can-dma;
				};

				ep5 {
					reg = <5>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <3>;
					atmel,can-dma;
					atmel,can-isoc;
				};

				ep6 {
					reg = <6>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <3>;
					atmel,can-dma;
					atmel,can-isoc;
				};
			};

755 756 757
			watchdog@fffffe40 {
				compatible = "atmel,at91sam9260-wdt";
				reg = <0xfffffe40 0x10>;
758 759 760 761 762
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				atmel,watchdog-type = "hardware";
				atmel,reset-type = "all";
				atmel,dbg-halt;
				atmel,idle-halt;
763 764 765
				status = "disabled";
			};

766
			rtc@fffffeb0 {
767
				compatible = "atmel,at91sam9x5-rtc";
768
				reg = <0xfffffeb0 0x40>;
769
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
770 771
				status = "disabled";
			};
B
Bo Shen 已提交
772 773 774 775 776 777 778 779

			pwm0: pwm@f8034000 {
				compatible = "atmel,at91sam9rl-pwm";
				reg = <0xf8034000 0x300>;
				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
				#pwm-cells = <3>;
				status = "disabled";
			};
780
		};
781 782 783 784 785 786

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
787 788 789
			       0xffffe000 0x600		/* PMECC Registers */
			       0xffffe600 0x200		/* PMECC Error Location Registers */
			       0x00108000 0x18000	/* PMECC looup table in ROM code  */
790
			      >;
791
			atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
792 793
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
794
			atmel,nand-has-dma;
795 796
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;
797 798
			gpios = <&pioD 5 GPIO_ACTIVE_HIGH
				 &pioD 4 GPIO_ACTIVE_HIGH
799 800 801 802
				 0
				>;
			status = "disabled";
		};
803 804 805 806

		usb0: ohci@00600000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00600000 0x100000>;
807
			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
808 809
			status = "disabled";
		};
810 811 812 813

		usb1: ehci@00700000 {
			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
			reg = <0x00700000 0x100000>;
814
			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
815 816
			status = "disabled";
		};
817
	};
818 819 820

	i2c@0 {
		compatible = "i2c-gpio";
821 822
		gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
			 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
823 824 825 826 827 828
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
829 830
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_gpio0>;
831 832 833 834 835
		status = "disabled";
	};

	i2c@1 {
		compatible = "i2c-gpio";
836 837
		gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
			 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
838 839 840 841 842 843
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
844 845
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_gpio1>;
846 847 848 849 850
		status = "disabled";
	};

	i2c@2 {
		compatible = "i2c-gpio";
851 852
		gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
			 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
853 854 855 856 857 858
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
859 860
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_gpio2>;
861 862
		status = "disabled";
	};
863
};