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s2io.c 246.6 KB
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/************************************************************************
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 * s2io.c: A Linux PCI-X Ethernet driver for Neterion 10GbE Server NIC
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 * Copyright(c) 2002-2007 Neterion Inc.
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 * This software may be used and distributed according to the terms of
 * the GNU General Public License (GPL), incorporated herein by reference.
 * Drivers based on or derived from this code fall under the GPL and must
 * retain the authorship, copyright and license notice.  This file is not
 * a complete program and may only be used when the entire operating
 * system is licensed under the GPL.
 * See the file COPYING in this distribution for more information.
 *
 * Credits:
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 * Jeff Garzik		: For pointing out the improper error condition
 *			  check in the s2io_xmit routine and also some
 *			  issues in the Tx watch dog function. Also for
 *			  patiently answering all those innumerable
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 *			  questions regaring the 2.6 porting issues.
 * Stephen Hemminger	: Providing proper 2.6 porting mechanism for some
 *			  macros available only in 2.6 Kernel.
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 * Francois Romieu	: For pointing out all code part that were
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 *			  deprecated and also styling related comments.
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 * Grant Grundler	: For helping me get rid of some Architecture
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 *			  dependent code.
 * Christopher Hellwig	: Some more 2.6 specific issues in the driver.
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 *
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 * The module loadable parameters that are supported by the driver and a brief
 * explaination of all the variables.
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 *
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 * rx_ring_num : This can be used to program the number of receive rings used
 * in the driver.
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 * rx_ring_sz: This defines the number of receive blocks each ring can have.
 *     This is also an array of size 8.
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 * rx_ring_mode: This defines the operation mode of all 8 rings. The valid
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 *		values are 1, 2.
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 * tx_fifo_num: This defines the number of Tx FIFOs thats used int the driver.
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 * tx_fifo_len: This too is an array of 8. Each element defines the number of
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 * Tx descriptors that can be associated with each corresponding FIFO.
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 * intr_type: This defines the type of interrupt. The values can be 0(INTA),
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 *     2(MSI_X). Default value is '2(MSI_X)'
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 * lro_enable: Specifies whether to enable Large Receive Offload (LRO) or not.
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 *     Possible values '1' for enable '0' for disable. Default is '0'
 * lro_max_pkts: This parameter defines maximum number of packets can be
 *     aggregated as a single large packet
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 * napi: This parameter used to enable/disable NAPI (polling Rx)
 *     Possible values '1' for enable and '0' for disable. Default is '1'
 * ufo: This parameter used to enable/disable UDP Fragmentation Offload(UFO)
 *      Possible values '1' for enable and '0' for disable. Default is '0'
 * vlan_tag_strip: This can be used to enable or disable vlan stripping.
 *                 Possible values '1' for enable , '0' for disable.
 *                 Default is '2' - which means disable in promisc mode
 *                 and enable in non-promiscuous mode.
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 * multiq: This parameter used to enable/disable MULTIQUEUE support.
 *      Possible values '1' for enable and '0' for disable. Default is '0'
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 ************************************************************************/

#include <linux/module.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/pci.h>
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#include <linux/dma-mapping.h>
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#include <linux/kernel.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
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#include <linux/mdio.h>
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#include <linux/skbuff.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/stddef.h>
#include <linux/ioctl.h>
#include <linux/timex.h>
#include <linux/ethtool.h>
#include <linux/workqueue.h>
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#include <linux/if_vlan.h>
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#include <linux/ip.h>
#include <linux/tcp.h>
#include <net/tcp.h>
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#include <asm/system.h>
#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/div64.h>
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#include <asm/irq.h>
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/* local include */
#include "s2io.h"
#include "s2io-regs.h"

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#define DRV_VERSION "2.0.26.25"
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/* S2io Driver name & version. */
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static char s2io_driver_name[] = "Neterion";
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static char s2io_driver_version[] = DRV_VERSION;
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static int rxd_size[2] = {32,48};
static int rxd_count[2] = {127,85};
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static inline int RXD_IS_UP2DT(struct RxD_t *rxdp)
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{
	int ret;

	ret = ((!(rxdp->Control_1 & RXD_OWN_XENA)) &&
		(GET_RXD_MARKER(rxdp->Control_2) != THE_RXD_MARK));

	return ret;
}

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/*
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 * Cards with following subsystem_id have a link state indication
 * problem, 600B, 600C, 600D, 640B, 640C and 640D.
 * macro below identifies these cards given the subsystem_id.
 */
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#define CARDS_WITH_FAULTY_LINK_INDICATORS(dev_type, subid) \
	(dev_type == XFRAME_I_DEVICE) ?			\
		((((subid >= 0x600B) && (subid <= 0x600D)) || \
		 ((subid >= 0x640B) && (subid <= 0x640D))) ? 1 : 0) : 0
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#define LINK_IS_UP(val64) (!(val64 & (ADAPTER_STATUS_RMAC_REMOTE_FAULT | \
				      ADAPTER_STATUS_RMAC_LOCAL_FAULT)))

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static inline int is_s2io_card_up(const struct s2io_nic * sp)
{
	return test_bit(__S2IO_STATE_CARD_UP, &sp->state);
}

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/* Ethtool related variables and Macros. */
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static const char s2io_gstrings[][ETH_GSTRING_LEN] = {
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	"Register test\t(offline)",
	"Eeprom test\t(offline)",
	"Link test\t(online)",
	"RLDRAM test\t(offline)",
	"BIST Test\t(offline)"
};

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static const char ethtool_xena_stats_keys[][ETH_GSTRING_LEN] = {
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	{"tmac_frms"},
	{"tmac_data_octets"},
	{"tmac_drop_frms"},
	{"tmac_mcst_frms"},
	{"tmac_bcst_frms"},
	{"tmac_pause_ctrl_frms"},
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	{"tmac_ttl_octets"},
	{"tmac_ucst_frms"},
	{"tmac_nucst_frms"},
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	{"tmac_any_err_frms"},
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	{"tmac_ttl_less_fb_octets"},
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	{"tmac_vld_ip_octets"},
	{"tmac_vld_ip"},
	{"tmac_drop_ip"},
	{"tmac_icmp"},
	{"tmac_rst_tcp"},
	{"tmac_tcp"},
	{"tmac_udp"},
	{"rmac_vld_frms"},
	{"rmac_data_octets"},
	{"rmac_fcs_err_frms"},
	{"rmac_drop_frms"},
	{"rmac_vld_mcst_frms"},
	{"rmac_vld_bcst_frms"},
	{"rmac_in_rng_len_err_frms"},
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	{"rmac_out_rng_len_err_frms"},
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	{"rmac_long_frms"},
	{"rmac_pause_ctrl_frms"},
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	{"rmac_unsup_ctrl_frms"},
	{"rmac_ttl_octets"},
	{"rmac_accepted_ucst_frms"},
	{"rmac_accepted_nucst_frms"},
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	{"rmac_discarded_frms"},
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	{"rmac_drop_events"},
	{"rmac_ttl_less_fb_octets"},
	{"rmac_ttl_frms"},
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	{"rmac_usized_frms"},
	{"rmac_osized_frms"},
	{"rmac_frag_frms"},
	{"rmac_jabber_frms"},
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	{"rmac_ttl_64_frms"},
	{"rmac_ttl_65_127_frms"},
	{"rmac_ttl_128_255_frms"},
	{"rmac_ttl_256_511_frms"},
	{"rmac_ttl_512_1023_frms"},
	{"rmac_ttl_1024_1518_frms"},
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	{"rmac_ip"},
	{"rmac_ip_octets"},
	{"rmac_hdr_err_ip"},
	{"rmac_drop_ip"},
	{"rmac_icmp"},
	{"rmac_tcp"},
	{"rmac_udp"},
	{"rmac_err_drp_udp"},
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	{"rmac_xgmii_err_sym"},
	{"rmac_frms_q0"},
	{"rmac_frms_q1"},
	{"rmac_frms_q2"},
	{"rmac_frms_q3"},
	{"rmac_frms_q4"},
	{"rmac_frms_q5"},
	{"rmac_frms_q6"},
	{"rmac_frms_q7"},
	{"rmac_full_q0"},
	{"rmac_full_q1"},
	{"rmac_full_q2"},
	{"rmac_full_q3"},
	{"rmac_full_q4"},
	{"rmac_full_q5"},
	{"rmac_full_q6"},
	{"rmac_full_q7"},
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	{"rmac_pause_cnt"},
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	{"rmac_xgmii_data_err_cnt"},
	{"rmac_xgmii_ctrl_err_cnt"},
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	{"rmac_accepted_ip"},
	{"rmac_err_tcp"},
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	{"rd_req_cnt"},
	{"new_rd_req_cnt"},
	{"new_rd_req_rtry_cnt"},
	{"rd_rtry_cnt"},
	{"wr_rtry_rd_ack_cnt"},
	{"wr_req_cnt"},
	{"new_wr_req_cnt"},
	{"new_wr_req_rtry_cnt"},
	{"wr_rtry_cnt"},
	{"wr_disc_cnt"},
	{"rd_rtry_wr_ack_cnt"},
	{"txp_wr_cnt"},
	{"txd_rd_cnt"},
	{"txd_wr_cnt"},
	{"rxd_rd_cnt"},
	{"rxd_wr_cnt"},
	{"txf_rd_cnt"},
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	{"rxf_wr_cnt"}
};

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static const char ethtool_enhanced_stats_keys[][ETH_GSTRING_LEN] = {
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	{"rmac_ttl_1519_4095_frms"},
	{"rmac_ttl_4096_8191_frms"},
	{"rmac_ttl_8192_max_frms"},
	{"rmac_ttl_gt_max_frms"},
	{"rmac_osized_alt_frms"},
	{"rmac_jabber_alt_frms"},
	{"rmac_gt_max_alt_frms"},
	{"rmac_vlan_frms"},
	{"rmac_len_discard"},
	{"rmac_fcs_discard"},
	{"rmac_pf_discard"},
	{"rmac_da_discard"},
	{"rmac_red_discard"},
	{"rmac_rts_discard"},
	{"rmac_ingm_full_discard"},
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	{"link_fault_cnt"}
};

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static const char ethtool_driver_stats_keys[][ETH_GSTRING_LEN] = {
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	{"\n DRIVER STATISTICS"},
	{"single_bit_ecc_errs"},
	{"double_bit_ecc_errs"},
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	{"parity_err_cnt"},
	{"serious_err_cnt"},
	{"soft_reset_cnt"},
	{"fifo_full_cnt"},
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	{"ring_0_full_cnt"},
	{"ring_1_full_cnt"},
	{"ring_2_full_cnt"},
	{"ring_3_full_cnt"},
	{"ring_4_full_cnt"},
	{"ring_5_full_cnt"},
	{"ring_6_full_cnt"},
	{"ring_7_full_cnt"},
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	{"alarm_transceiver_temp_high"},
	{"alarm_transceiver_temp_low"},
	{"alarm_laser_bias_current_high"},
	{"alarm_laser_bias_current_low"},
	{"alarm_laser_output_power_high"},
	{"alarm_laser_output_power_low"},
	{"warn_transceiver_temp_high"},
	{"warn_transceiver_temp_low"},
	{"warn_laser_bias_current_high"},
	{"warn_laser_bias_current_low"},
	{"warn_laser_output_power_high"},
	{"warn_laser_output_power_low"},
	{"lro_aggregated_pkts"},
	{"lro_flush_both_count"},
	{"lro_out_of_sequence_pkts"},
	{"lro_flush_due_to_max_pkts"},
	{"lro_avg_aggr_pkts"},
	{"mem_alloc_fail_cnt"},
	{"pci_map_fail_cnt"},
	{"watchdog_timer_cnt"},
	{"mem_allocated"},
	{"mem_freed"},
	{"link_up_cnt"},
	{"link_down_cnt"},
	{"link_up_time"},
	{"link_down_time"},
	{"tx_tcode_buf_abort_cnt"},
	{"tx_tcode_desc_abort_cnt"},
	{"tx_tcode_parity_err_cnt"},
	{"tx_tcode_link_loss_cnt"},
	{"tx_tcode_list_proc_err_cnt"},
	{"rx_tcode_parity_err_cnt"},
	{"rx_tcode_abort_cnt"},
	{"rx_tcode_parity_abort_cnt"},
	{"rx_tcode_rda_fail_cnt"},
	{"rx_tcode_unkn_prot_cnt"},
	{"rx_tcode_fcs_err_cnt"},
	{"rx_tcode_buf_size_err_cnt"},
	{"rx_tcode_rxd_corrupt_cnt"},
	{"rx_tcode_unkn_err_cnt"},
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	{"tda_err_cnt"},
	{"pfc_err_cnt"},
	{"pcc_err_cnt"},
	{"tti_err_cnt"},
	{"tpa_err_cnt"},
	{"sm_err_cnt"},
	{"lso_err_cnt"},
	{"mac_tmac_err_cnt"},
	{"mac_rmac_err_cnt"},
	{"xgxs_txgxs_err_cnt"},
	{"xgxs_rxgxs_err_cnt"},
	{"rc_err_cnt"},
	{"prc_pcix_err_cnt"},
	{"rpa_err_cnt"},
	{"rda_err_cnt"},
	{"rti_err_cnt"},
	{"mc_err_cnt"}
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};

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#define S2IO_XENA_STAT_LEN	ARRAY_SIZE(ethtool_xena_stats_keys)
#define S2IO_ENHANCED_STAT_LEN	ARRAY_SIZE(ethtool_enhanced_stats_keys)
#define S2IO_DRIVER_STAT_LEN	ARRAY_SIZE(ethtool_driver_stats_keys)
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#define XFRAME_I_STAT_LEN (S2IO_XENA_STAT_LEN + S2IO_DRIVER_STAT_LEN )
#define XFRAME_II_STAT_LEN (XFRAME_I_STAT_LEN + S2IO_ENHANCED_STAT_LEN )

#define XFRAME_I_STAT_STRINGS_LEN ( XFRAME_I_STAT_LEN * ETH_GSTRING_LEN )
#define XFRAME_II_STAT_STRINGS_LEN ( XFRAME_II_STAT_LEN * ETH_GSTRING_LEN )
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#define S2IO_TEST_LEN	ARRAY_SIZE(s2io_gstrings)
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#define S2IO_STRINGS_LEN	S2IO_TEST_LEN * ETH_GSTRING_LEN

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#define S2IO_TIMER_CONF(timer, handle, arg, exp)		\
			init_timer(&timer);			\
			timer.function = handle;		\
			timer.data = (unsigned long) arg;	\
			mod_timer(&timer, (jiffies + exp))	\

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/* copy mac addr to def_mac_addr array */
static void do_s2io_copy_mac_addr(struct s2io_nic *sp, int offset, u64 mac_addr)
{
	sp->def_mac_addr[offset].mac_addr[5] = (u8) (mac_addr);
	sp->def_mac_addr[offset].mac_addr[4] = (u8) (mac_addr >> 8);
	sp->def_mac_addr[offset].mac_addr[3] = (u8) (mac_addr >> 16);
	sp->def_mac_addr[offset].mac_addr[2] = (u8) (mac_addr >> 24);
	sp->def_mac_addr[offset].mac_addr[1] = (u8) (mac_addr >> 32);
	sp->def_mac_addr[offset].mac_addr[0] = (u8) (mac_addr >> 40);
}
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/* Add the vlan */
static void s2io_vlan_rx_register(struct net_device *dev,
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				  struct vlan_group *grp)
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{
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	int i;
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	struct s2io_nic *nic = netdev_priv(dev);
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	unsigned long flags[MAX_TX_FIFOS];
	struct mac_info *mac_control = &nic->mac_control;
	struct config_param *config = &nic->config;

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	for (i = 0; i < config->tx_fifo_num; i++) {
		struct fifo_info *fifo = &mac_control->fifos[i];

		spin_lock_irqsave(&fifo->tx_lock, flags[i]);
	}
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	nic->vlgrp = grp;
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	for (i = config->tx_fifo_num - 1; i >= 0; i--) {
		struct fifo_info *fifo = &mac_control->fifos[i];

		spin_unlock_irqrestore(&fifo->tx_lock, flags[i]);
	}
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}

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/* Unregister the vlan */
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static void s2io_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
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{
	int i;
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	struct s2io_nic *nic = netdev_priv(dev);
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	unsigned long flags[MAX_TX_FIFOS];
	struct mac_info *mac_control = &nic->mac_control;
	struct config_param *config = &nic->config;

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	for (i = 0; i < config->tx_fifo_num; i++) {
		struct fifo_info *fifo = &mac_control->fifos[i];

		spin_lock_irqsave(&fifo->tx_lock, flags[i]);
	}
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	if (nic->vlgrp)
		vlan_group_set_device(nic->vlgrp, vid, NULL);

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	for (i = config->tx_fifo_num - 1; i >= 0; i--) {
		struct fifo_info *fifo = &mac_control->fifos[i];

		spin_unlock_irqrestore(&fifo->tx_lock, flags[i]);
	}
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}

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/*
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 * Constants to be programmed into the Xena's registers, to configure
 * the XAUI.
 */

#define	END_SIGN	0x0
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static const u64 herc_act_dtx_cfg[] = {
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	/* Set address */
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	0x8000051536750000ULL, 0x80000515367500E0ULL,
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	/* Write data */
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	0x8000051536750004ULL, 0x80000515367500E4ULL,
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	/* Set address */
	0x80010515003F0000ULL, 0x80010515003F00E0ULL,
	/* Write data */
	0x80010515003F0004ULL, 0x80010515003F00E4ULL,
	/* Set address */
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	0x801205150D440000ULL, 0x801205150D4400E0ULL,
	/* Write data */
	0x801205150D440004ULL, 0x801205150D4400E4ULL,
	/* Set address */
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	0x80020515F2100000ULL, 0x80020515F21000E0ULL,
	/* Write data */
	0x80020515F2100004ULL, 0x80020515F21000E4ULL,
	/* Done */
	END_SIGN
};

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static const u64 xena_dtx_cfg[] = {
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	/* Set address */
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	0x8000051500000000ULL, 0x80000515000000E0ULL,
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	/* Write data */
	0x80000515D9350004ULL, 0x80000515D93500E4ULL,
	/* Set address */
	0x8001051500000000ULL, 0x80010515000000E0ULL,
	/* Write data */
	0x80010515001E0004ULL, 0x80010515001E00E4ULL,
	/* Set address */
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	0x8002051500000000ULL, 0x80020515000000E0ULL,
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	/* Write data */
	0x80020515F2100004ULL, 0x80020515F21000E4ULL,
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	END_SIGN
};

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/*
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 * Constants for Fixing the MacAddress problem seen mostly on
 * Alpha machines.
 */
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static const u64 fix_mac[] = {
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	0x0060000000000000ULL, 0x0060600000000000ULL,
	0x0040600000000000ULL, 0x0000600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0000600000000000ULL,
	0x0040600000000000ULL, 0x0060600000000000ULL,
	END_SIGN
};

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MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);


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/* Module Loadable parameters. */
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S2IO_PARM_INT(tx_fifo_num, FIFO_DEFAULT_NUM);
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S2IO_PARM_INT(rx_ring_num, 1);
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S2IO_PARM_INT(multiq, 0);
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S2IO_PARM_INT(rx_ring_mode, 1);
S2IO_PARM_INT(use_continuous_tx_intrs, 1);
S2IO_PARM_INT(rmac_pause_time, 0x100);
S2IO_PARM_INT(mc_pause_threshold_q0q3, 187);
S2IO_PARM_INT(mc_pause_threshold_q4q7, 187);
S2IO_PARM_INT(shared_splits, 0);
S2IO_PARM_INT(tmac_util_period, 5);
S2IO_PARM_INT(rmac_util_period, 5);
S2IO_PARM_INT(l3l4hdr_size, 128);
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/* 0 is no steering, 1 is Priority steering, 2 is Default steering */
S2IO_PARM_INT(tx_steering_type, TX_DEFAULT_STEERING);
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/* Frequency of Rx desc syncs expressed as power of 2 */
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S2IO_PARM_INT(rxsync_frequency, 3);
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/* Interrupt type. Values can be 0(INTA), 2(MSI_X) */
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S2IO_PARM_INT(intr_type, 2);
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/* Large receive offload feature */
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static unsigned int lro_enable;
module_param_named(lro, lro_enable, uint, 0);

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/* Max pkts to be aggregated by LRO at one time. If not specified,
 * aggregation happens until we hit max IP pkt size(64K)
 */
502 503
S2IO_PARM_INT(lro_max_pkts, 0xFFFF);
S2IO_PARM_INT(indicate_max_pkts, 0);
504 505 506

S2IO_PARM_INT(napi, 1);
S2IO_PARM_INT(ufo, 0);
507
S2IO_PARM_INT(vlan_tag_strip, NO_STRIP_IN_PROMISC);
508 509 510 511 512 513 514 515 516 517 518

static unsigned int tx_fifo_len[MAX_TX_FIFOS] =
    {DEFAULT_FIFO_0_LEN, [1 ...(MAX_TX_FIFOS - 1)] = DEFAULT_FIFO_1_7_LEN};
static unsigned int rx_ring_sz[MAX_RX_RINGS] =
    {[0 ...(MAX_RX_RINGS - 1)] = SMALL_BLK_CNT};
static unsigned int rts_frm_len[MAX_RX_RINGS] =
    {[0 ...(MAX_RX_RINGS - 1)] = 0 };

module_param_array(tx_fifo_len, uint, NULL, 0);
module_param_array(rx_ring_sz, uint, NULL, 0);
module_param_array(rts_frm_len, uint, NULL, 0);
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/*
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 * S2IO device table.
522
 * This table lists all the devices that this driver supports.
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 */
static struct pci_device_id s2io_tbl[] __devinitdata = {
	{PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_WIN,
	 PCI_ANY_ID, PCI_ANY_ID},
	{PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_UNI,
	 PCI_ANY_ID, PCI_ANY_ID},
	{PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_WIN,
530 531 532
         PCI_ANY_ID, PCI_ANY_ID},
        {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_UNI,
         PCI_ANY_ID, PCI_ANY_ID},
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	{0,}
};

MODULE_DEVICE_TABLE(pci, s2io_tbl);

538 539 540 541 542 543
static struct pci_error_handlers s2io_err_handler = {
	.error_detected = s2io_io_error_detected,
	.slot_reset = s2io_io_slot_reset,
	.resume = s2io_io_resume,
};

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static struct pci_driver s2io_driver = {
      .name = "S2IO",
      .id_table = s2io_tbl,
      .probe = s2io_init_nic,
      .remove = __devexit_p(s2io_rem_nic),
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      .err_handler = &s2io_err_handler,
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};

/* A simplifier macro used both by init and free shared_mem Fns(). */
#define TXD_MEM_PAGE_CNT(len, per_each) ((len+per_each - 1) / per_each)

555 556 557
/* netqueue manipulation helper functions */
static inline void s2io_stop_all_tx_queue(struct s2io_nic *sp)
{
558 559 560
	if (!sp->config.multiq) {
		int i;

561 562 563
		for (i = 0; i < sp->config.tx_fifo_num; i++)
			sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_STOP;
	}
564
	netif_tx_stop_all_queues(sp->dev);
565 566 567 568
}

static inline void s2io_stop_tx_queue(struct s2io_nic *sp, int fifo_no)
{
569
	if (!sp->config.multiq)
570 571
		sp->mac_control.fifos[fifo_no].queue_state =
			FIFO_QUEUE_STOP;
572 573

	netif_tx_stop_all_queues(sp->dev);
574 575 576 577
}

static inline void s2io_start_all_tx_queue(struct s2io_nic *sp)
{
578 579 580
	if (!sp->config.multiq) {
		int i;

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		for (i = 0; i < sp->config.tx_fifo_num; i++)
			sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_START;
	}
584
	netif_tx_start_all_queues(sp->dev);
585 586 587 588
}

static inline void s2io_start_tx_queue(struct s2io_nic *sp, int fifo_no)
{
589
	if (!sp->config.multiq)
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		sp->mac_control.fifos[fifo_no].queue_state =
			FIFO_QUEUE_START;
592 593

	netif_tx_start_all_queues(sp->dev);
594 595 596 597
}

static inline void s2io_wake_all_tx_queue(struct s2io_nic *sp)
{
598 599 600
	if (!sp->config.multiq) {
		int i;

601 602 603
		for (i = 0; i < sp->config.tx_fifo_num; i++)
			sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_START;
	}
604
	netif_tx_wake_all_queues(sp->dev);
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}

static inline void s2io_wake_tx_queue(
	struct fifo_info *fifo, int cnt, u8 multiq)
{

	if (multiq) {
		if (cnt && __netif_subqueue_stopped(fifo->dev, fifo->fifo_no))
			netif_wake_subqueue(fifo->dev, fifo->fifo_no);
614
	} else if (cnt && (fifo->queue_state == FIFO_QUEUE_STOP)) {
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		if (netif_queue_stopped(fifo->dev)) {
			fifo->queue_state = FIFO_QUEUE_START;
			netif_wake_queue(fifo->dev);
		}
	}
}

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/**
 * init_shared_mem - Allocation and Initialization of Memory
 * @nic: Device private variable.
625 626
 * Description: The function allocates all the memory areas shared
 * between the NIC and the driver. This includes Tx descriptors,
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 * Rx descriptors and the statistics block.
 */

static int init_shared_mem(struct s2io_nic *nic)
{
	u32 size;
	void *tmp_v_addr, *tmp_v_addr_next;
	dma_addr_t tmp_p_addr, tmp_p_addr_next;
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	struct RxD_block *pre_rxd_blk = NULL;
636
	int i, j, blk_cnt;
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	int lst_size, lst_per_page;
	struct net_device *dev = nic->dev;
639
	unsigned long tmp;
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	struct buffAdd *ba;
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	struct mac_info *mac_control;
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	struct config_param *config;
644
	unsigned long long mem_allocated = 0;
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	mac_control = &nic->mac_control;
	config = &nic->config;

649
	/* Allocation and initialization of TXDLs in FIFOs */
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	size = 0;
	for (i = 0; i < config->tx_fifo_num; i++) {
652 653 654
		struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];

		size += tx_cfg->fifo_len;
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	}
	if (size > MAX_AVAILABLE_TXDS) {
657
		DBG_PRINT(ERR_DBG, "s2io: Requested TxDs too high, ");
658
		DBG_PRINT(ERR_DBG, "Requested: %d, max supported: 8192\n", size);
659
		return -EINVAL;
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	}

662 663
	size = 0;
	for (i = 0; i < config->tx_fifo_num; i++) {
664 665 666
		struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];

		size = tx_cfg->fifo_len;
667 668 669 670 671 672 673 674 675 676 677 678
		/*
		 * Legal values are from 2 to 8192
		 */
		if (size < 2) {
			DBG_PRINT(ERR_DBG, "s2io: Invalid fifo len (%d)", size);
			DBG_PRINT(ERR_DBG, "for fifo %d\n", i);
			DBG_PRINT(ERR_DBG, "s2io: Legal values for fifo len"
				"are 2 to 8192\n");
			return -EINVAL;
		}
	}

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	lst_size = (sizeof(struct TxD) * config->max_txds);
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	lst_per_page = PAGE_SIZE / lst_size;

	for (i = 0; i < config->tx_fifo_num; i++) {
683 684 685
		struct fifo_info *fifo = &mac_control->fifos[i];
		struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
		int fifo_len = tx_cfg->fifo_len;
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		int list_holder_size = fifo_len * sizeof(struct list_info_hold);
687 688 689

		fifo->list_info = kzalloc(list_holder_size, GFP_KERNEL);
		if (!fifo->list_info) {
690
			DBG_PRINT(INFO_DBG,
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				  "Malloc failed for list_info\n");
			return -ENOMEM;
		}
694
		mem_allocated += list_holder_size;
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	}
	for (i = 0; i < config->tx_fifo_num; i++) {
		int page_num = TXD_MEM_PAGE_CNT(config->tx_cfg[i].fifo_len,
						lst_per_page);
699 700 701 702 703 704 705 706 707 708 709
		struct fifo_info *fifo = &mac_control->fifos[i];
		struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];

		fifo->tx_curr_put_info.offset = 0;
		fifo->tx_curr_put_info.fifo_len = tx_cfg->fifo_len - 1;
		fifo->tx_curr_get_info.offset = 0;
		fifo->tx_curr_get_info.fifo_len = tx_cfg->fifo_len - 1;
		fifo->fifo_no = i;
		fifo->nic = nic;
		fifo->max_txds = MAX_SKB_FRAGS + 2;
		fifo->dev = dev;
710

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		for (j = 0; j < page_num; j++) {
			int k = 0;
			dma_addr_t tmp_p;
			void *tmp_v;
			tmp_v = pci_alloc_consistent(nic->pdev,
						     PAGE_SIZE, &tmp_p);
			if (!tmp_v) {
718
				DBG_PRINT(INFO_DBG,
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					  "pci_alloc_consistent ");
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				DBG_PRINT(INFO_DBG, "failed for TxDL\n");
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				return -ENOMEM;
			}
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			/* If we got a zero DMA address(can happen on
			 * certain platforms like PPC), reallocate.
			 * Store virtual address of page we don't want,
			 * to be freed later.
			 */
			if (!tmp_p) {
				mac_control->zerodma_virt_addr = tmp_v;
730
				DBG_PRINT(INIT_DBG,
731
				"%s: Zero DMA address for TxDL. ", dev->name);
732
				DBG_PRINT(INIT_DBG,
733
				"Virtual address %p\n", tmp_v);
734 735 736
				tmp_v = pci_alloc_consistent(nic->pdev,
						     PAGE_SIZE, &tmp_p);
				if (!tmp_v) {
737
					DBG_PRINT(INFO_DBG,
738
					  "pci_alloc_consistent ");
739
					DBG_PRINT(INFO_DBG, "failed for TxDL\n");
740 741
					return -ENOMEM;
				}
742
				mem_allocated += PAGE_SIZE;
743
			}
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			while (k < lst_per_page) {
				int l = (j * lst_per_page) + k;
746
				if (l == tx_cfg->fifo_len)
747
					break;
748
				fifo->list_info[l].list_virt_addr =
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				    tmp_v + (k * lst_size);
750
				fifo->list_info[l].list_phy_addr =
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				    tmp_p + (k * lst_size);
				k++;
			}
		}
	}

757
	for (i = 0; i < config->tx_fifo_num; i++) {
758 759 760 761 762 763
		struct fifo_info *fifo = &mac_control->fifos[i];
		struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];

		size = tx_cfg->fifo_len;
		fifo->ufo_in_band_v = kcalloc(size, sizeof(u64), GFP_KERNEL);
		if (!fifo->ufo_in_band_v)
764 765 766
			return -ENOMEM;
		mem_allocated += (size * sizeof(u64));
	}
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	/* Allocation and initialization of RXDs in Rings */
	size = 0;
	for (i = 0; i < config->rx_ring_num; i++) {
771 772 773 774
		struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
		struct ring_info *ring = &mac_control->rings[i];

		if (rx_cfg->num_rxd % (rxd_count[nic->rxd_mode] + 1)) {
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			DBG_PRINT(ERR_DBG, "%s: RxD count of ", dev->name);
776
			DBG_PRINT(ERR_DBG, "Ring%d is not a multiple of ", i);
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			DBG_PRINT(ERR_DBG, "RxDs per Block");
			return FAILURE;
		}
780 781
		size += rx_cfg->num_rxd;
		ring->block_count = rx_cfg->num_rxd /
782
			(rxd_count[nic->rxd_mode] + 1 );
783
		ring->pkt_cnt = rx_cfg->num_rxd - ring->block_count;
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	}
785
	if (nic->rxd_mode == RXD_MODE_1)
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		size = (size * (sizeof(struct RxD1)));
787
	else
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		size = (size * (sizeof(struct RxD3)));
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	for (i = 0; i < config->rx_ring_num; i++) {
791 792 793 794 795 796 797 798 799 800 801 802 803 804
		struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
		struct ring_info *ring = &mac_control->rings[i];

		ring->rx_curr_get_info.block_index = 0;
		ring->rx_curr_get_info.offset = 0;
		ring->rx_curr_get_info.ring_len = rx_cfg->num_rxd - 1;
		ring->rx_curr_put_info.block_index = 0;
		ring->rx_curr_put_info.offset = 0;
		ring->rx_curr_put_info.ring_len = rx_cfg->num_rxd - 1;
		ring->nic = nic;
		ring->ring_no = i;
		ring->lro = lro_enable;

		blk_cnt = rx_cfg->num_rxd / (rxd_count[nic->rxd_mode] + 1);
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		/*  Allocating all the Rx blocks */
		for (j = 0; j < blk_cnt; j++) {
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			struct rx_block_info *rx_blocks;
808 809
			int l;

810
			rx_blocks = &ring->rx_blocks[j];
811
			size = SIZE_OF_BLOCK; //size is always page size
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			tmp_v_addr = pci_alloc_consistent(nic->pdev, size,
							  &tmp_p_addr);
			if (tmp_v_addr == NULL) {
				/*
816 817 818
				 * In case of failure, free_shared_mem()
				 * is called, which should free any
				 * memory that was alloced till the
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				 * failure happened.
				 */
821
				rx_blocks->block_virt_addr = tmp_v_addr;
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				return -ENOMEM;
			}
824
			mem_allocated += size;
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			memset(tmp_v_addr, 0, size);
826 827
			rx_blocks->block_virt_addr = tmp_v_addr;
			rx_blocks->block_dma_addr = tmp_p_addr;
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			rx_blocks->rxds = kmalloc(sizeof(struct rxd_info)*
829 830
						  rxd_count[nic->rxd_mode],
						  GFP_KERNEL);
831 832
			if (!rx_blocks->rxds)
				return -ENOMEM;
833
			mem_allocated +=
834
			(sizeof(struct rxd_info)* rxd_count[nic->rxd_mode]);
835 836 837 838 839 840 841 842
			for (l=0; l<rxd_count[nic->rxd_mode];l++) {
				rx_blocks->rxds[l].virt_addr =
					rx_blocks->block_virt_addr +
					(rxd_size[nic->rxd_mode] * l);
				rx_blocks->rxds[l].dma_addr =
					rx_blocks->block_dma_addr +
					(rxd_size[nic->rxd_mode] * l);
			}
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		}
		/* Interlinking all Rx Blocks */
		for (j = 0; j < blk_cnt; j++) {
846 847 848 849 850
			int next = (j + 1) % blk_cnt;
			tmp_v_addr = ring->rx_blocks[j].block_virt_addr;
			tmp_v_addr_next = ring->rx_blocks[next].block_virt_addr;
			tmp_p_addr = ring->rx_blocks[j].block_dma_addr;
			tmp_p_addr_next = ring->rx_blocks[next].block_dma_addr;
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			pre_rxd_blk = (struct RxD_block *) tmp_v_addr;
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			pre_rxd_blk->reserved_2_pNext_RxD_block =
			    (unsigned long) tmp_v_addr_next;
			pre_rxd_blk->pNext_RxD_Blk_physical =
			    (u64) tmp_p_addr_next;
		}
	}
859
	if (nic->rxd_mode == RXD_MODE_3B) {
860 861 862 863 864
		/*
		 * Allocation of Storages for buffer addresses in 2BUFF mode
		 * and the buffers as well.
		 */
		for (i = 0; i < config->rx_ring_num; i++) {
865 866 867 868 869 870 871 872
			struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
			struct ring_info *ring = &mac_control->rings[i];

			blk_cnt = rx_cfg->num_rxd /
				(rxd_count[nic->rxd_mode]+ 1);
			ring->ba = kmalloc((sizeof(struct buffAdd *) * blk_cnt),
					   GFP_KERNEL);
			if (!ring->ba)
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				return -ENOMEM;
874
			mem_allocated +=(sizeof(struct buffAdd *) * blk_cnt);
875 876
			for (j = 0; j < blk_cnt; j++) {
				int k = 0;
877
				ring->ba[j] =
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					kmalloc((sizeof(struct buffAdd) *
879 880
						(rxd_count[nic->rxd_mode] + 1)),
						GFP_KERNEL);
881
				if (!ring->ba[j])
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					return -ENOMEM;
883 884
				mem_allocated += (sizeof(struct buffAdd) *  \
					(rxd_count[nic->rxd_mode] + 1));
885
				while (k != rxd_count[nic->rxd_mode]) {
886
					ba = &ring->ba[j][k];
887 888 889 890 891

					ba->ba_0_org = (void *) kmalloc
					    (BUF0_LEN + ALIGN_SIZE, GFP_KERNEL);
					if (!ba->ba_0_org)
						return -ENOMEM;
892
					mem_allocated +=
893
						(BUF0_LEN + ALIGN_SIZE);
894 895 896 897 898 899 900 901 902
					tmp = (unsigned long)ba->ba_0_org;
					tmp += ALIGN_SIZE;
					tmp &= ~((unsigned long) ALIGN_SIZE);
					ba->ba_0 = (void *) tmp;

					ba->ba_1_org = (void *) kmalloc
					    (BUF1_LEN + ALIGN_SIZE, GFP_KERNEL);
					if (!ba->ba_1_org)
						return -ENOMEM;
903
					mem_allocated
904
						+= (BUF1_LEN + ALIGN_SIZE);
905 906 907 908 909 910
					tmp = (unsigned long) ba->ba_1_org;
					tmp += ALIGN_SIZE;
					tmp &= ~((unsigned long) ALIGN_SIZE);
					ba->ba_1 = (void *) tmp;
					k++;
				}
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			}
		}
	}

	/* Allocation and initialization of Statistics block */
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	size = sizeof(struct stat_block);
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	mac_control->stats_mem = pci_alloc_consistent
	    (nic->pdev, size, &mac_control->stats_mem_phy);

	if (!mac_control->stats_mem) {
921 922 923
		/*
		 * In case of failure, free_shared_mem() is called, which
		 * should free any memory that was alloced till the
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		 * failure happened.
		 */
		return -ENOMEM;
	}
928
	mem_allocated += size;
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	mac_control->stats_mem_sz = size;

	tmp_v_addr = mac_control->stats_mem;
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	mac_control->stats_info = (struct stat_block *) tmp_v_addr;
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	memset(tmp_v_addr, 0, size);
	DBG_PRINT(INIT_DBG, "%s:Ring Mem PHY: 0x%llx\n", dev->name,
		  (unsigned long long) tmp_p_addr);
936
	mac_control->stats_info->sw_stat.mem_allocated += mem_allocated;
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	return SUCCESS;
}

940 941
/**
 * free_shared_mem - Free the allocated Memory
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 * @nic:  Device private variable.
 * Description: This function is to free all memory locations allocated by
 * the init_shared_mem() function and return it to the kernel.
 */

static void free_shared_mem(struct s2io_nic *nic)
{
	int i, j, blk_cnt, size;
	void *tmp_v_addr;
	dma_addr_t tmp_p_addr;
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	struct mac_info *mac_control;
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	struct config_param *config;
	int lst_size, lst_per_page;
955
	struct net_device *dev;
956
	int page_num = 0;
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	if (!nic)
		return;

961 962
	dev = nic->dev;

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	mac_control = &nic->mac_control;
	config = &nic->config;

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	lst_size = (sizeof(struct TxD) * config->max_txds);
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	lst_per_page = PAGE_SIZE / lst_size;

	for (i = 0; i < config->tx_fifo_num; i++) {
970 971 972 973
		struct fifo_info *fifo = &mac_control->fifos[i];
		struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];

		page_num = TXD_MEM_PAGE_CNT(tx_cfg->fifo_len, lst_per_page);
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		for (j = 0; j < page_num; j++) {
			int mem_blks = (j * lst_per_page);
976 977 978
			struct list_info_hold *fli;

			if (!fifo->list_info)
979
				return;
980 981 982

			fli = &fifo->list_info[mem_blks];
			if (!fli->list_virt_addr)
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				break;
			pci_free_consistent(nic->pdev, PAGE_SIZE,
985 986
					    fli->list_virt_addr,
					    fli->list_phy_addr);
987
			nic->mac_control.stats_info->sw_stat.mem_freed
988
						+= PAGE_SIZE;
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		}
990 991 992 993 994 995 996
		/* If we got a zero DMA address during allocation,
		 * free the page now
		 */
		if (mac_control->zerodma_virt_addr) {
			pci_free_consistent(nic->pdev, PAGE_SIZE,
					    mac_control->zerodma_virt_addr,
					    (dma_addr_t)0);
997
			DBG_PRINT(INIT_DBG,
998 999 1000 1001
			  	"%s: Freeing TxDL with zero DMA addr. ",
				dev->name);
			DBG_PRINT(INIT_DBG, "Virtual address %p\n",
				mac_control->zerodma_virt_addr);
1002
			nic->mac_control.stats_info->sw_stat.mem_freed
1003
						+= PAGE_SIZE;
1004
		}
1005
		kfree(fifo->list_info);
1006
		nic->mac_control.stats_info->sw_stat.mem_freed +=
1007
		(nic->config.tx_cfg[i].fifo_len *sizeof(struct list_info_hold));
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	}

	size = SIZE_OF_BLOCK;
	for (i = 0; i < config->rx_ring_num; i++) {
1012 1013 1014
		struct ring_info *ring = &mac_control->rings[i];

		blk_cnt = ring->block_count;
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		for (j = 0; j < blk_cnt; j++) {
1016 1017
			tmp_v_addr = ring->rx_blocks[j].block_virt_addr;
			tmp_p_addr = ring->rx_blocks[j].block_dma_addr;
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			if (tmp_v_addr == NULL)
				break;
			pci_free_consistent(nic->pdev, size,
					    tmp_v_addr, tmp_p_addr);
1022
			nic->mac_control.stats_info->sw_stat.mem_freed += size;
1023
			kfree(ring->rx_blocks[j].rxds);
1024
			nic->mac_control.stats_info->sw_stat.mem_freed +=
1025
			( sizeof(struct rxd_info)* rxd_count[nic->rxd_mode]);
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		}
	}

1029
	if (nic->rxd_mode == RXD_MODE_3B) {
1030 1031
		/* Freeing buffer storage addresses in 2BUFF mode. */
		for (i = 0; i < config->rx_ring_num; i++) {
1032 1033 1034 1035 1036
			struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
			struct ring_info *ring = &mac_control->rings[i];

			blk_cnt = rx_cfg->num_rxd /
				(rxd_count[nic->rxd_mode] + 1);
1037 1038
			for (j = 0; j < blk_cnt; j++) {
				int k = 0;
1039
				if (!ring->ba[j])
1040 1041
					continue;
				while (k != rxd_count[nic->rxd_mode]) {
1042
					struct buffAdd *ba = &ring->ba[j][k];
1043
					kfree(ba->ba_0_org);
1044 1045
					nic->mac_control.stats_info->sw_stat.\
					mem_freed += (BUF0_LEN + ALIGN_SIZE);
1046
					kfree(ba->ba_1_org);
1047 1048
					nic->mac_control.stats_info->sw_stat.\
					mem_freed += (BUF1_LEN + ALIGN_SIZE);
1049 1050
					k++;
				}
1051
				kfree(ring->ba[j]);
1052 1053 1054
				nic->mac_control.stats_info->sw_stat.mem_freed +=
					(sizeof(struct buffAdd) *
					(rxd_count[nic->rxd_mode] + 1));
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			}
1056
			kfree(ring->ba);
1057
			nic->mac_control.stats_info->sw_stat.mem_freed +=
1058
			(sizeof(struct buffAdd *) * blk_cnt);
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		}
	}

1062
	for (i = 0; i < nic->config.tx_fifo_num; i++) {
1063 1064 1065 1066
		struct fifo_info *fifo = &mac_control->fifos[i];
		struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];

		if (fifo->ufo_in_band_v) {
1067
			nic->mac_control.stats_info->sw_stat.mem_freed
1068 1069
				+= (tx_cfg->fifo_len * sizeof(u64));
			kfree(fifo->ufo_in_band_v);
1070 1071 1072
		}
	}

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	if (mac_control->stats_mem) {
1074 1075
		nic->mac_control.stats_info->sw_stat.mem_freed +=
			mac_control->stats_mem_sz;
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		pci_free_consistent(nic->pdev,
				    mac_control->stats_mem_sz,
				    mac_control->stats_mem,
				    mac_control->stats_mem_phy);
1080
	}
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}

1083 1084 1085 1086
/**
 * s2io_verify_pci_mode -
 */

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static int s2io_verify_pci_mode(struct s2io_nic *nic)
1088
{
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	struct XENA_dev_config __iomem *bar0 = nic->bar0;
1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100
	register u64 val64 = 0;
	int     mode;

	val64 = readq(&bar0->pci_mode);
	mode = (u8)GET_PCI_MODE(val64);

	if ( val64 & PCI_MODE_UNKNOWN_MODE)
		return -1;      /* Unknown PCI mode */
	return mode;
}

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#define NEC_VENID   0x1033
#define NEC_DEVID   0x0125
static int s2io_on_nec_bridge(struct pci_dev *s2io_pdev)
{
	struct pci_dev *tdev = NULL;
1106 1107
	while ((tdev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, tdev)) != NULL) {
		if (tdev->vendor == NEC_VENID && tdev->device == NEC_DEVID) {
1108
			if (tdev->bus == s2io_pdev->bus->parent) {
1109
				pci_dev_put(tdev);
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				return 1;
1111
			}
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		}
	}
	return 0;
}
1116

1117
static int bus_speed[8] = {33, 133, 133, 200, 266, 133, 200, 266};
1118 1119 1120
/**
 * s2io_print_pci_mode -
 */
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static int s2io_print_pci_mode(struct s2io_nic *nic)
1122
{
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	struct XENA_dev_config __iomem *bar0 = nic->bar0;
1124 1125 1126 1127 1128 1129 1130 1131 1132 1133
	register u64 val64 = 0;
	int	mode;
	struct config_param *config = &nic->config;

	val64 = readq(&bar0->pci_mode);
	mode = (u8)GET_PCI_MODE(val64);

	if ( val64 & PCI_MODE_UNKNOWN_MODE)
		return -1;	/* Unknown PCI mode */

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	config->bus_speed = bus_speed[mode];

	if (s2io_on_nec_bridge(nic->pdev)) {
		DBG_PRINT(ERR_DBG, "%s: Device is on PCI-E bus\n",
							nic->dev->name);
		return mode;
	}

1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179
	if (val64 & PCI_MODE_32_BITS) {
		DBG_PRINT(ERR_DBG, "%s: Device is on 32 bit ", nic->dev->name);
	} else {
		DBG_PRINT(ERR_DBG, "%s: Device is on 64 bit ", nic->dev->name);
	}

	switch(mode) {
		case PCI_MODE_PCI_33:
			DBG_PRINT(ERR_DBG, "33MHz PCI bus\n");
			break;
		case PCI_MODE_PCI_66:
			DBG_PRINT(ERR_DBG, "66MHz PCI bus\n");
			break;
		case PCI_MODE_PCIX_M1_66:
			DBG_PRINT(ERR_DBG, "66MHz PCIX(M1) bus\n");
			break;
		case PCI_MODE_PCIX_M1_100:
			DBG_PRINT(ERR_DBG, "100MHz PCIX(M1) bus\n");
			break;
		case PCI_MODE_PCIX_M1_133:
			DBG_PRINT(ERR_DBG, "133MHz PCIX(M1) bus\n");
			break;
		case PCI_MODE_PCIX_M2_66:
			DBG_PRINT(ERR_DBG, "133MHz PCIX(M2) bus\n");
			break;
		case PCI_MODE_PCIX_M2_100:
			DBG_PRINT(ERR_DBG, "200MHz PCIX(M2) bus\n");
			break;
		case PCI_MODE_PCIX_M2_133:
			DBG_PRINT(ERR_DBG, "266MHz PCIX(M2) bus\n");
			break;
		default:
			return -1;	/* Unsupported bus speed */
	}

	return mode;
}

1180 1181 1182 1183 1184 1185 1186 1187 1188 1189
/**
 *  init_tti - Initialization transmit traffic interrupt scheme
 *  @nic: device private variable
 *  @link: link status (UP/DOWN) used to enable/disable continuous
 *  transmit interrupts
 *  Description: The function configures transmit traffic interrupts
 *  Return Value:  SUCCESS on success and
 *  '-1' on failure
 */

1190
static int init_tti(struct s2io_nic *nic, int link)
1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214
{
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
	register u64 val64 = 0;
	int i;
	struct config_param *config;

	config = &nic->config;

	for (i = 0; i < config->tx_fifo_num; i++) {
		/*
		 * TTI Initialization. Default Tx timer gets us about
		 * 250 interrupts per sec. Continuous interrupts are enabled
		 * by default.
		 */
		if (nic->device_type == XFRAME_II_DEVICE) {
			int count = (nic->config.bus_speed * 125)/2;
			val64 = TTI_DATA1_MEM_TX_TIMER_VAL(count);
		} else
			val64 = TTI_DATA1_MEM_TX_TIMER_VAL(0x2078);

		val64 |= TTI_DATA1_MEM_TX_URNG_A(0xA) |
				TTI_DATA1_MEM_TX_URNG_B(0x10) |
				TTI_DATA1_MEM_TX_URNG_C(0x30) |
				TTI_DATA1_MEM_TX_TIMER_AC_EN;
1215 1216 1217
		if (i == 0)
			if (use_continuous_tx_intrs && (link == LINK_UP))
				val64 |= TTI_DATA1_MEM_TX_TIMER_CI_EN;
1218 1219
		writeq(val64, &bar0->tti_data1_mem);

1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241
		if (nic->config.intr_type == MSI_X) {
			val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
				TTI_DATA2_MEM_TX_UFC_B(0x100) |
				TTI_DATA2_MEM_TX_UFC_C(0x200) |
				TTI_DATA2_MEM_TX_UFC_D(0x300);
		} else {
			if ((nic->config.tx_steering_type ==
				TX_DEFAULT_STEERING) &&
				(config->tx_fifo_num > 1) &&
				(i >= nic->udp_fifo_idx) &&
				(i < (nic->udp_fifo_idx +
				nic->total_udp_fifos)))
				val64 = TTI_DATA2_MEM_TX_UFC_A(0x50) |
					TTI_DATA2_MEM_TX_UFC_B(0x80) |
					TTI_DATA2_MEM_TX_UFC_C(0x100) |
					TTI_DATA2_MEM_TX_UFC_D(0x120);
			else
				val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
					TTI_DATA2_MEM_TX_UFC_B(0x20) |
					TTI_DATA2_MEM_TX_UFC_C(0x40) |
					TTI_DATA2_MEM_TX_UFC_D(0x80);
		}
1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256

		writeq(val64, &bar0->tti_data2_mem);

		val64 = TTI_CMD_MEM_WE | TTI_CMD_MEM_STROBE_NEW_CMD |
				TTI_CMD_MEM_OFFSET(i);
		writeq(val64, &bar0->tti_command_mem);

		if (wait_for_cmd_complete(&bar0->tti_command_mem,
			TTI_CMD_MEM_STROBE_NEW_CMD, S2IO_BIT_RESET) != SUCCESS)
			return FAILURE;
	}

	return SUCCESS;
}

1257 1258
/**
 *  init_nic - Initialization of hardware
1259
 *  @nic: device private variable
1260 1261 1262
 *  Description: The function sequentially configures every block
 *  of the H/W from their reset values.
 *  Return Value:  SUCCESS on success and
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 *  '-1' on failure (endian settings incorrect).
 */

static int init_nic(struct s2io_nic *nic)
{
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	struct XENA_dev_config __iomem *bar0 = nic->bar0;
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	struct net_device *dev = nic->dev;
	register u64 val64 = 0;
	void __iomem *add;
	u32 time;
	int i, j;
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	struct mac_info *mac_control;
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	struct config_param *config;
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	int dtx_cnt = 0;
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	unsigned long long mem_share;
1278
	int mem_size;
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	mac_control = &nic->mac_control;
	config = &nic->config;

1283
	/* to set the swapper controle on the card */
1284
	if(s2io_set_swapper(nic)) {
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		DBG_PRINT(ERR_DBG,"ERROR: Setting Swapper failed\n");
1286
		return -EIO;
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	}

1289 1290 1291 1292 1293 1294 1295 1296 1297 1298
	/*
	 * Herc requires EOI to be removed from reset before XGXS, so..
	 */
	if (nic->device_type & XFRAME_II_DEVICE) {
		val64 = 0xA500000000ULL;
		writeq(val64, &bar0->sw_reset);
		msleep(500);
		val64 = readq(&bar0->sw_reset);
	}

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	/* Remove XGXS from reset state */
	val64 = 0;
	writeq(val64, &bar0->sw_reset);
	msleep(500);
1303
	val64 = readq(&bar0->sw_reset);
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1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318
	/* Ensure that it's safe to access registers by checking
	 * RIC_RUNNING bit is reset. Check is valid only for XframeII.
	 */
	if (nic->device_type == XFRAME_II_DEVICE) {
		for (i = 0; i < 50; i++) {
			val64 = readq(&bar0->adapter_status);
			if (!(val64 & ADAPTER_STATUS_RIC_RUNNING))
				break;
			msleep(10);
		}
		if (i == 50)
			return -ENODEV;
	}

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	/*  Enable Receiving broadcasts */
	add = &bar0->mac_cfg;
	val64 = readq(&bar0->mac_cfg);
	val64 |= MAC_RMAC_BCAST_ENABLE;
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) val64, add);
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) (val64 >> 32), (add + 4));

	/* Read registers in all blocks */
	val64 = readq(&bar0->mac_int_mask);
	val64 = readq(&bar0->mc_int_mask);
	val64 = readq(&bar0->xgxs_int_mask);

	/*  Set MTU */
	val64 = dev->mtu;
	writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);

1337 1338
	if (nic->device_type & XFRAME_II_DEVICE) {
		while (herc_act_dtx_cfg[dtx_cnt] != END_SIGN) {
1339
			SPECIAL_REG_WRITE(herc_act_dtx_cfg[dtx_cnt],
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					  &bar0->dtx_control, UF);
1341 1342
			if (dtx_cnt & 0x1)
				msleep(1); /* Necessary!! */
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			dtx_cnt++;
		}
1345
	} else {
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		while (xena_dtx_cfg[dtx_cnt] != END_SIGN) {
			SPECIAL_REG_WRITE(xena_dtx_cfg[dtx_cnt],
					  &bar0->dtx_control, UF);
			val64 = readq(&bar0->dtx_control);
			dtx_cnt++;
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		}
	}

	/*  Tx DMA Initialization */
	val64 = 0;
	writeq(val64, &bar0->tx_fifo_partition_0);
	writeq(val64, &bar0->tx_fifo_partition_1);
	writeq(val64, &bar0->tx_fifo_partition_2);
	writeq(val64, &bar0->tx_fifo_partition_3);


	for (i = 0, j = 0; i < config->tx_fifo_num; i++) {
1363 1364 1365 1366
		struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];

		val64 |= vBIT(tx_cfg->fifo_len - 1, ((j * 32) + 19), 13) |
			vBIT(tx_cfg->fifo_priority, ((j * 32) + 5), 3);
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		if (i == (config->tx_fifo_num - 1)) {
			if (i % 2 == 0)
				i++;
		}

		switch (i) {
		case 1:
			writeq(val64, &bar0->tx_fifo_partition_0);
			val64 = 0;
1377
			j = 0;
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			break;
		case 3:
			writeq(val64, &bar0->tx_fifo_partition_1);
			val64 = 0;
1382
			j = 0;
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			break;
		case 5:
			writeq(val64, &bar0->tx_fifo_partition_2);
			val64 = 0;
1387
			j = 0;
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			break;
		case 7:
			writeq(val64, &bar0->tx_fifo_partition_3);
1391 1392 1393 1394 1395
			val64 = 0;
			j = 0;
			break;
		default:
			j++;
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			break;
		}
	}

1400 1401 1402 1403
	/*
	 * Disable 4 PCCs for Xena1, 2 and 3 as per H/W bug
	 * SXE-008 TRANSMIT DMA ARBITRATION ISSUE.
	 */
1404
	if ((nic->device_type == XFRAME_I_DEVICE) &&
1405
		(nic->pdev->revision < 4))
1406 1407
		writeq(PCC_ENABLE_FOUR, &bar0->pcc_enable);

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	val64 = readq(&bar0->tx_fifo_partition_0);
	DBG_PRINT(INIT_DBG, "Fifo partition at: 0x%p is: 0x%llx\n",
		  &bar0->tx_fifo_partition_0, (unsigned long long) val64);

1412 1413
	/*
	 * Initialization of Tx_PA_CONFIG register to ignore packet
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	 * integrity checking.
	 */
	val64 = readq(&bar0->tx_pa_cfg);
	val64 |= TX_PA_CFG_IGNORE_FRM_ERR | TX_PA_CFG_IGNORE_SNAP_OUI |
	    TX_PA_CFG_IGNORE_LLC_CTRL | TX_PA_CFG_IGNORE_L2_ERR;
	writeq(val64, &bar0->tx_pa_cfg);

	/* Rx DMA intialization. */
	val64 = 0;
	for (i = 0; i < config->rx_ring_num; i++) {
1424 1425 1426
		struct rx_ring_config *rx_cfg = &config->rx_cfg[i];

		val64 |= vBIT(rx_cfg->ring_priority, (5 + (i * 8)), 3);
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	}
	writeq(val64, &bar0->rx_queue_priority);

1430 1431
	/*
	 * Allocating equal share of memory to all the
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1432 1433 1434
	 * configured Rings.
	 */
	val64 = 0;
1435 1436 1437 1438 1439
	if (nic->device_type & XFRAME_II_DEVICE)
		mem_size = 32;
	else
		mem_size = 64;

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	for (i = 0; i < config->rx_ring_num; i++) {
		switch (i) {
		case 0:
1443 1444
			mem_share = (mem_size / config->rx_ring_num +
				     mem_size % config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q0_SZ(mem_share);
			continue;
		case 1:
1448
			mem_share = (mem_size / config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q1_SZ(mem_share);
			continue;
		case 2:
1452
			mem_share = (mem_size / config->rx_ring_num);
L
Linus Torvalds 已提交
1453 1454 1455
			val64 |= RX_QUEUE_CFG_Q2_SZ(mem_share);
			continue;
		case 3:
1456
			mem_share = (mem_size / config->rx_ring_num);
L
Linus Torvalds 已提交
1457 1458 1459
			val64 |= RX_QUEUE_CFG_Q3_SZ(mem_share);
			continue;
		case 4:
1460
			mem_share = (mem_size / config->rx_ring_num);
L
Linus Torvalds 已提交
1461 1462 1463
			val64 |= RX_QUEUE_CFG_Q4_SZ(mem_share);
			continue;
		case 5:
1464
			mem_share = (mem_size / config->rx_ring_num);
L
Linus Torvalds 已提交
1465 1466 1467
			val64 |= RX_QUEUE_CFG_Q5_SZ(mem_share);
			continue;
		case 6:
1468
			mem_share = (mem_size / config->rx_ring_num);
L
Linus Torvalds 已提交
1469 1470 1471
			val64 |= RX_QUEUE_CFG_Q6_SZ(mem_share);
			continue;
		case 7:
1472
			mem_share = (mem_size / config->rx_ring_num);
L
Linus Torvalds 已提交
1473 1474 1475 1476 1477 1478
			val64 |= RX_QUEUE_CFG_Q7_SZ(mem_share);
			continue;
		}
	}
	writeq(val64, &bar0->rx_queue_cfg);

1479
	/*
1480
	 * Filling Tx round robin registers
1481
	 * as per the number of FIFOs for equal scheduling priority
L
Linus Torvalds 已提交
1482
	 */
1483 1484
	switch (config->tx_fifo_num) {
	case 1:
1485
		val64 = 0x0;
1486 1487 1488 1489 1490 1491 1492
		writeq(val64, &bar0->tx_w_round_robin_0);
		writeq(val64, &bar0->tx_w_round_robin_1);
		writeq(val64, &bar0->tx_w_round_robin_2);
		writeq(val64, &bar0->tx_w_round_robin_3);
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 2:
1493
		val64 = 0x0001000100010001ULL;
1494 1495 1496 1497
		writeq(val64, &bar0->tx_w_round_robin_0);
		writeq(val64, &bar0->tx_w_round_robin_1);
		writeq(val64, &bar0->tx_w_round_robin_2);
		writeq(val64, &bar0->tx_w_round_robin_3);
1498
		val64 = 0x0001000100000000ULL;
1499 1500 1501
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 3:
1502
		val64 = 0x0001020001020001ULL;
1503
		writeq(val64, &bar0->tx_w_round_robin_0);
1504
		val64 = 0x0200010200010200ULL;
1505
		writeq(val64, &bar0->tx_w_round_robin_1);
1506
		val64 = 0x0102000102000102ULL;
1507
		writeq(val64, &bar0->tx_w_round_robin_2);
1508
		val64 = 0x0001020001020001ULL;
1509
		writeq(val64, &bar0->tx_w_round_robin_3);
1510
		val64 = 0x0200010200000000ULL;
1511 1512 1513
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 4:
1514
		val64 = 0x0001020300010203ULL;
1515 1516 1517 1518
		writeq(val64, &bar0->tx_w_round_robin_0);
		writeq(val64, &bar0->tx_w_round_robin_1);
		writeq(val64, &bar0->tx_w_round_robin_2);
		writeq(val64, &bar0->tx_w_round_robin_3);
1519
		val64 = 0x0001020300000000ULL;
1520 1521 1522
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 5:
1523
		val64 = 0x0001020304000102ULL;
1524
		writeq(val64, &bar0->tx_w_round_robin_0);
1525
		val64 = 0x0304000102030400ULL;
1526
		writeq(val64, &bar0->tx_w_round_robin_1);
1527
		val64 = 0x0102030400010203ULL;
1528
		writeq(val64, &bar0->tx_w_round_robin_2);
1529
		val64 = 0x0400010203040001ULL;
1530
		writeq(val64, &bar0->tx_w_round_robin_3);
1531
		val64 = 0x0203040000000000ULL;
1532 1533 1534
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 6:
1535
		val64 = 0x0001020304050001ULL;
1536
		writeq(val64, &bar0->tx_w_round_robin_0);
1537
		val64 = 0x0203040500010203ULL;
1538
		writeq(val64, &bar0->tx_w_round_robin_1);
1539
		val64 = 0x0405000102030405ULL;
1540
		writeq(val64, &bar0->tx_w_round_robin_2);
1541
		val64 = 0x0001020304050001ULL;
1542
		writeq(val64, &bar0->tx_w_round_robin_3);
1543
		val64 = 0x0203040500000000ULL;
1544 1545 1546
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 7:
1547
		val64 = 0x0001020304050600ULL;
1548
		writeq(val64, &bar0->tx_w_round_robin_0);
1549
		val64 = 0x0102030405060001ULL;
1550
		writeq(val64, &bar0->tx_w_round_robin_1);
1551
		val64 = 0x0203040506000102ULL;
1552
		writeq(val64, &bar0->tx_w_round_robin_2);
1553
		val64 = 0x0304050600010203ULL;
1554
		writeq(val64, &bar0->tx_w_round_robin_3);
1555
		val64 = 0x0405060000000000ULL;
1556 1557 1558
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 8:
1559
		val64 = 0x0001020304050607ULL;
1560 1561 1562 1563
		writeq(val64, &bar0->tx_w_round_robin_0);
		writeq(val64, &bar0->tx_w_round_robin_1);
		writeq(val64, &bar0->tx_w_round_robin_2);
		writeq(val64, &bar0->tx_w_round_robin_3);
1564
		val64 = 0x0001020300000000ULL;
1565 1566 1567 1568
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	}

1569
	/* Enable all configured Tx FIFO partitions */
1570 1571 1572 1573
	val64 = readq(&bar0->tx_fifo_partition_0);
	val64 |= (TX_FIFO_PARTITION_EN);
	writeq(val64, &bar0->tx_fifo_partition_0);

1574
	/* Filling the Rx round robin registers as per the
1575 1576 1577
	 * number of Rings and steering based on QoS with
	 * equal priority.
	 */
1578 1579
	switch (config->rx_ring_num) {
	case 1:
1580 1581 1582 1583 1584 1585 1586
		val64 = 0x0;
		writeq(val64, &bar0->rx_w_round_robin_0);
		writeq(val64, &bar0->rx_w_round_robin_1);
		writeq(val64, &bar0->rx_w_round_robin_2);
		writeq(val64, &bar0->rx_w_round_robin_3);
		writeq(val64, &bar0->rx_w_round_robin_4);

1587 1588 1589 1590
		val64 = 0x8080808080808080ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 2:
1591
		val64 = 0x0001000100010001ULL;
1592 1593 1594 1595
		writeq(val64, &bar0->rx_w_round_robin_0);
		writeq(val64, &bar0->rx_w_round_robin_1);
		writeq(val64, &bar0->rx_w_round_robin_2);
		writeq(val64, &bar0->rx_w_round_robin_3);
1596
		val64 = 0x0001000100000000ULL;
1597 1598 1599 1600 1601 1602
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080808040404040ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 3:
1603
		val64 = 0x0001020001020001ULL;
1604
		writeq(val64, &bar0->rx_w_round_robin_0);
1605
		val64 = 0x0200010200010200ULL;
1606
		writeq(val64, &bar0->rx_w_round_robin_1);
1607
		val64 = 0x0102000102000102ULL;
1608
		writeq(val64, &bar0->rx_w_round_robin_2);
1609
		val64 = 0x0001020001020001ULL;
1610
		writeq(val64, &bar0->rx_w_round_robin_3);
1611
		val64 = 0x0200010200000000ULL;
1612 1613 1614 1615 1616 1617
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080804040402020ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 4:
1618
		val64 = 0x0001020300010203ULL;
1619 1620 1621 1622
		writeq(val64, &bar0->rx_w_round_robin_0);
		writeq(val64, &bar0->rx_w_round_robin_1);
		writeq(val64, &bar0->rx_w_round_robin_2);
		writeq(val64, &bar0->rx_w_round_robin_3);
1623
		val64 = 0x0001020300000000ULL;
1624 1625 1626 1627 1628 1629
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080404020201010ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 5:
1630
		val64 = 0x0001020304000102ULL;
1631
		writeq(val64, &bar0->rx_w_round_robin_0);
1632
		val64 = 0x0304000102030400ULL;
1633
		writeq(val64, &bar0->rx_w_round_robin_1);
1634
		val64 = 0x0102030400010203ULL;
1635
		writeq(val64, &bar0->rx_w_round_robin_2);
1636
		val64 = 0x0400010203040001ULL;
1637
		writeq(val64, &bar0->rx_w_round_robin_3);
1638
		val64 = 0x0203040000000000ULL;
1639 1640 1641 1642 1643 1644
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080404020201008ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 6:
1645
		val64 = 0x0001020304050001ULL;
1646
		writeq(val64, &bar0->rx_w_round_robin_0);
1647
		val64 = 0x0203040500010203ULL;
1648
		writeq(val64, &bar0->rx_w_round_robin_1);
1649
		val64 = 0x0405000102030405ULL;
1650
		writeq(val64, &bar0->rx_w_round_robin_2);
1651
		val64 = 0x0001020304050001ULL;
1652
		writeq(val64, &bar0->rx_w_round_robin_3);
1653
		val64 = 0x0203040500000000ULL;
1654 1655 1656 1657 1658 1659
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080404020100804ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 7:
1660
		val64 = 0x0001020304050600ULL;
1661
		writeq(val64, &bar0->rx_w_round_robin_0);
1662
		val64 = 0x0102030405060001ULL;
1663
		writeq(val64, &bar0->rx_w_round_robin_1);
1664
		val64 = 0x0203040506000102ULL;
1665
		writeq(val64, &bar0->rx_w_round_robin_2);
1666
		val64 = 0x0304050600010203ULL;
1667
		writeq(val64, &bar0->rx_w_round_robin_3);
1668
		val64 = 0x0405060000000000ULL;
1669 1670 1671 1672 1673 1674
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080402010080402ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 8:
1675
		val64 = 0x0001020304050607ULL;
1676 1677 1678 1679
		writeq(val64, &bar0->rx_w_round_robin_0);
		writeq(val64, &bar0->rx_w_round_robin_1);
		writeq(val64, &bar0->rx_w_round_robin_2);
		writeq(val64, &bar0->rx_w_round_robin_3);
1680
		val64 = 0x0001020300000000ULL;
1681 1682 1683 1684 1685 1686
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8040201008040201ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	}
L
Linus Torvalds 已提交
1687 1688 1689

	/* UDP Fix */
	val64 = 0;
1690
	for (i = 0; i < 8; i++)
L
Linus Torvalds 已提交
1691 1692
		writeq(val64, &bar0->rts_frm_len_n[i]);

1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712
	/* Set the default rts frame length for the rings configured */
	val64 = MAC_RTS_FRM_LEN_SET(dev->mtu+22);
	for (i = 0 ; i < config->rx_ring_num ; i++)
		writeq(val64, &bar0->rts_frm_len_n[i]);

	/* Set the frame length for the configured rings
	 * desired by the user
	 */
	for (i = 0; i < config->rx_ring_num; i++) {
		/* If rts_frm_len[i] == 0 then it is assumed that user not
		 * specified frame length steering.
		 * If the user provides the frame length then program
		 * the rts_frm_len register for those values or else
		 * leave it as it is.
		 */
		if (rts_frm_len[i] != 0) {
			writeq(MAC_RTS_FRM_LEN_SET(rts_frm_len[i]),
				&bar0->rts_frm_len_n[i]);
		}
	}
1713

1714 1715 1716 1717 1718 1719
	/* Disable differentiated services steering logic */
	for (i = 0; i < 64; i++) {
		if (rts_ds_steer(nic, i, 0) == FAILURE) {
			DBG_PRINT(ERR_DBG, "%s: failed rts ds steering",
				dev->name);
			DBG_PRINT(ERR_DBG, "set on codepoint %d\n", i);
1720
			return -ENODEV;
1721 1722 1723
		}
	}

1724
	/* Program statistics memory */
L
Linus Torvalds 已提交
1725 1726
	writeq(mac_control->stats_mem_phy, &bar0->stat_addr);

1727 1728 1729 1730 1731
	if (nic->device_type == XFRAME_II_DEVICE) {
		val64 = STAT_BC(0x320);
		writeq(val64, &bar0->stat_byte_cnt);
	}

1732
	/*
L
Linus Torvalds 已提交
1733 1734 1735 1736 1737 1738 1739
	 * Initializing the sampling rate for the device to calculate the
	 * bandwidth utilization.
	 */
	val64 = MAC_TX_LINK_UTIL_VAL(tmac_util_period) |
	    MAC_RX_LINK_UTIL_VAL(rmac_util_period);
	writeq(val64, &bar0->mac_link_util);

1740 1741
	/*
	 * Initializing the Transmit and Receive Traffic Interrupt
L
Linus Torvalds 已提交
1742 1743 1744
	 * Scheme.
	 */

1745 1746 1747
	/* Initialize TTI */
	if (SUCCESS != init_tti(nic, nic->last_link_state))
		return -ENODEV;
L
Linus Torvalds 已提交
1748

1749 1750
	/* RTI Initialization */
	if (nic->device_type == XFRAME_II_DEVICE) {
1751
		/*
1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773
		 * Programmed to generate Apprx 500 Intrs per
		 * second
		 */
		int count = (nic->config.bus_speed * 125)/4;
		val64 = RTI_DATA1_MEM_RX_TIMER_VAL(count);
	} else
		val64 = RTI_DATA1_MEM_RX_TIMER_VAL(0xFFF);
	val64 |= RTI_DATA1_MEM_RX_URNG_A(0xA) |
		 RTI_DATA1_MEM_RX_URNG_B(0x10) |
		 RTI_DATA1_MEM_RX_URNG_C(0x30) | RTI_DATA1_MEM_RX_TIMER_AC_EN;

	writeq(val64, &bar0->rti_data1_mem);

	val64 = RTI_DATA2_MEM_RX_UFC_A(0x1) |
		RTI_DATA2_MEM_RX_UFC_B(0x2) ;
	if (nic->config.intr_type == MSI_X)
	    val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x20) | \
			RTI_DATA2_MEM_RX_UFC_D(0x40));
	else
	    val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x40) | \
			RTI_DATA2_MEM_RX_UFC_D(0x80));
	writeq(val64, &bar0->rti_data2_mem);
L
Linus Torvalds 已提交
1774

1775 1776 1777 1778
	for (i = 0; i < config->rx_ring_num; i++) {
		val64 = RTI_CMD_MEM_WE | RTI_CMD_MEM_STROBE_NEW_CMD
				| RTI_CMD_MEM_OFFSET(i);
		writeq(val64, &bar0->rti_command_mem);
L
Linus Torvalds 已提交
1779

1780 1781 1782 1783 1784 1785 1786 1787
		/*
		 * Once the operation completes, the Strobe bit of the
		 * command register will be reset. We poll for this
		 * particular condition. We wait for a maximum of 500ms
		 * for the operation to complete, if it's not complete
		 * by then we return error.
		 */
		time = 0;
1788
		while (true) {
1789 1790 1791
			val64 = readq(&bar0->rti_command_mem);
			if (!(val64 & RTI_CMD_MEM_STROBE_NEW_CMD))
				break;
1792

1793 1794 1795
			if (time > 10) {
				DBG_PRINT(ERR_DBG, "%s: RTI init Failed\n",
					  dev->name);
1796
				return -ENODEV;
1797
			}
1798 1799
			time++;
			msleep(50);
L
Linus Torvalds 已提交
1800 1801 1802
		}
	}

1803 1804
	/*
	 * Initializing proper values as Pause threshold into all
L
Linus Torvalds 已提交
1805 1806 1807 1808 1809 1810
	 * the 8 Queues on Rx side.
	 */
	writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q0q3);
	writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q4q7);

	/* Disable RMAC PAD STRIPPING */
1811
	add = &bar0->mac_cfg;
L
Linus Torvalds 已提交
1812 1813 1814 1815 1816 1817 1818 1819
	val64 = readq(&bar0->mac_cfg);
	val64 &= ~(MAC_CFG_RMAC_STRIP_PAD);
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) (val64), add);
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) (val64 >> 32), (add + 4));
	val64 = readq(&bar0->mac_cfg);

1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832
	/* Enable FCS stripping by adapter */
	add = &bar0->mac_cfg;
	val64 = readq(&bar0->mac_cfg);
	val64 |= MAC_CFG_RMAC_STRIP_FCS;
	if (nic->device_type == XFRAME_II_DEVICE)
		writeq(val64, &bar0->mac_cfg);
	else {
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64), add);
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64 >> 32), (add + 4));
	}

1833 1834
	/*
	 * Set the time value to be inserted in the pause frame
L
Linus Torvalds 已提交
1835 1836 1837 1838 1839 1840 1841
	 * generated by xena.
	 */
	val64 = readq(&bar0->rmac_pause_cfg);
	val64 &= ~(RMAC_PAUSE_HG_PTIME(0xffff));
	val64 |= RMAC_PAUSE_HG_PTIME(nic->mac_control.rmac_pause_time);
	writeq(val64, &bar0->rmac_pause_cfg);

1842
	/*
L
Linus Torvalds 已提交
1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865
	 * Set the Threshold Limit for Generating the pause frame
	 * If the amount of data in any Queue exceeds ratio of
	 * (mac_control.mc_pause_threshold_q0q3 or q4q7)/256
	 * pause frame is generated
	 */
	val64 = 0;
	for (i = 0; i < 4; i++) {
		val64 |=
		    (((u64) 0xFF00 | nic->mac_control.
		      mc_pause_threshold_q0q3)
		     << (i * 2 * 8));
	}
	writeq(val64, &bar0->mc_pause_thresh_q0q3);

	val64 = 0;
	for (i = 0; i < 4; i++) {
		val64 |=
		    (((u64) 0xFF00 | nic->mac_control.
		      mc_pause_threshold_q4q7)
		     << (i * 2 * 8));
	}
	writeq(val64, &bar0->mc_pause_thresh_q4q7);

1866 1867
	/*
	 * TxDMA will stop Read request if the number of read split has
L
Linus Torvalds 已提交
1868 1869 1870 1871 1872 1873
	 * exceeded the limit pointed by shared_splits
	 */
	val64 = readq(&bar0->pic_control);
	val64 |= PIC_CNTL_SHARED_SPLITS(shared_splits);
	writeq(val64, &bar0->pic_control);

1874 1875 1876 1877 1878 1879
	if (nic->config.bus_speed == 266) {
		writeq(TXREQTO_VAL(0x7f) | TXREQTO_EN, &bar0->txreqtimeout);
		writeq(0x0, &bar0->read_retry_delay);
		writeq(0x0, &bar0->write_retry_delay);
	}

1880 1881 1882 1883 1884
	/*
	 * Programming the Herc to split every write transaction
	 * that does not start on an ADB to reduce disconnects.
	 */
	if (nic->device_type == XFRAME_II_DEVICE) {
1885 1886
		val64 = FAULT_BEHAVIOUR | EXT_REQ_EN |
			MISC_LINK_STABILITY_PRD(3);
1887 1888
		writeq(val64, &bar0->misc_control);
		val64 = readq(&bar0->pic_control2);
J
Jiri Slaby 已提交
1889
		val64 &= ~(s2BIT(13)|s2BIT(14)|s2BIT(15));
1890
		writeq(val64, &bar0->pic_control2);
1891
	}
A
Ananda Raju 已提交
1892 1893 1894
	if (strstr(nic->product_name, "CX4")) {
		val64 = TMAC_AVG_IPG(0x17);
		writeq(val64, &bar0->tmac_avg_ipg);
1895 1896
	}

L
Linus Torvalds 已提交
1897 1898
	return SUCCESS;
}
1899 1900 1901
#define LINK_UP_DOWN_INTERRUPT		1
#define MAC_RMAC_ERR_TIMER		2

R
Ralf Baechle 已提交
1902
static int s2io_link_fault_indication(struct s2io_nic *nic)
1903 1904 1905 1906 1907 1908
{
	if (nic->device_type == XFRAME_II_DEVICE)
		return LINK_UP_DOWN_INTERRUPT;
	else
		return MAC_RMAC_ERR_TIMER;
}
1909

1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930
/**
 *  do_s2io_write_bits -  update alarm bits in alarm register
 *  @value: alarm bits
 *  @flag: interrupt status
 *  @addr: address value
 *  Description: update alarm bits in alarm register
 *  Return Value:
 *  NONE.
 */
static void do_s2io_write_bits(u64 value, int flag, void __iomem *addr)
{
	u64 temp64;

	temp64 = readq(addr);

	if(flag == ENABLE_INTRS)
		temp64 &= ~((u64) value);
	else
		temp64 |= ((u64) value);
	writeq(temp64, addr);
}
L
Linus Torvalds 已提交
1931

1932
static void en_dis_err_alarms(struct s2io_nic *nic, u16 mask, int flag)
1933 1934 1935
{
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
	register u64 gen_int_mask = 0;
1936
	u64 interruptible;
1937

1938
	writeq(DISABLE_ALL_INTRS, &bar0->general_int_mask);
1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027
	if (mask & TX_DMA_INTR) {

		gen_int_mask |= TXDMA_INT_M;

		do_s2io_write_bits(TXDMA_TDA_INT | TXDMA_PFC_INT |
				TXDMA_PCC_INT | TXDMA_TTI_INT |
				TXDMA_LSO_INT | TXDMA_TPA_INT |
				TXDMA_SM_INT, flag, &bar0->txdma_int_mask);

		do_s2io_write_bits(PFC_ECC_DB_ERR | PFC_SM_ERR_ALARM |
				PFC_MISC_0_ERR | PFC_MISC_1_ERR |
				PFC_PCIX_ERR | PFC_ECC_SG_ERR, flag,
				&bar0->pfc_err_mask);

		do_s2io_write_bits(TDA_Fn_ECC_DB_ERR | TDA_SM0_ERR_ALARM |
				TDA_SM1_ERR_ALARM | TDA_Fn_ECC_SG_ERR |
				TDA_PCIX_ERR, flag, &bar0->tda_err_mask);

		do_s2io_write_bits(PCC_FB_ECC_DB_ERR | PCC_TXB_ECC_DB_ERR |
				PCC_SM_ERR_ALARM | PCC_WR_ERR_ALARM |
				PCC_N_SERR | PCC_6_COF_OV_ERR |
				PCC_7_COF_OV_ERR | PCC_6_LSO_OV_ERR |
				PCC_7_LSO_OV_ERR | PCC_FB_ECC_SG_ERR |
				PCC_TXB_ECC_SG_ERR, flag, &bar0->pcc_err_mask);

		do_s2io_write_bits(TTI_SM_ERR_ALARM | TTI_ECC_SG_ERR |
				TTI_ECC_DB_ERR, flag, &bar0->tti_err_mask);

		do_s2io_write_bits(LSO6_ABORT | LSO7_ABORT |
				LSO6_SM_ERR_ALARM | LSO7_SM_ERR_ALARM |
				LSO6_SEND_OFLOW | LSO7_SEND_OFLOW,
				flag, &bar0->lso_err_mask);

		do_s2io_write_bits(TPA_SM_ERR_ALARM | TPA_TX_FRM_DROP,
				flag, &bar0->tpa_err_mask);

		do_s2io_write_bits(SM_SM_ERR_ALARM, flag, &bar0->sm_err_mask);

	}

	if (mask & TX_MAC_INTR) {
		gen_int_mask |= TXMAC_INT_M;
		do_s2io_write_bits(MAC_INT_STATUS_TMAC_INT, flag,
				&bar0->mac_int_mask);
		do_s2io_write_bits(TMAC_TX_BUF_OVRN | TMAC_TX_SM_ERR |
				TMAC_ECC_SG_ERR | TMAC_ECC_DB_ERR |
				TMAC_DESC_ECC_SG_ERR | TMAC_DESC_ECC_DB_ERR,
				flag, &bar0->mac_tmac_err_mask);
	}

	if (mask & TX_XGXS_INTR) {
		gen_int_mask |= TXXGXS_INT_M;
		do_s2io_write_bits(XGXS_INT_STATUS_TXGXS, flag,
				&bar0->xgxs_int_mask);
		do_s2io_write_bits(TXGXS_ESTORE_UFLOW | TXGXS_TX_SM_ERR |
				TXGXS_ECC_SG_ERR | TXGXS_ECC_DB_ERR,
				flag, &bar0->xgxs_txgxs_err_mask);
	}

	if (mask & RX_DMA_INTR) {
		gen_int_mask |= RXDMA_INT_M;
		do_s2io_write_bits(RXDMA_INT_RC_INT_M | RXDMA_INT_RPA_INT_M |
				RXDMA_INT_RDA_INT_M | RXDMA_INT_RTI_INT_M,
				flag, &bar0->rxdma_int_mask);
		do_s2io_write_bits(RC_PRCn_ECC_DB_ERR | RC_FTC_ECC_DB_ERR |
				RC_PRCn_SM_ERR_ALARM | RC_FTC_SM_ERR_ALARM |
				RC_PRCn_ECC_SG_ERR | RC_FTC_ECC_SG_ERR |
				RC_RDA_FAIL_WR_Rn, flag, &bar0->rc_err_mask);
		do_s2io_write_bits(PRC_PCI_AB_RD_Rn | PRC_PCI_AB_WR_Rn |
				PRC_PCI_AB_F_WR_Rn | PRC_PCI_DP_RD_Rn |
				PRC_PCI_DP_WR_Rn | PRC_PCI_DP_F_WR_Rn, flag,
				&bar0->prc_pcix_err_mask);
		do_s2io_write_bits(RPA_SM_ERR_ALARM | RPA_CREDIT_ERR |
				RPA_ECC_SG_ERR | RPA_ECC_DB_ERR, flag,
				&bar0->rpa_err_mask);
		do_s2io_write_bits(RDA_RXDn_ECC_DB_ERR | RDA_FRM_ECC_DB_N_AERR |
				RDA_SM1_ERR_ALARM | RDA_SM0_ERR_ALARM |
				RDA_RXD_ECC_DB_SERR | RDA_RXDn_ECC_SG_ERR |
				RDA_FRM_ECC_SG_ERR | RDA_MISC_ERR|RDA_PCIX_ERR,
				flag, &bar0->rda_err_mask);
		do_s2io_write_bits(RTI_SM_ERR_ALARM |
				RTI_ECC_SG_ERR | RTI_ECC_DB_ERR,
				flag, &bar0->rti_err_mask);
	}

	if (mask & RX_MAC_INTR) {
		gen_int_mask |= RXMAC_INT_M;
		do_s2io_write_bits(MAC_INT_STATUS_RMAC_INT, flag,
				&bar0->mac_int_mask);
2028
		interruptible = RMAC_RX_BUFF_OVRN | RMAC_RX_SM_ERR |
2029
				RMAC_UNUSED_INT | RMAC_SINGLE_ECC_ERR |
2030 2031 2032 2033
				RMAC_DOUBLE_ECC_ERR;
		if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER)
			interruptible |= RMAC_LINK_STATE_CHANGE_INT;
		do_s2io_write_bits(interruptible,
2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057
				flag, &bar0->mac_rmac_err_mask);
	}

	if (mask & RX_XGXS_INTR)
	{
		gen_int_mask |= RXXGXS_INT_M;
		do_s2io_write_bits(XGXS_INT_STATUS_RXGXS, flag,
				&bar0->xgxs_int_mask);
		do_s2io_write_bits(RXGXS_ESTORE_OFLOW | RXGXS_RX_SM_ERR, flag,
				&bar0->xgxs_rxgxs_err_mask);
	}

	if (mask & MC_INTR) {
		gen_int_mask |= MC_INT_M;
		do_s2io_write_bits(MC_INT_MASK_MC_INT, flag, &bar0->mc_int_mask);
		do_s2io_write_bits(MC_ERR_REG_SM_ERR | MC_ERR_REG_ECC_ALL_SNG |
				MC_ERR_REG_ECC_ALL_DBL | PLL_LOCK_N, flag,
				&bar0->mc_err_mask);
	}
	nic->general_int_mask = gen_int_mask;

	/* Remove this line when alarm interrupts are enabled */
	nic->general_int_mask = 0;
}
2058 2059
/**
 *  en_dis_able_nic_intrs - Enable or Disable the interrupts
L
Linus Torvalds 已提交
2060 2061 2062 2063
 *  @nic: device private variable,
 *  @mask: A mask indicating which Intr block must be modified and,
 *  @flag: A flag indicating whether to enable or disable the Intrs.
 *  Description: This function will either disable or enable the interrupts
2064 2065
 *  depending on the flag argument. The mask argument can be used to
 *  enable/disable any Intr block.
L
Linus Torvalds 已提交
2066 2067 2068 2069 2070
 *  Return Value: NONE.
 */

static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
{
R
Ralf Baechle 已提交
2071
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
2072 2073 2074
	register u64 temp64 = 0, intr_mask = 0;

	intr_mask = nic->general_int_mask;
L
Linus Torvalds 已提交
2075 2076 2077

	/*  Top level interrupt classification */
	/*  PIC Interrupts */
2078
	if (mask & TX_PIC_INTR) {
L
Linus Torvalds 已提交
2079
		/*  Enable PIC Intrs in the general intr mask register */
2080
		intr_mask |= TXPIC_INT_M;
L
Linus Torvalds 已提交
2081
		if (flag == ENABLE_INTRS) {
2082
			/*
2083
			 * If Hercules adapter enable GPIO otherwise
2084
			 * disable all PCIX, Flash, MDIO, IIC and GPIO
2085 2086
			 * interrupts for now.
			 * TODO
L
Linus Torvalds 已提交
2087
			 */
2088 2089
			if (s2io_link_fault_indication(nic) ==
					LINK_UP_DOWN_INTERRUPT ) {
2090 2091 2092 2093 2094
				do_s2io_write_bits(PIC_INT_GPIO, flag,
						&bar0->pic_int_mask);
				do_s2io_write_bits(GPIO_INT_MASK_LINK_UP, flag,
						&bar0->gpio_int_mask);
			} else
2095
				writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
L
Linus Torvalds 已提交
2096
		} else if (flag == DISABLE_INTRS) {
2097 2098 2099
			/*
			 * Disable PIC Intrs in the general
			 * intr mask register
L
Linus Torvalds 已提交
2100 2101 2102 2103 2104 2105 2106
			 */
			writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
		}
	}

	/*  Tx traffic interrupts */
	if (mask & TX_TRAFFIC_INTR) {
2107
		intr_mask |= TXTRAFFIC_INT_M;
L
Linus Torvalds 已提交
2108
		if (flag == ENABLE_INTRS) {
2109
			/*
L
Linus Torvalds 已提交
2110
			 * Enable all the Tx side interrupts
2111
			 * writing 0 Enables all 64 TX interrupt levels
L
Linus Torvalds 已提交
2112 2113 2114
			 */
			writeq(0x0, &bar0->tx_traffic_mask);
		} else if (flag == DISABLE_INTRS) {
2115 2116
			/*
			 * Disable Tx Traffic Intrs in the general intr mask
L
Linus Torvalds 已提交
2117 2118 2119 2120 2121 2122 2123 2124
			 * register.
			 */
			writeq(DISABLE_ALL_INTRS, &bar0->tx_traffic_mask);
		}
	}

	/*  Rx traffic interrupts */
	if (mask & RX_TRAFFIC_INTR) {
2125
		intr_mask |= RXTRAFFIC_INT_M;
L
Linus Torvalds 已提交
2126 2127 2128 2129
		if (flag == ENABLE_INTRS) {
			/* writing 0 Enables all 8 RX interrupt levels */
			writeq(0x0, &bar0->rx_traffic_mask);
		} else if (flag == DISABLE_INTRS) {
2130 2131
			/*
			 * Disable Rx Traffic Intrs in the general intr mask
L
Linus Torvalds 已提交
2132 2133 2134 2135 2136
			 * register.
			 */
			writeq(DISABLE_ALL_INTRS, &bar0->rx_traffic_mask);
		}
	}
2137 2138 2139 2140 2141 2142 2143 2144 2145

	temp64 = readq(&bar0->general_int_mask);
	if (flag == ENABLE_INTRS)
		temp64 &= ~((u64) intr_mask);
	else
		temp64 = DISABLE_ALL_INTRS;
	writeq(temp64, &bar0->general_int_mask);

	nic->general_int_mask = readq(&bar0->general_int_mask);
L
Linus Torvalds 已提交
2146 2147
}

2148 2149 2150 2151 2152
/**
 *  verify_pcc_quiescent- Checks for PCC quiescent state
 *  Return: 1 If PCC is quiescence
 *          0 If PCC is not quiescence
 */
R
Ralf Baechle 已提交
2153
static int verify_pcc_quiescent(struct s2io_nic *sp, int flag)
2154
{
2155
	int ret = 0, herc;
R
Ralf Baechle 已提交
2156
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
2157
	u64 val64 = readq(&bar0->adapter_status);
2158

2159
	herc = (sp->device_type == XFRAME_II_DEVICE);
2160

2161
	if (flag == false) {
2162
		if ((!herc && (sp->pdev->revision >= 4)) || herc) {
2163
			if (!(val64 & ADAPTER_STATUS_RMAC_PCC_IDLE))
2164
				ret = 1;
2165 2166
		} else {
			if (!(val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE))
2167
				ret = 1;
2168 2169
		}
	} else {
2170
		if ((!herc && (sp->pdev->revision >= 4)) || herc) {
2171
			if (((val64 & ADAPTER_STATUS_RMAC_PCC_IDLE) ==
2172
			     ADAPTER_STATUS_RMAC_PCC_IDLE))
2173 2174 2175
				ret = 1;
		} else {
			if (((val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE) ==
2176
			     ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE))
2177
				ret = 1;
2178 2179 2180 2181 2182 2183 2184
		}
	}

	return ret;
}
/**
 *  verify_xena_quiescence - Checks whether the H/W is ready
L
Linus Torvalds 已提交
2185
 *  Description: Returns whether the H/W is ready to go or not. Depending
2186
 *  on whether adapter enable bit was written or not the comparison
L
Linus Torvalds 已提交
2187 2188
 *  differs and the calling function passes the input argument flag to
 *  indicate this.
2189
 *  Return: 1 If xena is quiescence
L
Linus Torvalds 已提交
2190 2191 2192
 *          0 If Xena is not quiescence
 */

R
Ralf Baechle 已提交
2193
static int verify_xena_quiescence(struct s2io_nic *sp)
L
Linus Torvalds 已提交
2194
{
2195
	int  mode;
R
Ralf Baechle 已提交
2196
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
2197 2198
	u64 val64 = readq(&bar0->adapter_status);
	mode = s2io_verify_pci_mode(sp);
L
Linus Torvalds 已提交
2199

2200 2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230
	if (!(val64 & ADAPTER_STATUS_TDMA_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "TDMA is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_RDMA_READY)) {
	DBG_PRINT(ERR_DBG, "%s", "RDMA is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_PFC_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "PFC is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_TMAC_BUF_EMPTY)) {
		DBG_PRINT(ERR_DBG, "%s", "TMAC BUF is not empty!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_PIC_QUIESCENT)) {
		DBG_PRINT(ERR_DBG, "%s", "PIC is not QUIESCENT!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_MC_DRAM_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "MC_DRAM is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_MC_QUEUES_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "MC_QUEUES is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_M_PLL_LOCK)) {
		DBG_PRINT(ERR_DBG, "%s", "M_PLL is not locked!");
		return 0;
L
Linus Torvalds 已提交
2231 2232
	}

2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249
	/*
	 * In PCI 33 mode, the P_PLL is not used, and therefore,
	 * the the P_PLL_LOCK bit in the adapter_status register will
	 * not be asserted.
	 */
	if (!(val64 & ADAPTER_STATUS_P_PLL_LOCK) &&
		sp->device_type == XFRAME_II_DEVICE && mode !=
		PCI_MODE_PCI_33) {
		DBG_PRINT(ERR_DBG, "%s", "P_PLL is not locked!");
		return 0;
	}
	if (!((val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ==
			ADAPTER_STATUS_RC_PRC_QUIESCENT)) {
		DBG_PRINT(ERR_DBG, "%s", "RC_PRC is not QUIESCENT!");
		return 0;
	}
	return 1;
L
Linus Torvalds 已提交
2250 2251 2252 2253 2254
}

/**
 * fix_mac_address -  Fix for Mac addr problem on Alpha platforms
 * @sp: Pointer to device specifc structure
2255
 * Description :
L
Linus Torvalds 已提交
2256 2257 2258 2259
 * New procedure to clear mac address reading  problems on Alpha platforms
 *
 */

R
Ralf Baechle 已提交
2260
static void fix_mac_address(struct s2io_nic * sp)
L
Linus Torvalds 已提交
2261
{
R
Ralf Baechle 已提交
2262
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
2263 2264 2265 2266 2267
	u64 val64;
	int i = 0;

	while (fix_mac[i] != END_SIGN) {
		writeq(fix_mac[i++], &bar0->gpio_control);
2268
		udelay(10);
L
Linus Torvalds 已提交
2269 2270 2271 2272 2273
		val64 = readq(&bar0->gpio_control);
	}
}

/**
2274
 *  start_nic - Turns the device on
L
Linus Torvalds 已提交
2275
 *  @nic : device private variable.
2276 2277 2278 2279
 *  Description:
 *  This function actually turns the device on. Before this  function is
 *  called,all Registers are configured from their reset states
 *  and shared memory is allocated but the NIC is still quiescent. On
L
Linus Torvalds 已提交
2280 2281
 *  calling this function, the device interrupts are cleared and the NIC is
 *  literally switched on by writing into the adapter control register.
2282
 *  Return Value:
L
Linus Torvalds 已提交
2283 2284 2285 2286 2287
 *  SUCCESS on success and -1 on failure.
 */

static int start_nic(struct s2io_nic *nic)
{
R
Ralf Baechle 已提交
2288
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
L
Linus Torvalds 已提交
2289 2290
	struct net_device *dev = nic->dev;
	register u64 val64 = 0;
2291
	u16 subid, i;
R
Ralf Baechle 已提交
2292
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2293 2294 2295 2296 2297 2298 2299
	struct config_param *config;

	mac_control = &nic->mac_control;
	config = &nic->config;

	/*  PRC Initialization and configuration */
	for (i = 0; i < config->rx_ring_num; i++) {
2300 2301 2302
		struct ring_info *ring = &mac_control->rings[i];

		writeq((u64) ring->rx_blocks[0].block_dma_addr,
L
Linus Torvalds 已提交
2303 2304 2305
		       &bar0->prc_rxd0_n[i]);

		val64 = readq(&bar0->prc_ctrl_n[i]);
2306 2307 2308 2309
		if (nic->rxd_mode == RXD_MODE_1)
			val64 |= PRC_CTRL_RC_ENABLED;
		else
			val64 |= PRC_CTRL_RC_ENABLED | PRC_CTRL_RING_MODE_3;
2310 2311 2312 2313
		if (nic->device_type == XFRAME_II_DEVICE)
			val64 |= PRC_CTRL_GROUP_READS;
		val64 &= ~PRC_CTRL_RXD_BACKOFF_INTERVAL(0xFFFFFF);
		val64 |= PRC_CTRL_RXD_BACKOFF_INTERVAL(0x1000);
L
Linus Torvalds 已提交
2314 2315 2316
		writeq(val64, &bar0->prc_ctrl_n[i]);
	}

2317 2318 2319 2320 2321 2322
	if (nic->rxd_mode == RXD_MODE_3B) {
		/* Enabling 2 buffer mode by writing into Rx_pa_cfg reg. */
		val64 = readq(&bar0->rx_pa_cfg);
		val64 |= RX_PA_CFG_IGNORE_L2_ERR;
		writeq(val64, &bar0->rx_pa_cfg);
	}
L
Linus Torvalds 已提交
2323

2324 2325 2326 2327
	if (vlan_tag_strip == 0) {
		val64 = readq(&bar0->rx_pa_cfg);
		val64 &= ~RX_PA_CFG_STRIP_VLAN_TAG;
		writeq(val64, &bar0->rx_pa_cfg);
2328
		nic->vlan_strip_flag = 0;
2329 2330
	}

2331
	/*
L
Linus Torvalds 已提交
2332 2333 2334 2335 2336 2337 2338 2339 2340
	 * Enabling MC-RLDRAM. After enabling the device, we timeout
	 * for around 100ms, which is approximately the time required
	 * for the device to be ready for operation.
	 */
	val64 = readq(&bar0->mc_rldram_mrs);
	val64 |= MC_RLDRAM_QUEUE_SIZE_ENABLE | MC_RLDRAM_MRS_ENABLE;
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);
	val64 = readq(&bar0->mc_rldram_mrs);

2341
	msleep(100);	/* Delay by around 100 ms. */
L
Linus Torvalds 已提交
2342 2343 2344 2345 2346 2347

	/* Enabling ECC Protection. */
	val64 = readq(&bar0->adapter_control);
	val64 &= ~ADAPTER_ECC_EN;
	writeq(val64, &bar0->adapter_control);

2348 2349
	/*
	 * Verify if the device is ready to be enabled, if so enable
L
Linus Torvalds 已提交
2350 2351 2352
	 * it.
	 */
	val64 = readq(&bar0->adapter_status);
2353
	if (!verify_xena_quiescence(nic)) {
L
Linus Torvalds 已提交
2354 2355 2356 2357 2358 2359
		DBG_PRINT(ERR_DBG, "%s: device is not ready, ", dev->name);
		DBG_PRINT(ERR_DBG, "Adapter status reads: 0x%llx\n",
			  (unsigned long long) val64);
		return FAILURE;
	}

2360
	/*
L
Linus Torvalds 已提交
2361
	 * With some switches, link might be already up at this point.
2362 2363 2364 2365
	 * Because of this weird behavior, when we enable laser,
	 * we may not get link. We need to handle this. We cannot
	 * figure out which switch is misbehaving. So we are forced to
	 * make a global change.
L
Linus Torvalds 已提交
2366 2367 2368 2369 2370 2371 2372
	 */

	/* Enabling Laser. */
	val64 = readq(&bar0->adapter_control);
	val64 |= ADAPTER_EOI_TX_ON;
	writeq(val64, &bar0->adapter_control);

A
Ananda Raju 已提交
2373 2374 2375 2376 2377 2378 2379
	if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
		/*
		 * Dont see link state interrupts initally on some switches,
		 * so directly scheduling the link state task here.
		 */
		schedule_work(&nic->set_link_task);
	}
L
Linus Torvalds 已提交
2380 2381
	/* SXE-002: Initialize link and activity LED */
	subid = nic->pdev->subsystem_device;
2382 2383
	if (((subid & 0xFF) >= 0x07) &&
	    (nic->device_type == XFRAME_I_DEVICE)) {
L
Linus Torvalds 已提交
2384 2385 2386 2387
		val64 = readq(&bar0->gpio_control);
		val64 |= 0x0000800000000000ULL;
		writeq(val64, &bar0->gpio_control);
		val64 = 0x0411040400000000ULL;
2388
		writeq(val64, (void __iomem *)bar0 + 0x2700);
L
Linus Torvalds 已提交
2389 2390 2391 2392
	}

	return SUCCESS;
}
A
Ananda Raju 已提交
2393 2394 2395
/**
 * s2io_txdl_getskb - Get the skb from txdl, unmap and return skb
 */
R
Ralf Baechle 已提交
2396 2397
static struct sk_buff *s2io_txdl_getskb(struct fifo_info *fifo_data, struct \
					TxD *txdlp, int get_off)
A
Ananda Raju 已提交
2398
{
R
Ralf Baechle 已提交
2399
	struct s2io_nic *nic = fifo_data->nic;
A
Ananda Raju 已提交
2400
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2401
	struct TxD *txds;
A
Ananda Raju 已提交
2402 2403 2404
	u16 j, frg_cnt;

	txds = txdlp;
2405
	if (txds->Host_Control == (u64)(long)fifo_data->ufo_in_band_v) {
A
Ananda Raju 已提交
2406 2407 2408 2409 2410 2411 2412 2413 2414
		pci_unmap_single(nic->pdev, (dma_addr_t)
			txds->Buffer_Pointer, sizeof(u64),
			PCI_DMA_TODEVICE);
		txds++;
	}

	skb = (struct sk_buff *) ((unsigned long)
			txds->Host_Control);
	if (!skb) {
R
Ralf Baechle 已提交
2415
		memset(txdlp, 0, (sizeof(struct TxD) * fifo_data->max_txds));
A
Ananda Raju 已提交
2416 2417 2418 2419 2420 2421 2422 2423 2424 2425 2426 2427 2428
		return NULL;
	}
	pci_unmap_single(nic->pdev, (dma_addr_t)
			 txds->Buffer_Pointer,
			 skb->len - skb->data_len,
			 PCI_DMA_TODEVICE);
	frg_cnt = skb_shinfo(skb)->nr_frags;
	if (frg_cnt) {
		txds++;
		for (j = 0; j < frg_cnt; j++, txds++) {
			skb_frag_t *frag = &skb_shinfo(skb)->frags[j];
			if (!txds->Buffer_Pointer)
				break;
2429
			pci_unmap_page(nic->pdev, (dma_addr_t)
A
Ananda Raju 已提交
2430 2431 2432 2433
					txds->Buffer_Pointer,
				       frag->size, PCI_DMA_TODEVICE);
		}
	}
R
Ralf Baechle 已提交
2434
	memset(txdlp,0, (sizeof(struct TxD) * fifo_data->max_txds));
A
Ananda Raju 已提交
2435 2436
	return(skb);
}
L
Linus Torvalds 已提交
2437

2438 2439
/**
 *  free_tx_buffers - Free all queued Tx buffers
L
Linus Torvalds 已提交
2440
 *  @nic : device private variable.
2441
 *  Description:
L
Linus Torvalds 已提交
2442
 *  Free all queued Tx buffers.
2443
 *  Return Value: void
L
Linus Torvalds 已提交
2444 2445 2446 2447 2448 2449
*/

static void free_tx_buffers(struct s2io_nic *nic)
{
	struct net_device *dev = nic->dev;
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2450
	struct TxD *txdp;
L
Linus Torvalds 已提交
2451
	int i, j;
R
Ralf Baechle 已提交
2452
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2453
	struct config_param *config;
A
Ananda Raju 已提交
2454
	int cnt = 0;
L
Linus Torvalds 已提交
2455 2456 2457 2458 2459

	mac_control = &nic->mac_control;
	config = &nic->config;

	for (i = 0; i < config->tx_fifo_num; i++) {
2460 2461
		struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
		struct fifo_info *fifo = &mac_control->fifos[i];
2462
		unsigned long flags;
2463 2464 2465 2466

		spin_lock_irqsave(&fifo->tx_lock, flags);
		for (j = 0; j < tx_cfg->fifo_len; j++) {
			txdp = (struct TxD *)fifo->list_info[j].list_virt_addr;
A
Ananda Raju 已提交
2467 2468
			skb = s2io_txdl_getskb(&mac_control->fifos[i], txdp, j);
			if (skb) {
2469
				nic->mac_control.stats_info->sw_stat.mem_freed
2470
					+= skb->truesize;
A
Ananda Raju 已提交
2471 2472
				dev_kfree_skb(skb);
				cnt++;
L
Linus Torvalds 已提交
2473 2474 2475 2476 2477
			}
		}
		DBG_PRINT(INTR_DBG,
			  "%s:forcibly freeing %d skbs on FIFO%d\n",
			  dev->name, cnt, i);
2478 2479 2480
		fifo->tx_curr_get_info.offset = 0;
		fifo->tx_curr_put_info.offset = 0;
		spin_unlock_irqrestore(&fifo->tx_lock, flags);
L
Linus Torvalds 已提交
2481 2482 2483
	}
}

2484 2485
/**
 *   stop_nic -  To stop the nic
L
Linus Torvalds 已提交
2486
 *   @nic ; device private variable.
2487 2488
 *   Description:
 *   This function does exactly the opposite of what the start_nic()
L
Linus Torvalds 已提交
2489 2490 2491 2492 2493 2494 2495
 *   function does. This function is called to stop the device.
 *   Return Value:
 *   void.
 */

static void stop_nic(struct s2io_nic *nic)
{
R
Ralf Baechle 已提交
2496
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
L
Linus Torvalds 已提交
2497
	register u64 val64 = 0;
2498
	u16 interruptible;
R
Ralf Baechle 已提交
2499
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2500 2501 2502 2503 2504 2505
	struct config_param *config;

	mac_control = &nic->mac_control;
	config = &nic->config;

	/*  Disable all interrupts */
2506
	en_dis_err_alarms(nic, ENA_ALL_INTRS, DISABLE_INTRS);
2507
	interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
2508
	interruptible |= TX_PIC_INTR;
L
Linus Torvalds 已提交
2509 2510
	en_dis_able_nic_intrs(nic, interruptible, DISABLE_INTRS);

2511 2512 2513 2514
	/* Clearing Adapter_En bit of ADAPTER_CONTROL Register */
	val64 = readq(&bar0->adapter_control);
	val64 &= ~(ADAPTER_CNTL_EN);
	writeq(val64, &bar0->adapter_control);
L
Linus Torvalds 已提交
2515 2516
}

2517 2518
/**
 *  fill_rx_buffers - Allocates the Rx side skbs
2519
 *  @ring_info: per ring structure
2520 2521 2522
 *  @from_card_up: If this is true, we will map the buffer to get
 *     the dma address for buf0 and buf1 to give it to the card.
 *     Else we will sync the already mapped buffer to give it to the card.
2523
 *  Description:
L
Linus Torvalds 已提交
2524 2525 2526 2527 2528 2529 2530
 *  The function allocates Rx side skbs and puts the physical
 *  address of these buffers into the RxD buffer pointers, so that the NIC
 *  can DMA the received frame into these locations.
 *  The NIC supports 3 receive modes, viz
 *  1. single buffer,
 *  2. three buffer and
 *  3. Five buffer modes.
2531 2532
 *  Each mode defines how many fragments the received frame will be split
 *  up into by the NIC. The frame is split into L3 header, L4 Header,
L
Linus Torvalds 已提交
2533 2534 2535 2536 2537 2538
 *  L4 payload in three buffer mode and in 5 buffer mode, L4 payload itself
 *  is split into 3 fragments. As of now only single buffer mode is
 *  supported.
 *   Return Value:
 *  SUCCESS on success or an appropriate -ve value on failure.
 */
2539 2540
static int fill_rx_buffers(struct s2io_nic *nic, struct ring_info *ring,
				int from_card_up)
L
Linus Torvalds 已提交
2541 2542
{
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2543
	struct RxD_t *rxdp;
2544
	int off, size, block_no, block_no1;
L
Linus Torvalds 已提交
2545
	u32 alloc_tab = 0;
2546 2547
	u32 alloc_cnt;
	u64 tmp;
R
Ralf Baechle 已提交
2548 2549
	struct buffAdd *ba;
	struct RxD_t *first_rxdp = NULL;
2550
	u64 Buffer0_ptr = 0, Buffer1_ptr = 0;
2551
	int rxd_index = 0;
2552 2553
	struct RxD1 *rxdp1;
	struct RxD3 *rxdp3;
2554
	struct swStat *stats = &ring->nic->mac_control.stats_info->sw_stat;
L
Linus Torvalds 已提交
2555

2556
	alloc_cnt = ring->pkt_cnt - ring->rx_bufs_left;
L
Linus Torvalds 已提交
2557

2558
	block_no1 = ring->rx_curr_get_info.block_index;
L
Linus Torvalds 已提交
2559
	while (alloc_tab < alloc_cnt) {
2560
		block_no = ring->rx_curr_put_info.block_index;
L
Linus Torvalds 已提交
2561

2562 2563 2564 2565 2566 2567 2568
		off = ring->rx_curr_put_info.offset;

		rxdp = ring->rx_blocks[block_no].rxds[off].virt_addr;

		rxd_index = off + 1;
		if (block_no)
			rxd_index += (block_no * ring->rxd_count);
2569

2570
		if ((block_no == block_no1) &&
2571 2572
			(off == ring->rx_curr_get_info.offset) &&
			(rxdp->Host_Control)) {
2573
			DBG_PRINT(INTR_DBG, "%s: Get and Put",
2574
				ring->dev->name);
L
Linus Torvalds 已提交
2575 2576 2577
			DBG_PRINT(INTR_DBG, " info equated\n");
			goto end;
		}
2578 2579 2580 2581 2582 2583 2584 2585 2586
		if (off && (off == ring->rxd_count)) {
			ring->rx_curr_put_info.block_index++;
			if (ring->rx_curr_put_info.block_index ==
							ring->block_count)
				ring->rx_curr_put_info.block_index = 0;
			block_no = ring->rx_curr_put_info.block_index;
			off = 0;
			ring->rx_curr_put_info.offset = off;
			rxdp = ring->rx_blocks[block_no].block_virt_addr;
L
Linus Torvalds 已提交
2587
			DBG_PRINT(INTR_DBG, "%s: Next block at: %p\n",
2588 2589
				  ring->dev->name, rxdp);

L
Linus Torvalds 已提交
2590
		}
2591

2592
		if ((rxdp->Control_1 & RXD_OWN_XENA) &&
2593
			((ring->rxd_mode == RXD_MODE_3B) &&
J
Jiri Slaby 已提交
2594
				(rxdp->Control_2 & s2BIT(0)))) {
2595
			ring->rx_curr_put_info.offset = off;
L
Linus Torvalds 已提交
2596 2597
			goto end;
		}
2598
		/* calculate size of skb based on ring mode */
2599
		size = ring->mtu + HEADER_ETHERNET_II_802_3_SIZE +
2600
				HEADER_802_2_SIZE + HEADER_SNAP_SIZE;
2601
		if (ring->rxd_mode == RXD_MODE_1)
2602 2603
			size += NET_IP_ALIGN;
		else
2604
			size = ring->mtu + ALIGN_SIZE + BUF0_LEN + 4;
L
Linus Torvalds 已提交
2605

2606 2607 2608
		/* allocate skb */
		skb = dev_alloc_skb(size);
		if(!skb) {
2609
			DBG_PRINT(INFO_DBG, "%s: Out of ", ring->dev->name);
2610
			DBG_PRINT(INFO_DBG, "memory to allocate SKBs\n");
2611 2612 2613 2614
			if (first_rxdp) {
				wmb();
				first_rxdp->Control_1 |= RXD_OWN_XENA;
			}
2615
			stats->mem_alloc_fail_cnt++;
2616

2617 2618
			return -ENOMEM ;
		}
2619 2620 2621
		stats->mem_allocated += skb->truesize;

		if (ring->rxd_mode == RXD_MODE_1) {
2622
			/* 1 buffer mode - normal operation mode */
2623
			rxdp1 = (struct RxD1*)rxdp;
R
Ralf Baechle 已提交
2624
			memset(rxdp, 0, sizeof(struct RxD1));
2625
			skb_reserve(skb, NET_IP_ALIGN);
2626
			rxdp1->Buffer0_ptr = pci_map_single
2627
			    (ring->pdev, skb->data, size - NET_IP_ALIGN,
2628
				PCI_DMA_FROMDEVICE);
2629 2630
			if (pci_dma_mapping_error(nic->pdev,
						rxdp1->Buffer0_ptr))
2631 2632
				goto pci_map_failed;

2633
			rxdp->Control_2 =
2634
				SET_BUFFER0_SIZE_1(size - NET_IP_ALIGN);
2635 2636
			rxdp->Host_Control = (unsigned long) (skb);
		} else if (ring->rxd_mode == RXD_MODE_3B) {
2637
			/*
2638 2639
			 * 2 buffer mode -
			 * 2 buffer mode provides 128
2640 2641 2642
			 * byte aligned receive buffers.
			 */

2643
			rxdp3 = (struct RxD3*)rxdp;
2644
			/* save buffer pointers to avoid frequent dma mapping */
2645 2646
			Buffer0_ptr = rxdp3->Buffer0_ptr;
			Buffer1_ptr = rxdp3->Buffer1_ptr;
R
Ralf Baechle 已提交
2647
			memset(rxdp, 0, sizeof(struct RxD3));
2648
			/* restore the buffer pointers for dma sync*/
2649 2650
			rxdp3->Buffer0_ptr = Buffer0_ptr;
			rxdp3->Buffer1_ptr = Buffer1_ptr;
2651

2652
			ba = &ring->ba[block_no][off];
2653 2654 2655 2656 2657
			skb_reserve(skb, BUF0_LEN);
			tmp = (u64)(unsigned long) skb->data;
			tmp += ALIGN_SIZE;
			tmp &= ~ALIGN_SIZE;
			skb->data = (void *) (unsigned long)tmp;
2658
			skb_reset_tail_pointer(skb);
2659

2660
			if (from_card_up) {
2661
				rxdp3->Buffer0_ptr =
2662 2663
				   pci_map_single(ring->pdev, ba->ba_0,
					BUF0_LEN, PCI_DMA_FROMDEVICE);
2664 2665
			if (pci_dma_mapping_error(nic->pdev,
						rxdp3->Buffer0_ptr))
2666 2667
					goto pci_map_failed;
			} else
2668
				pci_dma_sync_single_for_device(ring->pdev,
2669
				(dma_addr_t) rxdp3->Buffer0_ptr,
2670
				    BUF0_LEN, PCI_DMA_FROMDEVICE);
2671

2672
			rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN);
2673
			if (ring->rxd_mode == RXD_MODE_3B) {
2674 2675 2676
				/* Two buffer mode */

				/*
2677
				 * Buffer2 will have L3/L4 header plus
2678 2679
				 * L4 payload
				 */
2680
				rxdp3->Buffer2_ptr = pci_map_single
2681
				(ring->pdev, skb->data, ring->mtu + 4,
2682 2683
						PCI_DMA_FROMDEVICE);

2684 2685
				if (pci_dma_mapping_error(nic->pdev,
							rxdp3->Buffer2_ptr))
2686 2687
					goto pci_map_failed;

2688
				if (from_card_up) {
2689 2690
					rxdp3->Buffer1_ptr =
						pci_map_single(ring->pdev,
2691 2692
						ba->ba_1, BUF1_LEN,
						PCI_DMA_FROMDEVICE);
2693

2694 2695
					if (pci_dma_mapping_error(nic->pdev,
						rxdp3->Buffer1_ptr)) {
2696 2697 2698 2699 2700 2701 2702 2703
						pci_unmap_single
							(ring->pdev,
						    (dma_addr_t)(unsigned long)
							skb->data,
							ring->mtu + 4,
							PCI_DMA_FROMDEVICE);
						goto pci_map_failed;
					}
2704
				}
2705 2706
				rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1);
				rxdp->Control_2 |= SET_BUFFER2_SIZE_3
2707
								(ring->mtu + 4);
2708
			}
J
Jiri Slaby 已提交
2709
			rxdp->Control_2 |= s2BIT(0);
2710
			rxdp->Host_Control = (unsigned long) (skb);
L
Linus Torvalds 已提交
2711
		}
2712 2713
		if (alloc_tab & ((1 << rxsync_frequency) - 1))
			rxdp->Control_1 |= RXD_OWN_XENA;
L
Linus Torvalds 已提交
2714
		off++;
2715
		if (off == (ring->rxd_count + 1))
2716
			off = 0;
2717
		ring->rx_curr_put_info.offset = off;
2718

2719
		rxdp->Control_2 |= SET_RXD_MARKER;
2720 2721 2722 2723 2724 2725 2726
		if (!(alloc_tab & ((1 << rxsync_frequency) - 1))) {
			if (first_rxdp) {
				wmb();
				first_rxdp->Control_1 |= RXD_OWN_XENA;
			}
			first_rxdp = rxdp;
		}
2727
		ring->rx_bufs_left += 1;
L
Linus Torvalds 已提交
2728 2729 2730 2731
		alloc_tab++;
	}

      end:
2732 2733 2734 2735 2736 2737 2738 2739 2740
	/* Transfer ownership of first descriptor to adapter just before
	 * exiting. Before that, use memory barrier so that ownership
	 * and other fields are seen by adapter correctly.
	 */
	if (first_rxdp) {
		wmb();
		first_rxdp->Control_1 |= RXD_OWN_XENA;
	}

L
Linus Torvalds 已提交
2741
	return SUCCESS;
2742 2743 2744 2745 2746
pci_map_failed:
	stats->pci_map_fail_cnt++;
	stats->mem_freed += skb->truesize;
	dev_kfree_skb_irq(skb);
	return -ENOMEM;
L
Linus Torvalds 已提交
2747 2748
}

2749 2750 2751 2752 2753
static void free_rxd_blk(struct s2io_nic *sp, int ring_no, int blk)
{
	struct net_device *dev = sp->dev;
	int j;
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2754 2755 2756
	struct RxD_t *rxdp;
	struct mac_info *mac_control;
	struct buffAdd *ba;
2757 2758
	struct RxD1 *rxdp1;
	struct RxD3 *rxdp3;
2759 2760 2761 2762 2763 2764 2765 2766 2767 2768 2769

	mac_control = &sp->mac_control;
	for (j = 0 ; j < rxd_count[sp->rxd_mode]; j++) {
		rxdp = mac_control->rings[ring_no].
                                rx_blocks[blk].rxds[j].virt_addr;
		skb = (struct sk_buff *)
			((unsigned long) rxdp->Host_Control);
		if (!skb) {
			continue;
		}
		if (sp->rxd_mode == RXD_MODE_1) {
2770
			rxdp1 = (struct RxD1*)rxdp;
2771
			pci_unmap_single(sp->pdev, (dma_addr_t)
2772 2773 2774 2775 2776 2777
				rxdp1->Buffer0_ptr,
				dev->mtu +
				HEADER_ETHERNET_II_802_3_SIZE
				+ HEADER_802_2_SIZE +
				HEADER_SNAP_SIZE,
				PCI_DMA_FROMDEVICE);
R
Ralf Baechle 已提交
2778
			memset(rxdp, 0, sizeof(struct RxD1));
2779
		} else if(sp->rxd_mode == RXD_MODE_3B) {
2780
			rxdp3 = (struct RxD3*)rxdp;
2781 2782 2783
			ba = &mac_control->rings[ring_no].
				ba[blk][j];
			pci_unmap_single(sp->pdev, (dma_addr_t)
2784 2785
				rxdp3->Buffer0_ptr,
				BUF0_LEN,
2786 2787
				PCI_DMA_FROMDEVICE);
			pci_unmap_single(sp->pdev, (dma_addr_t)
2788 2789
				rxdp3->Buffer1_ptr,
				BUF1_LEN,
2790 2791
				PCI_DMA_FROMDEVICE);
			pci_unmap_single(sp->pdev, (dma_addr_t)
2792 2793
				rxdp3->Buffer2_ptr,
				dev->mtu + 4,
2794
				PCI_DMA_FROMDEVICE);
R
Ralf Baechle 已提交
2795
			memset(rxdp, 0, sizeof(struct RxD3));
2796
		}
2797
		sp->mac_control.stats_info->sw_stat.mem_freed += skb->truesize;
2798
		dev_kfree_skb(skb);
2799
		mac_control->rings[ring_no].rx_bufs_left -= 1;
2800 2801 2802
	}
}

L
Linus Torvalds 已提交
2803
/**
2804
 *  free_rx_buffers - Frees all Rx buffers
L
Linus Torvalds 已提交
2805
 *  @sp: device private variable.
2806
 *  Description:
L
Linus Torvalds 已提交
2807 2808 2809 2810 2811 2812 2813 2814
 *  This function will free all Rx buffers allocated by host.
 *  Return Value:
 *  NONE.
 */

static void free_rx_buffers(struct s2io_nic *sp)
{
	struct net_device *dev = sp->dev;
2815
	int i, blk = 0, buf_cnt = 0;
R
Ralf Baechle 已提交
2816
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2817 2818 2819 2820 2821 2822
	struct config_param *config;

	mac_control = &sp->mac_control;
	config = &sp->config;

	for (i = 0; i < config->rx_ring_num; i++) {
2823 2824
		struct ring_info *ring = &mac_control->rings[i];

2825 2826
		for (blk = 0; blk < rx_ring_sz[i]; blk++)
			free_rxd_blk(sp,i,blk);
L
Linus Torvalds 已提交
2827

2828 2829 2830 2831 2832
		ring->rx_curr_put_info.block_index = 0;
		ring->rx_curr_get_info.block_index = 0;
		ring->rx_curr_put_info.offset = 0;
		ring->rx_curr_get_info.offset = 0;
		ring->rx_bufs_left = 0;
L
Linus Torvalds 已提交
2833 2834 2835 2836 2837
		DBG_PRINT(INIT_DBG, "%s:Freed 0x%x Rx Buffers on ring%d\n",
			  dev->name, buf_cnt, i);
	}
}

2838
static int s2io_chk_rx_buffers(struct s2io_nic *nic, struct ring_info *ring)
2839
{
2840
	if (fill_rx_buffers(nic, ring, 0) == -ENOMEM) {
2841 2842 2843 2844 2845 2846
		DBG_PRINT(INFO_DBG, "%s:Out of memory", ring->dev->name);
		DBG_PRINT(INFO_DBG, " in Rx Intr!!\n");
	}
	return 0;
}

L
Linus Torvalds 已提交
2847 2848
/**
 * s2io_poll - Rx interrupt handler for NAPI support
2849
 * @napi : pointer to the napi structure.
2850
 * @budget : The number of packets that were budgeted to be processed
L
Linus Torvalds 已提交
2851 2852 2853 2854 2855 2856 2857 2858 2859
 * during  one pass through the 'Poll" function.
 * Description:
 * Comes into picture only if NAPI support has been incorporated. It does
 * the same thing that rx_intr_handler does, but not in a interrupt context
 * also It will process only a given number of packets.
 * Return value:
 * 0 on success and 1 if there are No Rx packets to be processed.
 */

2860
static int s2io_poll_msix(struct napi_struct *napi, int budget)
L
Linus Torvalds 已提交
2861
{
2862 2863
	struct ring_info *ring = container_of(napi, struct ring_info, napi);
	struct net_device *dev = ring->dev;
L
Linus Torvalds 已提交
2864
	struct config_param *config;
2865 2866
	struct mac_info *mac_control;
	int pkts_processed = 0;
A
Al Viro 已提交
2867 2868
	u8 __iomem *addr = NULL;
	u8 val8 = 0;
2869
	struct s2io_nic *nic = netdev_priv(dev);
R
Ralf Baechle 已提交
2870
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
2871
	int budget_org = budget;
L
Linus Torvalds 已提交
2872 2873

	config = &nic->config;
2874
	mac_control = &nic->mac_control;
L
Linus Torvalds 已提交
2875

2876 2877
	if (unlikely(!is_s2io_card_up(nic)))
		return 0;
L
Linus Torvalds 已提交
2878

2879
	pkts_processed = rx_intr_handler(ring, budget);
2880
	s2io_chk_rx_buffers(nic, ring);
L
Linus Torvalds 已提交
2881

2882
	if (pkts_processed < budget_org) {
2883
		napi_complete(napi);
2884
		/*Re Enable MSI-Rx Vector*/
A
Al Viro 已提交
2885
		addr = (u8 __iomem *)&bar0->xmsi_mask_reg;
2886 2887 2888 2889
		addr += 7 - ring->ring_no;
		val8 = (ring->ring_no == 0) ? 0x3f : 0xbf;
		writeb(val8, addr);
		val8 = readb(addr);
L
Linus Torvalds 已提交
2890
	}
2891 2892 2893 2894 2895 2896 2897 2898 2899 2900 2901
	return pkts_processed;
}
static int s2io_poll_inta(struct napi_struct *napi, int budget)
{
	struct s2io_nic *nic = container_of(napi, struct s2io_nic, napi);
	struct config_param *config;
	struct mac_info *mac_control;
	int pkts_processed = 0;
	int ring_pkts_processed, i;
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
	int budget_org = budget;
L
Linus Torvalds 已提交
2902

2903 2904
	config = &nic->config;
	mac_control = &nic->mac_control;
L
Linus Torvalds 已提交
2905

2906 2907
	if (unlikely(!is_s2io_card_up(nic)))
		return 0;
L
Linus Torvalds 已提交
2908 2909

	for (i = 0; i < config->rx_ring_num; i++) {
2910
		struct ring_info *ring = &mac_control->rings[i];
2911
		ring_pkts_processed = rx_intr_handler(ring, budget);
2912
		s2io_chk_rx_buffers(nic, ring);
2913 2914 2915
		pkts_processed += ring_pkts_processed;
		budget -= ring_pkts_processed;
		if (budget <= 0)
L
Linus Torvalds 已提交
2916 2917
			break;
	}
2918
	if (pkts_processed < budget_org) {
2919
		napi_complete(napi);
2920 2921 2922 2923 2924
		/* Re enable the Rx interrupts for the ring */
		writeq(0, &bar0->rx_traffic_mask);
		readl(&bar0->rx_traffic_mask);
	}
	return pkts_processed;
L
Linus Torvalds 已提交
2925
}
2926

2927
#ifdef CONFIG_NET_POLL_CONTROLLER
2928
/**
2929
 * s2io_netpoll - netpoll event handler entry point
2930 2931
 * @dev : pointer to the device structure.
 * Description:
2932 2933 2934 2935
 * 	This function will be called by upper layer to check for events on the
 * interface in situations where interrupts are disabled. It is used for
 * specific in-kernel networking tasks, such as remote consoles and kernel
 * debugging over the network (example netdump in RedHat).
2936 2937 2938
 */
static void s2io_netpoll(struct net_device *dev)
{
2939
	struct s2io_nic *nic = netdev_priv(dev);
R
Ralf Baechle 已提交
2940
	struct mac_info *mac_control;
2941
	struct config_param *config;
R
Ralf Baechle 已提交
2942
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
2943
	u64 val64 = 0xFFFFFFFFFFFFFFFFULL;
2944 2945
	int i;

2946 2947 2948
	if (pci_channel_offline(nic->pdev))
		return;

2949 2950 2951 2952 2953 2954
	disable_irq(dev->irq);

	mac_control = &nic->mac_control;
	config = &nic->config;

	writeq(val64, &bar0->rx_traffic_int);
2955 2956
	writeq(val64, &bar0->tx_traffic_int);

2957
	/* we need to free up the transmitted skbufs or else netpoll will
2958 2959 2960 2961 2962
	 * run out of skbs and will fail and eventually netpoll application such
	 * as netdump will fail.
	 */
	for (i = 0; i < config->tx_fifo_num; i++)
		tx_intr_handler(&mac_control->fifos[i]);
2963

2964
	/* check for received packet and indicate up to network */
2965 2966 2967 2968 2969
	for (i = 0; i < config->rx_ring_num; i++) {
		struct ring_info *ring = &mac_control->rings[i];

		rx_intr_handler(ring, 0);
	}
2970 2971

	for (i = 0; i < config->rx_ring_num; i++) {
2972 2973 2974
		struct ring_info *ring = &mac_control->rings[i];

		if (fill_rx_buffers(nic, ring, 0) == -ENOMEM) {
2975 2976
			DBG_PRINT(INFO_DBG, "%s:Out of memory", dev->name);
			DBG_PRINT(INFO_DBG, " in Rx Netpoll!!\n");
2977 2978 2979 2980 2981 2982 2983 2984
			break;
		}
	}
	enable_irq(dev->irq);
	return;
}
#endif

2985
/**
L
Linus Torvalds 已提交
2986
 *  rx_intr_handler - Rx interrupt handler
2987 2988
 *  @ring_info: per ring structure.
 *  @budget: budget for napi processing.
2989 2990
 *  Description:
 *  If the interrupt is because of a received frame or if the
L
Linus Torvalds 已提交
2991
 *  receive ring contains fresh as yet un-processed frames,this function is
2992 2993
 *  called. It picks out the RxD at which place the last Rx processing had
 *  stopped and sends the skb to the OSM's Rx handler and then increments
L
Linus Torvalds 已提交
2994 2995
 *  the offset.
 *  Return Value:
2996
 *  No. of napi packets processed.
L
Linus Torvalds 已提交
2997
 */
2998
static int rx_intr_handler(struct ring_info *ring_data, int budget)
L
Linus Torvalds 已提交
2999
{
3000
	int get_block, put_block;
R
Ralf Baechle 已提交
3001 3002
	struct rx_curr_get_info get_info, put_info;
	struct RxD_t *rxdp;
L
Linus Torvalds 已提交
3003
	struct sk_buff *skb;
3004
	int pkt_cnt = 0, napi_pkts = 0;
3005
	int i;
3006 3007
	struct RxD1* rxdp1;
	struct RxD3* rxdp3;
3008

3009 3010
	get_info = ring_data->rx_curr_get_info;
	get_block = get_info.block_index;
R
Ralf Baechle 已提交
3011
	memcpy(&put_info, &ring_data->rx_curr_put_info, sizeof(put_info));
3012
	put_block = put_info.block_index;
3013
	rxdp = ring_data->rx_blocks[get_block].rxds[get_info.offset].virt_addr;
3014

3015
	while (RXD_IS_UP2DT(rxdp)) {
3016 3017 3018 3019
		/*
		 * If your are next to put index then it's
		 * FIFO full condition
		 */
3020 3021
		if ((get_block == put_block) &&
		    (get_info.offset + 1) == put_info.offset) {
3022 3023
			DBG_PRINT(INTR_DBG, "%s: Ring Full\n",
				ring_data->dev->name);
3024 3025
			break;
		}
3026 3027 3028
		skb = (struct sk_buff *) ((unsigned long)rxdp->Host_Control);
		if (skb == NULL) {
			DBG_PRINT(ERR_DBG, "%s: The skb is ",
3029
				  ring_data->dev->name);
3030
			DBG_PRINT(ERR_DBG, "Null in Rx Intr\n");
3031
			return 0;
L
Linus Torvalds 已提交
3032
		}
3033
		if (ring_data->rxd_mode == RXD_MODE_1) {
3034
			rxdp1 = (struct RxD1*)rxdp;
3035
			pci_unmap_single(ring_data->pdev, (dma_addr_t)
3036
				rxdp1->Buffer0_ptr,
3037
				ring_data->mtu +
3038 3039 3040 3041
				HEADER_ETHERNET_II_802_3_SIZE +
				HEADER_802_2_SIZE +
				HEADER_SNAP_SIZE,
				PCI_DMA_FROMDEVICE);
3042
		} else if (ring_data->rxd_mode == RXD_MODE_3B) {
3043
			rxdp3 = (struct RxD3*)rxdp;
3044
			pci_dma_sync_single_for_cpu(ring_data->pdev, (dma_addr_t)
3045 3046
				rxdp3->Buffer0_ptr,
				BUF0_LEN, PCI_DMA_FROMDEVICE);
3047
			pci_unmap_single(ring_data->pdev, (dma_addr_t)
3048
				rxdp3->Buffer2_ptr,
3049
				ring_data->mtu + 4,
3050
				PCI_DMA_FROMDEVICE);
3051
		}
3052
		prefetch(skb->data);
3053 3054
		rx_osm_handler(ring_data, rxdp);
		get_info.offset++;
3055 3056 3057
		ring_data->rx_curr_get_info.offset = get_info.offset;
		rxdp = ring_data->rx_blocks[get_block].
				rxds[get_info.offset].virt_addr;
3058
		if (get_info.offset == rxd_count[ring_data->rxd_mode]) {
3059
			get_info.offset = 0;
3060
			ring_data->rx_curr_get_info.offset = get_info.offset;
3061
			get_block++;
3062 3063 3064
			if (get_block == ring_data->block_count)
				get_block = 0;
			ring_data->rx_curr_get_info.block_index = get_block;
3065 3066
			rxdp = ring_data->rx_blocks[get_block].block_virt_addr;
		}
L
Linus Torvalds 已提交
3067

3068 3069 3070 3071
		if (ring_data->nic->config.napi) {
			budget--;
			napi_pkts++;
			if (!budget)
3072 3073
				break;
		}
3074
		pkt_cnt++;
L
Linus Torvalds 已提交
3075 3076 3077
		if ((indicate_max_pkts) && (pkt_cnt > indicate_max_pkts))
			break;
	}
3078
	if (ring_data->lro) {
3079 3080
		/* Clear all LRO sessions before exiting */
		for (i=0; i<MAX_LRO_SESSIONS; i++) {
3081
			struct lro *lro = &ring_data->lro0_n[i];
3082
			if (lro->in_use) {
3083
				update_L3L4_header(ring_data->nic, lro);
3084
				queue_rx_frame(lro->parent, lro->vlan_tag);
3085 3086 3087 3088
				clear_lro_session(lro);
			}
		}
	}
3089
	return(napi_pkts);
L
Linus Torvalds 已提交
3090
}
3091 3092

/**
L
Linus Torvalds 已提交
3093 3094
 *  tx_intr_handler - Transmit interrupt handler
 *  @nic : device private variable
3095 3096 3097 3098
 *  Description:
 *  If an interrupt was raised to indicate DMA complete of the
 *  Tx packet, this function is called. It identifies the last TxD
 *  whose buffer was freed and frees all skbs whose data have already
L
Linus Torvalds 已提交
3099 3100 3101 3102 3103
 *  DMA'ed into the NICs internal memory.
 *  Return Value:
 *  NONE
 */

R
Ralf Baechle 已提交
3104
static void tx_intr_handler(struct fifo_info *fifo_data)
L
Linus Torvalds 已提交
3105
{
R
Ralf Baechle 已提交
3106 3107
	struct s2io_nic *nic = fifo_data->nic;
	struct tx_curr_get_info get_info, put_info;
3108
	struct sk_buff *skb = NULL;
R
Ralf Baechle 已提交
3109
	struct TxD *txdlp;
3110
	int pkt_cnt = 0;
3111
	unsigned long flags = 0;
3112
	u8 err_mask;
L
Linus Torvalds 已提交
3113

3114 3115 3116
	if (!spin_trylock_irqsave(&fifo_data->tx_lock, flags))
			return;

3117
	get_info = fifo_data->tx_curr_get_info;
R
Ralf Baechle 已提交
3118 3119
	memcpy(&put_info, &fifo_data->tx_curr_put_info, sizeof(put_info));
	txdlp = (struct TxD *) fifo_data->list_info[get_info.offset].
3120 3121 3122 3123 3124 3125 3126 3127
	    list_virt_addr;
	while ((!(txdlp->Control_1 & TXD_LIST_OWN_XENA)) &&
	       (get_info.offset != put_info.offset) &&
	       (txdlp->Host_Control)) {
		/* Check for TxD errors */
		if (txdlp->Control_1 & TXD_T_CODE) {
			unsigned long long err;
			err = txdlp->Control_1 & TXD_T_CODE;
3128 3129 3130 3131
			if (err & 0x1) {
				nic->mac_control.stats_info->sw_stat.
						parity_err_cnt++;
			}
3132 3133

			/* update t_code statistics */
3134 3135
			err_mask = err >> 48;
			switch(err_mask) {
3136 3137 3138 3139 3140 3141 3142 3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154 3155 3156 3157 3158 3159 3160
				case 2:
					nic->mac_control.stats_info->sw_stat.
							tx_buf_abort_cnt++;
				break;

				case 3:
					nic->mac_control.stats_info->sw_stat.
							tx_desc_abort_cnt++;
				break;

				case 7:
					nic->mac_control.stats_info->sw_stat.
							tx_parity_err_cnt++;
				break;

				case 10:
					nic->mac_control.stats_info->sw_stat.
							tx_link_loss_cnt++;
				break;

				case 15:
					nic->mac_control.stats_info->sw_stat.
							tx_list_proc_err_cnt++;
				break;
                        }
3161
		}
L
Linus Torvalds 已提交
3162

A
Ananda Raju 已提交
3163
		skb = s2io_txdl_getskb(fifo_data, txdlp, get_info.offset);
3164
		if (skb == NULL) {
3165
			spin_unlock_irqrestore(&fifo_data->tx_lock, flags);
3166
			DBG_PRINT(ERR_DBG, "%s: Null skb ",
3167
			__func__);
3168 3169 3170
			DBG_PRINT(ERR_DBG, "in Tx Free Intr\n");
			return;
		}
3171
		pkt_cnt++;
3172 3173

		/* Updating the statistics block */
3174
		nic->dev->stats.tx_bytes += skb->len;
3175
		nic->mac_control.stats_info->sw_stat.mem_freed += skb->truesize;
3176 3177 3178
		dev_kfree_skb_irq(skb);

		get_info.offset++;
3179 3180
		if (get_info.offset == get_info.fifo_len + 1)
			get_info.offset = 0;
R
Ralf Baechle 已提交
3181
		txdlp = (struct TxD *) fifo_data->list_info
3182 3183 3184
		    [get_info.offset].list_virt_addr;
		fifo_data->tx_curr_get_info.offset =
		    get_info.offset;
L
Linus Torvalds 已提交
3185 3186
	}

3187
	s2io_wake_tx_queue(fifo_data, pkt_cnt, nic->config.multiq);
3188 3189

	spin_unlock_irqrestore(&fifo_data->tx_lock, flags);
L
Linus Torvalds 已提交
3190 3191
}

3192 3193 3194 3195 3196 3197 3198 3199 3200 3201 3202 3203 3204
/**
 *  s2io_mdio_write - Function to write in to MDIO registers
 *  @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
 *  @addr     : address value
 *  @value    : data value
 *  @dev      : pointer to net_device structure
 *  Description:
 *  This function is used to write values to the MDIO registers
 *  NONE
 */
static void s2io_mdio_write(u32 mmd_type, u64 addr, u16 value, struct net_device *dev)
{
	u64 val64 = 0x0;
3205
	struct s2io_nic *sp = netdev_priv(dev);
R
Ralf Baechle 已提交
3206
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250 3251 3252 3253

	//address transaction
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	//Data transaction
	val64 = 0x0;
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0)
			| MDIO_MDIO_DATA(value)
			| MDIO_OP(MDIO_OP_WRITE_TRANS);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	val64 = 0x0;
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
	| MDIO_MMD_DEV_ADDR(mmd_type)
	| MDIO_MMS_PRT_ADDR(0x0)
	| MDIO_OP(MDIO_OP_READ_TRANS);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

}

/**
 *  s2io_mdio_read - Function to write in to MDIO registers
 *  @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
 *  @addr     : address value
 *  @dev      : pointer to net_device structure
 *  Description:
 *  This function is used to read values to the MDIO registers
 *  NONE
 */
static u64 s2io_mdio_read(u32 mmd_type, u64 addr, struct net_device *dev)
{
	u64 val64 = 0x0;
	u64 rval64 = 0x0;
3254
	struct s2io_nic *sp = netdev_priv(dev);
R
Ralf Baechle 已提交
3255
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
3256 3257 3258 3259 3260 3261 3262 3263 3264 3265 3266 3267 3268 3269 3270 3271 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306 3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356 3357

	/* address transaction */
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	/* Data transaction */
	val64 = 0x0;
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0)
			| MDIO_OP(MDIO_OP_READ_TRANS);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	/* Read the value from regs */
	rval64 = readq(&bar0->mdio_control);
	rval64 = rval64 & 0xFFFF0000;
	rval64 = rval64 >> 16;
	return rval64;
}
/**
 *  s2io_chk_xpak_counter - Function to check the status of the xpak counters
 *  @counter      : couter value to be updated
 *  @flag         : flag to indicate the status
 *  @type         : counter type
 *  Description:
 *  This function is to check the status of the xpak counters value
 *  NONE
 */

static void s2io_chk_xpak_counter(u64 *counter, u64 * regs_stat, u32 index, u16 flag, u16 type)
{
	u64 mask = 0x3;
	u64 val64;
	int i;
	for(i = 0; i <index; i++)
		mask = mask << 0x2;

	if(flag > 0)
	{
		*counter = *counter + 1;
		val64 = *regs_stat & mask;
		val64 = val64 >> (index * 0x2);
		val64 = val64 + 1;
		if(val64 == 3)
		{
			switch(type)
			{
			case 1:
				DBG_PRINT(ERR_DBG, "Take Xframe NIC out of "
					  "service. Excessive temperatures may "
					  "result in premature transceiver "
					  "failure \n");
			break;
			case 2:
				DBG_PRINT(ERR_DBG, "Take Xframe NIC out of "
					  "service Excessive bias currents may "
					  "indicate imminent laser diode "
					  "failure \n");
			break;
			case 3:
				DBG_PRINT(ERR_DBG, "Take Xframe NIC out of "
					  "service Excessive laser output "
					  "power may saturate far-end "
					  "receiver\n");
			break;
			default:
				DBG_PRINT(ERR_DBG, "Incorrect XPAK Alarm "
					  "type \n");
			}
			val64 = 0x0;
		}
		val64 = val64 << (index * 0x2);
		*regs_stat = (*regs_stat & (~mask)) | (val64);

	} else {
		*regs_stat = *regs_stat & (~mask);
	}
}

/**
 *  s2io_updt_xpak_counter - Function to update the xpak counters
 *  @dev         : pointer to net_device struct
 *  Description:
 *  This function is to upate the status of the xpak counters value
 *  NONE
 */
static void s2io_updt_xpak_counter(struct net_device *dev)
{
	u16 flag  = 0x0;
	u16 type  = 0x0;
	u16 val16 = 0x0;
	u64 val64 = 0x0;
	u64 addr  = 0x0;

3358
	struct s2io_nic *sp = netdev_priv(dev);
R
Ralf Baechle 已提交
3359
	struct stat_block *stat_info = sp->mac_control.stats_info;
3360 3361

	/* Check the communication with the MDIO slave */
3362
	addr = MDIO_CTRL1;
3363
	val64 = 0x0;
3364
	val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
3365 3366 3367 3368 3369 3370 3371
	if((val64 == 0xFFFF) || (val64 == 0x0000))
	{
		DBG_PRINT(ERR_DBG, "ERR: MDIO slave access failed - "
			  "Returned %llx\n", (unsigned long long)val64);
		return;
	}

3372 3373
	/* Check for the expected value of control reg 1 */
	if(val64 != MDIO_CTRL1_SPEED10G)
3374 3375
	{
		DBG_PRINT(ERR_DBG, "Incorrect value at PMA address 0x0000 - ");
3376 3377
		DBG_PRINT(ERR_DBG, "Returned: %llx- Expected: 0x%x\n",
			  (unsigned long long)val64, MDIO_CTRL1_SPEED10G);
3378 3379 3380 3381 3382
		return;
	}

	/* Loading the DOM register to MDIO register */
	addr = 0xA100;
3383 3384
	s2io_mdio_write(MDIO_MMD_PMAPMD, addr, val16, dev);
	val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
3385 3386 3387 3388

	/* Reading the Alarm flags */
	addr = 0xA070;
	val64 = 0x0;
3389
	val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
3390 3391 3392 3393 3394 3395 3396 3397 3398 3399 3400 3401 3402 3403 3404 3405 3406 3407 3408 3409 3410 3411 3412 3413 3414 3415 3416 3417 3418 3419 3420

	flag = CHECKBIT(val64, 0x7);
	type = 1;
	s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_transceiver_temp_high,
				&stat_info->xpak_stat.xpak_regs_stat,
				0x0, flag, type);

	if(CHECKBIT(val64, 0x6))
		stat_info->xpak_stat.alarm_transceiver_temp_low++;

	flag = CHECKBIT(val64, 0x3);
	type = 2;
	s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_laser_bias_current_high,
				&stat_info->xpak_stat.xpak_regs_stat,
				0x2, flag, type);

	if(CHECKBIT(val64, 0x2))
		stat_info->xpak_stat.alarm_laser_bias_current_low++;

	flag = CHECKBIT(val64, 0x1);
	type = 3;
	s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_laser_output_power_high,
				&stat_info->xpak_stat.xpak_regs_stat,
				0x4, flag, type);

	if(CHECKBIT(val64, 0x0))
		stat_info->xpak_stat.alarm_laser_output_power_low++;

	/* Reading the Warning flags */
	addr = 0xA074;
	val64 = 0x0;
3421
	val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
3422 3423 3424 3425 3426 3427 3428 3429 3430 3431 3432 3433 3434 3435 3436 3437 3438 3439 3440 3441

	if(CHECKBIT(val64, 0x7))
		stat_info->xpak_stat.warn_transceiver_temp_high++;

	if(CHECKBIT(val64, 0x6))
		stat_info->xpak_stat.warn_transceiver_temp_low++;

	if(CHECKBIT(val64, 0x3))
		stat_info->xpak_stat.warn_laser_bias_current_high++;

	if(CHECKBIT(val64, 0x2))
		stat_info->xpak_stat.warn_laser_bias_current_low++;

	if(CHECKBIT(val64, 0x1))
		stat_info->xpak_stat.warn_laser_output_power_high++;

	if(CHECKBIT(val64, 0x0))
		stat_info->xpak_stat.warn_laser_output_power_low++;
}

3442
/**
L
Linus Torvalds 已提交
3443
 *  wait_for_cmd_complete - waits for a command to complete.
3444
 *  @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
3445
 *  s2io_nic structure.
3446 3447 3448
 *  Description: Function that waits for a command to Write into RMAC
 *  ADDR DATA registers to be completed and returns either success or
 *  error depending on whether the command was complete or not.
L
Linus Torvalds 已提交
3449 3450 3451 3452
 *  Return value:
 *   SUCCESS on success and FAILURE on failure.
 */

3453 3454
static int wait_for_cmd_complete(void __iomem *addr, u64 busy_bit,
				int bit_state)
L
Linus Torvalds 已提交
3455
{
3456
	int ret = FAILURE, cnt = 0, delay = 1;
L
Linus Torvalds 已提交
3457 3458
	u64 val64;

3459 3460 3461 3462
	if ((bit_state != S2IO_BIT_RESET) && (bit_state != S2IO_BIT_SET))
		return FAILURE;

	do {
A
Ananda Raju 已提交
3463
		val64 = readq(addr);
3464 3465 3466 3467 3468 3469 3470 3471 3472 3473
		if (bit_state == S2IO_BIT_RESET) {
			if (!(val64 & busy_bit)) {
				ret = SUCCESS;
				break;
			}
		} else {
			if (!(val64 & busy_bit)) {
				ret = SUCCESS;
				break;
			}
L
Linus Torvalds 已提交
3474
		}
A
Ananda Raju 已提交
3475 3476

		if(in_interrupt())
3477
			mdelay(delay);
A
Ananda Raju 已提交
3478
		else
3479
			msleep(delay);
A
Ananda Raju 已提交
3480

3481 3482 3483
		if (++cnt >= 10)
			delay = 50;
	} while (cnt < 20);
L
Linus Torvalds 已提交
3484 3485
	return ret;
}
3486 3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497 3498 3499 3500 3501 3502 3503 3504
/*
 * check_pci_device_id - Checks if the device id is supported
 * @id : device id
 * Description: Function to check if the pci device id is supported by driver.
 * Return value: Actual device id if supported else PCI_ANY_ID
 */
static u16 check_pci_device_id(u16 id)
{
	switch (id) {
	case PCI_DEVICE_ID_HERC_WIN:
	case PCI_DEVICE_ID_HERC_UNI:
		return XFRAME_II_DEVICE;
	case PCI_DEVICE_ID_S2IO_UNI:
	case PCI_DEVICE_ID_S2IO_WIN:
		return XFRAME_I_DEVICE;
	default:
		return PCI_ANY_ID;
	}
}
L
Linus Torvalds 已提交
3505

3506 3507
/**
 *  s2io_reset - Resets the card.
L
Linus Torvalds 已提交
3508 3509
 *  @sp : private member of the device structure.
 *  Description: Function to Reset the card. This function then also
3510
 *  restores the previously saved PCI configuration space registers as
L
Linus Torvalds 已提交
3511 3512 3513 3514 3515
 *  the card reset also resets the configuration space.
 *  Return value:
 *  void.
 */

R
Ralf Baechle 已提交
3516
static void s2io_reset(struct s2io_nic * sp)
L
Linus Torvalds 已提交
3517
{
R
Ralf Baechle 已提交
3518
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
3519
	u64 val64;
3520
	u16 subid, pci_cmd;
3521 3522
	int i;
	u16 val16;
3523 3524 3525
	unsigned long long up_cnt, down_cnt, up_time, down_time, reset_cnt;
	unsigned long long mem_alloc_cnt, mem_free_cnt, watchdog_cnt;

3526
	DBG_PRINT(INIT_DBG,"%s - Resetting XFrame card %s\n",
3527
			__func__, sp->dev->name);
L
Linus Torvalds 已提交
3528

3529
	/* Back up  the PCI-X CMD reg, dont want to lose MMRBC, OST settings */
3530
	pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, &(pci_cmd));
3531

L
Linus Torvalds 已提交
3532 3533
	val64 = SW_RESET_ALL;
	writeq(val64, &bar0->sw_reset);
A
Ananda Raju 已提交
3534 3535 3536
	if (strstr(sp->product_name, "CX4")) {
		msleep(750);
	}
3537 3538
	msleep(250);
	for (i = 0; i < S2IO_MAX_PCI_CONFIG_SPACE_REINIT; i++) {
L
Linus Torvalds 已提交
3539

3540 3541 3542 3543 3544 3545 3546
		/* Restore the PCI state saved during initialization. */
		pci_restore_state(sp->pdev);
		pci_read_config_word(sp->pdev, 0x2, &val16);
		if (check_pci_device_id(val16) != (u16)PCI_ANY_ID)
			break;
		msleep(200);
	}
L
Linus Torvalds 已提交
3547

3548
	if (check_pci_device_id(val16) == (u16)PCI_ANY_ID) {
3549
		DBG_PRINT(ERR_DBG,"%s SW_Reset failed!\n", __func__);
3550 3551 3552 3553 3554
	}

	pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER, pci_cmd);

	s2io_init_pci(sp);
L
Linus Torvalds 已提交
3555

3556 3557 3558
	/* Set swapper to enable I/O register access */
	s2io_set_swapper(sp);

3559 3560 3561
	/* restore mac_addr entries */
	do_s2io_restore_unicast_mc(sp);

3562 3563 3564
	/* Restore the MSIX table entries from local variables */
	restore_xmsi_data(sp);

3565
	/* Clear certain PCI/PCI-X fields after reset */
3566
	if (sp->device_type == XFRAME_II_DEVICE) {
3567
		/* Clear "detected parity error" bit */
3568
		pci_write_config_word(sp->pdev, PCI_STATUS, 0x8000);
3569

3570 3571
		/* Clearing PCIX Ecc status register */
		pci_write_config_dword(sp->pdev, 0x68, 0x7C);
3572

3573
		/* Clearing PCI_STATUS error reflected here */
J
Jiri Slaby 已提交
3574
		writeq(s2BIT(62), &bar0->txpic_int_reg);
3575
	}
3576

3577 3578
	/* Reset device statistics maintained by OS */
	memset(&sp->stats, 0, sizeof (struct net_device_stats));
3579

3580 3581 3582 3583
	up_cnt = sp->mac_control.stats_info->sw_stat.link_up_cnt;
	down_cnt = sp->mac_control.stats_info->sw_stat.link_down_cnt;
	up_time = sp->mac_control.stats_info->sw_stat.link_up_time;
	down_time = sp->mac_control.stats_info->sw_stat.link_down_time;
3584
	reset_cnt = sp->mac_control.stats_info->sw_stat.soft_reset_cnt;
3585 3586 3587 3588
	mem_alloc_cnt = sp->mac_control.stats_info->sw_stat.mem_allocated;
	mem_free_cnt = sp->mac_control.stats_info->sw_stat.mem_freed;
	watchdog_cnt = sp->mac_control.stats_info->sw_stat.watchdog_timer_cnt;
	/* save link up/down time/cnt, reset/memory/watchdog cnt */
3589
	memset(sp->mac_control.stats_info, 0, sizeof(struct stat_block));
3590 3591 3592 3593 3594
	/* restore link up/down time/cnt, reset/memory/watchdog cnt */
	sp->mac_control.stats_info->sw_stat.link_up_cnt = up_cnt;
	sp->mac_control.stats_info->sw_stat.link_down_cnt = down_cnt;
	sp->mac_control.stats_info->sw_stat.link_up_time = up_time;
	sp->mac_control.stats_info->sw_stat.link_down_time = down_time;
3595
	sp->mac_control.stats_info->sw_stat.soft_reset_cnt = reset_cnt;
3596 3597 3598
	sp->mac_control.stats_info->sw_stat.mem_allocated = mem_alloc_cnt;
	sp->mac_control.stats_info->sw_stat.mem_freed = mem_free_cnt;
	sp->mac_control.stats_info->sw_stat.watchdog_timer_cnt = watchdog_cnt;
3599

L
Linus Torvalds 已提交
3600 3601
	/* SXE-002: Configure link and activity LED to turn it off */
	subid = sp->pdev->subsystem_device;
3602 3603
	if (((subid & 0xFF) >= 0x07) &&
	    (sp->device_type == XFRAME_I_DEVICE)) {
L
Linus Torvalds 已提交
3604 3605 3606 3607
		val64 = readq(&bar0->gpio_control);
		val64 |= 0x0000800000000000ULL;
		writeq(val64, &bar0->gpio_control);
		val64 = 0x0411040400000000ULL;
3608
		writeq(val64, (void __iomem *)bar0 + 0x2700);
L
Linus Torvalds 已提交
3609 3610
	}

3611 3612 3613 3614 3615 3616 3617 3618 3619
	/*
	 * Clear spurious ECC interrupts that would have occured on
	 * XFRAME II cards after reset.
	 */
	if (sp->device_type == XFRAME_II_DEVICE) {
		val64 = readq(&bar0->pcc_err_reg);
		writeq(val64, &bar0->pcc_err_reg);
	}

3620
	sp->device_enabled_once = false;
L
Linus Torvalds 已提交
3621 3622 3623
}

/**
3624 3625
 *  s2io_set_swapper - to set the swapper controle on the card
 *  @sp : private member of the device structure,
L
Linus Torvalds 已提交
3626
 *  pointer to the s2io_nic structure.
3627
 *  Description: Function to set the swapper control on the card
L
Linus Torvalds 已提交
3628 3629 3630 3631 3632
 *  correctly depending on the 'endianness' of the system.
 *  Return value:
 *  SUCCESS on success and FAILURE on failure.
 */

R
Ralf Baechle 已提交
3633
static int s2io_set_swapper(struct s2io_nic * sp)
L
Linus Torvalds 已提交
3634 3635
{
	struct net_device *dev = sp->dev;
R
Ralf Baechle 已提交
3636
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
3637 3638
	u64 val64, valt, valr;

3639
	/*
L
Linus Torvalds 已提交
3640 3641 3642 3643 3644 3645 3646 3647 3648 3649 3650 3651 3652 3653 3654 3655 3656 3657 3658 3659 3660 3661 3662 3663 3664 3665 3666 3667 3668 3669 3670 3671 3672 3673 3674 3675 3676 3677 3678 3679 3680 3681 3682 3683 3684 3685 3686 3687 3688 3689 3690
	 * Set proper endian settings and verify the same by reading
	 * the PIF Feed-back register.
	 */

	val64 = readq(&bar0->pif_rd_swapper_fb);
	if (val64 != 0x0123456789ABCDEFULL) {
		int i = 0;
		u64 value[] = { 0xC30000C3C30000C3ULL,   /* FE=1, SE=1 */
				0x8100008181000081ULL,  /* FE=1, SE=0 */
				0x4200004242000042ULL,  /* FE=0, SE=1 */
				0};                     /* FE=0, SE=0 */

		while(i<4) {
			writeq(value[i], &bar0->swapper_ctrl);
			val64 = readq(&bar0->pif_rd_swapper_fb);
			if (val64 == 0x0123456789ABCDEFULL)
				break;
			i++;
		}
		if (i == 4) {
			DBG_PRINT(ERR_DBG, "%s: Endian settings are wrong, ",
				dev->name);
			DBG_PRINT(ERR_DBG, "feedback read %llx\n",
				(unsigned long long) val64);
			return FAILURE;
		}
		valr = value[i];
	} else {
		valr = readq(&bar0->swapper_ctrl);
	}

	valt = 0x0123456789ABCDEFULL;
	writeq(valt, &bar0->xmsi_address);
	val64 = readq(&bar0->xmsi_address);

	if(val64 != valt) {
		int i = 0;
		u64 value[] = { 0x00C3C30000C3C300ULL,  /* FE=1, SE=1 */
				0x0081810000818100ULL,  /* FE=1, SE=0 */
				0x0042420000424200ULL,  /* FE=0, SE=1 */
				0};                     /* FE=0, SE=0 */

		while(i<4) {
			writeq((value[i] | valr), &bar0->swapper_ctrl);
			writeq(valt, &bar0->xmsi_address);
			val64 = readq(&bar0->xmsi_address);
			if(val64 == valt)
				break;
			i++;
		}
		if(i == 4) {
3691
			unsigned long long x = val64;
L
Linus Torvalds 已提交
3692
			DBG_PRINT(ERR_DBG, "Write failed, Xmsi_addr ");
3693
			DBG_PRINT(ERR_DBG, "reads:0x%llx\n", x);
L
Linus Torvalds 已提交
3694 3695 3696 3697 3698 3699 3700
			return FAILURE;
		}
	}
	val64 = readq(&bar0->swapper_ctrl);
	val64 &= 0xFFFF000000000000ULL;

#ifdef  __BIG_ENDIAN
3701 3702
	/*
	 * The device by default set to a big endian format, so a
L
Linus Torvalds 已提交
3703 3704 3705 3706 3707 3708 3709 3710 3711 3712 3713 3714
	 * big endian driver need not set anything.
	 */
	val64 |= (SWAPPER_CTRL_TXP_FE |
		 SWAPPER_CTRL_TXP_SE |
		 SWAPPER_CTRL_TXD_R_FE |
		 SWAPPER_CTRL_TXD_W_FE |
		 SWAPPER_CTRL_TXF_R_FE |
		 SWAPPER_CTRL_RXD_R_FE |
		 SWAPPER_CTRL_RXD_W_FE |
		 SWAPPER_CTRL_RXF_W_FE |
		 SWAPPER_CTRL_XMSI_FE |
		 SWAPPER_CTRL_STATS_FE | SWAPPER_CTRL_STATS_SE);
3715
	if (sp->config.intr_type == INTA)
3716
		val64 |= SWAPPER_CTRL_XMSI_SE;
L
Linus Torvalds 已提交
3717 3718
	writeq(val64, &bar0->swapper_ctrl);
#else
3719
	/*
L
Linus Torvalds 已提交
3720
	 * Initially we enable all bits to make it accessible by the
3721
	 * driver, then we selectively enable only those bits that
L
Linus Torvalds 已提交
3722 3723 3724 3725 3726 3727 3728 3729 3730 3731 3732 3733 3734 3735 3736 3737
	 * we want to set.
	 */
	val64 |= (SWAPPER_CTRL_TXP_FE |
		 SWAPPER_CTRL_TXP_SE |
		 SWAPPER_CTRL_TXD_R_FE |
		 SWAPPER_CTRL_TXD_R_SE |
		 SWAPPER_CTRL_TXD_W_FE |
		 SWAPPER_CTRL_TXD_W_SE |
		 SWAPPER_CTRL_TXF_R_FE |
		 SWAPPER_CTRL_RXD_R_FE |
		 SWAPPER_CTRL_RXD_R_SE |
		 SWAPPER_CTRL_RXD_W_FE |
		 SWAPPER_CTRL_RXD_W_SE |
		 SWAPPER_CTRL_RXF_W_FE |
		 SWAPPER_CTRL_XMSI_FE |
		 SWAPPER_CTRL_STATS_FE | SWAPPER_CTRL_STATS_SE);
3738
	if (sp->config.intr_type == INTA)
3739
		val64 |= SWAPPER_CTRL_XMSI_SE;
L
Linus Torvalds 已提交
3740 3741 3742 3743
	writeq(val64, &bar0->swapper_ctrl);
#endif
	val64 = readq(&bar0->swapper_ctrl);

3744 3745
	/*
	 * Verifying if endian settings are accurate by reading a
L
Linus Torvalds 已提交
3746 3747 3748 3749 3750 3751 3752 3753 3754 3755 3756 3757 3758 3759 3760
	 * feedback register.
	 */
	val64 = readq(&bar0->pif_rd_swapper_fb);
	if (val64 != 0x0123456789ABCDEFULL) {
		/* Endian settings are incorrect, calls for another dekko. */
		DBG_PRINT(ERR_DBG, "%s: Endian settings are wrong, ",
			  dev->name);
		DBG_PRINT(ERR_DBG, "feedback read %llx\n",
			  (unsigned long long) val64);
		return FAILURE;
	}

	return SUCCESS;
}

R
Ralf Baechle 已提交
3761
static int wait_for_msix_trans(struct s2io_nic *nic, int i)
3762
{
R
Ralf Baechle 已提交
3763
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3764 3765 3766 3767 3768
	u64 val64;
	int ret = 0, cnt = 0;

	do {
		val64 = readq(&bar0->xmsi_access);
J
Jiri Slaby 已提交
3769
		if (!(val64 & s2BIT(15)))
3770 3771 3772 3773 3774 3775 3776 3777 3778 3779 3780 3781
			break;
		mdelay(1);
		cnt++;
	} while(cnt < 5);
	if (cnt == 5) {
		DBG_PRINT(ERR_DBG, "XMSI # %d Access failed\n", i);
		ret = 1;
	}

	return ret;
}

R
Ralf Baechle 已提交
3782
static void restore_xmsi_data(struct s2io_nic *nic)
3783
{
R
Ralf Baechle 已提交
3784
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3785
	u64 val64;
3786 3787 3788 3789 3790
	int i, msix_index;


	if (nic->device_type == XFRAME_I_DEVICE)
		return;
3791

3792
	for (i=0; i < MAX_REQUESTED_MSI_X; i++) {
3793
		msix_index = (i) ? ((i-1) * 8 + 1): 0;
3794 3795
		writeq(nic->msix_info[i].addr, &bar0->xmsi_address);
		writeq(nic->msix_info[i].data, &bar0->xmsi_data);
3796
		val64 = (s2BIT(7) | s2BIT(15) | vBIT(msix_index, 26, 6));
3797
		writeq(val64, &bar0->xmsi_access);
3798
		if (wait_for_msix_trans(nic, msix_index)) {
3799
			DBG_PRINT(ERR_DBG, "failed in %s\n", __func__);
3800 3801 3802 3803 3804
			continue;
		}
	}
}

R
Ralf Baechle 已提交
3805
static void store_xmsi_data(struct s2io_nic *nic)
3806
{
R
Ralf Baechle 已提交
3807
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3808
	u64 val64, addr, data;
3809 3810 3811 3812
	int i, msix_index;

	if (nic->device_type == XFRAME_I_DEVICE)
		return;
3813 3814

	/* Store and display */
3815
	for (i=0; i < MAX_REQUESTED_MSI_X; i++) {
3816 3817
		msix_index = (i) ? ((i-1) * 8 + 1): 0;
		val64 = (s2BIT(15) | vBIT(msix_index, 26, 6));
3818
		writeq(val64, &bar0->xmsi_access);
3819
		if (wait_for_msix_trans(nic, msix_index)) {
3820
			DBG_PRINT(ERR_DBG, "failed in %s\n", __func__);
3821 3822 3823 3824 3825 3826 3827 3828 3829 3830 3831
			continue;
		}
		addr = readq(&bar0->xmsi_address);
		data = readq(&bar0->xmsi_data);
		if (addr && data) {
			nic->msix_info[i].addr = addr;
			nic->msix_info[i].data = data;
		}
	}
}

R
Ralf Baechle 已提交
3832
static int s2io_enable_msi_x(struct s2io_nic *nic)
3833
{
R
Ralf Baechle 已提交
3834
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3835
	u64 rx_mat;
3836 3837 3838
	u16 msi_control; /* Temp variable */
	int ret, i, j, msix_indx = 1;

3839
	nic->entries = kmalloc(nic->num_entries * sizeof(struct msix_entry),
3840
			       GFP_KERNEL);
3841
	if (!nic->entries) {
3842
		DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n", \
3843
			__func__);
3844
		nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
3845 3846
		return -ENOMEM;
	}
3847
	nic->mac_control.stats_info->sw_stat.mem_allocated
3848 3849 3850
		+= (nic->num_entries * sizeof(struct msix_entry));

	memset(nic->entries, 0, nic->num_entries * sizeof(struct msix_entry));
3851 3852

	nic->s2io_entries =
3853
		kmalloc(nic->num_entries * sizeof(struct s2io_msix_entry),
3854
				   GFP_KERNEL);
3855
	if (!nic->s2io_entries) {
3856
		DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n",
3857
			__func__);
3858
		nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
3859
		kfree(nic->entries);
3860
		nic->mac_control.stats_info->sw_stat.mem_freed
3861
			+= (nic->num_entries * sizeof(struct msix_entry));
3862 3863
		return -ENOMEM;
	}
3864
	 nic->mac_control.stats_info->sw_stat.mem_allocated
3865 3866 3867
		+= (nic->num_entries * sizeof(struct s2io_msix_entry));
	memset(nic->s2io_entries, 0,
		nic->num_entries * sizeof(struct s2io_msix_entry));
3868

3869 3870 3871 3872 3873 3874
	nic->entries[0].entry = 0;
	nic->s2io_entries[0].entry = 0;
	nic->s2io_entries[0].in_use = MSIX_FLG;
	nic->s2io_entries[0].type = MSIX_ALARM_TYPE;
	nic->s2io_entries[0].arg = &nic->mac_control.fifos;

3875 3876 3877
	for (i = 1; i < nic->num_entries; i++) {
		nic->entries[i].entry = ((i - 1) * 8) + 1;
		nic->s2io_entries[i].entry = ((i - 1) * 8) + 1;
3878 3879 3880 3881
		nic->s2io_entries[i].arg = NULL;
		nic->s2io_entries[i].in_use = 0;
	}

3882
	rx_mat = readq(&bar0->rx_mat);
3883
	for (j = 0; j < nic->config.rx_ring_num; j++) {
3884
		rx_mat |= RX_MAT_SET(j, msix_indx);
3885 3886 3887 3888
		nic->s2io_entries[j+1].arg = &nic->mac_control.rings[j];
		nic->s2io_entries[j+1].type = MSIX_RING_TYPE;
		nic->s2io_entries[j+1].in_use = MSIX_FLG;
		msix_indx += 8;
3889
	}
3890
	writeq(rx_mat, &bar0->rx_mat);
3891
	readq(&bar0->rx_mat);
3892

3893
	ret = pci_enable_msix(nic->pdev, nic->entries, nic->num_entries);
A
Ananda Raju 已提交
3894
	/* We fail init if error or we get less vectors than min required */
3895
	if (ret) {
3896
		DBG_PRINT(ERR_DBG, "s2io: Enabling MSI-X failed\n");
3897
		kfree(nic->entries);
3898
		nic->mac_control.stats_info->sw_stat.mem_freed
3899
			+= (nic->num_entries * sizeof(struct msix_entry));
3900
		kfree(nic->s2io_entries);
3901
		nic->mac_control.stats_info->sw_stat.mem_freed
3902
			+= (nic->num_entries * sizeof(struct s2io_msix_entry));
3903 3904 3905 3906 3907 3908 3909 3910 3911 3912 3913 3914 3915 3916 3917 3918
		nic->entries = NULL;
		nic->s2io_entries = NULL;
		return -ENOMEM;
	}

	/*
	 * To enable MSI-X, MSI also needs to be enabled, due to a bug
	 * in the herc NIC. (Temp change, needs to be removed later)
	 */
	pci_read_config_word(nic->pdev, 0x42, &msi_control);
	msi_control |= 0x1; /* Enable MSI */
	pci_write_config_word(nic->pdev, 0x42, msi_control);

	return 0;
}

3919
/* Handle software interrupt used during MSI(X) test */
3920
static irqreturn_t s2io_test_intr(int irq, void *dev_id)
3921 3922 3923 3924 3925 3926 3927 3928 3929 3930
{
	struct s2io_nic *sp = dev_id;

	sp->msi_detected = 1;
	wake_up(&sp->msi_wait);

	return IRQ_HANDLED;
}

/* Test interrupt path by forcing a a software IRQ */
3931
static int s2io_test_msi(struct s2io_nic *sp)
3932 3933 3934 3935 3936 3937 3938 3939 3940 3941 3942 3943 3944 3945 3946 3947 3948 3949 3950 3951 3952 3953 3954 3955 3956 3957 3958
{
	struct pci_dev *pdev = sp->pdev;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
	int err;
	u64 val64, saved64;

	err = request_irq(sp->entries[1].vector, s2io_test_intr, 0,
			sp->name, sp);
	if (err) {
		DBG_PRINT(ERR_DBG, "%s: PCI %s: cannot assign irq %d\n",
		       sp->dev->name, pci_name(pdev), pdev->irq);
		return err;
	}

	init_waitqueue_head (&sp->msi_wait);
	sp->msi_detected = 0;

	saved64 = val64 = readq(&bar0->scheduled_int_ctrl);
	val64 |= SCHED_INT_CTRL_ONE_SHOT;
	val64 |= SCHED_INT_CTRL_TIMER_EN;
	val64 |= SCHED_INT_CTRL_INT2MSI(1);
	writeq(val64, &bar0->scheduled_int_ctrl);

	wait_event_timeout(sp->msi_wait, sp->msi_detected, HZ/10);

	if (!sp->msi_detected) {
		/* MSI(X) test failed, go back to INTx mode */
3959
		DBG_PRINT(ERR_DBG, "%s: PCI %s: No interrupt was generated "
3960 3961 3962 3963 3964 3965 3966 3967 3968 3969 3970 3971
			"using MSI(X) during test\n", sp->dev->name,
			pci_name(pdev));

		err = -EOPNOTSUPP;
	}

	free_irq(sp->entries[1].vector, sp);

	writeq(saved64, &bar0->scheduled_int_ctrl);

	return err;
}
3972 3973 3974 3975 3976 3977

static void remove_msix_isr(struct s2io_nic *sp)
{
	int i;
	u16 msi_control;

3978
	for (i = 0; i < sp->num_entries; i++) {
3979 3980 3981 3982 3983 3984 3985 3986 3987 3988 3989 3990 3991 3992 3993 3994 3995 3996 3997 3998 3999 4000 4001 4002 4003 4004 4005
		if (sp->s2io_entries[i].in_use ==
			MSIX_REGISTERED_SUCCESS) {
			int vector = sp->entries[i].vector;
			void *arg = sp->s2io_entries[i].arg;
			free_irq(vector, arg);
		}
	}

	kfree(sp->entries);
	kfree(sp->s2io_entries);
	sp->entries = NULL;
	sp->s2io_entries = NULL;

	pci_read_config_word(sp->pdev, 0x42, &msi_control);
	msi_control &= 0xFFFE; /* Disable MSI */
	pci_write_config_word(sp->pdev, 0x42, msi_control);

	pci_disable_msix(sp->pdev);
}

static void remove_inta_isr(struct s2io_nic *sp)
{
	struct net_device *dev = sp->dev;

	free_irq(sp->pdev->irq, dev);
}

L
Linus Torvalds 已提交
4006 4007 4008 4009
/* ********************************************************* *
 * Functions defined below concern the OS part of the driver *
 * ********************************************************* */

4010
/**
L
Linus Torvalds 已提交
4011 4012 4013 4014 4015
 *  s2io_open - open entry point of the driver
 *  @dev : pointer to the device structure.
 *  Description:
 *  This function is the open entry point of the driver. It mainly calls a
 *  function to allocate Rx buffers and inserts them into the buffer
4016
 *  descriptors and then enables the Rx part of the NIC.
L
Linus Torvalds 已提交
4017 4018 4019 4020 4021
 *  Return value:
 *  0 on success and an appropriate (-)ve integer as defined in errno.h
 *   file on failure.
 */

4022
static int s2io_open(struct net_device *dev)
L
Linus Torvalds 已提交
4023
{
4024
	struct s2io_nic *sp = netdev_priv(dev);
L
Linus Torvalds 已提交
4025 4026
	int err = 0;

4027 4028
	/*
	 * Make sure you have link off by default every time
L
Linus Torvalds 已提交
4029 4030 4031
	 * Nic is initialized
	 */
	netif_carrier_off(dev);
4032
	sp->last_link_state = 0;
L
Linus Torvalds 已提交
4033 4034

	/* Initialize H/W and enable interrupts */
A
Ananda Raju 已提交
4035 4036
	err = s2io_card_up(sp);
	if (err) {
L
Linus Torvalds 已提交
4037 4038
		DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
			  dev->name);
A
Ananda Raju 已提交
4039
		goto hw_init_failed;
L
Linus Torvalds 已提交
4040 4041
	}

4042
	if (do_s2io_prog_unicast(dev, dev->dev_addr) == FAILURE) {
L
Linus Torvalds 已提交
4043
		DBG_PRINT(ERR_DBG, "Set Mac Address Failed\n");
A
Ananda Raju 已提交
4044
		s2io_card_down(sp);
4045
		err = -ENODEV;
A
Ananda Raju 已提交
4046
		goto hw_init_failed;
L
Linus Torvalds 已提交
4047
	}
4048
	s2io_start_all_tx_queue(sp);
L
Linus Torvalds 已提交
4049
	return 0;
4050 4051

hw_init_failed:
4052
	if (sp->config.intr_type == MSI_X) {
4053
		if (sp->entries) {
4054
			kfree(sp->entries);
4055
			sp->mac_control.stats_info->sw_stat.mem_freed
4056
			+= (sp->num_entries * sizeof(struct msix_entry));
4057 4058
		}
		if (sp->s2io_entries) {
4059
			kfree(sp->s2io_entries);
4060
			sp->mac_control.stats_info->sw_stat.mem_freed
4061
			+= (sp->num_entries * sizeof(struct s2io_msix_entry));
4062
		}
4063
	}
4064
	return err;
L
Linus Torvalds 已提交
4065 4066 4067 4068 4069 4070 4071 4072 4073 4074 4075 4076 4077 4078 4079
}

/**
 *  s2io_close -close entry point of the driver
 *  @dev : device pointer.
 *  Description:
 *  This is the stop entry point of the driver. It needs to undo exactly
 *  whatever was done by the open entry point,thus it's usually referred to
 *  as the close function.Among other things this function mainly stops the
 *  Rx side of the NIC and frees all the Rx buffers in the Rx rings.
 *  Return value:
 *  0 on success and an appropriate (-)ve integer as defined in errno.h
 *  file on failure.
 */

4080
static int s2io_close(struct net_device *dev)
L
Linus Torvalds 已提交
4081
{
4082
	struct s2io_nic *sp = netdev_priv(dev);
4083 4084 4085
	struct config_param *config = &sp->config;
	u64 tmp64;
	int offset;
4086

4087 4088 4089 4090 4091 4092
	/* Return if the device is already closed               *
	*  Can happen when s2io_card_up failed in change_mtu    *
	*/
	if (!is_s2io_card_up(sp))
		return 0;

4093
	s2io_stop_all_tx_queue(sp);
4094 4095 4096 4097 4098 4099 4100
	/* delete all populated mac entries */
	for (offset = 1; offset < config->max_mc_addr; offset++) {
		tmp64 = do_s2io_read_unicast_mc(sp, offset);
		if (tmp64 != S2IO_DISABLE_MAC_ENTRY)
			do_s2io_delete_unicast_mc(sp, tmp64);
	}

A
Ananda Raju 已提交
4101
	s2io_card_down(sp);
4102

L
Linus Torvalds 已提交
4103 4104 4105 4106 4107 4108 4109 4110 4111 4112 4113 4114 4115 4116 4117 4118
	return 0;
}

/**
 *  s2io_xmit - Tx entry point of te driver
 *  @skb : the socket buffer containing the Tx data.
 *  @dev : device pointer.
 *  Description :
 *  This function is the Tx entry point of the driver. S2IO NIC supports
 *  certain protocol assist features on Tx side, namely  CSO, S/G, LSO.
 *  NOTE: when device cant queue the pkt,just the trans_start variable will
 *  not be upadted.
 *  Return value:
 *  0 on success & 1 on failure.
 */

4119
static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
L
Linus Torvalds 已提交
4120
{
4121
	struct s2io_nic *sp = netdev_priv(dev);
L
Linus Torvalds 已提交
4122 4123
	u16 frg_cnt, frg_len, i, queue, queue_len, put_off, get_off;
	register u64 val64;
R
Ralf Baechle 已提交
4124 4125
	struct TxD *txdp;
	struct TxFIFO_element __iomem *tx_fifo;
4126
	unsigned long flags = 0;
4127
	u16 vlan_tag = 0;
4128
	struct fifo_info *fifo = NULL;
R
Ralf Baechle 已提交
4129
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
4130
	struct config_param *config;
4131
	int do_spin_lock = 1;
4132
	int offload_type;
4133
	int enable_per_list_interrupt = 0;
4134
	struct swStat *stats = &sp->mac_control.stats_info->sw_stat;
L
Linus Torvalds 已提交
4135 4136 4137 4138

	mac_control = &sp->mac_control;
	config = &sp->config;

4139
	DBG_PRINT(TX_DBG, "%s: In Neterion Tx routine\n", dev->name);
4140 4141 4142 4143

	if (unlikely(skb->len <= 0)) {
		DBG_PRINT(TX_DBG, "%s:Buffer has no data..\n", dev->name);
		dev_kfree_skb_any(skb);
4144
		return NETDEV_TX_OK;
4145
	}
4146

4147
	if (!is_s2io_card_up(sp)) {
4148
		DBG_PRINT(TX_DBG, "%s: Card going down for reset\n",
L
Linus Torvalds 已提交
4149
			  dev->name);
4150
		dev_kfree_skb(skb);
4151
		return NETDEV_TX_OK;
L
Linus Torvalds 已提交
4152 4153 4154
	}

	queue = 0;
4155
	if (sp->vlgrp && vlan_tx_tag_present(skb))
4156
		vlan_tag = vlan_tx_tag_get(skb);
4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167 4168 4169 4170 4171 4172 4173 4174 4175 4176 4177 4178 4179 4180 4181 4182 4183 4184 4185 4186 4187 4188 4189 4190 4191 4192
	if (sp->config.tx_steering_type == TX_DEFAULT_STEERING) {
		if (skb->protocol == htons(ETH_P_IP)) {
			struct iphdr *ip;
			struct tcphdr *th;
			ip = ip_hdr(skb);

			if ((ip->frag_off & htons(IP_OFFSET|IP_MF)) == 0) {
				th = (struct tcphdr *)(((unsigned char *)ip) +
						ip->ihl*4);

				if (ip->protocol == IPPROTO_TCP) {
					queue_len = sp->total_tcp_fifos;
					queue = (ntohs(th->source) +
							ntohs(th->dest)) &
					    sp->fifo_selector[queue_len - 1];
					if (queue >= queue_len)
						queue = queue_len - 1;
				} else if (ip->protocol == IPPROTO_UDP) {
					queue_len = sp->total_udp_fifos;
					queue = (ntohs(th->source) +
							ntohs(th->dest)) &
					    sp->fifo_selector[queue_len - 1];
					if (queue >= queue_len)
						queue = queue_len - 1;
					queue += sp->udp_fifo_idx;
					if (skb->len > 1024)
						enable_per_list_interrupt = 1;
					do_spin_lock = 0;
				}
			}
		}
	} else if (sp->config.tx_steering_type == TX_PRIORITY_STEERING)
		/* get fifo number based on skb->priority value */
		queue = config->fifo_mapping
					[skb->priority & (MAX_TX_FIFOS - 1)];
	fifo = &mac_control->fifos[queue];
4193

4194 4195 4196 4197 4198 4199
	if (do_spin_lock)
		spin_lock_irqsave(&fifo->tx_lock, flags);
	else {
		if (unlikely(!spin_trylock_irqsave(&fifo->tx_lock, flags)))
			return NETDEV_TX_LOCKED;
	}
4200

4201 4202 4203 4204 4205
	if (sp->config.multiq) {
		if (__netif_subqueue_stopped(dev, fifo->fifo_no)) {
			spin_unlock_irqrestore(&fifo->tx_lock, flags);
			return NETDEV_TX_BUSY;
		}
4206
	} else if (unlikely(fifo->queue_state == FIFO_QUEUE_STOP)) {
4207 4208 4209 4210 4211 4212
		if (netif_queue_stopped(dev)) {
			spin_unlock_irqrestore(&fifo->tx_lock, flags);
			return NETDEV_TX_BUSY;
		}
	}

4213 4214 4215
	put_off = (u16) fifo->tx_curr_put_info.offset;
	get_off = (u16) fifo->tx_curr_get_info.offset;
	txdp = (struct TxD *) fifo->list_info[put_off].list_virt_addr;
4216

4217
	queue_len = fifo->tx_curr_put_info.fifo_len + 1;
L
Linus Torvalds 已提交
4218
	/* Avoid "put" pointer going beyond "get" pointer */
4219 4220
	if (txdp->Host_Control ||
		   ((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
4221
		DBG_PRINT(TX_DBG, "Error in xmit, No free TXDs.\n");
4222
		s2io_stop_tx_queue(sp, fifo->fifo_no);
L
Linus Torvalds 已提交
4223
		dev_kfree_skb(skb);
4224
		spin_unlock_irqrestore(&fifo->tx_lock, flags);
4225
		return NETDEV_TX_OK;
L
Linus Torvalds 已提交
4226
	}
4227

4228 4229
	offload_type = s2io_offload_type(skb);
	if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
L
Linus Torvalds 已提交
4230
		txdp->Control_1 |= TXD_TCP_LSO_EN;
4231
		txdp->Control_1 |= TXD_TCP_LSO_MSS(s2io_tcp_mss(skb));
L
Linus Torvalds 已提交
4232
	}
4233
	if (skb->ip_summed == CHECKSUM_PARTIAL) {
L
Linus Torvalds 已提交
4234 4235 4236 4237
		txdp->Control_2 |=
		    (TXD_TX_CKO_IPV4_EN | TXD_TX_CKO_TCP_EN |
		     TXD_TX_CKO_UDP_EN);
	}
A
Ananda Raju 已提交
4238 4239
	txdp->Control_1 |= TXD_GATHER_CODE_FIRST;
	txdp->Control_1 |= TXD_LIST_OWN_XENA;
4240
	txdp->Control_2 |= TXD_INT_NUMBER(fifo->fifo_no);
4241 4242 4243
	if (enable_per_list_interrupt)
		if (put_off & (queue_len >> 5))
			txdp->Control_2 |= TXD_INT_TYPE_PER_LIST;
4244
	if (vlan_tag) {
4245 4246 4247 4248
		txdp->Control_2 |= TXD_VLAN_ENABLE;
		txdp->Control_2 |= TXD_VLAN_TAG(vlan_tag);
	}

A
Ananda Raju 已提交
4249
	frg_len = skb->len - skb->data_len;
4250
	if (offload_type == SKB_GSO_UDP) {
A
Ananda Raju 已提交
4251 4252
		int ufo_size;

4253
		ufo_size = s2io_udp_mss(skb);
A
Ananda Raju 已提交
4254 4255 4256 4257 4258
		ufo_size &= ~7;
		txdp->Control_1 |= TXD_UFO_EN;
		txdp->Control_1 |= TXD_UFO_MSS(ufo_size);
		txdp->Control_1 |= TXD_BUFFER0_SIZE(8);
#ifdef __BIG_ENDIAN
A
Al Viro 已提交
4259
		/* both variants do cpu_to_be64(be32_to_cpu(...)) */
4260
		fifo->ufo_in_band_v[put_off] =
A
Al Viro 已提交
4261
				(__force u64)skb_shinfo(skb)->ip6_frag_id;
A
Ananda Raju 已提交
4262
#else
4263
		fifo->ufo_in_band_v[put_off] =
A
Al Viro 已提交
4264
				(__force u64)skb_shinfo(skb)->ip6_frag_id << 32;
A
Ananda Raju 已提交
4265
#endif
4266
		txdp->Host_Control = (unsigned long)fifo->ufo_in_band_v;
A
Ananda Raju 已提交
4267
		txdp->Buffer_Pointer = pci_map_single(sp->pdev,
4268
					fifo->ufo_in_band_v,
A
Ananda Raju 已提交
4269
					sizeof(u64), PCI_DMA_TODEVICE);
4270
		if (pci_dma_mapping_error(sp->pdev, txdp->Buffer_Pointer))
4271
			goto pci_map_failed;
A
Ananda Raju 已提交
4272 4273
		txdp++;
	}
L
Linus Torvalds 已提交
4274

A
Ananda Raju 已提交
4275 4276
	txdp->Buffer_Pointer = pci_map_single
	    (sp->pdev, skb->data, frg_len, PCI_DMA_TODEVICE);
4277
	if (pci_dma_mapping_error(sp->pdev, txdp->Buffer_Pointer))
4278 4279
		goto pci_map_failed;

A
Ananda Raju 已提交
4280 4281
	txdp->Host_Control = (unsigned long) skb;
	txdp->Control_1 |= TXD_BUFFER0_SIZE(frg_len);
4282
	if (offload_type == SKB_GSO_UDP)
A
Ananda Raju 已提交
4283 4284 4285
		txdp->Control_1 |= TXD_UFO_EN;

	frg_cnt = skb_shinfo(skb)->nr_frags;
L
Linus Torvalds 已提交
4286 4287 4288
	/* For fragmented SKB. */
	for (i = 0; i < frg_cnt; i++) {
		skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
4289 4290 4291
		/* A '0' length fragment will be ignored */
		if (!frag->size)
			continue;
L
Linus Torvalds 已提交
4292 4293 4294 4295
		txdp++;
		txdp->Buffer_Pointer = (u64) pci_map_page
		    (sp->pdev, frag->page, frag->page_offset,
		     frag->size, PCI_DMA_TODEVICE);
4296
		txdp->Control_1 = TXD_BUFFER0_SIZE(frag->size);
4297
		if (offload_type == SKB_GSO_UDP)
A
Ananda Raju 已提交
4298
			txdp->Control_1 |= TXD_UFO_EN;
L
Linus Torvalds 已提交
4299 4300 4301
	}
	txdp->Control_1 |= TXD_GATHER_CODE_LAST;

4302
	if (offload_type == SKB_GSO_UDP)
A
Ananda Raju 已提交
4303 4304
		frg_cnt++; /* as Txd0 was used for inband header */

L
Linus Torvalds 已提交
4305
	tx_fifo = mac_control->tx_FIFO_start[queue];
4306
	val64 = fifo->list_info[put_off].list_phy_addr;
L
Linus Torvalds 已提交
4307 4308 4309 4310
	writeq(val64, &tx_fifo->TxDL_Pointer);

	val64 = (TX_FIFO_LAST_TXD_NUM(frg_cnt) | TX_FIFO_FIRST_LIST |
		 TX_FIFO_LAST_LIST);
4311
	if (offload_type)
A
Ananda Raju 已提交
4312
		val64 |= TX_FIFO_SPECIAL_FUNC;
4313

L
Linus Torvalds 已提交
4314 4315
	writeq(val64, &tx_fifo->List_Control);

4316 4317
	mmiowb();

L
Linus Torvalds 已提交
4318
	put_off++;
4319
	if (put_off == fifo->tx_curr_put_info.fifo_len + 1)
4320
		put_off = 0;
4321
	fifo->tx_curr_put_info.offset = put_off;
L
Linus Torvalds 已提交
4322 4323

	/* Avoid "put" pointer going beyond "get" pointer */
4324
	if (((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
4325
		sp->mac_control.stats_info->sw_stat.fifo_full_cnt++;
L
Linus Torvalds 已提交
4326 4327 4328
		DBG_PRINT(TX_DBG,
			  "No free TxDs for xmit, Put: 0x%x Get:0x%x\n",
			  put_off, get_off);
4329
		s2io_stop_tx_queue(sp, fifo->fifo_no);
L
Linus Torvalds 已提交
4330
	}
4331
	mac_control->stats_info->sw_stat.mem_allocated += skb->truesize;
4332
	spin_unlock_irqrestore(&fifo->tx_lock, flags);
L
Linus Torvalds 已提交
4333

4334 4335 4336
	if (sp->config.intr_type == MSI_X)
		tx_intr_handler(fifo);

4337
	return NETDEV_TX_OK;
4338 4339
pci_map_failed:
	stats->pci_map_fail_cnt++;
4340
	s2io_stop_tx_queue(sp, fifo->fifo_no);
4341 4342
	stats->mem_freed += skb->truesize;
	dev_kfree_skb(skb);
4343
	spin_unlock_irqrestore(&fifo->tx_lock, flags);
4344
	return NETDEV_TX_OK;
L
Linus Torvalds 已提交
4345 4346
}

4347 4348 4349
static void
s2io_alarm_handle(unsigned long data)
{
R
Ralf Baechle 已提交
4350
	struct s2io_nic *sp = (struct s2io_nic *)data;
4351
	struct net_device *dev = sp->dev;
4352

4353
	s2io_handle_errors(dev);
4354 4355 4356
	mod_timer(&sp->alarm_timer, jiffies + HZ / 2);
}

4357
static irqreturn_t s2io_msix_ring_handle(int irq, void *dev_id)
4358
{
R
Ralf Baechle 已提交
4359 4360
	struct ring_info *ring = (struct ring_info *)dev_id;
	struct s2io_nic *sp = ring->nic;
4361
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
4362

4363
	if (unlikely(!is_s2io_card_up(sp)))
4364 4365
		return IRQ_HANDLED;

4366
	if (sp->config.napi) {
A
Al Viro 已提交
4367 4368
		u8 __iomem *addr = NULL;
		u8 val8 = 0;
4369

A
Al Viro 已提交
4370
		addr = (u8 __iomem *)&bar0->xmsi_mask_reg;
4371 4372 4373 4374
		addr += (7 - ring->ring_no);
		val8 = (ring->ring_no == 0) ? 0x7f : 0xff;
		writeb(val8, addr);
		val8 = readb(addr);
4375
		napi_schedule(&ring->napi);
4376 4377
	} else {
		rx_intr_handler(ring, 0);
4378
		s2io_chk_rx_buffers(sp, ring);
4379
	}
4380

4381 4382 4383
	return IRQ_HANDLED;
}

4384
static irqreturn_t s2io_msix_fifo_handle(int irq, void *dev_id)
4385
{
4386 4387 4388 4389 4390 4391
	int i;
	struct fifo_info *fifos = (struct fifo_info *)dev_id;
	struct s2io_nic *sp = fifos->nic;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
	struct config_param *config  = &sp->config;
	u64 reason;
4392

4393 4394 4395 4396 4397 4398
	if (unlikely(!is_s2io_card_up(sp)))
		return IRQ_NONE;

	reason = readq(&bar0->general_int_status);
	if (unlikely(reason == S2IO_MINUS_ONE))
		/* Nothing much can be done. Get out */
4399 4400
		return IRQ_HANDLED;

4401 4402
	if (reason & (GEN_INTR_TXPIC | GEN_INTR_TXTRAFFIC)) {
		writeq(S2IO_MINUS_ONE, &bar0->general_int_mask);
4403

4404 4405
		if (reason & GEN_INTR_TXPIC)
			s2io_txpic_intr_handle(sp);
4406

4407 4408
		if (reason & GEN_INTR_TXTRAFFIC)
			writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int);
4409

4410 4411
		for (i = 0; i < config->tx_fifo_num; i++)
			tx_intr_handler(&fifos[i]);
4412

4413 4414 4415 4416 4417 4418
		writeq(sp->general_int_mask, &bar0->general_int_mask);
		readl(&bar0->general_int_status);
		return IRQ_HANDLED;
	}
	/* The interrupt was not raised by us */
	return IRQ_NONE;
4419
}
4420

R
Ralf Baechle 已提交
4421
static void s2io_txpic_intr_handle(struct s2io_nic *sp)
4422
{
R
Ralf Baechle 已提交
4423
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
4424 4425 4426 4427 4428 4429 4430
	u64 val64;

	val64 = readq(&bar0->pic_int_status);
	if (val64 & PIC_INT_GPIO) {
		val64 = readq(&bar0->gpio_int_reg);
		if ((val64 & GPIO_INT_REG_LINK_DOWN) &&
		    (val64 & GPIO_INT_REG_LINK_UP)) {
A
Ananda Raju 已提交
4431 4432 4433 4434
			/*
			 * This is unstable state so clear both up/down
			 * interrupt and adapter to re-evaluate the link state.
			 */
4435 4436 4437 4438
			val64 |=  GPIO_INT_REG_LINK_DOWN;
			val64 |= GPIO_INT_REG_LINK_UP;
			writeq(val64, &bar0->gpio_int_reg);
			val64 = readq(&bar0->gpio_int_mask);
A
Ananda Raju 已提交
4439 4440
			val64 &= ~(GPIO_INT_MASK_LINK_UP |
				   GPIO_INT_MASK_LINK_DOWN);
4441 4442
			writeq(val64, &bar0->gpio_int_mask);
		}
A
Ananda Raju 已提交
4443 4444 4445
		else if (val64 & GPIO_INT_REG_LINK_UP) {
			val64 = readq(&bar0->adapter_status);
				/* Enable Adapter */
4446 4447 4448 4449 4450 4451 4452
			val64 = readq(&bar0->adapter_control);
			val64 |= ADAPTER_CNTL_EN;
			writeq(val64, &bar0->adapter_control);
			val64 |= ADAPTER_LED_ON;
			writeq(val64, &bar0->adapter_control);
			if (!sp->device_enabled_once)
				sp->device_enabled_once = 1;
A
Ananda Raju 已提交
4453

4454 4455 4456 4457 4458 4459 4460 4461 4462
			s2io_link(sp, LINK_UP);
			/*
			 * unmask link down interrupt and mask link-up
			 * intr
			 */
			val64 = readq(&bar0->gpio_int_mask);
			val64 &= ~GPIO_INT_MASK_LINK_DOWN;
			val64 |= GPIO_INT_MASK_LINK_UP;
			writeq(val64, &bar0->gpio_int_mask);
A
Ananda Raju 已提交
4463 4464 4465

		}else if (val64 & GPIO_INT_REG_LINK_DOWN) {
			val64 = readq(&bar0->adapter_status);
4466 4467 4468 4469 4470 4471
			s2io_link(sp, LINK_DOWN);
			/* Link is down so unmaks link up interrupt */
			val64 = readq(&bar0->gpio_int_mask);
			val64 &= ~GPIO_INT_MASK_LINK_UP;
			val64 |= GPIO_INT_MASK_LINK_DOWN;
			writeq(val64, &bar0->gpio_int_mask);
4472 4473 4474 4475 4476

			/* turn off LED */
			val64 = readq(&bar0->adapter_control);
			val64 = val64 &(~ADAPTER_LED_ON);
			writeq(val64, &bar0->adapter_control);
4477 4478
		}
	}
A
Ananda Raju 已提交
4479
	val64 = readq(&bar0->gpio_int_mask);
4480 4481
}

4482 4483 4484 4485 4486 4487 4488 4489 4490 4491
/**
 *  do_s2io_chk_alarm_bit - Check for alarm and incrment the counter
 *  @value: alarm bits
 *  @addr: address value
 *  @cnt: counter variable
 *  Description: Check for alarm and increment the counter
 *  Return Value:
 *  1 - if alarm bit set
 *  0 - if alarm bit is not set
 */
4492
static int do_s2io_chk_alarm_bit(u64 value, void __iomem * addr,
4493 4494 4495 4496 4497 4498 4499 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516
			  unsigned long long *cnt)
{
	u64 val64;
	val64 = readq(addr);
	if ( val64 & value ) {
		writeq(val64, addr);
		(*cnt)++;
		return 1;
	}
	return 0;

}

/**
 *  s2io_handle_errors - Xframe error indication handler
 *  @nic: device private variable
 *  Description: Handle alarms such as loss of link, single or
 *  double ECC errors, critical and serious errors.
 *  Return Value:
 *  NONE
 */
static void s2io_handle_errors(void * dev_id)
{
	struct net_device *dev = (struct net_device *) dev_id;
4517
	struct s2io_nic *sp = netdev_priv(dev);
4518 4519 4520 4521 4522 4523 4524
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
	u64 temp64 = 0,val64=0;
	int i = 0;

	struct swStat *sw_stat = &sp->mac_control.stats_info->sw_stat;
	struct xpakStat *stats = &sp->mac_control.stats_info->xpak_stat;

4525
	if (!is_s2io_card_up(sp))
4526 4527 4528 4529 4530 4531 4532 4533 4534 4535 4536 4537 4538 4539 4540 4541 4542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555 4556 4557 4558 4559 4560 4561 4562 4563 4564 4565 4566 4567 4568 4569 4570 4571 4572 4573 4574 4575 4576 4577 4578 4579 4580 4581 4582 4583 4584 4585 4586 4587 4588 4589 4590 4591 4592 4593 4594 4595 4596 4597 4598 4599 4600 4601 4602 4603 4604 4605 4606 4607 4608 4609 4610 4611 4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622 4623 4624 4625 4626 4627 4628 4629 4630 4631 4632 4633 4634 4635 4636 4637 4638 4639 4640 4641 4642 4643 4644 4645 4646 4647 4648 4649 4650 4651 4652 4653 4654 4655 4656 4657 4658 4659 4660 4661 4662 4663 4664 4665 4666 4667 4668 4669 4670 4671 4672 4673 4674 4675 4676 4677 4678 4679 4680 4681 4682 4683 4684 4685 4686 4687 4688 4689 4690 4691 4692 4693 4694 4695 4696 4697 4698 4699 4700 4701 4702 4703 4704 4705 4706 4707 4708 4709 4710 4711 4712 4713 4714 4715 4716 4717 4718 4719 4720 4721 4722 4723 4724 4725 4726 4727 4728 4729 4730 4731 4732 4733 4734 4735 4736 4737 4738 4739 4740 4741 4742 4743 4744 4745 4746 4747 4748 4749 4750 4751 4752 4753 4754 4755 4756 4757 4758 4759 4760 4761
		return;

	if (pci_channel_offline(sp->pdev))
		return;

	memset(&sw_stat->ring_full_cnt, 0,
		sizeof(sw_stat->ring_full_cnt));

	/* Handling the XPAK counters update */
	if(stats->xpak_timer_count < 72000) {
		/* waiting for an hour */
		stats->xpak_timer_count++;
	} else {
		s2io_updt_xpak_counter(dev);
		/* reset the count to zero */
		stats->xpak_timer_count = 0;
	}

	/* Handling link status change error Intr */
	if (s2io_link_fault_indication(sp) == MAC_RMAC_ERR_TIMER) {
		val64 = readq(&bar0->mac_rmac_err_reg);
		writeq(val64, &bar0->mac_rmac_err_reg);
		if (val64 & RMAC_LINK_STATE_CHANGE_INT)
			schedule_work(&sp->set_link_task);
	}

	/* In case of a serious error, the device will be Reset. */
	if (do_s2io_chk_alarm_bit(SERR_SOURCE_ANY, &bar0->serr_source,
				&sw_stat->serious_err_cnt))
		goto reset;

	/* Check for data parity error */
	if (do_s2io_chk_alarm_bit(GPIO_INT_REG_DP_ERR_INT, &bar0->gpio_int_reg,
				&sw_stat->parity_err_cnt))
		goto reset;

	/* Check for ring full counter */
	if (sp->device_type == XFRAME_II_DEVICE) {
		val64 = readq(&bar0->ring_bump_counter1);
		for (i=0; i<4; i++) {
			temp64 = ( val64 & vBIT(0xFFFF,(i*16),16));
			temp64 >>= 64 - ((i+1)*16);
			sw_stat->ring_full_cnt[i] += temp64;
		}

		val64 = readq(&bar0->ring_bump_counter2);
		for (i=0; i<4; i++) {
			temp64 = ( val64 & vBIT(0xFFFF,(i*16),16));
			temp64 >>= 64 - ((i+1)*16);
			 sw_stat->ring_full_cnt[i+4] += temp64;
		}
	}

	val64 = readq(&bar0->txdma_int_status);
	/*check for pfc_err*/
	if (val64 & TXDMA_PFC_INT) {
		if (do_s2io_chk_alarm_bit(PFC_ECC_DB_ERR | PFC_SM_ERR_ALARM|
				PFC_MISC_0_ERR | PFC_MISC_1_ERR|
				PFC_PCIX_ERR, &bar0->pfc_err_reg,
				&sw_stat->pfc_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(PFC_ECC_SG_ERR, &bar0->pfc_err_reg,
				&sw_stat->pfc_err_cnt);
	}

	/*check for tda_err*/
	if (val64 & TXDMA_TDA_INT) {
		if(do_s2io_chk_alarm_bit(TDA_Fn_ECC_DB_ERR | TDA_SM0_ERR_ALARM |
				TDA_SM1_ERR_ALARM, &bar0->tda_err_reg,
				&sw_stat->tda_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TDA_Fn_ECC_SG_ERR | TDA_PCIX_ERR,
				&bar0->tda_err_reg, &sw_stat->tda_err_cnt);
	}
	/*check for pcc_err*/
	if (val64 & TXDMA_PCC_INT) {
		if (do_s2io_chk_alarm_bit(PCC_SM_ERR_ALARM | PCC_WR_ERR_ALARM
				| PCC_N_SERR | PCC_6_COF_OV_ERR
				| PCC_7_COF_OV_ERR | PCC_6_LSO_OV_ERR
				| PCC_7_LSO_OV_ERR | PCC_FB_ECC_DB_ERR
				| PCC_TXB_ECC_DB_ERR, &bar0->pcc_err_reg,
				&sw_stat->pcc_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(PCC_FB_ECC_SG_ERR | PCC_TXB_ECC_SG_ERR,
				&bar0->pcc_err_reg, &sw_stat->pcc_err_cnt);
	}

	/*check for tti_err*/
	if (val64 & TXDMA_TTI_INT) {
		if (do_s2io_chk_alarm_bit(TTI_SM_ERR_ALARM, &bar0->tti_err_reg,
				&sw_stat->tti_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TTI_ECC_SG_ERR | TTI_ECC_DB_ERR,
				&bar0->tti_err_reg, &sw_stat->tti_err_cnt);
	}

	/*check for lso_err*/
	if (val64 & TXDMA_LSO_INT) {
		if (do_s2io_chk_alarm_bit(LSO6_ABORT | LSO7_ABORT
				| LSO6_SM_ERR_ALARM | LSO7_SM_ERR_ALARM,
				&bar0->lso_err_reg, &sw_stat->lso_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(LSO6_SEND_OFLOW | LSO7_SEND_OFLOW,
				&bar0->lso_err_reg, &sw_stat->lso_err_cnt);
	}

	/*check for tpa_err*/
	if (val64 & TXDMA_TPA_INT) {
		if (do_s2io_chk_alarm_bit(TPA_SM_ERR_ALARM, &bar0->tpa_err_reg,
			&sw_stat->tpa_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TPA_TX_FRM_DROP, &bar0->tpa_err_reg,
			&sw_stat->tpa_err_cnt);
	}

	/*check for sm_err*/
	if (val64 & TXDMA_SM_INT) {
		if (do_s2io_chk_alarm_bit(SM_SM_ERR_ALARM, &bar0->sm_err_reg,
			&sw_stat->sm_err_cnt))
			goto reset;
	}

	val64 = readq(&bar0->mac_int_status);
	if (val64 & MAC_INT_STATUS_TMAC_INT) {
		if (do_s2io_chk_alarm_bit(TMAC_TX_BUF_OVRN | TMAC_TX_SM_ERR,
				&bar0->mac_tmac_err_reg,
				&sw_stat->mac_tmac_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TMAC_ECC_SG_ERR | TMAC_ECC_DB_ERR
				| TMAC_DESC_ECC_SG_ERR | TMAC_DESC_ECC_DB_ERR,
				&bar0->mac_tmac_err_reg,
				&sw_stat->mac_tmac_err_cnt);
	}

	val64 = readq(&bar0->xgxs_int_status);
	if (val64 & XGXS_INT_STATUS_TXGXS) {
		if (do_s2io_chk_alarm_bit(TXGXS_ESTORE_UFLOW | TXGXS_TX_SM_ERR,
				&bar0->xgxs_txgxs_err_reg,
				&sw_stat->xgxs_txgxs_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TXGXS_ECC_SG_ERR | TXGXS_ECC_DB_ERR,
				&bar0->xgxs_txgxs_err_reg,
				&sw_stat->xgxs_txgxs_err_cnt);
	}

	val64 = readq(&bar0->rxdma_int_status);
	if (val64 & RXDMA_INT_RC_INT_M) {
		if (do_s2io_chk_alarm_bit(RC_PRCn_ECC_DB_ERR | RC_FTC_ECC_DB_ERR
				| RC_PRCn_SM_ERR_ALARM |RC_FTC_SM_ERR_ALARM,
				&bar0->rc_err_reg, &sw_stat->rc_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RC_PRCn_ECC_SG_ERR | RC_FTC_ECC_SG_ERR
				| RC_RDA_FAIL_WR_Rn, &bar0->rc_err_reg,
				&sw_stat->rc_err_cnt);
		if (do_s2io_chk_alarm_bit(PRC_PCI_AB_RD_Rn | PRC_PCI_AB_WR_Rn
				| PRC_PCI_AB_F_WR_Rn, &bar0->prc_pcix_err_reg,
				&sw_stat->prc_pcix_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(PRC_PCI_DP_RD_Rn | PRC_PCI_DP_WR_Rn
				| PRC_PCI_DP_F_WR_Rn, &bar0->prc_pcix_err_reg,
				&sw_stat->prc_pcix_err_cnt);
	}

	if (val64 & RXDMA_INT_RPA_INT_M) {
		if (do_s2io_chk_alarm_bit(RPA_SM_ERR_ALARM | RPA_CREDIT_ERR,
				&bar0->rpa_err_reg, &sw_stat->rpa_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RPA_ECC_SG_ERR | RPA_ECC_DB_ERR,
				&bar0->rpa_err_reg, &sw_stat->rpa_err_cnt);
	}

	if (val64 & RXDMA_INT_RDA_INT_M) {
		if (do_s2io_chk_alarm_bit(RDA_RXDn_ECC_DB_ERR
				| RDA_FRM_ECC_DB_N_AERR | RDA_SM1_ERR_ALARM
				| RDA_SM0_ERR_ALARM | RDA_RXD_ECC_DB_SERR,
				&bar0->rda_err_reg, &sw_stat->rda_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RDA_RXDn_ECC_SG_ERR | RDA_FRM_ECC_SG_ERR
				| RDA_MISC_ERR | RDA_PCIX_ERR,
				&bar0->rda_err_reg, &sw_stat->rda_err_cnt);
	}

	if (val64 & RXDMA_INT_RTI_INT_M) {
		if (do_s2io_chk_alarm_bit(RTI_SM_ERR_ALARM, &bar0->rti_err_reg,
				&sw_stat->rti_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RTI_ECC_SG_ERR | RTI_ECC_DB_ERR,
				&bar0->rti_err_reg, &sw_stat->rti_err_cnt);
	}

	val64 = readq(&bar0->mac_int_status);
	if (val64 & MAC_INT_STATUS_RMAC_INT) {
		if (do_s2io_chk_alarm_bit(RMAC_RX_BUFF_OVRN | RMAC_RX_SM_ERR,
				&bar0->mac_rmac_err_reg,
				&sw_stat->mac_rmac_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RMAC_UNUSED_INT|RMAC_SINGLE_ECC_ERR|
				RMAC_DOUBLE_ECC_ERR, &bar0->mac_rmac_err_reg,
				&sw_stat->mac_rmac_err_cnt);
	}

	val64 = readq(&bar0->xgxs_int_status);
	if (val64 & XGXS_INT_STATUS_RXGXS) {
		if (do_s2io_chk_alarm_bit(RXGXS_ESTORE_OFLOW | RXGXS_RX_SM_ERR,
				&bar0->xgxs_rxgxs_err_reg,
				&sw_stat->xgxs_rxgxs_err_cnt))
			goto reset;
	}

	val64 = readq(&bar0->mc_int_status);
	if(val64 & MC_INT_STATUS_MC_INT) {
		if (do_s2io_chk_alarm_bit(MC_ERR_REG_SM_ERR, &bar0->mc_err_reg,
				&sw_stat->mc_err_cnt))
			goto reset;

		/* Handling Ecc errors */
		if (val64 & (MC_ERR_REG_ECC_ALL_SNG | MC_ERR_REG_ECC_ALL_DBL)) {
			writeq(val64, &bar0->mc_err_reg);
			if (val64 & MC_ERR_REG_ECC_ALL_DBL) {
				sw_stat->double_ecc_errs++;
				if (sp->device_type != XFRAME_II_DEVICE) {
					/*
					 * Reset XframeI only if critical error
					 */
					if (val64 &
						(MC_ERR_REG_MIRI_ECC_DB_ERR_0 |
						MC_ERR_REG_MIRI_ECC_DB_ERR_1))
								goto reset;
					}
			} else
				sw_stat->single_ecc_errs++;
		}
	}
	return;

reset:
4762
	s2io_stop_all_tx_queue(sp);
4763 4764 4765 4766 4767
	schedule_work(&sp->rst_timer_task);
	sw_stat->soft_reset_cnt++;
	return;
}

L
Linus Torvalds 已提交
4768 4769 4770 4771
/**
 *  s2io_isr - ISR handler of the device .
 *  @irq: the irq of the device.
 *  @dev_id: a void pointer to the dev structure of the NIC.
4772 4773 4774
 *  Description:  This function is the ISR handler of the device. It
 *  identifies the reason for the interrupt and calls the relevant
 *  service routines. As a contongency measure, this ISR allocates the
L
Linus Torvalds 已提交
4775 4776 4777
 *  recv buffers, if their numbers are below the panic value which is
 *  presently set to 25% of the original number of rcv buffers allocated.
 *  Return value:
4778
 *   IRQ_HANDLED: will be returned if IRQ was handled by this routine
L
Linus Torvalds 已提交
4779 4780
 *   IRQ_NONE: will be returned if interrupt is not from our device
 */
4781
static irqreturn_t s2io_isr(int irq, void *dev_id)
L
Linus Torvalds 已提交
4782 4783
{
	struct net_device *dev = (struct net_device *) dev_id;
4784
	struct s2io_nic *sp = netdev_priv(dev);
R
Ralf Baechle 已提交
4785
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
4786
	int i;
4787
	u64 reason = 0;
R
Ralf Baechle 已提交
4788
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
4789 4790
	struct config_param *config;

4791 4792 4793 4794
	/* Pretend we handled any irq's from a disconnected card */
	if (pci_channel_offline(sp->pdev))
		return IRQ_NONE;

4795
	if (!is_s2io_card_up(sp))
4796 4797
		return IRQ_NONE;

L
Linus Torvalds 已提交
4798 4799 4800
	mac_control = &sp->mac_control;
	config = &sp->config;

4801
	/*
L
Linus Torvalds 已提交
4802 4803 4804 4805 4806 4807 4808 4809
	 * Identify the cause for interrupt and call the appropriate
	 * interrupt handler. Causes for the interrupt could be;
	 * 1. Rx of packet.
	 * 2. Tx complete.
	 * 3. Link down.
	 */
	reason = readq(&bar0->general_int_status);

4810 4811 4812
	if (unlikely(reason == S2IO_MINUS_ONE) ) {
		/* Nothing much can be done. Get out */
		return IRQ_HANDLED;
L
Linus Torvalds 已提交
4813
	}
4814

4815 4816 4817 4818 4819 4820 4821
	if (reason & (GEN_INTR_RXTRAFFIC |
		GEN_INTR_TXTRAFFIC | GEN_INTR_TXPIC))
	{
		writeq(S2IO_MINUS_ONE, &bar0->general_int_mask);

		if (config->napi) {
			if (reason & GEN_INTR_RXTRAFFIC) {
4822
				napi_schedule(&sp->napi);
4823 4824 4825
				writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_mask);
				writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int);
				readl(&bar0->rx_traffic_int);
4826
			}
4827 4828 4829 4830 4831 4832 4833
		} else {
			/*
			 * rx_traffic_int reg is an R1 register, writing all 1's
			 * will ensure that the actual interrupt causing bit
			 * get's cleared and hence a read can be avoided.
			 */
			if (reason & GEN_INTR_RXTRAFFIC)
4834
				writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int);
4835

4836 4837 4838 4839 4840
			for (i = 0; i < config->rx_ring_num; i++) {
				struct ring_info *ring = &mac_control->rings[i];

				rx_intr_handler(ring, 0);
			}
4841
		}
4842

4843
		/*
4844
		 * tx_traffic_int reg is an R1 register, writing all 1's
4845 4846 4847
		 * will ensure that the actual interrupt causing bit get's
		 * cleared and hence a read can be avoided.
		 */
4848 4849
		if (reason & GEN_INTR_TXTRAFFIC)
			writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int);
4850

4851 4852
		for (i = 0; i < config->tx_fifo_num; i++)
			tx_intr_handler(&mac_control->fifos[i]);
L
Linus Torvalds 已提交
4853

4854 4855
		if (reason & GEN_INTR_TXPIC)
			s2io_txpic_intr_handle(sp);
4856

4857 4858 4859 4860
		/*
		 * Reallocate the buffers from the interrupt handler itself.
		 */
		if (!config->napi) {
4861 4862 4863 4864 4865
			for (i = 0; i < config->rx_ring_num; i++) {
				struct ring_info *ring = &mac_control->rings[i];

				s2io_chk_rx_buffers(sp, ring);
			}
4866 4867 4868
		}
		writeq(sp->general_int_mask, &bar0->general_int_mask);
		readl(&bar0->general_int_status);
4869

4870
		return IRQ_HANDLED;
4871

4872 4873 4874 4875 4876
	}
	else if (!reason) {
		/* The interrupt was not raised by us */
		return IRQ_NONE;
	}
4877

L
Linus Torvalds 已提交
4878 4879 4880
	return IRQ_HANDLED;
}

4881 4882 4883
/**
 * s2io_updt_stats -
 */
R
Ralf Baechle 已提交
4884
static void s2io_updt_stats(struct s2io_nic *sp)
4885
{
R
Ralf Baechle 已提交
4886
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
4887 4888 4889
	u64 val64;
	int cnt = 0;

4890
	if (is_s2io_card_up(sp)) {
4891 4892 4893 4894 4895 4896 4897
		/* Apprx 30us on a 133 MHz bus */
		val64 = SET_UPDT_CLICKS(10) |
			STAT_CFG_ONE_SHOT_EN | STAT_CFG_STAT_EN;
		writeq(val64, &bar0->stat_cfg);
		do {
			udelay(100);
			val64 = readq(&bar0->stat_cfg);
J
Jiri Slaby 已提交
4898
			if (!(val64 & s2BIT(0)))
4899 4900 4901 4902 4903
				break;
			cnt++;
			if (cnt == 5)
				break; /* Updt failed */
		} while(1);
4904
	}
4905 4906
}

L
Linus Torvalds 已提交
4907
/**
4908
 *  s2io_get_stats - Updates the device statistics structure.
L
Linus Torvalds 已提交
4909 4910
 *  @dev : pointer to the device structure.
 *  Description:
4911
 *  This function updates the device statistics structure in the s2io_nic
L
Linus Torvalds 已提交
4912 4913 4914 4915 4916
 *  structure and returns a pointer to the same.
 *  Return value:
 *  pointer to the updated net_device_stats structure.
 */

4917
static struct net_device_stats *s2io_get_stats(struct net_device *dev)
L
Linus Torvalds 已提交
4918
{
4919
	struct s2io_nic *sp = netdev_priv(dev);
R
Ralf Baechle 已提交
4920
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
4921
	struct config_param *config;
4922
	int i;
L
Linus Torvalds 已提交
4923

4924

L
Linus Torvalds 已提交
4925 4926 4927
	mac_control = &sp->mac_control;
	config = &sp->config;

4928 4929 4930
	/* Configure Stats for immediate updt */
	s2io_updt_stats(sp);

4931 4932 4933 4934 4935
	/* Using sp->stats as a staging area, because reset (due to mtu
	   change, for example) will clear some hardware counters */
	dev->stats.tx_packets +=
		le32_to_cpu(mac_control->stats_info->tmac_frms) - 
		sp->stats.tx_packets;
4936 4937
	sp->stats.tx_packets =
		le32_to_cpu(mac_control->stats_info->tmac_frms);
4938 4939 4940
	dev->stats.tx_errors +=
		le32_to_cpu(mac_control->stats_info->tmac_any_err_frms) -
		sp->stats.tx_errors;
4941 4942
	sp->stats.tx_errors =
		le32_to_cpu(mac_control->stats_info->tmac_any_err_frms);
4943 4944 4945
	dev->stats.rx_errors +=
		le64_to_cpu(mac_control->stats_info->rmac_drop_frms) -
		sp->stats.rx_errors;
4946
	sp->stats.rx_errors =
A
Al Viro 已提交
4947
		le64_to_cpu(mac_control->stats_info->rmac_drop_frms);
4948 4949 4950
	dev->stats.multicast =
		le32_to_cpu(mac_control->stats_info->rmac_vld_mcst_frms) - 
		sp->stats.multicast;
4951 4952
	sp->stats.multicast =
		le32_to_cpu(mac_control->stats_info->rmac_vld_mcst_frms);
4953 4954 4955
	dev->stats.rx_length_errors =
		le64_to_cpu(mac_control->stats_info->rmac_long_frms) - 
		sp->stats.rx_length_errors;
L
Linus Torvalds 已提交
4956
	sp->stats.rx_length_errors =
A
Al Viro 已提交
4957
		le64_to_cpu(mac_control->stats_info->rmac_long_frms);
L
Linus Torvalds 已提交
4958

4959
	/* collect per-ring rx_packets and rx_bytes */
4960
	dev->stats.rx_packets = dev->stats.rx_bytes = 0;
4961
	for (i = 0; i < config->rx_ring_num; i++) {
4962 4963 4964 4965
		struct ring_info *ring = &mac_control->rings[i];

		dev->stats.rx_packets += ring->rx_packets;
		dev->stats.rx_bytes += ring->rx_bytes;
4966 4967
	}

4968
	return (&dev->stats);
L
Linus Torvalds 已提交
4969 4970 4971 4972 4973 4974
}

/**
 *  s2io_set_multicast - entry point for multicast address enable/disable.
 *  @dev : pointer to the device structure
 *  Description:
4975 4976
 *  This function is a driver entry point which gets called by the kernel
 *  whenever multicast addresses must be enabled/disabled. This also gets
L
Linus Torvalds 已提交
4977 4978 4979 4980 4981 4982 4983 4984 4985 4986 4987
 *  called to set/reset promiscuous mode. Depending on the deivce flag, we
 *  determine, if multicast address must be enabled or if promiscuous mode
 *  is to be disabled etc.
 *  Return value:
 *  void.
 */

static void s2io_set_multicast(struct net_device *dev)
{
	int i, j, prev_cnt;
	struct dev_mc_list *mclist;
4988
	struct s2io_nic *sp = netdev_priv(dev);
R
Ralf Baechle 已提交
4989
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
4990 4991
	u64 val64 = 0, multi_mac = 0x010203040506ULL, mask =
	    0xfeffffffffffULL;
4992
	u64 dis_addr = S2IO_DISABLE_MAC_ENTRY, mac_addr = 0;
L
Linus Torvalds 已提交
4993
	void __iomem *add;
4994
	struct config_param *config = &sp->config;
L
Linus Torvalds 已提交
4995 4996 4997 4998 4999 5000 5001 5002 5003

	if ((dev->flags & IFF_ALLMULTI) && (!sp->m_cast_flg)) {
		/*  Enable all Multicast addresses */
		writeq(RMAC_ADDR_DATA0_MEM_ADDR(multi_mac),
		       &bar0->rmac_addr_data0_mem);
		writeq(RMAC_ADDR_DATA1_MEM_MASK(mask),
		       &bar0->rmac_addr_data1_mem);
		val64 = RMAC_ADDR_CMD_MEM_WE |
		    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
5004
		    RMAC_ADDR_CMD_MEM_OFFSET(config->max_mc_addr - 1);
L
Linus Torvalds 已提交
5005 5006
		writeq(val64, &bar0->rmac_addr_cmd_mem);
		/* Wait till command completes */
A
Ananda Raju 已提交
5007
		wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
5008 5009
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET);
L
Linus Torvalds 已提交
5010 5011

		sp->m_cast_flg = 1;
5012
		sp->all_multi_pos = config->max_mc_addr - 1;
L
Linus Torvalds 已提交
5013 5014 5015 5016
	} else if ((dev->flags & IFF_ALLMULTI) && (sp->m_cast_flg)) {
		/*  Disable all Multicast addresses */
		writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
		       &bar0->rmac_addr_data0_mem);
5017 5018
		writeq(RMAC_ADDR_DATA1_MEM_MASK(0x0),
		       &bar0->rmac_addr_data1_mem);
L
Linus Torvalds 已提交
5019 5020 5021 5022 5023
		val64 = RMAC_ADDR_CMD_MEM_WE |
		    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
		    RMAC_ADDR_CMD_MEM_OFFSET(sp->all_multi_pos);
		writeq(val64, &bar0->rmac_addr_cmd_mem);
		/* Wait till command completes */
A
Ananda Raju 已提交
5024
		wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
5025 5026
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET);
L
Linus Torvalds 已提交
5027 5028 5029 5030 5031 5032 5033 5034 5035 5036 5037 5038 5039 5040 5041 5042

		sp->m_cast_flg = 0;
		sp->all_multi_pos = 0;
	}

	if ((dev->flags & IFF_PROMISC) && (!sp->promisc_flg)) {
		/*  Put the NIC into promiscuous mode */
		add = &bar0->mac_cfg;
		val64 = readq(&bar0->mac_cfg);
		val64 |= MAC_CFG_RMAC_PROM_ENABLE;

		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) val64, add);
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64 >> 32), (add + 4));

5043 5044 5045 5046
		if (vlan_tag_strip != 1) {
			val64 = readq(&bar0->rx_pa_cfg);
			val64 &= ~RX_PA_CFG_STRIP_VLAN_TAG;
			writeq(val64, &bar0->rx_pa_cfg);
5047
			sp->vlan_strip_flag = 0;
5048 5049
		}

L
Linus Torvalds 已提交
5050 5051
		val64 = readq(&bar0->mac_cfg);
		sp->promisc_flg = 1;
5052
		DBG_PRINT(INFO_DBG, "%s: entered promiscuous mode\n",
L
Linus Torvalds 已提交
5053 5054 5055 5056 5057 5058 5059 5060 5061 5062 5063 5064
			  dev->name);
	} else if (!(dev->flags & IFF_PROMISC) && (sp->promisc_flg)) {
		/*  Remove the NIC from promiscuous mode */
		add = &bar0->mac_cfg;
		val64 = readq(&bar0->mac_cfg);
		val64 &= ~MAC_CFG_RMAC_PROM_ENABLE;

		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) val64, add);
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64 >> 32), (add + 4));

5065 5066 5067 5068
		if (vlan_tag_strip != 0) {
			val64 = readq(&bar0->rx_pa_cfg);
			val64 |= RX_PA_CFG_STRIP_VLAN_TAG;
			writeq(val64, &bar0->rx_pa_cfg);
5069
			sp->vlan_strip_flag = 1;
5070 5071
		}

L
Linus Torvalds 已提交
5072 5073
		val64 = readq(&bar0->mac_cfg);
		sp->promisc_flg = 0;
5074
		DBG_PRINT(INFO_DBG, "%s: left promiscuous mode\n",
L
Linus Torvalds 已提交
5075 5076 5077 5078 5079 5080
			  dev->name);
	}

	/*  Update individual M_CAST address list */
	if ((!sp->m_cast_flg) && dev->mc_count) {
		if (dev->mc_count >
5081
		    (config->max_mc_addr - config->max_mac_addr)) {
L
Linus Torvalds 已提交
5082 5083 5084 5085 5086 5087 5088 5089 5090 5091 5092 5093 5094 5095 5096
			DBG_PRINT(ERR_DBG, "%s: No more Rx filters ",
				  dev->name);
			DBG_PRINT(ERR_DBG, "can be added, please enable ");
			DBG_PRINT(ERR_DBG, "ALL_MULTI instead\n");
			return;
		}

		prev_cnt = sp->mc_addr_count;
		sp->mc_addr_count = dev->mc_count;

		/* Clear out the previous list of Mc in the H/W. */
		for (i = 0; i < prev_cnt; i++) {
			writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
			       &bar0->rmac_addr_data0_mem);
			writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
5097
				&bar0->rmac_addr_data1_mem);
L
Linus Torvalds 已提交
5098 5099 5100
			val64 = RMAC_ADDR_CMD_MEM_WE |
			    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
			    RMAC_ADDR_CMD_MEM_OFFSET
5101
			    (config->mc_start_offset + i);
L
Linus Torvalds 已提交
5102 5103 5104
			writeq(val64, &bar0->rmac_addr_cmd_mem);

			/* Wait for command completes */
A
Ananda Raju 已提交
5105
			if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
5106 5107
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET)) {
L
Linus Torvalds 已提交
5108 5109 5110 5111 5112 5113 5114 5115 5116 5117 5118 5119
				DBG_PRINT(ERR_DBG, "%s: Adding ",
					  dev->name);
				DBG_PRINT(ERR_DBG, "Multicasts failed\n");
				return;
			}
		}

		/* Create the new Rx filter list and update the same in H/W. */
		for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
		     i++, mclist = mclist->next) {
			memcpy(sp->usr_addrs[i].addr, mclist->dmi_addr,
			       ETH_ALEN);
5120
			mac_addr = 0;
L
Linus Torvalds 已提交
5121 5122 5123 5124 5125 5126 5127 5128
			for (j = 0; j < ETH_ALEN; j++) {
				mac_addr |= mclist->dmi_addr[j];
				mac_addr <<= 8;
			}
			mac_addr >>= 8;
			writeq(RMAC_ADDR_DATA0_MEM_ADDR(mac_addr),
			       &bar0->rmac_addr_data0_mem);
			writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
5129
				&bar0->rmac_addr_data1_mem);
L
Linus Torvalds 已提交
5130 5131 5132
			val64 = RMAC_ADDR_CMD_MEM_WE |
			    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
			    RMAC_ADDR_CMD_MEM_OFFSET
5133
			    (i + config->mc_start_offset);
L
Linus Torvalds 已提交
5134 5135 5136
			writeq(val64, &bar0->rmac_addr_cmd_mem);

			/* Wait for command completes */
A
Ananda Raju 已提交
5137
			if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
5138 5139
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET)) {
L
Linus Torvalds 已提交
5140 5141 5142 5143 5144 5145 5146 5147 5148
				DBG_PRINT(ERR_DBG, "%s: Adding ",
					  dev->name);
				DBG_PRINT(ERR_DBG, "Multicasts failed\n");
				return;
			}
		}
	}
}

5149 5150 5151
/* read from CAM unicast & multicast addresses and store it in
 * def_mac_addr structure
 */
5152
static void do_s2io_store_unicast_mc(struct s2io_nic *sp)
5153 5154 5155 5156 5157 5158 5159 5160 5161 5162 5163 5164 5165 5166 5167 5168 5169 5170 5171 5172 5173 5174 5175 5176 5177 5178 5179 5180 5181 5182 5183 5184 5185 5186 5187 5188 5189 5190 5191 5192 5193 5194 5195 5196 5197 5198 5199 5200 5201 5202 5203 5204 5205 5206 5207 5208 5209 5210 5211 5212 5213 5214 5215 5216 5217 5218 5219 5220
{
	int offset;
	u64 mac_addr = 0x0;
	struct config_param *config = &sp->config;

	/* store unicast & multicast mac addresses */
	for (offset = 0; offset < config->max_mc_addr; offset++) {
		mac_addr = do_s2io_read_unicast_mc(sp, offset);
		/* if read fails disable the entry */
		if (mac_addr == FAILURE)
			mac_addr = S2IO_DISABLE_MAC_ENTRY;
		do_s2io_copy_mac_addr(sp, offset, mac_addr);
	}
}

/* restore unicast & multicast MAC to CAM from def_mac_addr structure */
static void do_s2io_restore_unicast_mc(struct s2io_nic *sp)
{
	int offset;
	struct config_param *config = &sp->config;
	/* restore unicast mac address */
	for (offset = 0; offset < config->max_mac_addr; offset++)
		do_s2io_prog_unicast(sp->dev,
			sp->def_mac_addr[offset].mac_addr);

	/* restore multicast mac address */
	for (offset = config->mc_start_offset;
		offset < config->max_mc_addr; offset++)
		do_s2io_add_mc(sp, sp->def_mac_addr[offset].mac_addr);
}

/* add a multicast MAC address to CAM */
static int do_s2io_add_mc(struct s2io_nic *sp, u8 *addr)
{
	int i;
	u64 mac_addr = 0;
	struct config_param *config = &sp->config;

	for (i = 0; i < ETH_ALEN; i++) {
		mac_addr <<= 8;
		mac_addr |= addr[i];
	}
	if ((0ULL == mac_addr) || (mac_addr == S2IO_DISABLE_MAC_ENTRY))
		return SUCCESS;

	/* check if the multicast mac already preset in CAM */
	for (i = config->mc_start_offset; i < config->max_mc_addr; i++) {
		u64 tmp64;
		tmp64 = do_s2io_read_unicast_mc(sp, i);
		if (tmp64 == S2IO_DISABLE_MAC_ENTRY) /* CAM entry is empty */
			break;

		if (tmp64 == mac_addr)
			return SUCCESS;
	}
	if (i == config->max_mc_addr) {
		DBG_PRINT(ERR_DBG,
			"CAM full no space left for multicast MAC\n");
		return FAILURE;
	}
	/* Update the internal structure with this new mac address */
	do_s2io_copy_mac_addr(sp, i, mac_addr);

	return (do_s2io_add_mac(sp, mac_addr, i));
}

/* add MAC address to CAM */
static int do_s2io_add_mac(struct s2io_nic *sp, u64 addr, int off)
5221 5222 5223 5224 5225 5226 5227 5228 5229 5230 5231 5232 5233 5234 5235 5236
{
	u64 val64;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;

	writeq(RMAC_ADDR_DATA0_MEM_ADDR(addr),
		&bar0->rmac_addr_data0_mem);

	val64 =
		RMAC_ADDR_CMD_MEM_WE | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
		RMAC_ADDR_CMD_MEM_OFFSET(off);
	writeq(val64, &bar0->rmac_addr_cmd_mem);

	/* Wait till command completes */
	if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
		RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
		S2IO_BIT_RESET)) {
5237
		DBG_PRINT(INFO_DBG, "do_s2io_add_mac failed\n");
5238 5239 5240 5241
		return FAILURE;
	}
	return SUCCESS;
}
5242 5243 5244 5245 5246 5247 5248 5249 5250 5251 5252 5253 5254 5255 5256 5257 5258 5259 5260 5261 5262 5263 5264 5265 5266 5267 5268 5269 5270 5271 5272 5273 5274 5275 5276 5277 5278 5279 5280 5281 5282 5283 5284 5285 5286 5287
/* deletes a specified unicast/multicast mac entry from CAM */
static int do_s2io_delete_unicast_mc(struct s2io_nic *sp, u64 addr)
{
	int offset;
	u64 dis_addr = S2IO_DISABLE_MAC_ENTRY, tmp64;
	struct config_param *config = &sp->config;

	for (offset = 1;
		offset < config->max_mc_addr; offset++) {
		tmp64 = do_s2io_read_unicast_mc(sp, offset);
		if (tmp64 == addr) {
			/* disable the entry by writing  0xffffffffffffULL */
			if (do_s2io_add_mac(sp, dis_addr, offset) ==  FAILURE)
				return FAILURE;
			/* store the new mac list from CAM */
			do_s2io_store_unicast_mc(sp);
			return SUCCESS;
		}
	}
	DBG_PRINT(ERR_DBG, "MAC address 0x%llx not found in CAM\n",
			(unsigned long long)addr);
	return FAILURE;
}

/* read mac entries from CAM */
static u64 do_s2io_read_unicast_mc(struct s2io_nic *sp, int offset)
{
	u64 tmp64 = 0xffffffffffff0000ULL, val64;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;

	/* read mac addr */
	val64 =
		RMAC_ADDR_CMD_MEM_RD | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
		RMAC_ADDR_CMD_MEM_OFFSET(offset);
	writeq(val64, &bar0->rmac_addr_cmd_mem);

	/* Wait till command completes */
	if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
		RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
		S2IO_BIT_RESET)) {
		DBG_PRINT(INFO_DBG, "do_s2io_read_unicast_mc failed\n");
		return FAILURE;
	}
	tmp64 = readq(&bar0->rmac_addr_data0_mem);
	return (tmp64 >> 16);
}
5288 5289 5290 5291

/**
 * s2io_set_mac_addr driver entry point
 */
5292

5293 5294 5295 5296 5297 5298 5299 5300 5301 5302 5303 5304
static int s2io_set_mac_addr(struct net_device *dev, void *p)
{
	struct sockaddr *addr = p;

	if (!is_valid_ether_addr(addr->sa_data))
		return -EINVAL;

	memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);

	/* store the MAC address in CAM */
	return (do_s2io_prog_unicast(dev, dev->dev_addr));
}
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/**
5306
 *  do_s2io_prog_unicast - Programs the Xframe mac address
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5307 5308
 *  @dev : pointer to the device structure.
 *  @addr: a uchar pointer to the new mac address which is to be set.
5309
 *  Description : This procedure will program the Xframe to receive
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5310
 *  frames with new Mac Address
5311
 *  Return value: SUCCESS on success and an appropriate (-)ve integer
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5312 5313
 *  as defined in errno.h file on failure.
 */
5314

5315
static int do_s2io_prog_unicast(struct net_device *dev, u8 *addr)
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5316
{
5317
	struct s2io_nic *sp = netdev_priv(dev);
5318
	register u64 mac_addr = 0, perm_addr = 0;
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5319
	int i;
5320 5321
	u64 tmp64;
	struct config_param *config = &sp->config;
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5322

5323
	/*
5324 5325 5326 5327
	* Set the new MAC address as the new unicast filter and reflect this
	* change on the device address registered with the OS. It will be
	* at offset 0.
	*/
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5328 5329 5330
	for (i = 0; i < ETH_ALEN; i++) {
		mac_addr <<= 8;
		mac_addr |= addr[i];
5331 5332
		perm_addr <<= 8;
		perm_addr |= sp->def_mac_addr[0].mac_addr[i];
5333 5334
	}

5335 5336
	/* check if the dev_addr is different than perm_addr */
	if (mac_addr == perm_addr)
5337 5338
		return SUCCESS;

5339 5340 5341 5342 5343 5344 5345 5346 5347 5348 5349 5350 5351 5352 5353 5354 5355
	/* check if the mac already preset in CAM */
	for (i = 1; i < config->max_mac_addr; i++) {
		tmp64 = do_s2io_read_unicast_mc(sp, i);
		if (tmp64 == S2IO_DISABLE_MAC_ENTRY) /* CAM entry is empty */
			break;

		if (tmp64 == mac_addr) {
			DBG_PRINT(INFO_DBG,
			"MAC addr:0x%llx already present in CAM\n",
			(unsigned long long)mac_addr);
			return SUCCESS;
		}
	}
	if (i == config->max_mac_addr) {
		DBG_PRINT(ERR_DBG, "CAM full no space left for Unicast MAC\n");
		return FAILURE;
	}
5356
	/* Update the internal structure with this new mac address */
5357 5358
	do_s2io_copy_mac_addr(sp, i, mac_addr);
	return (do_s2io_add_mac(sp, mac_addr, i));
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5359 5360 5361
}

/**
5362
 * s2io_ethtool_sset - Sets different link parameters.
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5363 5364 5365 5366
 * @sp : private member of the device structure, which is a pointer to the  * s2io_nic structure.
 * @info: pointer to the structure with parameters given by ethtool to set
 * link information.
 * Description:
5367
 * The function sets different link parameters provided by the user onto
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5368 5369 5370 5371 5372 5373 5374 5375
 * the NIC.
 * Return value:
 * 0 on success.
*/

static int s2io_ethtool_sset(struct net_device *dev,
			     struct ethtool_cmd *info)
{
5376
	struct s2io_nic *sp = netdev_priv(dev);
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5377 5378 5379 5380 5381 5382 5383 5384 5385 5386 5387 5388
	if ((info->autoneg == AUTONEG_ENABLE) ||
	    (info->speed != SPEED_10000) || (info->duplex != DUPLEX_FULL))
		return -EINVAL;
	else {
		s2io_close(sp->dev);
		s2io_open(sp->dev);
	}

	return 0;
}

/**
5389
 * s2io_ethtol_gset - Return link specific information.
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5390 5391 5392 5393 5394 5395 5396 5397 5398 5399 5400 5401
 * @sp : private member of the device structure, pointer to the
 *      s2io_nic structure.
 * @info : pointer to the structure with parameters given by ethtool
 * to return link information.
 * Description:
 * Returns link specific information like speed, duplex etc.. to ethtool.
 * Return value :
 * return 0 on success.
 */

static int s2io_ethtool_gset(struct net_device *dev, struct ethtool_cmd *info)
{
5402
	struct s2io_nic *sp = netdev_priv(dev);
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5403 5404 5405
	info->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
	info->advertising = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
	info->port = PORT_FIBRE;
5406 5407 5408

	/* info->transceiver */
	info->transceiver = XCVR_EXTERNAL;
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5409 5410 5411 5412 5413 5414 5415 5416 5417 5418 5419 5420 5421 5422

	if (netif_carrier_ok(sp->dev)) {
		info->speed = 10000;
		info->duplex = DUPLEX_FULL;
	} else {
		info->speed = -1;
		info->duplex = -1;
	}

	info->autoneg = AUTONEG_DISABLE;
	return 0;
}

/**
5423 5424
 * s2io_ethtool_gdrvinfo - Returns driver specific information.
 * @sp : private member of the device structure, which is a pointer to the
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5425 5426 5427 5428 5429 5430 5431 5432 5433 5434 5435 5436
 * s2io_nic structure.
 * @info : pointer to the structure with parameters given by ethtool to
 * return driver information.
 * Description:
 * Returns driver specefic information like name, version etc.. to ethtool.
 * Return value:
 *  void
 */

static void s2io_ethtool_gdrvinfo(struct net_device *dev,
				  struct ethtool_drvinfo *info)
{
5437
	struct s2io_nic *sp = netdev_priv(dev);
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5438

5439 5440 5441 5442
	strncpy(info->driver, s2io_driver_name, sizeof(info->driver));
	strncpy(info->version, s2io_driver_version, sizeof(info->version));
	strncpy(info->fw_version, "", sizeof(info->fw_version));
	strncpy(info->bus_info, pci_name(sp->pdev), sizeof(info->bus_info));
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5443 5444 5445 5446 5447 5448
	info->regdump_len = XENA_REG_SPACE;
	info->eedump_len = XENA_EEPROM_SPACE;
}

/**
 *  s2io_ethtool_gregs - dumps the entire space of Xfame into the buffer.
5449
 *  @sp: private member of the device structure, which is a pointer to the
L
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5450
 *  s2io_nic structure.
5451
 *  @regs : pointer to the structure with parameters given by ethtool for
L
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5452 5453 5454 5455 5456 5457 5458 5459 5460 5461 5462 5463 5464 5465 5466
 *  dumping the registers.
 *  @reg_space: The input argumnet into which all the registers are dumped.
 *  Description:
 *  Dumps the entire register space of xFrame NIC into the user given
 *  buffer area.
 * Return value :
 * void .
*/

static void s2io_ethtool_gregs(struct net_device *dev,
			       struct ethtool_regs *regs, void *space)
{
	int i;
	u64 reg;
	u8 *reg_space = (u8 *) space;
5467
	struct s2io_nic *sp = netdev_priv(dev);
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5468 5469 5470 5471 5472 5473 5474 5475 5476 5477 5478 5479

	regs->len = XENA_REG_SPACE;
	regs->version = sp->pdev->subsystem_device;

	for (i = 0; i < regs->len; i += 8) {
		reg = readq(sp->bar0 + i);
		memcpy((reg_space + i), &reg, 8);
	}
}

/**
 *  s2io_phy_id  - timer function that alternates adapter LED.
5480
 *  @data : address of the private member of the device structure, which
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5481
 *  is a pointer to the s2io_nic structure, provided as an u32.
5482 5483 5484
 * Description: This is actually the timer function that alternates the
 * adapter LED bit of the adapter control bit to set/reset every time on
 * invocation. The timer is set for 1/2 a second, hence tha NIC blinks
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5485 5486 5487 5488
 *  once every second.
*/
static void s2io_phy_id(unsigned long data)
{
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	struct s2io_nic *sp = (struct s2io_nic *) data;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
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5491 5492 5493 5494
	u64 val64 = 0;
	u16 subid;

	subid = sp->pdev->subsystem_device;
5495 5496
	if ((sp->device_type == XFRAME_II_DEVICE) ||
		   ((subid & 0xFF) >= 0x07)) {
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5497 5498 5499 5500 5501 5502 5503 5504 5505 5506 5507 5508 5509 5510 5511 5512
		val64 = readq(&bar0->gpio_control);
		val64 ^= GPIO_CTRL_GPIO_0;
		writeq(val64, &bar0->gpio_control);
	} else {
		val64 = readq(&bar0->adapter_control);
		val64 ^= ADAPTER_LED_ON;
		writeq(val64, &bar0->adapter_control);
	}

	mod_timer(&sp->id_timer, jiffies + HZ / 2);
}

/**
 * s2io_ethtool_idnic - To physically identify the nic on the system.
 * @sp : private member of the device structure, which is a pointer to the
 * s2io_nic structure.
5513
 * @id : pointer to the structure with identification parameters given by
L
Linus Torvalds 已提交
5514 5515
 * ethtool.
 * Description: Used to physically identify the NIC on the system.
5516
 * The Link LED will blink for a time specified by the user for
L
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5517
 * identification.
5518
 * NOTE: The Link has to be Up to be able to blink the LED. Hence
L
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5519 5520 5521 5522 5523 5524 5525 5526
 * identification is possible only if it's link is up.
 * Return value:
 * int , returns 0 on success
 */

static int s2io_ethtool_idnic(struct net_device *dev, u32 data)
{
	u64 val64 = 0, last_gpio_ctrl_val;
5527
	struct s2io_nic *sp = netdev_priv(dev);
R
Ralf Baechle 已提交
5528
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
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5529 5530 5531 5532
	u16 subid;

	subid = sp->pdev->subsystem_device;
	last_gpio_ctrl_val = readq(&bar0->gpio_control);
5533 5534
	if ((sp->device_type == XFRAME_I_DEVICE) &&
		((subid & 0xFF) < 0x07)) {
L
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5535 5536 5537 5538 5539 5540 5541 5542 5543 5544 5545 5546 5547 5548
		val64 = readq(&bar0->adapter_control);
		if (!(val64 & ADAPTER_CNTL_EN)) {
			printk(KERN_ERR
			       "Adapter Link down, cannot blink LED\n");
			return -EFAULT;
		}
	}
	if (sp->id_timer.function == NULL) {
		init_timer(&sp->id_timer);
		sp->id_timer.function = s2io_phy_id;
		sp->id_timer.data = (unsigned long) sp;
	}
	mod_timer(&sp->id_timer, jiffies);
	if (data)
5549
		msleep_interruptible(data * HZ);
L
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5550
	else
5551
		msleep_interruptible(MAX_FLICKER_TIME);
L
Linus Torvalds 已提交
5552 5553
	del_timer_sync(&sp->id_timer);

5554
	if (CARDS_WITH_FAULTY_LINK_INDICATORS(sp->device_type, subid)) {
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5555 5556 5557 5558 5559 5560 5561
		writeq(last_gpio_ctrl_val, &bar0->gpio_control);
		last_gpio_ctrl_val = readq(&bar0->gpio_control);
	}

	return 0;
}

5562 5563 5564
static void s2io_ethtool_gringparam(struct net_device *dev,
                                    struct ethtool_ringparam *ering)
{
5565
	struct s2io_nic *sp = netdev_priv(dev);
5566 5567 5568 5569 5570 5571 5572 5573
	int i,tx_desc_count=0,rx_desc_count=0;

	if (sp->rxd_mode == RXD_MODE_1)
		ering->rx_max_pending = MAX_RX_DESC_1;
	else if (sp->rxd_mode == RXD_MODE_3B)
		ering->rx_max_pending = MAX_RX_DESC_2;

	ering->tx_max_pending = MAX_TX_DESC;
5574
	for (i = 0 ; i < sp->config.tx_fifo_num ; i++)
5575
		tx_desc_count += sp->config.tx_cfg[i].fifo_len;
5576

5577 5578 5579
	DBG_PRINT(INFO_DBG,"\nmax txds : %d\n",sp->config.max_txds);
	ering->tx_pending = tx_desc_count;
	rx_desc_count = 0;
5580
	for (i = 0 ; i < sp->config.rx_ring_num ; i++)
5581
		rx_desc_count += sp->config.rx_cfg[i].num_rxd;
5582

5583 5584 5585 5586 5587 5588 5589 5590 5591 5592 5593
	ering->rx_pending = rx_desc_count;

	ering->rx_mini_max_pending = 0;
	ering->rx_mini_pending = 0;
	if(sp->rxd_mode == RXD_MODE_1)
		ering->rx_jumbo_max_pending = MAX_RX_DESC_1;
	else if (sp->rxd_mode == RXD_MODE_3B)
		ering->rx_jumbo_max_pending = MAX_RX_DESC_2;
	ering->rx_jumbo_pending = rx_desc_count;
}

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5594 5595
/**
 * s2io_ethtool_getpause_data -Pause frame frame generation and reception.
5596 5597
 * @sp : private member of the device structure, which is a pointer to the
 *	s2io_nic structure.
L
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5598 5599 5600 5601 5602 5603 5604 5605 5606 5607
 * @ep : pointer to the structure with pause parameters given by ethtool.
 * Description:
 * Returns the Pause frame generation and reception capability of the NIC.
 * Return value:
 *  void
 */
static void s2io_ethtool_getpause_data(struct net_device *dev,
				       struct ethtool_pauseparam *ep)
{
	u64 val64;
5608
	struct s2io_nic *sp = netdev_priv(dev);
R
Ralf Baechle 已提交
5609
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
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5610 5611 5612

	val64 = readq(&bar0->rmac_pause_cfg);
	if (val64 & RMAC_PAUSE_GEN_ENABLE)
5613
		ep->tx_pause = true;
L
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5614
	if (val64 & RMAC_PAUSE_RX_ENABLE)
5615 5616
		ep->rx_pause = true;
	ep->autoneg = false;
L
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5617 5618 5619 5620
}

/**
 * s2io_ethtool_setpause_data -  set/reset pause frame generation.
5621
 * @sp : private member of the device structure, which is a pointer to the
L
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5622 5623 5624 5625 5626 5627 5628 5629 5630 5631
 *      s2io_nic structure.
 * @ep : pointer to the structure with pause parameters given by ethtool.
 * Description:
 * It can be used to set or reset Pause frame generation or reception
 * support of the NIC.
 * Return value:
 * int, returns 0 on Success
 */

static int s2io_ethtool_setpause_data(struct net_device *dev,
5632
			       struct ethtool_pauseparam *ep)
L
Linus Torvalds 已提交
5633 5634
{
	u64 val64;
5635
	struct s2io_nic *sp = netdev_priv(dev);
R
Ralf Baechle 已提交
5636
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
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5637 5638 5639 5640 5641 5642 5643 5644 5645 5646 5647 5648 5649 5650 5651 5652

	val64 = readq(&bar0->rmac_pause_cfg);
	if (ep->tx_pause)
		val64 |= RMAC_PAUSE_GEN_ENABLE;
	else
		val64 &= ~RMAC_PAUSE_GEN_ENABLE;
	if (ep->rx_pause)
		val64 |= RMAC_PAUSE_RX_ENABLE;
	else
		val64 &= ~RMAC_PAUSE_RX_ENABLE;
	writeq(val64, &bar0->rmac_pause_cfg);
	return 0;
}

/**
 * read_eeprom - reads 4 bytes of data from user given offset.
5653
 * @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5654 5655 5656
 *      s2io_nic structure.
 * @off : offset at which the data must be written
 * @data : Its an output parameter where the data read at the given
5657
 *	offset is stored.
L
Linus Torvalds 已提交
5658
 * Description:
5659
 * Will read 4 bytes of data from the user given offset and return the
L
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5660 5661 5662 5663 5664 5665 5666 5667
 * read data.
 * NOTE: Will allow to read only part of the EEPROM visible through the
 *   I2C bus.
 * Return value:
 *  -1 on failure and 0 on success.
 */

#define S2IO_DEV_ID		5
R
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5668
static int read_eeprom(struct s2io_nic * sp, int off, u64 * data)
L
Linus Torvalds 已提交
5669 5670 5671 5672
{
	int ret = -1;
	u32 exit_cnt = 0;
	u64 val64;
R
Ralf Baechle 已提交
5673
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
5674

5675 5676 5677 5678 5679
	if (sp->device_type == XFRAME_I_DEVICE) {
		val64 = I2C_CONTROL_DEV_ID(S2IO_DEV_ID) | I2C_CONTROL_ADDR(off) |
		    I2C_CONTROL_BYTE_CNT(0x3) | I2C_CONTROL_READ |
		    I2C_CONTROL_CNTL_START;
		SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF);
L
Linus Torvalds 已提交
5680

5681 5682 5683 5684 5685 5686 5687 5688 5689
		while (exit_cnt < 5) {
			val64 = readq(&bar0->i2c_control);
			if (I2C_CONTROL_CNTL_END(val64)) {
				*data = I2C_CONTROL_GET_DATA(val64);
				ret = 0;
				break;
			}
			msleep(50);
			exit_cnt++;
L
Linus Torvalds 已提交
5690 5691 5692
		}
	}

5693 5694
	if (sp->device_type == XFRAME_II_DEVICE) {
		val64 = SPI_CONTROL_KEY(0x9) | SPI_CONTROL_SEL1 |
5695
			SPI_CONTROL_BYTECNT(0x3) |
5696 5697 5698 5699 5700 5701 5702 5703 5704 5705 5706 5707 5708 5709 5710 5711 5712 5713 5714
			SPI_CONTROL_CMD(0x3) | SPI_CONTROL_ADDR(off);
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		val64 |= SPI_CONTROL_REQ;
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		while (exit_cnt < 5) {
			val64 = readq(&bar0->spi_control);
			if (val64 & SPI_CONTROL_NACK) {
				ret = 1;
				break;
			} else if (val64 & SPI_CONTROL_DONE) {
				*data = readq(&bar0->spi_data);
				*data &= 0xffffff;
				ret = 0;
				break;
			}
			msleep(50);
			exit_cnt++;
		}
	}
L
Linus Torvalds 已提交
5715 5716 5717 5718 5719 5720 5721 5722 5723
	return ret;
}

/**
 *  write_eeprom - actually writes the relevant part of the data value.
 *  @sp : private member of the device structure, which is a pointer to the
 *       s2io_nic structure.
 *  @off : offset at which the data must be written
 *  @data : The data that is to be written
5724
 *  @cnt : Number of bytes of the data that are actually to be written into
L
Linus Torvalds 已提交
5725 5726 5727 5728 5729 5730 5731 5732
 *  the Eeprom. (max of 3)
 * Description:
 *  Actually writes the relevant part of the data value into the Eeprom
 *  through the I2C bus.
 * Return value:
 *  0 on success, -1 on failure.
 */

R
Ralf Baechle 已提交
5733
static int write_eeprom(struct s2io_nic * sp, int off, u64 data, int cnt)
L
Linus Torvalds 已提交
5734 5735 5736
{
	int exit_cnt = 0, ret = -1;
	u64 val64;
R
Ralf Baechle 已提交
5737
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
5738

5739 5740 5741 5742 5743 5744 5745 5746 5747 5748 5749 5750 5751 5752 5753 5754 5755
	if (sp->device_type == XFRAME_I_DEVICE) {
		val64 = I2C_CONTROL_DEV_ID(S2IO_DEV_ID) | I2C_CONTROL_ADDR(off) |
		    I2C_CONTROL_BYTE_CNT(cnt) | I2C_CONTROL_SET_DATA((u32)data) |
		    I2C_CONTROL_CNTL_START;
		SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF);

		while (exit_cnt < 5) {
			val64 = readq(&bar0->i2c_control);
			if (I2C_CONTROL_CNTL_END(val64)) {
				if (!(val64 & I2C_CONTROL_NACK))
					ret = 0;
				break;
			}
			msleep(50);
			exit_cnt++;
		}
	}
L
Linus Torvalds 已提交
5756

5757 5758 5759 5760 5761
	if (sp->device_type == XFRAME_II_DEVICE) {
		int write_cnt = (cnt == 8) ? 0 : cnt;
		writeq(SPI_DATA_WRITE(data,(cnt<<3)), &bar0->spi_data);

		val64 = SPI_CONTROL_KEY(0x9) | SPI_CONTROL_SEL1 |
5762
			SPI_CONTROL_BYTECNT(write_cnt) |
5763 5764 5765 5766 5767 5768 5769 5770 5771 5772
			SPI_CONTROL_CMD(0x2) | SPI_CONTROL_ADDR(off);
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		val64 |= SPI_CONTROL_REQ;
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		while (exit_cnt < 5) {
			val64 = readq(&bar0->spi_control);
			if (val64 & SPI_CONTROL_NACK) {
				ret = 1;
				break;
			} else if (val64 & SPI_CONTROL_DONE) {
L
Linus Torvalds 已提交
5773
				ret = 0;
5774 5775 5776 5777
				break;
			}
			msleep(50);
			exit_cnt++;
L
Linus Torvalds 已提交
5778 5779 5780 5781
		}
	}
	return ret;
}
R
Ralf Baechle 已提交
5782
static void s2io_vpd_read(struct s2io_nic *nic)
5783
{
5784 5785
	u8 *vpd_data;
	u8 data;
5786 5787 5788 5789 5790 5791 5792 5793 5794 5795 5796
	int i=0, cnt, fail = 0;
	int vpd_addr = 0x80;

	if (nic->device_type == XFRAME_II_DEVICE) {
		strcpy(nic->product_name, "Xframe II 10GbE network adapter");
		vpd_addr = 0x80;
	}
	else {
		strcpy(nic->product_name, "Xframe I 10GbE network adapter");
		vpd_addr = 0x50;
	}
5797
	strcpy(nic->serial_num, "NOT AVAILABLE");
5798

5799
	vpd_data = kmalloc(256, GFP_KERNEL);
5800 5801
	if (!vpd_data) {
		nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
5802
		return;
5803
	}
5804
	nic->mac_control.stats_info->sw_stat.mem_allocated += 256;
5805

5806 5807 5808 5809 5810 5811 5812 5813 5814 5815 5816 5817 5818 5819 5820 5821 5822 5823
	for (i = 0; i < 256; i +=4 ) {
		pci_write_config_byte(nic->pdev, (vpd_addr + 2), i);
		pci_read_config_byte(nic->pdev,  (vpd_addr + 2), &data);
		pci_write_config_byte(nic->pdev, (vpd_addr + 3), 0);
		for (cnt = 0; cnt <5; cnt++) {
			msleep(2);
			pci_read_config_byte(nic->pdev, (vpd_addr + 3), &data);
			if (data == 0x80)
				break;
		}
		if (cnt >= 5) {
			DBG_PRINT(ERR_DBG, "Read of VPD data failed\n");
			fail = 1;
			break;
		}
		pci_read_config_dword(nic->pdev,  (vpd_addr + 4),
				      (u32 *)&vpd_data[i]);
	}
5824 5825 5826 5827 5828 5829 5830 5831 5832 5833 5834 5835 5836 5837 5838 5839

	if(!fail) {
		/* read serial number of adapter */
		for (cnt = 0; cnt < 256; cnt++) {
		if ((vpd_data[cnt] == 'S') &&
			(vpd_data[cnt+1] == 'N') &&
			(vpd_data[cnt+2] < VPD_STRING_LEN)) {
				memset(nic->serial_num, 0, VPD_STRING_LEN);
				memcpy(nic->serial_num, &vpd_data[cnt + 3],
					vpd_data[cnt+2]);
				break;
			}
		}
	}

	if ((!fail) && (vpd_data[1] < VPD_STRING_LEN)) {
5840 5841 5842
		memset(nic->product_name, 0, vpd_data[1]);
		memcpy(nic->product_name, &vpd_data[3], vpd_data[1]);
	}
5843
	kfree(vpd_data);
5844
	nic->mac_control.stats_info->sw_stat.mem_freed += 256;
5845 5846
}

L
Linus Torvalds 已提交
5847 5848 5849
/**
 *  s2io_ethtool_geeprom  - reads the value stored in the Eeprom.
 *  @sp : private member of the device structure, which is a pointer to the *       s2io_nic structure.
5850
 *  @eeprom : pointer to the user level structure provided by ethtool,
L
Linus Torvalds 已提交
5851 5852 5853 5854 5855 5856 5857 5858 5859 5860
 *  containing all relevant information.
 *  @data_buf : user defined value to be written into Eeprom.
 *  Description: Reads the values stored in the Eeprom at given offset
 *  for a given length. Stores these values int the input argument data
 *  buffer 'data_buf' and returns these to the caller (ethtool.)
 *  Return value:
 *  int  0 on success
 */

static int s2io_ethtool_geeprom(struct net_device *dev,
5861
			 struct ethtool_eeprom *eeprom, u8 * data_buf)
L
Linus Torvalds 已提交
5862
{
5863 5864
	u32 i, valid;
	u64 data;
5865
	struct s2io_nic *sp = netdev_priv(dev);
L
Linus Torvalds 已提交
5866 5867 5868 5869 5870 5871 5872 5873 5874 5875 5876 5877 5878 5879 5880 5881 5882 5883 5884 5885 5886

	eeprom->magic = sp->pdev->vendor | (sp->pdev->device << 16);

	if ((eeprom->offset + eeprom->len) > (XENA_EEPROM_SPACE))
		eeprom->len = XENA_EEPROM_SPACE - eeprom->offset;

	for (i = 0; i < eeprom->len; i += 4) {
		if (read_eeprom(sp, (eeprom->offset + i), &data)) {
			DBG_PRINT(ERR_DBG, "Read of EEPROM failed\n");
			return -EFAULT;
		}
		valid = INV(data);
		memcpy((data_buf + i), &valid, 4);
	}
	return 0;
}

/**
 *  s2io_ethtool_seeprom - tries to write the user provided value in Eeprom
 *  @sp : private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
5887
 *  @eeprom : pointer to the user level structure provided by ethtool,
L
Linus Torvalds 已提交
5888 5889 5890 5891 5892 5893 5894 5895 5896 5897 5898 5899 5900 5901
 *  containing all relevant information.
 *  @data_buf ; user defined value to be written into Eeprom.
 *  Description:
 *  Tries to write the user provided value in the Eeprom, at the offset
 *  given by the user.
 *  Return value:
 *  0 on success, -EFAULT on failure.
 */

static int s2io_ethtool_seeprom(struct net_device *dev,
				struct ethtool_eeprom *eeprom,
				u8 * data_buf)
{
	int len = eeprom->len, cnt = 0;
5902
	u64 valid = 0, data;
5903
	struct s2io_nic *sp = netdev_priv(dev);
L
Linus Torvalds 已提交
5904 5905 5906 5907 5908 5909 5910 5911 5912 5913 5914 5915 5916 5917 5918 5919 5920 5921 5922 5923 5924 5925 5926 5927 5928 5929 5930 5931 5932 5933 5934

	if (eeprom->magic != (sp->pdev->vendor | (sp->pdev->device << 16))) {
		DBG_PRINT(ERR_DBG,
			  "ETHTOOL_WRITE_EEPROM Err: Magic value ");
		DBG_PRINT(ERR_DBG, "is wrong, Its not 0x%x\n",
			  eeprom->magic);
		return -EFAULT;
	}

	while (len) {
		data = (u32) data_buf[cnt] & 0x000000FF;
		if (data) {
			valid = (u32) (data << 24);
		} else
			valid = data;

		if (write_eeprom(sp, (eeprom->offset + cnt), valid, 0)) {
			DBG_PRINT(ERR_DBG,
				  "ETHTOOL_WRITE_EEPROM Err: Cannot ");
			DBG_PRINT(ERR_DBG,
				  "write into the specified offset\n");
			return -EFAULT;
		}
		cnt++;
		len--;
	}

	return 0;
}

/**
5935 5936
 * s2io_register_test - reads and writes into all clock domains.
 * @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5937 5938 5939 5940 5941 5942 5943 5944 5945 5946
 * s2io_nic structure.
 * @data : variable that returns the result of each of the test conducted b
 * by the driver.
 * Description:
 * Read and write into all clock domains. The NIC has 3 clock domains,
 * see that registers in all the three regions are accessible.
 * Return value:
 * 0 on success.
 */

R
Ralf Baechle 已提交
5947
static int s2io_register_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
5948
{
R
Ralf Baechle 已提交
5949
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
5950
	u64 val64 = 0, exp_val;
L
Linus Torvalds 已提交
5951 5952
	int fail = 0;

5953 5954
	val64 = readq(&bar0->pif_rd_swapper_fb);
	if (val64 != 0x123456789abcdefULL) {
L
Linus Torvalds 已提交
5955 5956 5957 5958 5959 5960 5961 5962 5963 5964 5965
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 1 fails\n");
	}

	val64 = readq(&bar0->rmac_pause_cfg);
	if (val64 != 0xc000ffff00000000ULL) {
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 2 fails\n");
	}

	val64 = readq(&bar0->rx_queue_cfg);
5966 5967 5968 5969 5970
	if (sp->device_type == XFRAME_II_DEVICE)
		exp_val = 0x0404040404040404ULL;
	else
		exp_val = 0x0808080808080808ULL;
	if (val64 != exp_val) {
L
Linus Torvalds 已提交
5971 5972 5973 5974 5975 5976 5977 5978 5979 5980 5981 5982 5983 5984 5985 5986 5987 5988 5989 5990 5991 5992 5993 5994 5995 5996 5997
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 3 fails\n");
	}

	val64 = readq(&bar0->xgxs_efifo_cfg);
	if (val64 != 0x000000001923141EULL) {
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 4 fails\n");
	}

	val64 = 0x5A5A5A5A5A5A5A5AULL;
	writeq(val64, &bar0->xmsi_data);
	val64 = readq(&bar0->xmsi_data);
	if (val64 != 0x5A5A5A5A5A5A5A5AULL) {
		fail = 1;
		DBG_PRINT(ERR_DBG, "Write Test level 1 fails\n");
	}

	val64 = 0xA5A5A5A5A5A5A5A5ULL;
	writeq(val64, &bar0->xmsi_data);
	val64 = readq(&bar0->xmsi_data);
	if (val64 != 0xA5A5A5A5A5A5A5A5ULL) {
		fail = 1;
		DBG_PRINT(ERR_DBG, "Write Test level 2 fails\n");
	}

	*data = fail;
5998
	return fail;
L
Linus Torvalds 已提交
5999 6000 6001
}

/**
6002
 * s2io_eeprom_test - to verify that EEprom in the xena can be programmed.
L
Linus Torvalds 已提交
6003 6004 6005 6006 6007
 * @sp : private member of the device structure, which is a pointer to the
 * s2io_nic structure.
 * @data:variable that returns the result of each of the test conducted by
 * the driver.
 * Description:
6008
 * Verify that EEPROM in the xena can be programmed using I2C_CONTROL
L
Linus Torvalds 已提交
6009 6010 6011 6012 6013
 * register.
 * Return value:
 * 0 on success.
 */

R
Ralf Baechle 已提交
6014
static int s2io_eeprom_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
6015 6016
{
	int fail = 0;
6017 6018 6019
	u64 ret_data, org_4F0, org_7F0;
	u8 saved_4F0 = 0, saved_7F0 = 0;
	struct net_device *dev = sp->dev;
L
Linus Torvalds 已提交
6020 6021

	/* Test Write Error at offset 0 */
6022 6023 6024 6025 6026 6027 6028 6029 6030 6031 6032 6033
	/* Note that SPI interface allows write access to all areas
	 * of EEPROM. Hence doing all negative testing only for Xframe I.
	 */
	if (sp->device_type == XFRAME_I_DEVICE)
		if (!write_eeprom(sp, 0, 0, 3))
			fail = 1;

	/* Save current values at offsets 0x4F0 and 0x7F0 */
	if (!read_eeprom(sp, 0x4F0, &org_4F0))
		saved_4F0 = 1;
	if (!read_eeprom(sp, 0x7F0, &org_7F0))
		saved_7F0 = 1;
L
Linus Torvalds 已提交
6034 6035

	/* Test Write at offset 4f0 */
6036
	if (write_eeprom(sp, 0x4F0, 0x012345, 3))
L
Linus Torvalds 已提交
6037 6038 6039 6040
		fail = 1;
	if (read_eeprom(sp, 0x4F0, &ret_data))
		fail = 1;

6041
	if (ret_data != 0x012345) {
6042 6043 6044 6045
		DBG_PRINT(ERR_DBG, "%s: eeprom test error at offset 0x4F0. "
			"Data written %llx Data read %llx\n",
			dev->name, (unsigned long long)0x12345,
			(unsigned long long)ret_data);
L
Linus Torvalds 已提交
6046
		fail = 1;
6047
	}
L
Linus Torvalds 已提交
6048 6049

	/* Reset the EEPROM data go FFFF */
6050
	write_eeprom(sp, 0x4F0, 0xFFFFFF, 3);
L
Linus Torvalds 已提交
6051 6052

	/* Test Write Request Error at offset 0x7c */
6053 6054 6055
	if (sp->device_type == XFRAME_I_DEVICE)
		if (!write_eeprom(sp, 0x07C, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
6056

6057 6058
	/* Test Write Request at offset 0x7f0 */
	if (write_eeprom(sp, 0x7F0, 0x012345, 3))
L
Linus Torvalds 已提交
6059
		fail = 1;
6060
	if (read_eeprom(sp, 0x7F0, &ret_data))
L
Linus Torvalds 已提交
6061 6062
		fail = 1;

6063
	if (ret_data != 0x012345) {
6064 6065 6066 6067
		DBG_PRINT(ERR_DBG, "%s: eeprom test error at offset 0x7F0. "
			"Data written %llx Data read %llx\n",
			dev->name, (unsigned long long)0x12345,
			(unsigned long long)ret_data);
L
Linus Torvalds 已提交
6068
		fail = 1;
6069
	}
L
Linus Torvalds 已提交
6070 6071

	/* Reset the EEPROM data go FFFF */
6072
	write_eeprom(sp, 0x7F0, 0xFFFFFF, 3);
L
Linus Torvalds 已提交
6073

6074 6075 6076 6077
	if (sp->device_type == XFRAME_I_DEVICE) {
		/* Test Write Error at offset 0x80 */
		if (!write_eeprom(sp, 0x080, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
6078

6079 6080 6081
		/* Test Write Error at offset 0xfc */
		if (!write_eeprom(sp, 0x0FC, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
6082

6083 6084 6085
		/* Test Write Error at offset 0x100 */
		if (!write_eeprom(sp, 0x100, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
6086

6087 6088 6089 6090 6091 6092 6093 6094 6095 6096
		/* Test Write Error at offset 4ec */
		if (!write_eeprom(sp, 0x4EC, 0, 3))
			fail = 1;
	}

	/* Restore values at offsets 0x4F0 and 0x7F0 */
	if (saved_4F0)
		write_eeprom(sp, 0x4F0, org_4F0, 3);
	if (saved_7F0)
		write_eeprom(sp, 0x7F0, org_7F0, 3);
L
Linus Torvalds 已提交
6097 6098

	*data = fail;
6099
	return fail;
L
Linus Torvalds 已提交
6100 6101 6102 6103
}

/**
 * s2io_bist_test - invokes the MemBist test of the card .
6104
 * @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
6105
 * s2io_nic structure.
6106
 * @data:variable that returns the result of each of the test conducted by
L
Linus Torvalds 已提交
6107 6108 6109 6110
 * the driver.
 * Description:
 * This invokes the MemBist test of the card. We give around
 * 2 secs time for the Test to complete. If it's still not complete
6111
 * within this peiod, we consider that the test failed.
L
Linus Torvalds 已提交
6112 6113 6114 6115
 * Return value:
 * 0 on success and -1 on failure.
 */

R
Ralf Baechle 已提交
6116
static int s2io_bist_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
6117 6118 6119 6120 6121 6122 6123 6124 6125 6126 6127 6128 6129 6130 6131 6132 6133 6134 6135 6136 6137 6138 6139
{
	u8 bist = 0;
	int cnt = 0, ret = -1;

	pci_read_config_byte(sp->pdev, PCI_BIST, &bist);
	bist |= PCI_BIST_START;
	pci_write_config_word(sp->pdev, PCI_BIST, bist);

	while (cnt < 20) {
		pci_read_config_byte(sp->pdev, PCI_BIST, &bist);
		if (!(bist & PCI_BIST_START)) {
			*data = (bist & PCI_BIST_CODE_MASK);
			ret = 0;
			break;
		}
		msleep(100);
		cnt++;
	}

	return ret;
}

/**
6140 6141
 * s2io-link_test - verifies the link state of the nic
 * @sp ; private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
6142 6143 6144 6145
 * s2io_nic structure.
 * @data: variable that returns the result of each of the test conducted by
 * the driver.
 * Description:
6146
 * The function verifies the link state of the NIC and updates the input
L
Linus Torvalds 已提交
6147 6148 6149 6150 6151
 * argument 'data' appropriately.
 * Return value:
 * 0 on success.
 */

R
Ralf Baechle 已提交
6152
static int s2io_link_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
6153
{
R
Ralf Baechle 已提交
6154
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
6155 6156 6157
	u64 val64;

	val64 = readq(&bar0->adapter_status);
A
Ananda Raju 已提交
6158
	if(!(LINK_IS_UP(val64)))
L
Linus Torvalds 已提交
6159
		*data = 1;
A
Ananda Raju 已提交
6160 6161
	else
		*data = 0;
L
Linus Torvalds 已提交
6162

6163
	return *data;
L
Linus Torvalds 已提交
6164 6165 6166
}

/**
6167 6168
 * s2io_rldram_test - offline test for access to the RldRam chip on the NIC
 * @sp - private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
6169
 * s2io_nic structure.
6170
 * @data - variable that returns the result of each of the test
L
Linus Torvalds 已提交
6171 6172
 * conducted by the driver.
 * Description:
6173
 *  This is one of the offline test that tests the read and write
L
Linus Torvalds 已提交
6174 6175 6176 6177 6178
 *  access to the RldRam chip on the NIC.
 * Return value:
 *  0 on success.
 */

R
Ralf Baechle 已提交
6179
static int s2io_rldram_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
6180
{
R
Ralf Baechle 已提交
6181
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
6182
	u64 val64;
6183
	int cnt, iteration = 0, test_fail = 0;
L
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	val64 = readq(&bar0->adapter_control);
	val64 &= ~ADAPTER_ECC_EN;
	writeq(val64, &bar0->adapter_control);

	val64 = readq(&bar0->mc_rldram_test_ctrl);
	val64 |= MC_RLDRAM_TEST_MODE;
6191
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
L
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6192 6193 6194 6195 6196 6197 6198 6199 6200 6201 6202 6203 6204 6205 6206 6207 6208 6209 6210 6211 6212 6213 6214 6215 6216 6217 6218

	val64 = readq(&bar0->mc_rldram_mrs);
	val64 |= MC_RLDRAM_QUEUE_SIZE_ENABLE;
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);

	val64 |= MC_RLDRAM_MRS_ENABLE;
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);

	while (iteration < 2) {
		val64 = 0x55555555aaaa0000ULL;
		if (iteration == 1) {
			val64 ^= 0xFFFFFFFFFFFF0000ULL;
		}
		writeq(val64, &bar0->mc_rldram_test_d0);

		val64 = 0xaaaa5a5555550000ULL;
		if (iteration == 1) {
			val64 ^= 0xFFFFFFFFFFFF0000ULL;
		}
		writeq(val64, &bar0->mc_rldram_test_d1);

		val64 = 0x55aaaaaaaa5a0000ULL;
		if (iteration == 1) {
			val64 ^= 0xFFFFFFFFFFFF0000ULL;
		}
		writeq(val64, &bar0->mc_rldram_test_d2);

6219
		val64 = (u64) (0x0000003ffffe0100ULL);
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6220 6221
		writeq(val64, &bar0->mc_rldram_test_add);

6222 6223 6224
		val64 = MC_RLDRAM_TEST_MODE | MC_RLDRAM_TEST_WRITE |
		    	MC_RLDRAM_TEST_GO;
		SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
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6225 6226 6227 6228 6229 6230 6231 6232 6233 6234 6235

		for (cnt = 0; cnt < 5; cnt++) {
			val64 = readq(&bar0->mc_rldram_test_ctrl);
			if (val64 & MC_RLDRAM_TEST_DONE)
				break;
			msleep(200);
		}

		if (cnt == 5)
			break;

6236 6237
		val64 = MC_RLDRAM_TEST_MODE | MC_RLDRAM_TEST_GO;
		SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
L
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6238 6239 6240 6241 6242 6243 6244 6245 6246 6247 6248 6249

		for (cnt = 0; cnt < 5; cnt++) {
			val64 = readq(&bar0->mc_rldram_test_ctrl);
			if (val64 & MC_RLDRAM_TEST_DONE)
				break;
			msleep(500);
		}

		if (cnt == 5)
			break;

		val64 = readq(&bar0->mc_rldram_test_ctrl);
6250 6251
		if (!(val64 & MC_RLDRAM_TEST_PASS))
			test_fail = 1;
L
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6252 6253 6254 6255

		iteration++;
	}

6256
	*data = test_fail;
L
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6257

6258 6259 6260 6261
	/* Bring the adapter out of test mode */
	SPECIAL_REG_WRITE(0, &bar0->mc_rldram_test_ctrl, LF);

	return test_fail;
L
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6262 6263 6264 6265 6266 6267 6268 6269
}

/**
 *  s2io_ethtool_test - conducts 6 tsets to determine the health of card.
 *  @sp : private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
 *  @ethtest : pointer to a ethtool command specific structure that will be
 *  returned to the user.
6270
 *  @data : variable that returns the result of each of the test
L
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6271 6272 6273 6274 6275 6276 6277 6278 6279 6280 6281 6282
 * conducted by the driver.
 * Description:
 *  This function conducts 6 tests ( 4 offline and 2 online) to determine
 *  the health of the card.
 * Return value:
 *  void
 */

static void s2io_ethtool_test(struct net_device *dev,
			      struct ethtool_test *ethtest,
			      uint64_t * data)
{
6283
	struct s2io_nic *sp = netdev_priv(dev);
L
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6284 6285 6286 6287
	int orig_state = netif_running(sp->dev);

	if (ethtest->flags == ETH_TEST_FL_OFFLINE) {
		/* Offline Tests. */
6288
		if (orig_state)
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6289 6290 6291 6292 6293 6294 6295 6296 6297 6298 6299 6300 6301 6302 6303 6304 6305 6306 6307 6308 6309 6310 6311 6312 6313 6314 6315 6316 6317 6318 6319 6320 6321 6322 6323 6324 6325 6326 6327 6328 6329 6330 6331 6332 6333 6334 6335 6336 6337
			s2io_close(sp->dev);

		if (s2io_register_test(sp, &data[0]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		s2io_reset(sp);

		if (s2io_rldram_test(sp, &data[3]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		s2io_reset(sp);

		if (s2io_eeprom_test(sp, &data[1]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		if (s2io_bist_test(sp, &data[4]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		if (orig_state)
			s2io_open(sp->dev);

		data[2] = 0;
	} else {
		/* Online Tests. */
		if (!orig_state) {
			DBG_PRINT(ERR_DBG,
				  "%s: is not up, cannot run test\n",
				  dev->name);
			data[0] = -1;
			data[1] = -1;
			data[2] = -1;
			data[3] = -1;
			data[4] = -1;
		}

		if (s2io_link_test(sp, &data[2]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		data[0] = 0;
		data[1] = 0;
		data[3] = 0;
		data[4] = 0;
	}
}

static void s2io_get_ethtool_stats(struct net_device *dev,
				   struct ethtool_stats *estats,
				   u64 * tmp_stats)
{
6338
	int i = 0, k;
6339
	struct s2io_nic *sp = netdev_priv(dev);
R
Ralf Baechle 已提交
6340
	struct stat_block *stat_info = sp->mac_control.stats_info;
L
Linus Torvalds 已提交
6341

6342
	s2io_updt_stats(sp);
6343 6344 6345 6346 6347 6348
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_frms_oflow) << 32  |
		le32_to_cpu(stat_info->tmac_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_data_octets_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_data_octets);
L
Linus Torvalds 已提交
6349
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_drop_frms);
6350 6351 6352 6353 6354 6355
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_mcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_mcst_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_bcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_bcst_frms);
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6356
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_pause_ctrl_frms);
6357 6358 6359 6360 6361 6362 6363 6364 6365
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->tmac_ttl_octets_oflow) << 32 |
                le32_to_cpu(stat_info->tmac_ttl_octets);
	tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->tmac_ucst_frms_oflow) << 32 |
                le32_to_cpu(stat_info->tmac_ucst_frms);
	tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->tmac_nucst_frms_oflow) << 32 |
                le32_to_cpu(stat_info->tmac_nucst_frms);
6366 6367 6368
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_any_err_frms_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_any_err_frms);
6369
        tmp_stats[i++] = le64_to_cpu(stat_info->tmac_ttl_less_fb_octets);
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Linus Torvalds 已提交
6370
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_vld_ip_octets);
6371 6372 6373 6374 6375 6376 6377 6378 6379 6380 6381 6382
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_vld_ip_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_vld_ip);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_drop_ip_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_drop_ip);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_icmp_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_icmp);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_rst_tcp_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_rst_tcp);
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6383
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_tcp);
6384 6385 6386 6387 6388 6389 6390 6391
	tmp_stats[i++] = (u64)le32_to_cpu(stat_info->tmac_udp_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_udp);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_vld_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_vld_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_data_octets_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_data_octets);
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6392 6393
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_fcs_err_frms);
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_drop_frms);
6394 6395 6396 6397 6398 6399
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_vld_mcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_vld_mcst_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_vld_bcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_vld_bcst_frms);
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Linus Torvalds 已提交
6400
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_in_rng_len_err_frms);
6401
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_out_rng_len_err_frms);
L
Linus Torvalds 已提交
6402 6403
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_long_frms);
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_pause_ctrl_frms);
6404 6405 6406 6407 6408 6409 6410 6411 6412 6413
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_unsup_ctrl_frms);
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_ttl_octets_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_ttl_octets);
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_accepted_ucst_frms_oflow)
		<< 32 | le32_to_cpu(stat_info->rmac_accepted_ucst_frms);
	tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_accepted_nucst_frms_oflow)
                 << 32 | le32_to_cpu(stat_info->rmac_accepted_nucst_frms);
6414 6415 6416
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_discarded_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_discarded_frms);
6417 6418 6419 6420 6421
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_drop_events_oflow)
                 << 32 | le32_to_cpu(stat_info->rmac_drop_events);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_less_fb_octets);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_frms);
6422 6423 6424 6425 6426 6427 6428 6429 6430 6431 6432 6433
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_usized_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_usized_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_osized_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_osized_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_frag_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_frag_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_jabber_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_jabber_frms);
6434 6435 6436 6437 6438 6439 6440 6441
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_64_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_65_127_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_128_255_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_256_511_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_512_1023_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_1024_1518_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_ip_oflow) << 32 |
6442
		le32_to_cpu(stat_info->rmac_ip);
L
Linus Torvalds 已提交
6443 6444
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ip_octets);
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_hdr_err_ip);
6445 6446
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_drop_ip_oflow) << 32 |
6447
		le32_to_cpu(stat_info->rmac_drop_ip);
6448 6449
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_icmp_oflow) << 32 |
6450
		le32_to_cpu(stat_info->rmac_icmp);
L
Linus Torvalds 已提交
6451
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_tcp);
6452 6453
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_udp_oflow) << 32 |
6454 6455 6456 6457
		le32_to_cpu(stat_info->rmac_udp);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_err_drp_udp_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_err_drp_udp);
6458 6459 6460 6461 6462 6463 6464 6465 6466 6467 6468 6469 6470 6471 6472 6473 6474
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_err_sym);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q0);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q1);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q2);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q3);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q4);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q5);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q6);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q7);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q0);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q1);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q2);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q3);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q4);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q5);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q6);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q7);
6475 6476 6477
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_pause_cnt_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_pause_cnt);
6478 6479
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_data_err_cnt);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_ctrl_err_cnt);
6480 6481 6482
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_accepted_ip_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_accepted_ip);
L
Linus Torvalds 已提交
6483
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_err_tcp);
6484 6485 6486 6487 6488 6489 6490 6491 6492 6493 6494 6495 6496 6497 6498 6499 6500 6501
	tmp_stats[i++] = le32_to_cpu(stat_info->rd_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_rd_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_rd_req_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rd_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_rtry_rd_ack_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_wr_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_wr_req_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_disc_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rd_rtry_wr_ack_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txp_wr_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txd_rd_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txd_wr_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rxd_rd_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rxd_wr_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txf_rd_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rxf_wr_cnt);
6502 6503 6504 6505 6506 6507 6508 6509 6510 6511 6512 6513 6514 6515 6516 6517 6518 6519 6520 6521 6522 6523 6524 6525

	/* Enhanced statistics exist only for Hercules */
	if(sp->device_type == XFRAME_II_DEVICE) {
		tmp_stats[i++] =
				le64_to_cpu(stat_info->rmac_ttl_1519_4095_frms);
		tmp_stats[i++] =
				le64_to_cpu(stat_info->rmac_ttl_4096_8191_frms);
		tmp_stats[i++] =
				le64_to_cpu(stat_info->rmac_ttl_8192_max_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_gt_max_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_osized_alt_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_jabber_alt_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_gt_max_alt_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_vlan_frms);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_len_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_fcs_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_pf_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_da_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_red_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_rts_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_ingm_full_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->link_fault_cnt);
	}

6526 6527 6528
	tmp_stats[i++] = 0;
	tmp_stats[i++] = stat_info->sw_stat.single_ecc_errs;
	tmp_stats[i++] = stat_info->sw_stat.double_ecc_errs;
6529 6530 6531 6532
	tmp_stats[i++] = stat_info->sw_stat.parity_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.serious_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.soft_reset_cnt;
	tmp_stats[i++] = stat_info->sw_stat.fifo_full_cnt;
6533 6534
	for (k = 0; k < MAX_RX_RINGS; k++)
		tmp_stats[i++] = stat_info->sw_stat.ring_full_cnt[k];
6535 6536 6537 6538 6539 6540 6541 6542 6543 6544 6545 6546
	tmp_stats[i++] = stat_info->xpak_stat.alarm_transceiver_temp_high;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_transceiver_temp_low;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_bias_current_high;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_bias_current_low;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_output_power_high;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_output_power_low;
	tmp_stats[i++] = stat_info->xpak_stat.warn_transceiver_temp_high;
	tmp_stats[i++] = stat_info->xpak_stat.warn_transceiver_temp_low;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_bias_current_high;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_bias_current_low;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_output_power_high;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_output_power_low;
6547 6548 6549 6550
	tmp_stats[i++] = stat_info->sw_stat.clubbed_frms_cnt;
	tmp_stats[i++] = stat_info->sw_stat.sending_both;
	tmp_stats[i++] = stat_info->sw_stat.outof_sequence_pkts;
	tmp_stats[i++] = stat_info->sw_stat.flush_max_pkts;
6551
	if (stat_info->sw_stat.num_aggregations) {
6552 6553
		u64 tmp = stat_info->sw_stat.sum_avg_pkts_aggregated;
		int count = 0;
6554
		/*
6555 6556 6557 6558 6559 6560 6561 6562
		 * Since 64-bit divide does not work on all platforms,
		 * do repeated subtraction.
		 */
		while (tmp >= stat_info->sw_stat.num_aggregations) {
			tmp -= stat_info->sw_stat.num_aggregations;
			count++;
		}
		tmp_stats[i++] = count;
6563
	}
6564 6565
	else
		tmp_stats[i++] = 0;
6566
	tmp_stats[i++] = stat_info->sw_stat.mem_alloc_fail_cnt;
6567
	tmp_stats[i++] = stat_info->sw_stat.pci_map_fail_cnt;
6568
	tmp_stats[i++] = stat_info->sw_stat.watchdog_timer_cnt;
6569 6570 6571 6572 6573 6574 6575 6576 6577 6578 6579 6580 6581 6582 6583 6584 6585 6586 6587 6588 6589 6590
	tmp_stats[i++] = stat_info->sw_stat.mem_allocated;
	tmp_stats[i++] = stat_info->sw_stat.mem_freed;
	tmp_stats[i++] = stat_info->sw_stat.link_up_cnt;
	tmp_stats[i++] = stat_info->sw_stat.link_down_cnt;
	tmp_stats[i++] = stat_info->sw_stat.link_up_time;
	tmp_stats[i++] = stat_info->sw_stat.link_down_time;

	tmp_stats[i++] = stat_info->sw_stat.tx_buf_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_desc_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_parity_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_link_loss_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_list_proc_err_cnt;

	tmp_stats[i++] = stat_info->sw_stat.rx_parity_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_parity_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_rda_fail_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_unkn_prot_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_fcs_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_buf_size_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_rxd_corrupt_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_unkn_err_cnt;
6591 6592 6593 6594 6595 6596 6597 6598 6599 6600 6601 6602 6603 6604 6605 6606 6607
	tmp_stats[i++] = stat_info->sw_stat.tda_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.pfc_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.pcc_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tti_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tpa_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.sm_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.lso_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.mac_tmac_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.mac_rmac_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.xgxs_txgxs_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.xgxs_rxgxs_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rc_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.prc_pcix_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rpa_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rda_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rti_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.mc_err_cnt;
L
Linus Torvalds 已提交
6608 6609
}

6610
static int s2io_ethtool_get_regs_len(struct net_device *dev)
L
Linus Torvalds 已提交
6611 6612 6613 6614 6615
{
	return (XENA_REG_SPACE);
}


6616
static u32 s2io_ethtool_get_rx_csum(struct net_device * dev)
L
Linus Torvalds 已提交
6617
{
6618
	struct s2io_nic *sp = netdev_priv(dev);
L
Linus Torvalds 已提交
6619 6620 6621

	return (sp->rx_csum);
}
6622 6623

static int s2io_ethtool_set_rx_csum(struct net_device *dev, u32 data)
L
Linus Torvalds 已提交
6624
{
6625
	struct s2io_nic *sp = netdev_priv(dev);
L
Linus Torvalds 已提交
6626 6627 6628 6629 6630 6631 6632 6633

	if (data)
		sp->rx_csum = 1;
	else
		sp->rx_csum = 0;

	return 0;
}
6634 6635

static int s2io_get_eeprom_len(struct net_device *dev)
L
Linus Torvalds 已提交
6636 6637 6638 6639
{
	return (XENA_EEPROM_SPACE);
}

6640
static int s2io_get_sset_count(struct net_device *dev, int sset)
L
Linus Torvalds 已提交
6641
{
6642
	struct s2io_nic *sp = netdev_priv(dev);
6643 6644 6645 6646 6647 6648 6649 6650 6651 6652 6653 6654 6655 6656 6657 6658

	switch (sset) {
	case ETH_SS_TEST:
		return S2IO_TEST_LEN;
	case ETH_SS_STATS:
		switch(sp->device_type) {
		case XFRAME_I_DEVICE:
			return XFRAME_I_STAT_LEN;
		case XFRAME_II_DEVICE:
			return XFRAME_II_STAT_LEN;
		default:
			return 0;
		}
	default:
		return -EOPNOTSUPP;
	}
L
Linus Torvalds 已提交
6659
}
6660 6661 6662

static void s2io_ethtool_get_strings(struct net_device *dev,
				     u32 stringset, u8 * data)
L
Linus Torvalds 已提交
6663
{
6664
	int stat_size = 0;
6665
	struct s2io_nic *sp = netdev_priv(dev);
6666

L
Linus Torvalds 已提交
6667 6668 6669 6670 6671
	switch (stringset) {
	case ETH_SS_TEST:
		memcpy(data, s2io_gstrings, S2IO_STRINGS_LEN);
		break;
	case ETH_SS_STATS:
6672 6673 6674 6675 6676 6677 6678 6679 6680 6681 6682
		stat_size = sizeof(ethtool_xena_stats_keys);
		memcpy(data, &ethtool_xena_stats_keys,stat_size);
		if(sp->device_type == XFRAME_II_DEVICE) {
			memcpy(data + stat_size,
				&ethtool_enhanced_stats_keys,
				sizeof(ethtool_enhanced_stats_keys));
			stat_size += sizeof(ethtool_enhanced_stats_keys);
		}

		memcpy(data + stat_size, &ethtool_driver_stats_keys,
			sizeof(ethtool_driver_stats_keys));
L
Linus Torvalds 已提交
6683 6684 6685
	}
}

6686
static int s2io_ethtool_op_set_tx_csum(struct net_device *dev, u32 data)
L
Linus Torvalds 已提交
6687 6688 6689 6690 6691 6692 6693 6694 6695
{
	if (data)
		dev->features |= NETIF_F_IP_CSUM;
	else
		dev->features &= ~NETIF_F_IP_CSUM;

	return 0;
}

6696 6697 6698 6699 6700 6701 6702 6703 6704 6705 6706 6707 6708
static u32 s2io_ethtool_op_get_tso(struct net_device *dev)
{
	return (dev->features & NETIF_F_TSO) != 0;
}
static int s2io_ethtool_op_set_tso(struct net_device *dev, u32 data)
{
	if (data)
		dev->features |= (NETIF_F_TSO | NETIF_F_TSO6);
	else
		dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);

	return 0;
}
L
Linus Torvalds 已提交
6709

6710
static const struct ethtool_ops netdev_ethtool_ops = {
L
Linus Torvalds 已提交
6711 6712 6713 6714 6715 6716 6717 6718 6719
	.get_settings = s2io_ethtool_gset,
	.set_settings = s2io_ethtool_sset,
	.get_drvinfo = s2io_ethtool_gdrvinfo,
	.get_regs_len = s2io_ethtool_get_regs_len,
	.get_regs = s2io_ethtool_gregs,
	.get_link = ethtool_op_get_link,
	.get_eeprom_len = s2io_get_eeprom_len,
	.get_eeprom = s2io_ethtool_geeprom,
	.set_eeprom = s2io_ethtool_seeprom,
6720
	.get_ringparam = s2io_ethtool_gringparam,
L
Linus Torvalds 已提交
6721 6722 6723 6724 6725 6726
	.get_pauseparam = s2io_ethtool_getpause_data,
	.set_pauseparam = s2io_ethtool_setpause_data,
	.get_rx_csum = s2io_ethtool_get_rx_csum,
	.set_rx_csum = s2io_ethtool_set_rx_csum,
	.set_tx_csum = s2io_ethtool_op_set_tx_csum,
	.set_sg = ethtool_op_set_sg,
6727 6728
	.get_tso = s2io_ethtool_op_get_tso,
	.set_tso = s2io_ethtool_op_set_tso,
A
Ananda Raju 已提交
6729
	.set_ufo = ethtool_op_set_ufo,
L
Linus Torvalds 已提交
6730 6731 6732
	.self_test = s2io_ethtool_test,
	.get_strings = s2io_ethtool_get_strings,
	.phys_id = s2io_ethtool_idnic,
6733 6734
	.get_ethtool_stats = s2io_get_ethtool_stats,
	.get_sset_count = s2io_get_sset_count,
L
Linus Torvalds 已提交
6735 6736 6737
};

/**
6738
 *  s2io_ioctl - Entry point for the Ioctl
L
Linus Torvalds 已提交
6739 6740 6741 6742 6743 6744
 *  @dev :  Device pointer.
 *  @ifr :  An IOCTL specefic structure, that can contain a pointer to
 *  a proprietary structure used to pass information to the driver.
 *  @cmd :  This is used to distinguish between the different commands that
 *  can be passed to the IOCTL functions.
 *  Description:
6745 6746
 *  Currently there are no special functionality supported in IOCTL, hence
 *  function always return EOPNOTSUPPORTED
L
Linus Torvalds 已提交
6747 6748
 */

6749
static int s2io_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
L
Linus Torvalds 已提交
6750 6751 6752 6753 6754 6755 6756 6757 6758 6759 6760 6761 6762 6763 6764
{
	return -EOPNOTSUPP;
}

/**
 *  s2io_change_mtu - entry point to change MTU size for the device.
 *   @dev : device pointer.
 *   @new_mtu : the new MTU size for the device.
 *   Description: A driver entry point to change MTU size for the device.
 *   Before changing the MTU the device must be stopped.
 *  Return value:
 *   0 on success and an appropriate (-)ve integer as defined in errno.h
 *   file on failure.
 */

6765
static int s2io_change_mtu(struct net_device *dev, int new_mtu)
L
Linus Torvalds 已提交
6766
{
6767
	struct s2io_nic *sp = netdev_priv(dev);
6768
	int ret = 0;
L
Linus Torvalds 已提交
6769 6770 6771 6772 6773 6774 6775 6776

	if ((new_mtu < MIN_MTU) || (new_mtu > S2IO_JUMBO_SIZE)) {
		DBG_PRINT(ERR_DBG, "%s: MTU size is invalid.\n",
			  dev->name);
		return -EPERM;
	}

	dev->mtu = new_mtu;
6777
	if (netif_running(dev)) {
6778
		s2io_stop_all_tx_queue(sp);
A
Ananda Raju 已提交
6779
		s2io_card_down(sp);
6780 6781
		ret = s2io_card_up(sp);
		if (ret) {
6782
			DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n",
6783
				  __func__);
6784
			return ret;
6785
		}
6786
		s2io_wake_all_tx_queue(sp);
6787
	} else { /* Device is down */
R
Ralf Baechle 已提交
6788
		struct XENA_dev_config __iomem *bar0 = sp->bar0;
6789 6790 6791 6792
		u64 val64 = new_mtu;

		writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);
	}
L
Linus Torvalds 已提交
6793

6794
	return ret;
L
Linus Torvalds 已提交
6795 6796 6797 6798 6799 6800 6801 6802
}

/**
 * s2io_set_link - Set the LInk status
 * @data: long pointer to device private structue
 * Description: Sets the link status for the adapter
 */

6803
static void s2io_set_link(struct work_struct *work)
L
Linus Torvalds 已提交
6804
{
R
Ralf Baechle 已提交
6805
	struct s2io_nic *nic = container_of(work, struct s2io_nic, set_link_task);
L
Linus Torvalds 已提交
6806
	struct net_device *dev = nic->dev;
R
Ralf Baechle 已提交
6807
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
L
Linus Torvalds 已提交
6808 6809 6810
	register u64 val64;
	u16 subid;

6811 6812 6813 6814 6815
	rtnl_lock();

	if (!netif_running(dev))
		goto out_unlock;

6816
	if (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(nic->state))) {
L
Linus Torvalds 已提交
6817
		/* The card is being reset, no point doing anything */
6818
		goto out_unlock;
L
Linus Torvalds 已提交
6819 6820 6821
	}

	subid = nic->pdev->subsystem_device;
6822 6823 6824 6825 6826 6827 6828
	if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
		/*
		 * Allow a small delay for the NICs self initiated
		 * cleanup to complete.
		 */
		msleep(100);
	}
L
Linus Torvalds 已提交
6829 6830

	val64 = readq(&bar0->adapter_status);
6831 6832 6833 6834 6835
	if (LINK_IS_UP(val64)) {
		if (!(readq(&bar0->adapter_control) & ADAPTER_CNTL_EN)) {
			if (verify_xena_quiescence(nic)) {
				val64 = readq(&bar0->adapter_control);
				val64 |= ADAPTER_CNTL_EN;
L
Linus Torvalds 已提交
6836
				writeq(val64, &bar0->adapter_control);
6837 6838 6839 6840 6841 6842 6843 6844 6845
				if (CARDS_WITH_FAULTY_LINK_INDICATORS(
					nic->device_type, subid)) {
					val64 = readq(&bar0->gpio_control);
					val64 |= GPIO_CTRL_GPIO_0;
					writeq(val64, &bar0->gpio_control);
					val64 = readq(&bar0->gpio_control);
				} else {
					val64 |= ADAPTER_LED_ON;
					writeq(val64, &bar0->adapter_control);
6846
				}
6847
				nic->device_enabled_once = true;
6848 6849 6850
			} else {
				DBG_PRINT(ERR_DBG, "%s: Error: ", dev->name);
				DBG_PRINT(ERR_DBG, "device is not Quiescent\n");
6851
				s2io_stop_all_tx_queue(nic);
L
Linus Torvalds 已提交
6852
			}
6853
		}
6854 6855 6856 6857
		val64 = readq(&bar0->adapter_control);
		val64 |= ADAPTER_LED_ON;
		writeq(val64, &bar0->adapter_control);
		s2io_link(nic, LINK_UP);
6858 6859 6860 6861 6862 6863 6864
	} else {
		if (CARDS_WITH_FAULTY_LINK_INDICATORS(nic->device_type,
						      subid)) {
			val64 = readq(&bar0->gpio_control);
			val64 &= ~GPIO_CTRL_GPIO_0;
			writeq(val64, &bar0->gpio_control);
			val64 = readq(&bar0->gpio_control);
L
Linus Torvalds 已提交
6865
		}
6866 6867 6868 6869
		/* turn off LED */
		val64 = readq(&bar0->adapter_control);
		val64 = val64 &(~ADAPTER_LED_ON);
		writeq(val64, &bar0->adapter_control);
6870
		s2io_link(nic, LINK_DOWN);
L
Linus Torvalds 已提交
6871
	}
6872
	clear_bit(__S2IO_STATE_LINK_TASK, &(nic->state));
6873 6874

out_unlock:
6875
	rtnl_unlock();
L
Linus Torvalds 已提交
6876 6877
}

R
Ralf Baechle 已提交
6878 6879 6880 6881
static int set_rxd_buffer_pointer(struct s2io_nic *sp, struct RxD_t *rxdp,
				struct buffAdd *ba,
				struct sk_buff **skb, u64 *temp0, u64 *temp1,
				u64 *temp2, int size)
6882 6883
{
	struct net_device *dev = sp->dev;
6884
	struct swStat *stats = &sp->mac_control.stats_info->sw_stat;
6885 6886

	if ((sp->rxd_mode == RXD_MODE_1) && (rxdp->Host_Control == 0)) {
6887
		struct RxD1 *rxdp1 = (struct RxD1 *)rxdp;
6888 6889 6890 6891 6892 6893 6894 6895
		/* allocate skb */
		if (*skb) {
			DBG_PRINT(INFO_DBG, "SKB is not NULL\n");
			/*
			 * As Rx frame are not going to be processed,
			 * using same mapped address for the Rxd
			 * buffer pointer
			 */
6896
			rxdp1->Buffer0_ptr = *temp0;
6897 6898 6899
		} else {
			*skb = dev_alloc_skb(size);
			if (!(*skb)) {
6900
				DBG_PRINT(INFO_DBG, "%s: Out of ", dev->name);
6901 6902 6903 6904
				DBG_PRINT(INFO_DBG, "memory to allocate ");
				DBG_PRINT(INFO_DBG, "1 buf mode SKBs\n");
				sp->mac_control.stats_info->sw_stat. \
					mem_alloc_fail_cnt++;
6905 6906
				return -ENOMEM ;
			}
6907
			sp->mac_control.stats_info->sw_stat.mem_allocated
6908
				+= (*skb)->truesize;
6909 6910 6911 6912
			/* storing the mapped addr in a temp variable
			 * such it will be used for next rxd whose
			 * Host Control is NULL
			 */
6913
			rxdp1->Buffer0_ptr = *temp0 =
6914 6915 6916
				pci_map_single( sp->pdev, (*skb)->data,
					size - NET_IP_ALIGN,
					PCI_DMA_FROMDEVICE);
6917
			if (pci_dma_mapping_error(sp->pdev, rxdp1->Buffer0_ptr))
6918
				goto memalloc_failed;
6919 6920 6921
			rxdp->Host_Control = (unsigned long) (*skb);
		}
	} else if ((sp->rxd_mode == RXD_MODE_3B) && (rxdp->Host_Control == 0)) {
6922
		struct RxD3 *rxdp3 = (struct RxD3 *)rxdp;
6923 6924
		/* Two buffer Mode */
		if (*skb) {
6925 6926 6927
			rxdp3->Buffer2_ptr = *temp2;
			rxdp3->Buffer0_ptr = *temp0;
			rxdp3->Buffer1_ptr = *temp1;
6928 6929
		} else {
			*skb = dev_alloc_skb(size);
6930
			if (!(*skb)) {
6931 6932 6933 6934 6935
				DBG_PRINT(INFO_DBG, "%s: Out of ", dev->name);
				DBG_PRINT(INFO_DBG, "memory to allocate ");
				DBG_PRINT(INFO_DBG, "2 buf mode SKBs\n");
				sp->mac_control.stats_info->sw_stat. \
					mem_alloc_fail_cnt++;
6936 6937
				return -ENOMEM;
			}
6938
			sp->mac_control.stats_info->sw_stat.mem_allocated
6939
				+= (*skb)->truesize;
6940
			rxdp3->Buffer2_ptr = *temp2 =
6941 6942 6943
				pci_map_single(sp->pdev, (*skb)->data,
					       dev->mtu + 4,
					       PCI_DMA_FROMDEVICE);
6944
			if (pci_dma_mapping_error(sp->pdev, rxdp3->Buffer2_ptr))
6945
				goto memalloc_failed;
6946
			rxdp3->Buffer0_ptr = *temp0 =
6947 6948
				pci_map_single( sp->pdev, ba->ba_0, BUF0_LEN,
						PCI_DMA_FROMDEVICE);
6949 6950
			if (pci_dma_mapping_error(sp->pdev,
						rxdp3->Buffer0_ptr)) {
6951
				pci_unmap_single (sp->pdev,
A
Al Viro 已提交
6952
					(dma_addr_t)rxdp3->Buffer2_ptr,
6953 6954 6955
					dev->mtu + 4, PCI_DMA_FROMDEVICE);
				goto memalloc_failed;
			}
6956 6957 6958
			rxdp->Host_Control = (unsigned long) (*skb);

			/* Buffer-1 will be dummy buffer not used */
6959
			rxdp3->Buffer1_ptr = *temp1 =
6960 6961
				pci_map_single(sp->pdev, ba->ba_1, BUF1_LEN,
						PCI_DMA_FROMDEVICE);
6962 6963
			if (pci_dma_mapping_error(sp->pdev,
						rxdp3->Buffer1_ptr)) {
6964
				pci_unmap_single (sp->pdev,
A
Al Viro 已提交
6965 6966 6967 6968
					(dma_addr_t)rxdp3->Buffer0_ptr,
					BUF0_LEN, PCI_DMA_FROMDEVICE);
				pci_unmap_single (sp->pdev,
					(dma_addr_t)rxdp3->Buffer2_ptr,
6969 6970 6971
					dev->mtu + 4, PCI_DMA_FROMDEVICE);
				goto memalloc_failed;
			}
6972 6973 6974
		}
	}
	return 0;
6975 6976 6977 6978 6979
	memalloc_failed:
		stats->pci_map_fail_cnt++;
		stats->mem_freed += (*skb)->truesize;
		dev_kfree_skb(*skb);
		return -ENOMEM;
6980
}
6981

R
Ralf Baechle 已提交
6982 6983
static void set_rxd_buffer_size(struct s2io_nic *sp, struct RxD_t *rxdp,
				int size)
6984 6985 6986 6987 6988 6989 6990 6991 6992 6993 6994
{
	struct net_device *dev = sp->dev;
	if (sp->rxd_mode == RXD_MODE_1) {
		rxdp->Control_2 = SET_BUFFER0_SIZE_1( size - NET_IP_ALIGN);
	} else if (sp->rxd_mode == RXD_MODE_3B) {
		rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN);
		rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1);
		rxdp->Control_2 |= SET_BUFFER2_SIZE_3( dev->mtu + 4);
	}
}

R
Ralf Baechle 已提交
6995
static  int rxd_owner_bit_reset(struct s2io_nic *sp)
6996 6997
{
	int i, j, k, blk_cnt = 0, size;
R
Ralf Baechle 已提交
6998
	struct mac_info * mac_control = &sp->mac_control;
6999 7000
	struct config_param *config = &sp->config;
	struct net_device *dev = sp->dev;
R
Ralf Baechle 已提交
7001
	struct RxD_t *rxdp = NULL;
7002
	struct sk_buff *skb = NULL;
R
Ralf Baechle 已提交
7003
	struct buffAdd *ba = NULL;
7004 7005 7006 7007 7008 7009 7010 7011 7012 7013 7014
	u64 temp0_64 = 0, temp1_64 = 0, temp2_64 = 0;

	/* Calculate the size based on ring mode */
	size = dev->mtu + HEADER_ETHERNET_II_802_3_SIZE +
		HEADER_802_2_SIZE + HEADER_SNAP_SIZE;
	if (sp->rxd_mode == RXD_MODE_1)
		size += NET_IP_ALIGN;
	else if (sp->rxd_mode == RXD_MODE_3B)
		size = dev->mtu + ALIGN_SIZE + BUF0_LEN + 4;

	for (i = 0; i < config->rx_ring_num; i++) {
7015 7016 7017 7018
		struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
		struct ring_info *ring = &mac_control->rings[i];

		blk_cnt = rx_cfg->num_rxd / (rxd_count[sp->rxd_mode] +1);
7019 7020 7021

		for (j = 0; j < blk_cnt; j++) {
			for (k = 0; k < rxd_count[sp->rxd_mode]; k++) {
7022
				rxdp = ring-> rx_blocks[j].rxds[k].virt_addr;
7023
				if(sp->rxd_mode == RXD_MODE_3B)
7024
					ba = &ring->ba[j][k];
7025
				if (set_rxd_buffer_pointer(sp, rxdp, ba,
7026 7027
						       &skb,(u64 *)&temp0_64,
						       (u64 *)&temp1_64,
7028
						       (u64 *)&temp2_64,
7029
							size) == -ENOMEM) {
7030 7031
					return 0;
				}
7032 7033 7034 7035 7036 7037 7038 7039 7040 7041 7042 7043

				set_rxd_buffer_size(sp, rxdp, size);
				wmb();
				/* flip the Ownership bit to Hardware */
				rxdp->Control_1 |= RXD_OWN_XENA;
			}
		}
	}
	return 0;

}

R
Ralf Baechle 已提交
7044
static int s2io_add_isr(struct s2io_nic * sp)
L
Linus Torvalds 已提交
7045
{
A
Ananda Raju 已提交
7046
	int ret = 0;
A
Ananda Raju 已提交
7047
	struct net_device *dev = sp->dev;
A
Ananda Raju 已提交
7048
	int err = 0;
L
Linus Torvalds 已提交
7049

7050
	if (sp->config.intr_type == MSI_X)
A
Ananda Raju 已提交
7051 7052 7053
		ret = s2io_enable_msi_x(sp);
	if (ret) {
		DBG_PRINT(ERR_DBG, "%s: Defaulting to INTA\n", dev->name);
7054
		sp->config.intr_type = INTA;
7055
	}
L
Linus Torvalds 已提交
7056

R
Ralf Baechle 已提交
7057
	/* Store the values of the MSIX table in the struct s2io_nic structure */
A
Ananda Raju 已提交
7058
	store_xmsi_data(sp);
A
Ananda Raju 已提交
7059

A
Ananda Raju 已提交
7060
	/* After proper initialization of H/W, register ISR */
7061
	if (sp->config.intr_type == MSI_X) {
7062 7063
		int i, msix_rx_cnt = 0;

7064 7065 7066
		for (i = 0; i < sp->num_entries; i++) {
			if (sp->s2io_entries[i].in_use == MSIX_FLG) {
				if (sp->s2io_entries[i].type ==
7067 7068 7069 7070 7071 7072 7073 7074 7075 7076
					MSIX_RING_TYPE) {
					sprintf(sp->desc[i], "%s:MSI-X-%d-RX",
						dev->name, i);
					err = request_irq(sp->entries[i].vector,
						s2io_msix_ring_handle, 0,
						sp->desc[i],
						sp->s2io_entries[i].arg);
				} else if (sp->s2io_entries[i].type ==
					MSIX_ALARM_TYPE) {
					sprintf(sp->desc[i], "%s:MSI-X-%d-TX",
A
Ananda Raju 已提交
7077
					dev->name, i);
7078 7079 7080 7081 7082
					err = request_irq(sp->entries[i].vector,
						s2io_msix_fifo_handle, 0,
						sp->desc[i],
						sp->s2io_entries[i].arg);

7083
				}
7084 7085
				/* if either data or addr is zero print it. */
				if (!(sp->msix_info[i].addr &&
7086
					sp->msix_info[i].data)) {
7087 7088 7089
					DBG_PRINT(ERR_DBG,
						"%s @Addr:0x%llx Data:0x%llx\n",
						sp->desc[i],
7090 7091
						(unsigned long long)
						sp->msix_info[i].addr,
A
Al Viro 已提交
7092
						(unsigned long long)
7093 7094
						ntohl(sp->msix_info[i].data));
				} else
7095
					msix_rx_cnt++;
7096 7097 7098 7099 7100 7101 7102 7103 7104 7105 7106 7107
				if (err) {
					remove_msix_isr(sp);

					DBG_PRINT(ERR_DBG,
						"%s:MSI-X-%d registration "
						"failed\n", dev->name, i);

					DBG_PRINT(ERR_DBG,
						"%s: Defaulting to INTA\n",
						dev->name);
					sp->config.intr_type = INTA;
					break;
7108
				}
7109 7110
				sp->s2io_entries[i].in_use =
					MSIX_REGISTERED_SUCCESS;
A
Ananda Raju 已提交
7111
			}
A
Ananda Raju 已提交
7112
		}
7113 7114
		if (!err) {
			printk(KERN_INFO "MSI-X-RX %d entries enabled\n",
7115 7116 7117
				--msix_rx_cnt);
			DBG_PRINT(INFO_DBG, "MSI-X-TX entries enabled"
						" through alarm vector\n");
7118
		}
A
Ananda Raju 已提交
7119
	}
7120
	if (sp->config.intr_type == INTA) {
A
Ananda Raju 已提交
7121 7122 7123 7124 7125 7126 7127 7128 7129 7130
		err = request_irq((int) sp->pdev->irq, s2io_isr, IRQF_SHARED,
				sp->name, dev);
		if (err) {
			DBG_PRINT(ERR_DBG, "%s: ISR registration failed\n",
				  dev->name);
			return -1;
		}
	}
	return 0;
}
R
Ralf Baechle 已提交
7131
static void s2io_rem_isr(struct s2io_nic * sp)
A
Ananda Raju 已提交
7132
{
7133 7134 7135 7136
	if (sp->config.intr_type == MSI_X)
		remove_msix_isr(sp);
	else
		remove_inta_isr(sp);
A
Ananda Raju 已提交
7137 7138
}

7139
static void do_s2io_card_down(struct s2io_nic * sp, int do_io)
A
Ananda Raju 已提交
7140 7141
{
	int cnt = 0;
R
Ralf Baechle 已提交
7142
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
A
Ananda Raju 已提交
7143
	register u64 val64 = 0;
7144 7145
	struct config_param *config;
	config = &sp->config;
A
Ananda Raju 已提交
7146

7147 7148 7149
	if (!is_s2io_card_up(sp))
		return;

A
Ananda Raju 已提交
7150 7151
	del_timer_sync(&sp->alarm_timer);
	/* If s2io_set_link task is executing, wait till it completes. */
7152
	while (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(sp->state))) {
A
Ananda Raju 已提交
7153 7154
		msleep(50);
	}
7155
	clear_bit(__S2IO_STATE_CARD_UP, &sp->state);
A
Ananda Raju 已提交
7156

7157
	/* Disable napi */
7158 7159 7160 7161 7162 7163 7164 7165 7166
	if (sp->config.napi) {
		int off = 0;
		if (config->intr_type ==  MSI_X) {
			for (; off < sp->config.rx_ring_num; off++)
				napi_disable(&sp->mac_control.rings[off].napi);
			}
		else
			napi_disable(&sp->napi);
	}
7167

A
Ananda Raju 已提交
7168
	/* disable Tx and Rx traffic on the NIC */
7169 7170
	if (do_io)
		stop_nic(sp);
A
Ananda Raju 已提交
7171 7172

	s2io_rem_isr(sp);
L
Linus Torvalds 已提交
7173

7174 7175 7176
	/* stop the tx queue, indicate link down */
	s2io_link(sp, LINK_DOWN);

L
Linus Torvalds 已提交
7177
	/* Check if the device is Quiescent and then Reset the NIC */
7178
	while(do_io) {
7179 7180 7181 7182 7183 7184 7185 7186 7187
		/* As per the HW requirement we need to replenish the
		 * receive buffer to avoid the ring bump. Since there is
		 * no intention of processing the Rx frame at this pointwe are
		 * just settting the ownership bit of rxd in Each Rx
		 * ring to HW and set the appropriate buffer size
		 * based on the ring mode
		 */
		rxd_owner_bit_reset(sp);

L
Linus Torvalds 已提交
7188
		val64 = readq(&bar0->adapter_status);
7189 7190
		if (verify_xena_quiescence(sp)) {
			if(verify_pcc_quiescent(sp, sp->device_enabled_once))
L
Linus Torvalds 已提交
7191 7192 7193 7194 7195 7196 7197 7198 7199 7200 7201 7202
			break;
		}

		msleep(50);
		cnt++;
		if (cnt == 10) {
			DBG_PRINT(ERR_DBG,
				  "s2io_close:Device not Quiescent ");
			DBG_PRINT(ERR_DBG, "adaper status reads 0x%llx\n",
				  (unsigned long long) val64);
			break;
		}
7203 7204 7205
	}
	if (do_io)
		s2io_reset(sp);
L
Linus Torvalds 已提交
7206

7207
	/* Free all Tx buffers */
L
Linus Torvalds 已提交
7208
	free_tx_buffers(sp);
7209 7210

	/* Free all Rx buffers */
L
Linus Torvalds 已提交
7211 7212
	free_rx_buffers(sp);

7213
	clear_bit(__S2IO_STATE_LINK_TASK, &(sp->state));
L
Linus Torvalds 已提交
7214 7215
}

7216 7217 7218 7219 7220
static void s2io_card_down(struct s2io_nic * sp)
{
	do_s2io_card_down(sp, 1);
}

R
Ralf Baechle 已提交
7221
static int s2io_card_up(struct s2io_nic * sp)
L
Linus Torvalds 已提交
7222
{
7223
	int i, ret = 0;
R
Ralf Baechle 已提交
7224
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
7225 7226
	struct config_param *config;
	struct net_device *dev = (struct net_device *) sp->dev;
A
Ananda Raju 已提交
7227
	u16 interruptible;
L
Linus Torvalds 已提交
7228 7229

	/* Initialize the H/W I/O registers */
7230 7231
	ret = init_nic(sp);
	if (ret != 0) {
L
Linus Torvalds 已提交
7232 7233
		DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
			  dev->name);
7234 7235 7236
		if (ret != -EIO)
			s2io_reset(sp);
		return ret;
L
Linus Torvalds 已提交
7237 7238
	}

7239 7240
	/*
	 * Initializing the Rx buffers. For now we are considering only 1
L
Linus Torvalds 已提交
7241 7242 7243 7244 7245 7246
	 * Rx ring and initializing buffers into 30 Rx blocks
	 */
	mac_control = &sp->mac_control;
	config = &sp->config;

	for (i = 0; i < config->rx_ring_num; i++) {
7247 7248 7249 7250
		struct ring_info *ring = &mac_control->rings[i];

		ring->mtu = dev->mtu;
		ret = fill_rx_buffers(sp, ring, 1);
7251
		if (ret) {
L
Linus Torvalds 已提交
7252 7253 7254 7255 7256 7257 7258
			DBG_PRINT(ERR_DBG, "%s: Out of memory in Open\n",
				  dev->name);
			s2io_reset(sp);
			free_rx_buffers(sp);
			return -ENOMEM;
		}
		DBG_PRINT(INFO_DBG, "Buf in ring:%d is %d:\n", i,
7259
			  ring->rx_bufs_left);
L
Linus Torvalds 已提交
7260
	}
7261 7262

	/* Initialise napi */
7263 7264 7265 7266 7267 7268 7269 7270
	if (config->napi) {
		if (config->intr_type ==  MSI_X) {
			for (i = 0; i < sp->config.rx_ring_num; i++)
				napi_enable(&sp->mac_control.rings[i].napi);
		} else {
			napi_enable(&sp->napi);
		}
	}
7271

7272 7273 7274 7275 7276 7277 7278
	/* Maintain the state prior to the open */
	if (sp->promisc_flg)
		sp->promisc_flg = 0;
	if (sp->m_cast_flg) {
		sp->m_cast_flg = 0;
		sp->all_multi_pos= 0;
	}
L
Linus Torvalds 已提交
7279 7280 7281 7282

	/* Setting its receive mode */
	s2io_set_multicast(dev);

7283
	if (sp->lro) {
7284
		/* Initialize max aggregatable pkts per session based on MTU */
7285 7286 7287 7288 7289 7290
		sp->lro_max_aggr_per_sess = ((1<<16) - 1) / dev->mtu;
		/* Check if we can use(if specified) user provided value */
		if (lro_max_pkts < sp->lro_max_aggr_per_sess)
			sp->lro_max_aggr_per_sess = lro_max_pkts;
	}

L
Linus Torvalds 已提交
7291 7292 7293 7294
	/* Enable Rx Traffic and interrupts on the NIC */
	if (start_nic(sp)) {
		DBG_PRINT(ERR_DBG, "%s: Starting NIC failed\n", dev->name);
		s2io_reset(sp);
A
Ananda Raju 已提交
7295 7296 7297 7298 7299 7300
		free_rx_buffers(sp);
		return -ENODEV;
	}

	/* Add interrupt service routine */
	if (s2io_add_isr(sp) != 0) {
7301
		if (sp->config.intr_type == MSI_X)
A
Ananda Raju 已提交
7302 7303
			s2io_rem_isr(sp);
		s2io_reset(sp);
L
Linus Torvalds 已提交
7304 7305 7306 7307
		free_rx_buffers(sp);
		return -ENODEV;
	}

7308 7309
	S2IO_TIMER_CONF(sp->alarm_timer, s2io_alarm_handle, sp, (HZ/2));

7310 7311
	set_bit(__S2IO_STATE_CARD_UP, &sp->state);

A
Ananda Raju 已提交
7312
	/*  Enable select interrupts */
7313
	en_dis_err_alarms(sp, ENA_ALL_INTRS, ENABLE_INTRS);
7314 7315 7316 7317
	if (sp->config.intr_type != INTA) {
		interruptible = TX_TRAFFIC_INTR | TX_PIC_INTR;
		en_dis_able_nic_intrs(sp, interruptible, ENABLE_INTRS);
	} else {
A
Ananda Raju 已提交
7318
		interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
7319
		interruptible |= TX_PIC_INTR;
A
Ananda Raju 已提交
7320 7321 7322
		en_dis_able_nic_intrs(sp, interruptible, ENABLE_INTRS);
	}

L
Linus Torvalds 已提交
7323 7324 7325
	return 0;
}

7326
/**
L
Linus Torvalds 已提交
7327 7328 7329 7330
 * s2io_restart_nic - Resets the NIC.
 * @data : long pointer to the device private structure
 * Description:
 * This function is scheduled to be run by the s2io_tx_watchdog
7331
 * function after 0.5 secs to reset the NIC. The idea is to reduce
L
Linus Torvalds 已提交
7332 7333 7334 7335
 * the run time of the watch dog routine which is run holding a
 * spin lock.
 */

7336
static void s2io_restart_nic(struct work_struct *work)
L
Linus Torvalds 已提交
7337
{
R
Ralf Baechle 已提交
7338
	struct s2io_nic *sp = container_of(work, struct s2io_nic, rst_timer_task);
7339
	struct net_device *dev = sp->dev;
L
Linus Torvalds 已提交
7340

7341 7342 7343 7344 7345
	rtnl_lock();

	if (!netif_running(dev))
		goto out_unlock;

A
Ananda Raju 已提交
7346
	s2io_card_down(sp);
L
Linus Torvalds 已提交
7347 7348 7349 7350
	if (s2io_card_up(sp)) {
		DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n",
			  dev->name);
	}
7351
	s2io_wake_all_tx_queue(sp);
L
Linus Torvalds 已提交
7352 7353
	DBG_PRINT(ERR_DBG, "%s: was reset by Tx watchdog timer\n",
		  dev->name);
7354 7355
out_unlock:
	rtnl_unlock();
L
Linus Torvalds 已提交
7356 7357
}

7358 7359
/**
 *  s2io_tx_watchdog - Watchdog for transmit side.
L
Linus Torvalds 已提交
7360 7361 7362 7363 7364 7365 7366 7367 7368 7369 7370 7371 7372
 *  @dev : Pointer to net device structure
 *  Description:
 *  This function is triggered if the Tx Queue is stopped
 *  for a pre-defined amount of time when the Interface is still up.
 *  If the Interface is jammed in such a situation, the hardware is
 *  reset (by s2io_close) and restarted again (by s2io_open) to
 *  overcome any problem that might have been caused in the hardware.
 *  Return value:
 *  void
 */

static void s2io_tx_watchdog(struct net_device *dev)
{
7373
	struct s2io_nic *sp = netdev_priv(dev);
L
Linus Torvalds 已提交
7374 7375

	if (netif_carrier_ok(dev)) {
7376
		sp->mac_control.stats_info->sw_stat.watchdog_timer_cnt++;
L
Linus Torvalds 已提交
7377
		schedule_work(&sp->rst_timer_task);
7378
		sp->mac_control.stats_info->sw_stat.soft_reset_cnt++;
L
Linus Torvalds 已提交
7379 7380 7381 7382 7383 7384 7385 7386 7387 7388
	}
}

/**
 *   rx_osm_handler - To perform some OS related operations on SKB.
 *   @sp: private member of the device structure,pointer to s2io_nic structure.
 *   @skb : the socket buffer pointer.
 *   @len : length of the packet
 *   @cksum : FCS checksum of the frame.
 *   @ring_no : the ring from which this RxD was extracted.
7389
 *   Description:
7390
 *   This function is called by the Rx interrupt serivce routine to perform
L
Linus Torvalds 已提交
7391 7392 7393 7394 7395 7396 7397 7398
 *   some OS related operations on the SKB before passing it to the upper
 *   layers. It mainly checks if the checksum is OK, if so adds it to the
 *   SKBs cksum variable, increments the Rx packet count and passes the SKB
 *   to the upper layer. If the checksum is wrong, it increments the Rx
 *   packet error count, frees the SKB and returns error.
 *   Return value:
 *   SUCCESS on success and -1 on failure.
 */
R
Ralf Baechle 已提交
7399
static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp)
L
Linus Torvalds 已提交
7400
{
R
Ralf Baechle 已提交
7401
	struct s2io_nic *sp = ring_data->nic;
7402
	struct net_device *dev = (struct net_device *) ring_data->dev;
7403 7404 7405
	struct sk_buff *skb = (struct sk_buff *)
		((unsigned long) rxdp->Host_Control);
	int ring_no = ring_data->ring_no;
L
Linus Torvalds 已提交
7406
	u16 l3_csum, l4_csum;
7407
	unsigned long long err = rxdp->Control_1 & RXD_T_CODE;
7408
	struct lro *uninitialized_var(lro);
7409
	u8 err_mask;
7410

7411
	skb->dev = dev;
A
Ananda Raju 已提交
7412

7413
	if (err) {
7414 7415 7416 7417
		/* Check for parity error */
		if (err & 0x1) {
			sp->mac_control.stats_info->sw_stat.parity_err_cnt++;
		}
7418 7419
		err_mask = err >> 48;
		switch(err_mask) {
7420 7421 7422 7423 7424 7425 7426 7427 7428 7429 7430 7431 7432 7433 7434 7435 7436 7437 7438 7439 7440 7441 7442 7443 7444 7445 7446 7447 7448
			case 1:
				sp->mac_control.stats_info->sw_stat.
				rx_parity_err_cnt++;
			break;

			case 2:
				sp->mac_control.stats_info->sw_stat.
				rx_abort_cnt++;
			break;

			case 3:
				sp->mac_control.stats_info->sw_stat.
				rx_parity_abort_cnt++;
			break;

			case 4:
				sp->mac_control.stats_info->sw_stat.
				rx_rda_fail_cnt++;
			break;

			case 5:
				sp->mac_control.stats_info->sw_stat.
				rx_unkn_prot_cnt++;
			break;

			case 6:
				sp->mac_control.stats_info->sw_stat.
				rx_fcs_err_cnt++;
			break;
7449

7450 7451 7452 7453 7454 7455 7456 7457 7458 7459 7460 7461 7462 7463 7464
			case 7:
				sp->mac_control.stats_info->sw_stat.
				rx_buf_size_err_cnt++;
			break;

			case 8:
				sp->mac_control.stats_info->sw_stat.
				rx_rxd_corrupt_cnt++;
			break;

			case 15:
				sp->mac_control.stats_info->sw_stat.
				rx_unkn_err_cnt++;
			break;
		}
7465 7466 7467 7468 7469 7470 7471
		/*
		* Drop the packet if bad transfer code. Exception being
		* 0x5, which could be due to unsupported IPv6 extension header.
		* In this case, we let stack handle the packet.
		* Note that in this case, since checksum will be incorrect,
		* stack will validate the same.
		*/
7472 7473 7474
		if (err_mask != 0x5) {
			DBG_PRINT(ERR_DBG, "%s: Rx error Value: 0x%x\n",
				dev->name, err_mask);
7475
			dev->stats.rx_crc_errors++;
7476
			sp->mac_control.stats_info->sw_stat.mem_freed
7477
				+= skb->truesize;
7478
			dev_kfree_skb(skb);
7479
			ring_data->rx_bufs_left -= 1;
7480 7481 7482
			rxdp->Host_Control = 0;
			return 0;
		}
7483
	}
L
Linus Torvalds 已提交
7484

7485
	/* Updating statistics */
7486
	ring_data->rx_packets++;
7487
	rxdp->Host_Control = 0;
7488 7489
	if (sp->rxd_mode == RXD_MODE_1) {
		int len = RXD_GET_BUFFER0_SIZE_1(rxdp->Control_2);
7490

7491
		ring_data->rx_bytes += len;
7492 7493
		skb_put(skb, len);

7494
	} else if (sp->rxd_mode == RXD_MODE_3B) {
7495 7496 7497 7498 7499 7500
		int get_block = ring_data->rx_curr_get_info.block_index;
		int get_off = ring_data->rx_curr_get_info.offset;
		int buf0_len = RXD_GET_BUFFER0_SIZE_3(rxdp->Control_2);
		int buf2_len = RXD_GET_BUFFER2_SIZE_3(rxdp->Control_2);
		unsigned char *buff = skb_push(skb, buf0_len);

R
Ralf Baechle 已提交
7501
		struct buffAdd *ba = &ring_data->ba[get_block][get_off];
7502
		ring_data->rx_bytes += buf0_len + buf2_len;
7503
		memcpy(buff, ba->ba_0, buf0_len);
7504
		skb_put(skb, buf2_len);
7505
	}
7506

7507 7508
	if ((rxdp->Control_1 & TCP_OR_UDP_FRAME) && ((!ring_data->lro) ||
	    (ring_data->lro && (!(rxdp->Control_1 & RXD_FRAME_IP_FRAG)))) &&
7509 7510
	    (sp->rx_csum)) {
		l3_csum = RXD_GET_L3_CKSUM(rxdp->Control_1);
L
Linus Torvalds 已提交
7511 7512
		l4_csum = RXD_GET_L4_CKSUM(rxdp->Control_1);
		if ((l3_csum == L3_CKSUM_OK) && (l4_csum == L4_CKSUM_OK)) {
7513
			/*
L
Linus Torvalds 已提交
7514 7515 7516 7517 7518
			 * NIC verifies if the Checksum of the received
			 * frame is Ok or not and accordingly returns
			 * a flag in the RxD.
			 */
			skb->ip_summed = CHECKSUM_UNNECESSARY;
7519
			if (ring_data->lro) {
7520 7521 7522 7523
				u32 tcp_len;
				u8 *tcp;
				int ret = 0;

7524 7525 7526
				ret = s2io_club_tcp_session(ring_data,
					skb->data, &tcp, &tcp_len, &lro,
					rxdp, sp);
7527 7528 7529 7530 7531 7532 7533 7534 7535 7536 7537 7538 7539 7540
				switch (ret) {
					case 3: /* Begin anew */
						lro->parent = skb;
						goto aggregate;
					case 1: /* Aggregate */
					{
						lro_append_pkt(sp, lro,
							skb, tcp_len);
						goto aggregate;
					}
					case 4: /* Flush session */
					{
						lro_append_pkt(sp, lro,
							skb, tcp_len);
7541 7542
						queue_rx_frame(lro->parent,
							lro->vlan_tag);
7543 7544 7545 7546 7547 7548 7549 7550 7551 7552
						clear_lro_session(lro);
						sp->mac_control.stats_info->
						    sw_stat.flush_max_pkts++;
						goto aggregate;
					}
					case 2: /* Flush both */
						lro->parent->data_len =
							lro->frags_len;
						sp->mac_control.stats_info->
						     sw_stat.sending_both++;
7553 7554
						queue_rx_frame(lro->parent,
							lro->vlan_tag);
7555 7556 7557
						clear_lro_session(lro);
						goto send_up;
					case 0: /* sessions exceeded */
A
Ananda Raju 已提交
7558 7559 7560
					case -1: /* non-TCP or not
						  * L2 aggregatable
						  */
7561 7562 7563 7564 7565 7566 7567 7568
					case 5: /*
						 * First pkt in session not
						 * L3/L4 aggregatable
						 */
						break;
					default:
						DBG_PRINT(ERR_DBG,
							"%s: Samadhana!!\n",
7569
							 __func__);
7570 7571 7572
						BUG();
				}
			}
L
Linus Torvalds 已提交
7573
		} else {
7574 7575
			/*
			 * Packet with erroneous checksum, let the
L
Linus Torvalds 已提交
7576 7577 7578 7579
			 * upper layers deal with it.
			 */
			skb->ip_summed = CHECKSUM_NONE;
		}
7580
	} else
L
Linus Torvalds 已提交
7581
		skb->ip_summed = CHECKSUM_NONE;
7582

7583
	sp->mac_control.stats_info->sw_stat.mem_freed += skb->truesize;
7584
send_up:
7585
	skb_record_rx_queue(skb, ring_no);
7586
	queue_rx_frame(skb, RXD_GET_VLAN_TAG(rxdp->Control_2));
7587
aggregate:
7588
	sp->mac_control.rings[ring_no].rx_bufs_left -= 1;
L
Linus Torvalds 已提交
7589 7590 7591 7592 7593 7594 7595 7596 7597 7598
	return SUCCESS;
}

/**
 *  s2io_link - stops/starts the Tx queue.
 *  @sp : private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
 *  @link : inidicates whether link is UP/DOWN.
 *  Description:
 *  This function stops/starts the Tx queue depending on whether the link
7599 7600
 *  status of the NIC is is down or up. This is called by the Alarm
 *  interrupt handler whenever a link change interrupt comes up.
L
Linus Torvalds 已提交
7601 7602 7603 7604
 *  Return value:
 *  void.
 */

R
Ralf Baechle 已提交
7605
static void s2io_link(struct s2io_nic * sp, int link)
L
Linus Torvalds 已提交
7606 7607 7608 7609
{
	struct net_device *dev = (struct net_device *) sp->dev;

	if (link != sp->last_link_state) {
7610
		init_tti(sp, link);
L
Linus Torvalds 已提交
7611 7612
		if (link == LINK_DOWN) {
			DBG_PRINT(ERR_DBG, "%s: Link down\n", dev->name);
7613
			s2io_stop_all_tx_queue(sp);
L
Linus Torvalds 已提交
7614
			netif_carrier_off(dev);
7615
			if(sp->mac_control.stats_info->sw_stat.link_up_cnt)
7616
			sp->mac_control.stats_info->sw_stat.link_up_time =
7617 7618
				jiffies - sp->start_time;
			sp->mac_control.stats_info->sw_stat.link_down_cnt++;
L
Linus Torvalds 已提交
7619 7620
		} else {
			DBG_PRINT(ERR_DBG, "%s: Link Up\n", dev->name);
7621
			if (sp->mac_control.stats_info->sw_stat.link_down_cnt)
7622
			sp->mac_control.stats_info->sw_stat.link_down_time =
7623 7624
				jiffies - sp->start_time;
			sp->mac_control.stats_info->sw_stat.link_up_cnt++;
L
Linus Torvalds 已提交
7625
			netif_carrier_on(dev);
7626
			s2io_wake_all_tx_queue(sp);
L
Linus Torvalds 已提交
7627 7628 7629
		}
	}
	sp->last_link_state = link;
7630
	sp->start_time = jiffies;
L
Linus Torvalds 已提交
7631 7632
}

7633 7634 7635
/**
 *  s2io_init_pci -Initialization of PCI and PCI-X configuration registers .
 *  @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
7636 7637 7638 7639 7640 7641 7642 7643
 *  s2io_nic structure.
 *  Description:
 *  This function initializes a few of the PCI and PCI-X configuration registers
 *  with recommended values.
 *  Return value:
 *  void
 */

R
Ralf Baechle 已提交
7644
static void s2io_init_pci(struct s2io_nic * sp)
L
Linus Torvalds 已提交
7645
{
7646
	u16 pci_cmd = 0, pcix_cmd = 0;
L
Linus Torvalds 已提交
7647 7648 7649

	/* Enable Data Parity Error Recovery in PCI-X command register. */
	pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
7650
			     &(pcix_cmd));
L
Linus Torvalds 已提交
7651
	pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
7652
			      (pcix_cmd | 1));
L
Linus Torvalds 已提交
7653
	pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
7654
			     &(pcix_cmd));
L
Linus Torvalds 已提交
7655 7656 7657 7658 7659 7660 7661 7662

	/* Set the PErr Response bit in PCI command register. */
	pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
	pci_write_config_word(sp->pdev, PCI_COMMAND,
			      (pci_cmd | PCI_COMMAND_PARITY));
	pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
}

7663 7664
static int s2io_verify_parm(struct pci_dev *pdev, u8 *dev_intr_type,
	u8 *dev_multiq)
7665
{
7666
	if ((tx_fifo_num > MAX_TX_FIFOS) ||
7667
		(tx_fifo_num < 1)) {
7668 7669
		DBG_PRINT(ERR_DBG, "s2io: Requested number of tx fifos "
			"(%d) not supported\n", tx_fifo_num);
7670 7671 7672 7673 7674 7675

		if (tx_fifo_num < 1)
			tx_fifo_num = 1;
		else
			tx_fifo_num = MAX_TX_FIFOS;

7676 7677
		DBG_PRINT(ERR_DBG, "s2io: Default to %d ", tx_fifo_num);
		DBG_PRINT(ERR_DBG, "tx fifos\n");
7678
	}
7679

7680
	if (multiq)
7681
		*dev_multiq = multiq;
7682 7683 7684 7685 7686 7687 7688 7689 7690 7691 7692 7693 7694 7695 7696

	if (tx_steering_type && (1 == tx_fifo_num)) {
		if (tx_steering_type != TX_DEFAULT_STEERING)
			DBG_PRINT(ERR_DBG,
				"s2io: Tx steering is not supported with "
				"one fifo. Disabling Tx steering.\n");
		tx_steering_type = NO_STEERING;
	}

	if ((tx_steering_type < NO_STEERING) ||
		(tx_steering_type > TX_DEFAULT_STEERING)) {
		DBG_PRINT(ERR_DBG, "s2io: Requested transmit steering not "
			 "supported\n");
		DBG_PRINT(ERR_DBG, "s2io: Disabling transmit steering\n");
		tx_steering_type = NO_STEERING;
7697 7698
	}

7699 7700
	if (rx_ring_num > MAX_RX_RINGS) {
		DBG_PRINT(ERR_DBG, "s2io: Requested number of rx rings not "
7701
			 "supported\n");
7702 7703 7704
		DBG_PRINT(ERR_DBG, "s2io: Default to %d rx rings\n",
			MAX_RX_RINGS);
		rx_ring_num = MAX_RX_RINGS;
7705
	}
7706

7707
	if ((*dev_intr_type != INTA) && (*dev_intr_type != MSI_X)) {
7708 7709 7710 7711
		DBG_PRINT(ERR_DBG, "s2io: Wrong intr_type requested. "
			  "Defaulting to INTA\n");
		*dev_intr_type = INTA;
	}
7712

7713 7714 7715
	if ((*dev_intr_type == MSI_X) &&
			((pdev->device != PCI_DEVICE_ID_HERC_WIN) &&
			(pdev->device != PCI_DEVICE_ID_HERC_UNI))) {
7716
		DBG_PRINT(ERR_DBG, "s2io: Xframe I does not support MSI_X. "
7717 7718 7719
					"Defaulting to INTA\n");
		*dev_intr_type = INTA;
	}
7720

7721
	if ((rx_ring_mode != 1) && (rx_ring_mode != 2)) {
7722
		DBG_PRINT(ERR_DBG, "s2io: Requested ring mode not supported\n");
7723 7724
		DBG_PRINT(ERR_DBG, "s2io: Defaulting to 1-buffer mode\n");
		rx_ring_mode = 1;
7725 7726 7727 7728
	}
	return SUCCESS;
}

7729 7730 7731
/**
 * rts_ds_steer - Receive traffic steering based on IPv4 or IPv6 TOS
 * or Traffic class respectively.
7732
 * @nic: device private variable
7733 7734 7735 7736 7737 7738 7739 7740 7741 7742 7743 7744 7745 7746 7747 7748 7749 7750 7751 7752 7753 7754 7755 7756 7757 7758 7759
 * Description: The function configures the receive steering to
 * desired receive ring.
 * Return Value:  SUCCESS on success and
 * '-1' on failure (endian settings incorrect).
 */
static int rts_ds_steer(struct s2io_nic *nic, u8 ds_codepoint, u8 ring)
{
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
	register u64 val64 = 0;

	if (ds_codepoint > 63)
		return FAILURE;

	val64 = RTS_DS_MEM_DATA(ring);
	writeq(val64, &bar0->rts_ds_mem_data);

	val64 = RTS_DS_MEM_CTRL_WE |
		RTS_DS_MEM_CTRL_STROBE_NEW_CMD |
		RTS_DS_MEM_CTRL_OFFSET(ds_codepoint);

	writeq(val64, &bar0->rts_ds_mem_ctrl);

	return wait_for_cmd_complete(&bar0->rts_ds_mem_ctrl,
				RTS_DS_MEM_CTRL_STROBE_CMD_BEING_EXECUTED,
				S2IO_BIT_RESET);
}

7760 7761 7762 7763 7764 7765 7766 7767 7768 7769 7770 7771 7772 7773 7774 7775 7776 7777
static const struct net_device_ops s2io_netdev_ops = {
	.ndo_open	        = s2io_open,
	.ndo_stop	        = s2io_close,
	.ndo_get_stats	        = s2io_get_stats,
	.ndo_start_xmit    	= s2io_xmit,
	.ndo_validate_addr	= eth_validate_addr,
	.ndo_set_multicast_list = s2io_set_multicast,
	.ndo_do_ioctl	   	= s2io_ioctl,
	.ndo_set_mac_address    = s2io_set_mac_addr,
	.ndo_change_mtu	   	= s2io_change_mtu,
	.ndo_vlan_rx_register   = s2io_vlan_rx_register,
	.ndo_vlan_rx_kill_vid   = s2io_vlan_rx_kill_vid,
	.ndo_tx_timeout	   	= s2io_tx_watchdog,
#ifdef CONFIG_NET_POLL_CONTROLLER
	.ndo_poll_controller    = s2io_netpoll,
#endif
};

L
Linus Torvalds 已提交
7778
/**
7779
 *  s2io_init_nic - Initialization of the adapter .
L
Linus Torvalds 已提交
7780 7781 7782 7783
 *  @pdev : structure containing the PCI related information of the device.
 *  @pre: List of PCI devices supported by the driver listed in s2io_tbl.
 *  Description:
 *  The function initializes an adapter identified by the pci_dec structure.
7784 7785 7786
 *  All OS related initialization including memory and device structure and
 *  initlaization of the device private variable is done. Also the swapper
 *  control register is initialized to enable read and write into the I/O
L
Linus Torvalds 已提交
7787 7788 7789 7790 7791 7792 7793 7794
 *  registers of the device.
 *  Return value:
 *  returns 0 on success and negative on failure.
 */

static int __devinit
s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
{
R
Ralf Baechle 已提交
7795
	struct s2io_nic *sp;
L
Linus Torvalds 已提交
7796 7797
	struct net_device *dev;
	int i, j, ret;
7798
	int dma_flag = false;
L
Linus Torvalds 已提交
7799 7800
	u32 mac_up, mac_down;
	u64 val64 = 0, tmp64 = 0;
R
Ralf Baechle 已提交
7801
	struct XENA_dev_config __iomem *bar0 = NULL;
L
Linus Torvalds 已提交
7802
	u16 subid;
R
Ralf Baechle 已提交
7803
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
7804
	struct config_param *config;
7805
	int mode;
7806
	u8 dev_intr_type = intr_type;
7807
	u8 dev_multiq = 0;
L
Linus Torvalds 已提交
7808

7809 7810
	ret = s2io_verify_parm(pdev, &dev_intr_type, &dev_multiq);
	if (ret)
7811
		return ret;
L
Linus Torvalds 已提交
7812 7813 7814 7815 7816 7817 7818

	if ((ret = pci_enable_device(pdev))) {
		DBG_PRINT(ERR_DBG,
			  "s2io_init_nic: pci_enable_device failed\n");
		return ret;
	}

7819
	if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
L
Linus Torvalds 已提交
7820
		DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 64bit DMA\n");
7821
		dma_flag = true;
L
Linus Torvalds 已提交
7822
		if (pci_set_consistent_dma_mask
7823
		    (pdev, DMA_BIT_MASK(64))) {
L
Linus Torvalds 已提交
7824 7825 7826 7827 7828 7829
			DBG_PRINT(ERR_DBG,
				  "Unable to obtain 64bit DMA for \
					consistent allocations\n");
			pci_disable_device(pdev);
			return -ENOMEM;
		}
7830
	} else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
L
Linus Torvalds 已提交
7831 7832 7833 7834 7835
		DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 32bit DMA\n");
	} else {
		pci_disable_device(pdev);
		return -ENOMEM;
	}
7836
	if ((ret = pci_request_regions(pdev, s2io_driver_name))) {
7837
		DBG_PRINT(ERR_DBG, "%s: Request Regions failed - %x \n", __func__, ret);
7838 7839
		pci_disable_device(pdev);
		return -ENODEV;
L
Linus Torvalds 已提交
7840
	}
7841
	if (dev_multiq)
7842
		dev = alloc_etherdev_mq(sizeof(struct s2io_nic), tx_fifo_num);
7843
	else
7844
		dev = alloc_etherdev(sizeof(struct s2io_nic));
L
Linus Torvalds 已提交
7845 7846 7847 7848 7849 7850 7851 7852 7853 7854 7855 7856
	if (dev == NULL) {
		DBG_PRINT(ERR_DBG, "Device allocation failed\n");
		pci_disable_device(pdev);
		pci_release_regions(pdev);
		return -ENODEV;
	}

	pci_set_master(pdev);
	pci_set_drvdata(pdev, dev);
	SET_NETDEV_DEV(dev, &pdev->dev);

	/*  Private member variable initialized to s2io NIC structure */
7857
	sp = netdev_priv(dev);
R
Ralf Baechle 已提交
7858
	memset(sp, 0, sizeof(struct s2io_nic));
L
Linus Torvalds 已提交
7859 7860 7861
	sp->dev = dev;
	sp->pdev = pdev;
	sp->high_dma_flag = dma_flag;
7862
	sp->device_enabled_once = false;
7863 7864 7865 7866 7867
	if (rx_ring_mode == 1)
		sp->rxd_mode = RXD_MODE_1;
	if (rx_ring_mode == 2)
		sp->rxd_mode = RXD_MODE_3B;

7868
	sp->config.intr_type = dev_intr_type;
L
Linus Torvalds 已提交
7869

7870 7871 7872 7873 7874 7875
	if ((pdev->device == PCI_DEVICE_ID_HERC_WIN) ||
		(pdev->device == PCI_DEVICE_ID_HERC_UNI))
		sp->device_type = XFRAME_II_DEVICE;
	else
		sp->device_type = XFRAME_I_DEVICE;

7876
	sp->lro = lro_enable;
7877

L
Linus Torvalds 已提交
7878 7879 7880
	/* Initialize some PCI/PCI-X fields of the NIC. */
	s2io_init_pci(sp);

7881
	/*
L
Linus Torvalds 已提交
7882
	 * Setting the device configuration parameters.
7883 7884 7885
	 * Most of these parameters can be specified by the user during
	 * module insertion as they are module loadable parameters. If
	 * these parameters are not not specified during load time, they
L
Linus Torvalds 已提交
7886 7887 7888 7889 7890
	 * are initialized with default values.
	 */
	mac_control = &sp->mac_control;
	config = &sp->config;

7891
	config->napi = napi;
7892
	config->tx_steering_type = tx_steering_type;
7893

L
Linus Torvalds 已提交
7894
	/* Tx side parameters. */
7895 7896 7897 7898 7899 7900 7901 7902 7903 7904 7905 7906 7907 7908 7909 7910 7911 7912 7913 7914 7915 7916
	if (config->tx_steering_type == TX_PRIORITY_STEERING)
		config->tx_fifo_num = MAX_TX_FIFOS;
	else
		config->tx_fifo_num = tx_fifo_num;

	/* Initialize the fifos used for tx steering */
	if (config->tx_fifo_num < 5) {
			if (config->tx_fifo_num  == 1)
				sp->total_tcp_fifos = 1;
			else
				sp->total_tcp_fifos = config->tx_fifo_num - 1;
			sp->udp_fifo_idx = config->tx_fifo_num - 1;
			sp->total_udp_fifos = 1;
			sp->other_fifo_idx = sp->total_tcp_fifos - 1;
	} else {
		sp->total_tcp_fifos = (tx_fifo_num - FIFO_UDP_MAX_NUM -
						FIFO_OTHER_MAX_NUM);
		sp->udp_fifo_idx = sp->total_tcp_fifos;
		sp->total_udp_fifos = FIFO_UDP_MAX_NUM;
		sp->other_fifo_idx = sp->udp_fifo_idx + FIFO_UDP_MAX_NUM;
	}

7917
	config->multiq = dev_multiq;
7918
	for (i = 0; i < config->tx_fifo_num; i++) {
7919 7920 7921 7922
		struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];

		tx_cfg->fifo_len = tx_fifo_len[i];
		tx_cfg->fifo_priority = i;
L
Linus Torvalds 已提交
7923 7924
	}

7925 7926
	/* mapping the QoS priority to the configured fifos */
	for (i = 0; i < MAX_TX_FIFOS; i++)
7927
		config->fifo_mapping[i] = fifo_map[config->tx_fifo_num - 1][i];
7928

7929 7930 7931 7932 7933
	/* map the hashing selector table to the configured fifos */
	for (i = 0; i < config->tx_fifo_num; i++)
		sp->fifo_selector[i] = fifo_selector[i];


L
Linus Torvalds 已提交
7934 7935
	config->tx_intr_type = TXD_INT_TYPE_UTILZ;
	for (i = 0; i < config->tx_fifo_num; i++) {
7936 7937 7938 7939
		struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];

		tx_cfg->f_no_snoop = (NO_SNOOP_TXD | NO_SNOOP_TXD_BUFFER);
		if (tx_cfg->fifo_len < 65) {
L
Linus Torvalds 已提交
7940 7941 7942 7943
			config->tx_intr_type = TXD_INT_TYPE_PER_LIST;
			break;
		}
	}
A
Ananda Raju 已提交
7944 7945
	/* + 2 because one Txd for skb->data and one Txd for UFO */
	config->max_txds = MAX_SKB_FRAGS + 2;
L
Linus Torvalds 已提交
7946 7947 7948

	/* Rx side parameters. */
	config->rx_ring_num = rx_ring_num;
7949
	for (i = 0; i < config->rx_ring_num; i++) {
7950 7951 7952 7953 7954 7955 7956 7957 7958 7959
		struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
		struct ring_info *ring = &mac_control->rings[i];

		rx_cfg->num_rxd = rx_ring_sz[i] * (rxd_count[sp->rxd_mode] + 1);
		rx_cfg->ring_priority = i;
		ring->rx_bufs_left = 0;
		ring->rxd_mode = sp->rxd_mode;
		ring->rxd_count = rxd_count[sp->rxd_mode];
		ring->pdev = sp->pdev;
		ring->dev = sp->dev;
L
Linus Torvalds 已提交
7960 7961 7962
	}

	for (i = 0; i < rx_ring_num; i++) {
7963 7964 7965 7966
		struct rx_ring_config *rx_cfg = &config->rx_cfg[i];

		rx_cfg->ring_org = RING_ORG_BUFF1;
		rx_cfg->f_no_snoop = (NO_SNOOP_RXD | NO_SNOOP_RXD_BUFFER);
L
Linus Torvalds 已提交
7967 7968 7969 7970 7971 7972 7973 7974 7975 7976 7977
	}

	/*  Setting Mac Control parameters */
	mac_control->rmac_pause_time = rmac_pause_time;
	mac_control->mc_pause_threshold_q0q3 = mc_pause_threshold_q0q3;
	mac_control->mc_pause_threshold_q4q7 = mc_pause_threshold_q4q7;


	/*  initialize the shared memory used by the NIC and the host */
	if (init_shared_mem(sp)) {
		DBG_PRINT(ERR_DBG, "%s: Memory allocation failed\n",
7978
			  dev->name);
L
Linus Torvalds 已提交
7979 7980 7981 7982
		ret = -ENOMEM;
		goto mem_alloc_failed;
	}

7983
	sp->bar0 = pci_ioremap_bar(pdev, 0);
L
Linus Torvalds 已提交
7984
	if (!sp->bar0) {
7985
		DBG_PRINT(ERR_DBG, "%s: Neterion: cannot remap io mem1\n",
L
Linus Torvalds 已提交
7986 7987 7988 7989 7990
			  dev->name);
		ret = -ENOMEM;
		goto bar0_remap_failed;
	}

7991
	sp->bar1 = pci_ioremap_bar(pdev, 2);
L
Linus Torvalds 已提交
7992
	if (!sp->bar1) {
7993
		DBG_PRINT(ERR_DBG, "%s: Neterion: cannot remap io mem2\n",
L
Linus Torvalds 已提交
7994 7995 7996 7997 7998 7999 8000 8001 8002 8003
			  dev->name);
		ret = -ENOMEM;
		goto bar1_remap_failed;
	}

	dev->irq = pdev->irq;
	dev->base_addr = (unsigned long) sp->bar0;

	/* Initializing the BAR1 address as the start of the FIFO pointer. */
	for (j = 0; j < MAX_TX_FIFOS; j++) {
R
Ralf Baechle 已提交
8004
		mac_control->tx_FIFO_start[j] = (struct TxFIFO_element __iomem *)
L
Linus Torvalds 已提交
8005 8006 8007 8008
		    (sp->bar1 + (j * 0x00020000));
	}

	/*  Driver entry points */
8009
	dev->netdev_ops = &s2io_netdev_ops;
L
Linus Torvalds 已提交
8010
	SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
8011
	dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
8012

L
Linus Torvalds 已提交
8013
	dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
8014
	if (sp->high_dma_flag == true)
L
Linus Torvalds 已提交
8015 8016
		dev->features |= NETIF_F_HIGHDMA;
	dev->features |= NETIF_F_TSO;
8017
	dev->features |= NETIF_F_TSO6;
8018
	if ((sp->device_type & XFRAME_II_DEVICE) && (ufo))  {
A
Ananda Raju 已提交
8019 8020 8021
		dev->features |= NETIF_F_UFO;
		dev->features |= NETIF_F_HW_CSUM;
	}
L
Linus Torvalds 已提交
8022
	dev->watchdog_timeo = WATCH_DOG_TIMEOUT;
8023 8024
	INIT_WORK(&sp->rst_timer_task, s2io_restart_nic);
	INIT_WORK(&sp->set_link_task, s2io_set_link);
L
Linus Torvalds 已提交
8025

8026
	pci_save_state(sp->pdev);
L
Linus Torvalds 已提交
8027 8028 8029 8030 8031 8032 8033 8034 8035

	/* Setting swapper control on the NIC, for proper reset operation */
	if (s2io_set_swapper(sp)) {
		DBG_PRINT(ERR_DBG, "%s:swapper settings are wrong\n",
			  dev->name);
		ret = -EAGAIN;
		goto set_swap_failed;
	}

8036 8037 8038 8039
	/* Verify if the Herc works on the slot its placed into */
	if (sp->device_type & XFRAME_II_DEVICE) {
		mode = s2io_verify_pci_mode(sp);
		if (mode < 0) {
8040
			DBG_PRINT(ERR_DBG, "%s: ", __func__);
8041 8042 8043 8044 8045 8046
			DBG_PRINT(ERR_DBG, " Unsupported PCI bus mode\n");
			ret = -EBADSLT;
			goto set_swap_failed;
		}
	}

8047 8048 8049 8050 8051 8052 8053 8054 8055 8056 8057 8058
	if (sp->config.intr_type == MSI_X) {
		sp->num_entries = config->rx_ring_num + 1;
		ret = s2io_enable_msi_x(sp);

		if (!ret) {
			ret = s2io_test_msi(sp);
			/* rollback MSI-X, will re-enable during add_isr() */
			remove_msix_isr(sp);
		}
		if (ret) {

			DBG_PRINT(ERR_DBG,
8059
			  "s2io: MSI-X requested but failed to enable\n");
8060 8061 8062 8063 8064
			sp->config.intr_type = INTA;
		}
	}

	if (config->intr_type ==  MSI_X) {
8065 8066 8067 8068 8069
		for (i = 0; i < config->rx_ring_num ; i++) {
			struct ring_info *ring = &mac_control->rings[i];

			netif_napi_add(dev, &ring->napi, s2io_poll_msix, 64);
		}
8070 8071 8072 8073
	} else {
		netif_napi_add(dev, &sp->napi, s2io_poll_inta, 64);
	}

8074 8075 8076 8077 8078 8079 8080 8081 8082
	/* Not needed for Herc */
	if (sp->device_type & XFRAME_I_DEVICE) {
		/*
		 * Fix for all "FFs" MAC address problems observed on
		 * Alpha platforms
		 */
		fix_mac_address(sp);
		s2io_reset(sp);
	}
L
Linus Torvalds 已提交
8083 8084 8085 8086 8087 8088 8089

	/*
	 * MAC address initialization.
	 * For now only one mac address will be read and used.
	 */
	bar0 = sp->bar0;
	val64 = RMAC_ADDR_CMD_MEM_RD | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
8090
	    RMAC_ADDR_CMD_MEM_OFFSET(0 + S2IO_MAC_ADDR_START_OFFSET);
L
Linus Torvalds 已提交
8091
	writeq(val64, &bar0->rmac_addr_cmd_mem);
A
Ananda Raju 已提交
8092
	wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
8093
		      RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING, S2IO_BIT_RESET);
L
Linus Torvalds 已提交
8094 8095 8096 8097 8098 8099 8100 8101 8102 8103 8104 8105 8106 8107
	tmp64 = readq(&bar0->rmac_addr_data0_mem);
	mac_down = (u32) tmp64;
	mac_up = (u32) (tmp64 >> 32);

	sp->def_mac_addr[0].mac_addr[3] = (u8) (mac_up);
	sp->def_mac_addr[0].mac_addr[2] = (u8) (mac_up >> 8);
	sp->def_mac_addr[0].mac_addr[1] = (u8) (mac_up >> 16);
	sp->def_mac_addr[0].mac_addr[0] = (u8) (mac_up >> 24);
	sp->def_mac_addr[0].mac_addr[5] = (u8) (mac_down >> 16);
	sp->def_mac_addr[0].mac_addr[4] = (u8) (mac_down >> 24);

	/*  Set the factory defined MAC address initially   */
	dev->addr_len = ETH_ALEN;
	memcpy(dev->dev_addr, sp->def_mac_addr, ETH_ALEN);
8108
	memcpy(dev->perm_addr, dev->dev_addr, ETH_ALEN);
L
Linus Torvalds 已提交
8109

8110 8111 8112 8113 8114 8115 8116 8117 8118 8119 8120 8121 8122 8123
	/* initialize number of multicast & unicast MAC entries variables */
	if (sp->device_type == XFRAME_I_DEVICE) {
		config->max_mc_addr = S2IO_XENA_MAX_MC_ADDRESSES;
		config->max_mac_addr = S2IO_XENA_MAX_MAC_ADDRESSES;
		config->mc_start_offset = S2IO_XENA_MC_ADDR_START_OFFSET;
	} else if (sp->device_type == XFRAME_II_DEVICE) {
		config->max_mc_addr = S2IO_HERC_MAX_MC_ADDRESSES;
		config->max_mac_addr = S2IO_HERC_MAX_MAC_ADDRESSES;
		config->mc_start_offset = S2IO_HERC_MC_ADDR_START_OFFSET;
	}

	/* store mac addresses from CAM to s2io_nic structure */
	do_s2io_store_unicast_mc(sp);

8124 8125 8126 8127 8128
	/* Configure MSIX vector for number of rings configured plus one */
	if ((sp->device_type == XFRAME_II_DEVICE) &&
		(config->intr_type == MSI_X))
		sp->num_entries = config->rx_ring_num + 1;

8129 8130
	 /* Store the values of the MSIX table in the s2io_nic structure */
	store_xmsi_data(sp);
8131 8132 8133
	/* reset Nic and bring it to known state */
	s2io_reset(sp);

L
Linus Torvalds 已提交
8134
	/*
8135
	 * Initialize link state flags
8136
	 * and the card state parameter
L
Linus Torvalds 已提交
8137
	 */
8138
	sp->state = 0;
L
Linus Torvalds 已提交
8139 8140

	/* Initialize spinlocks */
8141 8142 8143 8144 8145
	for (i = 0; i < sp->config.tx_fifo_num; i++) {
		struct fifo_info *fifo = &mac_control->fifos[i];

		spin_lock_init(&fifo->tx_lock);
	}
8146

8147 8148 8149
	/*
	 * SXE-002: Configure link and activity LED to init state
	 * on driver load.
L
Linus Torvalds 已提交
8150 8151 8152 8153 8154 8155 8156 8157 8158 8159 8160 8161 8162 8163 8164 8165 8166 8167
	 */
	subid = sp->pdev->subsystem_device;
	if ((subid & 0xFF) >= 0x07) {
		val64 = readq(&bar0->gpio_control);
		val64 |= 0x0000800000000000ULL;
		writeq(val64, &bar0->gpio_control);
		val64 = 0x0411040400000000ULL;
		writeq(val64, (void __iomem *) bar0 + 0x2700);
		val64 = readq(&bar0->gpio_control);
	}

	sp->rx_csum = 1;	/* Rx chksum verify enabled by default */

	if (register_netdev(dev)) {
		DBG_PRINT(ERR_DBG, "Device registration failed\n");
		ret = -ENODEV;
		goto register_failed;
	}
8168
	s2io_vpd_read(sp);
8169
	DBG_PRINT(ERR_DBG, "Copyright(c) 2002-2007 Neterion Inc.\n");
8170
	DBG_PRINT(ERR_DBG, "%s: Neterion %s (rev %d)\n",dev->name,
8171
		  sp->product_name, pdev->revision);
8172 8173
	DBG_PRINT(ERR_DBG, "%s: Driver version %s\n", dev->name,
		  s2io_driver_version);
8174
	DBG_PRINT(ERR_DBG, "%s: MAC ADDR: %pM\n", dev->name, dev->dev_addr);
8175
	DBG_PRINT(ERR_DBG, "SERIAL NUMBER: %s\n", sp->serial_num);
8176
	if (sp->device_type & XFRAME_II_DEVICE) {
8177
		mode = s2io_print_pci_mode(sp);
8178
		if (mode < 0) {
8179
			DBG_PRINT(ERR_DBG, " Unsupported PCI bus mode\n");
8180
			ret = -EBADSLT;
8181
			unregister_netdev(dev);
8182 8183 8184
			goto set_swap_failed;
		}
	}
8185 8186 8187 8188 8189 8190 8191 8192 8193 8194
	switch(sp->rxd_mode) {
		case RXD_MODE_1:
		    DBG_PRINT(ERR_DBG, "%s: 1-Buffer receive mode enabled\n",
						dev->name);
		    break;
		case RXD_MODE_3B:
		    DBG_PRINT(ERR_DBG, "%s: 2-Buffer receive mode enabled\n",
						dev->name);
		    break;
	}
8195

8196 8197 8198 8199 8200
	switch (sp->config.napi) {
	case 0:
		DBG_PRINT(ERR_DBG, "%s: NAPI disabled\n", dev->name);
		break;
	case 1:
8201
		DBG_PRINT(ERR_DBG, "%s: NAPI enabled\n", dev->name);
8202 8203
		break;
	}
8204 8205 8206 8207

	DBG_PRINT(ERR_DBG, "%s: Using %d Tx fifo(s)\n", dev->name,
		sp->config.tx_fifo_num);

8208 8209 8210
	DBG_PRINT(ERR_DBG, "%s: Using %d Rx ring(s)\n", dev->name,
		  sp->config.rx_ring_num);

8211
	switch(sp->config.intr_type) {
8212 8213 8214 8215 8216 8217 8218
		case INTA:
		    DBG_PRINT(ERR_DBG, "%s: Interrupt type INTA\n", dev->name);
		    break;
		case MSI_X:
		    DBG_PRINT(ERR_DBG, "%s: Interrupt type MSI-X\n", dev->name);
		    break;
	}
8219
	if (sp->config.multiq) {
8220 8221 8222 8223 8224
		for (i = 0; i < sp->config.tx_fifo_num; i++) {
			struct fifo_info *fifo = &mac_control->fifos[i];

			fifo->multiq = config->multiq;
		}
8225 8226 8227 8228 8229 8230
		DBG_PRINT(ERR_DBG, "%s: Multiqueue support enabled\n",
			dev->name);
	} else
		DBG_PRINT(ERR_DBG, "%s: Multiqueue support disabled\n",
			dev->name);

8231 8232 8233 8234 8235 8236 8237 8238 8239 8240 8241 8242 8243 8244
	switch (sp->config.tx_steering_type) {
	case NO_STEERING:
		DBG_PRINT(ERR_DBG, "%s: No steering enabled for"
			" transmit\n", dev->name);
			break;
	case TX_PRIORITY_STEERING:
		DBG_PRINT(ERR_DBG, "%s: Priority steering enabled for"
			" transmit\n", dev->name);
		break;
	case TX_DEFAULT_STEERING:
		DBG_PRINT(ERR_DBG, "%s: Default steering enabled for"
			" transmit\n", dev->name);
	}

8245 8246
	if (sp->lro)
		DBG_PRINT(ERR_DBG, "%s: Large receive offload enabled\n",
8247
			  dev->name);
8248 8249 8250
	if (ufo)
		DBG_PRINT(ERR_DBG, "%s: UDP Fragmentation Offload(UFO)"
					" enabled\n", dev->name);
8251
	/* Initialize device name */
8252
	sprintf(sp->name, "%s Neterion %s", dev->name, sp->product_name);
8253

8254 8255 8256 8257 8258
	if (vlan_tag_strip)
		sp->vlan_strip_flag = 1;
	else
		sp->vlan_strip_flag = 0;

8259 8260 8261
	/*
	 * Make Link state as off at this point, when the Link change
	 * interrupt comes the state will be automatically changed to
L
Linus Torvalds 已提交
8262 8263 8264 8265 8266 8267 8268 8269 8270 8271 8272 8273 8274 8275 8276
	 * the right state.
	 */
	netif_carrier_off(dev);

	return 0;

      register_failed:
      set_swap_failed:
	iounmap(sp->bar1);
      bar1_remap_failed:
	iounmap(sp->bar0);
      bar0_remap_failed:
      mem_alloc_failed:
	free_shared_mem(sp);
	pci_disable_device(pdev);
8277
	pci_release_regions(pdev);
L
Linus Torvalds 已提交
8278 8279 8280 8281 8282 8283 8284
	pci_set_drvdata(pdev, NULL);
	free_netdev(dev);

	return ret;
}

/**
8285
 * s2io_rem_nic - Free the PCI device
L
Linus Torvalds 已提交
8286
 * @pdev: structure containing the PCI related information of the device.
8287
 * Description: This function is called by the Pci subsystem to release a
L
Linus Torvalds 已提交
8288
 * PCI device and free up all resource held up by the device. This could
8289
 * be in response to a Hot plug event or when the driver is to be removed
L
Linus Torvalds 已提交
8290 8291 8292 8293 8294 8295 8296
 * from memory.
 */

static void __devexit s2io_rem_nic(struct pci_dev *pdev)
{
	struct net_device *dev =
	    (struct net_device *) pci_get_drvdata(pdev);
R
Ralf Baechle 已提交
8297
	struct s2io_nic *sp;
L
Linus Torvalds 已提交
8298 8299 8300 8301 8302 8303

	if (dev == NULL) {
		DBG_PRINT(ERR_DBG, "Driver Data is NULL!!\n");
		return;
	}

8304 8305
	flush_scheduled_work();

8306
	sp = netdev_priv(dev);
L
Linus Torvalds 已提交
8307 8308 8309 8310 8311
	unregister_netdev(dev);

	free_shared_mem(sp);
	iounmap(sp->bar0);
	iounmap(sp->bar1);
8312
	pci_release_regions(pdev);
L
Linus Torvalds 已提交
8313 8314
	pci_set_drvdata(pdev, NULL);
	free_netdev(dev);
8315
	pci_disable_device(pdev);
L
Linus Torvalds 已提交
8316 8317 8318 8319 8320 8321 8322 8323
}

/**
 * s2io_starter - Entry point for the driver
 * Description: This function is the entry point for the driver. It verifies
 * the module loadable parameters and initializes PCI configuration space.
 */

8324
static int __init s2io_starter(void)
L
Linus Torvalds 已提交
8325
{
8326
	return pci_register_driver(&s2io_driver);
L
Linus Torvalds 已提交
8327 8328 8329
}

/**
8330
 * s2io_closer - Cleanup routine for the driver
L
Linus Torvalds 已提交
8331 8332 8333
 * Description: This function is the cleanup routine for the driver. It unregist * ers the driver.
 */

8334
static __exit void s2io_closer(void)
L
Linus Torvalds 已提交
8335 8336 8337 8338 8339 8340 8341
{
	pci_unregister_driver(&s2io_driver);
	DBG_PRINT(INIT_DBG, "cleanup done\n");
}

module_init(s2io_starter);
module_exit(s2io_closer);
8342

8343
static int check_L2_lro_capable(u8 *buffer, struct iphdr **ip,
8344 8345
		struct tcphdr **tcp, struct RxD_t *rxdp,
		struct s2io_nic *sp)
8346 8347 8348 8349 8350 8351
{
	int ip_off;
	u8 l2_type = (u8)((rxdp->Control_1 >> 37) & 0x7), ip_len;

	if (!(rxdp->Control_1 & RXD_FRAME_PROTO_TCP)) {
		DBG_PRINT(INIT_DBG,"%s: Non-TCP frames not supported for LRO\n",
8352
			  __func__);
8353 8354 8355
		return -1;
	}

8356 8357 8358 8359 8360 8361 8362 8363
	/* Checking for DIX type or DIX type with VLAN */
	if ((l2_type == 0)
		|| (l2_type == 4)) {
		ip_off = HEADER_ETHERNET_II_802_3_SIZE;
		/*
		 * If vlan stripping is disabled and the frame is VLAN tagged,
		 * shift the offset by the VLAN header size bytes.
		 */
8364
		if ((!sp->vlan_strip_flag) &&
8365 8366 8367
			(rxdp->Control_1 & RXD_FRAME_VLAN_TAG))
			ip_off += HEADER_VLAN_SIZE;
	} else {
8368
		/* LLC, SNAP etc are considered non-mergeable */
8369
		return -1;
8370 8371 8372 8373 8374 8375 8376 8377 8378 8379
	}

	*ip = (struct iphdr *)((u8 *)buffer + ip_off);
	ip_len = (u8)((*ip)->ihl);
	ip_len <<= 2;
	*tcp = (struct tcphdr *)((unsigned long)*ip + ip_len);

	return 0;
}

R
Ralf Baechle 已提交
8380
static int check_for_socket_match(struct lro *lro, struct iphdr *ip,
8381 8382
				  struct tcphdr *tcp)
{
8383
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __func__);
8384 8385 8386 8387 8388 8389 8390 8391 8392 8393 8394
	if ((lro->iph->saddr != ip->saddr) || (lro->iph->daddr != ip->daddr) ||
	   (lro->tcph->source != tcp->source) || (lro->tcph->dest != tcp->dest))
		return -1;
	return 0;
}

static inline int get_l4_pyld_length(struct iphdr *ip, struct tcphdr *tcp)
{
	return(ntohs(ip->tot_len) - (ip->ihl << 2) - (tcp->doff << 2));
}

R
Ralf Baechle 已提交
8395
static void initiate_new_session(struct lro *lro, u8 *l2h,
8396
	struct iphdr *ip, struct tcphdr *tcp, u32 tcp_pyld_len, u16 vlan_tag)
8397
{
8398
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __func__);
8399 8400 8401 8402
	lro->l2h = l2h;
	lro->iph = ip;
	lro->tcph = tcp;
	lro->tcp_next_seq = tcp_pyld_len + ntohl(tcp->seq);
S
Surjit Reang 已提交
8403
	lro->tcp_ack = tcp->ack_seq;
8404 8405 8406
	lro->sg_num = 1;
	lro->total_len = ntohs(ip->tot_len);
	lro->frags_len = 0;
8407
	lro->vlan_tag = vlan_tag;
8408
	/*
8409 8410 8411 8412
	 * check if we saw TCP timestamp. Other consistency checks have
	 * already been done.
 	 */
	if (tcp->doff == 8) {
S
Surjit Reang 已提交
8413 8414
		__be32 *ptr;
		ptr = (__be32 *)(tcp+1);
8415
		lro->saw_ts = 1;
S
Surjit Reang 已提交
8416
		lro->cur_tsval = ntohl(*(ptr+1));
8417 8418 8419 8420 8421
		lro->cur_tsecr = *(ptr+2);
	}
	lro->in_use = 1;
}

R
Ralf Baechle 已提交
8422
static void update_L3L4_header(struct s2io_nic *sp, struct lro *lro)
8423 8424 8425
{
	struct iphdr *ip = lro->iph;
	struct tcphdr *tcp = lro->tcph;
8426
	__sum16 nchk;
R
Ralf Baechle 已提交
8427
	struct stat_block *statinfo = sp->mac_control.stats_info;
8428
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __func__);
8429 8430 8431 8432 8433 8434 8435 8436 8437 8438 8439 8440 8441

	/* Update L3 header */
	ip->tot_len = htons(lro->total_len);
	ip->check = 0;
	nchk = ip_fast_csum((u8 *)lro->iph, ip->ihl);
	ip->check = nchk;

	/* Update L4 header */
	tcp->ack_seq = lro->tcp_ack;
	tcp->window = lro->window;

	/* Update tsecr field if this session has timestamps enabled */
	if (lro->saw_ts) {
S
Surjit Reang 已提交
8442
		__be32 *ptr = (__be32 *)(tcp + 1);
8443 8444 8445 8446 8447 8448 8449 8450 8451 8452
		*(ptr+2) = lro->cur_tsecr;
	}

	/* Update counters required for calculation of
	 * average no. of packets aggregated.
	 */
	statinfo->sw_stat.sum_avg_pkts_aggregated += lro->sg_num;
	statinfo->sw_stat.num_aggregations++;
}

R
Ralf Baechle 已提交
8453
static void aggregate_new_rx(struct lro *lro, struct iphdr *ip,
8454 8455
		struct tcphdr *tcp, u32 l4_pyld)
{
8456
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __func__);
8457 8458 8459 8460 8461 8462 8463 8464
	lro->total_len += l4_pyld;
	lro->frags_len += l4_pyld;
	lro->tcp_next_seq += l4_pyld;
	lro->sg_num++;

	/* Update ack seq no. and window ad(from this pkt) in LRO object */
	lro->tcp_ack = tcp->ack_seq;
	lro->window = tcp->window;
8465

8466
	if (lro->saw_ts) {
S
Surjit Reang 已提交
8467
		__be32 *ptr;
8468
		/* Update tsecr and tsval from this packet */
S
Surjit Reang 已提交
8469 8470
		ptr = (__be32 *)(tcp+1);
		lro->cur_tsval = ntohl(*(ptr+1));
8471 8472 8473 8474
		lro->cur_tsecr = *(ptr + 2);
	}
}

R
Ralf Baechle 已提交
8475
static int verify_l3_l4_lro_capable(struct lro *l_lro, struct iphdr *ip,
8476 8477 8478 8479
				    struct tcphdr *tcp, u32 tcp_pyld_len)
{
	u8 *ptr;

8480
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __func__);
8481

8482 8483 8484 8485 8486 8487 8488 8489
	if (!tcp_pyld_len) {
		/* Runt frame or a pure ack */
		return -1;
	}

	if (ip->ihl != 5) /* IP has options */
		return -1;

8490 8491 8492 8493 8494
	/* If we see CE codepoint in IP header, packet is not mergeable */
	if (INET_ECN_is_ce(ipv4_get_dsfield(ip)))
		return -1;

	/* If we see ECE or CWR flags in TCP header, packet is not mergeable */
8495
	if (tcp->urg || tcp->psh || tcp->rst || tcp->syn || tcp->fin ||
8496
				    tcp->ece || tcp->cwr || !tcp->ack) {
8497 8498 8499 8500 8501 8502 8503 8504
		/*
		 * Currently recognize only the ack control word and
		 * any other control field being set would result in
		 * flushing the LRO session
		 */
		return -1;
	}

8505
	/*
8506 8507 8508 8509 8510 8511 8512
	 * Allow only one TCP timestamp option. Don't aggregate if
	 * any other options are detected.
	 */
	if (tcp->doff != 5 && tcp->doff != 8)
		return -1;

	if (tcp->doff == 8) {
8513
		ptr = (u8 *)(tcp + 1);
8514 8515 8516 8517 8518 8519 8520
		while (*ptr == TCPOPT_NOP)
			ptr++;
		if (*ptr != TCPOPT_TIMESTAMP || *(ptr+1) != TCPOLEN_TIMESTAMP)
			return -1;

		/* Ensure timestamp value increases monotonically */
		if (l_lro)
S
Surjit Reang 已提交
8521
			if (l_lro->cur_tsval > ntohl(*((__be32 *)(ptr+2))))
8522 8523 8524
				return -1;

		/* timestamp echo reply should be non-zero */
S
Surjit Reang 已提交
8525
		if (*((__be32 *)(ptr+6)) == 0)
8526 8527 8528 8529 8530 8531 8532
			return -1;
	}

	return 0;
}

static int
8533 8534 8535
s2io_club_tcp_session(struct ring_info *ring_data, u8 *buffer, u8 **tcp,
	u32 *tcp_len, struct lro **lro, struct RxD_t *rxdp,
	struct s2io_nic *sp)
8536 8537 8538 8539
{
	struct iphdr *ip;
	struct tcphdr *tcph;
	int ret = 0, i;
8540
	u16 vlan_tag = 0;
8541 8542

	if (!(ret = check_L2_lro_capable(buffer, &ip, (struct tcphdr **)tcp,
8543
					 rxdp, sp))) {
8544 8545
		DBG_PRINT(INFO_DBG,"IP Saddr: %x Daddr: %x\n",
			  ip->saddr, ip->daddr);
8546
	} else
8547 8548
		return ret;

8549
	vlan_tag = RXD_GET_VLAN_TAG(rxdp->Control_2);
8550 8551 8552
	tcph = (struct tcphdr *)*tcp;
	*tcp_len = get_l4_pyld_length(ip, tcph);
	for (i=0; i<MAX_LRO_SESSIONS; i++) {
8553
		struct lro *l_lro = &ring_data->lro0_n[i];
8554 8555 8556 8557 8558 8559 8560 8561
		if (l_lro->in_use) {
			if (check_for_socket_match(l_lro, ip, tcph))
				continue;
			/* Sock pair matched */
			*lro = l_lro;

			if ((*lro)->tcp_next_seq != ntohl(tcph->seq)) {
				DBG_PRINT(INFO_DBG, "%s:Out of order. expected "
8562
					  "0x%x, actual 0x%x\n", __func__,
8563 8564 8565 8566 8567 8568 8569 8570 8571 8572 8573 8574 8575 8576 8577 8578 8579 8580 8581 8582 8583 8584 8585 8586 8587 8588 8589 8590
					  (*lro)->tcp_next_seq,
					  ntohl(tcph->seq));

				sp->mac_control.stats_info->
				   sw_stat.outof_sequence_pkts++;
				ret = 2;
				break;
			}

			if (!verify_l3_l4_lro_capable(l_lro, ip, tcph,*tcp_len))
				ret = 1; /* Aggregate */
			else
				ret = 2; /* Flush both */
			break;
		}
	}

	if (ret == 0) {
		/* Before searching for available LRO objects,
		 * check if the pkt is L3/L4 aggregatable. If not
		 * don't create new LRO session. Just send this
		 * packet up.
		 */
		if (verify_l3_l4_lro_capable(NULL, ip, tcph, *tcp_len)) {
			return 5;
		}

		for (i=0; i<MAX_LRO_SESSIONS; i++) {
8591
			struct lro *l_lro = &ring_data->lro0_n[i];
8592 8593 8594 8595 8596 8597 8598 8599 8600 8601
			if (!(l_lro->in_use)) {
				*lro = l_lro;
				ret = 3; /* Begin anew */
				break;
			}
		}
	}

	if (ret == 0) { /* sessions exceeded */
		DBG_PRINT(INFO_DBG,"%s:All LRO sessions already in use\n",
8602
			  __func__);
8603 8604 8605 8606 8607 8608
		*lro = NULL;
		return ret;
	}

	switch (ret) {
		case 3:
8609 8610
			initiate_new_session(*lro, buffer, ip, tcph, *tcp_len,
								vlan_tag);
8611 8612 8613 8614 8615 8616 8617 8618 8619 8620 8621 8622 8623
			break;
		case 2:
			update_L3L4_header(sp, *lro);
			break;
		case 1:
			aggregate_new_rx(*lro, ip, tcph, *tcp_len);
			if ((*lro)->sg_num == sp->lro_max_aggr_per_sess) {
				update_L3L4_header(sp, *lro);
				ret = 4; /* Flush the LRO */
			}
			break;
		default:
			DBG_PRINT(ERR_DBG,"%s:Dont know, can't say!!\n",
8624
				__func__);
8625 8626 8627 8628 8629 8630
			break;
	}

	return ret;
}

R
Ralf Baechle 已提交
8631
static void clear_lro_session(struct lro *lro)
8632
{
R
Ralf Baechle 已提交
8633
	static u16 lro_struct_size = sizeof(struct lro);
8634 8635 8636 8637

	memset(lro, 0, lro_struct_size);
}

8638
static void queue_rx_frame(struct sk_buff *skb, u16 vlan_tag)
8639 8640
{
	struct net_device *dev = skb->dev;
8641
	struct s2io_nic *sp = netdev_priv(dev);
8642 8643

	skb->protocol = eth_type_trans(skb, dev);
8644
	if (sp->vlgrp && vlan_tag
8645
		&& (sp->vlan_strip_flag)) {
8646 8647 8648 8649 8650 8651 8652 8653 8654 8655 8656
		/* Queueing the vlan frame to the upper layer */
		if (sp->config.napi)
			vlan_hwaccel_receive_skb(skb, sp->vlgrp, vlan_tag);
		else
			vlan_hwaccel_rx(skb, sp->vlgrp, vlan_tag);
	} else {
		if (sp->config.napi)
			netif_receive_skb(skb);
		else
			netif_rx(skb);
	}
8657 8658
}

R
Ralf Baechle 已提交
8659 8660
static void lro_append_pkt(struct s2io_nic *sp, struct lro *lro,
			   struct sk_buff *skb,
8661 8662
			   u32 tcp_len)
{
8663
	struct sk_buff *first = lro->parent;
8664 8665 8666 8667

	first->len += tcp_len;
	first->data_len = lro->frags_len;
	skb_pull(skb, (skb->len - tcp_len));
8668 8669
	if (skb_shinfo(first)->frag_list)
		lro->last_frag->next = skb;
8670 8671
	else
		skb_shinfo(first)->frag_list = skb;
8672
	first->truesize += skb->truesize;
8673
	lro->last_frag = skb;
8674 8675 8676
	sp->mac_control.stats_info->sw_stat.clubbed_frms_cnt++;
	return;
}
8677 8678 8679 8680

/**
 * s2io_io_error_detected - called when PCI error is detected
 * @pdev: Pointer to PCI device
8681
 * @state: The current pci connection state
8682 8683 8684 8685 8686 8687 8688 8689
 *
 * This function is called after a PCI bus error affecting
 * this device has been detected.
 */
static pci_ers_result_t s2io_io_error_detected(struct pci_dev *pdev,
                                               pci_channel_state_t state)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
8690
	struct s2io_nic *sp = netdev_priv(netdev);
8691 8692 8693

	netif_device_detach(netdev);

8694 8695 8696
	if (state == pci_channel_io_perm_failure)
		return PCI_ERS_RESULT_DISCONNECT;

8697 8698 8699 8700 8701 8702 8703 8704 8705 8706 8707 8708 8709 8710 8711 8712 8713 8714 8715 8716 8717
	if (netif_running(netdev)) {
		/* Bring down the card, while avoiding PCI I/O */
		do_s2io_card_down(sp, 0);
	}
	pci_disable_device(pdev);

	return PCI_ERS_RESULT_NEED_RESET;
}

/**
 * s2io_io_slot_reset - called after the pci bus has been reset.
 * @pdev: Pointer to PCI device
 *
 * Restart the card from scratch, as if from a cold-boot.
 * At this point, the card has exprienced a hard reset,
 * followed by fixups by BIOS, and has its config space
 * set up identically to what it was at cold boot.
 */
static pci_ers_result_t s2io_io_slot_reset(struct pci_dev *pdev)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
8718
	struct s2io_nic *sp = netdev_priv(netdev);
8719 8720 8721 8722 8723 8724 8725 8726 8727 8728 8729 8730 8731 8732 8733 8734 8735 8736 8737 8738 8739 8740 8741

	if (pci_enable_device(pdev)) {
		printk(KERN_ERR "s2io: "
		       "Cannot re-enable PCI device after reset.\n");
		return PCI_ERS_RESULT_DISCONNECT;
	}

	pci_set_master(pdev);
	s2io_reset(sp);

	return PCI_ERS_RESULT_RECOVERED;
}

/**
 * s2io_io_resume - called when traffic can start flowing again.
 * @pdev: Pointer to PCI device
 *
 * This callback is called when the error recovery driver tells
 * us that its OK to resume normal operation.
 */
static void s2io_io_resume(struct pci_dev *pdev)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
8742
	struct s2io_nic *sp = netdev_priv(netdev);
8743 8744 8745 8746 8747 8748 8749 8750 8751 8752 8753 8754 8755 8756 8757 8758 8759

	if (netif_running(netdev)) {
		if (s2io_card_up(sp)) {
			printk(KERN_ERR "s2io: "
			       "Can't bring device back up after reset.\n");
			return;
		}

		if (s2io_set_mac_addr(netdev, netdev->dev_addr) == FAILURE) {
			s2io_card_down(sp);
			printk(KERN_ERR "s2io: "
			       "Can't resetore mac addr after reset.\n");
			return;
		}
	}

	netif_device_attach(netdev);
8760
	netif_tx_wake_all_queues(netdev);
8761
}
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