s2io.c 233.1 KB
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/************************************************************************
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 * s2io.c: A Linux PCI-X Ethernet driver for Neterion 10GbE Server NIC
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 * Copyright(c) 2002-2007 Neterion Inc.
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 * This software may be used and distributed according to the terms of
 * the GNU General Public License (GPL), incorporated herein by reference.
 * Drivers based on or derived from this code fall under the GPL and must
 * retain the authorship, copyright and license notice.  This file is not
 * a complete program and may only be used when the entire operating
 * system is licensed under the GPL.
 * See the file COPYING in this distribution for more information.
 *
 * Credits:
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 * Jeff Garzik		: For pointing out the improper error condition
 *			  check in the s2io_xmit routine and also some
 *			  issues in the Tx watch dog function. Also for
 *			  patiently answering all those innumerable
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 *			  questions regaring the 2.6 porting issues.
 * Stephen Hemminger	: Providing proper 2.6 porting mechanism for some
 *			  macros available only in 2.6 Kernel.
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 * Francois Romieu	: For pointing out all code part that were
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 *			  deprecated and also styling related comments.
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 * Grant Grundler	: For helping me get rid of some Architecture
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 *			  dependent code.
 * Christopher Hellwig	: Some more 2.6 specific issues in the driver.
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 *
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 * The module loadable parameters that are supported by the driver and a brief
 * explaination of all the variables.
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 *
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 * rx_ring_num : This can be used to program the number of receive rings used
 * in the driver.
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 * rx_ring_sz: This defines the number of receive blocks each ring can have.
 *     This is also an array of size 8.
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 * rx_ring_mode: This defines the operation mode of all 8 rings. The valid
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 *		values are 1, 2.
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 * tx_fifo_num: This defines the number of Tx FIFOs thats used int the driver.
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 * tx_fifo_len: This too is an array of 8. Each element defines the number of
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 * Tx descriptors that can be associated with each corresponding FIFO.
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 * intr_type: This defines the type of interrupt. The values can be 0(INTA),
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 *     2(MSI_X). Default value is '2(MSI_X)'
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 * lro: Specifies whether to enable Large Receive Offload (LRO) or not.
 *     Possible values '1' for enable '0' for disable. Default is '0'
 * lro_max_pkts: This parameter defines maximum number of packets can be
 *     aggregated as a single large packet
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 * napi: This parameter used to enable/disable NAPI (polling Rx)
 *     Possible values '1' for enable and '0' for disable. Default is '1'
 * ufo: This parameter used to enable/disable UDP Fragmentation Offload(UFO)
 *      Possible values '1' for enable and '0' for disable. Default is '0'
 * vlan_tag_strip: This can be used to enable or disable vlan stripping.
 *                 Possible values '1' for enable , '0' for disable.
 *                 Default is '2' - which means disable in promisc mode
 *                 and enable in non-promiscuous mode.
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 ************************************************************************/

#include <linux/module.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/pci.h>
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#include <linux/dma-mapping.h>
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#include <linux/kernel.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/stddef.h>
#include <linux/ioctl.h>
#include <linux/timex.h>
#include <linux/ethtool.h>
#include <linux/workqueue.h>
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#include <linux/if_vlan.h>
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#include <linux/ip.h>
#include <linux/tcp.h>
#include <net/tcp.h>
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#include <asm/system.h>
#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/div64.h>
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#include <asm/irq.h>
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/* local include */
#include "s2io.h"
#include "s2io-regs.h"

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#define DRV_VERSION "2.0.26.2"
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/* S2io Driver name & version. */
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static char s2io_driver_name[] = "Neterion";
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static char s2io_driver_version[] = DRV_VERSION;
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static int rxd_size[2] = {32,48};
static int rxd_count[2] = {127,85};
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static inline int RXD_IS_UP2DT(struct RxD_t *rxdp)
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{
	int ret;

	ret = ((!(rxdp->Control_1 & RXD_OWN_XENA)) &&
		(GET_RXD_MARKER(rxdp->Control_2) != THE_RXD_MARK));

	return ret;
}

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/*
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 * Cards with following subsystem_id have a link state indication
 * problem, 600B, 600C, 600D, 640B, 640C and 640D.
 * macro below identifies these cards given the subsystem_id.
 */
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#define CARDS_WITH_FAULTY_LINK_INDICATORS(dev_type, subid) \
	(dev_type == XFRAME_I_DEVICE) ?			\
		((((subid >= 0x600B) && (subid <= 0x600D)) || \
		 ((subid >= 0x640B) && (subid <= 0x640D))) ? 1 : 0) : 0
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#define LINK_IS_UP(val64) (!(val64 & (ADAPTER_STATUS_RMAC_REMOTE_FAULT | \
				      ADAPTER_STATUS_RMAC_LOCAL_FAULT)))
#define TASKLET_IN_USE test_and_set_bit(0, (&sp->tasklet_status))
#define PANIC	1
#define LOW	2
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static inline int rx_buffer_level(struct s2io_nic * sp, int rxb_size, int ring)
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{
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	struct mac_info *mac_control;
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	mac_control = &sp->mac_control;
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	if (rxb_size <= rxd_count[sp->rxd_mode])
		return PANIC;
	else if ((mac_control->rings[ring].pkt_cnt - rxb_size) > 16)
		return  LOW;
	return 0;
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}

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static inline int is_s2io_card_up(const struct s2io_nic * sp)
{
	return test_bit(__S2IO_STATE_CARD_UP, &sp->state);
}

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/* Ethtool related variables and Macros. */
static char s2io_gstrings[][ETH_GSTRING_LEN] = {
	"Register test\t(offline)",
	"Eeprom test\t(offline)",
	"Link test\t(online)",
	"RLDRAM test\t(offline)",
	"BIST Test\t(offline)"
};

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static char ethtool_xena_stats_keys[][ETH_GSTRING_LEN] = {
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	{"tmac_frms"},
	{"tmac_data_octets"},
	{"tmac_drop_frms"},
	{"tmac_mcst_frms"},
	{"tmac_bcst_frms"},
	{"tmac_pause_ctrl_frms"},
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	{"tmac_ttl_octets"},
	{"tmac_ucst_frms"},
	{"tmac_nucst_frms"},
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	{"tmac_any_err_frms"},
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	{"tmac_ttl_less_fb_octets"},
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	{"tmac_vld_ip_octets"},
	{"tmac_vld_ip"},
	{"tmac_drop_ip"},
	{"tmac_icmp"},
	{"tmac_rst_tcp"},
	{"tmac_tcp"},
	{"tmac_udp"},
	{"rmac_vld_frms"},
	{"rmac_data_octets"},
	{"rmac_fcs_err_frms"},
	{"rmac_drop_frms"},
	{"rmac_vld_mcst_frms"},
	{"rmac_vld_bcst_frms"},
	{"rmac_in_rng_len_err_frms"},
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	{"rmac_out_rng_len_err_frms"},
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	{"rmac_long_frms"},
	{"rmac_pause_ctrl_frms"},
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	{"rmac_unsup_ctrl_frms"},
	{"rmac_ttl_octets"},
	{"rmac_accepted_ucst_frms"},
	{"rmac_accepted_nucst_frms"},
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	{"rmac_discarded_frms"},
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	{"rmac_drop_events"},
	{"rmac_ttl_less_fb_octets"},
	{"rmac_ttl_frms"},
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	{"rmac_usized_frms"},
	{"rmac_osized_frms"},
	{"rmac_frag_frms"},
	{"rmac_jabber_frms"},
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	{"rmac_ttl_64_frms"},
	{"rmac_ttl_65_127_frms"},
	{"rmac_ttl_128_255_frms"},
	{"rmac_ttl_256_511_frms"},
	{"rmac_ttl_512_1023_frms"},
	{"rmac_ttl_1024_1518_frms"},
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	{"rmac_ip"},
	{"rmac_ip_octets"},
	{"rmac_hdr_err_ip"},
	{"rmac_drop_ip"},
	{"rmac_icmp"},
	{"rmac_tcp"},
	{"rmac_udp"},
	{"rmac_err_drp_udp"},
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	{"rmac_xgmii_err_sym"},
	{"rmac_frms_q0"},
	{"rmac_frms_q1"},
	{"rmac_frms_q2"},
	{"rmac_frms_q3"},
	{"rmac_frms_q4"},
	{"rmac_frms_q5"},
	{"rmac_frms_q6"},
	{"rmac_frms_q7"},
	{"rmac_full_q0"},
	{"rmac_full_q1"},
	{"rmac_full_q2"},
	{"rmac_full_q3"},
	{"rmac_full_q4"},
	{"rmac_full_q5"},
	{"rmac_full_q6"},
	{"rmac_full_q7"},
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	{"rmac_pause_cnt"},
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	{"rmac_xgmii_data_err_cnt"},
	{"rmac_xgmii_ctrl_err_cnt"},
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	{"rmac_accepted_ip"},
	{"rmac_err_tcp"},
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	{"rd_req_cnt"},
	{"new_rd_req_cnt"},
	{"new_rd_req_rtry_cnt"},
	{"rd_rtry_cnt"},
	{"wr_rtry_rd_ack_cnt"},
	{"wr_req_cnt"},
	{"new_wr_req_cnt"},
	{"new_wr_req_rtry_cnt"},
	{"wr_rtry_cnt"},
	{"wr_disc_cnt"},
	{"rd_rtry_wr_ack_cnt"},
	{"txp_wr_cnt"},
	{"txd_rd_cnt"},
	{"txd_wr_cnt"},
	{"rxd_rd_cnt"},
	{"rxd_wr_cnt"},
	{"txf_rd_cnt"},
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	{"rxf_wr_cnt"}
};

static char ethtool_enhanced_stats_keys[][ETH_GSTRING_LEN] = {
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	{"rmac_ttl_1519_4095_frms"},
	{"rmac_ttl_4096_8191_frms"},
	{"rmac_ttl_8192_max_frms"},
	{"rmac_ttl_gt_max_frms"},
	{"rmac_osized_alt_frms"},
	{"rmac_jabber_alt_frms"},
	{"rmac_gt_max_alt_frms"},
	{"rmac_vlan_frms"},
	{"rmac_len_discard"},
	{"rmac_fcs_discard"},
	{"rmac_pf_discard"},
	{"rmac_da_discard"},
	{"rmac_red_discard"},
	{"rmac_rts_discard"},
	{"rmac_ingm_full_discard"},
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	{"link_fault_cnt"}
};

static char ethtool_driver_stats_keys[][ETH_GSTRING_LEN] = {
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	{"\n DRIVER STATISTICS"},
	{"single_bit_ecc_errs"},
	{"double_bit_ecc_errs"},
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	{"parity_err_cnt"},
	{"serious_err_cnt"},
	{"soft_reset_cnt"},
	{"fifo_full_cnt"},
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	{"ring_0_full_cnt"},
	{"ring_1_full_cnt"},
	{"ring_2_full_cnt"},
	{"ring_3_full_cnt"},
	{"ring_4_full_cnt"},
	{"ring_5_full_cnt"},
	{"ring_6_full_cnt"},
	{"ring_7_full_cnt"},
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	("alarm_transceiver_temp_high"),
	("alarm_transceiver_temp_low"),
	("alarm_laser_bias_current_high"),
	("alarm_laser_bias_current_low"),
	("alarm_laser_output_power_high"),
	("alarm_laser_output_power_low"),
	("warn_transceiver_temp_high"),
	("warn_transceiver_temp_low"),
	("warn_laser_bias_current_high"),
	("warn_laser_bias_current_low"),
	("warn_laser_output_power_high"),
	("warn_laser_output_power_low"),
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	("lro_aggregated_pkts"),
	("lro_flush_both_count"),
	("lro_out_of_sequence_pkts"),
	("lro_flush_due_to_max_pkts"),
	("lro_avg_aggr_pkts"),
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	("mem_alloc_fail_cnt"),
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	("pci_map_fail_cnt"),
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	("watchdog_timer_cnt"),
	("mem_allocated"),
	("mem_freed"),
	("link_up_cnt"),
	("link_down_cnt"),
	("link_up_time"),
	("link_down_time"),
	("tx_tcode_buf_abort_cnt"),
	("tx_tcode_desc_abort_cnt"),
	("tx_tcode_parity_err_cnt"),
	("tx_tcode_link_loss_cnt"),
	("tx_tcode_list_proc_err_cnt"),
	("rx_tcode_parity_err_cnt"),
	("rx_tcode_abort_cnt"),
	("rx_tcode_parity_abort_cnt"),
	("rx_tcode_rda_fail_cnt"),
	("rx_tcode_unkn_prot_cnt"),
	("rx_tcode_fcs_err_cnt"),
	("rx_tcode_buf_size_err_cnt"),
	("rx_tcode_rxd_corrupt_cnt"),
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	("rx_tcode_unkn_err_cnt"),
	{"tda_err_cnt"},
	{"pfc_err_cnt"},
	{"pcc_err_cnt"},
	{"tti_err_cnt"},
	{"tpa_err_cnt"},
	{"sm_err_cnt"},
	{"lso_err_cnt"},
	{"mac_tmac_err_cnt"},
	{"mac_rmac_err_cnt"},
	{"xgxs_txgxs_err_cnt"},
	{"xgxs_rxgxs_err_cnt"},
	{"rc_err_cnt"},
	{"prc_pcix_err_cnt"},
	{"rpa_err_cnt"},
	{"rda_err_cnt"},
	{"rti_err_cnt"},
	{"mc_err_cnt"}
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};

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#define S2IO_XENA_STAT_LEN sizeof(ethtool_xena_stats_keys)/ ETH_GSTRING_LEN
#define S2IO_ENHANCED_STAT_LEN sizeof(ethtool_enhanced_stats_keys)/ \
					ETH_GSTRING_LEN
#define S2IO_DRIVER_STAT_LEN sizeof(ethtool_driver_stats_keys)/ ETH_GSTRING_LEN

#define XFRAME_I_STAT_LEN (S2IO_XENA_STAT_LEN + S2IO_DRIVER_STAT_LEN )
#define XFRAME_II_STAT_LEN (XFRAME_I_STAT_LEN + S2IO_ENHANCED_STAT_LEN )

#define XFRAME_I_STAT_STRINGS_LEN ( XFRAME_I_STAT_LEN * ETH_GSTRING_LEN )
#define XFRAME_II_STAT_STRINGS_LEN ( XFRAME_II_STAT_LEN * ETH_GSTRING_LEN )
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#define S2IO_TEST_LEN	sizeof(s2io_gstrings) / ETH_GSTRING_LEN
#define S2IO_STRINGS_LEN	S2IO_TEST_LEN * ETH_GSTRING_LEN

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#define S2IO_TIMER_CONF(timer, handle, arg, exp)		\
			init_timer(&timer);			\
			timer.function = handle;		\
			timer.data = (unsigned long) arg;	\
			mod_timer(&timer, (jiffies + exp))	\

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/* Add the vlan */
static void s2io_vlan_rx_register(struct net_device *dev,
					struct vlan_group *grp)
{
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	struct s2io_nic *nic = dev->priv;
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	unsigned long flags;

	spin_lock_irqsave(&nic->tx_lock, flags);
	nic->vlgrp = grp;
	spin_unlock_irqrestore(&nic->tx_lock, flags);
}

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/* A flag indicating whether 'RX_PA_CFG_STRIP_VLAN_TAG' bit is set or not */
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static int vlan_strip_flag;
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/*
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 * Constants to be programmed into the Xena's registers, to configure
 * the XAUI.
 */

#define	END_SIGN	0x0
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static const u64 herc_act_dtx_cfg[] = {
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	/* Set address */
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	0x8000051536750000ULL, 0x80000515367500E0ULL,
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	/* Write data */
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	0x8000051536750004ULL, 0x80000515367500E4ULL,
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	/* Set address */
	0x80010515003F0000ULL, 0x80010515003F00E0ULL,
	/* Write data */
	0x80010515003F0004ULL, 0x80010515003F00E4ULL,
	/* Set address */
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	0x801205150D440000ULL, 0x801205150D4400E0ULL,
	/* Write data */
	0x801205150D440004ULL, 0x801205150D4400E4ULL,
	/* Set address */
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	0x80020515F2100000ULL, 0x80020515F21000E0ULL,
	/* Write data */
	0x80020515F2100004ULL, 0x80020515F21000E4ULL,
	/* Done */
	END_SIGN
};

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static const u64 xena_dtx_cfg[] = {
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	/* Set address */
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	0x8000051500000000ULL, 0x80000515000000E0ULL,
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	/* Write data */
	0x80000515D9350004ULL, 0x80000515D93500E4ULL,
	/* Set address */
	0x8001051500000000ULL, 0x80010515000000E0ULL,
	/* Write data */
	0x80010515001E0004ULL, 0x80010515001E00E4ULL,
	/* Set address */
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	0x8002051500000000ULL, 0x80020515000000E0ULL,
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	/* Write data */
	0x80020515F2100004ULL, 0x80020515F21000E4ULL,
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	END_SIGN
};

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/*
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 * Constants for Fixing the MacAddress problem seen mostly on
 * Alpha machines.
 */
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static const u64 fix_mac[] = {
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	0x0060000000000000ULL, 0x0060600000000000ULL,
	0x0040600000000000ULL, 0x0000600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0000600000000000ULL,
	0x0040600000000000ULL, 0x0060600000000000ULL,
	END_SIGN
};

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MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);


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/* Module Loadable parameters. */
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S2IO_PARM_INT(tx_fifo_num, 1);
S2IO_PARM_INT(rx_ring_num, 1);


S2IO_PARM_INT(rx_ring_mode, 1);
S2IO_PARM_INT(use_continuous_tx_intrs, 1);
S2IO_PARM_INT(rmac_pause_time, 0x100);
S2IO_PARM_INT(mc_pause_threshold_q0q3, 187);
S2IO_PARM_INT(mc_pause_threshold_q4q7, 187);
S2IO_PARM_INT(shared_splits, 0);
S2IO_PARM_INT(tmac_util_period, 5);
S2IO_PARM_INT(rmac_util_period, 5);
S2IO_PARM_INT(bimodal, 0);
S2IO_PARM_INT(l3l4hdr_size, 128);
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/* Frequency of Rx desc syncs expressed as power of 2 */
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S2IO_PARM_INT(rxsync_frequency, 3);
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/* Interrupt type. Values can be 0(INTA), 2(MSI_X) */
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S2IO_PARM_INT(intr_type, 2);
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/* Large receive offload feature */
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S2IO_PARM_INT(lro, 0);
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/* Max pkts to be aggregated by LRO at one time. If not specified,
 * aggregation happens until we hit max IP pkt size(64K)
 */
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S2IO_PARM_INT(lro_max_pkts, 0xFFFF);
S2IO_PARM_INT(indicate_max_pkts, 0);
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S2IO_PARM_INT(napi, 1);
S2IO_PARM_INT(ufo, 0);
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S2IO_PARM_INT(vlan_tag_strip, NO_STRIP_IN_PROMISC);
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static unsigned int tx_fifo_len[MAX_TX_FIFOS] =
    {DEFAULT_FIFO_0_LEN, [1 ...(MAX_TX_FIFOS - 1)] = DEFAULT_FIFO_1_7_LEN};
static unsigned int rx_ring_sz[MAX_RX_RINGS] =
    {[0 ...(MAX_RX_RINGS - 1)] = SMALL_BLK_CNT};
static unsigned int rts_frm_len[MAX_RX_RINGS] =
    {[0 ...(MAX_RX_RINGS - 1)] = 0 };

module_param_array(tx_fifo_len, uint, NULL, 0);
module_param_array(rx_ring_sz, uint, NULL, 0);
module_param_array(rts_frm_len, uint, NULL, 0);
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/*
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 * S2IO device table.
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 * This table lists all the devices that this driver supports.
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 */
static struct pci_device_id s2io_tbl[] __devinitdata = {
	{PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_WIN,
	 PCI_ANY_ID, PCI_ANY_ID},
	{PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_UNI,
	 PCI_ANY_ID, PCI_ANY_ID},
	{PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_WIN,
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         PCI_ANY_ID, PCI_ANY_ID},
        {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_UNI,
         PCI_ANY_ID, PCI_ANY_ID},
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	{0,}
};

MODULE_DEVICE_TABLE(pci, s2io_tbl);

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static struct pci_error_handlers s2io_err_handler = {
	.error_detected = s2io_io_error_detected,
	.slot_reset = s2io_io_slot_reset,
	.resume = s2io_io_resume,
};

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static struct pci_driver s2io_driver = {
      .name = "S2IO",
      .id_table = s2io_tbl,
      .probe = s2io_init_nic,
      .remove = __devexit_p(s2io_rem_nic),
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      .err_handler = &s2io_err_handler,
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};

/* A simplifier macro used both by init and free shared_mem Fns(). */
#define TXD_MEM_PAGE_CNT(len, per_each) ((len+per_each - 1) / per_each)

/**
 * init_shared_mem - Allocation and Initialization of Memory
 * @nic: Device private variable.
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 * Description: The function allocates all the memory areas shared
 * between the NIC and the driver. This includes Tx descriptors,
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 * Rx descriptors and the statistics block.
 */

static int init_shared_mem(struct s2io_nic *nic)
{
	u32 size;
	void *tmp_v_addr, *tmp_v_addr_next;
	dma_addr_t tmp_p_addr, tmp_p_addr_next;
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	struct RxD_block *pre_rxd_blk = NULL;
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	int i, j, blk_cnt;
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	int lst_size, lst_per_page;
	struct net_device *dev = nic->dev;
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	unsigned long tmp;
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	struct buffAdd *ba;
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	struct mac_info *mac_control;
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	struct config_param *config;
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	unsigned long long mem_allocated = 0;
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	mac_control = &nic->mac_control;
	config = &nic->config;


	/* Allocation and initialization of TXDLs in FIOFs */
	size = 0;
	for (i = 0; i < config->tx_fifo_num; i++) {
		size += config->tx_cfg[i].fifo_len;
	}
	if (size > MAX_AVAILABLE_TXDS) {
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		DBG_PRINT(ERR_DBG, "s2io: Requested TxDs too high, ");
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		DBG_PRINT(ERR_DBG, "Requested: %d, max supported: 8192\n", size);
555
		return -EINVAL;
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	}

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	lst_size = (sizeof(struct TxD) * config->max_txds);
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	lst_per_page = PAGE_SIZE / lst_size;

	for (i = 0; i < config->tx_fifo_num; i++) {
		int fifo_len = config->tx_cfg[i].fifo_len;
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		int list_holder_size = fifo_len * sizeof(struct list_info_hold);
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		mac_control->fifos[i].list_info = kzalloc(list_holder_size,
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							  GFP_KERNEL);
		if (!mac_control->fifos[i].list_info) {
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			DBG_PRINT(INFO_DBG,
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				  "Malloc failed for list_info\n");
			return -ENOMEM;
		}
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		mem_allocated += list_holder_size;
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	}
	for (i = 0; i < config->tx_fifo_num; i++) {
		int page_num = TXD_MEM_PAGE_CNT(config->tx_cfg[i].fifo_len,
						lst_per_page);
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		mac_control->fifos[i].tx_curr_put_info.offset = 0;
		mac_control->fifos[i].tx_curr_put_info.fifo_len =
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		    config->tx_cfg[i].fifo_len - 1;
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		mac_control->fifos[i].tx_curr_get_info.offset = 0;
		mac_control->fifos[i].tx_curr_get_info.fifo_len =
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		    config->tx_cfg[i].fifo_len - 1;
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		mac_control->fifos[i].fifo_no = i;
		mac_control->fifos[i].nic = nic;
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		mac_control->fifos[i].max_txds = MAX_SKB_FRAGS + 2;
585

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		for (j = 0; j < page_num; j++) {
			int k = 0;
			dma_addr_t tmp_p;
			void *tmp_v;
			tmp_v = pci_alloc_consistent(nic->pdev,
						     PAGE_SIZE, &tmp_p);
			if (!tmp_v) {
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				DBG_PRINT(INFO_DBG,
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					  "pci_alloc_consistent ");
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				DBG_PRINT(INFO_DBG, "failed for TxDL\n");
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				return -ENOMEM;
			}
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			/* If we got a zero DMA address(can happen on
			 * certain platforms like PPC), reallocate.
			 * Store virtual address of page we don't want,
			 * to be freed later.
			 */
			if (!tmp_p) {
				mac_control->zerodma_virt_addr = tmp_v;
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				DBG_PRINT(INIT_DBG,
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				"%s: Zero DMA address for TxDL. ", dev->name);
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				DBG_PRINT(INIT_DBG,
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				"Virtual address %p\n", tmp_v);
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				tmp_v = pci_alloc_consistent(nic->pdev,
						     PAGE_SIZE, &tmp_p);
				if (!tmp_v) {
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					DBG_PRINT(INFO_DBG,
613
					  "pci_alloc_consistent ");
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					DBG_PRINT(INFO_DBG, "failed for TxDL\n");
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					return -ENOMEM;
				}
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				mem_allocated += PAGE_SIZE;
618
			}
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			while (k < lst_per_page) {
				int l = (j * lst_per_page) + k;
				if (l == config->tx_cfg[i].fifo_len)
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					break;
				mac_control->fifos[i].list_info[l].list_virt_addr =
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				    tmp_v + (k * lst_size);
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				mac_control->fifos[i].list_info[l].list_phy_addr =
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				    tmp_p + (k * lst_size);
				k++;
			}
		}
	}

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	nic->ufo_in_band_v = kcalloc(size, sizeof(u64), GFP_KERNEL);
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	if (!nic->ufo_in_band_v)
		return -ENOMEM;
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	 mem_allocated += (size * sizeof(u64));
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	/* Allocation and initialization of RXDs in Rings */
	size = 0;
	for (i = 0; i < config->rx_ring_num; i++) {
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		if (config->rx_cfg[i].num_rxd %
		    (rxd_count[nic->rxd_mode] + 1)) {
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			DBG_PRINT(ERR_DBG, "%s: RxD count of ", dev->name);
			DBG_PRINT(ERR_DBG, "Ring%d is not a multiple of ",
				  i);
			DBG_PRINT(ERR_DBG, "RxDs per Block");
			return FAILURE;
		}
		size += config->rx_cfg[i].num_rxd;
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		mac_control->rings[i].block_count =
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			config->rx_cfg[i].num_rxd /
			(rxd_count[nic->rxd_mode] + 1 );
		mac_control->rings[i].pkt_cnt = config->rx_cfg[i].num_rxd -
			mac_control->rings[i].block_count;
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	}
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	if (nic->rxd_mode == RXD_MODE_1)
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		size = (size * (sizeof(struct RxD1)));
657
	else
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		size = (size * (sizeof(struct RxD3)));
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	for (i = 0; i < config->rx_ring_num; i++) {
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		mac_control->rings[i].rx_curr_get_info.block_index = 0;
		mac_control->rings[i].rx_curr_get_info.offset = 0;
		mac_control->rings[i].rx_curr_get_info.ring_len =
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		    config->rx_cfg[i].num_rxd - 1;
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		mac_control->rings[i].rx_curr_put_info.block_index = 0;
		mac_control->rings[i].rx_curr_put_info.offset = 0;
		mac_control->rings[i].rx_curr_put_info.ring_len =
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		    config->rx_cfg[i].num_rxd - 1;
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		mac_control->rings[i].nic = nic;
		mac_control->rings[i].ring_no = i;

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		blk_cnt = config->rx_cfg[i].num_rxd /
				(rxd_count[nic->rxd_mode] + 1);
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		/*  Allocating all the Rx blocks */
		for (j = 0; j < blk_cnt; j++) {
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			struct rx_block_info *rx_blocks;
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			int l;

			rx_blocks = &mac_control->rings[i].rx_blocks[j];
			size = SIZE_OF_BLOCK; //size is always page size
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			tmp_v_addr = pci_alloc_consistent(nic->pdev, size,
							  &tmp_p_addr);
			if (tmp_v_addr == NULL) {
				/*
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				 * In case of failure, free_shared_mem()
				 * is called, which should free any
				 * memory that was alloced till the
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				 * failure happened.
				 */
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				rx_blocks->block_virt_addr = tmp_v_addr;
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				return -ENOMEM;
			}
693
			mem_allocated += size;
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			memset(tmp_v_addr, 0, size);
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			rx_blocks->block_virt_addr = tmp_v_addr;
			rx_blocks->block_dma_addr = tmp_p_addr;
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			rx_blocks->rxds = kmalloc(sizeof(struct rxd_info)*
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						  rxd_count[nic->rxd_mode],
						  GFP_KERNEL);
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			if (!rx_blocks->rxds)
				return -ENOMEM;
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			mem_allocated += 
			(sizeof(struct rxd_info)* rxd_count[nic->rxd_mode]);
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			for (l=0; l<rxd_count[nic->rxd_mode];l++) {
				rx_blocks->rxds[l].virt_addr =
					rx_blocks->block_virt_addr +
					(rxd_size[nic->rxd_mode] * l);
				rx_blocks->rxds[l].dma_addr =
					rx_blocks->block_dma_addr +
					(rxd_size[nic->rxd_mode] * l);
			}
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		}
		/* Interlinking all Rx Blocks */
		for (j = 0; j < blk_cnt; j++) {
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			tmp_v_addr =
				mac_control->rings[i].rx_blocks[j].block_virt_addr;
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			tmp_v_addr_next =
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				mac_control->rings[i].rx_blocks[(j + 1) %
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					      blk_cnt].block_virt_addr;
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			tmp_p_addr =
				mac_control->rings[i].rx_blocks[j].block_dma_addr;
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			tmp_p_addr_next =
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				mac_control->rings[i].rx_blocks[(j + 1) %
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					      blk_cnt].block_dma_addr;

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			pre_rxd_blk = (struct RxD_block *) tmp_v_addr;
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			pre_rxd_blk->reserved_2_pNext_RxD_block =
			    (unsigned long) tmp_v_addr_next;
			pre_rxd_blk->pNext_RxD_Blk_physical =
			    (u64) tmp_p_addr_next;
		}
	}
733
	if (nic->rxd_mode == RXD_MODE_3B) {
734 735 736 737 738 739 740 741
		/*
		 * Allocation of Storages for buffer addresses in 2BUFF mode
		 * and the buffers as well.
		 */
		for (i = 0; i < config->rx_ring_num; i++) {
			blk_cnt = config->rx_cfg[i].num_rxd /
			   (rxd_count[nic->rxd_mode]+ 1);
			mac_control->rings[i].ba =
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				kmalloc((sizeof(struct buffAdd *) * blk_cnt),
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				     GFP_KERNEL);
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			if (!mac_control->rings[i].ba)
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				return -ENOMEM;
746
			mem_allocated +=(sizeof(struct buffAdd *) * blk_cnt);
747 748 749
			for (j = 0; j < blk_cnt; j++) {
				int k = 0;
				mac_control->rings[i].ba[j] =
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					kmalloc((sizeof(struct buffAdd) *
751 752 753
						(rxd_count[nic->rxd_mode] + 1)),
						GFP_KERNEL);
				if (!mac_control->rings[i].ba[j])
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					return -ENOMEM;
755 756
				mem_allocated += (sizeof(struct buffAdd) *  \
					(rxd_count[nic->rxd_mode] + 1));
757 758 759 760 761 762 763
				while (k != rxd_count[nic->rxd_mode]) {
					ba = &mac_control->rings[i].ba[j][k];

					ba->ba_0_org = (void *) kmalloc
					    (BUF0_LEN + ALIGN_SIZE, GFP_KERNEL);
					if (!ba->ba_0_org)
						return -ENOMEM;
764 765
					mem_allocated += 
						(BUF0_LEN + ALIGN_SIZE);
766 767 768 769 770 771 772 773 774
					tmp = (unsigned long)ba->ba_0_org;
					tmp += ALIGN_SIZE;
					tmp &= ~((unsigned long) ALIGN_SIZE);
					ba->ba_0 = (void *) tmp;

					ba->ba_1_org = (void *) kmalloc
					    (BUF1_LEN + ALIGN_SIZE, GFP_KERNEL);
					if (!ba->ba_1_org)
						return -ENOMEM;
775 776
					mem_allocated 
						+= (BUF1_LEN + ALIGN_SIZE);
777 778 779 780 781 782
					tmp = (unsigned long) ba->ba_1_org;
					tmp += ALIGN_SIZE;
					tmp &= ~((unsigned long) ALIGN_SIZE);
					ba->ba_1 = (void *) tmp;
					k++;
				}
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			}
		}
	}

	/* Allocation and initialization of Statistics block */
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	size = sizeof(struct stat_block);
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	mac_control->stats_mem = pci_alloc_consistent
	    (nic->pdev, size, &mac_control->stats_mem_phy);

	if (!mac_control->stats_mem) {
793 794 795
		/*
		 * In case of failure, free_shared_mem() is called, which
		 * should free any memory that was alloced till the
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		 * failure happened.
		 */
		return -ENOMEM;
	}
800
	mem_allocated += size;
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	mac_control->stats_mem_sz = size;

	tmp_v_addr = mac_control->stats_mem;
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	mac_control->stats_info = (struct stat_block *) tmp_v_addr;
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	memset(tmp_v_addr, 0, size);
	DBG_PRINT(INIT_DBG, "%s:Ring Mem PHY: 0x%llx\n", dev->name,
		  (unsigned long long) tmp_p_addr);
808
	mac_control->stats_info->sw_stat.mem_allocated += mem_allocated;
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	return SUCCESS;
}

812 813
/**
 * free_shared_mem - Free the allocated Memory
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 * @nic:  Device private variable.
 * Description: This function is to free all memory locations allocated by
 * the init_shared_mem() function and return it to the kernel.
 */

static void free_shared_mem(struct s2io_nic *nic)
{
	int i, j, blk_cnt, size;
822
	u32 ufo_size = 0;
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	void *tmp_v_addr;
	dma_addr_t tmp_p_addr;
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	struct mac_info *mac_control;
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	struct config_param *config;
	int lst_size, lst_per_page;
828
	struct net_device *dev;
829
	int page_num = 0;
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	if (!nic)
		return;

834 835
	dev = nic->dev;

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	mac_control = &nic->mac_control;
	config = &nic->config;

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	lst_size = (sizeof(struct TxD) * config->max_txds);
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	lst_per_page = PAGE_SIZE / lst_size;

	for (i = 0; i < config->tx_fifo_num; i++) {
843 844 845
		ufo_size += config->tx_cfg[i].fifo_len;
		page_num = TXD_MEM_PAGE_CNT(config->tx_cfg[i].fifo_len,
							lst_per_page);
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		for (j = 0; j < page_num; j++) {
			int mem_blks = (j * lst_per_page);
848
			if (!mac_control->fifos[i].list_info)
849
				return;
850 851
			if (!mac_control->fifos[i].list_info[mem_blks].
				 list_virt_addr)
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				break;
			pci_free_consistent(nic->pdev, PAGE_SIZE,
854 855
					    mac_control->fifos[i].
					    list_info[mem_blks].
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					    list_virt_addr,
857 858
					    mac_control->fifos[i].
					    list_info[mem_blks].
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					    list_phy_addr);
860 861
			nic->mac_control.stats_info->sw_stat.mem_freed 
						+= PAGE_SIZE;
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		}
863 864 865 866 867 868 869
		/* If we got a zero DMA address during allocation,
		 * free the page now
		 */
		if (mac_control->zerodma_virt_addr) {
			pci_free_consistent(nic->pdev, PAGE_SIZE,
					    mac_control->zerodma_virt_addr,
					    (dma_addr_t)0);
870
			DBG_PRINT(INIT_DBG,
871 872 873 874
			  	"%s: Freeing TxDL with zero DMA addr. ",
				dev->name);
			DBG_PRINT(INIT_DBG, "Virtual address %p\n",
				mac_control->zerodma_virt_addr);
875 876
			nic->mac_control.stats_info->sw_stat.mem_freed 
						+= PAGE_SIZE;
877
		}
878
		kfree(mac_control->fifos[i].list_info);
879 880
		nic->mac_control.stats_info->sw_stat.mem_freed += 
		(nic->config.tx_cfg[i].fifo_len *sizeof(struct list_info_hold));
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	}

	size = SIZE_OF_BLOCK;
	for (i = 0; i < config->rx_ring_num; i++) {
885
		blk_cnt = mac_control->rings[i].block_count;
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		for (j = 0; j < blk_cnt; j++) {
887 888 889 890
			tmp_v_addr = mac_control->rings[i].rx_blocks[j].
				block_virt_addr;
			tmp_p_addr = mac_control->rings[i].rx_blocks[j].
				block_dma_addr;
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			if (tmp_v_addr == NULL)
				break;
			pci_free_consistent(nic->pdev, size,
					    tmp_v_addr, tmp_p_addr);
895
			nic->mac_control.stats_info->sw_stat.mem_freed += size;
896
			kfree(mac_control->rings[i].rx_blocks[j].rxds);
897 898
			nic->mac_control.stats_info->sw_stat.mem_freed += 
			( sizeof(struct rxd_info)* rxd_count[nic->rxd_mode]);
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		}
	}

902
	if (nic->rxd_mode == RXD_MODE_3B) {
903 904 905 906 907 908 909 910 911
		/* Freeing buffer storage addresses in 2BUFF mode. */
		for (i = 0; i < config->rx_ring_num; i++) {
			blk_cnt = config->rx_cfg[i].num_rxd /
			    (rxd_count[nic->rxd_mode] + 1);
			for (j = 0; j < blk_cnt; j++) {
				int k = 0;
				if (!mac_control->rings[i].ba[j])
					continue;
				while (k != rxd_count[nic->rxd_mode]) {
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					struct buffAdd *ba =
913 914
						&mac_control->rings[i].ba[j][k];
					kfree(ba->ba_0_org);
915 916
					nic->mac_control.stats_info->sw_stat.\
					mem_freed += (BUF0_LEN + ALIGN_SIZE);
917
					kfree(ba->ba_1_org);
918 919
					nic->mac_control.stats_info->sw_stat.\
					mem_freed += (BUF1_LEN + ALIGN_SIZE);
920 921 922
					k++;
				}
				kfree(mac_control->rings[i].ba[j]);
923 924 925
				nic->mac_control.stats_info->sw_stat.mem_freed +=
					(sizeof(struct buffAdd) *
					(rxd_count[nic->rxd_mode] + 1));
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			}
927
			kfree(mac_control->rings[i].ba);
928 929
			nic->mac_control.stats_info->sw_stat.mem_freed += 
			(sizeof(struct buffAdd *) * blk_cnt);
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		}
	}

	if (mac_control->stats_mem) {
		pci_free_consistent(nic->pdev,
				    mac_control->stats_mem_sz,
				    mac_control->stats_mem,
				    mac_control->stats_mem_phy);
938 939
		nic->mac_control.stats_info->sw_stat.mem_freed += 
			mac_control->stats_mem_sz;
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	}
941
	if (nic->ufo_in_band_v) {
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		kfree(nic->ufo_in_band_v);
943 944 945
		nic->mac_control.stats_info->sw_stat.mem_freed 
			+= (ufo_size * sizeof(u64));
	}
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}

948 949 950 951
/**
 * s2io_verify_pci_mode -
 */

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static int s2io_verify_pci_mode(struct s2io_nic *nic)
953
{
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	struct XENA_dev_config __iomem *bar0 = nic->bar0;
955 956 957 958 959 960 961 962 963 964 965
	register u64 val64 = 0;
	int     mode;

	val64 = readq(&bar0->pci_mode);
	mode = (u8)GET_PCI_MODE(val64);

	if ( val64 & PCI_MODE_UNKNOWN_MODE)
		return -1;      /* Unknown PCI mode */
	return mode;
}

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#define NEC_VENID   0x1033
#define NEC_DEVID   0x0125
static int s2io_on_nec_bridge(struct pci_dev *s2io_pdev)
{
	struct pci_dev *tdev = NULL;
971 972
	while ((tdev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, tdev)) != NULL) {
		if (tdev->vendor == NEC_VENID && tdev->device == NEC_DEVID) {
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			if (tdev->bus == s2io_pdev->bus->parent)
974
				pci_dev_put(tdev);
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				return 1;
		}
	}
	return 0;
}
980

981
static int bus_speed[8] = {33, 133, 133, 200, 266, 133, 200, 266};
982 983 984
/**
 * s2io_print_pci_mode -
 */
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static int s2io_print_pci_mode(struct s2io_nic *nic)
986
{
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	struct XENA_dev_config __iomem *bar0 = nic->bar0;
988 989 990 991 992 993 994 995 996 997
	register u64 val64 = 0;
	int	mode;
	struct config_param *config = &nic->config;

	val64 = readq(&bar0->pci_mode);
	mode = (u8)GET_PCI_MODE(val64);

	if ( val64 & PCI_MODE_UNKNOWN_MODE)
		return -1;	/* Unknown PCI mode */

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	config->bus_speed = bus_speed[mode];

	if (s2io_on_nec_bridge(nic->pdev)) {
		DBG_PRINT(ERR_DBG, "%s: Device is on PCI-E bus\n",
							nic->dev->name);
		return mode;
	}

1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043
	if (val64 & PCI_MODE_32_BITS) {
		DBG_PRINT(ERR_DBG, "%s: Device is on 32 bit ", nic->dev->name);
	} else {
		DBG_PRINT(ERR_DBG, "%s: Device is on 64 bit ", nic->dev->name);
	}

	switch(mode) {
		case PCI_MODE_PCI_33:
			DBG_PRINT(ERR_DBG, "33MHz PCI bus\n");
			break;
		case PCI_MODE_PCI_66:
			DBG_PRINT(ERR_DBG, "66MHz PCI bus\n");
			break;
		case PCI_MODE_PCIX_M1_66:
			DBG_PRINT(ERR_DBG, "66MHz PCIX(M1) bus\n");
			break;
		case PCI_MODE_PCIX_M1_100:
			DBG_PRINT(ERR_DBG, "100MHz PCIX(M1) bus\n");
			break;
		case PCI_MODE_PCIX_M1_133:
			DBG_PRINT(ERR_DBG, "133MHz PCIX(M1) bus\n");
			break;
		case PCI_MODE_PCIX_M2_66:
			DBG_PRINT(ERR_DBG, "133MHz PCIX(M2) bus\n");
			break;
		case PCI_MODE_PCIX_M2_100:
			DBG_PRINT(ERR_DBG, "200MHz PCIX(M2) bus\n");
			break;
		case PCI_MODE_PCIX_M2_133:
			DBG_PRINT(ERR_DBG, "266MHz PCIX(M2) bus\n");
			break;
		default:
			return -1;	/* Unsupported bus speed */
	}

	return mode;
}

1044 1045
/**
 *  init_nic - Initialization of hardware
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 *  @nic: device peivate variable
1047 1048 1049
 *  Description: The function sequentially configures every block
 *  of the H/W from their reset values.
 *  Return Value:  SUCCESS on success and
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 *  '-1' on failure (endian settings incorrect).
 */

static int init_nic(struct s2io_nic *nic)
{
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	struct XENA_dev_config __iomem *bar0 = nic->bar0;
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	struct net_device *dev = nic->dev;
	register u64 val64 = 0;
	void __iomem *add;
	u32 time;
	int i, j;
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	struct mac_info *mac_control;
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	struct config_param *config;
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	int dtx_cnt = 0;
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	unsigned long long mem_share;
1065
	int mem_size;
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	mac_control = &nic->mac_control;
	config = &nic->config;

1070
	/* to set the swapper controle on the card */
1071
	if(s2io_set_swapper(nic)) {
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		DBG_PRINT(ERR_DBG,"ERROR: Setting Swapper failed\n");
		return -1;
	}

1076 1077 1078 1079 1080 1081 1082 1083 1084 1085
	/*
	 * Herc requires EOI to be removed from reset before XGXS, so..
	 */
	if (nic->device_type & XFRAME_II_DEVICE) {
		val64 = 0xA500000000ULL;
		writeq(val64, &bar0->sw_reset);
		msleep(500);
		val64 = readq(&bar0->sw_reset);
	}

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	/* Remove XGXS from reset state */
	val64 = 0;
	writeq(val64, &bar0->sw_reset);
	msleep(500);
1090
	val64 = readq(&bar0->sw_reset);
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	/*  Enable Receiving broadcasts */
	add = &bar0->mac_cfg;
	val64 = readq(&bar0->mac_cfg);
	val64 |= MAC_RMAC_BCAST_ENABLE;
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) val64, add);
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) (val64 >> 32), (add + 4));

	/* Read registers in all blocks */
	val64 = readq(&bar0->mac_int_mask);
	val64 = readq(&bar0->mc_int_mask);
	val64 = readq(&bar0->xgxs_int_mask);

	/*  Set MTU */
	val64 = dev->mtu;
	writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);

1110 1111
	if (nic->device_type & XFRAME_II_DEVICE) {
		while (herc_act_dtx_cfg[dtx_cnt] != END_SIGN) {
1112
			SPECIAL_REG_WRITE(herc_act_dtx_cfg[dtx_cnt],
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					  &bar0->dtx_control, UF);
1114 1115
			if (dtx_cnt & 0x1)
				msleep(1); /* Necessary!! */
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			dtx_cnt++;
		}
1118
	} else {
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		while (xena_dtx_cfg[dtx_cnt] != END_SIGN) {
			SPECIAL_REG_WRITE(xena_dtx_cfg[dtx_cnt],
					  &bar0->dtx_control, UF);
			val64 = readq(&bar0->dtx_control);
			dtx_cnt++;
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		}
	}

	/*  Tx DMA Initialization */
	val64 = 0;
	writeq(val64, &bar0->tx_fifo_partition_0);
	writeq(val64, &bar0->tx_fifo_partition_1);
	writeq(val64, &bar0->tx_fifo_partition_2);
	writeq(val64, &bar0->tx_fifo_partition_3);


	for (i = 0, j = 0; i < config->tx_fifo_num; i++) {
		val64 |=
		    vBIT(config->tx_cfg[i].fifo_len - 1, ((i * 32) + 19),
			 13) | vBIT(config->tx_cfg[i].fifo_priority,
				    ((i * 32) + 5), 3);

		if (i == (config->tx_fifo_num - 1)) {
			if (i % 2 == 0)
				i++;
		}

		switch (i) {
		case 1:
			writeq(val64, &bar0->tx_fifo_partition_0);
			val64 = 0;
			break;
		case 3:
			writeq(val64, &bar0->tx_fifo_partition_1);
			val64 = 0;
			break;
		case 5:
			writeq(val64, &bar0->tx_fifo_partition_2);
			val64 = 0;
			break;
		case 7:
			writeq(val64, &bar0->tx_fifo_partition_3);
			break;
		}
	}

1165 1166 1167 1168
	/*
	 * Disable 4 PCCs for Xena1, 2 and 3 as per H/W bug
	 * SXE-008 TRANSMIT DMA ARBITRATION ISSUE.
	 */
1169
	if ((nic->device_type == XFRAME_I_DEVICE) &&
1170
		(nic->pdev->revision < 4))
1171 1172
		writeq(PCC_ENABLE_FOUR, &bar0->pcc_enable);

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	val64 = readq(&bar0->tx_fifo_partition_0);
	DBG_PRINT(INIT_DBG, "Fifo partition at: 0x%p is: 0x%llx\n",
		  &bar0->tx_fifo_partition_0, (unsigned long long) val64);

1177 1178
	/*
	 * Initialization of Tx_PA_CONFIG register to ignore packet
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	 * integrity checking.
	 */
	val64 = readq(&bar0->tx_pa_cfg);
	val64 |= TX_PA_CFG_IGNORE_FRM_ERR | TX_PA_CFG_IGNORE_SNAP_OUI |
	    TX_PA_CFG_IGNORE_LLC_CTRL | TX_PA_CFG_IGNORE_L2_ERR;
	writeq(val64, &bar0->tx_pa_cfg);

	/* Rx DMA intialization. */
	val64 = 0;
	for (i = 0; i < config->rx_ring_num; i++) {
		val64 |=
		    vBIT(config->rx_cfg[i].ring_priority, (5 + (i * 8)),
			 3);
	}
	writeq(val64, &bar0->rx_queue_priority);

1195 1196
	/*
	 * Allocating equal share of memory to all the
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	 * configured Rings.
	 */
	val64 = 0;
1200 1201 1202 1203 1204
	if (nic->device_type & XFRAME_II_DEVICE)
		mem_size = 32;
	else
		mem_size = 64;

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	for (i = 0; i < config->rx_ring_num; i++) {
		switch (i) {
		case 0:
1208 1209
			mem_share = (mem_size / config->rx_ring_num +
				     mem_size % config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q0_SZ(mem_share);
			continue;
		case 1:
1213
			mem_share = (mem_size / config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q1_SZ(mem_share);
			continue;
		case 2:
1217
			mem_share = (mem_size / config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q2_SZ(mem_share);
			continue;
		case 3:
1221
			mem_share = (mem_size / config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q3_SZ(mem_share);
			continue;
		case 4:
1225
			mem_share = (mem_size / config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q4_SZ(mem_share);
			continue;
		case 5:
1229
			mem_share = (mem_size / config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q5_SZ(mem_share);
			continue;
		case 6:
1233
			mem_share = (mem_size / config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q6_SZ(mem_share);
			continue;
		case 7:
1237
			mem_share = (mem_size / config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q7_SZ(mem_share);
			continue;
		}
	}
	writeq(val64, &bar0->rx_queue_cfg);

1244
	/*
1245 1246
	 * Filling Tx round robin registers
	 * as per the number of FIFOs
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	 */
1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342
	switch (config->tx_fifo_num) {
	case 1:
		val64 = 0x0000000000000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		writeq(val64, &bar0->tx_w_round_robin_1);
		writeq(val64, &bar0->tx_w_round_robin_2);
		writeq(val64, &bar0->tx_w_round_robin_3);
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 2:
		val64 = 0x0000010000010000ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		val64 = 0x0100000100000100ULL;
		writeq(val64, &bar0->tx_w_round_robin_1);
		val64 = 0x0001000001000001ULL;
		writeq(val64, &bar0->tx_w_round_robin_2);
		val64 = 0x0000010000010000ULL;
		writeq(val64, &bar0->tx_w_round_robin_3);
		val64 = 0x0100000000000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 3:
		val64 = 0x0001000102000001ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		val64 = 0x0001020000010001ULL;
		writeq(val64, &bar0->tx_w_round_robin_1);
		val64 = 0x0200000100010200ULL;
		writeq(val64, &bar0->tx_w_round_robin_2);
		val64 = 0x0001000102000001ULL;
		writeq(val64, &bar0->tx_w_round_robin_3);
		val64 = 0x0001020000000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 4:
		val64 = 0x0001020300010200ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		val64 = 0x0100000102030001ULL;
		writeq(val64, &bar0->tx_w_round_robin_1);
		val64 = 0x0200010000010203ULL;
		writeq(val64, &bar0->tx_w_round_robin_2);
		val64 = 0x0001020001000001ULL;
		writeq(val64, &bar0->tx_w_round_robin_3);
		val64 = 0x0203000100000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 5:
		val64 = 0x0001000203000102ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		val64 = 0x0001020001030004ULL;
		writeq(val64, &bar0->tx_w_round_robin_1);
		val64 = 0x0001000203000102ULL;
		writeq(val64, &bar0->tx_w_round_robin_2);
		val64 = 0x0001020001030004ULL;
		writeq(val64, &bar0->tx_w_round_robin_3);
		val64 = 0x0001000000000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 6:
		val64 = 0x0001020304000102ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		val64 = 0x0304050001020001ULL;
		writeq(val64, &bar0->tx_w_round_robin_1);
		val64 = 0x0203000100000102ULL;
		writeq(val64, &bar0->tx_w_round_robin_2);
		val64 = 0x0304000102030405ULL;
		writeq(val64, &bar0->tx_w_round_robin_3);
		val64 = 0x0001000200000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 7:
		val64 = 0x0001020001020300ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		val64 = 0x0102030400010203ULL;
		writeq(val64, &bar0->tx_w_round_robin_1);
		val64 = 0x0405060001020001ULL;
		writeq(val64, &bar0->tx_w_round_robin_2);
		val64 = 0x0304050000010200ULL;
		writeq(val64, &bar0->tx_w_round_robin_3);
		val64 = 0x0102030000000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 8:
		val64 = 0x0001020300040105ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		val64 = 0x0200030106000204ULL;
		writeq(val64, &bar0->tx_w_round_robin_1);
		val64 = 0x0103000502010007ULL;
		writeq(val64, &bar0->tx_w_round_robin_2);
		val64 = 0x0304010002060500ULL;
		writeq(val64, &bar0->tx_w_round_robin_3);
		val64 = 0x0103020400000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	}

1343
	/* Enable all configured Tx FIFO partitions */
1344 1345 1346 1347
	val64 = readq(&bar0->tx_fifo_partition_0);
	val64 |= (TX_FIFO_PARTITION_EN);
	writeq(val64, &bar0->tx_fifo_partition_0);

1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392
	/* Filling the Rx round robin registers as per the
	 * number of Rings and steering based on QoS.
         */
	switch (config->rx_ring_num) {
	case 1:
		val64 = 0x8080808080808080ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 2:
		val64 = 0x0000010000010000ULL;
		writeq(val64, &bar0->rx_w_round_robin_0);
		val64 = 0x0100000100000100ULL;
		writeq(val64, &bar0->rx_w_round_robin_1);
		val64 = 0x0001000001000001ULL;
		writeq(val64, &bar0->rx_w_round_robin_2);
		val64 = 0x0000010000010000ULL;
		writeq(val64, &bar0->rx_w_round_robin_3);
		val64 = 0x0100000000000000ULL;
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080808040404040ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 3:
		val64 = 0x0001000102000001ULL;
		writeq(val64, &bar0->rx_w_round_robin_0);
		val64 = 0x0001020000010001ULL;
		writeq(val64, &bar0->rx_w_round_robin_1);
		val64 = 0x0200000100010200ULL;
		writeq(val64, &bar0->rx_w_round_robin_2);
		val64 = 0x0001000102000001ULL;
		writeq(val64, &bar0->rx_w_round_robin_3);
		val64 = 0x0001020000000000ULL;
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080804040402020ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 4:
		val64 = 0x0001020300010200ULL;
		writeq(val64, &bar0->rx_w_round_robin_0);
		val64 = 0x0100000102030001ULL;
		writeq(val64, &bar0->rx_w_round_robin_1);
		val64 = 0x0200010000010203ULL;
		writeq(val64, &bar0->rx_w_round_robin_2);
1393
		val64 = 0x0001020001000001ULL;
1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461
		writeq(val64, &bar0->rx_w_round_robin_3);
		val64 = 0x0203000100000000ULL;
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080404020201010ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 5:
		val64 = 0x0001000203000102ULL;
		writeq(val64, &bar0->rx_w_round_robin_0);
		val64 = 0x0001020001030004ULL;
		writeq(val64, &bar0->rx_w_round_robin_1);
		val64 = 0x0001000203000102ULL;
		writeq(val64, &bar0->rx_w_round_robin_2);
		val64 = 0x0001020001030004ULL;
		writeq(val64, &bar0->rx_w_round_robin_3);
		val64 = 0x0001000000000000ULL;
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080404020201008ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 6:
		val64 = 0x0001020304000102ULL;
		writeq(val64, &bar0->rx_w_round_robin_0);
		val64 = 0x0304050001020001ULL;
		writeq(val64, &bar0->rx_w_round_robin_1);
		val64 = 0x0203000100000102ULL;
		writeq(val64, &bar0->rx_w_round_robin_2);
		val64 = 0x0304000102030405ULL;
		writeq(val64, &bar0->rx_w_round_robin_3);
		val64 = 0x0001000200000000ULL;
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080404020100804ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 7:
		val64 = 0x0001020001020300ULL;
		writeq(val64, &bar0->rx_w_round_robin_0);
		val64 = 0x0102030400010203ULL;
		writeq(val64, &bar0->rx_w_round_robin_1);
		val64 = 0x0405060001020001ULL;
		writeq(val64, &bar0->rx_w_round_robin_2);
		val64 = 0x0304050000010200ULL;
		writeq(val64, &bar0->rx_w_round_robin_3);
		val64 = 0x0102030000000000ULL;
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080402010080402ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 8:
		val64 = 0x0001020300040105ULL;
		writeq(val64, &bar0->rx_w_round_robin_0);
		val64 = 0x0200030106000204ULL;
		writeq(val64, &bar0->rx_w_round_robin_1);
		val64 = 0x0103000502010007ULL;
		writeq(val64, &bar0->rx_w_round_robin_2);
		val64 = 0x0304010002060500ULL;
		writeq(val64, &bar0->rx_w_round_robin_3);
		val64 = 0x0103020400000000ULL;
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8040201008040201ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	}
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	/* UDP Fix */
	val64 = 0;
1465
	for (i = 0; i < 8; i++)
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		writeq(val64, &bar0->rts_frm_len_n[i]);

1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487
	/* Set the default rts frame length for the rings configured */
	val64 = MAC_RTS_FRM_LEN_SET(dev->mtu+22);
	for (i = 0 ; i < config->rx_ring_num ; i++)
		writeq(val64, &bar0->rts_frm_len_n[i]);

	/* Set the frame length for the configured rings
	 * desired by the user
	 */
	for (i = 0; i < config->rx_ring_num; i++) {
		/* If rts_frm_len[i] == 0 then it is assumed that user not
		 * specified frame length steering.
		 * If the user provides the frame length then program
		 * the rts_frm_len register for those values or else
		 * leave it as it is.
		 */
		if (rts_frm_len[i] != 0) {
			writeq(MAC_RTS_FRM_LEN_SET(rts_frm_len[i]),
				&bar0->rts_frm_len_n[i]);
		}
	}
1488
	
1489 1490 1491 1492 1493 1494 1495 1496 1497 1498
	/* Disable differentiated services steering logic */
	for (i = 0; i < 64; i++) {
		if (rts_ds_steer(nic, i, 0) == FAILURE) {
			DBG_PRINT(ERR_DBG, "%s: failed rts ds steering",
				dev->name);
			DBG_PRINT(ERR_DBG, "set on codepoint %d\n", i);
			return FAILURE;
		}
	}

1499
	/* Program statistics memory */
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	writeq(mac_control->stats_mem_phy, &bar0->stat_addr);

1502 1503 1504 1505 1506
	if (nic->device_type == XFRAME_II_DEVICE) {
		val64 = STAT_BC(0x320);
		writeq(val64, &bar0->stat_byte_cnt);
	}

1507
	/*
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	 * Initializing the sampling rate for the device to calculate the
	 * bandwidth utilization.
	 */
	val64 = MAC_TX_LINK_UTIL_VAL(tmac_util_period) |
	    MAC_RX_LINK_UTIL_VAL(rmac_util_period);
	writeq(val64, &bar0->mac_link_util);


1516 1517
	/*
	 * Initializing the Transmit and Receive Traffic Interrupt
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	 * Scheme.
	 */
1520 1521
	/*
	 * TTI Initialization. Default Tx timer gets us about
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	 * 250 interrupts per sec. Continuous interrupts are enabled
	 * by default.
	 */
1525 1526 1527 1528 1529 1530 1531 1532
	if (nic->device_type == XFRAME_II_DEVICE) {
		int count = (nic->config.bus_speed * 125)/2;
		val64 = TTI_DATA1_MEM_TX_TIMER_VAL(count);
	} else {

		val64 = TTI_DATA1_MEM_TX_TIMER_VAL(0x2078);
	}
	val64 |= TTI_DATA1_MEM_TX_URNG_A(0xA) |
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	    TTI_DATA1_MEM_TX_URNG_B(0x10) |
1534
	    TTI_DATA1_MEM_TX_URNG_C(0x30) | TTI_DATA1_MEM_TX_TIMER_AC_EN;
1535 1536
		if (use_continuous_tx_intrs)
			val64 |= TTI_DATA1_MEM_TX_TIMER_CI_EN;
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	writeq(val64, &bar0->tti_data1_mem);

	val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
	    TTI_DATA2_MEM_TX_UFC_B(0x20) |
1541
	    TTI_DATA2_MEM_TX_UFC_C(0x40) | TTI_DATA2_MEM_TX_UFC_D(0x80);
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	writeq(val64, &bar0->tti_data2_mem);

	val64 = TTI_CMD_MEM_WE | TTI_CMD_MEM_STROBE_NEW_CMD;
	writeq(val64, &bar0->tti_command_mem);

1547
	/*
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	 * Once the operation completes, the Strobe bit of the command
	 * register will be reset. We poll for this particular condition
	 * We wait for a maximum of 500ms for the operation to complete,
	 * if it's not complete by then we return error.
	 */
	time = 0;
	while (TRUE) {
		val64 = readq(&bar0->tti_command_mem);
		if (!(val64 & TTI_CMD_MEM_STROBE_NEW_CMD)) {
			break;
		}
		if (time > 10) {
			DBG_PRINT(ERR_DBG, "%s: TTI init Failed\n",
				  dev->name);
			return -1;
		}
		msleep(50);
		time++;
	}

1568 1569 1570 1571 1572 1573
	if (nic->config.bimodal) {
		int k = 0;
		for (k = 0; k < config->rx_ring_num; k++) {
			val64 = TTI_CMD_MEM_WE | TTI_CMD_MEM_STROBE_NEW_CMD;
			val64 |= TTI_CMD_MEM_OFFSET(0x38+k);
			writeq(val64, &bar0->tti_command_mem);
1574 1575

		/*
1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596
		 * Once the operation completes, the Strobe bit of the command
		 * register will be reset. We poll for this particular condition
		 * We wait for a maximum of 500ms for the operation to complete,
		 * if it's not complete by then we return error.
		*/
			time = 0;
			while (TRUE) {
				val64 = readq(&bar0->tti_command_mem);
				if (!(val64 & TTI_CMD_MEM_STROBE_NEW_CMD)) {
					break;
				}
				if (time > 10) {
					DBG_PRINT(ERR_DBG,
						"%s: TTI init Failed\n",
					dev->name);
					return -1;
				}
				time++;
				msleep(50);
			}
		}
1597
	} else {
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1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612
		/* RTI Initialization */
		if (nic->device_type == XFRAME_II_DEVICE) {
			/*
			 * Programmed to generate Apprx 500 Intrs per
			 * second
			 */
			int count = (nic->config.bus_speed * 125)/4;
			val64 = RTI_DATA1_MEM_RX_TIMER_VAL(count);
		} else {
			val64 = RTI_DATA1_MEM_RX_TIMER_VAL(0xFFF);
		}
		val64 |= RTI_DATA1_MEM_RX_URNG_A(0xA) |
		    RTI_DATA1_MEM_RX_URNG_B(0x10) |
		    RTI_DATA1_MEM_RX_URNG_C(0x30) | RTI_DATA1_MEM_RX_TIMER_AC_EN;
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1614
		writeq(val64, &bar0->rti_data1_mem);
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1616
		val64 = RTI_DATA2_MEM_RX_UFC_A(0x1) |
1617
		    RTI_DATA2_MEM_RX_UFC_B(0x2) ;
1618
		if (nic->config.intr_type == MSI_X)
1619 1620 1621 1622 1623
		    val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x20) | \
				RTI_DATA2_MEM_RX_UFC_D(0x40));
		else
		    val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x40) | \
				RTI_DATA2_MEM_RX_UFC_D(0x80));
1624
		writeq(val64, &bar0->rti_data2_mem);
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1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651
		for (i = 0; i < config->rx_ring_num; i++) {
			val64 = RTI_CMD_MEM_WE | RTI_CMD_MEM_STROBE_NEW_CMD
					| RTI_CMD_MEM_OFFSET(i);
			writeq(val64, &bar0->rti_command_mem);

			/*
			 * Once the operation completes, the Strobe bit of the
			 * command register will be reset. We poll for this
			 * particular condition. We wait for a maximum of 500ms
			 * for the operation to complete, if it's not complete
			 * by then we return error.
			 */
			time = 0;
			while (TRUE) {
				val64 = readq(&bar0->rti_command_mem);
				if (!(val64 & RTI_CMD_MEM_STROBE_NEW_CMD)) {
					break;
				}
				if (time > 10) {
					DBG_PRINT(ERR_DBG, "%s: RTI init Failed\n",
						  dev->name);
					return -1;
				}
				time++;
				msleep(50);
			}
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		}
	}

1655 1656
	/*
	 * Initializing proper values as Pause threshold into all
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	 * the 8 Queues on Rx side.
	 */
	writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q0q3);
	writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q4q7);

	/* Disable RMAC PAD STRIPPING */
1663
	add = &bar0->mac_cfg;
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	val64 = readq(&bar0->mac_cfg);
	val64 &= ~(MAC_CFG_RMAC_STRIP_PAD);
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) (val64), add);
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) (val64 >> 32), (add + 4));
	val64 = readq(&bar0->mac_cfg);

1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684
	/* Enable FCS stripping by adapter */
	add = &bar0->mac_cfg;
	val64 = readq(&bar0->mac_cfg);
	val64 |= MAC_CFG_RMAC_STRIP_FCS;
	if (nic->device_type == XFRAME_II_DEVICE)
		writeq(val64, &bar0->mac_cfg);
	else {
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64), add);
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64 >> 32), (add + 4));
	}

1685 1686
	/*
	 * Set the time value to be inserted in the pause frame
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	 * generated by xena.
	 */
	val64 = readq(&bar0->rmac_pause_cfg);
	val64 &= ~(RMAC_PAUSE_HG_PTIME(0xffff));
	val64 |= RMAC_PAUSE_HG_PTIME(nic->mac_control.rmac_pause_time);
	writeq(val64, &bar0->rmac_pause_cfg);

1694
	/*
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	 * Set the Threshold Limit for Generating the pause frame
	 * If the amount of data in any Queue exceeds ratio of
	 * (mac_control.mc_pause_threshold_q0q3 or q4q7)/256
	 * pause frame is generated
	 */
	val64 = 0;
	for (i = 0; i < 4; i++) {
		val64 |=
		    (((u64) 0xFF00 | nic->mac_control.
		      mc_pause_threshold_q0q3)
		     << (i * 2 * 8));
	}
	writeq(val64, &bar0->mc_pause_thresh_q0q3);

	val64 = 0;
	for (i = 0; i < 4; i++) {
		val64 |=
		    (((u64) 0xFF00 | nic->mac_control.
		      mc_pause_threshold_q4q7)
		     << (i * 2 * 8));
	}
	writeq(val64, &bar0->mc_pause_thresh_q4q7);

1718 1719
	/*
	 * TxDMA will stop Read request if the number of read split has
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	 * exceeded the limit pointed by shared_splits
	 */
	val64 = readq(&bar0->pic_control);
	val64 |= PIC_CNTL_SHARED_SPLITS(shared_splits);
	writeq(val64, &bar0->pic_control);

1726 1727 1728 1729 1730 1731
	if (nic->config.bus_speed == 266) {
		writeq(TXREQTO_VAL(0x7f) | TXREQTO_EN, &bar0->txreqtimeout);
		writeq(0x0, &bar0->read_retry_delay);
		writeq(0x0, &bar0->write_retry_delay);
	}

1732 1733 1734 1735 1736
	/*
	 * Programming the Herc to split every write transaction
	 * that does not start on an ADB to reduce disconnects.
	 */
	if (nic->device_type == XFRAME_II_DEVICE) {
1737 1738
		val64 = FAULT_BEHAVIOUR | EXT_REQ_EN |
			MISC_LINK_STABILITY_PRD(3);
1739 1740 1741 1742
		writeq(val64, &bar0->misc_control);
		val64 = readq(&bar0->pic_control2);
		val64 &= ~(BIT(13)|BIT(14)|BIT(15));
		writeq(val64, &bar0->pic_control2);
1743
	}
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1744 1745 1746
	if (strstr(nic->product_name, "CX4")) {
		val64 = TMAC_AVG_IPG(0x17);
		writeq(val64, &bar0->tmac_avg_ipg);
1747 1748
	}

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	return SUCCESS;
}
1751 1752 1753
#define LINK_UP_DOWN_INTERRUPT		1
#define MAC_RMAC_ERR_TIMER		2

R
Ralf Baechle 已提交
1754
static int s2io_link_fault_indication(struct s2io_nic *nic)
1755
{
1756
	if (nic->config.intr_type != INTA)
1757
		return MAC_RMAC_ERR_TIMER;
1758 1759 1760 1761 1762
	if (nic->device_type == XFRAME_II_DEVICE)
		return LINK_UP_DOWN_INTERRUPT;
	else
		return MAC_RMAC_ERR_TIMER;
}
1763

1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784
/**
 *  do_s2io_write_bits -  update alarm bits in alarm register
 *  @value: alarm bits
 *  @flag: interrupt status
 *  @addr: address value
 *  Description: update alarm bits in alarm register
 *  Return Value:
 *  NONE.
 */
static void do_s2io_write_bits(u64 value, int flag, void __iomem *addr)
{
	u64 temp64;

	temp64 = readq(addr);

	if(flag == ENABLE_INTRS)
		temp64 &= ~((u64) value);
	else
		temp64 |= ((u64) value);
	writeq(temp64, addr);
}
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1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907
void en_dis_err_alarms(struct s2io_nic *nic, u16 mask, int flag)
{
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
	register u64 gen_int_mask = 0;

	if (mask & TX_DMA_INTR) {

		gen_int_mask |= TXDMA_INT_M;

		do_s2io_write_bits(TXDMA_TDA_INT | TXDMA_PFC_INT |
				TXDMA_PCC_INT | TXDMA_TTI_INT |
				TXDMA_LSO_INT | TXDMA_TPA_INT |
				TXDMA_SM_INT, flag, &bar0->txdma_int_mask);

		do_s2io_write_bits(PFC_ECC_DB_ERR | PFC_SM_ERR_ALARM |
				PFC_MISC_0_ERR | PFC_MISC_1_ERR |
				PFC_PCIX_ERR | PFC_ECC_SG_ERR, flag,
				&bar0->pfc_err_mask);

		do_s2io_write_bits(TDA_Fn_ECC_DB_ERR | TDA_SM0_ERR_ALARM |
				TDA_SM1_ERR_ALARM | TDA_Fn_ECC_SG_ERR |
				TDA_PCIX_ERR, flag, &bar0->tda_err_mask);

		do_s2io_write_bits(PCC_FB_ECC_DB_ERR | PCC_TXB_ECC_DB_ERR |
				PCC_SM_ERR_ALARM | PCC_WR_ERR_ALARM |
				PCC_N_SERR | PCC_6_COF_OV_ERR |
				PCC_7_COF_OV_ERR | PCC_6_LSO_OV_ERR |
				PCC_7_LSO_OV_ERR | PCC_FB_ECC_SG_ERR |
				PCC_TXB_ECC_SG_ERR, flag, &bar0->pcc_err_mask);

		do_s2io_write_bits(TTI_SM_ERR_ALARM | TTI_ECC_SG_ERR |
				TTI_ECC_DB_ERR, flag, &bar0->tti_err_mask);

		do_s2io_write_bits(LSO6_ABORT | LSO7_ABORT |
				LSO6_SM_ERR_ALARM | LSO7_SM_ERR_ALARM |
				LSO6_SEND_OFLOW | LSO7_SEND_OFLOW,
				flag, &bar0->lso_err_mask);

		do_s2io_write_bits(TPA_SM_ERR_ALARM | TPA_TX_FRM_DROP,
				flag, &bar0->tpa_err_mask);

		do_s2io_write_bits(SM_SM_ERR_ALARM, flag, &bar0->sm_err_mask);

	}

	if (mask & TX_MAC_INTR) {
		gen_int_mask |= TXMAC_INT_M;
		do_s2io_write_bits(MAC_INT_STATUS_TMAC_INT, flag,
				&bar0->mac_int_mask);
		do_s2io_write_bits(TMAC_TX_BUF_OVRN | TMAC_TX_SM_ERR |
				TMAC_ECC_SG_ERR | TMAC_ECC_DB_ERR |
				TMAC_DESC_ECC_SG_ERR | TMAC_DESC_ECC_DB_ERR,
				flag, &bar0->mac_tmac_err_mask);
	}

	if (mask & TX_XGXS_INTR) {
		gen_int_mask |= TXXGXS_INT_M;
		do_s2io_write_bits(XGXS_INT_STATUS_TXGXS, flag,
				&bar0->xgxs_int_mask);
		do_s2io_write_bits(TXGXS_ESTORE_UFLOW | TXGXS_TX_SM_ERR |
				TXGXS_ECC_SG_ERR | TXGXS_ECC_DB_ERR,
				flag, &bar0->xgxs_txgxs_err_mask);
	}

	if (mask & RX_DMA_INTR) {
		gen_int_mask |= RXDMA_INT_M;
		do_s2io_write_bits(RXDMA_INT_RC_INT_M | RXDMA_INT_RPA_INT_M |
				RXDMA_INT_RDA_INT_M | RXDMA_INT_RTI_INT_M,
				flag, &bar0->rxdma_int_mask);
		do_s2io_write_bits(RC_PRCn_ECC_DB_ERR | RC_FTC_ECC_DB_ERR |
				RC_PRCn_SM_ERR_ALARM | RC_FTC_SM_ERR_ALARM |
				RC_PRCn_ECC_SG_ERR | RC_FTC_ECC_SG_ERR |
				RC_RDA_FAIL_WR_Rn, flag, &bar0->rc_err_mask);
		do_s2io_write_bits(PRC_PCI_AB_RD_Rn | PRC_PCI_AB_WR_Rn |
				PRC_PCI_AB_F_WR_Rn | PRC_PCI_DP_RD_Rn |
				PRC_PCI_DP_WR_Rn | PRC_PCI_DP_F_WR_Rn, flag,
				&bar0->prc_pcix_err_mask);
		do_s2io_write_bits(RPA_SM_ERR_ALARM | RPA_CREDIT_ERR |
				RPA_ECC_SG_ERR | RPA_ECC_DB_ERR, flag,
				&bar0->rpa_err_mask);
		do_s2io_write_bits(RDA_RXDn_ECC_DB_ERR | RDA_FRM_ECC_DB_N_AERR |
				RDA_SM1_ERR_ALARM | RDA_SM0_ERR_ALARM |
				RDA_RXD_ECC_DB_SERR | RDA_RXDn_ECC_SG_ERR |
				RDA_FRM_ECC_SG_ERR | RDA_MISC_ERR|RDA_PCIX_ERR,
				flag, &bar0->rda_err_mask);
		do_s2io_write_bits(RTI_SM_ERR_ALARM |
				RTI_ECC_SG_ERR | RTI_ECC_DB_ERR,
				flag, &bar0->rti_err_mask);
	}

	if (mask & RX_MAC_INTR) {
		gen_int_mask |= RXMAC_INT_M;
		do_s2io_write_bits(MAC_INT_STATUS_RMAC_INT, flag,
				&bar0->mac_int_mask);
		do_s2io_write_bits(RMAC_RX_BUFF_OVRN | RMAC_RX_SM_ERR |
				RMAC_UNUSED_INT | RMAC_SINGLE_ECC_ERR |
				RMAC_DOUBLE_ECC_ERR |
				RMAC_LINK_STATE_CHANGE_INT,
				flag, &bar0->mac_rmac_err_mask);
	}

	if (mask & RX_XGXS_INTR)
	{
		gen_int_mask |= RXXGXS_INT_M;
		do_s2io_write_bits(XGXS_INT_STATUS_RXGXS, flag,
				&bar0->xgxs_int_mask);
		do_s2io_write_bits(RXGXS_ESTORE_OFLOW | RXGXS_RX_SM_ERR, flag,
				&bar0->xgxs_rxgxs_err_mask);
	}

	if (mask & MC_INTR) {
		gen_int_mask |= MC_INT_M;
		do_s2io_write_bits(MC_INT_MASK_MC_INT, flag, &bar0->mc_int_mask);
		do_s2io_write_bits(MC_ERR_REG_SM_ERR | MC_ERR_REG_ECC_ALL_SNG |
				MC_ERR_REG_ECC_ALL_DBL | PLL_LOCK_N, flag,
				&bar0->mc_err_mask);
	}
	nic->general_int_mask = gen_int_mask;

	/* Remove this line when alarm interrupts are enabled */
	nic->general_int_mask = 0;
}
1908 1909
/**
 *  en_dis_able_nic_intrs - Enable or Disable the interrupts
L
Linus Torvalds 已提交
1910 1911 1912 1913
 *  @nic: device private variable,
 *  @mask: A mask indicating which Intr block must be modified and,
 *  @flag: A flag indicating whether to enable or disable the Intrs.
 *  Description: This function will either disable or enable the interrupts
1914 1915
 *  depending on the flag argument. The mask argument can be used to
 *  enable/disable any Intr block.
L
Linus Torvalds 已提交
1916 1917 1918 1919 1920
 *  Return Value: NONE.
 */

static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
{
R
Ralf Baechle 已提交
1921
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
1922 1923 1924
	register u64 temp64 = 0, intr_mask = 0;

	intr_mask = nic->general_int_mask;
L
Linus Torvalds 已提交
1925 1926 1927

	/*  Top level interrupt classification */
	/*  PIC Interrupts */
1928
	if (mask & TX_PIC_INTR) {
L
Linus Torvalds 已提交
1929
		/*  Enable PIC Intrs in the general intr mask register */
1930
		intr_mask |= TXPIC_INT_M;
L
Linus Torvalds 已提交
1931
		if (flag == ENABLE_INTRS) {
1932
			/*
1933
			 * If Hercules adapter enable GPIO otherwise
1934
			 * disable all PCIX, Flash, MDIO, IIC and GPIO
1935 1936
			 * interrupts for now.
			 * TODO
L
Linus Torvalds 已提交
1937
			 */
1938 1939
			if (s2io_link_fault_indication(nic) ==
					LINK_UP_DOWN_INTERRUPT ) {
1940 1941 1942 1943 1944
				do_s2io_write_bits(PIC_INT_GPIO, flag,
						&bar0->pic_int_mask);
				do_s2io_write_bits(GPIO_INT_MASK_LINK_UP, flag,
						&bar0->gpio_int_mask);
			} else
1945
				writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
L
Linus Torvalds 已提交
1946
		} else if (flag == DISABLE_INTRS) {
1947 1948 1949
			/*
			 * Disable PIC Intrs in the general
			 * intr mask register
L
Linus Torvalds 已提交
1950 1951 1952 1953 1954 1955 1956
			 */
			writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
		}
	}

	/*  Tx traffic interrupts */
	if (mask & TX_TRAFFIC_INTR) {
1957
		intr_mask |= TXTRAFFIC_INT_M;
L
Linus Torvalds 已提交
1958
		if (flag == ENABLE_INTRS) {
1959
			/*
L
Linus Torvalds 已提交
1960
			 * Enable all the Tx side interrupts
1961
			 * writing 0 Enables all 64 TX interrupt levels
L
Linus Torvalds 已提交
1962 1963 1964
			 */
			writeq(0x0, &bar0->tx_traffic_mask);
		} else if (flag == DISABLE_INTRS) {
1965 1966
			/*
			 * Disable Tx Traffic Intrs in the general intr mask
L
Linus Torvalds 已提交
1967 1968 1969 1970 1971 1972 1973 1974
			 * register.
			 */
			writeq(DISABLE_ALL_INTRS, &bar0->tx_traffic_mask);
		}
	}

	/*  Rx traffic interrupts */
	if (mask & RX_TRAFFIC_INTR) {
1975
		intr_mask |= RXTRAFFIC_INT_M;
L
Linus Torvalds 已提交
1976 1977 1978 1979
		if (flag == ENABLE_INTRS) {
			/* writing 0 Enables all 8 RX interrupt levels */
			writeq(0x0, &bar0->rx_traffic_mask);
		} else if (flag == DISABLE_INTRS) {
1980 1981
			/*
			 * Disable Rx Traffic Intrs in the general intr mask
L
Linus Torvalds 已提交
1982 1983 1984 1985 1986
			 * register.
			 */
			writeq(DISABLE_ALL_INTRS, &bar0->rx_traffic_mask);
		}
	}
1987 1988 1989 1990 1991 1992 1993 1994 1995

	temp64 = readq(&bar0->general_int_mask);
	if (flag == ENABLE_INTRS)
		temp64 &= ~((u64) intr_mask);
	else
		temp64 = DISABLE_ALL_INTRS;
	writeq(temp64, &bar0->general_int_mask);

	nic->general_int_mask = readq(&bar0->general_int_mask);
L
Linus Torvalds 已提交
1996 1997
}

1998 1999 2000 2001 2002
/**
 *  verify_pcc_quiescent- Checks for PCC quiescent state
 *  Return: 1 If PCC is quiescence
 *          0 If PCC is not quiescence
 */
R
Ralf Baechle 已提交
2003
static int verify_pcc_quiescent(struct s2io_nic *sp, int flag)
2004
{
2005
	int ret = 0, herc;
R
Ralf Baechle 已提交
2006
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
2007 2008 2009
	u64 val64 = readq(&bar0->adapter_status);
	
	herc = (sp->device_type == XFRAME_II_DEVICE);
2010 2011

	if (flag == FALSE) {
2012
		if ((!herc && (sp->pdev->revision >= 4)) || herc) {
2013
			if (!(val64 & ADAPTER_STATUS_RMAC_PCC_IDLE))
2014
				ret = 1;
2015 2016
		} else {
			if (!(val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE))
2017
				ret = 1;
2018 2019
		}
	} else {
2020
		if ((!herc && (sp->pdev->revision >= 4)) || herc) {
2021
			if (((val64 & ADAPTER_STATUS_RMAC_PCC_IDLE) ==
2022
			     ADAPTER_STATUS_RMAC_PCC_IDLE))
2023 2024 2025
				ret = 1;
		} else {
			if (((val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE) ==
2026
			     ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE))
2027
				ret = 1;
2028 2029 2030 2031 2032 2033 2034
		}
	}

	return ret;
}
/**
 *  verify_xena_quiescence - Checks whether the H/W is ready
L
Linus Torvalds 已提交
2035
 *  Description: Returns whether the H/W is ready to go or not. Depending
2036
 *  on whether adapter enable bit was written or not the comparison
L
Linus Torvalds 已提交
2037 2038
 *  differs and the calling function passes the input argument flag to
 *  indicate this.
2039
 *  Return: 1 If xena is quiescence
L
Linus Torvalds 已提交
2040 2041 2042
 *          0 If Xena is not quiescence
 */

R
Ralf Baechle 已提交
2043
static int verify_xena_quiescence(struct s2io_nic *sp)
L
Linus Torvalds 已提交
2044
{
2045
	int  mode;
R
Ralf Baechle 已提交
2046
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
2047 2048
	u64 val64 = readq(&bar0->adapter_status);
	mode = s2io_verify_pci_mode(sp);
L
Linus Torvalds 已提交
2049

2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080
	if (!(val64 & ADAPTER_STATUS_TDMA_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "TDMA is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_RDMA_READY)) {
	DBG_PRINT(ERR_DBG, "%s", "RDMA is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_PFC_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "PFC is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_TMAC_BUF_EMPTY)) {
		DBG_PRINT(ERR_DBG, "%s", "TMAC BUF is not empty!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_PIC_QUIESCENT)) {
		DBG_PRINT(ERR_DBG, "%s", "PIC is not QUIESCENT!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_MC_DRAM_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "MC_DRAM is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_MC_QUEUES_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "MC_QUEUES is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_M_PLL_LOCK)) {
		DBG_PRINT(ERR_DBG, "%s", "M_PLL is not locked!");
		return 0;
L
Linus Torvalds 已提交
2081 2082
	}

2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099
	/*
	 * In PCI 33 mode, the P_PLL is not used, and therefore,
	 * the the P_PLL_LOCK bit in the adapter_status register will
	 * not be asserted.
	 */
	if (!(val64 & ADAPTER_STATUS_P_PLL_LOCK) &&
		sp->device_type == XFRAME_II_DEVICE && mode !=
		PCI_MODE_PCI_33) {
		DBG_PRINT(ERR_DBG, "%s", "P_PLL is not locked!");
		return 0;
	}
	if (!((val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ==
			ADAPTER_STATUS_RC_PRC_QUIESCENT)) {
		DBG_PRINT(ERR_DBG, "%s", "RC_PRC is not QUIESCENT!");
		return 0;
	}
	return 1;
L
Linus Torvalds 已提交
2100 2101 2102 2103 2104
}

/**
 * fix_mac_address -  Fix for Mac addr problem on Alpha platforms
 * @sp: Pointer to device specifc structure
2105
 * Description :
L
Linus Torvalds 已提交
2106 2107 2108 2109
 * New procedure to clear mac address reading  problems on Alpha platforms
 *
 */

R
Ralf Baechle 已提交
2110
static void fix_mac_address(struct s2io_nic * sp)
L
Linus Torvalds 已提交
2111
{
R
Ralf Baechle 已提交
2112
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
2113 2114 2115 2116 2117
	u64 val64;
	int i = 0;

	while (fix_mac[i] != END_SIGN) {
		writeq(fix_mac[i++], &bar0->gpio_control);
2118
		udelay(10);
L
Linus Torvalds 已提交
2119 2120 2121 2122 2123
		val64 = readq(&bar0->gpio_control);
	}
}

/**
2124
 *  start_nic - Turns the device on
L
Linus Torvalds 已提交
2125
 *  @nic : device private variable.
2126 2127 2128 2129
 *  Description:
 *  This function actually turns the device on. Before this  function is
 *  called,all Registers are configured from their reset states
 *  and shared memory is allocated but the NIC is still quiescent. On
L
Linus Torvalds 已提交
2130 2131
 *  calling this function, the device interrupts are cleared and the NIC is
 *  literally switched on by writing into the adapter control register.
2132
 *  Return Value:
L
Linus Torvalds 已提交
2133 2134 2135 2136 2137
 *  SUCCESS on success and -1 on failure.
 */

static int start_nic(struct s2io_nic *nic)
{
R
Ralf Baechle 已提交
2138
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
L
Linus Torvalds 已提交
2139 2140
	struct net_device *dev = nic->dev;
	register u64 val64 = 0;
2141
	u16 subid, i;
R
Ralf Baechle 已提交
2142
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2143 2144 2145 2146 2147 2148 2149
	struct config_param *config;

	mac_control = &nic->mac_control;
	config = &nic->config;

	/*  PRC Initialization and configuration */
	for (i = 0; i < config->rx_ring_num; i++) {
2150
		writeq((u64) mac_control->rings[i].rx_blocks[0].block_dma_addr,
L
Linus Torvalds 已提交
2151 2152 2153
		       &bar0->prc_rxd0_n[i]);

		val64 = readq(&bar0->prc_ctrl_n[i]);
2154 2155
		if (nic->config.bimodal)
			val64 |= PRC_CTRL_BIMODAL_INTERRUPT;
2156 2157 2158 2159
		if (nic->rxd_mode == RXD_MODE_1)
			val64 |= PRC_CTRL_RC_ENABLED;
		else
			val64 |= PRC_CTRL_RC_ENABLED | PRC_CTRL_RING_MODE_3;
2160 2161 2162 2163
		if (nic->device_type == XFRAME_II_DEVICE)
			val64 |= PRC_CTRL_GROUP_READS;
		val64 &= ~PRC_CTRL_RXD_BACKOFF_INTERVAL(0xFFFFFF);
		val64 |= PRC_CTRL_RXD_BACKOFF_INTERVAL(0x1000);
L
Linus Torvalds 已提交
2164 2165 2166
		writeq(val64, &bar0->prc_ctrl_n[i]);
	}

2167 2168 2169 2170 2171 2172
	if (nic->rxd_mode == RXD_MODE_3B) {
		/* Enabling 2 buffer mode by writing into Rx_pa_cfg reg. */
		val64 = readq(&bar0->rx_pa_cfg);
		val64 |= RX_PA_CFG_IGNORE_L2_ERR;
		writeq(val64, &bar0->rx_pa_cfg);
	}
L
Linus Torvalds 已提交
2173

2174 2175 2176 2177 2178 2179 2180
	if (vlan_tag_strip == 0) {
		val64 = readq(&bar0->rx_pa_cfg);
		val64 &= ~RX_PA_CFG_STRIP_VLAN_TAG;
		writeq(val64, &bar0->rx_pa_cfg);
		vlan_strip_flag = 0;
	}

2181
	/*
L
Linus Torvalds 已提交
2182 2183 2184 2185 2186 2187 2188 2189 2190
	 * Enabling MC-RLDRAM. After enabling the device, we timeout
	 * for around 100ms, which is approximately the time required
	 * for the device to be ready for operation.
	 */
	val64 = readq(&bar0->mc_rldram_mrs);
	val64 |= MC_RLDRAM_QUEUE_SIZE_ENABLE | MC_RLDRAM_MRS_ENABLE;
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);
	val64 = readq(&bar0->mc_rldram_mrs);

2191
	msleep(100);	/* Delay by around 100 ms. */
L
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2192 2193 2194 2195 2196 2197

	/* Enabling ECC Protection. */
	val64 = readq(&bar0->adapter_control);
	val64 &= ~ADAPTER_ECC_EN;
	writeq(val64, &bar0->adapter_control);

2198 2199
	/*
	 * Verify if the device is ready to be enabled, if so enable
L
Linus Torvalds 已提交
2200 2201 2202
	 * it.
	 */
	val64 = readq(&bar0->adapter_status);
2203
	if (!verify_xena_quiescence(nic)) {
L
Linus Torvalds 已提交
2204 2205 2206 2207 2208 2209
		DBG_PRINT(ERR_DBG, "%s: device is not ready, ", dev->name);
		DBG_PRINT(ERR_DBG, "Adapter status reads: 0x%llx\n",
			  (unsigned long long) val64);
		return FAILURE;
	}

2210
	/*
L
Linus Torvalds 已提交
2211
	 * With some switches, link might be already up at this point.
2212 2213 2214 2215
	 * Because of this weird behavior, when we enable laser,
	 * we may not get link. We need to handle this. We cannot
	 * figure out which switch is misbehaving. So we are forced to
	 * make a global change.
L
Linus Torvalds 已提交
2216 2217 2218 2219 2220 2221 2222
	 */

	/* Enabling Laser. */
	val64 = readq(&bar0->adapter_control);
	val64 |= ADAPTER_EOI_TX_ON;
	writeq(val64, &bar0->adapter_control);

A
Ananda Raju 已提交
2223 2224 2225 2226 2227 2228 2229
	if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
		/*
		 * Dont see link state interrupts initally on some switches,
		 * so directly scheduling the link state task here.
		 */
		schedule_work(&nic->set_link_task);
	}
L
Linus Torvalds 已提交
2230 2231
	/* SXE-002: Initialize link and activity LED */
	subid = nic->pdev->subsystem_device;
2232 2233
	if (((subid & 0xFF) >= 0x07) &&
	    (nic->device_type == XFRAME_I_DEVICE)) {
L
Linus Torvalds 已提交
2234 2235 2236 2237
		val64 = readq(&bar0->gpio_control);
		val64 |= 0x0000800000000000ULL;
		writeq(val64, &bar0->gpio_control);
		val64 = 0x0411040400000000ULL;
2238
		writeq(val64, (void __iomem *)bar0 + 0x2700);
L
Linus Torvalds 已提交
2239 2240 2241 2242
	}

	return SUCCESS;
}
A
Ananda Raju 已提交
2243 2244 2245
/**
 * s2io_txdl_getskb - Get the skb from txdl, unmap and return skb
 */
R
Ralf Baechle 已提交
2246 2247
static struct sk_buff *s2io_txdl_getskb(struct fifo_info *fifo_data, struct \
					TxD *txdlp, int get_off)
A
Ananda Raju 已提交
2248
{
R
Ralf Baechle 已提交
2249
	struct s2io_nic *nic = fifo_data->nic;
A
Ananda Raju 已提交
2250
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2251
	struct TxD *txds;
A
Ananda Raju 已提交
2252 2253 2254
	u16 j, frg_cnt;

	txds = txdlp;
2255
	if (txds->Host_Control == (u64)(long)nic->ufo_in_band_v) {
A
Ananda Raju 已提交
2256 2257 2258 2259 2260 2261 2262 2263 2264
		pci_unmap_single(nic->pdev, (dma_addr_t)
			txds->Buffer_Pointer, sizeof(u64),
			PCI_DMA_TODEVICE);
		txds++;
	}

	skb = (struct sk_buff *) ((unsigned long)
			txds->Host_Control);
	if (!skb) {
R
Ralf Baechle 已提交
2265
		memset(txdlp, 0, (sizeof(struct TxD) * fifo_data->max_txds));
A
Ananda Raju 已提交
2266 2267 2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278
		return NULL;
	}
	pci_unmap_single(nic->pdev, (dma_addr_t)
			 txds->Buffer_Pointer,
			 skb->len - skb->data_len,
			 PCI_DMA_TODEVICE);
	frg_cnt = skb_shinfo(skb)->nr_frags;
	if (frg_cnt) {
		txds++;
		for (j = 0; j < frg_cnt; j++, txds++) {
			skb_frag_t *frag = &skb_shinfo(skb)->frags[j];
			if (!txds->Buffer_Pointer)
				break;
2279
			pci_unmap_page(nic->pdev, (dma_addr_t)
A
Ananda Raju 已提交
2280 2281 2282 2283
					txds->Buffer_Pointer,
				       frag->size, PCI_DMA_TODEVICE);
		}
	}
R
Ralf Baechle 已提交
2284
	memset(txdlp,0, (sizeof(struct TxD) * fifo_data->max_txds));
A
Ananda Raju 已提交
2285 2286
	return(skb);
}
L
Linus Torvalds 已提交
2287

2288 2289
/**
 *  free_tx_buffers - Free all queued Tx buffers
L
Linus Torvalds 已提交
2290
 *  @nic : device private variable.
2291
 *  Description:
L
Linus Torvalds 已提交
2292
 *  Free all queued Tx buffers.
2293
 *  Return Value: void
L
Linus Torvalds 已提交
2294 2295 2296 2297 2298 2299
*/

static void free_tx_buffers(struct s2io_nic *nic)
{
	struct net_device *dev = nic->dev;
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2300
	struct TxD *txdp;
L
Linus Torvalds 已提交
2301
	int i, j;
R
Ralf Baechle 已提交
2302
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2303
	struct config_param *config;
A
Ananda Raju 已提交
2304
	int cnt = 0;
L
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2305 2306 2307 2308 2309 2310

	mac_control = &nic->mac_control;
	config = &nic->config;

	for (i = 0; i < config->tx_fifo_num; i++) {
		for (j = 0; j < config->tx_cfg[i].fifo_len - 1; j++) {
2311 2312
			txdp = (struct TxD *) \
			mac_control->fifos[i].list_info[j].list_virt_addr;
A
Ananda Raju 已提交
2313 2314
			skb = s2io_txdl_getskb(&mac_control->fifos[i], txdp, j);
			if (skb) {
2315 2316
				nic->mac_control.stats_info->sw_stat.mem_freed 
					+= skb->truesize;
A
Ananda Raju 已提交
2317 2318
				dev_kfree_skb(skb);
				cnt++;
L
Linus Torvalds 已提交
2319 2320 2321 2322 2323
			}
		}
		DBG_PRINT(INTR_DBG,
			  "%s:forcibly freeing %d skbs on FIFO%d\n",
			  dev->name, cnt, i);
2324 2325
		mac_control->fifos[i].tx_curr_get_info.offset = 0;
		mac_control->fifos[i].tx_curr_put_info.offset = 0;
L
Linus Torvalds 已提交
2326 2327 2328
	}
}

2329 2330
/**
 *   stop_nic -  To stop the nic
L
Linus Torvalds 已提交
2331
 *   @nic ; device private variable.
2332 2333
 *   Description:
 *   This function does exactly the opposite of what the start_nic()
L
Linus Torvalds 已提交
2334 2335 2336 2337 2338 2339 2340
 *   function does. This function is called to stop the device.
 *   Return Value:
 *   void.
 */

static void stop_nic(struct s2io_nic *nic)
{
R
Ralf Baechle 已提交
2341
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
L
Linus Torvalds 已提交
2342
	register u64 val64 = 0;
2343
	u16 interruptible;
R
Ralf Baechle 已提交
2344
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2345 2346 2347 2348 2349 2350
	struct config_param *config;

	mac_control = &nic->mac_control;
	config = &nic->config;

	/*  Disable all interrupts */
2351
	en_dis_err_alarms(nic, ENA_ALL_INTRS, DISABLE_INTRS);
2352
	interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
2353
	interruptible |= TX_PIC_INTR;
L
Linus Torvalds 已提交
2354 2355
	en_dis_able_nic_intrs(nic, interruptible, DISABLE_INTRS);

2356 2357 2358 2359
	/* Clearing Adapter_En bit of ADAPTER_CONTROL Register */
	val64 = readq(&bar0->adapter_control);
	val64 &= ~(ADAPTER_CNTL_EN);
	writeq(val64, &bar0->adapter_control);
L
Linus Torvalds 已提交
2360 2361
}

2362 2363
/**
 *  fill_rx_buffers - Allocates the Rx side skbs
L
Linus Torvalds 已提交
2364
 *  @nic:  device private variable
2365 2366
 *  @ring_no: ring number
 *  Description:
L
Linus Torvalds 已提交
2367 2368 2369 2370 2371 2372 2373
 *  The function allocates Rx side skbs and puts the physical
 *  address of these buffers into the RxD buffer pointers, so that the NIC
 *  can DMA the received frame into these locations.
 *  The NIC supports 3 receive modes, viz
 *  1. single buffer,
 *  2. three buffer and
 *  3. Five buffer modes.
2374 2375
 *  Each mode defines how many fragments the received frame will be split
 *  up into by the NIC. The frame is split into L3 header, L4 Header,
L
Linus Torvalds 已提交
2376 2377 2378 2379 2380 2381 2382
 *  L4 payload in three buffer mode and in 5 buffer mode, L4 payload itself
 *  is split into 3 fragments. As of now only single buffer mode is
 *  supported.
 *   Return Value:
 *  SUCCESS on success or an appropriate -ve value on failure.
 */

2383
static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
L
Linus Torvalds 已提交
2384 2385 2386
{
	struct net_device *dev = nic->dev;
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2387
	struct RxD_t *rxdp;
L
Linus Torvalds 已提交
2388 2389
	int off, off1, size, block_no, block_no1;
	u32 alloc_tab = 0;
2390
	u32 alloc_cnt;
R
Ralf Baechle 已提交
2391
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2392
	struct config_param *config;
2393
	u64 tmp;
R
Ralf Baechle 已提交
2394
	struct buffAdd *ba;
L
Linus Torvalds 已提交
2395
	unsigned long flags;
R
Ralf Baechle 已提交
2396
	struct RxD_t *first_rxdp = NULL;
2397
	u64 Buffer0_ptr = 0, Buffer1_ptr = 0;
2398 2399
	struct RxD1 *rxdp1;
	struct RxD3 *rxdp3;
2400
	struct swStat *stats = &nic->mac_control.stats_info->sw_stat;
L
Linus Torvalds 已提交
2401 2402 2403

	mac_control = &nic->mac_control;
	config = &nic->config;
2404 2405
	alloc_cnt = mac_control->rings[ring_no].pkt_cnt -
	    atomic_read(&nic->rx_bufs_left[ring_no]);
L
Linus Torvalds 已提交
2406

2407
	block_no1 = mac_control->rings[ring_no].rx_curr_get_info.block_index;
2408
	off1 = mac_control->rings[ring_no].rx_curr_get_info.offset;
L
Linus Torvalds 已提交
2409
	while (alloc_tab < alloc_cnt) {
2410
		block_no = mac_control->rings[ring_no].rx_curr_put_info.
L
Linus Torvalds 已提交
2411
		    block_index;
2412
		off = mac_control->rings[ring_no].rx_curr_put_info.offset;
L
Linus Torvalds 已提交
2413

2414 2415 2416 2417 2418 2419 2420
		rxdp = mac_control->rings[ring_no].
				rx_blocks[block_no].rxds[off].virt_addr;

		if ((block_no == block_no1) && (off == off1) &&
					(rxdp->Host_Control)) {
			DBG_PRINT(INTR_DBG, "%s: Get and Put",
				  dev->name);
L
Linus Torvalds 已提交
2421 2422 2423
			DBG_PRINT(INTR_DBG, " info equated\n");
			goto end;
		}
2424
		if (off && (off == rxd_count[nic->rxd_mode])) {
2425
			mac_control->rings[ring_no].rx_curr_put_info.
L
Linus Torvalds 已提交
2426
			    block_index++;
2427 2428 2429 2430 2431 2432 2433 2434 2435
			if (mac_control->rings[ring_no].rx_curr_put_info.
			    block_index == mac_control->rings[ring_no].
					block_count)
				mac_control->rings[ring_no].rx_curr_put_info.
					block_index = 0;
			block_no = mac_control->rings[ring_no].
					rx_curr_put_info.block_index;
			if (off == rxd_count[nic->rxd_mode])
				off = 0;
2436
			mac_control->rings[ring_no].rx_curr_put_info.
2437 2438 2439
				offset = off;
			rxdp = mac_control->rings[ring_no].
				rx_blocks[block_no].block_virt_addr;
L
Linus Torvalds 已提交
2440 2441 2442
			DBG_PRINT(INTR_DBG, "%s: Next block at: %p\n",
				  dev->name, rxdp);
		}
2443 2444 2445 2446 2447 2448 2449 2450 2451
		if(!napi) {
			spin_lock_irqsave(&nic->put_lock, flags);
			mac_control->rings[ring_no].put_pos =
			(block_no * (rxd_count[nic->rxd_mode] + 1)) + off;
			spin_unlock_irqrestore(&nic->put_lock, flags);
		} else {
			mac_control->rings[ring_no].put_pos =
			(block_no * (rxd_count[nic->rxd_mode] + 1)) + off;
		}
2452
		if ((rxdp->Control_1 & RXD_OWN_XENA) &&
2453
			((nic->rxd_mode == RXD_MODE_3B) &&
2454
				(rxdp->Control_2 & BIT(0)))) {
2455
			mac_control->rings[ring_no].rx_curr_put_info.
2456
					offset = off;
L
Linus Torvalds 已提交
2457 2458
			goto end;
		}
2459 2460 2461 2462 2463 2464
		/* calculate size of skb based on ring mode */
		size = dev->mtu + HEADER_ETHERNET_II_802_3_SIZE +
				HEADER_802_2_SIZE + HEADER_SNAP_SIZE;
		if (nic->rxd_mode == RXD_MODE_1)
			size += NET_IP_ALIGN;
		else
2465
			size = dev->mtu + ALIGN_SIZE + BUF0_LEN + 4;
L
Linus Torvalds 已提交
2466

2467 2468 2469
		/* allocate skb */
		skb = dev_alloc_skb(size);
		if(!skb) {
2470 2471
			DBG_PRINT(INFO_DBG, "%s: Out of ", dev->name);
			DBG_PRINT(INFO_DBG, "memory to allocate SKBs\n");
2472 2473 2474 2475
			if (first_rxdp) {
				wmb();
				first_rxdp->Control_1 |= RXD_OWN_XENA;
			}
2476 2477
			nic->mac_control.stats_info->sw_stat. \
				mem_alloc_fail_cnt++;
2478 2479
			return -ENOMEM ;
		}
2480 2481
		nic->mac_control.stats_info->sw_stat.mem_allocated 
			+= skb->truesize;
2482 2483
		if (nic->rxd_mode == RXD_MODE_1) {
			/* 1 buffer mode - normal operation mode */
2484
			rxdp1 = (struct RxD1*)rxdp;
R
Ralf Baechle 已提交
2485
			memset(rxdp, 0, sizeof(struct RxD1));
2486
			skb_reserve(skb, NET_IP_ALIGN);
2487
			rxdp1->Buffer0_ptr = pci_map_single
2488 2489
			    (nic->pdev, skb->data, size - NET_IP_ALIGN,
				PCI_DMA_FROMDEVICE);
2490 2491 2492 2493 2494
			if( (rxdp1->Buffer0_ptr == 0) ||
				(rxdp1->Buffer0_ptr ==
				DMA_ERROR_CODE))
				goto pci_map_failed;

2495 2496
			rxdp->Control_2 = 
				SET_BUFFER0_SIZE_1(size - NET_IP_ALIGN);
2497

2498
		} else if (nic->rxd_mode == RXD_MODE_3B) {
2499
			/*
2500 2501
			 * 2 buffer mode -
			 * 2 buffer mode provides 128
2502 2503 2504
			 * byte aligned receive buffers.
			 */

2505
			rxdp3 = (struct RxD3*)rxdp;
2506
			/* save buffer pointers to avoid frequent dma mapping */
2507 2508
			Buffer0_ptr = rxdp3->Buffer0_ptr;
			Buffer1_ptr = rxdp3->Buffer1_ptr;
R
Ralf Baechle 已提交
2509
			memset(rxdp, 0, sizeof(struct RxD3));
2510
			/* restore the buffer pointers for dma sync*/
2511 2512
			rxdp3->Buffer0_ptr = Buffer0_ptr;
			rxdp3->Buffer1_ptr = Buffer1_ptr;
2513

2514 2515 2516 2517 2518 2519
			ba = &mac_control->rings[ring_no].ba[block_no][off];
			skb_reserve(skb, BUF0_LEN);
			tmp = (u64)(unsigned long) skb->data;
			tmp += ALIGN_SIZE;
			tmp &= ~ALIGN_SIZE;
			skb->data = (void *) (unsigned long)tmp;
2520
			skb_reset_tail_pointer(skb);
2521

2522 2523
			if (!(rxdp3->Buffer0_ptr))
				rxdp3->Buffer0_ptr =
2524
				   pci_map_single(nic->pdev, ba->ba_0, BUF0_LEN,
2525
					   PCI_DMA_FROMDEVICE);
2526 2527
			else
				pci_dma_sync_single_for_device(nic->pdev,
2528
				(dma_addr_t) rxdp3->Buffer0_ptr,
2529
				    BUF0_LEN, PCI_DMA_FROMDEVICE);
2530 2531 2532 2533
			if( (rxdp3->Buffer0_ptr == 0) ||
				(rxdp3->Buffer0_ptr == DMA_ERROR_CODE))
				goto pci_map_failed;

2534 2535 2536 2537 2538
			rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN);
			if (nic->rxd_mode == RXD_MODE_3B) {
				/* Two buffer mode */

				/*
2539
				 * Buffer2 will have L3/L4 header plus
2540 2541
				 * L4 payload
				 */
2542
				rxdp3->Buffer2_ptr = pci_map_single
2543 2544 2545
				(nic->pdev, skb->data, dev->mtu + 4,
						PCI_DMA_FROMDEVICE);

2546 2547 2548 2549 2550
				if( (rxdp3->Buffer2_ptr == 0) ||
					(rxdp3->Buffer2_ptr == DMA_ERROR_CODE))
					goto pci_map_failed;

				rxdp3->Buffer1_ptr =
2551
						pci_map_single(nic->pdev,
2552 2553
						ba->ba_1, BUF1_LEN,
						PCI_DMA_FROMDEVICE);
2554 2555 2556 2557
				if( (rxdp3->Buffer1_ptr == 0) ||
					(rxdp3->Buffer1_ptr == DMA_ERROR_CODE)) {
					pci_unmap_single
						(nic->pdev,
A
Al Viro 已提交
2558
						(dma_addr_t)rxdp3->Buffer2_ptr,
2559 2560 2561
						dev->mtu + 4,
						PCI_DMA_FROMDEVICE);
					goto pci_map_failed;
2562
				}
2563 2564 2565 2566 2567
				rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1);
				rxdp->Control_2 |= SET_BUFFER2_SIZE_3
								(dev->mtu + 4);
			}
			rxdp->Control_2 |= BIT(0);
L
Linus Torvalds 已提交
2568 2569
		}
		rxdp->Host_Control = (unsigned long) (skb);
2570 2571
		if (alloc_tab & ((1 << rxsync_frequency) - 1))
			rxdp->Control_1 |= RXD_OWN_XENA;
L
Linus Torvalds 已提交
2572
		off++;
2573 2574
		if (off == (rxd_count[nic->rxd_mode] + 1))
			off = 0;
2575 2576
		mac_control->rings[ring_no].rx_curr_put_info.offset = off;

2577
		rxdp->Control_2 |= SET_RXD_MARKER;
2578 2579 2580 2581 2582 2583 2584
		if (!(alloc_tab & ((1 << rxsync_frequency) - 1))) {
			if (first_rxdp) {
				wmb();
				first_rxdp->Control_1 |= RXD_OWN_XENA;
			}
			first_rxdp = rxdp;
		}
L
Linus Torvalds 已提交
2585 2586 2587 2588 2589
		atomic_inc(&nic->rx_bufs_left[ring_no]);
		alloc_tab++;
	}

      end:
2590 2591 2592 2593 2594 2595 2596 2597 2598
	/* Transfer ownership of first descriptor to adapter just before
	 * exiting. Before that, use memory barrier so that ownership
	 * and other fields are seen by adapter correctly.
	 */
	if (first_rxdp) {
		wmb();
		first_rxdp->Control_1 |= RXD_OWN_XENA;
	}

L
Linus Torvalds 已提交
2599
	return SUCCESS;
2600 2601 2602 2603 2604
pci_map_failed:
	stats->pci_map_fail_cnt++;
	stats->mem_freed += skb->truesize;
	dev_kfree_skb_irq(skb);
	return -ENOMEM;
L
Linus Torvalds 已提交
2605 2606
}

2607 2608 2609 2610 2611
static void free_rxd_blk(struct s2io_nic *sp, int ring_no, int blk)
{
	struct net_device *dev = sp->dev;
	int j;
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2612 2613 2614
	struct RxD_t *rxdp;
	struct mac_info *mac_control;
	struct buffAdd *ba;
2615 2616
	struct RxD1 *rxdp1;
	struct RxD3 *rxdp3;
2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627

	mac_control = &sp->mac_control;
	for (j = 0 ; j < rxd_count[sp->rxd_mode]; j++) {
		rxdp = mac_control->rings[ring_no].
                                rx_blocks[blk].rxds[j].virt_addr;
		skb = (struct sk_buff *)
			((unsigned long) rxdp->Host_Control);
		if (!skb) {
			continue;
		}
		if (sp->rxd_mode == RXD_MODE_1) {
2628
			rxdp1 = (struct RxD1*)rxdp;
2629
			pci_unmap_single(sp->pdev, (dma_addr_t)
2630 2631 2632 2633 2634 2635
				rxdp1->Buffer0_ptr,
				dev->mtu +
				HEADER_ETHERNET_II_802_3_SIZE
				+ HEADER_802_2_SIZE +
				HEADER_SNAP_SIZE,
				PCI_DMA_FROMDEVICE);
R
Ralf Baechle 已提交
2636
			memset(rxdp, 0, sizeof(struct RxD1));
2637
		} else if(sp->rxd_mode == RXD_MODE_3B) {
2638
			rxdp3 = (struct RxD3*)rxdp;
2639 2640 2641
			ba = &mac_control->rings[ring_no].
				ba[blk][j];
			pci_unmap_single(sp->pdev, (dma_addr_t)
2642 2643
				rxdp3->Buffer0_ptr,
				BUF0_LEN,
2644 2645
				PCI_DMA_FROMDEVICE);
			pci_unmap_single(sp->pdev, (dma_addr_t)
2646 2647
				rxdp3->Buffer1_ptr,
				BUF1_LEN,
2648 2649
				PCI_DMA_FROMDEVICE);
			pci_unmap_single(sp->pdev, (dma_addr_t)
2650 2651
				rxdp3->Buffer2_ptr,
				dev->mtu + 4,
2652
				PCI_DMA_FROMDEVICE);
R
Ralf Baechle 已提交
2653
			memset(rxdp, 0, sizeof(struct RxD3));
2654
		}
2655
		sp->mac_control.stats_info->sw_stat.mem_freed += skb->truesize;
2656 2657 2658 2659 2660
		dev_kfree_skb(skb);
		atomic_dec(&sp->rx_bufs_left[ring_no]);
	}
}

L
Linus Torvalds 已提交
2661
/**
2662
 *  free_rx_buffers - Frees all Rx buffers
L
Linus Torvalds 已提交
2663
 *  @sp: device private variable.
2664
 *  Description:
L
Linus Torvalds 已提交
2665 2666 2667 2668 2669 2670 2671 2672
 *  This function will free all Rx buffers allocated by host.
 *  Return Value:
 *  NONE.
 */

static void free_rx_buffers(struct s2io_nic *sp)
{
	struct net_device *dev = sp->dev;
2673
	int i, blk = 0, buf_cnt = 0;
R
Ralf Baechle 已提交
2674
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2675 2676 2677 2678 2679 2680
	struct config_param *config;

	mac_control = &sp->mac_control;
	config = &sp->config;

	for (i = 0; i < config->rx_ring_num; i++) {
2681 2682
		for (blk = 0; blk < rx_ring_sz[i]; blk++)
			free_rxd_blk(sp,i,blk);
L
Linus Torvalds 已提交
2683

2684 2685 2686 2687
		mac_control->rings[i].rx_curr_put_info.block_index = 0;
		mac_control->rings[i].rx_curr_get_info.block_index = 0;
		mac_control->rings[i].rx_curr_put_info.offset = 0;
		mac_control->rings[i].rx_curr_get_info.offset = 0;
L
Linus Torvalds 已提交
2688 2689 2690 2691 2692 2693 2694 2695
		atomic_set(&sp->rx_bufs_left[i], 0);
		DBG_PRINT(INIT_DBG, "%s:Freed 0x%x Rx Buffers on ring%d\n",
			  dev->name, buf_cnt, i);
	}
}

/**
 * s2io_poll - Rx interrupt handler for NAPI support
2696
 * @napi : pointer to the napi structure.
2697
 * @budget : The number of packets that were budgeted to be processed
L
Linus Torvalds 已提交
2698 2699 2700 2701 2702 2703 2704 2705 2706
 * during  one pass through the 'Poll" function.
 * Description:
 * Comes into picture only if NAPI support has been incorporated. It does
 * the same thing that rx_intr_handler does, but not in a interrupt context
 * also It will process only a given number of packets.
 * Return value:
 * 0 on success and 1 if there are No Rx packets to be processed.
 */

2707
static int s2io_poll(struct napi_struct *napi, int budget)
L
Linus Torvalds 已提交
2708
{
2709 2710
	struct s2io_nic *nic = container_of(napi, struct s2io_nic, napi);
	struct net_device *dev = nic->dev;
2711
	int pkt_cnt = 0, org_pkts_to_process;
R
Ralf Baechle 已提交
2712
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2713
	struct config_param *config;
R
Ralf Baechle 已提交
2714
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
2715
	int i;
L
Linus Torvalds 已提交
2716

2717
	if (!is_s2io_card_up(nic))
2718 2719
		return 0;

L
Linus Torvalds 已提交
2720 2721 2722
	mac_control = &nic->mac_control;
	config = &nic->config;

2723
	nic->pkts_to_process = budget;
2724
	org_pkts_to_process = nic->pkts_to_process;
L
Linus Torvalds 已提交
2725

2726 2727
	writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int);
	readl(&bar0->rx_traffic_int);
L
Linus Torvalds 已提交
2728 2729

	for (i = 0; i < config->rx_ring_num; i++) {
2730 2731 2732 2733 2734
		rx_intr_handler(&mac_control->rings[i]);
		pkt_cnt = org_pkts_to_process - nic->pkts_to_process;
		if (!nic->pkts_to_process) {
			/* Quota for the current iteration has been met */
			goto no_rx;
L
Linus Torvalds 已提交
2735 2736 2737
		}
	}

2738
	netif_rx_complete(dev, napi);
L
Linus Torvalds 已提交
2739 2740 2741

	for (i = 0; i < config->rx_ring_num; i++) {
		if (fill_rx_buffers(nic, i) == -ENOMEM) {
2742 2743
			DBG_PRINT(INFO_DBG, "%s:Out of memory", dev->name);
			DBG_PRINT(INFO_DBG, " in Rx Poll!!\n");
L
Linus Torvalds 已提交
2744 2745 2746 2747
			break;
		}
	}
	/* Re enable the Rx interrupts. */
A
Ananda Raju 已提交
2748
	writeq(0x0, &bar0->rx_traffic_mask);
2749
	readl(&bar0->rx_traffic_mask);
2750
	return pkt_cnt;
L
Linus Torvalds 已提交
2751

2752
no_rx:
L
Linus Torvalds 已提交
2753 2754
	for (i = 0; i < config->rx_ring_num; i++) {
		if (fill_rx_buffers(nic, i) == -ENOMEM) {
2755 2756
			DBG_PRINT(INFO_DBG, "%s:Out of memory", dev->name);
			DBG_PRINT(INFO_DBG, " in Rx Poll!!\n");
L
Linus Torvalds 已提交
2757 2758 2759
			break;
		}
	}
2760
	return pkt_cnt;
L
Linus Torvalds 已提交
2761
}
2762

2763
#ifdef CONFIG_NET_POLL_CONTROLLER
2764
/**
2765
 * s2io_netpoll - netpoll event handler entry point
2766 2767
 * @dev : pointer to the device structure.
 * Description:
2768 2769 2770 2771
 * 	This function will be called by upper layer to check for events on the
 * interface in situations where interrupts are disabled. It is used for
 * specific in-kernel networking tasks, such as remote consoles and kernel
 * debugging over the network (example netdump in RedHat).
2772 2773 2774
 */
static void s2io_netpoll(struct net_device *dev)
{
R
Ralf Baechle 已提交
2775 2776
	struct s2io_nic *nic = dev->priv;
	struct mac_info *mac_control;
2777
	struct config_param *config;
R
Ralf Baechle 已提交
2778
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
2779
	u64 val64 = 0xFFFFFFFFFFFFFFFFULL;
2780 2781
	int i;

2782 2783 2784
	if (pci_channel_offline(nic->pdev))
		return;

2785 2786 2787 2788 2789 2790
	disable_irq(dev->irq);

	mac_control = &nic->mac_control;
	config = &nic->config;

	writeq(val64, &bar0->rx_traffic_int);
2791 2792
	writeq(val64, &bar0->tx_traffic_int);

2793
	/* we need to free up the transmitted skbufs or else netpoll will
2794 2795 2796 2797 2798
	 * run out of skbs and will fail and eventually netpoll application such
	 * as netdump will fail.
	 */
	for (i = 0; i < config->tx_fifo_num; i++)
		tx_intr_handler(&mac_control->fifos[i]);
2799

2800
	/* check for received packet and indicate up to network */
2801 2802 2803 2804 2805
	for (i = 0; i < config->rx_ring_num; i++)
		rx_intr_handler(&mac_control->rings[i]);

	for (i = 0; i < config->rx_ring_num; i++) {
		if (fill_rx_buffers(nic, i) == -ENOMEM) {
2806 2807
			DBG_PRINT(INFO_DBG, "%s:Out of memory", dev->name);
			DBG_PRINT(INFO_DBG, " in Rx Netpoll!!\n");
2808 2809 2810 2811 2812 2813 2814 2815
			break;
		}
	}
	enable_irq(dev->irq);
	return;
}
#endif

2816
/**
L
Linus Torvalds 已提交
2817 2818
 *  rx_intr_handler - Rx interrupt handler
 *  @nic: device private variable.
2819 2820
 *  Description:
 *  If the interrupt is because of a received frame or if the
L
Linus Torvalds 已提交
2821
 *  receive ring contains fresh as yet un-processed frames,this function is
2822 2823
 *  called. It picks out the RxD at which place the last Rx processing had
 *  stopped and sends the skb to the OSM's Rx handler and then increments
L
Linus Torvalds 已提交
2824 2825 2826 2827
 *  the offset.
 *  Return Value:
 *  NONE.
 */
R
Ralf Baechle 已提交
2828
static void rx_intr_handler(struct ring_info *ring_data)
L
Linus Torvalds 已提交
2829
{
R
Ralf Baechle 已提交
2830
	struct s2io_nic *nic = ring_data->nic;
L
Linus Torvalds 已提交
2831
	struct net_device *dev = (struct net_device *) nic->dev;
2832
	int get_block, put_block, put_offset;
R
Ralf Baechle 已提交
2833 2834
	struct rx_curr_get_info get_info, put_info;
	struct RxD_t *rxdp;
L
Linus Torvalds 已提交
2835
	struct sk_buff *skb;
2836
	int pkt_cnt = 0;
2837
	int i;
2838 2839
	struct RxD1* rxdp1;
	struct RxD3* rxdp3;
2840

2841 2842
	spin_lock(&nic->rx_lock);

2843 2844
	get_info = ring_data->rx_curr_get_info;
	get_block = get_info.block_index;
R
Ralf Baechle 已提交
2845
	memcpy(&put_info, &ring_data->rx_curr_put_info, sizeof(put_info));
2846
	put_block = put_info.block_index;
2847
	rxdp = ring_data->rx_blocks[get_block].rxds[get_info.offset].virt_addr;
2848 2849 2850 2851 2852 2853 2854
	if (!napi) {
		spin_lock(&nic->put_lock);
		put_offset = ring_data->put_pos;
		spin_unlock(&nic->put_lock);
	} else
		put_offset = ring_data->put_pos;

2855
	while (RXD_IS_UP2DT(rxdp)) {
2856 2857 2858 2859
		/*
		 * If your are next to put index then it's
		 * FIFO full condition
		 */
2860 2861
		if ((get_block == put_block) &&
		    (get_info.offset + 1) == put_info.offset) {
2862
			DBG_PRINT(INTR_DBG, "%s: Ring Full\n",dev->name);
2863 2864
			break;
		}
2865 2866 2867 2868 2869
		skb = (struct sk_buff *) ((unsigned long)rxdp->Host_Control);
		if (skb == NULL) {
			DBG_PRINT(ERR_DBG, "%s: The skb is ",
				  dev->name);
			DBG_PRINT(ERR_DBG, "Null in Rx Intr\n");
2870
			spin_unlock(&nic->rx_lock);
2871
			return;
L
Linus Torvalds 已提交
2872
		}
2873
		if (nic->rxd_mode == RXD_MODE_1) {
2874
			rxdp1 = (struct RxD1*)rxdp;
2875
			pci_unmap_single(nic->pdev, (dma_addr_t)
2876 2877 2878 2879 2880 2881
				rxdp1->Buffer0_ptr,
				dev->mtu +
				HEADER_ETHERNET_II_802_3_SIZE +
				HEADER_802_2_SIZE +
				HEADER_SNAP_SIZE,
				PCI_DMA_FROMDEVICE);
2882
		} else if (nic->rxd_mode == RXD_MODE_3B) {
2883
			rxdp3 = (struct RxD3*)rxdp;
2884
			pci_dma_sync_single_for_cpu(nic->pdev, (dma_addr_t)
2885 2886
				rxdp3->Buffer0_ptr,
				BUF0_LEN, PCI_DMA_FROMDEVICE);
2887
			pci_unmap_single(nic->pdev, (dma_addr_t)
2888 2889 2890
				rxdp3->Buffer2_ptr,
				dev->mtu + 4,
				PCI_DMA_FROMDEVICE);
2891
		}
2892
		prefetch(skb->data);
2893 2894
		rx_osm_handler(ring_data, rxdp);
		get_info.offset++;
2895 2896 2897 2898
		ring_data->rx_curr_get_info.offset = get_info.offset;
		rxdp = ring_data->rx_blocks[get_block].
				rxds[get_info.offset].virt_addr;
		if (get_info.offset == rxd_count[nic->rxd_mode]) {
2899
			get_info.offset = 0;
2900
			ring_data->rx_curr_get_info.offset = get_info.offset;
2901
			get_block++;
2902 2903 2904
			if (get_block == ring_data->block_count)
				get_block = 0;
			ring_data->rx_curr_get_info.block_index = get_block;
2905 2906
			rxdp = ring_data->rx_blocks[get_block].block_virt_addr;
		}
L
Linus Torvalds 已提交
2907

2908
		nic->pkts_to_process -= 1;
2909
		if ((napi) && (!nic->pkts_to_process))
2910 2911
			break;
		pkt_cnt++;
L
Linus Torvalds 已提交
2912 2913 2914
		if ((indicate_max_pkts) && (pkt_cnt > indicate_max_pkts))
			break;
	}
2915 2916 2917
	if (nic->lro) {
		/* Clear all LRO sessions before exiting */
		for (i=0; i<MAX_LRO_SESSIONS; i++) {
R
Ralf Baechle 已提交
2918
			struct lro *lro = &nic->lro0_n[i];
2919 2920 2921 2922 2923 2924 2925 2926
			if (lro->in_use) {
				update_L3L4_header(nic, lro);
				queue_rx_frame(lro->parent);
				clear_lro_session(lro);
			}
		}
	}

2927
	spin_unlock(&nic->rx_lock);
L
Linus Torvalds 已提交
2928
}
2929 2930

/**
L
Linus Torvalds 已提交
2931 2932
 *  tx_intr_handler - Transmit interrupt handler
 *  @nic : device private variable
2933 2934 2935 2936
 *  Description:
 *  If an interrupt was raised to indicate DMA complete of the
 *  Tx packet, this function is called. It identifies the last TxD
 *  whose buffer was freed and frees all skbs whose data have already
L
Linus Torvalds 已提交
2937 2938 2939 2940 2941
 *  DMA'ed into the NICs internal memory.
 *  Return Value:
 *  NONE
 */

R
Ralf Baechle 已提交
2942
static void tx_intr_handler(struct fifo_info *fifo_data)
L
Linus Torvalds 已提交
2943
{
R
Ralf Baechle 已提交
2944
	struct s2io_nic *nic = fifo_data->nic;
L
Linus Torvalds 已提交
2945
	struct net_device *dev = (struct net_device *) nic->dev;
R
Ralf Baechle 已提交
2946
	struct tx_curr_get_info get_info, put_info;
L
Linus Torvalds 已提交
2947
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2948
	struct TxD *txdlp;
2949
	u8 err_mask;
L
Linus Torvalds 已提交
2950

2951
	get_info = fifo_data->tx_curr_get_info;
R
Ralf Baechle 已提交
2952 2953
	memcpy(&put_info, &fifo_data->tx_curr_put_info, sizeof(put_info));
	txdlp = (struct TxD *) fifo_data->list_info[get_info.offset].
2954 2955 2956 2957 2958 2959 2960 2961
	    list_virt_addr;
	while ((!(txdlp->Control_1 & TXD_LIST_OWN_XENA)) &&
	       (get_info.offset != put_info.offset) &&
	       (txdlp->Host_Control)) {
		/* Check for TxD errors */
		if (txdlp->Control_1 & TXD_T_CODE) {
			unsigned long long err;
			err = txdlp->Control_1 & TXD_T_CODE;
2962 2963 2964 2965
			if (err & 0x1) {
				nic->mac_control.stats_info->sw_stat.
						parity_err_cnt++;
			}
2966 2967

			/* update t_code statistics */
2968 2969
			err_mask = err >> 48;
			switch(err_mask) {
2970 2971 2972 2973 2974 2975 2976 2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994
				case 2:
					nic->mac_control.stats_info->sw_stat.
							tx_buf_abort_cnt++;
				break;

				case 3:
					nic->mac_control.stats_info->sw_stat.
							tx_desc_abort_cnt++;
				break;

				case 7:
					nic->mac_control.stats_info->sw_stat.
							tx_parity_err_cnt++;
				break;

				case 10:
					nic->mac_control.stats_info->sw_stat.
							tx_link_loss_cnt++;
				break;

				case 15:
					nic->mac_control.stats_info->sw_stat.
							tx_list_proc_err_cnt++;
				break;
                        }
2995
		}
L
Linus Torvalds 已提交
2996

A
Ananda Raju 已提交
2997
		skb = s2io_txdl_getskb(fifo_data, txdlp, get_info.offset);
2998 2999 3000 3001 3002 3003 3004 3005 3006
		if (skb == NULL) {
			DBG_PRINT(ERR_DBG, "%s: Null skb ",
			__FUNCTION__);
			DBG_PRINT(ERR_DBG, "in Tx Free Intr\n");
			return;
		}

		/* Updating the statistics block */
		nic->stats.tx_bytes += skb->len;
3007
		nic->mac_control.stats_info->sw_stat.mem_freed += skb->truesize;
3008 3009 3010
		dev_kfree_skb_irq(skb);

		get_info.offset++;
3011 3012
		if (get_info.offset == get_info.fifo_len + 1)
			get_info.offset = 0;
R
Ralf Baechle 已提交
3013
		txdlp = (struct TxD *) fifo_data->list_info
3014 3015 3016
		    [get_info.offset].list_virt_addr;
		fifo_data->tx_curr_get_info.offset =
		    get_info.offset;
L
Linus Torvalds 已提交
3017 3018 3019 3020 3021 3022 3023 3024
	}

	spin_lock(&nic->tx_lock);
	if (netif_queue_stopped(dev))
		netif_wake_queue(dev);
	spin_unlock(&nic->tx_lock);
}

3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037
/**
 *  s2io_mdio_write - Function to write in to MDIO registers
 *  @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
 *  @addr     : address value
 *  @value    : data value
 *  @dev      : pointer to net_device structure
 *  Description:
 *  This function is used to write values to the MDIO registers
 *  NONE
 */
static void s2io_mdio_write(u32 mmd_type, u64 addr, u16 value, struct net_device *dev)
{
	u64 val64 = 0x0;
R
Ralf Baechle 已提交
3038 3039
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074 3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086

	//address transaction
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	//Data transaction
	val64 = 0x0;
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0)
			| MDIO_MDIO_DATA(value)
			| MDIO_OP(MDIO_OP_WRITE_TRANS);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	val64 = 0x0;
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
	| MDIO_MMD_DEV_ADDR(mmd_type)
	| MDIO_MMS_PRT_ADDR(0x0)
	| MDIO_OP(MDIO_OP_READ_TRANS);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

}

/**
 *  s2io_mdio_read - Function to write in to MDIO registers
 *  @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
 *  @addr     : address value
 *  @dev      : pointer to net_device structure
 *  Description:
 *  This function is used to read values to the MDIO registers
 *  NONE
 */
static u64 s2io_mdio_read(u32 mmd_type, u64 addr, struct net_device *dev)
{
	u64 val64 = 0x0;
	u64 rval64 = 0x0;
R
Ralf Baechle 已提交
3087 3088
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
3089 3090 3091 3092 3093 3094 3095 3096 3097 3098 3099 3100 3101 3102 3103 3104 3105 3106 3107 3108 3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125 3126 3127 3128 3129 3130 3131 3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154 3155 3156 3157 3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181 3182 3183 3184 3185 3186 3187 3188 3189 3190

	/* address transaction */
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	/* Data transaction */
	val64 = 0x0;
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0)
			| MDIO_OP(MDIO_OP_READ_TRANS);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	/* Read the value from regs */
	rval64 = readq(&bar0->mdio_control);
	rval64 = rval64 & 0xFFFF0000;
	rval64 = rval64 >> 16;
	return rval64;
}
/**
 *  s2io_chk_xpak_counter - Function to check the status of the xpak counters
 *  @counter      : couter value to be updated
 *  @flag         : flag to indicate the status
 *  @type         : counter type
 *  Description:
 *  This function is to check the status of the xpak counters value
 *  NONE
 */

static void s2io_chk_xpak_counter(u64 *counter, u64 * regs_stat, u32 index, u16 flag, u16 type)
{
	u64 mask = 0x3;
	u64 val64;
	int i;
	for(i = 0; i <index; i++)
		mask = mask << 0x2;

	if(flag > 0)
	{
		*counter = *counter + 1;
		val64 = *regs_stat & mask;
		val64 = val64 >> (index * 0x2);
		val64 = val64 + 1;
		if(val64 == 3)
		{
			switch(type)
			{
			case 1:
				DBG_PRINT(ERR_DBG, "Take Xframe NIC out of "
					  "service. Excessive temperatures may "
					  "result in premature transceiver "
					  "failure \n");
			break;
			case 2:
				DBG_PRINT(ERR_DBG, "Take Xframe NIC out of "
					  "service Excessive bias currents may "
					  "indicate imminent laser diode "
					  "failure \n");
			break;
			case 3:
				DBG_PRINT(ERR_DBG, "Take Xframe NIC out of "
					  "service Excessive laser output "
					  "power may saturate far-end "
					  "receiver\n");
			break;
			default:
				DBG_PRINT(ERR_DBG, "Incorrect XPAK Alarm "
					  "type \n");
			}
			val64 = 0x0;
		}
		val64 = val64 << (index * 0x2);
		*regs_stat = (*regs_stat & (~mask)) | (val64);

	} else {
		*regs_stat = *regs_stat & (~mask);
	}
}

/**
 *  s2io_updt_xpak_counter - Function to update the xpak counters
 *  @dev         : pointer to net_device struct
 *  Description:
 *  This function is to upate the status of the xpak counters value
 *  NONE
 */
static void s2io_updt_xpak_counter(struct net_device *dev)
{
	u16 flag  = 0x0;
	u16 type  = 0x0;
	u16 val16 = 0x0;
	u64 val64 = 0x0;
	u64 addr  = 0x0;

R
Ralf Baechle 已提交
3191 3192
	struct s2io_nic *sp = dev->priv;
	struct stat_block *stat_info = sp->mac_control.stats_info;
3193 3194 3195 3196 3197 3198 3199 3200 3201 3202 3203 3204 3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250 3251 3252 3253 3254 3255 3256 3257 3258 3259 3260 3261 3262 3263 3264 3265 3266 3267 3268 3269 3270 3271 3272 3273 3274

	/* Check the communication with the MDIO slave */
	addr = 0x0000;
	val64 = 0x0;
	val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);
	if((val64 == 0xFFFF) || (val64 == 0x0000))
	{
		DBG_PRINT(ERR_DBG, "ERR: MDIO slave access failed - "
			  "Returned %llx\n", (unsigned long long)val64);
		return;
	}

	/* Check for the expecte value of 2040 at PMA address 0x0000 */
	if(val64 != 0x2040)
	{
		DBG_PRINT(ERR_DBG, "Incorrect value at PMA address 0x0000 - ");
		DBG_PRINT(ERR_DBG, "Returned: %llx- Expected: 0x2040\n",
			  (unsigned long long)val64);
		return;
	}

	/* Loading the DOM register to MDIO register */
	addr = 0xA100;
	s2io_mdio_write(MDIO_MMD_PMA_DEV_ADDR, addr, val16, dev);
	val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);

	/* Reading the Alarm flags */
	addr = 0xA070;
	val64 = 0x0;
	val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);

	flag = CHECKBIT(val64, 0x7);
	type = 1;
	s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_transceiver_temp_high,
				&stat_info->xpak_stat.xpak_regs_stat,
				0x0, flag, type);

	if(CHECKBIT(val64, 0x6))
		stat_info->xpak_stat.alarm_transceiver_temp_low++;

	flag = CHECKBIT(val64, 0x3);
	type = 2;
	s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_laser_bias_current_high,
				&stat_info->xpak_stat.xpak_regs_stat,
				0x2, flag, type);

	if(CHECKBIT(val64, 0x2))
		stat_info->xpak_stat.alarm_laser_bias_current_low++;

	flag = CHECKBIT(val64, 0x1);
	type = 3;
	s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_laser_output_power_high,
				&stat_info->xpak_stat.xpak_regs_stat,
				0x4, flag, type);

	if(CHECKBIT(val64, 0x0))
		stat_info->xpak_stat.alarm_laser_output_power_low++;

	/* Reading the Warning flags */
	addr = 0xA074;
	val64 = 0x0;
	val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);

	if(CHECKBIT(val64, 0x7))
		stat_info->xpak_stat.warn_transceiver_temp_high++;

	if(CHECKBIT(val64, 0x6))
		stat_info->xpak_stat.warn_transceiver_temp_low++;

	if(CHECKBIT(val64, 0x3))
		stat_info->xpak_stat.warn_laser_bias_current_high++;

	if(CHECKBIT(val64, 0x2))
		stat_info->xpak_stat.warn_laser_bias_current_low++;

	if(CHECKBIT(val64, 0x1))
		stat_info->xpak_stat.warn_laser_output_power_high++;

	if(CHECKBIT(val64, 0x0))
		stat_info->xpak_stat.warn_laser_output_power_low++;
}

3275
/**
L
Linus Torvalds 已提交
3276
 *  wait_for_cmd_complete - waits for a command to complete.
3277
 *  @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
3278
 *  s2io_nic structure.
3279 3280 3281
 *  Description: Function that waits for a command to Write into RMAC
 *  ADDR DATA registers to be completed and returns either success or
 *  error depending on whether the command was complete or not.
L
Linus Torvalds 已提交
3282 3283 3284 3285
 *  Return value:
 *   SUCCESS on success and FAILURE on failure.
 */

3286 3287
static int wait_for_cmd_complete(void __iomem *addr, u64 busy_bit,
				int bit_state)
L
Linus Torvalds 已提交
3288
{
3289
	int ret = FAILURE, cnt = 0, delay = 1;
L
Linus Torvalds 已提交
3290 3291
	u64 val64;

3292 3293 3294 3295
	if ((bit_state != S2IO_BIT_RESET) && (bit_state != S2IO_BIT_SET))
		return FAILURE;

	do {
A
Ananda Raju 已提交
3296
		val64 = readq(addr);
3297 3298 3299 3300 3301 3302 3303 3304 3305 3306
		if (bit_state == S2IO_BIT_RESET) {
			if (!(val64 & busy_bit)) {
				ret = SUCCESS;
				break;
			}
		} else {
			if (!(val64 & busy_bit)) {
				ret = SUCCESS;
				break;
			}
L
Linus Torvalds 已提交
3307
		}
A
Ananda Raju 已提交
3308 3309

		if(in_interrupt())
3310
			mdelay(delay);
A
Ananda Raju 已提交
3311
		else
3312
			msleep(delay);
A
Ananda Raju 已提交
3313

3314 3315 3316
		if (++cnt >= 10)
			delay = 50;
	} while (cnt < 20);
L
Linus Torvalds 已提交
3317 3318
	return ret;
}
3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337
/*
 * check_pci_device_id - Checks if the device id is supported
 * @id : device id
 * Description: Function to check if the pci device id is supported by driver.
 * Return value: Actual device id if supported else PCI_ANY_ID
 */
static u16 check_pci_device_id(u16 id)
{
	switch (id) {
	case PCI_DEVICE_ID_HERC_WIN:
	case PCI_DEVICE_ID_HERC_UNI:
		return XFRAME_II_DEVICE;
	case PCI_DEVICE_ID_S2IO_UNI:
	case PCI_DEVICE_ID_S2IO_WIN:
		return XFRAME_I_DEVICE;
	default:
		return PCI_ANY_ID;
	}
}
L
Linus Torvalds 已提交
3338

3339 3340
/**
 *  s2io_reset - Resets the card.
L
Linus Torvalds 已提交
3341 3342
 *  @sp : private member of the device structure.
 *  Description: Function to Reset the card. This function then also
3343
 *  restores the previously saved PCI configuration space registers as
L
Linus Torvalds 已提交
3344 3345 3346 3347 3348
 *  the card reset also resets the configuration space.
 *  Return value:
 *  void.
 */

R
Ralf Baechle 已提交
3349
static void s2io_reset(struct s2io_nic * sp)
L
Linus Torvalds 已提交
3350
{
R
Ralf Baechle 已提交
3351
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
3352
	u64 val64;
3353
	u16 subid, pci_cmd;
3354 3355
	int i;
	u16 val16;
3356 3357 3358
	unsigned long long up_cnt, down_cnt, up_time, down_time, reset_cnt;
	unsigned long long mem_alloc_cnt, mem_free_cnt, watchdog_cnt;

3359 3360
	DBG_PRINT(INIT_DBG,"%s - Resetting XFrame card %s\n",
			__FUNCTION__, sp->dev->name);
L
Linus Torvalds 已提交
3361

3362
	/* Back up  the PCI-X CMD reg, dont want to lose MMRBC, OST settings */
3363
	pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, &(pci_cmd));
3364

L
Linus Torvalds 已提交
3365 3366
	val64 = SW_RESET_ALL;
	writeq(val64, &bar0->sw_reset);
A
Ananda Raju 已提交
3367 3368 3369
	if (strstr(sp->product_name, "CX4")) {
		msleep(750);
	}
3370 3371
	msleep(250);
	for (i = 0; i < S2IO_MAX_PCI_CONFIG_SPACE_REINIT; i++) {
L
Linus Torvalds 已提交
3372

3373 3374 3375 3376 3377 3378 3379
		/* Restore the PCI state saved during initialization. */
		pci_restore_state(sp->pdev);
		pci_read_config_word(sp->pdev, 0x2, &val16);
		if (check_pci_device_id(val16) != (u16)PCI_ANY_ID)
			break;
		msleep(200);
	}
L
Linus Torvalds 已提交
3380

3381 3382 3383 3384 3385 3386 3387
	if (check_pci_device_id(val16) == (u16)PCI_ANY_ID) {
		DBG_PRINT(ERR_DBG,"%s SW_Reset failed!\n", __FUNCTION__);
	}

	pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER, pci_cmd);

	s2io_init_pci(sp);
L
Linus Torvalds 已提交
3388

3389 3390 3391
	/* Set swapper to enable I/O register access */
	s2io_set_swapper(sp);

3392 3393 3394
	/* Restore the MSIX table entries from local variables */
	restore_xmsi_data(sp);

3395
	/* Clear certain PCI/PCI-X fields after reset */
3396
	if (sp->device_type == XFRAME_II_DEVICE) {
3397
		/* Clear "detected parity error" bit */
3398
		pci_write_config_word(sp->pdev, PCI_STATUS, 0x8000);
3399

3400 3401
		/* Clearing PCIX Ecc status register */
		pci_write_config_dword(sp->pdev, 0x68, 0x7C);
3402

3403 3404 3405
		/* Clearing PCI_STATUS error reflected here */
		writeq(BIT(62), &bar0->txpic_int_reg);
	}
3406

3407 3408
	/* Reset device statistics maintained by OS */
	memset(&sp->stats, 0, sizeof (struct net_device_stats));
3409 3410 3411 3412 3413
	
	up_cnt = sp->mac_control.stats_info->sw_stat.link_up_cnt;
	down_cnt = sp->mac_control.stats_info->sw_stat.link_down_cnt;
	up_time = sp->mac_control.stats_info->sw_stat.link_up_time;
	down_time = sp->mac_control.stats_info->sw_stat.link_down_time;
3414
	reset_cnt = sp->mac_control.stats_info->sw_stat.soft_reset_cnt;
3415 3416 3417 3418
	mem_alloc_cnt = sp->mac_control.stats_info->sw_stat.mem_allocated;
	mem_free_cnt = sp->mac_control.stats_info->sw_stat.mem_freed;
	watchdog_cnt = sp->mac_control.stats_info->sw_stat.watchdog_timer_cnt;
	/* save link up/down time/cnt, reset/memory/watchdog cnt */
3419
	memset(sp->mac_control.stats_info, 0, sizeof(struct stat_block));
3420 3421 3422 3423 3424
	/* restore link up/down time/cnt, reset/memory/watchdog cnt */
	sp->mac_control.stats_info->sw_stat.link_up_cnt = up_cnt;
	sp->mac_control.stats_info->sw_stat.link_down_cnt = down_cnt;
	sp->mac_control.stats_info->sw_stat.link_up_time = up_time;
	sp->mac_control.stats_info->sw_stat.link_down_time = down_time;
3425
	sp->mac_control.stats_info->sw_stat.soft_reset_cnt = reset_cnt;
3426 3427 3428
	sp->mac_control.stats_info->sw_stat.mem_allocated = mem_alloc_cnt;
	sp->mac_control.stats_info->sw_stat.mem_freed = mem_free_cnt;
	sp->mac_control.stats_info->sw_stat.watchdog_timer_cnt = watchdog_cnt;
3429

L
Linus Torvalds 已提交
3430 3431
	/* SXE-002: Configure link and activity LED to turn it off */
	subid = sp->pdev->subsystem_device;
3432 3433
	if (((subid & 0xFF) >= 0x07) &&
	    (sp->device_type == XFRAME_I_DEVICE)) {
L
Linus Torvalds 已提交
3434 3435 3436 3437
		val64 = readq(&bar0->gpio_control);
		val64 |= 0x0000800000000000ULL;
		writeq(val64, &bar0->gpio_control);
		val64 = 0x0411040400000000ULL;
3438
		writeq(val64, (void __iomem *)bar0 + 0x2700);
L
Linus Torvalds 已提交
3439 3440
	}

3441 3442 3443 3444 3445 3446 3447 3448 3449
	/*
	 * Clear spurious ECC interrupts that would have occured on
	 * XFRAME II cards after reset.
	 */
	if (sp->device_type == XFRAME_II_DEVICE) {
		val64 = readq(&bar0->pcc_err_reg);
		writeq(val64, &bar0->pcc_err_reg);
	}

3450 3451 3452
	/* restore the previously assigned mac address */
	s2io_set_mac_addr(sp->dev, (u8 *)&sp->def_mac_addr[0].mac_addr);

L
Linus Torvalds 已提交
3453 3454 3455 3456
	sp->device_enabled_once = FALSE;
}

/**
3457 3458
 *  s2io_set_swapper - to set the swapper controle on the card
 *  @sp : private member of the device structure,
L
Linus Torvalds 已提交
3459
 *  pointer to the s2io_nic structure.
3460
 *  Description: Function to set the swapper control on the card
L
Linus Torvalds 已提交
3461 3462 3463 3464 3465
 *  correctly depending on the 'endianness' of the system.
 *  Return value:
 *  SUCCESS on success and FAILURE on failure.
 */

R
Ralf Baechle 已提交
3466
static int s2io_set_swapper(struct s2io_nic * sp)
L
Linus Torvalds 已提交
3467 3468
{
	struct net_device *dev = sp->dev;
R
Ralf Baechle 已提交
3469
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
3470 3471
	u64 val64, valt, valr;

3472
	/*
L
Linus Torvalds 已提交
3473 3474 3475 3476 3477 3478 3479 3480 3481 3482 3483 3484 3485 3486 3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497 3498 3499 3500 3501 3502 3503 3504 3505 3506 3507 3508 3509 3510 3511 3512 3513 3514 3515 3516 3517 3518 3519 3520 3521 3522 3523
	 * Set proper endian settings and verify the same by reading
	 * the PIF Feed-back register.
	 */

	val64 = readq(&bar0->pif_rd_swapper_fb);
	if (val64 != 0x0123456789ABCDEFULL) {
		int i = 0;
		u64 value[] = { 0xC30000C3C30000C3ULL,   /* FE=1, SE=1 */
				0x8100008181000081ULL,  /* FE=1, SE=0 */
				0x4200004242000042ULL,  /* FE=0, SE=1 */
				0};                     /* FE=0, SE=0 */

		while(i<4) {
			writeq(value[i], &bar0->swapper_ctrl);
			val64 = readq(&bar0->pif_rd_swapper_fb);
			if (val64 == 0x0123456789ABCDEFULL)
				break;
			i++;
		}
		if (i == 4) {
			DBG_PRINT(ERR_DBG, "%s: Endian settings are wrong, ",
				dev->name);
			DBG_PRINT(ERR_DBG, "feedback read %llx\n",
				(unsigned long long) val64);
			return FAILURE;
		}
		valr = value[i];
	} else {
		valr = readq(&bar0->swapper_ctrl);
	}

	valt = 0x0123456789ABCDEFULL;
	writeq(valt, &bar0->xmsi_address);
	val64 = readq(&bar0->xmsi_address);

	if(val64 != valt) {
		int i = 0;
		u64 value[] = { 0x00C3C30000C3C300ULL,  /* FE=1, SE=1 */
				0x0081810000818100ULL,  /* FE=1, SE=0 */
				0x0042420000424200ULL,  /* FE=0, SE=1 */
				0};                     /* FE=0, SE=0 */

		while(i<4) {
			writeq((value[i] | valr), &bar0->swapper_ctrl);
			writeq(valt, &bar0->xmsi_address);
			val64 = readq(&bar0->xmsi_address);
			if(val64 == valt)
				break;
			i++;
		}
		if(i == 4) {
3524
			unsigned long long x = val64;
L
Linus Torvalds 已提交
3525
			DBG_PRINT(ERR_DBG, "Write failed, Xmsi_addr ");
3526
			DBG_PRINT(ERR_DBG, "reads:0x%llx\n", x);
L
Linus Torvalds 已提交
3527 3528 3529 3530 3531 3532 3533
			return FAILURE;
		}
	}
	val64 = readq(&bar0->swapper_ctrl);
	val64 &= 0xFFFF000000000000ULL;

#ifdef  __BIG_ENDIAN
3534 3535
	/*
	 * The device by default set to a big endian format, so a
L
Linus Torvalds 已提交
3536 3537 3538 3539 3540 3541 3542 3543 3544 3545 3546 3547
	 * big endian driver need not set anything.
	 */
	val64 |= (SWAPPER_CTRL_TXP_FE |
		 SWAPPER_CTRL_TXP_SE |
		 SWAPPER_CTRL_TXD_R_FE |
		 SWAPPER_CTRL_TXD_W_FE |
		 SWAPPER_CTRL_TXF_R_FE |
		 SWAPPER_CTRL_RXD_R_FE |
		 SWAPPER_CTRL_RXD_W_FE |
		 SWAPPER_CTRL_RXF_W_FE |
		 SWAPPER_CTRL_XMSI_FE |
		 SWAPPER_CTRL_STATS_FE | SWAPPER_CTRL_STATS_SE);
3548
	if (sp->config.intr_type == INTA)
3549
		val64 |= SWAPPER_CTRL_XMSI_SE;
L
Linus Torvalds 已提交
3550 3551
	writeq(val64, &bar0->swapper_ctrl);
#else
3552
	/*
L
Linus Torvalds 已提交
3553
	 * Initially we enable all bits to make it accessible by the
3554
	 * driver, then we selectively enable only those bits that
L
Linus Torvalds 已提交
3555 3556 3557 3558 3559 3560 3561 3562 3563 3564 3565 3566 3567 3568 3569 3570
	 * we want to set.
	 */
	val64 |= (SWAPPER_CTRL_TXP_FE |
		 SWAPPER_CTRL_TXP_SE |
		 SWAPPER_CTRL_TXD_R_FE |
		 SWAPPER_CTRL_TXD_R_SE |
		 SWAPPER_CTRL_TXD_W_FE |
		 SWAPPER_CTRL_TXD_W_SE |
		 SWAPPER_CTRL_TXF_R_FE |
		 SWAPPER_CTRL_RXD_R_FE |
		 SWAPPER_CTRL_RXD_R_SE |
		 SWAPPER_CTRL_RXD_W_FE |
		 SWAPPER_CTRL_RXD_W_SE |
		 SWAPPER_CTRL_RXF_W_FE |
		 SWAPPER_CTRL_XMSI_FE |
		 SWAPPER_CTRL_STATS_FE | SWAPPER_CTRL_STATS_SE);
3571
	if (sp->config.intr_type == INTA)
3572
		val64 |= SWAPPER_CTRL_XMSI_SE;
L
Linus Torvalds 已提交
3573 3574 3575 3576
	writeq(val64, &bar0->swapper_ctrl);
#endif
	val64 = readq(&bar0->swapper_ctrl);

3577 3578
	/*
	 * Verifying if endian settings are accurate by reading a
L
Linus Torvalds 已提交
3579 3580 3581 3582 3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593
	 * feedback register.
	 */
	val64 = readq(&bar0->pif_rd_swapper_fb);
	if (val64 != 0x0123456789ABCDEFULL) {
		/* Endian settings are incorrect, calls for another dekko. */
		DBG_PRINT(ERR_DBG, "%s: Endian settings are wrong, ",
			  dev->name);
		DBG_PRINT(ERR_DBG, "feedback read %llx\n",
			  (unsigned long long) val64);
		return FAILURE;
	}

	return SUCCESS;
}

R
Ralf Baechle 已提交
3594
static int wait_for_msix_trans(struct s2io_nic *nic, int i)
3595
{
R
Ralf Baechle 已提交
3596
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3597 3598 3599 3600 3601 3602 3603 3604 3605 3606 3607 3608 3609 3610 3611 3612 3613 3614
	u64 val64;
	int ret = 0, cnt = 0;

	do {
		val64 = readq(&bar0->xmsi_access);
		if (!(val64 & BIT(15)))
			break;
		mdelay(1);
		cnt++;
	} while(cnt < 5);
	if (cnt == 5) {
		DBG_PRINT(ERR_DBG, "XMSI # %d Access failed\n", i);
		ret = 1;
	}

	return ret;
}

R
Ralf Baechle 已提交
3615
static void restore_xmsi_data(struct s2io_nic *nic)
3616
{
R
Ralf Baechle 已提交
3617
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3618 3619 3620
	u64 val64;
	int i;

3621
	for (i=0; i < MAX_REQUESTED_MSI_X; i++) {
3622 3623 3624 3625 3626 3627 3628 3629 3630 3631 3632
		writeq(nic->msix_info[i].addr, &bar0->xmsi_address);
		writeq(nic->msix_info[i].data, &bar0->xmsi_data);
		val64 = (BIT(7) | BIT(15) | vBIT(i, 26, 6));
		writeq(val64, &bar0->xmsi_access);
		if (wait_for_msix_trans(nic, i)) {
			DBG_PRINT(ERR_DBG, "failed in %s\n", __FUNCTION__);
			continue;
		}
	}
}

R
Ralf Baechle 已提交
3633
static void store_xmsi_data(struct s2io_nic *nic)
3634
{
R
Ralf Baechle 已提交
3635
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3636 3637 3638 3639
	u64 val64, addr, data;
	int i;

	/* Store and display */
3640
	for (i=0; i < MAX_REQUESTED_MSI_X; i++) {
3641 3642 3643 3644 3645 3646 3647 3648 3649 3650 3651 3652 3653 3654 3655
		val64 = (BIT(15) | vBIT(i, 26, 6));
		writeq(val64, &bar0->xmsi_access);
		if (wait_for_msix_trans(nic, i)) {
			DBG_PRINT(ERR_DBG, "failed in %s\n", __FUNCTION__);
			continue;
		}
		addr = readq(&bar0->xmsi_address);
		data = readq(&bar0->xmsi_data);
		if (addr && data) {
			nic->msix_info[i].addr = addr;
			nic->msix_info[i].data = data;
		}
	}
}

R
Ralf Baechle 已提交
3656
static int s2io_enable_msi_x(struct s2io_nic *nic)
3657
{
R
Ralf Baechle 已提交
3658
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3659 3660 3661 3662
	u64 tx_mat, rx_mat;
	u16 msi_control; /* Temp variable */
	int ret, i, j, msix_indx = 1;

3663
	nic->entries = kcalloc(MAX_REQUESTED_MSI_X, sizeof(struct msix_entry),
3664
			       GFP_KERNEL);
3665
	if (!nic->entries) {
3666 3667
		DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n", \
			__FUNCTION__);
3668
		nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
3669 3670
		return -ENOMEM;
	}
3671 3672
	nic->mac_control.stats_info->sw_stat.mem_allocated 
		+= (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry));
3673 3674

	nic->s2io_entries =
3675
		kcalloc(MAX_REQUESTED_MSI_X, sizeof(struct s2io_msix_entry),
3676
				   GFP_KERNEL);
3677
	if (!nic->s2io_entries) {
3678 3679
		DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n", 
			__FUNCTION__);
3680
		nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
3681
		kfree(nic->entries);
3682 3683
		nic->mac_control.stats_info->sw_stat.mem_freed 
			+= (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry));
3684 3685
		return -ENOMEM;
	}
3686 3687
	 nic->mac_control.stats_info->sw_stat.mem_allocated 
		+= (MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry));
3688 3689 3690 3691 3692 3693 3694 3695 3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708

	for (i=0; i< MAX_REQUESTED_MSI_X; i++) {
		nic->entries[i].entry = i;
		nic->s2io_entries[i].entry = i;
		nic->s2io_entries[i].arg = NULL;
		nic->s2io_entries[i].in_use = 0;
	}

	tx_mat = readq(&bar0->tx_mat0_n[0]);
	for (i=0; i<nic->config.tx_fifo_num; i++, msix_indx++) {
		tx_mat |= TX_MAT_SET(i, msix_indx);
		nic->s2io_entries[msix_indx].arg = &nic->mac_control.fifos[i];
		nic->s2io_entries[msix_indx].type = MSIX_FIFO_TYPE;
		nic->s2io_entries[msix_indx].in_use = MSIX_FLG;
	}
	writeq(tx_mat, &bar0->tx_mat0_n[0]);

	if (!nic->config.bimodal) {
		rx_mat = readq(&bar0->rx_mat);
		for (j=0; j<nic->config.rx_ring_num; j++, msix_indx++) {
			rx_mat |= RX_MAT_SET(j, msix_indx);
3709 3710
			nic->s2io_entries[msix_indx].arg 
				= &nic->mac_control.rings[j];
3711 3712 3713 3714 3715 3716 3717 3718
			nic->s2io_entries[msix_indx].type = MSIX_RING_TYPE;
			nic->s2io_entries[msix_indx].in_use = MSIX_FLG;
		}
		writeq(rx_mat, &bar0->rx_mat);
	} else {
		tx_mat = readq(&bar0->tx_mat0_n[7]);
		for (j=0; j<nic->config.rx_ring_num; j++, msix_indx++) {
			tx_mat |= TX_MAT_SET(i, msix_indx);
3719 3720
			nic->s2io_entries[msix_indx].arg 
				= &nic->mac_control.rings[j];
3721 3722 3723 3724 3725 3726
			nic->s2io_entries[msix_indx].type = MSIX_RING_TYPE;
			nic->s2io_entries[msix_indx].in_use = MSIX_FLG;
		}
		writeq(tx_mat, &bar0->tx_mat0_n[7]);
	}

A
Ananda Raju 已提交
3727
	nic->avail_msix_vectors = 0;
3728
	ret = pci_enable_msix(nic->pdev, nic->entries, MAX_REQUESTED_MSI_X);
A
Ananda Raju 已提交
3729 3730 3731 3732 3733
	/* We fail init if error or we get less vectors than min required */
	if (ret >= (nic->config.tx_fifo_num + nic->config.rx_ring_num + 1)) {
		nic->avail_msix_vectors = ret;
		ret = pci_enable_msix(nic->pdev, nic->entries, ret);
	}
3734 3735 3736
	if (ret) {
		DBG_PRINT(ERR_DBG, "%s: Enabling MSIX failed\n", nic->dev->name);
		kfree(nic->entries);
3737 3738
		nic->mac_control.stats_info->sw_stat.mem_freed 
			+= (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry));
3739
		kfree(nic->s2io_entries);
3740 3741
		nic->mac_control.stats_info->sw_stat.mem_freed 
		+= (MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry));
3742 3743
		nic->entries = NULL;
		nic->s2io_entries = NULL;
A
Ananda Raju 已提交
3744
		nic->avail_msix_vectors = 0;
3745 3746
		return -ENOMEM;
	}
A
Ananda Raju 已提交
3747 3748
	if (!nic->avail_msix_vectors)
		nic->avail_msix_vectors = MAX_REQUESTED_MSI_X;
3749 3750 3751 3752 3753 3754 3755 3756 3757 3758 3759 3760

	/*
	 * To enable MSI-X, MSI also needs to be enabled, due to a bug
	 * in the herc NIC. (Temp change, needs to be removed later)
	 */
	pci_read_config_word(nic->pdev, 0x42, &msi_control);
	msi_control |= 0x1; /* Enable MSI */
	pci_write_config_word(nic->pdev, 0x42, msi_control);

	return 0;
}

3761 3762 3763 3764 3765 3766 3767 3768 3769 3770 3771 3772 3773 3774 3775 3776 3777 3778 3779 3780 3781 3782 3783 3784 3785 3786 3787 3788 3789 3790 3791 3792 3793 3794 3795 3796 3797 3798 3799 3800 3801 3802 3803 3804 3805 3806 3807 3808 3809 3810 3811 3812 3813
/* Handle software interrupt used during MSI(X) test */
static irqreturn_t __devinit s2io_test_intr(int irq, void *dev_id)
{
	struct s2io_nic *sp = dev_id;

	sp->msi_detected = 1;
	wake_up(&sp->msi_wait);

	return IRQ_HANDLED;
}

/* Test interrupt path by forcing a a software IRQ */
static int __devinit s2io_test_msi(struct s2io_nic *sp)
{
	struct pci_dev *pdev = sp->pdev;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
	int err;
	u64 val64, saved64;

	err = request_irq(sp->entries[1].vector, s2io_test_intr, 0,
			sp->name, sp);
	if (err) {
		DBG_PRINT(ERR_DBG, "%s: PCI %s: cannot assign irq %d\n",
		       sp->dev->name, pci_name(pdev), pdev->irq);
		return err;
	}

	init_waitqueue_head (&sp->msi_wait);
	sp->msi_detected = 0;

	saved64 = val64 = readq(&bar0->scheduled_int_ctrl);
	val64 |= SCHED_INT_CTRL_ONE_SHOT;
	val64 |= SCHED_INT_CTRL_TIMER_EN;
	val64 |= SCHED_INT_CTRL_INT2MSI(1);
	writeq(val64, &bar0->scheduled_int_ctrl);

	wait_event_timeout(sp->msi_wait, sp->msi_detected, HZ/10);

	if (!sp->msi_detected) {
		/* MSI(X) test failed, go back to INTx mode */
		DBG_PRINT(ERR_DBG, "%s: PCI %s: No interrupt was generated"
			"using MSI(X) during test\n", sp->dev->name,
			pci_name(pdev));

		err = -EOPNOTSUPP;
	}

	free_irq(sp->entries[1].vector, sp);

	writeq(saved64, &bar0->scheduled_int_ctrl);

	return err;
}
L
Linus Torvalds 已提交
3814 3815 3816 3817
/* ********************************************************* *
 * Functions defined below concern the OS part of the driver *
 * ********************************************************* */

3818
/**
L
Linus Torvalds 已提交
3819 3820 3821 3822 3823
 *  s2io_open - open entry point of the driver
 *  @dev : pointer to the device structure.
 *  Description:
 *  This function is the open entry point of the driver. It mainly calls a
 *  function to allocate Rx buffers and inserts them into the buffer
3824
 *  descriptors and then enables the Rx part of the NIC.
L
Linus Torvalds 已提交
3825 3826 3827 3828 3829
 *  Return value:
 *  0 on success and an appropriate (-)ve integer as defined in errno.h
 *   file on failure.
 */

3830
static int s2io_open(struct net_device *dev)
L
Linus Torvalds 已提交
3831
{
R
Ralf Baechle 已提交
3832
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
3833 3834
	int err = 0;

3835 3836
	/*
	 * Make sure you have link off by default every time
L
Linus Torvalds 已提交
3837 3838 3839
	 * Nic is initialized
	 */
	netif_carrier_off(dev);
3840
	sp->last_link_state = 0;
L
Linus Torvalds 已提交
3841

3842 3843
	napi_enable(&sp->napi);

3844
	if (sp->config.intr_type == MSI_X) {
3845 3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856 3857 3858 3859 3860 3861 3862 3863 3864 3865 3866 3867 3868 3869 3870 3871 3872 3873 3874 3875
		int ret = s2io_enable_msi_x(sp);

		if (!ret) {
			u16 msi_control;

			ret = s2io_test_msi(sp);

			/* rollback MSI-X, will re-enable during add_isr() */
			kfree(sp->entries);
			sp->mac_control.stats_info->sw_stat.mem_freed +=
				(MAX_REQUESTED_MSI_X *
				sizeof(struct msix_entry));
			kfree(sp->s2io_entries);
			sp->mac_control.stats_info->sw_stat.mem_freed +=
				(MAX_REQUESTED_MSI_X *
				sizeof(struct s2io_msix_entry));
			sp->entries = NULL;
			sp->s2io_entries = NULL;

			pci_read_config_word(sp->pdev, 0x42, &msi_control);
			msi_control &= 0xFFFE; /* Disable MSI */
			pci_write_config_word(sp->pdev, 0x42, msi_control);

			pci_disable_msix(sp->pdev);

		}
		if (ret) {

			DBG_PRINT(ERR_DBG,
			  "%s: MSI-X requested but failed to enable\n",
			  dev->name);
3876
			sp->config.intr_type = INTA;
3877 3878 3879
		}
	}

3880
	/* NAPI doesn't work well with MSI(X) */
3881
	 if (sp->config.intr_type != INTA) {
3882 3883 3884 3885
		if(sp->config.napi)
			sp->config.napi = 0;
	}

L
Linus Torvalds 已提交
3886
	/* Initialize H/W and enable interrupts */
A
Ananda Raju 已提交
3887 3888
	err = s2io_card_up(sp);
	if (err) {
L
Linus Torvalds 已提交
3889 3890
		DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
			  dev->name);
A
Ananda Raju 已提交
3891
		goto hw_init_failed;
L
Linus Torvalds 已提交
3892 3893 3894 3895
	}

	if (s2io_set_mac_addr(dev, dev->dev_addr) == FAILURE) {
		DBG_PRINT(ERR_DBG, "Set Mac Address Failed\n");
A
Ananda Raju 已提交
3896
		s2io_card_down(sp);
3897
		err = -ENODEV;
A
Ananda Raju 已提交
3898
		goto hw_init_failed;
L
Linus Torvalds 已提交
3899 3900 3901 3902
	}

	netif_start_queue(dev);
	return 0;
3903 3904

hw_init_failed:
3905
	napi_disable(&sp->napi);
3906
	if (sp->config.intr_type == MSI_X) {
3907
		if (sp->entries) {
3908
			kfree(sp->entries);
3909 3910 3911 3912
			sp->mac_control.stats_info->sw_stat.mem_freed 
			+= (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry));
		}
		if (sp->s2io_entries) {
3913
			kfree(sp->s2io_entries);
3914 3915 3916
			sp->mac_control.stats_info->sw_stat.mem_freed 
			+= (MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry));
		}
3917
	}
3918
	return err;
L
Linus Torvalds 已提交
3919 3920 3921 3922 3923 3924 3925 3926 3927 3928 3929 3930 3931 3932 3933
}

/**
 *  s2io_close -close entry point of the driver
 *  @dev : device pointer.
 *  Description:
 *  This is the stop entry point of the driver. It needs to undo exactly
 *  whatever was done by the open entry point,thus it's usually referred to
 *  as the close function.Among other things this function mainly stops the
 *  Rx side of the NIC and frees all the Rx buffers in the Rx rings.
 *  Return value:
 *  0 on success and an appropriate (-)ve integer as defined in errno.h
 *  file on failure.
 */

3934
static int s2io_close(struct net_device *dev)
L
Linus Torvalds 已提交
3935
{
R
Ralf Baechle 已提交
3936
	struct s2io_nic *sp = dev->priv;
3937

L
Linus Torvalds 已提交
3938
	netif_stop_queue(dev);
3939
	napi_disable(&sp->napi);
L
Linus Torvalds 已提交
3940
	/* Reset card, kill tasklet and free Tx and Rx buffers. */
A
Ananda Raju 已提交
3941
	s2io_card_down(sp);
3942

L
Linus Torvalds 已提交
3943 3944 3945 3946 3947 3948 3949 3950 3951 3952 3953 3954 3955 3956 3957 3958
	return 0;
}

/**
 *  s2io_xmit - Tx entry point of te driver
 *  @skb : the socket buffer containing the Tx data.
 *  @dev : device pointer.
 *  Description :
 *  This function is the Tx entry point of the driver. S2IO NIC supports
 *  certain protocol assist features on Tx side, namely  CSO, S/G, LSO.
 *  NOTE: when device cant queue the pkt,just the trans_start variable will
 *  not be upadted.
 *  Return value:
 *  0 on success & 1 on failure.
 */

3959
static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
L
Linus Torvalds 已提交
3960
{
R
Ralf Baechle 已提交
3961
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
3962 3963
	u16 frg_cnt, frg_len, i, queue, queue_len, put_off, get_off;
	register u64 val64;
R
Ralf Baechle 已提交
3964 3965
	struct TxD *txdp;
	struct TxFIFO_element __iomem *tx_fifo;
L
Linus Torvalds 已提交
3966
	unsigned long flags;
3967 3968
	u16 vlan_tag = 0;
	int vlan_priority = 0;
R
Ralf Baechle 已提交
3969
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
3970
	struct config_param *config;
3971
	int offload_type;
3972
	struct swStat *stats = &sp->mac_control.stats_info->sw_stat;
L
Linus Torvalds 已提交
3973 3974 3975 3976

	mac_control = &sp->mac_control;
	config = &sp->config;

3977
	DBG_PRINT(TX_DBG, "%s: In Neterion Tx routine\n", dev->name);
3978 3979 3980 3981 3982 3983 3984

	if (unlikely(skb->len <= 0)) {
		DBG_PRINT(TX_DBG, "%s:Buffer has no data..\n", dev->name);
		dev_kfree_skb_any(skb);
		return 0;
}

L
Linus Torvalds 已提交
3985
	spin_lock_irqsave(&sp->tx_lock, flags);
3986
	if (!is_s2io_card_up(sp)) {
3987
		DBG_PRINT(TX_DBG, "%s: Card going down for reset\n",
L
Linus Torvalds 已提交
3988 3989
			  dev->name);
		spin_unlock_irqrestore(&sp->tx_lock, flags);
3990 3991
		dev_kfree_skb(skb);
		return 0;
L
Linus Torvalds 已提交
3992 3993 3994
	}

	queue = 0;
3995 3996 3997 3998 3999 4000 4001
	/* Get Fifo number to Transmit based on vlan priority */
	if (sp->vlgrp && vlan_tx_tag_present(skb)) {
		vlan_tag = vlan_tx_tag_get(skb);
		vlan_priority = vlan_tag >> 13;
		queue = config->fifo_mapping[vlan_priority];
	}

4002 4003
	put_off = (u16) mac_control->fifos[queue].tx_curr_put_info.offset;
	get_off = (u16) mac_control->fifos[queue].tx_curr_get_info.offset;
R
Ralf Baechle 已提交
4004
	txdp = (struct TxD *) mac_control->fifos[queue].list_info[put_off].
4005 4006 4007
		list_virt_addr;

	queue_len = mac_control->fifos[queue].tx_curr_put_info.fifo_len + 1;
L
Linus Torvalds 已提交
4008
	/* Avoid "put" pointer going beyond "get" pointer */
4009 4010
	if (txdp->Host_Control ||
		   ((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
4011
		DBG_PRINT(TX_DBG, "Error in xmit, No free TXDs.\n");
L
Linus Torvalds 已提交
4012 4013 4014 4015 4016
		netif_stop_queue(dev);
		dev_kfree_skb(skb);
		spin_unlock_irqrestore(&sp->tx_lock, flags);
		return 0;
	}
4017

4018 4019
	offload_type = s2io_offload_type(skb);
	if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
L
Linus Torvalds 已提交
4020
		txdp->Control_1 |= TXD_TCP_LSO_EN;
4021
		txdp->Control_1 |= TXD_TCP_LSO_MSS(s2io_tcp_mss(skb));
L
Linus Torvalds 已提交
4022
	}
4023
	if (skb->ip_summed == CHECKSUM_PARTIAL) {
L
Linus Torvalds 已提交
4024 4025 4026 4027
		txdp->Control_2 |=
		    (TXD_TX_CKO_IPV4_EN | TXD_TX_CKO_TCP_EN |
		     TXD_TX_CKO_UDP_EN);
	}
A
Ananda Raju 已提交
4028 4029
	txdp->Control_1 |= TXD_GATHER_CODE_FIRST;
	txdp->Control_1 |= TXD_LIST_OWN_XENA;
L
Linus Torvalds 已提交
4030
	txdp->Control_2 |= config->tx_intr_type;
4031

4032 4033 4034 4035 4036
	if (sp->vlgrp && vlan_tx_tag_present(skb)) {
		txdp->Control_2 |= TXD_VLAN_ENABLE;
		txdp->Control_2 |= TXD_VLAN_TAG(vlan_tag);
	}

A
Ananda Raju 已提交
4037
	frg_len = skb->len - skb->data_len;
4038
	if (offload_type == SKB_GSO_UDP) {
A
Ananda Raju 已提交
4039 4040
		int ufo_size;

4041
		ufo_size = s2io_udp_mss(skb);
A
Ananda Raju 已提交
4042 4043 4044 4045 4046 4047 4048 4049 4050 4051 4052 4053 4054 4055 4056
		ufo_size &= ~7;
		txdp->Control_1 |= TXD_UFO_EN;
		txdp->Control_1 |= TXD_UFO_MSS(ufo_size);
		txdp->Control_1 |= TXD_BUFFER0_SIZE(8);
#ifdef __BIG_ENDIAN
		sp->ufo_in_band_v[put_off] =
				(u64)skb_shinfo(skb)->ip6_frag_id;
#else
		sp->ufo_in_band_v[put_off] =
				(u64)skb_shinfo(skb)->ip6_frag_id << 32;
#endif
		txdp->Host_Control = (unsigned long)sp->ufo_in_band_v;
		txdp->Buffer_Pointer = pci_map_single(sp->pdev,
					sp->ufo_in_band_v,
					sizeof(u64), PCI_DMA_TODEVICE);
4057 4058 4059
		if((txdp->Buffer_Pointer == 0) ||
			(txdp->Buffer_Pointer == DMA_ERROR_CODE))
			goto pci_map_failed;
A
Ananda Raju 已提交
4060 4061
		txdp++;
	}
L
Linus Torvalds 已提交
4062

A
Ananda Raju 已提交
4063 4064
	txdp->Buffer_Pointer = pci_map_single
	    (sp->pdev, skb->data, frg_len, PCI_DMA_TODEVICE);
4065 4066 4067 4068
	if((txdp->Buffer_Pointer == 0) ||
		(txdp->Buffer_Pointer == DMA_ERROR_CODE))
		goto pci_map_failed;

A
Ananda Raju 已提交
4069 4070
	txdp->Host_Control = (unsigned long) skb;
	txdp->Control_1 |= TXD_BUFFER0_SIZE(frg_len);
4071
	if (offload_type == SKB_GSO_UDP)
A
Ananda Raju 已提交
4072 4073 4074
		txdp->Control_1 |= TXD_UFO_EN;

	frg_cnt = skb_shinfo(skb)->nr_frags;
L
Linus Torvalds 已提交
4075 4076 4077
	/* For fragmented SKB. */
	for (i = 0; i < frg_cnt; i++) {
		skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
4078 4079 4080
		/* A '0' length fragment will be ignored */
		if (!frag->size)
			continue;
L
Linus Torvalds 已提交
4081 4082 4083 4084
		txdp++;
		txdp->Buffer_Pointer = (u64) pci_map_page
		    (sp->pdev, frag->page, frag->page_offset,
		     frag->size, PCI_DMA_TODEVICE);
4085
		txdp->Control_1 = TXD_BUFFER0_SIZE(frag->size);
4086
		if (offload_type == SKB_GSO_UDP)
A
Ananda Raju 已提交
4087
			txdp->Control_1 |= TXD_UFO_EN;
L
Linus Torvalds 已提交
4088 4089 4090
	}
	txdp->Control_1 |= TXD_GATHER_CODE_LAST;

4091
	if (offload_type == SKB_GSO_UDP)
A
Ananda Raju 已提交
4092 4093
		frg_cnt++; /* as Txd0 was used for inband header */

L
Linus Torvalds 已提交
4094
	tx_fifo = mac_control->tx_FIFO_start[queue];
4095
	val64 = mac_control->fifos[queue].list_info[put_off].list_phy_addr;
L
Linus Torvalds 已提交
4096 4097 4098 4099
	writeq(val64, &tx_fifo->TxDL_Pointer);

	val64 = (TX_FIFO_LAST_TXD_NUM(frg_cnt) | TX_FIFO_FIRST_LIST |
		 TX_FIFO_LAST_LIST);
4100
	if (offload_type)
A
Ananda Raju 已提交
4101
		val64 |= TX_FIFO_SPECIAL_FUNC;
4102

L
Linus Torvalds 已提交
4103 4104
	writeq(val64, &tx_fifo->List_Control);

4105 4106
	mmiowb();

L
Linus Torvalds 已提交
4107
	put_off++;
4108 4109
	if (put_off == mac_control->fifos[queue].tx_curr_put_info.fifo_len + 1)
		put_off = 0;
4110
	mac_control->fifos[queue].tx_curr_put_info.offset = put_off;
L
Linus Torvalds 已提交
4111 4112

	/* Avoid "put" pointer going beyond "get" pointer */
4113
	if (((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
4114
		sp->mac_control.stats_info->sw_stat.fifo_full_cnt++;
L
Linus Torvalds 已提交
4115 4116 4117 4118 4119
		DBG_PRINT(TX_DBG,
			  "No free TxDs for xmit, Put: 0x%x Get:0x%x\n",
			  put_off, get_off);
		netif_stop_queue(dev);
	}
4120
	mac_control->stats_info->sw_stat.mem_allocated += skb->truesize;
L
Linus Torvalds 已提交
4121 4122 4123
	dev->trans_start = jiffies;
	spin_unlock_irqrestore(&sp->tx_lock, flags);

4124 4125 4126 4127 4128 4129 4130
	return 0;
pci_map_failed:
	stats->pci_map_fail_cnt++;
	netif_stop_queue(dev);
	stats->mem_freed += skb->truesize;
	dev_kfree_skb(skb);
	spin_unlock_irqrestore(&sp->tx_lock, flags);
L
Linus Torvalds 已提交
4131 4132 4133
	return 0;
}

4134 4135 4136
static void
s2io_alarm_handle(unsigned long data)
{
R
Ralf Baechle 已提交
4137
	struct s2io_nic *sp = (struct s2io_nic *)data;
4138
	struct net_device *dev = sp->dev;
4139

4140
	s2io_handle_errors(dev);
4141 4142 4143
	mod_timer(&sp->alarm_timer, jiffies + HZ / 2);
}

R
Ralf Baechle 已提交
4144
static int s2io_chk_rx_buffers(struct s2io_nic *sp, int rng_n)
4145 4146 4147 4148 4149 4150 4151 4152 4153 4154 4155 4156
{
	int rxb_size, level;

	if (!sp->lro) {
		rxb_size = atomic_read(&sp->rx_bufs_left[rng_n]);
		level = rx_buffer_level(sp, rxb_size, rng_n);

		if ((level == PANIC) && (!TASKLET_IN_USE)) {
			int ret;
			DBG_PRINT(INTR_DBG, "%s: Rx BD hit ", __FUNCTION__);
			DBG_PRINT(INTR_DBG, "PANIC levels\n");
			if ((ret = fill_rx_buffers(sp, rng_n)) == -ENOMEM) {
4157
				DBG_PRINT(INFO_DBG, "Out of memory in %s",
4158 4159 4160 4161 4162 4163 4164 4165 4166
					  __FUNCTION__);
				clear_bit(0, (&sp->tasklet_status));
				return -1;
			}
			clear_bit(0, (&sp->tasklet_status));
		} else if (level == LOW)
			tasklet_schedule(&sp->task);

	} else if (fill_rx_buffers(sp, rng_n) == -ENOMEM) {
4167 4168
			DBG_PRINT(INFO_DBG, "%s:Out of memory", sp->dev->name);
			DBG_PRINT(INFO_DBG, " in Rx Intr!!\n");
4169 4170 4171 4172
	}
	return 0;
}

4173
static irqreturn_t s2io_msix_ring_handle(int irq, void *dev_id)
4174
{
R
Ralf Baechle 已提交
4175 4176
	struct ring_info *ring = (struct ring_info *)dev_id;
	struct s2io_nic *sp = ring->nic;
4177

4178
	if (!is_s2io_card_up(sp))
4179 4180
		return IRQ_HANDLED;

4181 4182
	rx_intr_handler(ring);
	s2io_chk_rx_buffers(sp, ring->ring_no);
4183

4184 4185 4186
	return IRQ_HANDLED;
}

4187
static irqreturn_t s2io_msix_fifo_handle(int irq, void *dev_id)
4188
{
R
Ralf Baechle 已提交
4189 4190
	struct fifo_info *fifo = (struct fifo_info *)dev_id;
	struct s2io_nic *sp = fifo->nic;
4191

4192
	if (!is_s2io_card_up(sp))
4193 4194
		return IRQ_HANDLED;

4195 4196 4197
	tx_intr_handler(fifo);
	return IRQ_HANDLED;
}
R
Ralf Baechle 已提交
4198
static void s2io_txpic_intr_handle(struct s2io_nic *sp)
4199
{
R
Ralf Baechle 已提交
4200
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
4201 4202 4203 4204 4205 4206 4207
	u64 val64;

	val64 = readq(&bar0->pic_int_status);
	if (val64 & PIC_INT_GPIO) {
		val64 = readq(&bar0->gpio_int_reg);
		if ((val64 & GPIO_INT_REG_LINK_DOWN) &&
		    (val64 & GPIO_INT_REG_LINK_UP)) {
A
Ananda Raju 已提交
4208 4209 4210 4211
			/*
			 * This is unstable state so clear both up/down
			 * interrupt and adapter to re-evaluate the link state.
			 */
4212 4213 4214 4215
			val64 |=  GPIO_INT_REG_LINK_DOWN;
			val64 |= GPIO_INT_REG_LINK_UP;
			writeq(val64, &bar0->gpio_int_reg);
			val64 = readq(&bar0->gpio_int_mask);
A
Ananda Raju 已提交
4216 4217
			val64 &= ~(GPIO_INT_MASK_LINK_UP |
				   GPIO_INT_MASK_LINK_DOWN);
4218 4219
			writeq(val64, &bar0->gpio_int_mask);
		}
A
Ananda Raju 已提交
4220 4221 4222
		else if (val64 & GPIO_INT_REG_LINK_UP) {
			val64 = readq(&bar0->adapter_status);
				/* Enable Adapter */
4223 4224 4225 4226 4227 4228 4229
			val64 = readq(&bar0->adapter_control);
			val64 |= ADAPTER_CNTL_EN;
			writeq(val64, &bar0->adapter_control);
			val64 |= ADAPTER_LED_ON;
			writeq(val64, &bar0->adapter_control);
			if (!sp->device_enabled_once)
				sp->device_enabled_once = 1;
A
Ananda Raju 已提交
4230

4231 4232 4233 4234 4235 4236 4237 4238 4239
			s2io_link(sp, LINK_UP);
			/*
			 * unmask link down interrupt and mask link-up
			 * intr
			 */
			val64 = readq(&bar0->gpio_int_mask);
			val64 &= ~GPIO_INT_MASK_LINK_DOWN;
			val64 |= GPIO_INT_MASK_LINK_UP;
			writeq(val64, &bar0->gpio_int_mask);
A
Ananda Raju 已提交
4240 4241 4242

		}else if (val64 & GPIO_INT_REG_LINK_DOWN) {
			val64 = readq(&bar0->adapter_status);
4243 4244 4245 4246 4247 4248
			s2io_link(sp, LINK_DOWN);
			/* Link is down so unmaks link up interrupt */
			val64 = readq(&bar0->gpio_int_mask);
			val64 &= ~GPIO_INT_MASK_LINK_UP;
			val64 |= GPIO_INT_MASK_LINK_DOWN;
			writeq(val64, &bar0->gpio_int_mask);
4249 4250 4251 4252 4253

			/* turn off LED */
			val64 = readq(&bar0->adapter_control);
			val64 = val64 &(~ADAPTER_LED_ON);
			writeq(val64, &bar0->adapter_control);
4254 4255
		}
	}
A
Ananda Raju 已提交
4256
	val64 = readq(&bar0->gpio_int_mask);
4257 4258
}

4259 4260 4261 4262 4263 4264 4265 4266 4267 4268 4269 4270 4271 4272 4273 4274 4275 4276 4277 4278 4279 4280 4281 4282 4283 4284 4285 4286 4287 4288 4289 4290 4291 4292 4293 4294 4295 4296 4297 4298 4299 4300 4301
/**
 *  do_s2io_chk_alarm_bit - Check for alarm and incrment the counter
 *  @value: alarm bits
 *  @addr: address value
 *  @cnt: counter variable
 *  Description: Check for alarm and increment the counter
 *  Return Value:
 *  1 - if alarm bit set
 *  0 - if alarm bit is not set
 */
int do_s2io_chk_alarm_bit(u64 value, void __iomem * addr,
			  unsigned long long *cnt)
{
	u64 val64;
	val64 = readq(addr);
	if ( val64 & value ) {
		writeq(val64, addr);
		(*cnt)++;
		return 1;
	}
	return 0;

}

/**
 *  s2io_handle_errors - Xframe error indication handler
 *  @nic: device private variable
 *  Description: Handle alarms such as loss of link, single or
 *  double ECC errors, critical and serious errors.
 *  Return Value:
 *  NONE
 */
static void s2io_handle_errors(void * dev_id)
{
	struct net_device *dev = (struct net_device *) dev_id;
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
	u64 temp64 = 0,val64=0;
	int i = 0;

	struct swStat *sw_stat = &sp->mac_control.stats_info->sw_stat;
	struct xpakStat *stats = &sp->mac_control.stats_info->xpak_stat;

4302
	if (!is_s2io_card_up(sp))
4303 4304 4305 4306 4307 4308 4309 4310 4311 4312 4313 4314 4315 4316 4317 4318 4319 4320 4321 4322 4323 4324 4325 4326 4327 4328 4329 4330 4331 4332 4333 4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344 4345 4346 4347 4348 4349 4350 4351 4352 4353 4354 4355 4356 4357 4358 4359 4360 4361 4362 4363 4364 4365 4366 4367 4368 4369 4370 4371 4372 4373 4374 4375 4376 4377 4378 4379 4380 4381 4382 4383 4384 4385 4386 4387 4388 4389 4390 4391 4392 4393 4394 4395 4396 4397 4398 4399 4400 4401 4402 4403 4404 4405 4406 4407 4408 4409 4410 4411 4412 4413 4414 4415 4416 4417 4418 4419 4420 4421 4422 4423 4424 4425 4426 4427 4428 4429 4430 4431 4432 4433 4434 4435 4436 4437 4438 4439 4440 4441 4442 4443 4444 4445 4446 4447 4448 4449 4450 4451 4452 4453 4454 4455 4456 4457 4458 4459 4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472 4473 4474 4475 4476 4477 4478 4479 4480 4481 4482 4483 4484 4485 4486 4487 4488 4489 4490 4491 4492 4493 4494 4495 4496 4497 4498 4499 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519 4520 4521 4522 4523 4524 4525 4526 4527 4528 4529 4530 4531 4532 4533 4534 4535 4536 4537 4538 4539 4540 4541 4542 4543 4544
		return;

	if (pci_channel_offline(sp->pdev))
		return;

	memset(&sw_stat->ring_full_cnt, 0,
		sizeof(sw_stat->ring_full_cnt));

	/* Handling the XPAK counters update */
	if(stats->xpak_timer_count < 72000) {
		/* waiting for an hour */
		stats->xpak_timer_count++;
	} else {
		s2io_updt_xpak_counter(dev);
		/* reset the count to zero */
		stats->xpak_timer_count = 0;
	}

	/* Handling link status change error Intr */
	if (s2io_link_fault_indication(sp) == MAC_RMAC_ERR_TIMER) {
		val64 = readq(&bar0->mac_rmac_err_reg);
		writeq(val64, &bar0->mac_rmac_err_reg);
		if (val64 & RMAC_LINK_STATE_CHANGE_INT)
			schedule_work(&sp->set_link_task);
	}

	/* In case of a serious error, the device will be Reset. */
	if (do_s2io_chk_alarm_bit(SERR_SOURCE_ANY, &bar0->serr_source,
				&sw_stat->serious_err_cnt))
		goto reset;

	/* Check for data parity error */
	if (do_s2io_chk_alarm_bit(GPIO_INT_REG_DP_ERR_INT, &bar0->gpio_int_reg,
				&sw_stat->parity_err_cnt))
		goto reset;

	/* Check for ring full counter */
	if (sp->device_type == XFRAME_II_DEVICE) {
		val64 = readq(&bar0->ring_bump_counter1);
		for (i=0; i<4; i++) {
			temp64 = ( val64 & vBIT(0xFFFF,(i*16),16));
			temp64 >>= 64 - ((i+1)*16);
			sw_stat->ring_full_cnt[i] += temp64;
		}

		val64 = readq(&bar0->ring_bump_counter2);
		for (i=0; i<4; i++) {
			temp64 = ( val64 & vBIT(0xFFFF,(i*16),16));
			temp64 >>= 64 - ((i+1)*16);
			 sw_stat->ring_full_cnt[i+4] += temp64;
		}
	}

	val64 = readq(&bar0->txdma_int_status);
	/*check for pfc_err*/
	if (val64 & TXDMA_PFC_INT) {
		if (do_s2io_chk_alarm_bit(PFC_ECC_DB_ERR | PFC_SM_ERR_ALARM|
				PFC_MISC_0_ERR | PFC_MISC_1_ERR|
				PFC_PCIX_ERR, &bar0->pfc_err_reg,
				&sw_stat->pfc_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(PFC_ECC_SG_ERR, &bar0->pfc_err_reg,
				&sw_stat->pfc_err_cnt);
	}

	/*check for tda_err*/
	if (val64 & TXDMA_TDA_INT) {
		if(do_s2io_chk_alarm_bit(TDA_Fn_ECC_DB_ERR | TDA_SM0_ERR_ALARM |
				TDA_SM1_ERR_ALARM, &bar0->tda_err_reg,
				&sw_stat->tda_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TDA_Fn_ECC_SG_ERR | TDA_PCIX_ERR,
				&bar0->tda_err_reg, &sw_stat->tda_err_cnt);
	}
	/*check for pcc_err*/
	if (val64 & TXDMA_PCC_INT) {
		if (do_s2io_chk_alarm_bit(PCC_SM_ERR_ALARM | PCC_WR_ERR_ALARM
				| PCC_N_SERR | PCC_6_COF_OV_ERR
				| PCC_7_COF_OV_ERR | PCC_6_LSO_OV_ERR
				| PCC_7_LSO_OV_ERR | PCC_FB_ECC_DB_ERR
				| PCC_TXB_ECC_DB_ERR, &bar0->pcc_err_reg,
				&sw_stat->pcc_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(PCC_FB_ECC_SG_ERR | PCC_TXB_ECC_SG_ERR,
				&bar0->pcc_err_reg, &sw_stat->pcc_err_cnt);
	}

	/*check for tti_err*/
	if (val64 & TXDMA_TTI_INT) {
		if (do_s2io_chk_alarm_bit(TTI_SM_ERR_ALARM, &bar0->tti_err_reg,
				&sw_stat->tti_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TTI_ECC_SG_ERR | TTI_ECC_DB_ERR,
				&bar0->tti_err_reg, &sw_stat->tti_err_cnt);
	}

	/*check for lso_err*/
	if (val64 & TXDMA_LSO_INT) {
		if (do_s2io_chk_alarm_bit(LSO6_ABORT | LSO7_ABORT
				| LSO6_SM_ERR_ALARM | LSO7_SM_ERR_ALARM,
				&bar0->lso_err_reg, &sw_stat->lso_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(LSO6_SEND_OFLOW | LSO7_SEND_OFLOW,
				&bar0->lso_err_reg, &sw_stat->lso_err_cnt);
	}

	/*check for tpa_err*/
	if (val64 & TXDMA_TPA_INT) {
		if (do_s2io_chk_alarm_bit(TPA_SM_ERR_ALARM, &bar0->tpa_err_reg,
			&sw_stat->tpa_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TPA_TX_FRM_DROP, &bar0->tpa_err_reg,
			&sw_stat->tpa_err_cnt);
	}

	/*check for sm_err*/
	if (val64 & TXDMA_SM_INT) {
		if (do_s2io_chk_alarm_bit(SM_SM_ERR_ALARM, &bar0->sm_err_reg,
			&sw_stat->sm_err_cnt))
			goto reset;
	}

	val64 = readq(&bar0->mac_int_status);
	if (val64 & MAC_INT_STATUS_TMAC_INT) {
		if (do_s2io_chk_alarm_bit(TMAC_TX_BUF_OVRN | TMAC_TX_SM_ERR,
				&bar0->mac_tmac_err_reg,
				&sw_stat->mac_tmac_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TMAC_ECC_SG_ERR | TMAC_ECC_DB_ERR
				| TMAC_DESC_ECC_SG_ERR | TMAC_DESC_ECC_DB_ERR,
				&bar0->mac_tmac_err_reg,
				&sw_stat->mac_tmac_err_cnt);
	}

	val64 = readq(&bar0->xgxs_int_status);
	if (val64 & XGXS_INT_STATUS_TXGXS) {
		if (do_s2io_chk_alarm_bit(TXGXS_ESTORE_UFLOW | TXGXS_TX_SM_ERR,
				&bar0->xgxs_txgxs_err_reg,
				&sw_stat->xgxs_txgxs_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TXGXS_ECC_SG_ERR | TXGXS_ECC_DB_ERR,
				&bar0->xgxs_txgxs_err_reg,
				&sw_stat->xgxs_txgxs_err_cnt);
	}

	val64 = readq(&bar0->rxdma_int_status);
	if (val64 & RXDMA_INT_RC_INT_M) {
		if (do_s2io_chk_alarm_bit(RC_PRCn_ECC_DB_ERR | RC_FTC_ECC_DB_ERR
				| RC_PRCn_SM_ERR_ALARM |RC_FTC_SM_ERR_ALARM,
				&bar0->rc_err_reg, &sw_stat->rc_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RC_PRCn_ECC_SG_ERR | RC_FTC_ECC_SG_ERR
				| RC_RDA_FAIL_WR_Rn, &bar0->rc_err_reg,
				&sw_stat->rc_err_cnt);
		if (do_s2io_chk_alarm_bit(PRC_PCI_AB_RD_Rn | PRC_PCI_AB_WR_Rn
				| PRC_PCI_AB_F_WR_Rn, &bar0->prc_pcix_err_reg,
				&sw_stat->prc_pcix_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(PRC_PCI_DP_RD_Rn | PRC_PCI_DP_WR_Rn
				| PRC_PCI_DP_F_WR_Rn, &bar0->prc_pcix_err_reg,
				&sw_stat->prc_pcix_err_cnt);
	}

	if (val64 & RXDMA_INT_RPA_INT_M) {
		if (do_s2io_chk_alarm_bit(RPA_SM_ERR_ALARM | RPA_CREDIT_ERR,
				&bar0->rpa_err_reg, &sw_stat->rpa_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RPA_ECC_SG_ERR | RPA_ECC_DB_ERR,
				&bar0->rpa_err_reg, &sw_stat->rpa_err_cnt);
	}

	if (val64 & RXDMA_INT_RDA_INT_M) {
		if (do_s2io_chk_alarm_bit(RDA_RXDn_ECC_DB_ERR
				| RDA_FRM_ECC_DB_N_AERR | RDA_SM1_ERR_ALARM
				| RDA_SM0_ERR_ALARM | RDA_RXD_ECC_DB_SERR,
				&bar0->rda_err_reg, &sw_stat->rda_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RDA_RXDn_ECC_SG_ERR | RDA_FRM_ECC_SG_ERR
				| RDA_MISC_ERR | RDA_PCIX_ERR,
				&bar0->rda_err_reg, &sw_stat->rda_err_cnt);
	}

	if (val64 & RXDMA_INT_RTI_INT_M) {
		if (do_s2io_chk_alarm_bit(RTI_SM_ERR_ALARM, &bar0->rti_err_reg,
				&sw_stat->rti_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RTI_ECC_SG_ERR | RTI_ECC_DB_ERR,
				&bar0->rti_err_reg, &sw_stat->rti_err_cnt);
	}

	val64 = readq(&bar0->mac_int_status);
	if (val64 & MAC_INT_STATUS_RMAC_INT) {
		if (do_s2io_chk_alarm_bit(RMAC_RX_BUFF_OVRN | RMAC_RX_SM_ERR,
				&bar0->mac_rmac_err_reg,
				&sw_stat->mac_rmac_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RMAC_UNUSED_INT|RMAC_SINGLE_ECC_ERR|
				RMAC_DOUBLE_ECC_ERR, &bar0->mac_rmac_err_reg,
				&sw_stat->mac_rmac_err_cnt);
	}

	val64 = readq(&bar0->xgxs_int_status);
	if (val64 & XGXS_INT_STATUS_RXGXS) {
		if (do_s2io_chk_alarm_bit(RXGXS_ESTORE_OFLOW | RXGXS_RX_SM_ERR,
				&bar0->xgxs_rxgxs_err_reg,
				&sw_stat->xgxs_rxgxs_err_cnt))
			goto reset;
	}

	val64 = readq(&bar0->mc_int_status);
	if(val64 & MC_INT_STATUS_MC_INT) {
		if (do_s2io_chk_alarm_bit(MC_ERR_REG_SM_ERR, &bar0->mc_err_reg,
				&sw_stat->mc_err_cnt))
			goto reset;

		/* Handling Ecc errors */
		if (val64 & (MC_ERR_REG_ECC_ALL_SNG | MC_ERR_REG_ECC_ALL_DBL)) {
			writeq(val64, &bar0->mc_err_reg);
			if (val64 & MC_ERR_REG_ECC_ALL_DBL) {
				sw_stat->double_ecc_errs++;
				if (sp->device_type != XFRAME_II_DEVICE) {
					/*
					 * Reset XframeI only if critical error
					 */
					if (val64 &
						(MC_ERR_REG_MIRI_ECC_DB_ERR_0 |
						MC_ERR_REG_MIRI_ECC_DB_ERR_1))
								goto reset;
					}
			} else
				sw_stat->single_ecc_errs++;
		}
	}
	return;

reset:
	netif_stop_queue(dev);
	schedule_work(&sp->rst_timer_task);
	sw_stat->soft_reset_cnt++;
	return;
}

L
Linus Torvalds 已提交
4545 4546 4547 4548
/**
 *  s2io_isr - ISR handler of the device .
 *  @irq: the irq of the device.
 *  @dev_id: a void pointer to the dev structure of the NIC.
4549 4550 4551
 *  Description:  This function is the ISR handler of the device. It
 *  identifies the reason for the interrupt and calls the relevant
 *  service routines. As a contongency measure, this ISR allocates the
L
Linus Torvalds 已提交
4552 4553 4554
 *  recv buffers, if their numbers are below the panic value which is
 *  presently set to 25% of the original number of rcv buffers allocated.
 *  Return value:
4555
 *   IRQ_HANDLED: will be returned if IRQ was handled by this routine
L
Linus Torvalds 已提交
4556 4557
 *   IRQ_NONE: will be returned if interrupt is not from our device
 */
4558
static irqreturn_t s2io_isr(int irq, void *dev_id)
L
Linus Torvalds 已提交
4559 4560
{
	struct net_device *dev = (struct net_device *) dev_id;
R
Ralf Baechle 已提交
4561 4562
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
4563
	int i;
4564
	u64 reason = 0;
R
Ralf Baechle 已提交
4565
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
4566 4567
	struct config_param *config;

4568 4569 4570 4571
	/* Pretend we handled any irq's from a disconnected card */
	if (pci_channel_offline(sp->pdev))
		return IRQ_NONE;

4572
	if (!is_s2io_card_up(sp))
4573 4574
		return IRQ_NONE;

L
Linus Torvalds 已提交
4575 4576 4577
	mac_control = &sp->mac_control;
	config = &sp->config;

4578
	/*
L
Linus Torvalds 已提交
4579 4580 4581 4582 4583 4584 4585 4586
	 * Identify the cause for interrupt and call the appropriate
	 * interrupt handler. Causes for the interrupt could be;
	 * 1. Rx of packet.
	 * 2. Tx complete.
	 * 3. Link down.
	 */
	reason = readq(&bar0->general_int_status);

4587 4588 4589
	if (unlikely(reason == S2IO_MINUS_ONE) ) {
		/* Nothing much can be done. Get out */
		return IRQ_HANDLED;
L
Linus Torvalds 已提交
4590
	}
4591

4592 4593 4594 4595 4596 4597 4598 4599 4600 4601 4602 4603 4604 4605 4606
	if (reason & (GEN_INTR_RXTRAFFIC |
		GEN_INTR_TXTRAFFIC | GEN_INTR_TXPIC))
	{
		writeq(S2IO_MINUS_ONE, &bar0->general_int_mask);

		if (config->napi) {
			if (reason & GEN_INTR_RXTRAFFIC) {
				if (likely(netif_rx_schedule_prep(dev,
							&sp->napi))) {
					__netif_rx_schedule(dev, &sp->napi);
					writeq(S2IO_MINUS_ONE,
					       &bar0->rx_traffic_mask);
				} else
					writeq(S2IO_MINUS_ONE,
					       &bar0->rx_traffic_int);
4607
			}
4608 4609 4610 4611 4612 4613 4614
		} else {
			/*
			 * rx_traffic_int reg is an R1 register, writing all 1's
			 * will ensure that the actual interrupt causing bit
			 * get's cleared and hence a read can be avoided.
			 */
			if (reason & GEN_INTR_RXTRAFFIC)
4615
				writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int);
4616 4617 4618

			for (i = 0; i < config->rx_ring_num; i++)
				rx_intr_handler(&mac_control->rings[i]);
4619
		}
4620

4621
		/*
4622
		 * tx_traffic_int reg is an R1 register, writing all 1's
4623 4624 4625
		 * will ensure that the actual interrupt causing bit get's
		 * cleared and hence a read can be avoided.
		 */
4626 4627
		if (reason & GEN_INTR_TXTRAFFIC)
			writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int);
4628

4629 4630
		for (i = 0; i < config->tx_fifo_num; i++)
			tx_intr_handler(&mac_control->fifos[i]);
L
Linus Torvalds 已提交
4631

4632 4633
		if (reason & GEN_INTR_TXPIC)
			s2io_txpic_intr_handle(sp);
4634

4635 4636 4637 4638 4639 4640 4641 4642 4643
		/*
		 * Reallocate the buffers from the interrupt handler itself.
		 */
		if (!config->napi) {
			for (i = 0; i < config->rx_ring_num; i++)
				s2io_chk_rx_buffers(sp, i);
		}
		writeq(sp->general_int_mask, &bar0->general_int_mask);
		readl(&bar0->general_int_status);
4644

4645
		return IRQ_HANDLED;
4646

4647 4648 4649 4650 4651
	}
	else if (!reason) {
		/* The interrupt was not raised by us */
		return IRQ_NONE;
	}
4652

L
Linus Torvalds 已提交
4653 4654 4655
	return IRQ_HANDLED;
}

4656 4657 4658
/**
 * s2io_updt_stats -
 */
R
Ralf Baechle 已提交
4659
static void s2io_updt_stats(struct s2io_nic *sp)
4660
{
R
Ralf Baechle 已提交
4661
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
4662 4663 4664
	u64 val64;
	int cnt = 0;

4665
	if (is_s2io_card_up(sp)) {
4666 4667 4668 4669 4670 4671 4672 4673 4674 4675 4676 4677 4678
		/* Apprx 30us on a 133 MHz bus */
		val64 = SET_UPDT_CLICKS(10) |
			STAT_CFG_ONE_SHOT_EN | STAT_CFG_STAT_EN;
		writeq(val64, &bar0->stat_cfg);
		do {
			udelay(100);
			val64 = readq(&bar0->stat_cfg);
			if (!(val64 & BIT(0)))
				break;
			cnt++;
			if (cnt == 5)
				break; /* Updt failed */
		} while(1);
4679
	} 
4680 4681
}

L
Linus Torvalds 已提交
4682
/**
4683
 *  s2io_get_stats - Updates the device statistics structure.
L
Linus Torvalds 已提交
4684 4685
 *  @dev : pointer to the device structure.
 *  Description:
4686
 *  This function updates the device statistics structure in the s2io_nic
L
Linus Torvalds 已提交
4687 4688 4689 4690 4691
 *  structure and returns a pointer to the same.
 *  Return value:
 *  pointer to the updated net_device_stats structure.
 */

4692
static struct net_device_stats *s2io_get_stats(struct net_device *dev)
L
Linus Torvalds 已提交
4693
{
R
Ralf Baechle 已提交
4694 4695
	struct s2io_nic *sp = dev->priv;
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
4696 4697
	struct config_param *config;

4698

L
Linus Torvalds 已提交
4699 4700 4701
	mac_control = &sp->mac_control;
	config = &sp->config;

4702 4703 4704 4705 4706
	/* Configure Stats for immediate updt */
	s2io_updt_stats(sp);

	sp->stats.tx_packets =
		le32_to_cpu(mac_control->stats_info->tmac_frms);
4707 4708 4709
	sp->stats.tx_errors =
		le32_to_cpu(mac_control->stats_info->tmac_any_err_frms);
	sp->stats.rx_errors =
A
Al Viro 已提交
4710
		le64_to_cpu(mac_control->stats_info->rmac_drop_frms);
4711 4712
	sp->stats.multicast =
		le32_to_cpu(mac_control->stats_info->rmac_vld_mcst_frms);
L
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	sp->stats.rx_length_errors =
A
Al Viro 已提交
4714
		le64_to_cpu(mac_control->stats_info->rmac_long_frms);
L
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4715 4716 4717 4718 4719 4720 4721 4722

	return (&sp->stats);
}

/**
 *  s2io_set_multicast - entry point for multicast address enable/disable.
 *  @dev : pointer to the device structure
 *  Description:
4723 4724
 *  This function is a driver entry point which gets called by the kernel
 *  whenever multicast addresses must be enabled/disabled. This also gets
L
Linus Torvalds 已提交
4725 4726 4727 4728 4729 4730 4731 4732 4733 4734 4735
 *  called to set/reset promiscuous mode. Depending on the deivce flag, we
 *  determine, if multicast address must be enabled or if promiscuous mode
 *  is to be disabled etc.
 *  Return value:
 *  void.
 */

static void s2io_set_multicast(struct net_device *dev)
{
	int i, j, prev_cnt;
	struct dev_mc_list *mclist;
R
Ralf Baechle 已提交
4736 4737
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
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4738 4739 4740 4741 4742 4743 4744 4745 4746 4747 4748 4749 4750 4751 4752 4753
	u64 val64 = 0, multi_mac = 0x010203040506ULL, mask =
	    0xfeffffffffffULL;
	u64 dis_addr = 0xffffffffffffULL, mac_addr = 0;
	void __iomem *add;

	if ((dev->flags & IFF_ALLMULTI) && (!sp->m_cast_flg)) {
		/*  Enable all Multicast addresses */
		writeq(RMAC_ADDR_DATA0_MEM_ADDR(multi_mac),
		       &bar0->rmac_addr_data0_mem);
		writeq(RMAC_ADDR_DATA1_MEM_MASK(mask),
		       &bar0->rmac_addr_data1_mem);
		val64 = RMAC_ADDR_CMD_MEM_WE |
		    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
		    RMAC_ADDR_CMD_MEM_OFFSET(MAC_MC_ALL_MC_ADDR_OFFSET);
		writeq(val64, &bar0->rmac_addr_cmd_mem);
		/* Wait till command completes */
A
Ananda Raju 已提交
4754
		wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
4755 4756
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET);
L
Linus Torvalds 已提交
4757 4758 4759 4760 4761 4762 4763

		sp->m_cast_flg = 1;
		sp->all_multi_pos = MAC_MC_ALL_MC_ADDR_OFFSET;
	} else if ((dev->flags & IFF_ALLMULTI) && (sp->m_cast_flg)) {
		/*  Disable all Multicast addresses */
		writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
		       &bar0->rmac_addr_data0_mem);
4764 4765
		writeq(RMAC_ADDR_DATA1_MEM_MASK(0x0),
		       &bar0->rmac_addr_data1_mem);
L
Linus Torvalds 已提交
4766 4767 4768 4769 4770
		val64 = RMAC_ADDR_CMD_MEM_WE |
		    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
		    RMAC_ADDR_CMD_MEM_OFFSET(sp->all_multi_pos);
		writeq(val64, &bar0->rmac_addr_cmd_mem);
		/* Wait till command completes */
A
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4771
		wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
4772 4773
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET);
L
Linus Torvalds 已提交
4774 4775 4776 4777 4778 4779 4780 4781 4782 4783 4784 4785 4786 4787 4788 4789

		sp->m_cast_flg = 0;
		sp->all_multi_pos = 0;
	}

	if ((dev->flags & IFF_PROMISC) && (!sp->promisc_flg)) {
		/*  Put the NIC into promiscuous mode */
		add = &bar0->mac_cfg;
		val64 = readq(&bar0->mac_cfg);
		val64 |= MAC_CFG_RMAC_PROM_ENABLE;

		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) val64, add);
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64 >> 32), (add + 4));

4790 4791 4792 4793 4794 4795 4796
		if (vlan_tag_strip != 1) {
			val64 = readq(&bar0->rx_pa_cfg);
			val64 &= ~RX_PA_CFG_STRIP_VLAN_TAG;
			writeq(val64, &bar0->rx_pa_cfg);
			vlan_strip_flag = 0;
		}

L
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4797 4798
		val64 = readq(&bar0->mac_cfg);
		sp->promisc_flg = 1;
4799
		DBG_PRINT(INFO_DBG, "%s: entered promiscuous mode\n",
L
Linus Torvalds 已提交
4800 4801 4802 4803 4804 4805 4806 4807 4808 4809 4810 4811
			  dev->name);
	} else if (!(dev->flags & IFF_PROMISC) && (sp->promisc_flg)) {
		/*  Remove the NIC from promiscuous mode */
		add = &bar0->mac_cfg;
		val64 = readq(&bar0->mac_cfg);
		val64 &= ~MAC_CFG_RMAC_PROM_ENABLE;

		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) val64, add);
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64 >> 32), (add + 4));

4812 4813 4814 4815 4816 4817 4818
		if (vlan_tag_strip != 0) {
			val64 = readq(&bar0->rx_pa_cfg);
			val64 |= RX_PA_CFG_STRIP_VLAN_TAG;
			writeq(val64, &bar0->rx_pa_cfg);
			vlan_strip_flag = 1;
		}

L
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4819 4820
		val64 = readq(&bar0->mac_cfg);
		sp->promisc_flg = 0;
4821
		DBG_PRINT(INFO_DBG, "%s: left promiscuous mode\n",
L
Linus Torvalds 已提交
4822 4823 4824 4825 4826 4827 4828 4829 4830 4831 4832 4833 4834 4835 4836 4837 4838 4839 4840 4841 4842 4843
			  dev->name);
	}

	/*  Update individual M_CAST address list */
	if ((!sp->m_cast_flg) && dev->mc_count) {
		if (dev->mc_count >
		    (MAX_ADDRS_SUPPORTED - MAC_MC_ADDR_START_OFFSET - 1)) {
			DBG_PRINT(ERR_DBG, "%s: No more Rx filters ",
				  dev->name);
			DBG_PRINT(ERR_DBG, "can be added, please enable ");
			DBG_PRINT(ERR_DBG, "ALL_MULTI instead\n");
			return;
		}

		prev_cnt = sp->mc_addr_count;
		sp->mc_addr_count = dev->mc_count;

		/* Clear out the previous list of Mc in the H/W. */
		for (i = 0; i < prev_cnt; i++) {
			writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
			       &bar0->rmac_addr_data0_mem);
			writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
4844
				&bar0->rmac_addr_data1_mem);
L
Linus Torvalds 已提交
4845 4846 4847 4848 4849 4850 4851
			val64 = RMAC_ADDR_CMD_MEM_WE |
			    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
			    RMAC_ADDR_CMD_MEM_OFFSET
			    (MAC_MC_ADDR_START_OFFSET + i);
			writeq(val64, &bar0->rmac_addr_cmd_mem);

			/* Wait for command completes */
A
Ananda Raju 已提交
4852
			if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
4853 4854
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET)) {
L
Linus Torvalds 已提交
4855 4856 4857 4858 4859 4860 4861 4862 4863 4864 4865 4866
				DBG_PRINT(ERR_DBG, "%s: Adding ",
					  dev->name);
				DBG_PRINT(ERR_DBG, "Multicasts failed\n");
				return;
			}
		}

		/* Create the new Rx filter list and update the same in H/W. */
		for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
		     i++, mclist = mclist->next) {
			memcpy(sp->usr_addrs[i].addr, mclist->dmi_addr,
			       ETH_ALEN);
4867
			mac_addr = 0;
L
Linus Torvalds 已提交
4868 4869 4870 4871 4872 4873 4874 4875
			for (j = 0; j < ETH_ALEN; j++) {
				mac_addr |= mclist->dmi_addr[j];
				mac_addr <<= 8;
			}
			mac_addr >>= 8;
			writeq(RMAC_ADDR_DATA0_MEM_ADDR(mac_addr),
			       &bar0->rmac_addr_data0_mem);
			writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
4876
				&bar0->rmac_addr_data1_mem);
L
Linus Torvalds 已提交
4877 4878 4879 4880 4881 4882 4883
			val64 = RMAC_ADDR_CMD_MEM_WE |
			    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
			    RMAC_ADDR_CMD_MEM_OFFSET
			    (i + MAC_MC_ADDR_START_OFFSET);
			writeq(val64, &bar0->rmac_addr_cmd_mem);

			/* Wait for command completes */
A
Ananda Raju 已提交
4884
			if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
4885 4886
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET)) {
L
Linus Torvalds 已提交
4887 4888 4889 4890 4891 4892 4893 4894 4895 4896
				DBG_PRINT(ERR_DBG, "%s: Adding ",
					  dev->name);
				DBG_PRINT(ERR_DBG, "Multicasts failed\n");
				return;
			}
		}
	}
}

/**
4897
 *  s2io_set_mac_addr - Programs the Xframe mac address
L
Linus Torvalds 已提交
4898 4899
 *  @dev : pointer to the device structure.
 *  @addr: a uchar pointer to the new mac address which is to be set.
4900
 *  Description : This procedure will program the Xframe to receive
L
Linus Torvalds 已提交
4901
 *  frames with new Mac Address
4902
 *  Return value: SUCCESS on success and an appropriate (-)ve integer
L
Linus Torvalds 已提交
4903 4904 4905
 *  as defined in errno.h file on failure.
 */

4906
static int s2io_set_mac_addr(struct net_device *dev, u8 * addr)
L
Linus Torvalds 已提交
4907
{
R
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4908 4909
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
4910 4911
	register u64 val64, mac_addr = 0;
	int i;
4912
	u64 old_mac_addr = 0;
L
Linus Torvalds 已提交
4913

4914
	/*
L
Linus Torvalds 已提交
4915 4916
	 * Set the new MAC address as the new unicast filter and reflect this
	 * change on the device address registered with the OS. It will be
4917
	 * at offset 0.
L
Linus Torvalds 已提交
4918 4919 4920 4921
	 */
	for (i = 0; i < ETH_ALEN; i++) {
		mac_addr <<= 8;
		mac_addr |= addr[i];
4922 4923 4924 4925 4926 4927 4928 4929 4930 4931 4932 4933 4934 4935 4936 4937
		old_mac_addr <<= 8;
		old_mac_addr |= sp->def_mac_addr[0].mac_addr[i];
	}

	if(0 == mac_addr)
		return SUCCESS;

	/* Update the internal structure with this new mac address */
	if(mac_addr != old_mac_addr) {
		memset(sp->def_mac_addr[0].mac_addr, 0, sizeof(ETH_ALEN));
		sp->def_mac_addr[0].mac_addr[5] = (u8) (mac_addr);
		sp->def_mac_addr[0].mac_addr[4] = (u8) (mac_addr >> 8);
		sp->def_mac_addr[0].mac_addr[3] = (u8) (mac_addr >> 16);
		sp->def_mac_addr[0].mac_addr[2] = (u8) (mac_addr >> 24);
		sp->def_mac_addr[0].mac_addr[1] = (u8) (mac_addr >> 32);
		sp->def_mac_addr[0].mac_addr[0] = (u8) (mac_addr >> 40);
L
Linus Torvalds 已提交
4938 4939 4940 4941 4942 4943 4944 4945 4946 4947
	}

	writeq(RMAC_ADDR_DATA0_MEM_ADDR(mac_addr),
	       &bar0->rmac_addr_data0_mem);

	val64 =
	    RMAC_ADDR_CMD_MEM_WE | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
	    RMAC_ADDR_CMD_MEM_OFFSET(0);
	writeq(val64, &bar0->rmac_addr_cmd_mem);
	/* Wait till command completes */
A
Ananda Raju 已提交
4948
	if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
4949
		      RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING, S2IO_BIT_RESET)) {
L
Linus Torvalds 已提交
4950 4951 4952 4953 4954 4955 4956 4957
		DBG_PRINT(ERR_DBG, "%s: set_mac_addr failed\n", dev->name);
		return FAILURE;
	}

	return SUCCESS;
}

/**
4958
 * s2io_ethtool_sset - Sets different link parameters.
L
Linus Torvalds 已提交
4959 4960 4961 4962
 * @sp : private member of the device structure, which is a pointer to the  * s2io_nic structure.
 * @info: pointer to the structure with parameters given by ethtool to set
 * link information.
 * Description:
4963
 * The function sets different link parameters provided by the user onto
L
Linus Torvalds 已提交
4964 4965 4966 4967 4968 4969 4970 4971
 * the NIC.
 * Return value:
 * 0 on success.
*/

static int s2io_ethtool_sset(struct net_device *dev,
			     struct ethtool_cmd *info)
{
R
Ralf Baechle 已提交
4972
	struct s2io_nic *sp = dev->priv;
L
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4973 4974 4975 4976 4977 4978 4979 4980 4981 4982 4983 4984
	if ((info->autoneg == AUTONEG_ENABLE) ||
	    (info->speed != SPEED_10000) || (info->duplex != DUPLEX_FULL))
		return -EINVAL;
	else {
		s2io_close(sp->dev);
		s2io_open(sp->dev);
	}

	return 0;
}

/**
4985
 * s2io_ethtol_gset - Return link specific information.
L
Linus Torvalds 已提交
4986 4987 4988 4989 4990 4991 4992 4993 4994 4995 4996 4997
 * @sp : private member of the device structure, pointer to the
 *      s2io_nic structure.
 * @info : pointer to the structure with parameters given by ethtool
 * to return link information.
 * Description:
 * Returns link specific information like speed, duplex etc.. to ethtool.
 * Return value :
 * return 0 on success.
 */

static int s2io_ethtool_gset(struct net_device *dev, struct ethtool_cmd *info)
{
R
Ralf Baechle 已提交
4998
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
4999 5000 5001 5002 5003 5004 5005 5006 5007 5008 5009 5010 5011 5012 5013 5014 5015 5016
	info->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
	info->advertising = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
	info->port = PORT_FIBRE;
	/* info->transceiver?? TODO */

	if (netif_carrier_ok(sp->dev)) {
		info->speed = 10000;
		info->duplex = DUPLEX_FULL;
	} else {
		info->speed = -1;
		info->duplex = -1;
	}

	info->autoneg = AUTONEG_DISABLE;
	return 0;
}

/**
5017 5018
 * s2io_ethtool_gdrvinfo - Returns driver specific information.
 * @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5019 5020 5021 5022 5023 5024 5025 5026 5027 5028 5029 5030
 * s2io_nic structure.
 * @info : pointer to the structure with parameters given by ethtool to
 * return driver information.
 * Description:
 * Returns driver specefic information like name, version etc.. to ethtool.
 * Return value:
 *  void
 */

static void s2io_ethtool_gdrvinfo(struct net_device *dev,
				  struct ethtool_drvinfo *info)
{
R
Ralf Baechle 已提交
5031
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
5032

5033 5034 5035 5036
	strncpy(info->driver, s2io_driver_name, sizeof(info->driver));
	strncpy(info->version, s2io_driver_version, sizeof(info->version));
	strncpy(info->fw_version, "", sizeof(info->fw_version));
	strncpy(info->bus_info, pci_name(sp->pdev), sizeof(info->bus_info));
L
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5037 5038 5039 5040 5041 5042
	info->regdump_len = XENA_REG_SPACE;
	info->eedump_len = XENA_EEPROM_SPACE;
}

/**
 *  s2io_ethtool_gregs - dumps the entire space of Xfame into the buffer.
5043
 *  @sp: private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5044
 *  s2io_nic structure.
5045
 *  @regs : pointer to the structure with parameters given by ethtool for
L
Linus Torvalds 已提交
5046 5047 5048 5049 5050 5051 5052 5053 5054 5055 5056 5057 5058 5059 5060
 *  dumping the registers.
 *  @reg_space: The input argumnet into which all the registers are dumped.
 *  Description:
 *  Dumps the entire register space of xFrame NIC into the user given
 *  buffer area.
 * Return value :
 * void .
*/

static void s2io_ethtool_gregs(struct net_device *dev,
			       struct ethtool_regs *regs, void *space)
{
	int i;
	u64 reg;
	u8 *reg_space = (u8 *) space;
R
Ralf Baechle 已提交
5061
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
5062 5063 5064 5065 5066 5067 5068 5069 5070 5071 5072 5073

	regs->len = XENA_REG_SPACE;
	regs->version = sp->pdev->subsystem_device;

	for (i = 0; i < regs->len; i += 8) {
		reg = readq(sp->bar0 + i);
		memcpy((reg_space + i), &reg, 8);
	}
}

/**
 *  s2io_phy_id  - timer function that alternates adapter LED.
5074
 *  @data : address of the private member of the device structure, which
L
Linus Torvalds 已提交
5075
 *  is a pointer to the s2io_nic structure, provided as an u32.
5076 5077 5078
 * Description: This is actually the timer function that alternates the
 * adapter LED bit of the adapter control bit to set/reset every time on
 * invocation. The timer is set for 1/2 a second, hence tha NIC blinks
L
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5079 5080 5081 5082
 *  once every second.
*/
static void s2io_phy_id(unsigned long data)
{
R
Ralf Baechle 已提交
5083 5084
	struct s2io_nic *sp = (struct s2io_nic *) data;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
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5085 5086 5087 5088
	u64 val64 = 0;
	u16 subid;

	subid = sp->pdev->subsystem_device;
5089 5090
	if ((sp->device_type == XFRAME_II_DEVICE) ||
		   ((subid & 0xFF) >= 0x07)) {
L
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5091 5092 5093 5094 5095 5096 5097 5098 5099 5100 5101 5102 5103 5104 5105 5106
		val64 = readq(&bar0->gpio_control);
		val64 ^= GPIO_CTRL_GPIO_0;
		writeq(val64, &bar0->gpio_control);
	} else {
		val64 = readq(&bar0->adapter_control);
		val64 ^= ADAPTER_LED_ON;
		writeq(val64, &bar0->adapter_control);
	}

	mod_timer(&sp->id_timer, jiffies + HZ / 2);
}

/**
 * s2io_ethtool_idnic - To physically identify the nic on the system.
 * @sp : private member of the device structure, which is a pointer to the
 * s2io_nic structure.
5107
 * @id : pointer to the structure with identification parameters given by
L
Linus Torvalds 已提交
5108 5109
 * ethtool.
 * Description: Used to physically identify the NIC on the system.
5110
 * The Link LED will blink for a time specified by the user for
L
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5111
 * identification.
5112
 * NOTE: The Link has to be Up to be able to blink the LED. Hence
L
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5113 5114 5115 5116 5117 5118 5119 5120
 * identification is possible only if it's link is up.
 * Return value:
 * int , returns 0 on success
 */

static int s2io_ethtool_idnic(struct net_device *dev, u32 data)
{
	u64 val64 = 0, last_gpio_ctrl_val;
R
Ralf Baechle 已提交
5121 5122
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
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5123 5124 5125 5126
	u16 subid;

	subid = sp->pdev->subsystem_device;
	last_gpio_ctrl_val = readq(&bar0->gpio_control);
5127 5128
	if ((sp->device_type == XFRAME_I_DEVICE) &&
		((subid & 0xFF) < 0x07)) {
L
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5129 5130 5131 5132 5133 5134 5135 5136 5137 5138 5139 5140 5141 5142
		val64 = readq(&bar0->adapter_control);
		if (!(val64 & ADAPTER_CNTL_EN)) {
			printk(KERN_ERR
			       "Adapter Link down, cannot blink LED\n");
			return -EFAULT;
		}
	}
	if (sp->id_timer.function == NULL) {
		init_timer(&sp->id_timer);
		sp->id_timer.function = s2io_phy_id;
		sp->id_timer.data = (unsigned long) sp;
	}
	mod_timer(&sp->id_timer, jiffies);
	if (data)
5143
		msleep_interruptible(data * HZ);
L
Linus Torvalds 已提交
5144
	else
5145
		msleep_interruptible(MAX_FLICKER_TIME);
L
Linus Torvalds 已提交
5146 5147
	del_timer_sync(&sp->id_timer);

5148
	if (CARDS_WITH_FAULTY_LINK_INDICATORS(sp->device_type, subid)) {
L
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5149 5150 5151 5152 5153 5154 5155
		writeq(last_gpio_ctrl_val, &bar0->gpio_control);
		last_gpio_ctrl_val = readq(&bar0->gpio_control);
	}

	return 0;
}

5156 5157 5158 5159 5160 5161 5162 5163 5164 5165 5166 5167
static void s2io_ethtool_gringparam(struct net_device *dev,
                                    struct ethtool_ringparam *ering)
{
	struct s2io_nic *sp = dev->priv;
	int i,tx_desc_count=0,rx_desc_count=0;

	if (sp->rxd_mode == RXD_MODE_1)
		ering->rx_max_pending = MAX_RX_DESC_1;
	else if (sp->rxd_mode == RXD_MODE_3B)
		ering->rx_max_pending = MAX_RX_DESC_2;

	ering->tx_max_pending = MAX_TX_DESC;
5168
	for (i = 0 ; i < sp->config.tx_fifo_num ; i++) 
5169
		tx_desc_count += sp->config.tx_cfg[i].fifo_len;
5170
	
5171 5172 5173
	DBG_PRINT(INFO_DBG,"\nmax txds : %d\n",sp->config.max_txds);
	ering->tx_pending = tx_desc_count;
	rx_desc_count = 0;
5174
	for (i = 0 ; i < sp->config.rx_ring_num ; i++) 
5175
		rx_desc_count += sp->config.rx_cfg[i].num_rxd;
5176

5177 5178 5179 5180 5181 5182 5183 5184 5185 5186 5187
	ering->rx_pending = rx_desc_count;

	ering->rx_mini_max_pending = 0;
	ering->rx_mini_pending = 0;
	if(sp->rxd_mode == RXD_MODE_1)
		ering->rx_jumbo_max_pending = MAX_RX_DESC_1;
	else if (sp->rxd_mode == RXD_MODE_3B)
		ering->rx_jumbo_max_pending = MAX_RX_DESC_2;
	ering->rx_jumbo_pending = rx_desc_count;
}

L
Linus Torvalds 已提交
5188 5189
/**
 * s2io_ethtool_getpause_data -Pause frame frame generation and reception.
5190 5191
 * @sp : private member of the device structure, which is a pointer to the
 *	s2io_nic structure.
L
Linus Torvalds 已提交
5192 5193 5194 5195 5196 5197 5198 5199 5200 5201
 * @ep : pointer to the structure with pause parameters given by ethtool.
 * Description:
 * Returns the Pause frame generation and reception capability of the NIC.
 * Return value:
 *  void
 */
static void s2io_ethtool_getpause_data(struct net_device *dev,
				       struct ethtool_pauseparam *ep)
{
	u64 val64;
R
Ralf Baechle 已提交
5202 5203
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
5204 5205 5206 5207 5208 5209 5210 5211 5212 5213 5214

	val64 = readq(&bar0->rmac_pause_cfg);
	if (val64 & RMAC_PAUSE_GEN_ENABLE)
		ep->tx_pause = TRUE;
	if (val64 & RMAC_PAUSE_RX_ENABLE)
		ep->rx_pause = TRUE;
	ep->autoneg = FALSE;
}

/**
 * s2io_ethtool_setpause_data -  set/reset pause frame generation.
5215
 * @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5216 5217 5218 5219 5220 5221 5222 5223 5224 5225
 *      s2io_nic structure.
 * @ep : pointer to the structure with pause parameters given by ethtool.
 * Description:
 * It can be used to set or reset Pause frame generation or reception
 * support of the NIC.
 * Return value:
 * int, returns 0 on Success
 */

static int s2io_ethtool_setpause_data(struct net_device *dev,
5226
			       struct ethtool_pauseparam *ep)
L
Linus Torvalds 已提交
5227 5228
{
	u64 val64;
R
Ralf Baechle 已提交
5229 5230
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
5231 5232 5233 5234 5235 5236 5237 5238 5239 5240 5241 5242 5243 5244 5245 5246

	val64 = readq(&bar0->rmac_pause_cfg);
	if (ep->tx_pause)
		val64 |= RMAC_PAUSE_GEN_ENABLE;
	else
		val64 &= ~RMAC_PAUSE_GEN_ENABLE;
	if (ep->rx_pause)
		val64 |= RMAC_PAUSE_RX_ENABLE;
	else
		val64 &= ~RMAC_PAUSE_RX_ENABLE;
	writeq(val64, &bar0->rmac_pause_cfg);
	return 0;
}

/**
 * read_eeprom - reads 4 bytes of data from user given offset.
5247
 * @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5248 5249 5250
 *      s2io_nic structure.
 * @off : offset at which the data must be written
 * @data : Its an output parameter where the data read at the given
5251
 *	offset is stored.
L
Linus Torvalds 已提交
5252
 * Description:
5253
 * Will read 4 bytes of data from the user given offset and return the
L
Linus Torvalds 已提交
5254 5255 5256 5257 5258 5259 5260 5261
 * read data.
 * NOTE: Will allow to read only part of the EEPROM visible through the
 *   I2C bus.
 * Return value:
 *  -1 on failure and 0 on success.
 */

#define S2IO_DEV_ID		5
R
Ralf Baechle 已提交
5262
static int read_eeprom(struct s2io_nic * sp, int off, u64 * data)
L
Linus Torvalds 已提交
5263 5264 5265 5266
{
	int ret = -1;
	u32 exit_cnt = 0;
	u64 val64;
R
Ralf Baechle 已提交
5267
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
5268

5269 5270 5271 5272 5273
	if (sp->device_type == XFRAME_I_DEVICE) {
		val64 = I2C_CONTROL_DEV_ID(S2IO_DEV_ID) | I2C_CONTROL_ADDR(off) |
		    I2C_CONTROL_BYTE_CNT(0x3) | I2C_CONTROL_READ |
		    I2C_CONTROL_CNTL_START;
		SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF);
L
Linus Torvalds 已提交
5274

5275 5276 5277 5278 5279 5280 5281 5282 5283
		while (exit_cnt < 5) {
			val64 = readq(&bar0->i2c_control);
			if (I2C_CONTROL_CNTL_END(val64)) {
				*data = I2C_CONTROL_GET_DATA(val64);
				ret = 0;
				break;
			}
			msleep(50);
			exit_cnt++;
L
Linus Torvalds 已提交
5284 5285 5286
		}
	}

5287 5288
	if (sp->device_type == XFRAME_II_DEVICE) {
		val64 = SPI_CONTROL_KEY(0x9) | SPI_CONTROL_SEL1 |
5289
			SPI_CONTROL_BYTECNT(0x3) |
5290 5291 5292 5293 5294 5295 5296 5297 5298 5299 5300 5301 5302 5303 5304 5305 5306 5307 5308
			SPI_CONTROL_CMD(0x3) | SPI_CONTROL_ADDR(off);
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		val64 |= SPI_CONTROL_REQ;
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		while (exit_cnt < 5) {
			val64 = readq(&bar0->spi_control);
			if (val64 & SPI_CONTROL_NACK) {
				ret = 1;
				break;
			} else if (val64 & SPI_CONTROL_DONE) {
				*data = readq(&bar0->spi_data);
				*data &= 0xffffff;
				ret = 0;
				break;
			}
			msleep(50);
			exit_cnt++;
		}
	}
L
Linus Torvalds 已提交
5309 5310 5311 5312 5313 5314 5315 5316 5317
	return ret;
}

/**
 *  write_eeprom - actually writes the relevant part of the data value.
 *  @sp : private member of the device structure, which is a pointer to the
 *       s2io_nic structure.
 *  @off : offset at which the data must be written
 *  @data : The data that is to be written
5318
 *  @cnt : Number of bytes of the data that are actually to be written into
L
Linus Torvalds 已提交
5319 5320 5321 5322 5323 5324 5325 5326
 *  the Eeprom. (max of 3)
 * Description:
 *  Actually writes the relevant part of the data value into the Eeprom
 *  through the I2C bus.
 * Return value:
 *  0 on success, -1 on failure.
 */

R
Ralf Baechle 已提交
5327
static int write_eeprom(struct s2io_nic * sp, int off, u64 data, int cnt)
L
Linus Torvalds 已提交
5328 5329 5330
{
	int exit_cnt = 0, ret = -1;
	u64 val64;
R
Ralf Baechle 已提交
5331
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
5332

5333 5334 5335 5336 5337 5338 5339 5340 5341 5342 5343 5344 5345 5346 5347 5348 5349
	if (sp->device_type == XFRAME_I_DEVICE) {
		val64 = I2C_CONTROL_DEV_ID(S2IO_DEV_ID) | I2C_CONTROL_ADDR(off) |
		    I2C_CONTROL_BYTE_CNT(cnt) | I2C_CONTROL_SET_DATA((u32)data) |
		    I2C_CONTROL_CNTL_START;
		SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF);

		while (exit_cnt < 5) {
			val64 = readq(&bar0->i2c_control);
			if (I2C_CONTROL_CNTL_END(val64)) {
				if (!(val64 & I2C_CONTROL_NACK))
					ret = 0;
				break;
			}
			msleep(50);
			exit_cnt++;
		}
	}
L
Linus Torvalds 已提交
5350

5351 5352 5353 5354 5355
	if (sp->device_type == XFRAME_II_DEVICE) {
		int write_cnt = (cnt == 8) ? 0 : cnt;
		writeq(SPI_DATA_WRITE(data,(cnt<<3)), &bar0->spi_data);

		val64 = SPI_CONTROL_KEY(0x9) | SPI_CONTROL_SEL1 |
5356
			SPI_CONTROL_BYTECNT(write_cnt) |
5357 5358 5359 5360 5361 5362 5363 5364 5365 5366
			SPI_CONTROL_CMD(0x2) | SPI_CONTROL_ADDR(off);
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		val64 |= SPI_CONTROL_REQ;
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		while (exit_cnt < 5) {
			val64 = readq(&bar0->spi_control);
			if (val64 & SPI_CONTROL_NACK) {
				ret = 1;
				break;
			} else if (val64 & SPI_CONTROL_DONE) {
L
Linus Torvalds 已提交
5367
				ret = 0;
5368 5369 5370 5371
				break;
			}
			msleep(50);
			exit_cnt++;
L
Linus Torvalds 已提交
5372 5373 5374 5375
		}
	}
	return ret;
}
R
Ralf Baechle 已提交
5376
static void s2io_vpd_read(struct s2io_nic *nic)
5377
{
5378 5379
	u8 *vpd_data;
	u8 data;
5380 5381 5382 5383 5384 5385 5386 5387 5388 5389 5390
	int i=0, cnt, fail = 0;
	int vpd_addr = 0x80;

	if (nic->device_type == XFRAME_II_DEVICE) {
		strcpy(nic->product_name, "Xframe II 10GbE network adapter");
		vpd_addr = 0x80;
	}
	else {
		strcpy(nic->product_name, "Xframe I 10GbE network adapter");
		vpd_addr = 0x50;
	}
5391
	strcpy(nic->serial_num, "NOT AVAILABLE");
5392

5393
	vpd_data = kmalloc(256, GFP_KERNEL);
5394 5395
	if (!vpd_data) {
		nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
5396
		return;
5397
	}
5398
	nic->mac_control.stats_info->sw_stat.mem_allocated += 256;
5399

5400 5401 5402 5403 5404 5405 5406 5407 5408 5409 5410 5411 5412 5413 5414 5415 5416 5417
	for (i = 0; i < 256; i +=4 ) {
		pci_write_config_byte(nic->pdev, (vpd_addr + 2), i);
		pci_read_config_byte(nic->pdev,  (vpd_addr + 2), &data);
		pci_write_config_byte(nic->pdev, (vpd_addr + 3), 0);
		for (cnt = 0; cnt <5; cnt++) {
			msleep(2);
			pci_read_config_byte(nic->pdev, (vpd_addr + 3), &data);
			if (data == 0x80)
				break;
		}
		if (cnt >= 5) {
			DBG_PRINT(ERR_DBG, "Read of VPD data failed\n");
			fail = 1;
			break;
		}
		pci_read_config_dword(nic->pdev,  (vpd_addr + 4),
				      (u32 *)&vpd_data[i]);
	}
5418 5419 5420 5421 5422 5423 5424 5425 5426 5427 5428 5429 5430 5431 5432 5433

	if(!fail) {
		/* read serial number of adapter */
		for (cnt = 0; cnt < 256; cnt++) {
		if ((vpd_data[cnt] == 'S') &&
			(vpd_data[cnt+1] == 'N') &&
			(vpd_data[cnt+2] < VPD_STRING_LEN)) {
				memset(nic->serial_num, 0, VPD_STRING_LEN);
				memcpy(nic->serial_num, &vpd_data[cnt + 3],
					vpd_data[cnt+2]);
				break;
			}
		}
	}

	if ((!fail) && (vpd_data[1] < VPD_STRING_LEN)) {
5434 5435 5436
		memset(nic->product_name, 0, vpd_data[1]);
		memcpy(nic->product_name, &vpd_data[3], vpd_data[1]);
	}
5437
	kfree(vpd_data);
5438
	nic->mac_control.stats_info->sw_stat.mem_freed += 256;
5439 5440
}

L
Linus Torvalds 已提交
5441 5442 5443
/**
 *  s2io_ethtool_geeprom  - reads the value stored in the Eeprom.
 *  @sp : private member of the device structure, which is a pointer to the *       s2io_nic structure.
5444
 *  @eeprom : pointer to the user level structure provided by ethtool,
L
Linus Torvalds 已提交
5445 5446 5447 5448 5449 5450 5451 5452 5453 5454
 *  containing all relevant information.
 *  @data_buf : user defined value to be written into Eeprom.
 *  Description: Reads the values stored in the Eeprom at given offset
 *  for a given length. Stores these values int the input argument data
 *  buffer 'data_buf' and returns these to the caller (ethtool.)
 *  Return value:
 *  int  0 on success
 */

static int s2io_ethtool_geeprom(struct net_device *dev,
5455
			 struct ethtool_eeprom *eeprom, u8 * data_buf)
L
Linus Torvalds 已提交
5456
{
5457 5458
	u32 i, valid;
	u64 data;
R
Ralf Baechle 已提交
5459
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
5460 5461 5462 5463 5464 5465 5466 5467 5468 5469 5470 5471 5472 5473 5474 5475 5476 5477 5478 5479 5480

	eeprom->magic = sp->pdev->vendor | (sp->pdev->device << 16);

	if ((eeprom->offset + eeprom->len) > (XENA_EEPROM_SPACE))
		eeprom->len = XENA_EEPROM_SPACE - eeprom->offset;

	for (i = 0; i < eeprom->len; i += 4) {
		if (read_eeprom(sp, (eeprom->offset + i), &data)) {
			DBG_PRINT(ERR_DBG, "Read of EEPROM failed\n");
			return -EFAULT;
		}
		valid = INV(data);
		memcpy((data_buf + i), &valid, 4);
	}
	return 0;
}

/**
 *  s2io_ethtool_seeprom - tries to write the user provided value in Eeprom
 *  @sp : private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
5481
 *  @eeprom : pointer to the user level structure provided by ethtool,
L
Linus Torvalds 已提交
5482 5483 5484 5485 5486 5487 5488 5489 5490 5491 5492 5493 5494 5495
 *  containing all relevant information.
 *  @data_buf ; user defined value to be written into Eeprom.
 *  Description:
 *  Tries to write the user provided value in the Eeprom, at the offset
 *  given by the user.
 *  Return value:
 *  0 on success, -EFAULT on failure.
 */

static int s2io_ethtool_seeprom(struct net_device *dev,
				struct ethtool_eeprom *eeprom,
				u8 * data_buf)
{
	int len = eeprom->len, cnt = 0;
5496
	u64 valid = 0, data;
R
Ralf Baechle 已提交
5497
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
5498 5499 5500 5501 5502 5503 5504 5505 5506 5507 5508 5509 5510 5511 5512 5513 5514 5515 5516 5517 5518 5519 5520 5521 5522 5523 5524 5525 5526 5527 5528

	if (eeprom->magic != (sp->pdev->vendor | (sp->pdev->device << 16))) {
		DBG_PRINT(ERR_DBG,
			  "ETHTOOL_WRITE_EEPROM Err: Magic value ");
		DBG_PRINT(ERR_DBG, "is wrong, Its not 0x%x\n",
			  eeprom->magic);
		return -EFAULT;
	}

	while (len) {
		data = (u32) data_buf[cnt] & 0x000000FF;
		if (data) {
			valid = (u32) (data << 24);
		} else
			valid = data;

		if (write_eeprom(sp, (eeprom->offset + cnt), valid, 0)) {
			DBG_PRINT(ERR_DBG,
				  "ETHTOOL_WRITE_EEPROM Err: Cannot ");
			DBG_PRINT(ERR_DBG,
				  "write into the specified offset\n");
			return -EFAULT;
		}
		cnt++;
		len--;
	}

	return 0;
}

/**
5529 5530
 * s2io_register_test - reads and writes into all clock domains.
 * @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5531 5532 5533 5534 5535 5536 5537 5538 5539 5540
 * s2io_nic structure.
 * @data : variable that returns the result of each of the test conducted b
 * by the driver.
 * Description:
 * Read and write into all clock domains. The NIC has 3 clock domains,
 * see that registers in all the three regions are accessible.
 * Return value:
 * 0 on success.
 */

R
Ralf Baechle 已提交
5541
static int s2io_register_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
5542
{
R
Ralf Baechle 已提交
5543
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
5544
	u64 val64 = 0, exp_val;
L
Linus Torvalds 已提交
5545 5546
	int fail = 0;

5547 5548
	val64 = readq(&bar0->pif_rd_swapper_fb);
	if (val64 != 0x123456789abcdefULL) {
L
Linus Torvalds 已提交
5549 5550 5551 5552 5553 5554 5555 5556 5557 5558 5559
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 1 fails\n");
	}

	val64 = readq(&bar0->rmac_pause_cfg);
	if (val64 != 0xc000ffff00000000ULL) {
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 2 fails\n");
	}

	val64 = readq(&bar0->rx_queue_cfg);
5560 5561 5562 5563 5564
	if (sp->device_type == XFRAME_II_DEVICE)
		exp_val = 0x0404040404040404ULL;
	else
		exp_val = 0x0808080808080808ULL;
	if (val64 != exp_val) {
L
Linus Torvalds 已提交
5565 5566 5567 5568 5569 5570 5571 5572 5573 5574 5575 5576 5577 5578 5579 5580 5581 5582 5583 5584 5585 5586 5587 5588 5589 5590 5591
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 3 fails\n");
	}

	val64 = readq(&bar0->xgxs_efifo_cfg);
	if (val64 != 0x000000001923141EULL) {
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 4 fails\n");
	}

	val64 = 0x5A5A5A5A5A5A5A5AULL;
	writeq(val64, &bar0->xmsi_data);
	val64 = readq(&bar0->xmsi_data);
	if (val64 != 0x5A5A5A5A5A5A5A5AULL) {
		fail = 1;
		DBG_PRINT(ERR_DBG, "Write Test level 1 fails\n");
	}

	val64 = 0xA5A5A5A5A5A5A5A5ULL;
	writeq(val64, &bar0->xmsi_data);
	val64 = readq(&bar0->xmsi_data);
	if (val64 != 0xA5A5A5A5A5A5A5A5ULL) {
		fail = 1;
		DBG_PRINT(ERR_DBG, "Write Test level 2 fails\n");
	}

	*data = fail;
5592
	return fail;
L
Linus Torvalds 已提交
5593 5594 5595
}

/**
5596
 * s2io_eeprom_test - to verify that EEprom in the xena can be programmed.
L
Linus Torvalds 已提交
5597 5598 5599 5600 5601
 * @sp : private member of the device structure, which is a pointer to the
 * s2io_nic structure.
 * @data:variable that returns the result of each of the test conducted by
 * the driver.
 * Description:
5602
 * Verify that EEPROM in the xena can be programmed using I2C_CONTROL
L
Linus Torvalds 已提交
5603 5604 5605 5606 5607
 * register.
 * Return value:
 * 0 on success.
 */

R
Ralf Baechle 已提交
5608
static int s2io_eeprom_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
5609 5610
{
	int fail = 0;
5611 5612 5613
	u64 ret_data, org_4F0, org_7F0;
	u8 saved_4F0 = 0, saved_7F0 = 0;
	struct net_device *dev = sp->dev;
L
Linus Torvalds 已提交
5614 5615

	/* Test Write Error at offset 0 */
5616 5617 5618 5619 5620 5621 5622 5623 5624 5625 5626 5627
	/* Note that SPI interface allows write access to all areas
	 * of EEPROM. Hence doing all negative testing only for Xframe I.
	 */
	if (sp->device_type == XFRAME_I_DEVICE)
		if (!write_eeprom(sp, 0, 0, 3))
			fail = 1;

	/* Save current values at offsets 0x4F0 and 0x7F0 */
	if (!read_eeprom(sp, 0x4F0, &org_4F0))
		saved_4F0 = 1;
	if (!read_eeprom(sp, 0x7F0, &org_7F0))
		saved_7F0 = 1;
L
Linus Torvalds 已提交
5628 5629

	/* Test Write at offset 4f0 */
5630
	if (write_eeprom(sp, 0x4F0, 0x012345, 3))
L
Linus Torvalds 已提交
5631 5632 5633 5634
		fail = 1;
	if (read_eeprom(sp, 0x4F0, &ret_data))
		fail = 1;

5635
	if (ret_data != 0x012345) {
5636 5637 5638 5639
		DBG_PRINT(ERR_DBG, "%s: eeprom test error at offset 0x4F0. "
			"Data written %llx Data read %llx\n",
			dev->name, (unsigned long long)0x12345,
			(unsigned long long)ret_data);
L
Linus Torvalds 已提交
5640
		fail = 1;
5641
	}
L
Linus Torvalds 已提交
5642 5643

	/* Reset the EEPROM data go FFFF */
5644
	write_eeprom(sp, 0x4F0, 0xFFFFFF, 3);
L
Linus Torvalds 已提交
5645 5646

	/* Test Write Request Error at offset 0x7c */
5647 5648 5649
	if (sp->device_type == XFRAME_I_DEVICE)
		if (!write_eeprom(sp, 0x07C, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
5650

5651 5652
	/* Test Write Request at offset 0x7f0 */
	if (write_eeprom(sp, 0x7F0, 0x012345, 3))
L
Linus Torvalds 已提交
5653
		fail = 1;
5654
	if (read_eeprom(sp, 0x7F0, &ret_data))
L
Linus Torvalds 已提交
5655 5656
		fail = 1;

5657
	if (ret_data != 0x012345) {
5658 5659 5660 5661
		DBG_PRINT(ERR_DBG, "%s: eeprom test error at offset 0x7F0. "
			"Data written %llx Data read %llx\n",
			dev->name, (unsigned long long)0x12345,
			(unsigned long long)ret_data);
L
Linus Torvalds 已提交
5662
		fail = 1;
5663
	}
L
Linus Torvalds 已提交
5664 5665

	/* Reset the EEPROM data go FFFF */
5666
	write_eeprom(sp, 0x7F0, 0xFFFFFF, 3);
L
Linus Torvalds 已提交
5667

5668 5669 5670 5671
	if (sp->device_type == XFRAME_I_DEVICE) {
		/* Test Write Error at offset 0x80 */
		if (!write_eeprom(sp, 0x080, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
5672

5673 5674 5675
		/* Test Write Error at offset 0xfc */
		if (!write_eeprom(sp, 0x0FC, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
5676

5677 5678 5679
		/* Test Write Error at offset 0x100 */
		if (!write_eeprom(sp, 0x100, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
5680

5681 5682 5683 5684 5685 5686 5687 5688 5689 5690
		/* Test Write Error at offset 4ec */
		if (!write_eeprom(sp, 0x4EC, 0, 3))
			fail = 1;
	}

	/* Restore values at offsets 0x4F0 and 0x7F0 */
	if (saved_4F0)
		write_eeprom(sp, 0x4F0, org_4F0, 3);
	if (saved_7F0)
		write_eeprom(sp, 0x7F0, org_7F0, 3);
L
Linus Torvalds 已提交
5691 5692

	*data = fail;
5693
	return fail;
L
Linus Torvalds 已提交
5694 5695 5696 5697
}

/**
 * s2io_bist_test - invokes the MemBist test of the card .
5698
 * @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5699
 * s2io_nic structure.
5700
 * @data:variable that returns the result of each of the test conducted by
L
Linus Torvalds 已提交
5701 5702 5703 5704
 * the driver.
 * Description:
 * This invokes the MemBist test of the card. We give around
 * 2 secs time for the Test to complete. If it's still not complete
5705
 * within this peiod, we consider that the test failed.
L
Linus Torvalds 已提交
5706 5707 5708 5709
 * Return value:
 * 0 on success and -1 on failure.
 */

R
Ralf Baechle 已提交
5710
static int s2io_bist_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
5711 5712 5713 5714 5715 5716 5717 5718 5719 5720 5721 5722 5723 5724 5725 5726 5727 5728 5729 5730 5731 5732 5733
{
	u8 bist = 0;
	int cnt = 0, ret = -1;

	pci_read_config_byte(sp->pdev, PCI_BIST, &bist);
	bist |= PCI_BIST_START;
	pci_write_config_word(sp->pdev, PCI_BIST, bist);

	while (cnt < 20) {
		pci_read_config_byte(sp->pdev, PCI_BIST, &bist);
		if (!(bist & PCI_BIST_START)) {
			*data = (bist & PCI_BIST_CODE_MASK);
			ret = 0;
			break;
		}
		msleep(100);
		cnt++;
	}

	return ret;
}

/**
5734 5735
 * s2io-link_test - verifies the link state of the nic
 * @sp ; private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5736 5737 5738 5739
 * s2io_nic structure.
 * @data: variable that returns the result of each of the test conducted by
 * the driver.
 * Description:
5740
 * The function verifies the link state of the NIC and updates the input
L
Linus Torvalds 已提交
5741 5742 5743 5744 5745
 * argument 'data' appropriately.
 * Return value:
 * 0 on success.
 */

R
Ralf Baechle 已提交
5746
static int s2io_link_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
5747
{
R
Ralf Baechle 已提交
5748
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
5749 5750 5751
	u64 val64;

	val64 = readq(&bar0->adapter_status);
A
Ananda Raju 已提交
5752
	if(!(LINK_IS_UP(val64)))
L
Linus Torvalds 已提交
5753
		*data = 1;
A
Ananda Raju 已提交
5754 5755
	else
		*data = 0;
L
Linus Torvalds 已提交
5756

5757
	return *data;
L
Linus Torvalds 已提交
5758 5759 5760
}

/**
5761 5762
 * s2io_rldram_test - offline test for access to the RldRam chip on the NIC
 * @sp - private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5763
 * s2io_nic structure.
5764
 * @data - variable that returns the result of each of the test
L
Linus Torvalds 已提交
5765 5766
 * conducted by the driver.
 * Description:
5767
 *  This is one of the offline test that tests the read and write
L
Linus Torvalds 已提交
5768 5769 5770 5771 5772
 *  access to the RldRam chip on the NIC.
 * Return value:
 *  0 on success.
 */

R
Ralf Baechle 已提交
5773
static int s2io_rldram_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
5774
{
R
Ralf Baechle 已提交
5775
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
5776
	u64 val64;
5777
	int cnt, iteration = 0, test_fail = 0;
L
Linus Torvalds 已提交
5778 5779 5780 5781 5782 5783 5784

	val64 = readq(&bar0->adapter_control);
	val64 &= ~ADAPTER_ECC_EN;
	writeq(val64, &bar0->adapter_control);

	val64 = readq(&bar0->mc_rldram_test_ctrl);
	val64 |= MC_RLDRAM_TEST_MODE;
5785
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
L
Linus Torvalds 已提交
5786 5787 5788 5789 5790 5791 5792 5793 5794 5795 5796 5797 5798 5799 5800 5801 5802 5803 5804 5805 5806 5807 5808 5809 5810 5811 5812

	val64 = readq(&bar0->mc_rldram_mrs);
	val64 |= MC_RLDRAM_QUEUE_SIZE_ENABLE;
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);

	val64 |= MC_RLDRAM_MRS_ENABLE;
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);

	while (iteration < 2) {
		val64 = 0x55555555aaaa0000ULL;
		if (iteration == 1) {
			val64 ^= 0xFFFFFFFFFFFF0000ULL;
		}
		writeq(val64, &bar0->mc_rldram_test_d0);

		val64 = 0xaaaa5a5555550000ULL;
		if (iteration == 1) {
			val64 ^= 0xFFFFFFFFFFFF0000ULL;
		}
		writeq(val64, &bar0->mc_rldram_test_d1);

		val64 = 0x55aaaaaaaa5a0000ULL;
		if (iteration == 1) {
			val64 ^= 0xFFFFFFFFFFFF0000ULL;
		}
		writeq(val64, &bar0->mc_rldram_test_d2);

5813
		val64 = (u64) (0x0000003ffffe0100ULL);
L
Linus Torvalds 已提交
5814 5815
		writeq(val64, &bar0->mc_rldram_test_add);

5816 5817 5818
		val64 = MC_RLDRAM_TEST_MODE | MC_RLDRAM_TEST_WRITE |
		    	MC_RLDRAM_TEST_GO;
		SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
L
Linus Torvalds 已提交
5819 5820 5821 5822 5823 5824 5825 5826 5827 5828 5829

		for (cnt = 0; cnt < 5; cnt++) {
			val64 = readq(&bar0->mc_rldram_test_ctrl);
			if (val64 & MC_RLDRAM_TEST_DONE)
				break;
			msleep(200);
		}

		if (cnt == 5)
			break;

5830 5831
		val64 = MC_RLDRAM_TEST_MODE | MC_RLDRAM_TEST_GO;
		SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
L
Linus Torvalds 已提交
5832 5833 5834 5835 5836 5837 5838 5839 5840 5841 5842 5843

		for (cnt = 0; cnt < 5; cnt++) {
			val64 = readq(&bar0->mc_rldram_test_ctrl);
			if (val64 & MC_RLDRAM_TEST_DONE)
				break;
			msleep(500);
		}

		if (cnt == 5)
			break;

		val64 = readq(&bar0->mc_rldram_test_ctrl);
5844 5845
		if (!(val64 & MC_RLDRAM_TEST_PASS))
			test_fail = 1;
L
Linus Torvalds 已提交
5846 5847 5848 5849

		iteration++;
	}

5850
	*data = test_fail;
L
Linus Torvalds 已提交
5851

5852 5853 5854 5855
	/* Bring the adapter out of test mode */
	SPECIAL_REG_WRITE(0, &bar0->mc_rldram_test_ctrl, LF);

	return test_fail;
L
Linus Torvalds 已提交
5856 5857 5858 5859 5860 5861 5862 5863
}

/**
 *  s2io_ethtool_test - conducts 6 tsets to determine the health of card.
 *  @sp : private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
 *  @ethtest : pointer to a ethtool command specific structure that will be
 *  returned to the user.
5864
 *  @data : variable that returns the result of each of the test
L
Linus Torvalds 已提交
5865 5866 5867 5868 5869 5870 5871 5872 5873 5874 5875 5876
 * conducted by the driver.
 * Description:
 *  This function conducts 6 tests ( 4 offline and 2 online) to determine
 *  the health of the card.
 * Return value:
 *  void
 */

static void s2io_ethtool_test(struct net_device *dev,
			      struct ethtool_test *ethtest,
			      uint64_t * data)
{
R
Ralf Baechle 已提交
5877
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
5878 5879 5880 5881
	int orig_state = netif_running(sp->dev);

	if (ethtest->flags == ETH_TEST_FL_OFFLINE) {
		/* Offline Tests. */
5882
		if (orig_state)
L
Linus Torvalds 已提交
5883 5884 5885 5886 5887 5888 5889 5890 5891 5892 5893 5894 5895 5896 5897 5898 5899 5900 5901 5902 5903 5904 5905 5906 5907 5908 5909 5910 5911 5912 5913 5914 5915 5916 5917 5918 5919 5920 5921 5922 5923 5924 5925 5926 5927 5928 5929 5930 5931
			s2io_close(sp->dev);

		if (s2io_register_test(sp, &data[0]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		s2io_reset(sp);

		if (s2io_rldram_test(sp, &data[3]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		s2io_reset(sp);

		if (s2io_eeprom_test(sp, &data[1]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		if (s2io_bist_test(sp, &data[4]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		if (orig_state)
			s2io_open(sp->dev);

		data[2] = 0;
	} else {
		/* Online Tests. */
		if (!orig_state) {
			DBG_PRINT(ERR_DBG,
				  "%s: is not up, cannot run test\n",
				  dev->name);
			data[0] = -1;
			data[1] = -1;
			data[2] = -1;
			data[3] = -1;
			data[4] = -1;
		}

		if (s2io_link_test(sp, &data[2]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		data[0] = 0;
		data[1] = 0;
		data[3] = 0;
		data[4] = 0;
	}
}

static void s2io_get_ethtool_stats(struct net_device *dev,
				   struct ethtool_stats *estats,
				   u64 * tmp_stats)
{
5932
	int i = 0, k;
R
Ralf Baechle 已提交
5933 5934
	struct s2io_nic *sp = dev->priv;
	struct stat_block *stat_info = sp->mac_control.stats_info;
L
Linus Torvalds 已提交
5935

5936
	s2io_updt_stats(sp);
5937 5938 5939 5940 5941 5942
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_frms_oflow) << 32  |
		le32_to_cpu(stat_info->tmac_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_data_octets_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_data_octets);
L
Linus Torvalds 已提交
5943
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_drop_frms);
5944 5945 5946 5947 5948 5949
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_mcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_mcst_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_bcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_bcst_frms);
L
Linus Torvalds 已提交
5950
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_pause_ctrl_frms);
5951 5952 5953 5954 5955 5956 5957 5958 5959
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->tmac_ttl_octets_oflow) << 32 |
                le32_to_cpu(stat_info->tmac_ttl_octets);
	tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->tmac_ucst_frms_oflow) << 32 |
                le32_to_cpu(stat_info->tmac_ucst_frms);
	tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->tmac_nucst_frms_oflow) << 32 |
                le32_to_cpu(stat_info->tmac_nucst_frms);
5960 5961 5962
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_any_err_frms_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_any_err_frms);
5963
        tmp_stats[i++] = le64_to_cpu(stat_info->tmac_ttl_less_fb_octets);
L
Linus Torvalds 已提交
5964
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_vld_ip_octets);
5965 5966 5967 5968 5969 5970 5971 5972 5973 5974 5975 5976
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_vld_ip_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_vld_ip);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_drop_ip_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_drop_ip);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_icmp_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_icmp);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_rst_tcp_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_rst_tcp);
L
Linus Torvalds 已提交
5977
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_tcp);
5978 5979 5980 5981 5982 5983 5984 5985
	tmp_stats[i++] = (u64)le32_to_cpu(stat_info->tmac_udp_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_udp);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_vld_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_vld_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_data_octets_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_data_octets);
L
Linus Torvalds 已提交
5986 5987
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_fcs_err_frms);
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_drop_frms);
5988 5989 5990 5991 5992 5993
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_vld_mcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_vld_mcst_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_vld_bcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_vld_bcst_frms);
L
Linus Torvalds 已提交
5994
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_in_rng_len_err_frms);
5995
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_out_rng_len_err_frms);
L
Linus Torvalds 已提交
5996 5997
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_long_frms);
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_pause_ctrl_frms);
5998 5999 6000 6001 6002 6003 6004 6005 6006 6007
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_unsup_ctrl_frms);
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_ttl_octets_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_ttl_octets);
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_accepted_ucst_frms_oflow)
		<< 32 | le32_to_cpu(stat_info->rmac_accepted_ucst_frms);
	tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_accepted_nucst_frms_oflow)
                 << 32 | le32_to_cpu(stat_info->rmac_accepted_nucst_frms);
6008 6009 6010
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_discarded_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_discarded_frms);
6011 6012 6013 6014 6015
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_drop_events_oflow)
                 << 32 | le32_to_cpu(stat_info->rmac_drop_events);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_less_fb_octets);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_frms);
6016 6017 6018 6019 6020 6021 6022 6023 6024 6025 6026 6027
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_usized_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_usized_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_osized_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_osized_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_frag_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_frag_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_jabber_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_jabber_frms);
6028 6029 6030 6031 6032 6033 6034 6035
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_64_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_65_127_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_128_255_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_256_511_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_512_1023_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_1024_1518_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_ip_oflow) << 32 |
6036
		le32_to_cpu(stat_info->rmac_ip);
L
Linus Torvalds 已提交
6037 6038
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ip_octets);
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_hdr_err_ip);
6039 6040
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_drop_ip_oflow) << 32 |
6041
		le32_to_cpu(stat_info->rmac_drop_ip);
6042 6043
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_icmp_oflow) << 32 |
6044
		le32_to_cpu(stat_info->rmac_icmp);
L
Linus Torvalds 已提交
6045
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_tcp);
6046 6047
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_udp_oflow) << 32 |
6048 6049 6050 6051
		le32_to_cpu(stat_info->rmac_udp);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_err_drp_udp_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_err_drp_udp);
6052 6053 6054 6055 6056 6057 6058 6059 6060 6061 6062 6063 6064 6065 6066 6067 6068
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_err_sym);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q0);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q1);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q2);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q3);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q4);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q5);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q6);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q7);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q0);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q1);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q2);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q3);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q4);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q5);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q6);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q7);
6069 6070 6071
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_pause_cnt_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_pause_cnt);
6072 6073
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_data_err_cnt);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_ctrl_err_cnt);
6074 6075 6076
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_accepted_ip_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_accepted_ip);
L
Linus Torvalds 已提交
6077
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_err_tcp);
6078 6079 6080 6081 6082 6083 6084 6085 6086 6087 6088 6089 6090 6091 6092 6093 6094 6095
	tmp_stats[i++] = le32_to_cpu(stat_info->rd_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_rd_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_rd_req_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rd_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_rtry_rd_ack_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_wr_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_wr_req_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_disc_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rd_rtry_wr_ack_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txp_wr_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txd_rd_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txd_wr_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rxd_rd_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rxd_wr_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txf_rd_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rxf_wr_cnt);
6096 6097 6098 6099 6100 6101 6102 6103 6104 6105 6106 6107 6108 6109 6110 6111 6112 6113 6114 6115 6116 6117 6118 6119

	/* Enhanced statistics exist only for Hercules */
	if(sp->device_type == XFRAME_II_DEVICE) {
		tmp_stats[i++] =
				le64_to_cpu(stat_info->rmac_ttl_1519_4095_frms);
		tmp_stats[i++] =
				le64_to_cpu(stat_info->rmac_ttl_4096_8191_frms);
		tmp_stats[i++] =
				le64_to_cpu(stat_info->rmac_ttl_8192_max_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_gt_max_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_osized_alt_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_jabber_alt_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_gt_max_alt_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_vlan_frms);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_len_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_fcs_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_pf_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_da_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_red_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_rts_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_ingm_full_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->link_fault_cnt);
	}

6120 6121 6122
	tmp_stats[i++] = 0;
	tmp_stats[i++] = stat_info->sw_stat.single_ecc_errs;
	tmp_stats[i++] = stat_info->sw_stat.double_ecc_errs;
6123 6124 6125 6126
	tmp_stats[i++] = stat_info->sw_stat.parity_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.serious_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.soft_reset_cnt;
	tmp_stats[i++] = stat_info->sw_stat.fifo_full_cnt;
6127 6128
	for (k = 0; k < MAX_RX_RINGS; k++)
		tmp_stats[i++] = stat_info->sw_stat.ring_full_cnt[k];
6129 6130 6131 6132 6133 6134 6135 6136 6137 6138 6139 6140
	tmp_stats[i++] = stat_info->xpak_stat.alarm_transceiver_temp_high;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_transceiver_temp_low;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_bias_current_high;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_bias_current_low;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_output_power_high;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_output_power_low;
	tmp_stats[i++] = stat_info->xpak_stat.warn_transceiver_temp_high;
	tmp_stats[i++] = stat_info->xpak_stat.warn_transceiver_temp_low;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_bias_current_high;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_bias_current_low;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_output_power_high;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_output_power_low;
6141 6142 6143 6144
	tmp_stats[i++] = stat_info->sw_stat.clubbed_frms_cnt;
	tmp_stats[i++] = stat_info->sw_stat.sending_both;
	tmp_stats[i++] = stat_info->sw_stat.outof_sequence_pkts;
	tmp_stats[i++] = stat_info->sw_stat.flush_max_pkts;
6145
	if (stat_info->sw_stat.num_aggregations) {
6146 6147
		u64 tmp = stat_info->sw_stat.sum_avg_pkts_aggregated;
		int count = 0;
6148
		/*
6149 6150 6151 6152 6153 6154 6155 6156
		 * Since 64-bit divide does not work on all platforms,
		 * do repeated subtraction.
		 */
		while (tmp >= stat_info->sw_stat.num_aggregations) {
			tmp -= stat_info->sw_stat.num_aggregations;
			count++;
		}
		tmp_stats[i++] = count;
6157
	}
6158 6159
	else
		tmp_stats[i++] = 0;
6160
	tmp_stats[i++] = stat_info->sw_stat.mem_alloc_fail_cnt;
6161
	tmp_stats[i++] = stat_info->sw_stat.pci_map_fail_cnt;
6162
	tmp_stats[i++] = stat_info->sw_stat.watchdog_timer_cnt;
6163 6164 6165 6166 6167 6168 6169 6170 6171 6172 6173 6174 6175 6176 6177 6178 6179 6180 6181 6182 6183 6184
	tmp_stats[i++] = stat_info->sw_stat.mem_allocated;
	tmp_stats[i++] = stat_info->sw_stat.mem_freed;
	tmp_stats[i++] = stat_info->sw_stat.link_up_cnt;
	tmp_stats[i++] = stat_info->sw_stat.link_down_cnt;
	tmp_stats[i++] = stat_info->sw_stat.link_up_time;
	tmp_stats[i++] = stat_info->sw_stat.link_down_time;

	tmp_stats[i++] = stat_info->sw_stat.tx_buf_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_desc_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_parity_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_link_loss_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_list_proc_err_cnt;

	tmp_stats[i++] = stat_info->sw_stat.rx_parity_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_parity_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_rda_fail_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_unkn_prot_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_fcs_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_buf_size_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_rxd_corrupt_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_unkn_err_cnt;
6185 6186 6187 6188 6189 6190 6191 6192 6193 6194 6195 6196 6197 6198 6199 6200 6201
	tmp_stats[i++] = stat_info->sw_stat.tda_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.pfc_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.pcc_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tti_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tpa_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.sm_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.lso_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.mac_tmac_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.mac_rmac_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.xgxs_txgxs_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.xgxs_rxgxs_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rc_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.prc_pcix_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rpa_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rda_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rti_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.mc_err_cnt;
L
Linus Torvalds 已提交
6202 6203
}

6204
static int s2io_ethtool_get_regs_len(struct net_device *dev)
L
Linus Torvalds 已提交
6205 6206 6207 6208 6209
{
	return (XENA_REG_SPACE);
}


6210
static u32 s2io_ethtool_get_rx_csum(struct net_device * dev)
L
Linus Torvalds 已提交
6211
{
R
Ralf Baechle 已提交
6212
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
6213 6214 6215

	return (sp->rx_csum);
}
6216 6217

static int s2io_ethtool_set_rx_csum(struct net_device *dev, u32 data)
L
Linus Torvalds 已提交
6218
{
R
Ralf Baechle 已提交
6219
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
6220 6221 6222 6223 6224 6225 6226 6227

	if (data)
		sp->rx_csum = 1;
	else
		sp->rx_csum = 0;

	return 0;
}
6228 6229

static int s2io_get_eeprom_len(struct net_device *dev)
L
Linus Torvalds 已提交
6230 6231 6232 6233
{
	return (XENA_EEPROM_SPACE);
}

6234
static int s2io_get_sset_count(struct net_device *dev, int sset)
L
Linus Torvalds 已提交
6235
{
6236 6237 6238 6239 6240 6241 6242 6243 6244 6245 6246 6247 6248 6249 6250 6251 6252
	struct s2io_nic *sp = dev->priv;

	switch (sset) {
	case ETH_SS_TEST:
		return S2IO_TEST_LEN;
	case ETH_SS_STATS:
		switch(sp->device_type) {
		case XFRAME_I_DEVICE:
			return XFRAME_I_STAT_LEN;
		case XFRAME_II_DEVICE:
			return XFRAME_II_STAT_LEN;
		default:
			return 0;
		}
	default:
		return -EOPNOTSUPP;
	}
L
Linus Torvalds 已提交
6253
}
6254 6255 6256

static void s2io_ethtool_get_strings(struct net_device *dev,
				     u32 stringset, u8 * data)
L
Linus Torvalds 已提交
6257
{
6258 6259 6260
	int stat_size = 0;
	struct s2io_nic *sp = dev->priv;

L
Linus Torvalds 已提交
6261 6262 6263 6264 6265
	switch (stringset) {
	case ETH_SS_TEST:
		memcpy(data, s2io_gstrings, S2IO_STRINGS_LEN);
		break;
	case ETH_SS_STATS:
6266 6267 6268 6269 6270 6271 6272 6273 6274 6275 6276
		stat_size = sizeof(ethtool_xena_stats_keys);
		memcpy(data, &ethtool_xena_stats_keys,stat_size);
		if(sp->device_type == XFRAME_II_DEVICE) {
			memcpy(data + stat_size,
				&ethtool_enhanced_stats_keys,
				sizeof(ethtool_enhanced_stats_keys));
			stat_size += sizeof(ethtool_enhanced_stats_keys);
		}

		memcpy(data + stat_size, &ethtool_driver_stats_keys,
			sizeof(ethtool_driver_stats_keys));
L
Linus Torvalds 已提交
6277 6278 6279
	}
}

6280
static int s2io_ethtool_op_set_tx_csum(struct net_device *dev, u32 data)
L
Linus Torvalds 已提交
6281 6282 6283 6284 6285 6286 6287 6288 6289
{
	if (data)
		dev->features |= NETIF_F_IP_CSUM;
	else
		dev->features &= ~NETIF_F_IP_CSUM;

	return 0;
}

6290 6291 6292 6293 6294 6295 6296 6297 6298 6299 6300 6301 6302
static u32 s2io_ethtool_op_get_tso(struct net_device *dev)
{
	return (dev->features & NETIF_F_TSO) != 0;
}
static int s2io_ethtool_op_set_tso(struct net_device *dev, u32 data)
{
	if (data)
		dev->features |= (NETIF_F_TSO | NETIF_F_TSO6);
	else
		dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);

	return 0;
}
L
Linus Torvalds 已提交
6303

6304
static const struct ethtool_ops netdev_ethtool_ops = {
L
Linus Torvalds 已提交
6305 6306 6307 6308 6309 6310 6311 6312 6313
	.get_settings = s2io_ethtool_gset,
	.set_settings = s2io_ethtool_sset,
	.get_drvinfo = s2io_ethtool_gdrvinfo,
	.get_regs_len = s2io_ethtool_get_regs_len,
	.get_regs = s2io_ethtool_gregs,
	.get_link = ethtool_op_get_link,
	.get_eeprom_len = s2io_get_eeprom_len,
	.get_eeprom = s2io_ethtool_geeprom,
	.set_eeprom = s2io_ethtool_seeprom,
6314
	.get_ringparam = s2io_ethtool_gringparam,
L
Linus Torvalds 已提交
6315 6316 6317 6318 6319 6320
	.get_pauseparam = s2io_ethtool_getpause_data,
	.set_pauseparam = s2io_ethtool_setpause_data,
	.get_rx_csum = s2io_ethtool_get_rx_csum,
	.set_rx_csum = s2io_ethtool_set_rx_csum,
	.set_tx_csum = s2io_ethtool_op_set_tx_csum,
	.set_sg = ethtool_op_set_sg,
6321 6322
	.get_tso = s2io_ethtool_op_get_tso,
	.set_tso = s2io_ethtool_op_set_tso,
A
Ananda Raju 已提交
6323
	.set_ufo = ethtool_op_set_ufo,
L
Linus Torvalds 已提交
6324 6325 6326
	.self_test = s2io_ethtool_test,
	.get_strings = s2io_ethtool_get_strings,
	.phys_id = s2io_ethtool_idnic,
6327 6328
	.get_ethtool_stats = s2io_get_ethtool_stats,
	.get_sset_count = s2io_get_sset_count,
L
Linus Torvalds 已提交
6329 6330 6331
};

/**
6332
 *  s2io_ioctl - Entry point for the Ioctl
L
Linus Torvalds 已提交
6333 6334 6335 6336 6337 6338
 *  @dev :  Device pointer.
 *  @ifr :  An IOCTL specefic structure, that can contain a pointer to
 *  a proprietary structure used to pass information to the driver.
 *  @cmd :  This is used to distinguish between the different commands that
 *  can be passed to the IOCTL functions.
 *  Description:
6339 6340
 *  Currently there are no special functionality supported in IOCTL, hence
 *  function always return EOPNOTSUPPORTED
L
Linus Torvalds 已提交
6341 6342
 */

6343
static int s2io_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
L
Linus Torvalds 已提交
6344 6345 6346 6347 6348 6349 6350 6351 6352 6353 6354 6355 6356 6357 6358
{
	return -EOPNOTSUPP;
}

/**
 *  s2io_change_mtu - entry point to change MTU size for the device.
 *   @dev : device pointer.
 *   @new_mtu : the new MTU size for the device.
 *   Description: A driver entry point to change MTU size for the device.
 *   Before changing the MTU the device must be stopped.
 *  Return value:
 *   0 on success and an appropriate (-)ve integer as defined in errno.h
 *   file on failure.
 */

6359
static int s2io_change_mtu(struct net_device *dev, int new_mtu)
L
Linus Torvalds 已提交
6360
{
R
Ralf Baechle 已提交
6361
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
6362 6363 6364 6365 6366 6367 6368 6369

	if ((new_mtu < MIN_MTU) || (new_mtu > S2IO_JUMBO_SIZE)) {
		DBG_PRINT(ERR_DBG, "%s: MTU size is invalid.\n",
			  dev->name);
		return -EPERM;
	}

	dev->mtu = new_mtu;
6370
	if (netif_running(dev)) {
A
Ananda Raju 已提交
6371
		s2io_card_down(sp);
6372 6373 6374 6375 6376 6377 6378 6379
		netif_stop_queue(dev);
		if (s2io_card_up(sp)) {
			DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n",
				  __FUNCTION__);
		}
		if (netif_queue_stopped(dev))
			netif_wake_queue(dev);
	} else { /* Device is down */
R
Ralf Baechle 已提交
6380
		struct XENA_dev_config __iomem *bar0 = sp->bar0;
6381 6382 6383 6384
		u64 val64 = new_mtu;

		writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);
	}
L
Linus Torvalds 已提交
6385 6386 6387 6388 6389 6390 6391 6392 6393

	return 0;
}

/**
 *  s2io_tasklet - Bottom half of the ISR.
 *  @dev_adr : address of the device structure in dma_addr_t format.
 *  Description:
 *  This is the tasklet or the bottom half of the ISR. This is
6394
 *  an extension of the ISR which is scheduled by the scheduler to be run
L
Linus Torvalds 已提交
6395
 *  when the load on the CPU is low. All low priority tasks of the ISR can
6396
 *  be pushed into the tasklet. For now the tasklet is used only to
L
Linus Torvalds 已提交
6397 6398 6399 6400 6401 6402 6403 6404
 *  replenish the Rx buffers in the Rx buffer descriptors.
 *  Return value:
 *  void.
 */

static void s2io_tasklet(unsigned long dev_addr)
{
	struct net_device *dev = (struct net_device *) dev_addr;
R
Ralf Baechle 已提交
6405
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
6406
	int i, ret;
R
Ralf Baechle 已提交
6407
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
6408 6409 6410 6411 6412 6413 6414 6415 6416
	struct config_param *config;

	mac_control = &sp->mac_control;
	config = &sp->config;

	if (!TASKLET_IN_USE) {
		for (i = 0; i < config->rx_ring_num; i++) {
			ret = fill_rx_buffers(sp, i);
			if (ret == -ENOMEM) {
6417
				DBG_PRINT(INFO_DBG, "%s: Out of ",
L
Linus Torvalds 已提交
6418
					  dev->name);
6419
				DBG_PRINT(INFO_DBG, "memory in tasklet\n");
L
Linus Torvalds 已提交
6420 6421
				break;
			} else if (ret == -EFILL) {
6422
				DBG_PRINT(INFO_DBG,
L
Linus Torvalds 已提交
6423 6424 6425 6426 6427 6428 6429 6430 6431 6432 6433 6434 6435 6436 6437
					  "%s: Rx Ring %d is full\n",
					  dev->name, i);
				break;
			}
		}
		clear_bit(0, (&sp->tasklet_status));
	}
}

/**
 * s2io_set_link - Set the LInk status
 * @data: long pointer to device private structue
 * Description: Sets the link status for the adapter
 */

6438
static void s2io_set_link(struct work_struct *work)
L
Linus Torvalds 已提交
6439
{
R
Ralf Baechle 已提交
6440
	struct s2io_nic *nic = container_of(work, struct s2io_nic, set_link_task);
L
Linus Torvalds 已提交
6441
	struct net_device *dev = nic->dev;
R
Ralf Baechle 已提交
6442
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
L
Linus Torvalds 已提交
6443 6444 6445
	register u64 val64;
	u16 subid;

6446 6447 6448 6449 6450
	rtnl_lock();

	if (!netif_running(dev))
		goto out_unlock;

6451
	if (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(nic->state))) {
L
Linus Torvalds 已提交
6452
		/* The card is being reset, no point doing anything */
6453
		goto out_unlock;
L
Linus Torvalds 已提交
6454 6455 6456
	}

	subid = nic->pdev->subsystem_device;
6457 6458 6459 6460 6461 6462 6463
	if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
		/*
		 * Allow a small delay for the NICs self initiated
		 * cleanup to complete.
		 */
		msleep(100);
	}
L
Linus Torvalds 已提交
6464 6465

	val64 = readq(&bar0->adapter_status);
6466 6467 6468 6469 6470
	if (LINK_IS_UP(val64)) {
		if (!(readq(&bar0->adapter_control) & ADAPTER_CNTL_EN)) {
			if (verify_xena_quiescence(nic)) {
				val64 = readq(&bar0->adapter_control);
				val64 |= ADAPTER_CNTL_EN;
L
Linus Torvalds 已提交
6471
				writeq(val64, &bar0->adapter_control);
6472 6473 6474 6475 6476 6477 6478 6479 6480
				if (CARDS_WITH_FAULTY_LINK_INDICATORS(
					nic->device_type, subid)) {
					val64 = readq(&bar0->gpio_control);
					val64 |= GPIO_CTRL_GPIO_0;
					writeq(val64, &bar0->gpio_control);
					val64 = readq(&bar0->gpio_control);
				} else {
					val64 |= ADAPTER_LED_ON;
					writeq(val64, &bar0->adapter_control);
6481
				}
L
Linus Torvalds 已提交
6482
				nic->device_enabled_once = TRUE;
6483 6484 6485 6486
			} else {
				DBG_PRINT(ERR_DBG, "%s: Error: ", dev->name);
				DBG_PRINT(ERR_DBG, "device is not Quiescent\n");
				netif_stop_queue(dev);
L
Linus Torvalds 已提交
6487
			}
6488
		}
6489 6490 6491 6492
		val64 = readq(&bar0->adapter_control);
		val64 |= ADAPTER_LED_ON;
		writeq(val64, &bar0->adapter_control);
		s2io_link(nic, LINK_UP);
6493 6494 6495 6496 6497 6498 6499
	} else {
		if (CARDS_WITH_FAULTY_LINK_INDICATORS(nic->device_type,
						      subid)) {
			val64 = readq(&bar0->gpio_control);
			val64 &= ~GPIO_CTRL_GPIO_0;
			writeq(val64, &bar0->gpio_control);
			val64 = readq(&bar0->gpio_control);
L
Linus Torvalds 已提交
6500
		}
6501 6502 6503 6504
		/* turn off LED */
		val64 = readq(&bar0->adapter_control);
		val64 = val64 &(~ADAPTER_LED_ON);
		writeq(val64, &bar0->adapter_control);
6505
		s2io_link(nic, LINK_DOWN);
L
Linus Torvalds 已提交
6506
	}
6507
	clear_bit(__S2IO_STATE_LINK_TASK, &(nic->state));
6508 6509

out_unlock:
6510
	rtnl_unlock();
L
Linus Torvalds 已提交
6511 6512
}

R
Ralf Baechle 已提交
6513 6514 6515 6516
static int set_rxd_buffer_pointer(struct s2io_nic *sp, struct RxD_t *rxdp,
				struct buffAdd *ba,
				struct sk_buff **skb, u64 *temp0, u64 *temp1,
				u64 *temp2, int size)
6517 6518
{
	struct net_device *dev = sp->dev;
6519
	struct swStat *stats = &sp->mac_control.stats_info->sw_stat;
6520 6521

	if ((sp->rxd_mode == RXD_MODE_1) && (rxdp->Host_Control == 0)) {
6522
		struct RxD1 *rxdp1 = (struct RxD1 *)rxdp;
6523 6524 6525 6526 6527 6528 6529 6530
		/* allocate skb */
		if (*skb) {
			DBG_PRINT(INFO_DBG, "SKB is not NULL\n");
			/*
			 * As Rx frame are not going to be processed,
			 * using same mapped address for the Rxd
			 * buffer pointer
			 */
6531
			rxdp1->Buffer0_ptr = *temp0;
6532 6533 6534
		} else {
			*skb = dev_alloc_skb(size);
			if (!(*skb)) {
6535
				DBG_PRINT(INFO_DBG, "%s: Out of ", dev->name);
6536 6537 6538 6539
				DBG_PRINT(INFO_DBG, "memory to allocate ");
				DBG_PRINT(INFO_DBG, "1 buf mode SKBs\n");
				sp->mac_control.stats_info->sw_stat. \
					mem_alloc_fail_cnt++;
6540 6541
				return -ENOMEM ;
			}
6542 6543
			sp->mac_control.stats_info->sw_stat.mem_allocated 
				+= (*skb)->truesize;
6544 6545 6546 6547
			/* storing the mapped addr in a temp variable
			 * such it will be used for next rxd whose
			 * Host Control is NULL
			 */
6548
			rxdp1->Buffer0_ptr = *temp0 =
6549 6550 6551
				pci_map_single( sp->pdev, (*skb)->data,
					size - NET_IP_ALIGN,
					PCI_DMA_FROMDEVICE);
6552 6553 6554 6555
			if( (rxdp1->Buffer0_ptr == 0) ||
				(rxdp1->Buffer0_ptr == DMA_ERROR_CODE)) {
				goto memalloc_failed;
			}
6556 6557 6558
			rxdp->Host_Control = (unsigned long) (*skb);
		}
	} else if ((sp->rxd_mode == RXD_MODE_3B) && (rxdp->Host_Control == 0)) {
6559
		struct RxD3 *rxdp3 = (struct RxD3 *)rxdp;
6560 6561
		/* Two buffer Mode */
		if (*skb) {
6562 6563 6564
			rxdp3->Buffer2_ptr = *temp2;
			rxdp3->Buffer0_ptr = *temp0;
			rxdp3->Buffer1_ptr = *temp1;
6565 6566
		} else {
			*skb = dev_alloc_skb(size);
6567
			if (!(*skb)) {
6568 6569 6570 6571 6572
				DBG_PRINT(INFO_DBG, "%s: Out of ", dev->name);
				DBG_PRINT(INFO_DBG, "memory to allocate ");
				DBG_PRINT(INFO_DBG, "2 buf mode SKBs\n");
				sp->mac_control.stats_info->sw_stat. \
					mem_alloc_fail_cnt++;
6573 6574
				return -ENOMEM;
			}
6575 6576
			sp->mac_control.stats_info->sw_stat.mem_allocated 
				+= (*skb)->truesize;
6577
			rxdp3->Buffer2_ptr = *temp2 =
6578 6579 6580
				pci_map_single(sp->pdev, (*skb)->data,
					       dev->mtu + 4,
					       PCI_DMA_FROMDEVICE);
6581 6582 6583 6584
			if( (rxdp3->Buffer2_ptr == 0) ||
				(rxdp3->Buffer2_ptr == DMA_ERROR_CODE)) {
				goto memalloc_failed;
			}
6585
			rxdp3->Buffer0_ptr = *temp0 =
6586 6587
				pci_map_single( sp->pdev, ba->ba_0, BUF0_LEN,
						PCI_DMA_FROMDEVICE);
6588 6589 6590
			if( (rxdp3->Buffer0_ptr == 0) ||
				(rxdp3->Buffer0_ptr == DMA_ERROR_CODE)) {
				pci_unmap_single (sp->pdev,
A
Al Viro 已提交
6591
					(dma_addr_t)rxdp3->Buffer2_ptr,
6592 6593 6594
					dev->mtu + 4, PCI_DMA_FROMDEVICE);
				goto memalloc_failed;
			}
6595 6596 6597
			rxdp->Host_Control = (unsigned long) (*skb);

			/* Buffer-1 will be dummy buffer not used */
6598
			rxdp3->Buffer1_ptr = *temp1 =
6599 6600
				pci_map_single(sp->pdev, ba->ba_1, BUF1_LEN,
						PCI_DMA_FROMDEVICE);
6601 6602 6603
			if( (rxdp3->Buffer1_ptr == 0) ||
				(rxdp3->Buffer1_ptr == DMA_ERROR_CODE)) {
				pci_unmap_single (sp->pdev,
A
Al Viro 已提交
6604 6605 6606 6607
					(dma_addr_t)rxdp3->Buffer0_ptr,
					BUF0_LEN, PCI_DMA_FROMDEVICE);
				pci_unmap_single (sp->pdev,
					(dma_addr_t)rxdp3->Buffer2_ptr,
6608 6609 6610
					dev->mtu + 4, PCI_DMA_FROMDEVICE);
				goto memalloc_failed;
			}
6611 6612 6613
		}
	}
	return 0;
6614 6615 6616 6617 6618
	memalloc_failed:
		stats->pci_map_fail_cnt++;
		stats->mem_freed += (*skb)->truesize;
		dev_kfree_skb(*skb);
		return -ENOMEM;
6619
}
6620

R
Ralf Baechle 已提交
6621 6622
static void set_rxd_buffer_size(struct s2io_nic *sp, struct RxD_t *rxdp,
				int size)
6623 6624 6625 6626 6627 6628 6629 6630 6631 6632 6633
{
	struct net_device *dev = sp->dev;
	if (sp->rxd_mode == RXD_MODE_1) {
		rxdp->Control_2 = SET_BUFFER0_SIZE_1( size - NET_IP_ALIGN);
	} else if (sp->rxd_mode == RXD_MODE_3B) {
		rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN);
		rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1);
		rxdp->Control_2 |= SET_BUFFER2_SIZE_3( dev->mtu + 4);
	}
}

R
Ralf Baechle 已提交
6634
static  int rxd_owner_bit_reset(struct s2io_nic *sp)
6635 6636
{
	int i, j, k, blk_cnt = 0, size;
R
Ralf Baechle 已提交
6637
	struct mac_info * mac_control = &sp->mac_control;
6638 6639
	struct config_param *config = &sp->config;
	struct net_device *dev = sp->dev;
R
Ralf Baechle 已提交
6640
	struct RxD_t *rxdp = NULL;
6641
	struct sk_buff *skb = NULL;
R
Ralf Baechle 已提交
6642
	struct buffAdd *ba = NULL;
6643 6644 6645 6646 6647 6648 6649 6650 6651 6652 6653 6654 6655 6656 6657 6658 6659 6660
	u64 temp0_64 = 0, temp1_64 = 0, temp2_64 = 0;

	/* Calculate the size based on ring mode */
	size = dev->mtu + HEADER_ETHERNET_II_802_3_SIZE +
		HEADER_802_2_SIZE + HEADER_SNAP_SIZE;
	if (sp->rxd_mode == RXD_MODE_1)
		size += NET_IP_ALIGN;
	else if (sp->rxd_mode == RXD_MODE_3B)
		size = dev->mtu + ALIGN_SIZE + BUF0_LEN + 4;

	for (i = 0; i < config->rx_ring_num; i++) {
		blk_cnt = config->rx_cfg[i].num_rxd /
			(rxd_count[sp->rxd_mode] +1);

		for (j = 0; j < blk_cnt; j++) {
			for (k = 0; k < rxd_count[sp->rxd_mode]; k++) {
				rxdp = mac_control->rings[i].
					rx_blocks[j].rxds[k].virt_addr;
6661
				if(sp->rxd_mode == RXD_MODE_3B)
6662
					ba = &mac_control->rings[i].ba[j][k];
6663
				if (set_rxd_buffer_pointer(sp, rxdp, ba,
6664 6665
						       &skb,(u64 *)&temp0_64,
						       (u64 *)&temp1_64,
6666 6667 6668 6669
						       (u64 *)&temp2_64,
							size) == ENOMEM) {
					return 0;
				}
6670 6671 6672 6673 6674 6675 6676 6677 6678 6679 6680 6681

				set_rxd_buffer_size(sp, rxdp, size);
				wmb();
				/* flip the Ownership bit to Hardware */
				rxdp->Control_1 |= RXD_OWN_XENA;
			}
		}
	}
	return 0;

}

R
Ralf Baechle 已提交
6682
static int s2io_add_isr(struct s2io_nic * sp)
L
Linus Torvalds 已提交
6683
{
A
Ananda Raju 已提交
6684
	int ret = 0;
A
Ananda Raju 已提交
6685
	struct net_device *dev = sp->dev;
A
Ananda Raju 已提交
6686
	int err = 0;
L
Linus Torvalds 已提交
6687

6688
	if (sp->config.intr_type == MSI_X)
A
Ananda Raju 已提交
6689 6690 6691
		ret = s2io_enable_msi_x(sp);
	if (ret) {
		DBG_PRINT(ERR_DBG, "%s: Defaulting to INTA\n", dev->name);
6692
		sp->config.intr_type = INTA;
6693
	}
L
Linus Torvalds 已提交
6694

R
Ralf Baechle 已提交
6695
	/* Store the values of the MSIX table in the struct s2io_nic structure */
A
Ananda Raju 已提交
6696
	store_xmsi_data(sp);
A
Ananda Raju 已提交
6697

A
Ananda Raju 已提交
6698
	/* After proper initialization of H/W, register ISR */
6699
	if (sp->config.intr_type == MSI_X) {
6700
		int i, msix_tx_cnt=0,msix_rx_cnt=0;
A
Ananda Raju 已提交
6701

A
Ananda Raju 已提交
6702 6703 6704 6705 6706 6707 6708
		for (i=1; (sp->s2io_entries[i].in_use == MSIX_FLG); i++) {
			if (sp->s2io_entries[i].type == MSIX_FIFO_TYPE) {
				sprintf(sp->desc[i], "%s:MSI-X-%d-TX",
					dev->name, i);
				err = request_irq(sp->entries[i].vector,
					  s2io_msix_fifo_handle, 0, sp->desc[i],
						  sp->s2io_entries[i].arg);
6709 6710 6711 6712 6713 6714 6715 6716 6717 6718 6719 6720
				/* If either data or addr is zero print it */
				if(!(sp->msix_info[i].addr &&
					sp->msix_info[i].data)) {
					DBG_PRINT(ERR_DBG, "%s @ Addr:0x%llx"
						"Data:0x%lx\n",sp->desc[i],
						(unsigned long long)
						sp->msix_info[i].addr,
						(unsigned long)
						ntohl(sp->msix_info[i].data));
				} else {
					msix_tx_cnt++;
				}
A
Ananda Raju 已提交
6721 6722 6723 6724 6725 6726
			} else {
				sprintf(sp->desc[i], "%s:MSI-X-%d-RX",
					dev->name, i);
				err = request_irq(sp->entries[i].vector,
					  s2io_msix_ring_handle, 0, sp->desc[i],
						  sp->s2io_entries[i].arg);
6727 6728 6729 6730 6731 6732 6733 6734 6735 6736 6737 6738
				/* If either data or addr is zero print it */
				if(!(sp->msix_info[i].addr &&
					sp->msix_info[i].data)) {
					DBG_PRINT(ERR_DBG, "%s @ Addr:0x%llx"
						"Data:0x%lx\n",sp->desc[i],
						(unsigned long long)
						sp->msix_info[i].addr,
						(unsigned long)
						ntohl(sp->msix_info[i].data));
				} else {
					msix_rx_cnt++;
				}
A
Ananda Raju 已提交
6739
			}
A
Ananda Raju 已提交
6740 6741 6742 6743 6744 6745 6746 6747
			if (err) {
				DBG_PRINT(ERR_DBG,"%s:MSI-X-%d registration "
					  "failed\n", dev->name, i);
				DBG_PRINT(ERR_DBG, "Returned: %d\n", err);
				return -1;
			}
			sp->s2io_entries[i].in_use = MSIX_REGISTERED_SUCCESS;
		}
6748 6749
		printk("MSI-X-TX %d entries enabled\n",msix_tx_cnt);
		printk("MSI-X-RX %d entries enabled\n",msix_rx_cnt);
A
Ananda Raju 已提交
6750
	}
6751
	if (sp->config.intr_type == INTA) {
A
Ananda Raju 已提交
6752 6753 6754 6755 6756 6757 6758 6759 6760 6761
		err = request_irq((int) sp->pdev->irq, s2io_isr, IRQF_SHARED,
				sp->name, dev);
		if (err) {
			DBG_PRINT(ERR_DBG, "%s: ISR registration failed\n",
				  dev->name);
			return -1;
		}
	}
	return 0;
}
R
Ralf Baechle 已提交
6762
static void s2io_rem_isr(struct s2io_nic * sp)
A
Ananda Raju 已提交
6763 6764
{
	struct net_device *dev = sp->dev;
6765
	struct swStat *stats = &sp->mac_control.stats_info->sw_stat;
A
Ananda Raju 已提交
6766

6767
	if (sp->config.intr_type == MSI_X) {
A
Ananda Raju 已提交
6768 6769 6770 6771 6772 6773 6774 6775
		int i;
		u16 msi_control;

		for (i=1; (sp->s2io_entries[i].in_use ==
			MSIX_REGISTERED_SUCCESS); i++) {
			int vector = sp->entries[i].vector;
			void *arg = sp->s2io_entries[i].arg;

6776
			synchronize_irq(vector);
A
Ananda Raju 已提交
6777 6778
			free_irq(vector, arg);
		}
6779 6780 6781 6782 6783 6784 6785 6786 6787 6788

		kfree(sp->entries);
		stats->mem_freed +=
			(MAX_REQUESTED_MSI_X * sizeof(struct msix_entry));
		kfree(sp->s2io_entries);
		stats->mem_freed +=
			(MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry));
		sp->entries = NULL;
		sp->s2io_entries = NULL;

A
Ananda Raju 已提交
6789 6790 6791 6792 6793 6794
		pci_read_config_word(sp->pdev, 0x42, &msi_control);
		msi_control &= 0xFFFE; /* Disable MSI */
		pci_write_config_word(sp->pdev, 0x42, msi_control);

		pci_disable_msix(sp->pdev);
	} else {
6795
		synchronize_irq(sp->pdev->irq);
A
Ananda Raju 已提交
6796
		free_irq(sp->pdev->irq, dev);
A
Ananda Raju 已提交
6797
	}
A
Ananda Raju 已提交
6798 6799
}

6800
static void do_s2io_card_down(struct s2io_nic * sp, int do_io)
A
Ananda Raju 已提交
6801 6802
{
	int cnt = 0;
R
Ralf Baechle 已提交
6803
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
A
Ananda Raju 已提交
6804 6805 6806 6807 6808
	unsigned long flags;
	register u64 val64 = 0;

	del_timer_sync(&sp->alarm_timer);
	/* If s2io_set_link task is executing, wait till it completes. */
6809
	while (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(sp->state))) {
A
Ananda Raju 已提交
6810 6811
		msleep(50);
	}
6812
	clear_bit(__S2IO_STATE_CARD_UP, &sp->state);
A
Ananda Raju 已提交
6813 6814

	/* disable Tx and Rx traffic on the NIC */
6815 6816
	if (do_io)
		stop_nic(sp);
A
Ananda Raju 已提交
6817 6818

	s2io_rem_isr(sp);
L
Linus Torvalds 已提交
6819 6820 6821 6822 6823

	/* Kill tasklet. */
	tasklet_kill(&sp->task);

	/* Check if the device is Quiescent and then Reset the NIC */
6824
	while(do_io) {
6825 6826 6827 6828 6829 6830 6831 6832 6833
		/* As per the HW requirement we need to replenish the
		 * receive buffer to avoid the ring bump. Since there is
		 * no intention of processing the Rx frame at this pointwe are
		 * just settting the ownership bit of rxd in Each Rx
		 * ring to HW and set the appropriate buffer size
		 * based on the ring mode
		 */
		rxd_owner_bit_reset(sp);

L
Linus Torvalds 已提交
6834
		val64 = readq(&bar0->adapter_status);
6835 6836
		if (verify_xena_quiescence(sp)) {
			if(verify_pcc_quiescent(sp, sp->device_enabled_once))
L
Linus Torvalds 已提交
6837 6838 6839 6840 6841 6842 6843 6844 6845 6846 6847 6848
			break;
		}

		msleep(50);
		cnt++;
		if (cnt == 10) {
			DBG_PRINT(ERR_DBG,
				  "s2io_close:Device not Quiescent ");
			DBG_PRINT(ERR_DBG, "adaper status reads 0x%llx\n",
				  (unsigned long long) val64);
			break;
		}
6849 6850 6851
	}
	if (do_io)
		s2io_reset(sp);
L
Linus Torvalds 已提交
6852

6853 6854
	spin_lock_irqsave(&sp->tx_lock, flags);
	/* Free all Tx buffers */
L
Linus Torvalds 已提交
6855
	free_tx_buffers(sp);
6856 6857 6858 6859
	spin_unlock_irqrestore(&sp->tx_lock, flags);

	/* Free all Rx buffers */
	spin_lock_irqsave(&sp->rx_lock, flags);
L
Linus Torvalds 已提交
6860
	free_rx_buffers(sp);
6861
	spin_unlock_irqrestore(&sp->rx_lock, flags);
L
Linus Torvalds 已提交
6862

6863
	clear_bit(__S2IO_STATE_LINK_TASK, &(sp->state));
L
Linus Torvalds 已提交
6864 6865
}

6866 6867 6868 6869 6870
static void s2io_card_down(struct s2io_nic * sp)
{
	do_s2io_card_down(sp, 1);
}

R
Ralf Baechle 已提交
6871
static int s2io_card_up(struct s2io_nic * sp)
L
Linus Torvalds 已提交
6872
{
6873
	int i, ret = 0;
R
Ralf Baechle 已提交
6874
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
6875 6876
	struct config_param *config;
	struct net_device *dev = (struct net_device *) sp->dev;
A
Ananda Raju 已提交
6877
	u16 interruptible;
L
Linus Torvalds 已提交
6878 6879 6880 6881 6882

	/* Initialize the H/W I/O registers */
	if (init_nic(sp) != 0) {
		DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
			  dev->name);
A
Ananda Raju 已提交
6883
		s2io_reset(sp);
L
Linus Torvalds 已提交
6884 6885 6886
		return -ENODEV;
	}

6887 6888
	/*
	 * Initializing the Rx buffers. For now we are considering only 1
L
Linus Torvalds 已提交
6889 6890 6891 6892 6893 6894 6895 6896 6897 6898 6899 6900 6901 6902 6903 6904
	 * Rx ring and initializing buffers into 30 Rx blocks
	 */
	mac_control = &sp->mac_control;
	config = &sp->config;

	for (i = 0; i < config->rx_ring_num; i++) {
		if ((ret = fill_rx_buffers(sp, i))) {
			DBG_PRINT(ERR_DBG, "%s: Out of memory in Open\n",
				  dev->name);
			s2io_reset(sp);
			free_rx_buffers(sp);
			return -ENOMEM;
		}
		DBG_PRINT(INFO_DBG, "Buf in ring:%d is %d:\n", i,
			  atomic_read(&sp->rx_bufs_left[i]));
	}
6905 6906 6907 6908 6909 6910 6911
	/* Maintain the state prior to the open */
	if (sp->promisc_flg)
		sp->promisc_flg = 0;
	if (sp->m_cast_flg) {
		sp->m_cast_flg = 0;
		sp->all_multi_pos= 0;
	}
L
Linus Torvalds 已提交
6912 6913 6914 6915

	/* Setting its receive mode */
	s2io_set_multicast(dev);

6916
	if (sp->lro) {
6917
		/* Initialize max aggregatable pkts per session based on MTU */
6918 6919 6920 6921 6922 6923
		sp->lro_max_aggr_per_sess = ((1<<16) - 1) / dev->mtu;
		/* Check if we can use(if specified) user provided value */
		if (lro_max_pkts < sp->lro_max_aggr_per_sess)
			sp->lro_max_aggr_per_sess = lro_max_pkts;
	}

L
Linus Torvalds 已提交
6924 6925 6926 6927
	/* Enable Rx Traffic and interrupts on the NIC */
	if (start_nic(sp)) {
		DBG_PRINT(ERR_DBG, "%s: Starting NIC failed\n", dev->name);
		s2io_reset(sp);
A
Ananda Raju 已提交
6928 6929 6930 6931 6932 6933
		free_rx_buffers(sp);
		return -ENODEV;
	}

	/* Add interrupt service routine */
	if (s2io_add_isr(sp) != 0) {
6934
		if (sp->config.intr_type == MSI_X)
A
Ananda Raju 已提交
6935 6936
			s2io_rem_isr(sp);
		s2io_reset(sp);
L
Linus Torvalds 已提交
6937 6938 6939 6940
		free_rx_buffers(sp);
		return -ENODEV;
	}

6941 6942
	S2IO_TIMER_CONF(sp->alarm_timer, s2io_alarm_handle, sp, (HZ/2));

A
Ananda Raju 已提交
6943 6944 6945 6946
	/* Enable tasklet for the device */
	tasklet_init(&sp->task, s2io_tasklet, (unsigned long) dev);

	/*  Enable select interrupts */
6947
	en_dis_err_alarms(sp, ENA_ALL_INTRS, ENABLE_INTRS);
6948
	if (sp->config.intr_type != INTA)
A
Ananda Raju 已提交
6949 6950 6951
		en_dis_able_nic_intrs(sp, ENA_ALL_INTRS, DISABLE_INTRS);
	else {
		interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
6952
		interruptible |= TX_PIC_INTR;
A
Ananda Raju 已提交
6953 6954 6955
		en_dis_able_nic_intrs(sp, interruptible, ENABLE_INTRS);
	}

6956
	set_bit(__S2IO_STATE_CARD_UP, &sp->state);
L
Linus Torvalds 已提交
6957 6958 6959
	return 0;
}

6960
/**
L
Linus Torvalds 已提交
6961 6962 6963 6964
 * s2io_restart_nic - Resets the NIC.
 * @data : long pointer to the device private structure
 * Description:
 * This function is scheduled to be run by the s2io_tx_watchdog
6965
 * function after 0.5 secs to reset the NIC. The idea is to reduce
L
Linus Torvalds 已提交
6966 6967 6968 6969
 * the run time of the watch dog routine which is run holding a
 * spin lock.
 */

6970
static void s2io_restart_nic(struct work_struct *work)
L
Linus Torvalds 已提交
6971
{
R
Ralf Baechle 已提交
6972
	struct s2io_nic *sp = container_of(work, struct s2io_nic, rst_timer_task);
6973
	struct net_device *dev = sp->dev;
L
Linus Torvalds 已提交
6974

6975 6976 6977 6978 6979
	rtnl_lock();

	if (!netif_running(dev))
		goto out_unlock;

A
Ananda Raju 已提交
6980
	s2io_card_down(sp);
L
Linus Torvalds 已提交
6981 6982 6983 6984 6985 6986 6987
	if (s2io_card_up(sp)) {
		DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n",
			  dev->name);
	}
	netif_wake_queue(dev);
	DBG_PRINT(ERR_DBG, "%s: was reset by Tx watchdog timer\n",
		  dev->name);
6988 6989
out_unlock:
	rtnl_unlock();
L
Linus Torvalds 已提交
6990 6991
}

6992 6993
/**
 *  s2io_tx_watchdog - Watchdog for transmit side.
L
Linus Torvalds 已提交
6994 6995 6996 6997 6998 6999 7000 7001 7002 7003 7004 7005 7006
 *  @dev : Pointer to net device structure
 *  Description:
 *  This function is triggered if the Tx Queue is stopped
 *  for a pre-defined amount of time when the Interface is still up.
 *  If the Interface is jammed in such a situation, the hardware is
 *  reset (by s2io_close) and restarted again (by s2io_open) to
 *  overcome any problem that might have been caused in the hardware.
 *  Return value:
 *  void
 */

static void s2io_tx_watchdog(struct net_device *dev)
{
R
Ralf Baechle 已提交
7007
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
7008 7009

	if (netif_carrier_ok(dev)) {
7010
		sp->mac_control.stats_info->sw_stat.watchdog_timer_cnt++;
L
Linus Torvalds 已提交
7011
		schedule_work(&sp->rst_timer_task);
7012
		sp->mac_control.stats_info->sw_stat.soft_reset_cnt++;
L
Linus Torvalds 已提交
7013 7014 7015 7016 7017 7018 7019 7020 7021 7022
	}
}

/**
 *   rx_osm_handler - To perform some OS related operations on SKB.
 *   @sp: private member of the device structure,pointer to s2io_nic structure.
 *   @skb : the socket buffer pointer.
 *   @len : length of the packet
 *   @cksum : FCS checksum of the frame.
 *   @ring_no : the ring from which this RxD was extracted.
7023
 *   Description:
7024
 *   This function is called by the Rx interrupt serivce routine to perform
L
Linus Torvalds 已提交
7025 7026 7027 7028 7029 7030 7031 7032
 *   some OS related operations on the SKB before passing it to the upper
 *   layers. It mainly checks if the checksum is OK, if so adds it to the
 *   SKBs cksum variable, increments the Rx packet count and passes the SKB
 *   to the upper layer. If the checksum is wrong, it increments the Rx
 *   packet error count, frees the SKB and returns error.
 *   Return value:
 *   SUCCESS on success and -1 on failure.
 */
R
Ralf Baechle 已提交
7033
static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp)
L
Linus Torvalds 已提交
7034
{
R
Ralf Baechle 已提交
7035
	struct s2io_nic *sp = ring_data->nic;
L
Linus Torvalds 已提交
7036
	struct net_device *dev = (struct net_device *) sp->dev;
7037 7038 7039
	struct sk_buff *skb = (struct sk_buff *)
		((unsigned long) rxdp->Host_Control);
	int ring_no = ring_data->ring_no;
L
Linus Torvalds 已提交
7040
	u16 l3_csum, l4_csum;
7041
	unsigned long long err = rxdp->Control_1 & RXD_T_CODE;
R
Ralf Baechle 已提交
7042
	struct lro *lro;
7043
	u8 err_mask;
7044

7045
	skb->dev = dev;
A
Ananda Raju 已提交
7046

7047
	if (err) {
7048 7049 7050 7051
		/* Check for parity error */
		if (err & 0x1) {
			sp->mac_control.stats_info->sw_stat.parity_err_cnt++;
		}
7052 7053
		err_mask = err >> 48;
		switch(err_mask) {
7054 7055 7056 7057 7058 7059 7060 7061 7062 7063 7064 7065 7066 7067 7068 7069 7070 7071 7072 7073 7074 7075 7076 7077 7078 7079 7080 7081 7082
			case 1:
				sp->mac_control.stats_info->sw_stat.
				rx_parity_err_cnt++;
			break;

			case 2:
				sp->mac_control.stats_info->sw_stat.
				rx_abort_cnt++;
			break;

			case 3:
				sp->mac_control.stats_info->sw_stat.
				rx_parity_abort_cnt++;
			break;

			case 4:
				sp->mac_control.stats_info->sw_stat.
				rx_rda_fail_cnt++;
			break;

			case 5:
				sp->mac_control.stats_info->sw_stat.
				rx_unkn_prot_cnt++;
			break;

			case 6:
				sp->mac_control.stats_info->sw_stat.
				rx_fcs_err_cnt++;
			break;
7083

7084 7085 7086 7087 7088 7089 7090 7091 7092 7093 7094 7095 7096 7097 7098
			case 7:
				sp->mac_control.stats_info->sw_stat.
				rx_buf_size_err_cnt++;
			break;

			case 8:
				sp->mac_control.stats_info->sw_stat.
				rx_rxd_corrupt_cnt++;
			break;

			case 15:
				sp->mac_control.stats_info->sw_stat.
				rx_unkn_err_cnt++;
			break;
		}
7099 7100 7101 7102 7103 7104 7105
		/*
		* Drop the packet if bad transfer code. Exception being
		* 0x5, which could be due to unsupported IPv6 extension header.
		* In this case, we let stack handle the packet.
		* Note that in this case, since checksum will be incorrect,
		* stack will validate the same.
		*/
7106 7107 7108
		if (err_mask != 0x5) {
			DBG_PRINT(ERR_DBG, "%s: Rx error Value: 0x%x\n",
				dev->name, err_mask);
7109
			sp->stats.rx_crc_errors++;
7110 7111
			sp->mac_control.stats_info->sw_stat.mem_freed 
				+= skb->truesize;
7112 7113 7114 7115 7116
			dev_kfree_skb(skb);
			atomic_dec(&sp->rx_bufs_left[ring_no]);
			rxdp->Host_Control = 0;
			return 0;
		}
7117
	}
L
Linus Torvalds 已提交
7118

7119
	/* Updating statistics */
7120
	sp->stats.rx_packets++;
7121
	rxdp->Host_Control = 0;
7122 7123
	if (sp->rxd_mode == RXD_MODE_1) {
		int len = RXD_GET_BUFFER0_SIZE_1(rxdp->Control_2);
7124

7125 7126 7127
		sp->stats.rx_bytes += len;
		skb_put(skb, len);

7128
	} else if (sp->rxd_mode == RXD_MODE_3B) {
7129 7130 7131 7132 7133 7134
		int get_block = ring_data->rx_curr_get_info.block_index;
		int get_off = ring_data->rx_curr_get_info.offset;
		int buf0_len = RXD_GET_BUFFER0_SIZE_3(rxdp->Control_2);
		int buf2_len = RXD_GET_BUFFER2_SIZE_3(rxdp->Control_2);
		unsigned char *buff = skb_push(skb, buf0_len);

R
Ralf Baechle 已提交
7135
		struct buffAdd *ba = &ring_data->ba[get_block][get_off];
7136 7137
		sp->stats.rx_bytes += buf0_len + buf2_len;
		memcpy(buff, ba->ba_0, buf0_len);
7138
		skb_put(skb, buf2_len);
7139
	}
7140

7141 7142
	if ((rxdp->Control_1 & TCP_OR_UDP_FRAME) && ((!sp->lro) ||
	    (sp->lro && (!(rxdp->Control_1 & RXD_FRAME_IP_FRAG)))) &&
7143 7144
	    (sp->rx_csum)) {
		l3_csum = RXD_GET_L3_CKSUM(rxdp->Control_1);
L
Linus Torvalds 已提交
7145 7146
		l4_csum = RXD_GET_L4_CKSUM(rxdp->Control_1);
		if ((l3_csum == L3_CKSUM_OK) && (l4_csum == L4_CKSUM_OK)) {
7147
			/*
L
Linus Torvalds 已提交
7148 7149 7150 7151 7152
			 * NIC verifies if the Checksum of the received
			 * frame is Ok or not and accordingly returns
			 * a flag in the RxD.
			 */
			skb->ip_summed = CHECKSUM_UNNECESSARY;
7153 7154 7155 7156 7157 7158 7159 7160 7161 7162 7163 7164 7165 7166 7167 7168 7169 7170 7171 7172 7173 7174 7175 7176 7177 7178 7179 7180 7181 7182 7183 7184 7185 7186 7187 7188
			if (sp->lro) {
				u32 tcp_len;
				u8 *tcp;
				int ret = 0;

				ret = s2io_club_tcp_session(skb->data, &tcp,
						&tcp_len, &lro, rxdp, sp);
				switch (ret) {
					case 3: /* Begin anew */
						lro->parent = skb;
						goto aggregate;
					case 1: /* Aggregate */
					{
						lro_append_pkt(sp, lro,
							skb, tcp_len);
						goto aggregate;
					}
					case 4: /* Flush session */
					{
						lro_append_pkt(sp, lro,
							skb, tcp_len);
						queue_rx_frame(lro->parent);
						clear_lro_session(lro);
						sp->mac_control.stats_info->
						    sw_stat.flush_max_pkts++;
						goto aggregate;
					}
					case 2: /* Flush both */
						lro->parent->data_len =
							lro->frags_len;
						sp->mac_control.stats_info->
						     sw_stat.sending_both++;
						queue_rx_frame(lro->parent);
						clear_lro_session(lro);
						goto send_up;
					case 0: /* sessions exceeded */
A
Ananda Raju 已提交
7189 7190 7191
					case -1: /* non-TCP or not
						  * L2 aggregatable
						  */
7192 7193 7194 7195 7196 7197 7198 7199 7200 7201 7202 7203
					case 5: /*
						 * First pkt in session not
						 * L3/L4 aggregatable
						 */
						break;
					default:
						DBG_PRINT(ERR_DBG,
							"%s: Samadhana!!\n",
							 __FUNCTION__);
						BUG();
				}
			}
L
Linus Torvalds 已提交
7204
		} else {
7205 7206
			/*
			 * Packet with erroneous checksum, let the
L
Linus Torvalds 已提交
7207 7208 7209 7210 7211 7212 7213
			 * upper layers deal with it.
			 */
			skb->ip_summed = CHECKSUM_NONE;
		}
	} else {
		skb->ip_summed = CHECKSUM_NONE;
	}
7214
	sp->mac_control.stats_info->sw_stat.mem_freed += skb->truesize;
7215 7216
	if (!sp->lro) {
		skb->protocol = eth_type_trans(skb, dev);
7217 7218
		if ((sp->vlgrp && RXD_GET_VLAN_TAG(rxdp->Control_2) &&
			vlan_strip_flag)) {
7219
			/* Queueing the vlan frame to the upper layer */
7220 7221 7222 7223 7224 7225
			if (napi)
				vlan_hwaccel_receive_skb(skb, sp->vlgrp,
					RXD_GET_VLAN_TAG(rxdp->Control_2));
			else
				vlan_hwaccel_rx(skb, sp->vlgrp,
					RXD_GET_VLAN_TAG(rxdp->Control_2));
7226
		} else {
7227 7228 7229 7230
			if (napi)
				netif_receive_skb(skb);
			else
				netif_rx(skb);
7231 7232 7233 7234
		}
	} else {
send_up:
		queue_rx_frame(skb);
7235
	}
L
Linus Torvalds 已提交
7236
	dev->last_rx = jiffies;
7237
aggregate:
L
Linus Torvalds 已提交
7238 7239 7240 7241 7242 7243 7244 7245 7246 7247 7248
	atomic_dec(&sp->rx_bufs_left[ring_no]);
	return SUCCESS;
}

/**
 *  s2io_link - stops/starts the Tx queue.
 *  @sp : private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
 *  @link : inidicates whether link is UP/DOWN.
 *  Description:
 *  This function stops/starts the Tx queue depending on whether the link
7249 7250
 *  status of the NIC is is down or up. This is called by the Alarm
 *  interrupt handler whenever a link change interrupt comes up.
L
Linus Torvalds 已提交
7251 7252 7253 7254
 *  Return value:
 *  void.
 */

R
Ralf Baechle 已提交
7255
static void s2io_link(struct s2io_nic * sp, int link)
L
Linus Torvalds 已提交
7256 7257 7258 7259 7260 7261 7262
{
	struct net_device *dev = (struct net_device *) sp->dev;

	if (link != sp->last_link_state) {
		if (link == LINK_DOWN) {
			DBG_PRINT(ERR_DBG, "%s: Link down\n", dev->name);
			netif_carrier_off(dev);
7263 7264 7265 7266
			if(sp->mac_control.stats_info->sw_stat.link_up_cnt)
			sp->mac_control.stats_info->sw_stat.link_up_time = 
				jiffies - sp->start_time;
			sp->mac_control.stats_info->sw_stat.link_down_cnt++;
L
Linus Torvalds 已提交
7267 7268
		} else {
			DBG_PRINT(ERR_DBG, "%s: Link Up\n", dev->name);
7269 7270 7271 7272
			if (sp->mac_control.stats_info->sw_stat.link_down_cnt)
			sp->mac_control.stats_info->sw_stat.link_down_time = 
				jiffies - sp->start_time;
			sp->mac_control.stats_info->sw_stat.link_up_cnt++;
L
Linus Torvalds 已提交
7273 7274 7275 7276
			netif_carrier_on(dev);
		}
	}
	sp->last_link_state = link;
7277
	sp->start_time = jiffies;
L
Linus Torvalds 已提交
7278 7279
}

7280 7281 7282
/**
 *  s2io_init_pci -Initialization of PCI and PCI-X configuration registers .
 *  @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
7283 7284 7285 7286 7287 7288 7289 7290
 *  s2io_nic structure.
 *  Description:
 *  This function initializes a few of the PCI and PCI-X configuration registers
 *  with recommended values.
 *  Return value:
 *  void
 */

R
Ralf Baechle 已提交
7291
static void s2io_init_pci(struct s2io_nic * sp)
L
Linus Torvalds 已提交
7292
{
7293
	u16 pci_cmd = 0, pcix_cmd = 0;
L
Linus Torvalds 已提交
7294 7295 7296

	/* Enable Data Parity Error Recovery in PCI-X command register. */
	pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
7297
			     &(pcix_cmd));
L
Linus Torvalds 已提交
7298
	pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
7299
			      (pcix_cmd | 1));
L
Linus Torvalds 已提交
7300
	pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
7301
			     &(pcix_cmd));
L
Linus Torvalds 已提交
7302 7303 7304 7305 7306 7307 7308 7309

	/* Set the PErr Response bit in PCI command register. */
	pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
	pci_write_config_word(sp->pdev, PCI_COMMAND,
			      (pci_cmd | PCI_COMMAND_PARITY));
	pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
}

7310 7311 7312 7313 7314 7315 7316 7317 7318 7319 7320 7321 7322 7323
static int s2io_verify_parm(struct pci_dev *pdev, u8 *dev_intr_type)
{
	if ( tx_fifo_num > 8) {
		DBG_PRINT(ERR_DBG, "s2io: Requested number of Tx fifos not "
			 "supported\n");
		DBG_PRINT(ERR_DBG, "s2io: Default to 8 Tx fifos\n");
		tx_fifo_num = 8;
	}
	if ( rx_ring_num > 8) {
		DBG_PRINT(ERR_DBG, "s2io: Requested number of Rx rings not "
			 "supported\n");
		DBG_PRINT(ERR_DBG, "s2io: Default to 8 Rx rings\n");
		rx_ring_num = 8;
	}
7324 7325 7326
	if (*dev_intr_type != INTA)
		napi = 0;

7327
	if ((*dev_intr_type != INTA) && (*dev_intr_type != MSI_X)) {
7328 7329 7330 7331
		DBG_PRINT(ERR_DBG, "s2io: Wrong intr_type requested. "
			  "Defaulting to INTA\n");
		*dev_intr_type = INTA;
	}
7332

7333 7334 7335
	if ((*dev_intr_type == MSI_X) &&
			((pdev->device != PCI_DEVICE_ID_HERC_WIN) &&
			(pdev->device != PCI_DEVICE_ID_HERC_UNI))) {
7336
		DBG_PRINT(ERR_DBG, "s2io: Xframe I does not support MSI_X. "
7337 7338 7339
					"Defaulting to INTA\n");
		*dev_intr_type = INTA;
	}
7340

7341
	if ((rx_ring_mode != 1) && (rx_ring_mode != 2)) {
7342
		DBG_PRINT(ERR_DBG, "s2io: Requested ring mode not supported\n");
7343 7344
		DBG_PRINT(ERR_DBG, "s2io: Defaulting to 1-buffer mode\n");
		rx_ring_mode = 1;
7345 7346 7347 7348
	}
	return SUCCESS;
}

7349 7350 7351 7352 7353 7354 7355 7356 7357 7358 7359 7360 7361 7362 7363 7364 7365 7366 7367 7368 7369 7370 7371 7372 7373 7374 7375 7376 7377 7378 7379
/**
 * rts_ds_steer - Receive traffic steering based on IPv4 or IPv6 TOS
 * or Traffic class respectively.
 * @nic: device peivate variable
 * Description: The function configures the receive steering to
 * desired receive ring.
 * Return Value:  SUCCESS on success and
 * '-1' on failure (endian settings incorrect).
 */
static int rts_ds_steer(struct s2io_nic *nic, u8 ds_codepoint, u8 ring)
{
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
	register u64 val64 = 0;

	if (ds_codepoint > 63)
		return FAILURE;

	val64 = RTS_DS_MEM_DATA(ring);
	writeq(val64, &bar0->rts_ds_mem_data);

	val64 = RTS_DS_MEM_CTRL_WE |
		RTS_DS_MEM_CTRL_STROBE_NEW_CMD |
		RTS_DS_MEM_CTRL_OFFSET(ds_codepoint);

	writeq(val64, &bar0->rts_ds_mem_ctrl);

	return wait_for_cmd_complete(&bar0->rts_ds_mem_ctrl,
				RTS_DS_MEM_CTRL_STROBE_CMD_BEING_EXECUTED,
				S2IO_BIT_RESET);
}

L
Linus Torvalds 已提交
7380
/**
7381
 *  s2io_init_nic - Initialization of the adapter .
L
Linus Torvalds 已提交
7382 7383 7384 7385
 *  @pdev : structure containing the PCI related information of the device.
 *  @pre: List of PCI devices supported by the driver listed in s2io_tbl.
 *  Description:
 *  The function initializes an adapter identified by the pci_dec structure.
7386 7387 7388
 *  All OS related initialization including memory and device structure and
 *  initlaization of the device private variable is done. Also the swapper
 *  control register is initialized to enable read and write into the I/O
L
Linus Torvalds 已提交
7389 7390 7391 7392 7393 7394 7395 7396
 *  registers of the device.
 *  Return value:
 *  returns 0 on success and negative on failure.
 */

static int __devinit
s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
{
R
Ralf Baechle 已提交
7397
	struct s2io_nic *sp;
L
Linus Torvalds 已提交
7398 7399 7400 7401 7402
	struct net_device *dev;
	int i, j, ret;
	int dma_flag = FALSE;
	u32 mac_up, mac_down;
	u64 val64 = 0, tmp64 = 0;
R
Ralf Baechle 已提交
7403
	struct XENA_dev_config __iomem *bar0 = NULL;
L
Linus Torvalds 已提交
7404
	u16 subid;
R
Ralf Baechle 已提交
7405
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
7406
	struct config_param *config;
7407
	int mode;
7408
	u8 dev_intr_type = intr_type;
7409
	DECLARE_MAC_BUF(mac);
L
Linus Torvalds 已提交
7410

7411 7412
	if ((ret = s2io_verify_parm(pdev, &dev_intr_type)))
		return ret;
L
Linus Torvalds 已提交
7413 7414 7415 7416 7417 7418 7419

	if ((ret = pci_enable_device(pdev))) {
		DBG_PRINT(ERR_DBG,
			  "s2io_init_nic: pci_enable_device failed\n");
		return ret;
	}

7420
	if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
L
Linus Torvalds 已提交
7421 7422 7423
		DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 64bit DMA\n");
		dma_flag = TRUE;
		if (pci_set_consistent_dma_mask
7424
		    (pdev, DMA_64BIT_MASK)) {
L
Linus Torvalds 已提交
7425 7426 7427 7428 7429 7430
			DBG_PRINT(ERR_DBG,
				  "Unable to obtain 64bit DMA for \
					consistent allocations\n");
			pci_disable_device(pdev);
			return -ENOMEM;
		}
7431
	} else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
L
Linus Torvalds 已提交
7432 7433 7434 7435 7436
		DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 32bit DMA\n");
	} else {
		pci_disable_device(pdev);
		return -ENOMEM;
	}
7437 7438 7439 7440
	if ((ret = pci_request_regions(pdev, s2io_driver_name))) {
		DBG_PRINT(ERR_DBG, "%s: Request Regions failed - %x \n", __FUNCTION__, ret);
		pci_disable_device(pdev);
		return -ENODEV;
L
Linus Torvalds 已提交
7441 7442
	}

R
Ralf Baechle 已提交
7443
	dev = alloc_etherdev(sizeof(struct s2io_nic));
L
Linus Torvalds 已提交
7444 7445 7446 7447 7448 7449 7450 7451 7452 7453 7454 7455 7456
	if (dev == NULL) {
		DBG_PRINT(ERR_DBG, "Device allocation failed\n");
		pci_disable_device(pdev);
		pci_release_regions(pdev);
		return -ENODEV;
	}

	pci_set_master(pdev);
	pci_set_drvdata(pdev, dev);
	SET_NETDEV_DEV(dev, &pdev->dev);

	/*  Private member variable initialized to s2io NIC structure */
	sp = dev->priv;
R
Ralf Baechle 已提交
7457
	memset(sp, 0, sizeof(struct s2io_nic));
L
Linus Torvalds 已提交
7458 7459 7460 7461
	sp->dev = dev;
	sp->pdev = pdev;
	sp->high_dma_flag = dma_flag;
	sp->device_enabled_once = FALSE;
7462 7463 7464 7465 7466
	if (rx_ring_mode == 1)
		sp->rxd_mode = RXD_MODE_1;
	if (rx_ring_mode == 2)
		sp->rxd_mode = RXD_MODE_3B;

7467
	sp->config.intr_type = dev_intr_type;
L
Linus Torvalds 已提交
7468

7469 7470 7471 7472 7473 7474
	if ((pdev->device == PCI_DEVICE_ID_HERC_WIN) ||
		(pdev->device == PCI_DEVICE_ID_HERC_UNI))
		sp->device_type = XFRAME_II_DEVICE;
	else
		sp->device_type = XFRAME_I_DEVICE;

7475
	sp->lro = lro;
7476

L
Linus Torvalds 已提交
7477 7478 7479
	/* Initialize some PCI/PCI-X fields of the NIC. */
	s2io_init_pci(sp);

7480
	/*
L
Linus Torvalds 已提交
7481
	 * Setting the device configuration parameters.
7482 7483 7484
	 * Most of these parameters can be specified by the user during
	 * module insertion as they are module loadable parameters. If
	 * these parameters are not not specified during load time, they
L
Linus Torvalds 已提交
7485 7486 7487 7488 7489
	 * are initialized with default values.
	 */
	mac_control = &sp->mac_control;
	config = &sp->config;

7490 7491
	config->napi = napi;

L
Linus Torvalds 已提交
7492 7493 7494 7495 7496 7497 7498
	/* Tx side parameters. */
	config->tx_fifo_num = tx_fifo_num;
	for (i = 0; i < MAX_TX_FIFOS; i++) {
		config->tx_cfg[i].fifo_len = tx_fifo_len[i];
		config->tx_cfg[i].fifo_priority = i;
	}

7499 7500 7501 7502
	/* mapping the QoS priority to the configured fifos */
	for (i = 0; i < MAX_TX_FIFOS; i++)
		config->fifo_mapping[i] = fifo_map[config->tx_fifo_num][i];

L
Linus Torvalds 已提交
7503 7504 7505 7506 7507 7508 7509 7510 7511
	config->tx_intr_type = TXD_INT_TYPE_UTILZ;
	for (i = 0; i < config->tx_fifo_num; i++) {
		config->tx_cfg[i].f_no_snoop =
		    (NO_SNOOP_TXD | NO_SNOOP_TXD_BUFFER);
		if (config->tx_cfg[i].fifo_len < 65) {
			config->tx_intr_type = TXD_INT_TYPE_PER_LIST;
			break;
		}
	}
A
Ananda Raju 已提交
7512 7513
	/* + 2 because one Txd for skb->data and one Txd for UFO */
	config->max_txds = MAX_SKB_FRAGS + 2;
L
Linus Torvalds 已提交
7514 7515 7516 7517 7518

	/* Rx side parameters. */
	config->rx_ring_num = rx_ring_num;
	for (i = 0; i < MAX_RX_RINGS; i++) {
		config->rx_cfg[i].num_rxd = rx_ring_sz[i] *
7519
		    (rxd_count[sp->rxd_mode] + 1);
L
Linus Torvalds 已提交
7520 7521 7522 7523 7524 7525 7526 7527 7528 7529 7530 7531 7532 7533 7534 7535 7536 7537 7538 7539 7540 7541
		config->rx_cfg[i].ring_priority = i;
	}

	for (i = 0; i < rx_ring_num; i++) {
		config->rx_cfg[i].ring_org = RING_ORG_BUFF1;
		config->rx_cfg[i].f_no_snoop =
		    (NO_SNOOP_RXD | NO_SNOOP_RXD_BUFFER);
	}

	/*  Setting Mac Control parameters */
	mac_control->rmac_pause_time = rmac_pause_time;
	mac_control->mc_pause_threshold_q0q3 = mc_pause_threshold_q0q3;
	mac_control->mc_pause_threshold_q4q7 = mc_pause_threshold_q4q7;


	/* Initialize Ring buffer parameters. */
	for (i = 0; i < config->rx_ring_num; i++)
		atomic_set(&sp->rx_bufs_left[i], 0);

	/*  initialize the shared memory used by the NIC and the host */
	if (init_shared_mem(sp)) {
		DBG_PRINT(ERR_DBG, "%s: Memory allocation failed\n",
7542
			  dev->name);
L
Linus Torvalds 已提交
7543 7544 7545 7546 7547 7548 7549
		ret = -ENOMEM;
		goto mem_alloc_failed;
	}

	sp->bar0 = ioremap(pci_resource_start(pdev, 0),
				     pci_resource_len(pdev, 0));
	if (!sp->bar0) {
7550
		DBG_PRINT(ERR_DBG, "%s: Neterion: cannot remap io mem1\n",
L
Linus Torvalds 已提交
7551 7552 7553 7554 7555 7556 7557 7558
			  dev->name);
		ret = -ENOMEM;
		goto bar0_remap_failed;
	}

	sp->bar1 = ioremap(pci_resource_start(pdev, 2),
				     pci_resource_len(pdev, 2));
	if (!sp->bar1) {
7559
		DBG_PRINT(ERR_DBG, "%s: Neterion: cannot remap io mem2\n",
L
Linus Torvalds 已提交
7560 7561 7562 7563 7564 7565 7566 7567 7568 7569
			  dev->name);
		ret = -ENOMEM;
		goto bar1_remap_failed;
	}

	dev->irq = pdev->irq;
	dev->base_addr = (unsigned long) sp->bar0;

	/* Initializing the BAR1 address as the start of the FIFO pointer. */
	for (j = 0; j < MAX_TX_FIFOS; j++) {
R
Ralf Baechle 已提交
7570
		mac_control->tx_FIFO_start[j] = (struct TxFIFO_element __iomem *)
L
Linus Torvalds 已提交
7571 7572 7573 7574 7575 7576 7577 7578 7579 7580 7581 7582
		    (sp->bar1 + (j * 0x00020000));
	}

	/*  Driver entry points */
	dev->open = &s2io_open;
	dev->stop = &s2io_close;
	dev->hard_start_xmit = &s2io_xmit;
	dev->get_stats = &s2io_get_stats;
	dev->set_multicast_list = &s2io_set_multicast;
	dev->do_ioctl = &s2io_ioctl;
	dev->change_mtu = &s2io_change_mtu;
	SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
7583 7584
	dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
	dev->vlan_rx_register = s2io_vlan_rx_register;
7585

L
Linus Torvalds 已提交
7586 7587 7588 7589
	/*
	 * will use eth_mac_addr() for  dev->set_mac_address
	 * mac address will be set every time dev->open() is called
	 */
7590
	netif_napi_add(dev, &sp->napi, s2io_poll, 32);
L
Linus Torvalds 已提交
7591

7592 7593 7594 7595
#ifdef CONFIG_NET_POLL_CONTROLLER
	dev->poll_controller = s2io_netpoll;
#endif

L
Linus Torvalds 已提交
7596 7597 7598 7599
	dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
	if (sp->high_dma_flag == TRUE)
		dev->features |= NETIF_F_HIGHDMA;
	dev->features |= NETIF_F_TSO;
7600
	dev->features |= NETIF_F_TSO6;
7601
	if ((sp->device_type & XFRAME_II_DEVICE) && (ufo))  {
A
Ananda Raju 已提交
7602 7603 7604
		dev->features |= NETIF_F_UFO;
		dev->features |= NETIF_F_HW_CSUM;
	}
L
Linus Torvalds 已提交
7605 7606 7607

	dev->tx_timeout = &s2io_tx_watchdog;
	dev->watchdog_timeo = WATCH_DOG_TIMEOUT;
7608 7609
	INIT_WORK(&sp->rst_timer_task, s2io_restart_nic);
	INIT_WORK(&sp->set_link_task, s2io_set_link);
L
Linus Torvalds 已提交
7610

7611
	pci_save_state(sp->pdev);
L
Linus Torvalds 已提交
7612 7613 7614 7615 7616 7617 7618 7619 7620

	/* Setting swapper control on the NIC, for proper reset operation */
	if (s2io_set_swapper(sp)) {
		DBG_PRINT(ERR_DBG, "%s:swapper settings are wrong\n",
			  dev->name);
		ret = -EAGAIN;
		goto set_swap_failed;
	}

7621 7622 7623 7624 7625 7626 7627 7628 7629 7630 7631 7632 7633 7634 7635 7636 7637 7638 7639 7640
	/* Verify if the Herc works on the slot its placed into */
	if (sp->device_type & XFRAME_II_DEVICE) {
		mode = s2io_verify_pci_mode(sp);
		if (mode < 0) {
			DBG_PRINT(ERR_DBG, "%s: ", __FUNCTION__);
			DBG_PRINT(ERR_DBG, " Unsupported PCI bus mode\n");
			ret = -EBADSLT;
			goto set_swap_failed;
		}
	}

	/* Not needed for Herc */
	if (sp->device_type & XFRAME_I_DEVICE) {
		/*
		 * Fix for all "FFs" MAC address problems observed on
		 * Alpha platforms
		 */
		fix_mac_address(sp);
		s2io_reset(sp);
	}
L
Linus Torvalds 已提交
7641 7642 7643 7644 7645 7646 7647 7648 7649

	/*
	 * MAC address initialization.
	 * For now only one mac address will be read and used.
	 */
	bar0 = sp->bar0;
	val64 = RMAC_ADDR_CMD_MEM_RD | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
	    RMAC_ADDR_CMD_MEM_OFFSET(0 + MAC_MAC_ADDR_START_OFFSET);
	writeq(val64, &bar0->rmac_addr_cmd_mem);
A
Ananda Raju 已提交
7650
	wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
7651
		      RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING, S2IO_BIT_RESET);
L
Linus Torvalds 已提交
7652 7653 7654 7655 7656 7657 7658 7659 7660 7661 7662 7663 7664 7665 7666
	tmp64 = readq(&bar0->rmac_addr_data0_mem);
	mac_down = (u32) tmp64;
	mac_up = (u32) (tmp64 >> 32);

	sp->def_mac_addr[0].mac_addr[3] = (u8) (mac_up);
	sp->def_mac_addr[0].mac_addr[2] = (u8) (mac_up >> 8);
	sp->def_mac_addr[0].mac_addr[1] = (u8) (mac_up >> 16);
	sp->def_mac_addr[0].mac_addr[0] = (u8) (mac_up >> 24);
	sp->def_mac_addr[0].mac_addr[5] = (u8) (mac_down >> 16);
	sp->def_mac_addr[0].mac_addr[4] = (u8) (mac_down >> 24);

	/*  Set the factory defined MAC address initially   */
	dev->addr_len = ETH_ALEN;
	memcpy(dev->dev_addr, sp->def_mac_addr, ETH_ALEN);

7667 7668
	 /* Store the values of the MSIX table in the s2io_nic structure */
	store_xmsi_data(sp);
7669 7670 7671
	/* reset Nic and bring it to known state */
	s2io_reset(sp);

L
Linus Torvalds 已提交
7672
	/*
7673
	 * Initialize the tasklet status and link state flags
7674
	 * and the card state parameter
L
Linus Torvalds 已提交
7675 7676
	 */
	sp->tasklet_status = 0;
7677
	sp->state = 0;
L
Linus Torvalds 已提交
7678 7679 7680

	/* Initialize spinlocks */
	spin_lock_init(&sp->tx_lock);
7681 7682 7683

	if (!napi)
		spin_lock_init(&sp->put_lock);
7684
	spin_lock_init(&sp->rx_lock);
L
Linus Torvalds 已提交
7685

7686 7687 7688
	/*
	 * SXE-002: Configure link and activity LED to init state
	 * on driver load.
L
Linus Torvalds 已提交
7689 7690 7691 7692 7693 7694 7695 7696 7697 7698 7699 7700 7701 7702 7703 7704 7705 7706
	 */
	subid = sp->pdev->subsystem_device;
	if ((subid & 0xFF) >= 0x07) {
		val64 = readq(&bar0->gpio_control);
		val64 |= 0x0000800000000000ULL;
		writeq(val64, &bar0->gpio_control);
		val64 = 0x0411040400000000ULL;
		writeq(val64, (void __iomem *) bar0 + 0x2700);
		val64 = readq(&bar0->gpio_control);
	}

	sp->rx_csum = 1;	/* Rx chksum verify enabled by default */

	if (register_netdev(dev)) {
		DBG_PRINT(ERR_DBG, "Device registration failed\n");
		ret = -ENODEV;
		goto register_failed;
	}
7707
	s2io_vpd_read(sp);
7708
	DBG_PRINT(ERR_DBG, "Copyright(c) 2002-2007 Neterion Inc.\n");
7709
	DBG_PRINT(ERR_DBG, "%s: Neterion %s (rev %d)\n",dev->name,
7710
		  sp->product_name, pdev->revision);
7711 7712
	DBG_PRINT(ERR_DBG, "%s: Driver version %s\n", dev->name,
		  s2io_driver_version);
7713 7714
	DBG_PRINT(ERR_DBG, "%s: MAC ADDR: %s\n",
		  dev->name, print_mac(mac, dev->dev_addr));
7715
	DBG_PRINT(ERR_DBG, "SERIAL NUMBER: %s\n", sp->serial_num);
7716
	if (sp->device_type & XFRAME_II_DEVICE) {
7717
		mode = s2io_print_pci_mode(sp);
7718
		if (mode < 0) {
7719
			DBG_PRINT(ERR_DBG, " Unsupported PCI bus mode\n");
7720
			ret = -EBADSLT;
7721
			unregister_netdev(dev);
7722 7723 7724
			goto set_swap_failed;
		}
	}
7725 7726 7727 7728 7729 7730 7731 7732 7733 7734
	switch(sp->rxd_mode) {
		case RXD_MODE_1:
		    DBG_PRINT(ERR_DBG, "%s: 1-Buffer receive mode enabled\n",
						dev->name);
		    break;
		case RXD_MODE_3B:
		    DBG_PRINT(ERR_DBG, "%s: 2-Buffer receive mode enabled\n",
						dev->name);
		    break;
	}
7735 7736 7737

	if (napi)
		DBG_PRINT(ERR_DBG, "%s: NAPI enabled\n", dev->name);
7738
	switch(sp->config.intr_type) {
7739 7740 7741 7742 7743 7744 7745
		case INTA:
		    DBG_PRINT(ERR_DBG, "%s: Interrupt type INTA\n", dev->name);
		    break;
		case MSI_X:
		    DBG_PRINT(ERR_DBG, "%s: Interrupt type MSI-X\n", dev->name);
		    break;
	}
7746 7747
	if (sp->lro)
		DBG_PRINT(ERR_DBG, "%s: Large receive offload enabled\n",
7748
			  dev->name);
7749 7750 7751
	if (ufo)
		DBG_PRINT(ERR_DBG, "%s: UDP Fragmentation Offload(UFO)"
					" enabled\n", dev->name);
7752
	/* Initialize device name */
7753
	sprintf(sp->name, "%s Neterion %s", dev->name, sp->product_name);
7754

7755 7756 7757 7758 7759 7760 7761 7762
	/* Initialize bimodal Interrupts */
	sp->config.bimodal = bimodal;
	if (!(sp->device_type & XFRAME_II_DEVICE) && bimodal) {
		sp->config.bimodal = 0;
		DBG_PRINT(ERR_DBG,"%s:Bimodal intr not supported by Xframe I\n",
			dev->name);
	}

7763 7764 7765
	/*
	 * Make Link state as off at this point, when the Link change
	 * interrupt comes the state will be automatically changed to
L
Linus Torvalds 已提交
7766 7767 7768 7769 7770 7771 7772 7773 7774 7775 7776 7777 7778 7779 7780
	 * the right state.
	 */
	netif_carrier_off(dev);

	return 0;

      register_failed:
      set_swap_failed:
	iounmap(sp->bar1);
      bar1_remap_failed:
	iounmap(sp->bar0);
      bar0_remap_failed:
      mem_alloc_failed:
	free_shared_mem(sp);
	pci_disable_device(pdev);
7781
	pci_release_regions(pdev);
L
Linus Torvalds 已提交
7782 7783 7784 7785 7786 7787 7788
	pci_set_drvdata(pdev, NULL);
	free_netdev(dev);

	return ret;
}

/**
7789
 * s2io_rem_nic - Free the PCI device
L
Linus Torvalds 已提交
7790
 * @pdev: structure containing the PCI related information of the device.
7791
 * Description: This function is called by the Pci subsystem to release a
L
Linus Torvalds 已提交
7792
 * PCI device and free up all resource held up by the device. This could
7793
 * be in response to a Hot plug event or when the driver is to be removed
L
Linus Torvalds 已提交
7794 7795 7796 7797 7798 7799 7800
 * from memory.
 */

static void __devexit s2io_rem_nic(struct pci_dev *pdev)
{
	struct net_device *dev =
	    (struct net_device *) pci_get_drvdata(pdev);
R
Ralf Baechle 已提交
7801
	struct s2io_nic *sp;
L
Linus Torvalds 已提交
7802 7803 7804 7805 7806 7807

	if (dev == NULL) {
		DBG_PRINT(ERR_DBG, "Driver Data is NULL!!\n");
		return;
	}

7808 7809
	flush_scheduled_work();

L
Linus Torvalds 已提交
7810 7811 7812 7813 7814 7815
	sp = dev->priv;
	unregister_netdev(dev);

	free_shared_mem(sp);
	iounmap(sp->bar0);
	iounmap(sp->bar1);
7816
	pci_release_regions(pdev);
L
Linus Torvalds 已提交
7817 7818
	pci_set_drvdata(pdev, NULL);
	free_netdev(dev);
7819
	pci_disable_device(pdev);
L
Linus Torvalds 已提交
7820 7821 7822 7823 7824 7825 7826 7827 7828 7829
}

/**
 * s2io_starter - Entry point for the driver
 * Description: This function is the entry point for the driver. It verifies
 * the module loadable parameters and initializes PCI configuration space.
 */

int __init s2io_starter(void)
{
7830
	return pci_register_driver(&s2io_driver);
L
Linus Torvalds 已提交
7831 7832 7833
}

/**
7834
 * s2io_closer - Cleanup routine for the driver
L
Linus Torvalds 已提交
7835 7836 7837
 * Description: This function is the cleanup routine for the driver. It unregist * ers the driver.
 */

7838
static __exit void s2io_closer(void)
L
Linus Torvalds 已提交
7839 7840 7841 7842 7843 7844 7845
{
	pci_unregister_driver(&s2io_driver);
	DBG_PRINT(INIT_DBG, "cleanup done\n");
}

module_init(s2io_starter);
module_exit(s2io_closer);
7846

7847
static int check_L2_lro_capable(u8 *buffer, struct iphdr **ip,
R
Ralf Baechle 已提交
7848
		struct tcphdr **tcp, struct RxD_t *rxdp)
7849 7850 7851 7852 7853 7854 7855 7856 7857 7858 7859 7860 7861 7862 7863 7864 7865 7866 7867 7868 7869 7870 7871 7872 7873 7874 7875 7876 7877 7878 7879 7880 7881
{
	int ip_off;
	u8 l2_type = (u8)((rxdp->Control_1 >> 37) & 0x7), ip_len;

	if (!(rxdp->Control_1 & RXD_FRAME_PROTO_TCP)) {
		DBG_PRINT(INIT_DBG,"%s: Non-TCP frames not supported for LRO\n",
			  __FUNCTION__);
		return -1;
	}

	/* TODO:
	 * By default the VLAN field in the MAC is stripped by the card, if this
	 * feature is turned off in rx_pa_cfg register, then the ip_off field
	 * has to be shifted by a further 2 bytes
	 */
	switch (l2_type) {
		case 0: /* DIX type */
		case 4: /* DIX type with VLAN */
			ip_off = HEADER_ETHERNET_II_802_3_SIZE;
			break;
		/* LLC, SNAP etc are considered non-mergeable */
		default:
			return -1;
	}

	*ip = (struct iphdr *)((u8 *)buffer + ip_off);
	ip_len = (u8)((*ip)->ihl);
	ip_len <<= 2;
	*tcp = (struct tcphdr *)((unsigned long)*ip + ip_len);

	return 0;
}

R
Ralf Baechle 已提交
7882
static int check_for_socket_match(struct lro *lro, struct iphdr *ip,
7883 7884 7885 7886 7887 7888 7889 7890 7891 7892 7893 7894 7895 7896
				  struct tcphdr *tcp)
{
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __FUNCTION__);
	if ((lro->iph->saddr != ip->saddr) || (lro->iph->daddr != ip->daddr) ||
	   (lro->tcph->source != tcp->source) || (lro->tcph->dest != tcp->dest))
		return -1;
	return 0;
}

static inline int get_l4_pyld_length(struct iphdr *ip, struct tcphdr *tcp)
{
	return(ntohs(ip->tot_len) - (ip->ihl << 2) - (tcp->doff << 2));
}

R
Ralf Baechle 已提交
7897
static void initiate_new_session(struct lro *lro, u8 *l2h,
7898 7899 7900 7901 7902 7903 7904 7905 7906 7907 7908
		     struct iphdr *ip, struct tcphdr *tcp, u32 tcp_pyld_len)
{
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __FUNCTION__);
	lro->l2h = l2h;
	lro->iph = ip;
	lro->tcph = tcp;
	lro->tcp_next_seq = tcp_pyld_len + ntohl(tcp->seq);
	lro->tcp_ack = ntohl(tcp->ack_seq);
	lro->sg_num = 1;
	lro->total_len = ntohs(ip->tot_len);
	lro->frags_len = 0;
7909
	/*
7910 7911 7912 7913 7914 7915 7916 7917 7918 7919 7920 7921 7922
	 * check if we saw TCP timestamp. Other consistency checks have
	 * already been done.
 	 */
	if (tcp->doff == 8) {
		u32 *ptr;
		ptr = (u32 *)(tcp+1);
		lro->saw_ts = 1;
		lro->cur_tsval = *(ptr+1);
		lro->cur_tsecr = *(ptr+2);
	}
	lro->in_use = 1;
}

R
Ralf Baechle 已提交
7923
static void update_L3L4_header(struct s2io_nic *sp, struct lro *lro)
7924 7925 7926
{
	struct iphdr *ip = lro->iph;
	struct tcphdr *tcp = lro->tcph;
7927
	__sum16 nchk;
R
Ralf Baechle 已提交
7928
	struct stat_block *statinfo = sp->mac_control.stats_info;
7929 7930 7931 7932 7933 7934 7935 7936 7937 7938 7939 7940 7941 7942 7943 7944 7945 7946 7947 7948 7949 7950 7951 7952 7953
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __FUNCTION__);

	/* Update L3 header */
	ip->tot_len = htons(lro->total_len);
	ip->check = 0;
	nchk = ip_fast_csum((u8 *)lro->iph, ip->ihl);
	ip->check = nchk;

	/* Update L4 header */
	tcp->ack_seq = lro->tcp_ack;
	tcp->window = lro->window;

	/* Update tsecr field if this session has timestamps enabled */
	if (lro->saw_ts) {
		u32 *ptr = (u32 *)(tcp + 1);
		*(ptr+2) = lro->cur_tsecr;
	}

	/* Update counters required for calculation of
	 * average no. of packets aggregated.
	 */
	statinfo->sw_stat.sum_avg_pkts_aggregated += lro->sg_num;
	statinfo->sw_stat.num_aggregations++;
}

R
Ralf Baechle 已提交
7954
static void aggregate_new_rx(struct lro *lro, struct iphdr *ip,
7955 7956 7957 7958 7959 7960 7961 7962 7963 7964 7965
		struct tcphdr *tcp, u32 l4_pyld)
{
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __FUNCTION__);
	lro->total_len += l4_pyld;
	lro->frags_len += l4_pyld;
	lro->tcp_next_seq += l4_pyld;
	lro->sg_num++;

	/* Update ack seq no. and window ad(from this pkt) in LRO object */
	lro->tcp_ack = tcp->ack_seq;
	lro->window = tcp->window;
7966

7967 7968 7969 7970
	if (lro->saw_ts) {
		u32 *ptr;
		/* Update tsecr and tsval from this packet */
		ptr = (u32 *) (tcp + 1);
7971
		lro->cur_tsval = *(ptr + 1);
7972 7973 7974 7975
		lro->cur_tsecr = *(ptr + 2);
	}
}

R
Ralf Baechle 已提交
7976
static int verify_l3_l4_lro_capable(struct lro *l_lro, struct iphdr *ip,
7977 7978 7979 7980
				    struct tcphdr *tcp, u32 tcp_pyld_len)
{
	u8 *ptr;

7981 7982
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __FUNCTION__);

7983 7984 7985 7986 7987 7988 7989 7990
	if (!tcp_pyld_len) {
		/* Runt frame or a pure ack */
		return -1;
	}

	if (ip->ihl != 5) /* IP has options */
		return -1;

7991 7992 7993 7994 7995
	/* If we see CE codepoint in IP header, packet is not mergeable */
	if (INET_ECN_is_ce(ipv4_get_dsfield(ip)))
		return -1;

	/* If we see ECE or CWR flags in TCP header, packet is not mergeable */
7996
	if (tcp->urg || tcp->psh || tcp->rst || tcp->syn || tcp->fin ||
7997
				    tcp->ece || tcp->cwr || !tcp->ack) {
7998 7999 8000 8001 8002 8003 8004 8005
		/*
		 * Currently recognize only the ack control word and
		 * any other control field being set would result in
		 * flushing the LRO session
		 */
		return -1;
	}

8006
	/*
8007 8008 8009 8010 8011 8012 8013
	 * Allow only one TCP timestamp option. Don't aggregate if
	 * any other options are detected.
	 */
	if (tcp->doff != 5 && tcp->doff != 8)
		return -1;

	if (tcp->doff == 8) {
8014
		ptr = (u8 *)(tcp + 1);
8015 8016 8017 8018 8019 8020 8021 8022 8023 8024 8025
		while (*ptr == TCPOPT_NOP)
			ptr++;
		if (*ptr != TCPOPT_TIMESTAMP || *(ptr+1) != TCPOLEN_TIMESTAMP)
			return -1;

		/* Ensure timestamp value increases monotonically */
		if (l_lro)
			if (l_lro->cur_tsval > *((u32 *)(ptr+2)))
				return -1;

		/* timestamp echo reply should be non-zero */
8026
		if (*((u32 *)(ptr+6)) == 0)
8027 8028 8029 8030 8031 8032 8033
			return -1;
	}

	return 0;
}

static int
R
Ralf Baechle 已提交
8034 8035
s2io_club_tcp_session(u8 *buffer, u8 **tcp, u32 *tcp_len, struct lro **lro,
		      struct RxD_t *rxdp, struct s2io_nic *sp)
8036 8037 8038 8039 8040 8041 8042 8043 8044 8045 8046 8047 8048 8049 8050 8051
{
	struct iphdr *ip;
	struct tcphdr *tcph;
	int ret = 0, i;

	if (!(ret = check_L2_lro_capable(buffer, &ip, (struct tcphdr **)tcp,
					 rxdp))) {
		DBG_PRINT(INFO_DBG,"IP Saddr: %x Daddr: %x\n",
			  ip->saddr, ip->daddr);
	} else {
		return ret;
	}

	tcph = (struct tcphdr *)*tcp;
	*tcp_len = get_l4_pyld_length(ip, tcph);
	for (i=0; i<MAX_LRO_SESSIONS; i++) {
R
Ralf Baechle 已提交
8052
		struct lro *l_lro = &sp->lro0_n[i];
8053 8054 8055 8056 8057 8058 8059 8060 8061 8062 8063 8064 8065 8066 8067 8068 8069 8070 8071 8072 8073 8074 8075 8076 8077 8078 8079 8080 8081 8082 8083 8084 8085 8086 8087 8088 8089
		if (l_lro->in_use) {
			if (check_for_socket_match(l_lro, ip, tcph))
				continue;
			/* Sock pair matched */
			*lro = l_lro;

			if ((*lro)->tcp_next_seq != ntohl(tcph->seq)) {
				DBG_PRINT(INFO_DBG, "%s:Out of order. expected "
					  "0x%x, actual 0x%x\n", __FUNCTION__,
					  (*lro)->tcp_next_seq,
					  ntohl(tcph->seq));

				sp->mac_control.stats_info->
				   sw_stat.outof_sequence_pkts++;
				ret = 2;
				break;
			}

			if (!verify_l3_l4_lro_capable(l_lro, ip, tcph,*tcp_len))
				ret = 1; /* Aggregate */
			else
				ret = 2; /* Flush both */
			break;
		}
	}

	if (ret == 0) {
		/* Before searching for available LRO objects,
		 * check if the pkt is L3/L4 aggregatable. If not
		 * don't create new LRO session. Just send this
		 * packet up.
		 */
		if (verify_l3_l4_lro_capable(NULL, ip, tcph, *tcp_len)) {
			return 5;
		}

		for (i=0; i<MAX_LRO_SESSIONS; i++) {
R
Ralf Baechle 已提交
8090
			struct lro *l_lro = &sp->lro0_n[i];
8091 8092 8093 8094 8095 8096 8097 8098 8099 8100 8101 8102 8103 8104 8105 8106 8107 8108 8109 8110 8111 8112 8113 8114 8115 8116 8117 8118 8119 8120 8121 8122 8123 8124 8125 8126 8127 8128
			if (!(l_lro->in_use)) {
				*lro = l_lro;
				ret = 3; /* Begin anew */
				break;
			}
		}
	}

	if (ret == 0) { /* sessions exceeded */
		DBG_PRINT(INFO_DBG,"%s:All LRO sessions already in use\n",
			  __FUNCTION__);
		*lro = NULL;
		return ret;
	}

	switch (ret) {
		case 3:
			initiate_new_session(*lro, buffer, ip, tcph, *tcp_len);
			break;
		case 2:
			update_L3L4_header(sp, *lro);
			break;
		case 1:
			aggregate_new_rx(*lro, ip, tcph, *tcp_len);
			if ((*lro)->sg_num == sp->lro_max_aggr_per_sess) {
				update_L3L4_header(sp, *lro);
				ret = 4; /* Flush the LRO */
			}
			break;
		default:
			DBG_PRINT(ERR_DBG,"%s:Dont know, can't say!!\n",
				__FUNCTION__);
			break;
	}

	return ret;
}

R
Ralf Baechle 已提交
8129
static void clear_lro_session(struct lro *lro)
8130
{
R
Ralf Baechle 已提交
8131
	static u16 lro_struct_size = sizeof(struct lro);
8132 8133 8134 8135 8136 8137 8138 8139 8140

	memset(lro, 0, lro_struct_size);
}

static void queue_rx_frame(struct sk_buff *skb)
{
	struct net_device *dev = skb->dev;

	skb->protocol = eth_type_trans(skb, dev);
8141 8142 8143 8144
	if (napi)
		netif_receive_skb(skb);
	else
		netif_rx(skb);
8145 8146
}

R
Ralf Baechle 已提交
8147 8148
static void lro_append_pkt(struct s2io_nic *sp, struct lro *lro,
			   struct sk_buff *skb,
8149 8150
			   u32 tcp_len)
{
8151
	struct sk_buff *first = lro->parent;
8152 8153 8154 8155

	first->len += tcp_len;
	first->data_len = lro->frags_len;
	skb_pull(skb, (skb->len - tcp_len));
8156 8157
	if (skb_shinfo(first)->frag_list)
		lro->last_frag->next = skb;
8158 8159
	else
		skb_shinfo(first)->frag_list = skb;
8160
	first->truesize += skb->truesize;
8161
	lro->last_frag = skb;
8162 8163 8164
	sp->mac_control.stats_info->sw_stat.clubbed_frms_cnt++;
	return;
}
8165 8166 8167 8168

/**
 * s2io_io_error_detected - called when PCI error is detected
 * @pdev: Pointer to PCI device
8169
 * @state: The current pci connection state
8170 8171 8172 8173 8174 8175 8176 8177 8178 8179 8180 8181 8182 8183 8184 8185 8186 8187 8188 8189 8190 8191 8192 8193 8194 8195 8196 8197 8198 8199 8200 8201 8202 8203 8204 8205 8206 8207 8208 8209 8210 8211 8212 8213 8214 8215 8216 8217 8218 8219 8220 8221 8222 8223 8224 8225 8226 8227 8228 8229 8230 8231 8232 8233 8234 8235 8236 8237 8238 8239 8240 8241 8242 8243 8244 8245 8246
 *
 * This function is called after a PCI bus error affecting
 * this device has been detected.
 */
static pci_ers_result_t s2io_io_error_detected(struct pci_dev *pdev,
                                               pci_channel_state_t state)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct s2io_nic *sp = netdev->priv;

	netif_device_detach(netdev);

	if (netif_running(netdev)) {
		/* Bring down the card, while avoiding PCI I/O */
		do_s2io_card_down(sp, 0);
	}
	pci_disable_device(pdev);

	return PCI_ERS_RESULT_NEED_RESET;
}

/**
 * s2io_io_slot_reset - called after the pci bus has been reset.
 * @pdev: Pointer to PCI device
 *
 * Restart the card from scratch, as if from a cold-boot.
 * At this point, the card has exprienced a hard reset,
 * followed by fixups by BIOS, and has its config space
 * set up identically to what it was at cold boot.
 */
static pci_ers_result_t s2io_io_slot_reset(struct pci_dev *pdev)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct s2io_nic *sp = netdev->priv;

	if (pci_enable_device(pdev)) {
		printk(KERN_ERR "s2io: "
		       "Cannot re-enable PCI device after reset.\n");
		return PCI_ERS_RESULT_DISCONNECT;
	}

	pci_set_master(pdev);
	s2io_reset(sp);

	return PCI_ERS_RESULT_RECOVERED;
}

/**
 * s2io_io_resume - called when traffic can start flowing again.
 * @pdev: Pointer to PCI device
 *
 * This callback is called when the error recovery driver tells
 * us that its OK to resume normal operation.
 */
static void s2io_io_resume(struct pci_dev *pdev)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct s2io_nic *sp = netdev->priv;

	if (netif_running(netdev)) {
		if (s2io_card_up(sp)) {
			printk(KERN_ERR "s2io: "
			       "Can't bring device back up after reset.\n");
			return;
		}

		if (s2io_set_mac_addr(netdev, netdev->dev_addr) == FAILURE) {
			s2io_card_down(sp);
			printk(KERN_ERR "s2io: "
			       "Can't resetore mac addr after reset.\n");
			return;
		}
	}

	netif_device_attach(netdev);
	netif_wake_queue(netdev);
}
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