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s2io.c 231.5 KB
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/************************************************************************
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 * s2io.c: A Linux PCI-X Ethernet driver for Neterion 10GbE Server NIC
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 * Copyright(c) 2002-2007 Neterion Inc.
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 * This software may be used and distributed according to the terms of
 * the GNU General Public License (GPL), incorporated herein by reference.
 * Drivers based on or derived from this code fall under the GPL and must
 * retain the authorship, copyright and license notice.  This file is not
 * a complete program and may only be used when the entire operating
 * system is licensed under the GPL.
 * See the file COPYING in this distribution for more information.
 *
 * Credits:
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 * Jeff Garzik		: For pointing out the improper error condition
 *			  check in the s2io_xmit routine and also some
 *			  issues in the Tx watch dog function. Also for
 *			  patiently answering all those innumerable
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 *			  questions regaring the 2.6 porting issues.
 * Stephen Hemminger	: Providing proper 2.6 porting mechanism for some
 *			  macros available only in 2.6 Kernel.
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 * Francois Romieu	: For pointing out all code part that were
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 *			  deprecated and also styling related comments.
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 * Grant Grundler	: For helping me get rid of some Architecture
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 *			  dependent code.
 * Christopher Hellwig	: Some more 2.6 specific issues in the driver.
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 *
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 * The module loadable parameters that are supported by the driver and a brief
 * explaination of all the variables.
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 *
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 * rx_ring_num : This can be used to program the number of receive rings used
 * in the driver.
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 * rx_ring_sz: This defines the number of receive blocks each ring can have.
 *     This is also an array of size 8.
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 * rx_ring_mode: This defines the operation mode of all 8 rings. The valid
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 *		values are 1, 2.
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 * tx_fifo_num: This defines the number of Tx FIFOs thats used int the driver.
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 * tx_fifo_len: This too is an array of 8. Each element defines the number of
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 * Tx descriptors that can be associated with each corresponding FIFO.
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 * intr_type: This defines the type of interrupt. The values can be 0(INTA),
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 *     2(MSI_X). Default value is '2(MSI_X)'
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 * lro: Specifies whether to enable Large Receive Offload (LRO) or not.
 *     Possible values '1' for enable '0' for disable. Default is '0'
 * lro_max_pkts: This parameter defines maximum number of packets can be
 *     aggregated as a single large packet
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 * napi: This parameter used to enable/disable NAPI (polling Rx)
 *     Possible values '1' for enable and '0' for disable. Default is '1'
 * ufo: This parameter used to enable/disable UDP Fragmentation Offload(UFO)
 *      Possible values '1' for enable and '0' for disable. Default is '0'
 * vlan_tag_strip: This can be used to enable or disable vlan stripping.
 *                 Possible values '1' for enable , '0' for disable.
 *                 Default is '2' - which means disable in promisc mode
 *                 and enable in non-promiscuous mode.
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 ************************************************************************/

#include <linux/module.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/pci.h>
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#include <linux/dma-mapping.h>
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#include <linux/kernel.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/stddef.h>
#include <linux/ioctl.h>
#include <linux/timex.h>
#include <linux/ethtool.h>
#include <linux/workqueue.h>
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#include <linux/if_vlan.h>
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#include <linux/ip.h>
#include <linux/tcp.h>
#include <net/tcp.h>
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#include <asm/system.h>
#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/div64.h>
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#include <asm/irq.h>
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/* local include */
#include "s2io.h"
#include "s2io-regs.h"

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#define DRV_VERSION "2.0.26.4"
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/* S2io Driver name & version. */
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static char s2io_driver_name[] = "Neterion";
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static char s2io_driver_version[] = DRV_VERSION;
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static int rxd_size[2] = {32,48};
static int rxd_count[2] = {127,85};
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static inline int RXD_IS_UP2DT(struct RxD_t *rxdp)
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{
	int ret;

	ret = ((!(rxdp->Control_1 & RXD_OWN_XENA)) &&
		(GET_RXD_MARKER(rxdp->Control_2) != THE_RXD_MARK));

	return ret;
}

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/*
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 * Cards with following subsystem_id have a link state indication
 * problem, 600B, 600C, 600D, 640B, 640C and 640D.
 * macro below identifies these cards given the subsystem_id.
 */
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#define CARDS_WITH_FAULTY_LINK_INDICATORS(dev_type, subid) \
	(dev_type == XFRAME_I_DEVICE) ?			\
		((((subid >= 0x600B) && (subid <= 0x600D)) || \
		 ((subid >= 0x640B) && (subid <= 0x640D))) ? 1 : 0) : 0
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#define LINK_IS_UP(val64) (!(val64 & (ADAPTER_STATUS_RMAC_REMOTE_FAULT | \
				      ADAPTER_STATUS_RMAC_LOCAL_FAULT)))
#define TASKLET_IN_USE test_and_set_bit(0, (&sp->tasklet_status))
#define PANIC	1
#define LOW	2
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static inline int rx_buffer_level(struct s2io_nic * sp, int rxb_size, int ring)
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{
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	struct mac_info *mac_control;
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	mac_control = &sp->mac_control;
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	if (rxb_size <= rxd_count[sp->rxd_mode])
		return PANIC;
	else if ((mac_control->rings[ring].pkt_cnt - rxb_size) > 16)
		return  LOW;
	return 0;
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}

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static inline int is_s2io_card_up(const struct s2io_nic * sp)
{
	return test_bit(__S2IO_STATE_CARD_UP, &sp->state);
}

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/* Ethtool related variables and Macros. */
static char s2io_gstrings[][ETH_GSTRING_LEN] = {
	"Register test\t(offline)",
	"Eeprom test\t(offline)",
	"Link test\t(online)",
	"RLDRAM test\t(offline)",
	"BIST Test\t(offline)"
};

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static char ethtool_xena_stats_keys[][ETH_GSTRING_LEN] = {
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	{"tmac_frms"},
	{"tmac_data_octets"},
	{"tmac_drop_frms"},
	{"tmac_mcst_frms"},
	{"tmac_bcst_frms"},
	{"tmac_pause_ctrl_frms"},
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	{"tmac_ttl_octets"},
	{"tmac_ucst_frms"},
	{"tmac_nucst_frms"},
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	{"tmac_any_err_frms"},
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	{"tmac_ttl_less_fb_octets"},
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	{"tmac_vld_ip_octets"},
	{"tmac_vld_ip"},
	{"tmac_drop_ip"},
	{"tmac_icmp"},
	{"tmac_rst_tcp"},
	{"tmac_tcp"},
	{"tmac_udp"},
	{"rmac_vld_frms"},
	{"rmac_data_octets"},
	{"rmac_fcs_err_frms"},
	{"rmac_drop_frms"},
	{"rmac_vld_mcst_frms"},
	{"rmac_vld_bcst_frms"},
	{"rmac_in_rng_len_err_frms"},
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	{"rmac_out_rng_len_err_frms"},
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	{"rmac_long_frms"},
	{"rmac_pause_ctrl_frms"},
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	{"rmac_unsup_ctrl_frms"},
	{"rmac_ttl_octets"},
	{"rmac_accepted_ucst_frms"},
	{"rmac_accepted_nucst_frms"},
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	{"rmac_discarded_frms"},
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	{"rmac_drop_events"},
	{"rmac_ttl_less_fb_octets"},
	{"rmac_ttl_frms"},
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	{"rmac_usized_frms"},
	{"rmac_osized_frms"},
	{"rmac_frag_frms"},
	{"rmac_jabber_frms"},
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	{"rmac_ttl_64_frms"},
	{"rmac_ttl_65_127_frms"},
	{"rmac_ttl_128_255_frms"},
	{"rmac_ttl_256_511_frms"},
	{"rmac_ttl_512_1023_frms"},
	{"rmac_ttl_1024_1518_frms"},
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	{"rmac_ip"},
	{"rmac_ip_octets"},
	{"rmac_hdr_err_ip"},
	{"rmac_drop_ip"},
	{"rmac_icmp"},
	{"rmac_tcp"},
	{"rmac_udp"},
	{"rmac_err_drp_udp"},
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	{"rmac_xgmii_err_sym"},
	{"rmac_frms_q0"},
	{"rmac_frms_q1"},
	{"rmac_frms_q2"},
	{"rmac_frms_q3"},
	{"rmac_frms_q4"},
	{"rmac_frms_q5"},
	{"rmac_frms_q6"},
	{"rmac_frms_q7"},
	{"rmac_full_q0"},
	{"rmac_full_q1"},
	{"rmac_full_q2"},
	{"rmac_full_q3"},
	{"rmac_full_q4"},
	{"rmac_full_q5"},
	{"rmac_full_q6"},
	{"rmac_full_q7"},
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	{"rmac_pause_cnt"},
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	{"rmac_xgmii_data_err_cnt"},
	{"rmac_xgmii_ctrl_err_cnt"},
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	{"rmac_accepted_ip"},
	{"rmac_err_tcp"},
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	{"rd_req_cnt"},
	{"new_rd_req_cnt"},
	{"new_rd_req_rtry_cnt"},
	{"rd_rtry_cnt"},
	{"wr_rtry_rd_ack_cnt"},
	{"wr_req_cnt"},
	{"new_wr_req_cnt"},
	{"new_wr_req_rtry_cnt"},
	{"wr_rtry_cnt"},
	{"wr_disc_cnt"},
	{"rd_rtry_wr_ack_cnt"},
	{"txp_wr_cnt"},
	{"txd_rd_cnt"},
	{"txd_wr_cnt"},
	{"rxd_rd_cnt"},
	{"rxd_wr_cnt"},
	{"txf_rd_cnt"},
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	{"rxf_wr_cnt"}
};

static char ethtool_enhanced_stats_keys[][ETH_GSTRING_LEN] = {
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	{"rmac_ttl_1519_4095_frms"},
	{"rmac_ttl_4096_8191_frms"},
	{"rmac_ttl_8192_max_frms"},
	{"rmac_ttl_gt_max_frms"},
	{"rmac_osized_alt_frms"},
	{"rmac_jabber_alt_frms"},
	{"rmac_gt_max_alt_frms"},
	{"rmac_vlan_frms"},
	{"rmac_len_discard"},
	{"rmac_fcs_discard"},
	{"rmac_pf_discard"},
	{"rmac_da_discard"},
	{"rmac_red_discard"},
	{"rmac_rts_discard"},
	{"rmac_ingm_full_discard"},
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	{"link_fault_cnt"}
};

static char ethtool_driver_stats_keys[][ETH_GSTRING_LEN] = {
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	{"\n DRIVER STATISTICS"},
	{"single_bit_ecc_errs"},
	{"double_bit_ecc_errs"},
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	{"parity_err_cnt"},
	{"serious_err_cnt"},
	{"soft_reset_cnt"},
	{"fifo_full_cnt"},
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	{"ring_0_full_cnt"},
	{"ring_1_full_cnt"},
	{"ring_2_full_cnt"},
	{"ring_3_full_cnt"},
	{"ring_4_full_cnt"},
	{"ring_5_full_cnt"},
	{"ring_6_full_cnt"},
	{"ring_7_full_cnt"},
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	("alarm_transceiver_temp_high"),
	("alarm_transceiver_temp_low"),
	("alarm_laser_bias_current_high"),
	("alarm_laser_bias_current_low"),
	("alarm_laser_output_power_high"),
	("alarm_laser_output_power_low"),
	("warn_transceiver_temp_high"),
	("warn_transceiver_temp_low"),
	("warn_laser_bias_current_high"),
	("warn_laser_bias_current_low"),
	("warn_laser_output_power_high"),
	("warn_laser_output_power_low"),
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	("lro_aggregated_pkts"),
	("lro_flush_both_count"),
	("lro_out_of_sequence_pkts"),
	("lro_flush_due_to_max_pkts"),
	("lro_avg_aggr_pkts"),
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	("mem_alloc_fail_cnt"),
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	("pci_map_fail_cnt"),
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	("watchdog_timer_cnt"),
	("mem_allocated"),
	("mem_freed"),
	("link_up_cnt"),
	("link_down_cnt"),
	("link_up_time"),
	("link_down_time"),
	("tx_tcode_buf_abort_cnt"),
	("tx_tcode_desc_abort_cnt"),
	("tx_tcode_parity_err_cnt"),
	("tx_tcode_link_loss_cnt"),
	("tx_tcode_list_proc_err_cnt"),
	("rx_tcode_parity_err_cnt"),
	("rx_tcode_abort_cnt"),
	("rx_tcode_parity_abort_cnt"),
	("rx_tcode_rda_fail_cnt"),
	("rx_tcode_unkn_prot_cnt"),
	("rx_tcode_fcs_err_cnt"),
	("rx_tcode_buf_size_err_cnt"),
	("rx_tcode_rxd_corrupt_cnt"),
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	("rx_tcode_unkn_err_cnt"),
	{"tda_err_cnt"},
	{"pfc_err_cnt"},
	{"pcc_err_cnt"},
	{"tti_err_cnt"},
	{"tpa_err_cnt"},
	{"sm_err_cnt"},
	{"lso_err_cnt"},
	{"mac_tmac_err_cnt"},
	{"mac_rmac_err_cnt"},
	{"xgxs_txgxs_err_cnt"},
	{"xgxs_rxgxs_err_cnt"},
	{"rc_err_cnt"},
	{"prc_pcix_err_cnt"},
	{"rpa_err_cnt"},
	{"rda_err_cnt"},
	{"rti_err_cnt"},
	{"mc_err_cnt"}
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};

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#define S2IO_XENA_STAT_LEN sizeof(ethtool_xena_stats_keys)/ ETH_GSTRING_LEN
#define S2IO_ENHANCED_STAT_LEN sizeof(ethtool_enhanced_stats_keys)/ \
					ETH_GSTRING_LEN
#define S2IO_DRIVER_STAT_LEN sizeof(ethtool_driver_stats_keys)/ ETH_GSTRING_LEN

#define XFRAME_I_STAT_LEN (S2IO_XENA_STAT_LEN + S2IO_DRIVER_STAT_LEN )
#define XFRAME_II_STAT_LEN (XFRAME_I_STAT_LEN + S2IO_ENHANCED_STAT_LEN )

#define XFRAME_I_STAT_STRINGS_LEN ( XFRAME_I_STAT_LEN * ETH_GSTRING_LEN )
#define XFRAME_II_STAT_STRINGS_LEN ( XFRAME_II_STAT_LEN * ETH_GSTRING_LEN )
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#define S2IO_TEST_LEN	sizeof(s2io_gstrings) / ETH_GSTRING_LEN
#define S2IO_STRINGS_LEN	S2IO_TEST_LEN * ETH_GSTRING_LEN

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#define S2IO_TIMER_CONF(timer, handle, arg, exp)		\
			init_timer(&timer);			\
			timer.function = handle;		\
			timer.data = (unsigned long) arg;	\
			mod_timer(&timer, (jiffies + exp))	\

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/* Add the vlan */
static void s2io_vlan_rx_register(struct net_device *dev,
					struct vlan_group *grp)
{
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	struct s2io_nic *nic = dev->priv;
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	unsigned long flags;

	spin_lock_irqsave(&nic->tx_lock, flags);
	nic->vlgrp = grp;
	spin_unlock_irqrestore(&nic->tx_lock, flags);
}

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/* A flag indicating whether 'RX_PA_CFG_STRIP_VLAN_TAG' bit is set or not */
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static int vlan_strip_flag;
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/*
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 * Constants to be programmed into the Xena's registers, to configure
 * the XAUI.
 */

#define	END_SIGN	0x0
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static const u64 herc_act_dtx_cfg[] = {
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	/* Set address */
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	0x8000051536750000ULL, 0x80000515367500E0ULL,
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	/* Write data */
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	0x8000051536750004ULL, 0x80000515367500E4ULL,
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	/* Set address */
	0x80010515003F0000ULL, 0x80010515003F00E0ULL,
	/* Write data */
	0x80010515003F0004ULL, 0x80010515003F00E4ULL,
	/* Set address */
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	0x801205150D440000ULL, 0x801205150D4400E0ULL,
	/* Write data */
	0x801205150D440004ULL, 0x801205150D4400E4ULL,
	/* Set address */
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	0x80020515F2100000ULL, 0x80020515F21000E0ULL,
	/* Write data */
	0x80020515F2100004ULL, 0x80020515F21000E4ULL,
	/* Done */
	END_SIGN
};

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static const u64 xena_dtx_cfg[] = {
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	/* Set address */
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	0x8000051500000000ULL, 0x80000515000000E0ULL,
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	/* Write data */
	0x80000515D9350004ULL, 0x80000515D93500E4ULL,
	/* Set address */
	0x8001051500000000ULL, 0x80010515000000E0ULL,
	/* Write data */
	0x80010515001E0004ULL, 0x80010515001E00E4ULL,
	/* Set address */
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	0x8002051500000000ULL, 0x80020515000000E0ULL,
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	/* Write data */
	0x80020515F2100004ULL, 0x80020515F21000E4ULL,
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	END_SIGN
};

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/*
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 * Constants for Fixing the MacAddress problem seen mostly on
 * Alpha machines.
 */
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static const u64 fix_mac[] = {
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	0x0060000000000000ULL, 0x0060600000000000ULL,
	0x0040600000000000ULL, 0x0000600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0000600000000000ULL,
	0x0040600000000000ULL, 0x0060600000000000ULL,
	END_SIGN
};

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MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);


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/* Module Loadable parameters. */
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S2IO_PARM_INT(tx_fifo_num, 1);
S2IO_PARM_INT(rx_ring_num, 1);


S2IO_PARM_INT(rx_ring_mode, 1);
S2IO_PARM_INT(use_continuous_tx_intrs, 1);
S2IO_PARM_INT(rmac_pause_time, 0x100);
S2IO_PARM_INT(mc_pause_threshold_q0q3, 187);
S2IO_PARM_INT(mc_pause_threshold_q4q7, 187);
S2IO_PARM_INT(shared_splits, 0);
S2IO_PARM_INT(tmac_util_period, 5);
S2IO_PARM_INT(rmac_util_period, 5);
S2IO_PARM_INT(l3l4hdr_size, 128);
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/* Frequency of Rx desc syncs expressed as power of 2 */
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S2IO_PARM_INT(rxsync_frequency, 3);
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/* Interrupt type. Values can be 0(INTA), 2(MSI_X) */
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S2IO_PARM_INT(intr_type, 2);
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/* Large receive offload feature */
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S2IO_PARM_INT(lro, 0);
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/* Max pkts to be aggregated by LRO at one time. If not specified,
 * aggregation happens until we hit max IP pkt size(64K)
 */
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S2IO_PARM_INT(lro_max_pkts, 0xFFFF);
S2IO_PARM_INT(indicate_max_pkts, 0);
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S2IO_PARM_INT(napi, 1);
S2IO_PARM_INT(ufo, 0);
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S2IO_PARM_INT(vlan_tag_strip, NO_STRIP_IN_PROMISC);
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static unsigned int tx_fifo_len[MAX_TX_FIFOS] =
    {DEFAULT_FIFO_0_LEN, [1 ...(MAX_TX_FIFOS - 1)] = DEFAULT_FIFO_1_7_LEN};
static unsigned int rx_ring_sz[MAX_RX_RINGS] =
    {[0 ...(MAX_RX_RINGS - 1)] = SMALL_BLK_CNT};
static unsigned int rts_frm_len[MAX_RX_RINGS] =
    {[0 ...(MAX_RX_RINGS - 1)] = 0 };

module_param_array(tx_fifo_len, uint, NULL, 0);
module_param_array(rx_ring_sz, uint, NULL, 0);
module_param_array(rts_frm_len, uint, NULL, 0);
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/*
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 * S2IO device table.
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 * This table lists all the devices that this driver supports.
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 */
static struct pci_device_id s2io_tbl[] __devinitdata = {
	{PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_WIN,
	 PCI_ANY_ID, PCI_ANY_ID},
	{PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_UNI,
	 PCI_ANY_ID, PCI_ANY_ID},
	{PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_WIN,
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         PCI_ANY_ID, PCI_ANY_ID},
        {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_UNI,
         PCI_ANY_ID, PCI_ANY_ID},
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	{0,}
};

MODULE_DEVICE_TABLE(pci, s2io_tbl);

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static struct pci_error_handlers s2io_err_handler = {
	.error_detected = s2io_io_error_detected,
	.slot_reset = s2io_io_slot_reset,
	.resume = s2io_io_resume,
};

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static struct pci_driver s2io_driver = {
      .name = "S2IO",
      .id_table = s2io_tbl,
      .probe = s2io_init_nic,
      .remove = __devexit_p(s2io_rem_nic),
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      .err_handler = &s2io_err_handler,
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};

/* A simplifier macro used both by init and free shared_mem Fns(). */
#define TXD_MEM_PAGE_CNT(len, per_each) ((len+per_each - 1) / per_each)

/**
 * init_shared_mem - Allocation and Initialization of Memory
 * @nic: Device private variable.
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 * Description: The function allocates all the memory areas shared
 * between the NIC and the driver. This includes Tx descriptors,
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 * Rx descriptors and the statistics block.
 */

static int init_shared_mem(struct s2io_nic *nic)
{
	u32 size;
	void *tmp_v_addr, *tmp_v_addr_next;
	dma_addr_t tmp_p_addr, tmp_p_addr_next;
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	struct RxD_block *pre_rxd_blk = NULL;
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	int i, j, blk_cnt;
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	int lst_size, lst_per_page;
	struct net_device *dev = nic->dev;
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	unsigned long tmp;
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	struct buffAdd *ba;
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	struct mac_info *mac_control;
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	struct config_param *config;
540
	unsigned long long mem_allocated = 0;
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	mac_control = &nic->mac_control;
	config = &nic->config;


	/* Allocation and initialization of TXDLs in FIOFs */
	size = 0;
	for (i = 0; i < config->tx_fifo_num; i++) {
		size += config->tx_cfg[i].fifo_len;
	}
	if (size > MAX_AVAILABLE_TXDS) {
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		DBG_PRINT(ERR_DBG, "s2io: Requested TxDs too high, ");
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		DBG_PRINT(ERR_DBG, "Requested: %d, max supported: 8192\n", size);
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		return -EINVAL;
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	}

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	lst_size = (sizeof(struct TxD) * config->max_txds);
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	lst_per_page = PAGE_SIZE / lst_size;

	for (i = 0; i < config->tx_fifo_num; i++) {
		int fifo_len = config->tx_cfg[i].fifo_len;
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		int list_holder_size = fifo_len * sizeof(struct list_info_hold);
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		mac_control->fifos[i].list_info = kzalloc(list_holder_size,
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							  GFP_KERNEL);
		if (!mac_control->fifos[i].list_info) {
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			DBG_PRINT(INFO_DBG,
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				  "Malloc failed for list_info\n");
			return -ENOMEM;
		}
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		mem_allocated += list_holder_size;
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	}
	for (i = 0; i < config->tx_fifo_num; i++) {
		int page_num = TXD_MEM_PAGE_CNT(config->tx_cfg[i].fifo_len,
						lst_per_page);
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		mac_control->fifos[i].tx_curr_put_info.offset = 0;
		mac_control->fifos[i].tx_curr_put_info.fifo_len =
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		    config->tx_cfg[i].fifo_len - 1;
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		mac_control->fifos[i].tx_curr_get_info.offset = 0;
		mac_control->fifos[i].tx_curr_get_info.fifo_len =
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		    config->tx_cfg[i].fifo_len - 1;
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		mac_control->fifos[i].fifo_no = i;
		mac_control->fifos[i].nic = nic;
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		mac_control->fifos[i].max_txds = MAX_SKB_FRAGS + 2;
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		for (j = 0; j < page_num; j++) {
			int k = 0;
			dma_addr_t tmp_p;
			void *tmp_v;
			tmp_v = pci_alloc_consistent(nic->pdev,
						     PAGE_SIZE, &tmp_p);
			if (!tmp_v) {
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				DBG_PRINT(INFO_DBG,
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					  "pci_alloc_consistent ");
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				DBG_PRINT(INFO_DBG, "failed for TxDL\n");
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				return -ENOMEM;
			}
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			/* If we got a zero DMA address(can happen on
			 * certain platforms like PPC), reallocate.
			 * Store virtual address of page we don't want,
			 * to be freed later.
			 */
			if (!tmp_p) {
				mac_control->zerodma_virt_addr = tmp_v;
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				DBG_PRINT(INIT_DBG,
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				"%s: Zero DMA address for TxDL. ", dev->name);
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				DBG_PRINT(INIT_DBG,
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				"Virtual address %p\n", tmp_v);
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				tmp_v = pci_alloc_consistent(nic->pdev,
						     PAGE_SIZE, &tmp_p);
				if (!tmp_v) {
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					DBG_PRINT(INFO_DBG,
612
					  "pci_alloc_consistent ");
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					DBG_PRINT(INFO_DBG, "failed for TxDL\n");
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					return -ENOMEM;
				}
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				mem_allocated += PAGE_SIZE;
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			}
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			while (k < lst_per_page) {
				int l = (j * lst_per_page) + k;
				if (l == config->tx_cfg[i].fifo_len)
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					break;
				mac_control->fifos[i].list_info[l].list_virt_addr =
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				    tmp_v + (k * lst_size);
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				mac_control->fifos[i].list_info[l].list_phy_addr =
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				    tmp_p + (k * lst_size);
				k++;
			}
		}
	}

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	nic->ufo_in_band_v = kcalloc(size, sizeof(u64), GFP_KERNEL);
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	if (!nic->ufo_in_band_v)
		return -ENOMEM;
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	 mem_allocated += (size * sizeof(u64));
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	/* Allocation and initialization of RXDs in Rings */
	size = 0;
	for (i = 0; i < config->rx_ring_num; i++) {
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		if (config->rx_cfg[i].num_rxd %
		    (rxd_count[nic->rxd_mode] + 1)) {
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			DBG_PRINT(ERR_DBG, "%s: RxD count of ", dev->name);
			DBG_PRINT(ERR_DBG, "Ring%d is not a multiple of ",
				  i);
			DBG_PRINT(ERR_DBG, "RxDs per Block");
			return FAILURE;
		}
		size += config->rx_cfg[i].num_rxd;
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		mac_control->rings[i].block_count =
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			config->rx_cfg[i].num_rxd /
			(rxd_count[nic->rxd_mode] + 1 );
		mac_control->rings[i].pkt_cnt = config->rx_cfg[i].num_rxd -
			mac_control->rings[i].block_count;
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	}
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	if (nic->rxd_mode == RXD_MODE_1)
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		size = (size * (sizeof(struct RxD1)));
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	else
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		size = (size * (sizeof(struct RxD3)));
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	for (i = 0; i < config->rx_ring_num; i++) {
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		mac_control->rings[i].rx_curr_get_info.block_index = 0;
		mac_control->rings[i].rx_curr_get_info.offset = 0;
		mac_control->rings[i].rx_curr_get_info.ring_len =
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		    config->rx_cfg[i].num_rxd - 1;
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		mac_control->rings[i].rx_curr_put_info.block_index = 0;
		mac_control->rings[i].rx_curr_put_info.offset = 0;
		mac_control->rings[i].rx_curr_put_info.ring_len =
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		    config->rx_cfg[i].num_rxd - 1;
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		mac_control->rings[i].nic = nic;
		mac_control->rings[i].ring_no = i;

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		blk_cnt = config->rx_cfg[i].num_rxd /
				(rxd_count[nic->rxd_mode] + 1);
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		/*  Allocating all the Rx blocks */
		for (j = 0; j < blk_cnt; j++) {
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			struct rx_block_info *rx_blocks;
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			int l;

			rx_blocks = &mac_control->rings[i].rx_blocks[j];
			size = SIZE_OF_BLOCK; //size is always page size
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			tmp_v_addr = pci_alloc_consistent(nic->pdev, size,
							  &tmp_p_addr);
			if (tmp_v_addr == NULL) {
				/*
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				 * In case of failure, free_shared_mem()
				 * is called, which should free any
				 * memory that was alloced till the
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				 * failure happened.
				 */
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				rx_blocks->block_virt_addr = tmp_v_addr;
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				return -ENOMEM;
			}
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			mem_allocated += size;
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			memset(tmp_v_addr, 0, size);
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			rx_blocks->block_virt_addr = tmp_v_addr;
			rx_blocks->block_dma_addr = tmp_p_addr;
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			rx_blocks->rxds = kmalloc(sizeof(struct rxd_info)*
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						  rxd_count[nic->rxd_mode],
						  GFP_KERNEL);
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			if (!rx_blocks->rxds)
				return -ENOMEM;
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			mem_allocated +=
702
			(sizeof(struct rxd_info)* rxd_count[nic->rxd_mode]);
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			for (l=0; l<rxd_count[nic->rxd_mode];l++) {
				rx_blocks->rxds[l].virt_addr =
					rx_blocks->block_virt_addr +
					(rxd_size[nic->rxd_mode] * l);
				rx_blocks->rxds[l].dma_addr =
					rx_blocks->block_dma_addr +
					(rxd_size[nic->rxd_mode] * l);
			}
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		}
		/* Interlinking all Rx Blocks */
		for (j = 0; j < blk_cnt; j++) {
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			tmp_v_addr =
				mac_control->rings[i].rx_blocks[j].block_virt_addr;
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			tmp_v_addr_next =
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				mac_control->rings[i].rx_blocks[(j + 1) %
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					      blk_cnt].block_virt_addr;
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			tmp_p_addr =
				mac_control->rings[i].rx_blocks[j].block_dma_addr;
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			tmp_p_addr_next =
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				mac_control->rings[i].rx_blocks[(j + 1) %
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					      blk_cnt].block_dma_addr;

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			pre_rxd_blk = (struct RxD_block *) tmp_v_addr;
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			pre_rxd_blk->reserved_2_pNext_RxD_block =
			    (unsigned long) tmp_v_addr_next;
			pre_rxd_blk->pNext_RxD_Blk_physical =
			    (u64) tmp_p_addr_next;
		}
	}
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	if (nic->rxd_mode == RXD_MODE_3B) {
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		/*
		 * Allocation of Storages for buffer addresses in 2BUFF mode
		 * and the buffers as well.
		 */
		for (i = 0; i < config->rx_ring_num; i++) {
			blk_cnt = config->rx_cfg[i].num_rxd /
			   (rxd_count[nic->rxd_mode]+ 1);
			mac_control->rings[i].ba =
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				kmalloc((sizeof(struct buffAdd *) * blk_cnt),
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				     GFP_KERNEL);
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			if (!mac_control->rings[i].ba)
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				return -ENOMEM;
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			mem_allocated +=(sizeof(struct buffAdd *) * blk_cnt);
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			for (j = 0; j < blk_cnt; j++) {
				int k = 0;
				mac_control->rings[i].ba[j] =
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					kmalloc((sizeof(struct buffAdd) *
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						(rxd_count[nic->rxd_mode] + 1)),
						GFP_KERNEL);
				if (!mac_control->rings[i].ba[j])
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					return -ENOMEM;
754 755
				mem_allocated += (sizeof(struct buffAdd) *  \
					(rxd_count[nic->rxd_mode] + 1));
756 757 758 759 760 761 762
				while (k != rxd_count[nic->rxd_mode]) {
					ba = &mac_control->rings[i].ba[j][k];

					ba->ba_0_org = (void *) kmalloc
					    (BUF0_LEN + ALIGN_SIZE, GFP_KERNEL);
					if (!ba->ba_0_org)
						return -ENOMEM;
763
					mem_allocated +=
764
						(BUF0_LEN + ALIGN_SIZE);
765 766 767 768 769 770 771 772 773
					tmp = (unsigned long)ba->ba_0_org;
					tmp += ALIGN_SIZE;
					tmp &= ~((unsigned long) ALIGN_SIZE);
					ba->ba_0 = (void *) tmp;

					ba->ba_1_org = (void *) kmalloc
					    (BUF1_LEN + ALIGN_SIZE, GFP_KERNEL);
					if (!ba->ba_1_org)
						return -ENOMEM;
774
					mem_allocated
775
						+= (BUF1_LEN + ALIGN_SIZE);
776 777 778 779 780 781
					tmp = (unsigned long) ba->ba_1_org;
					tmp += ALIGN_SIZE;
					tmp &= ~((unsigned long) ALIGN_SIZE);
					ba->ba_1 = (void *) tmp;
					k++;
				}
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			}
		}
	}

	/* Allocation and initialization of Statistics block */
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	size = sizeof(struct stat_block);
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	mac_control->stats_mem = pci_alloc_consistent
	    (nic->pdev, size, &mac_control->stats_mem_phy);

	if (!mac_control->stats_mem) {
792 793 794
		/*
		 * In case of failure, free_shared_mem() is called, which
		 * should free any memory that was alloced till the
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		 * failure happened.
		 */
		return -ENOMEM;
	}
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	mem_allocated += size;
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	mac_control->stats_mem_sz = size;

	tmp_v_addr = mac_control->stats_mem;
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	mac_control->stats_info = (struct stat_block *) tmp_v_addr;
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	memset(tmp_v_addr, 0, size);
	DBG_PRINT(INIT_DBG, "%s:Ring Mem PHY: 0x%llx\n", dev->name,
		  (unsigned long long) tmp_p_addr);
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	mac_control->stats_info->sw_stat.mem_allocated += mem_allocated;
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	return SUCCESS;
}

811 812
/**
 * free_shared_mem - Free the allocated Memory
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 * @nic:  Device private variable.
 * Description: This function is to free all memory locations allocated by
 * the init_shared_mem() function and return it to the kernel.
 */

static void free_shared_mem(struct s2io_nic *nic)
{
	int i, j, blk_cnt, size;
821
	u32 ufo_size = 0;
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	void *tmp_v_addr;
	dma_addr_t tmp_p_addr;
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	struct mac_info *mac_control;
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	struct config_param *config;
	int lst_size, lst_per_page;
827
	struct net_device *dev;
828
	int page_num = 0;
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	if (!nic)
		return;

833 834
	dev = nic->dev;

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	mac_control = &nic->mac_control;
	config = &nic->config;

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	lst_size = (sizeof(struct TxD) * config->max_txds);
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	lst_per_page = PAGE_SIZE / lst_size;

	for (i = 0; i < config->tx_fifo_num; i++) {
842 843 844
		ufo_size += config->tx_cfg[i].fifo_len;
		page_num = TXD_MEM_PAGE_CNT(config->tx_cfg[i].fifo_len,
							lst_per_page);
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		for (j = 0; j < page_num; j++) {
			int mem_blks = (j * lst_per_page);
847
			if (!mac_control->fifos[i].list_info)
848
				return;
849 850
			if (!mac_control->fifos[i].list_info[mem_blks].
				 list_virt_addr)
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				break;
			pci_free_consistent(nic->pdev, PAGE_SIZE,
853 854
					    mac_control->fifos[i].
					    list_info[mem_blks].
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					    list_virt_addr,
856 857
					    mac_control->fifos[i].
					    list_info[mem_blks].
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					    list_phy_addr);
859
			nic->mac_control.stats_info->sw_stat.mem_freed
860
						+= PAGE_SIZE;
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		}
862 863 864 865 866 867 868
		/* If we got a zero DMA address during allocation,
		 * free the page now
		 */
		if (mac_control->zerodma_virt_addr) {
			pci_free_consistent(nic->pdev, PAGE_SIZE,
					    mac_control->zerodma_virt_addr,
					    (dma_addr_t)0);
869
			DBG_PRINT(INIT_DBG,
870 871 872 873
			  	"%s: Freeing TxDL with zero DMA addr. ",
				dev->name);
			DBG_PRINT(INIT_DBG, "Virtual address %p\n",
				mac_control->zerodma_virt_addr);
874
			nic->mac_control.stats_info->sw_stat.mem_freed
875
						+= PAGE_SIZE;
876
		}
877
		kfree(mac_control->fifos[i].list_info);
878
		nic->mac_control.stats_info->sw_stat.mem_freed +=
879
		(nic->config.tx_cfg[i].fifo_len *sizeof(struct list_info_hold));
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	}

	size = SIZE_OF_BLOCK;
	for (i = 0; i < config->rx_ring_num; i++) {
884
		blk_cnt = mac_control->rings[i].block_count;
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		for (j = 0; j < blk_cnt; j++) {
886 887 888 889
			tmp_v_addr = mac_control->rings[i].rx_blocks[j].
				block_virt_addr;
			tmp_p_addr = mac_control->rings[i].rx_blocks[j].
				block_dma_addr;
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			if (tmp_v_addr == NULL)
				break;
			pci_free_consistent(nic->pdev, size,
					    tmp_v_addr, tmp_p_addr);
894
			nic->mac_control.stats_info->sw_stat.mem_freed += size;
895
			kfree(mac_control->rings[i].rx_blocks[j].rxds);
896
			nic->mac_control.stats_info->sw_stat.mem_freed +=
897
			( sizeof(struct rxd_info)* rxd_count[nic->rxd_mode]);
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		}
	}

901
	if (nic->rxd_mode == RXD_MODE_3B) {
902 903 904 905 906 907 908 909 910
		/* Freeing buffer storage addresses in 2BUFF mode. */
		for (i = 0; i < config->rx_ring_num; i++) {
			blk_cnt = config->rx_cfg[i].num_rxd /
			    (rxd_count[nic->rxd_mode] + 1);
			for (j = 0; j < blk_cnt; j++) {
				int k = 0;
				if (!mac_control->rings[i].ba[j])
					continue;
				while (k != rxd_count[nic->rxd_mode]) {
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					struct buffAdd *ba =
912 913
						&mac_control->rings[i].ba[j][k];
					kfree(ba->ba_0_org);
914 915
					nic->mac_control.stats_info->sw_stat.\
					mem_freed += (BUF0_LEN + ALIGN_SIZE);
916
					kfree(ba->ba_1_org);
917 918
					nic->mac_control.stats_info->sw_stat.\
					mem_freed += (BUF1_LEN + ALIGN_SIZE);
919 920 921
					k++;
				}
				kfree(mac_control->rings[i].ba[j]);
922 923 924
				nic->mac_control.stats_info->sw_stat.mem_freed +=
					(sizeof(struct buffAdd) *
					(rxd_count[nic->rxd_mode] + 1));
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			}
926
			kfree(mac_control->rings[i].ba);
927
			nic->mac_control.stats_info->sw_stat.mem_freed +=
928
			(sizeof(struct buffAdd *) * blk_cnt);
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		}
	}

	if (mac_control->stats_mem) {
		pci_free_consistent(nic->pdev,
				    mac_control->stats_mem_sz,
				    mac_control->stats_mem,
				    mac_control->stats_mem_phy);
937
		nic->mac_control.stats_info->sw_stat.mem_freed +=
938
			mac_control->stats_mem_sz;
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	}
940
	if (nic->ufo_in_band_v) {
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		kfree(nic->ufo_in_band_v);
942
		nic->mac_control.stats_info->sw_stat.mem_freed
943 944
			+= (ufo_size * sizeof(u64));
	}
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}

947 948 949 950
/**
 * s2io_verify_pci_mode -
 */

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static int s2io_verify_pci_mode(struct s2io_nic *nic)
952
{
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	struct XENA_dev_config __iomem *bar0 = nic->bar0;
954 955 956 957 958 959 960 961 962 963 964
	register u64 val64 = 0;
	int     mode;

	val64 = readq(&bar0->pci_mode);
	mode = (u8)GET_PCI_MODE(val64);

	if ( val64 & PCI_MODE_UNKNOWN_MODE)
		return -1;      /* Unknown PCI mode */
	return mode;
}

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#define NEC_VENID   0x1033
#define NEC_DEVID   0x0125
static int s2io_on_nec_bridge(struct pci_dev *s2io_pdev)
{
	struct pci_dev *tdev = NULL;
970 971
	while ((tdev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, tdev)) != NULL) {
		if (tdev->vendor == NEC_VENID && tdev->device == NEC_DEVID) {
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			if (tdev->bus == s2io_pdev->bus->parent)
973
				pci_dev_put(tdev);
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				return 1;
		}
	}
	return 0;
}
979

980
static int bus_speed[8] = {33, 133, 133, 200, 266, 133, 200, 266};
981 982 983
/**
 * s2io_print_pci_mode -
 */
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static int s2io_print_pci_mode(struct s2io_nic *nic)
985
{
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	struct XENA_dev_config __iomem *bar0 = nic->bar0;
987 988 989 990 991 992 993 994 995 996
	register u64 val64 = 0;
	int	mode;
	struct config_param *config = &nic->config;

	val64 = readq(&bar0->pci_mode);
	mode = (u8)GET_PCI_MODE(val64);

	if ( val64 & PCI_MODE_UNKNOWN_MODE)
		return -1;	/* Unknown PCI mode */

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	config->bus_speed = bus_speed[mode];

	if (s2io_on_nec_bridge(nic->pdev)) {
		DBG_PRINT(ERR_DBG, "%s: Device is on PCI-E bus\n",
							nic->dev->name);
		return mode;
	}

1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042
	if (val64 & PCI_MODE_32_BITS) {
		DBG_PRINT(ERR_DBG, "%s: Device is on 32 bit ", nic->dev->name);
	} else {
		DBG_PRINT(ERR_DBG, "%s: Device is on 64 bit ", nic->dev->name);
	}

	switch(mode) {
		case PCI_MODE_PCI_33:
			DBG_PRINT(ERR_DBG, "33MHz PCI bus\n");
			break;
		case PCI_MODE_PCI_66:
			DBG_PRINT(ERR_DBG, "66MHz PCI bus\n");
			break;
		case PCI_MODE_PCIX_M1_66:
			DBG_PRINT(ERR_DBG, "66MHz PCIX(M1) bus\n");
			break;
		case PCI_MODE_PCIX_M1_100:
			DBG_PRINT(ERR_DBG, "100MHz PCIX(M1) bus\n");
			break;
		case PCI_MODE_PCIX_M1_133:
			DBG_PRINT(ERR_DBG, "133MHz PCIX(M1) bus\n");
			break;
		case PCI_MODE_PCIX_M2_66:
			DBG_PRINT(ERR_DBG, "133MHz PCIX(M2) bus\n");
			break;
		case PCI_MODE_PCIX_M2_100:
			DBG_PRINT(ERR_DBG, "200MHz PCIX(M2) bus\n");
			break;
		case PCI_MODE_PCIX_M2_133:
			DBG_PRINT(ERR_DBG, "266MHz PCIX(M2) bus\n");
			break;
		default:
			return -1;	/* Unsupported bus speed */
	}

	return mode;
}

1043 1044
/**
 *  init_nic - Initialization of hardware
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 *  @nic: device peivate variable
1046 1047 1048
 *  Description: The function sequentially configures every block
 *  of the H/W from their reset values.
 *  Return Value:  SUCCESS on success and
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 *  '-1' on failure (endian settings incorrect).
 */

static int init_nic(struct s2io_nic *nic)
{
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	struct XENA_dev_config __iomem *bar0 = nic->bar0;
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	struct net_device *dev = nic->dev;
	register u64 val64 = 0;
	void __iomem *add;
	u32 time;
	int i, j;
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	struct mac_info *mac_control;
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	struct config_param *config;
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	int dtx_cnt = 0;
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	unsigned long long mem_share;
1064
	int mem_size;
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	mac_control = &nic->mac_control;
	config = &nic->config;

1069
	/* to set the swapper controle on the card */
1070
	if(s2io_set_swapper(nic)) {
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		DBG_PRINT(ERR_DBG,"ERROR: Setting Swapper failed\n");
		return -1;
	}

1075 1076 1077 1078 1079 1080 1081 1082 1083 1084
	/*
	 * Herc requires EOI to be removed from reset before XGXS, so..
	 */
	if (nic->device_type & XFRAME_II_DEVICE) {
		val64 = 0xA500000000ULL;
		writeq(val64, &bar0->sw_reset);
		msleep(500);
		val64 = readq(&bar0->sw_reset);
	}

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	/* Remove XGXS from reset state */
	val64 = 0;
	writeq(val64, &bar0->sw_reset);
	msleep(500);
1089
	val64 = readq(&bar0->sw_reset);
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	/*  Enable Receiving broadcasts */
	add = &bar0->mac_cfg;
	val64 = readq(&bar0->mac_cfg);
	val64 |= MAC_RMAC_BCAST_ENABLE;
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) val64, add);
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) (val64 >> 32), (add + 4));

	/* Read registers in all blocks */
	val64 = readq(&bar0->mac_int_mask);
	val64 = readq(&bar0->mc_int_mask);
	val64 = readq(&bar0->xgxs_int_mask);

	/*  Set MTU */
	val64 = dev->mtu;
	writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);

1109 1110
	if (nic->device_type & XFRAME_II_DEVICE) {
		while (herc_act_dtx_cfg[dtx_cnt] != END_SIGN) {
1111
			SPECIAL_REG_WRITE(herc_act_dtx_cfg[dtx_cnt],
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					  &bar0->dtx_control, UF);
1113 1114
			if (dtx_cnt & 0x1)
				msleep(1); /* Necessary!! */
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			dtx_cnt++;
		}
1117
	} else {
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		while (xena_dtx_cfg[dtx_cnt] != END_SIGN) {
			SPECIAL_REG_WRITE(xena_dtx_cfg[dtx_cnt],
					  &bar0->dtx_control, UF);
			val64 = readq(&bar0->dtx_control);
			dtx_cnt++;
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		}
	}

	/*  Tx DMA Initialization */
	val64 = 0;
	writeq(val64, &bar0->tx_fifo_partition_0);
	writeq(val64, &bar0->tx_fifo_partition_1);
	writeq(val64, &bar0->tx_fifo_partition_2);
	writeq(val64, &bar0->tx_fifo_partition_3);


	for (i = 0, j = 0; i < config->tx_fifo_num; i++) {
		val64 |=
		    vBIT(config->tx_cfg[i].fifo_len - 1, ((i * 32) + 19),
			 13) | vBIT(config->tx_cfg[i].fifo_priority,
				    ((i * 32) + 5), 3);

		if (i == (config->tx_fifo_num - 1)) {
			if (i % 2 == 0)
				i++;
		}

		switch (i) {
		case 1:
			writeq(val64, &bar0->tx_fifo_partition_0);
			val64 = 0;
			break;
		case 3:
			writeq(val64, &bar0->tx_fifo_partition_1);
			val64 = 0;
			break;
		case 5:
			writeq(val64, &bar0->tx_fifo_partition_2);
			val64 = 0;
			break;
		case 7:
			writeq(val64, &bar0->tx_fifo_partition_3);
			break;
		}
	}

1164 1165 1166 1167
	/*
	 * Disable 4 PCCs for Xena1, 2 and 3 as per H/W bug
	 * SXE-008 TRANSMIT DMA ARBITRATION ISSUE.
	 */
1168
	if ((nic->device_type == XFRAME_I_DEVICE) &&
1169
		(nic->pdev->revision < 4))
1170 1171
		writeq(PCC_ENABLE_FOUR, &bar0->pcc_enable);

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	val64 = readq(&bar0->tx_fifo_partition_0);
	DBG_PRINT(INIT_DBG, "Fifo partition at: 0x%p is: 0x%llx\n",
		  &bar0->tx_fifo_partition_0, (unsigned long long) val64);

1176 1177
	/*
	 * Initialization of Tx_PA_CONFIG register to ignore packet
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	 * integrity checking.
	 */
	val64 = readq(&bar0->tx_pa_cfg);
	val64 |= TX_PA_CFG_IGNORE_FRM_ERR | TX_PA_CFG_IGNORE_SNAP_OUI |
	    TX_PA_CFG_IGNORE_LLC_CTRL | TX_PA_CFG_IGNORE_L2_ERR;
	writeq(val64, &bar0->tx_pa_cfg);

	/* Rx DMA intialization. */
	val64 = 0;
	for (i = 0; i < config->rx_ring_num; i++) {
		val64 |=
		    vBIT(config->rx_cfg[i].ring_priority, (5 + (i * 8)),
			 3);
	}
	writeq(val64, &bar0->rx_queue_priority);

1194 1195
	/*
	 * Allocating equal share of memory to all the
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	 * configured Rings.
	 */
	val64 = 0;
1199 1200 1201 1202 1203
	if (nic->device_type & XFRAME_II_DEVICE)
		mem_size = 32;
	else
		mem_size = 64;

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	for (i = 0; i < config->rx_ring_num; i++) {
		switch (i) {
		case 0:
1207 1208
			mem_share = (mem_size / config->rx_ring_num +
				     mem_size % config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q0_SZ(mem_share);
			continue;
		case 1:
1212
			mem_share = (mem_size / config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q1_SZ(mem_share);
			continue;
		case 2:
1216
			mem_share = (mem_size / config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q2_SZ(mem_share);
			continue;
		case 3:
1220
			mem_share = (mem_size / config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q3_SZ(mem_share);
			continue;
		case 4:
1224
			mem_share = (mem_size / config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q4_SZ(mem_share);
			continue;
		case 5:
1228
			mem_share = (mem_size / config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q5_SZ(mem_share);
			continue;
		case 6:
1232
			mem_share = (mem_size / config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q6_SZ(mem_share);
			continue;
		case 7:
1236
			mem_share = (mem_size / config->rx_ring_num);
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			val64 |= RX_QUEUE_CFG_Q7_SZ(mem_share);
			continue;
		}
	}
	writeq(val64, &bar0->rx_queue_cfg);

1243
	/*
1244 1245
	 * Filling Tx round robin registers
	 * as per the number of FIFOs
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	 */
1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341
	switch (config->tx_fifo_num) {
	case 1:
		val64 = 0x0000000000000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		writeq(val64, &bar0->tx_w_round_robin_1);
		writeq(val64, &bar0->tx_w_round_robin_2);
		writeq(val64, &bar0->tx_w_round_robin_3);
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 2:
		val64 = 0x0000010000010000ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		val64 = 0x0100000100000100ULL;
		writeq(val64, &bar0->tx_w_round_robin_1);
		val64 = 0x0001000001000001ULL;
		writeq(val64, &bar0->tx_w_round_robin_2);
		val64 = 0x0000010000010000ULL;
		writeq(val64, &bar0->tx_w_round_robin_3);
		val64 = 0x0100000000000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 3:
		val64 = 0x0001000102000001ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		val64 = 0x0001020000010001ULL;
		writeq(val64, &bar0->tx_w_round_robin_1);
		val64 = 0x0200000100010200ULL;
		writeq(val64, &bar0->tx_w_round_robin_2);
		val64 = 0x0001000102000001ULL;
		writeq(val64, &bar0->tx_w_round_robin_3);
		val64 = 0x0001020000000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 4:
		val64 = 0x0001020300010200ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		val64 = 0x0100000102030001ULL;
		writeq(val64, &bar0->tx_w_round_robin_1);
		val64 = 0x0200010000010203ULL;
		writeq(val64, &bar0->tx_w_round_robin_2);
		val64 = 0x0001020001000001ULL;
		writeq(val64, &bar0->tx_w_round_robin_3);
		val64 = 0x0203000100000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 5:
		val64 = 0x0001000203000102ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		val64 = 0x0001020001030004ULL;
		writeq(val64, &bar0->tx_w_round_robin_1);
		val64 = 0x0001000203000102ULL;
		writeq(val64, &bar0->tx_w_round_robin_2);
		val64 = 0x0001020001030004ULL;
		writeq(val64, &bar0->tx_w_round_robin_3);
		val64 = 0x0001000000000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 6:
		val64 = 0x0001020304000102ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		val64 = 0x0304050001020001ULL;
		writeq(val64, &bar0->tx_w_round_robin_1);
		val64 = 0x0203000100000102ULL;
		writeq(val64, &bar0->tx_w_round_robin_2);
		val64 = 0x0304000102030405ULL;
		writeq(val64, &bar0->tx_w_round_robin_3);
		val64 = 0x0001000200000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 7:
		val64 = 0x0001020001020300ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		val64 = 0x0102030400010203ULL;
		writeq(val64, &bar0->tx_w_round_robin_1);
		val64 = 0x0405060001020001ULL;
		writeq(val64, &bar0->tx_w_round_robin_2);
		val64 = 0x0304050000010200ULL;
		writeq(val64, &bar0->tx_w_round_robin_3);
		val64 = 0x0102030000000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 8:
		val64 = 0x0001020300040105ULL;
		writeq(val64, &bar0->tx_w_round_robin_0);
		val64 = 0x0200030106000204ULL;
		writeq(val64, &bar0->tx_w_round_robin_1);
		val64 = 0x0103000502010007ULL;
		writeq(val64, &bar0->tx_w_round_robin_2);
		val64 = 0x0304010002060500ULL;
		writeq(val64, &bar0->tx_w_round_robin_3);
		val64 = 0x0103020400000000ULL;
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	}

1342
	/* Enable all configured Tx FIFO partitions */
1343 1344 1345 1346
	val64 = readq(&bar0->tx_fifo_partition_0);
	val64 |= (TX_FIFO_PARTITION_EN);
	writeq(val64, &bar0->tx_fifo_partition_0);

1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391
	/* Filling the Rx round robin registers as per the
	 * number of Rings and steering based on QoS.
         */
	switch (config->rx_ring_num) {
	case 1:
		val64 = 0x8080808080808080ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 2:
		val64 = 0x0000010000010000ULL;
		writeq(val64, &bar0->rx_w_round_robin_0);
		val64 = 0x0100000100000100ULL;
		writeq(val64, &bar0->rx_w_round_robin_1);
		val64 = 0x0001000001000001ULL;
		writeq(val64, &bar0->rx_w_round_robin_2);
		val64 = 0x0000010000010000ULL;
		writeq(val64, &bar0->rx_w_round_robin_3);
		val64 = 0x0100000000000000ULL;
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080808040404040ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 3:
		val64 = 0x0001000102000001ULL;
		writeq(val64, &bar0->rx_w_round_robin_0);
		val64 = 0x0001020000010001ULL;
		writeq(val64, &bar0->rx_w_round_robin_1);
		val64 = 0x0200000100010200ULL;
		writeq(val64, &bar0->rx_w_round_robin_2);
		val64 = 0x0001000102000001ULL;
		writeq(val64, &bar0->rx_w_round_robin_3);
		val64 = 0x0001020000000000ULL;
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080804040402020ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 4:
		val64 = 0x0001020300010200ULL;
		writeq(val64, &bar0->rx_w_round_robin_0);
		val64 = 0x0100000102030001ULL;
		writeq(val64, &bar0->rx_w_round_robin_1);
		val64 = 0x0200010000010203ULL;
		writeq(val64, &bar0->rx_w_round_robin_2);
1392
		val64 = 0x0001020001000001ULL;
1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460
		writeq(val64, &bar0->rx_w_round_robin_3);
		val64 = 0x0203000100000000ULL;
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080404020201010ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 5:
		val64 = 0x0001000203000102ULL;
		writeq(val64, &bar0->rx_w_round_robin_0);
		val64 = 0x0001020001030004ULL;
		writeq(val64, &bar0->rx_w_round_robin_1);
		val64 = 0x0001000203000102ULL;
		writeq(val64, &bar0->rx_w_round_robin_2);
		val64 = 0x0001020001030004ULL;
		writeq(val64, &bar0->rx_w_round_robin_3);
		val64 = 0x0001000000000000ULL;
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080404020201008ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 6:
		val64 = 0x0001020304000102ULL;
		writeq(val64, &bar0->rx_w_round_robin_0);
		val64 = 0x0304050001020001ULL;
		writeq(val64, &bar0->rx_w_round_robin_1);
		val64 = 0x0203000100000102ULL;
		writeq(val64, &bar0->rx_w_round_robin_2);
		val64 = 0x0304000102030405ULL;
		writeq(val64, &bar0->rx_w_round_robin_3);
		val64 = 0x0001000200000000ULL;
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080404020100804ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 7:
		val64 = 0x0001020001020300ULL;
		writeq(val64, &bar0->rx_w_round_robin_0);
		val64 = 0x0102030400010203ULL;
		writeq(val64, &bar0->rx_w_round_robin_1);
		val64 = 0x0405060001020001ULL;
		writeq(val64, &bar0->rx_w_round_robin_2);
		val64 = 0x0304050000010200ULL;
		writeq(val64, &bar0->rx_w_round_robin_3);
		val64 = 0x0102030000000000ULL;
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080402010080402ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 8:
		val64 = 0x0001020300040105ULL;
		writeq(val64, &bar0->rx_w_round_robin_0);
		val64 = 0x0200030106000204ULL;
		writeq(val64, &bar0->rx_w_round_robin_1);
		val64 = 0x0103000502010007ULL;
		writeq(val64, &bar0->rx_w_round_robin_2);
		val64 = 0x0304010002060500ULL;
		writeq(val64, &bar0->rx_w_round_robin_3);
		val64 = 0x0103020400000000ULL;
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8040201008040201ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	}
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	/* UDP Fix */
	val64 = 0;
1464
	for (i = 0; i < 8; i++)
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		writeq(val64, &bar0->rts_frm_len_n[i]);

1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486
	/* Set the default rts frame length for the rings configured */
	val64 = MAC_RTS_FRM_LEN_SET(dev->mtu+22);
	for (i = 0 ; i < config->rx_ring_num ; i++)
		writeq(val64, &bar0->rts_frm_len_n[i]);

	/* Set the frame length for the configured rings
	 * desired by the user
	 */
	for (i = 0; i < config->rx_ring_num; i++) {
		/* If rts_frm_len[i] == 0 then it is assumed that user not
		 * specified frame length steering.
		 * If the user provides the frame length then program
		 * the rts_frm_len register for those values or else
		 * leave it as it is.
		 */
		if (rts_frm_len[i] != 0) {
			writeq(MAC_RTS_FRM_LEN_SET(rts_frm_len[i]),
				&bar0->rts_frm_len_n[i]);
		}
	}
1487

1488 1489 1490 1491 1492 1493 1494 1495 1496 1497
	/* Disable differentiated services steering logic */
	for (i = 0; i < 64; i++) {
		if (rts_ds_steer(nic, i, 0) == FAILURE) {
			DBG_PRINT(ERR_DBG, "%s: failed rts ds steering",
				dev->name);
			DBG_PRINT(ERR_DBG, "set on codepoint %d\n", i);
			return FAILURE;
		}
	}

1498
	/* Program statistics memory */
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	writeq(mac_control->stats_mem_phy, &bar0->stat_addr);

1501 1502 1503 1504 1505
	if (nic->device_type == XFRAME_II_DEVICE) {
		val64 = STAT_BC(0x320);
		writeq(val64, &bar0->stat_byte_cnt);
	}

1506
	/*
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	 * Initializing the sampling rate for the device to calculate the
	 * bandwidth utilization.
	 */
	val64 = MAC_TX_LINK_UTIL_VAL(tmac_util_period) |
	    MAC_RX_LINK_UTIL_VAL(rmac_util_period);
	writeq(val64, &bar0->mac_link_util);


1515 1516
	/*
	 * Initializing the Transmit and Receive Traffic Interrupt
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	 * Scheme.
	 */
1519 1520
	/*
	 * TTI Initialization. Default Tx timer gets us about
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	 * 250 interrupts per sec. Continuous interrupts are enabled
	 * by default.
	 */
1524 1525 1526 1527 1528 1529 1530 1531
	if (nic->device_type == XFRAME_II_DEVICE) {
		int count = (nic->config.bus_speed * 125)/2;
		val64 = TTI_DATA1_MEM_TX_TIMER_VAL(count);
	} else {

		val64 = TTI_DATA1_MEM_TX_TIMER_VAL(0x2078);
	}
	val64 |= TTI_DATA1_MEM_TX_URNG_A(0xA) |
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	    TTI_DATA1_MEM_TX_URNG_B(0x10) |
1533
	    TTI_DATA1_MEM_TX_URNG_C(0x30) | TTI_DATA1_MEM_TX_TIMER_AC_EN;
1534 1535
		if (use_continuous_tx_intrs)
			val64 |= TTI_DATA1_MEM_TX_TIMER_CI_EN;
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	writeq(val64, &bar0->tti_data1_mem);

	val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
	    TTI_DATA2_MEM_TX_UFC_B(0x20) |
1540
	    TTI_DATA2_MEM_TX_UFC_C(0x40) | TTI_DATA2_MEM_TX_UFC_D(0x80);
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	writeq(val64, &bar0->tti_data2_mem);

	val64 = TTI_CMD_MEM_WE | TTI_CMD_MEM_STROBE_NEW_CMD;
	writeq(val64, &bar0->tti_command_mem);

1546
	/*
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	 * Once the operation completes, the Strobe bit of the command
	 * register will be reset. We poll for this particular condition
	 * We wait for a maximum of 500ms for the operation to complete,
	 * if it's not complete by then we return error.
	 */
	time = 0;
	while (TRUE) {
		val64 = readq(&bar0->tti_command_mem);
		if (!(val64 & TTI_CMD_MEM_STROBE_NEW_CMD)) {
			break;
		}
		if (time > 10) {
			DBG_PRINT(ERR_DBG, "%s: TTI init Failed\n",
				  dev->name);
			return -1;
		}
		msleep(50);
		time++;
	}

1567 1568
	/* RTI Initialization */
	if (nic->device_type == XFRAME_II_DEVICE) {
1569
		/*
1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591
		 * Programmed to generate Apprx 500 Intrs per
		 * second
		 */
		int count = (nic->config.bus_speed * 125)/4;
		val64 = RTI_DATA1_MEM_RX_TIMER_VAL(count);
	} else
		val64 = RTI_DATA1_MEM_RX_TIMER_VAL(0xFFF);
	val64 |= RTI_DATA1_MEM_RX_URNG_A(0xA) |
		 RTI_DATA1_MEM_RX_URNG_B(0x10) |
		 RTI_DATA1_MEM_RX_URNG_C(0x30) | RTI_DATA1_MEM_RX_TIMER_AC_EN;

	writeq(val64, &bar0->rti_data1_mem);

	val64 = RTI_DATA2_MEM_RX_UFC_A(0x1) |
		RTI_DATA2_MEM_RX_UFC_B(0x2) ;
	if (nic->config.intr_type == MSI_X)
	    val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x20) | \
			RTI_DATA2_MEM_RX_UFC_D(0x40));
	else
	    val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x40) | \
			RTI_DATA2_MEM_RX_UFC_D(0x80));
	writeq(val64, &bar0->rti_data2_mem);
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1593 1594 1595 1596
	for (i = 0; i < config->rx_ring_num; i++) {
		val64 = RTI_CMD_MEM_WE | RTI_CMD_MEM_STROBE_NEW_CMD
				| RTI_CMD_MEM_OFFSET(i);
		writeq(val64, &bar0->rti_command_mem);
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1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609
		/*
		 * Once the operation completes, the Strobe bit of the
		 * command register will be reset. We poll for this
		 * particular condition. We wait for a maximum of 500ms
		 * for the operation to complete, if it's not complete
		 * by then we return error.
		 */
		time = 0;
		while (TRUE) {
			val64 = readq(&bar0->rti_command_mem);
			if (!(val64 & RTI_CMD_MEM_STROBE_NEW_CMD))
				break;
1610

1611 1612 1613 1614
			if (time > 10) {
				DBG_PRINT(ERR_DBG, "%s: RTI init Failed\n",
					  dev->name);
				return -1;
1615
			}
1616 1617
			time++;
			msleep(50);
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		}
	}

1621 1622
	/*
	 * Initializing proper values as Pause threshold into all
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	 * the 8 Queues on Rx side.
	 */
	writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q0q3);
	writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q4q7);

	/* Disable RMAC PAD STRIPPING */
1629
	add = &bar0->mac_cfg;
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	val64 = readq(&bar0->mac_cfg);
	val64 &= ~(MAC_CFG_RMAC_STRIP_PAD);
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) (val64), add);
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) (val64 >> 32), (add + 4));
	val64 = readq(&bar0->mac_cfg);

1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650
	/* Enable FCS stripping by adapter */
	add = &bar0->mac_cfg;
	val64 = readq(&bar0->mac_cfg);
	val64 |= MAC_CFG_RMAC_STRIP_FCS;
	if (nic->device_type == XFRAME_II_DEVICE)
		writeq(val64, &bar0->mac_cfg);
	else {
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64), add);
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64 >> 32), (add + 4));
	}

1651 1652
	/*
	 * Set the time value to be inserted in the pause frame
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	 * generated by xena.
	 */
	val64 = readq(&bar0->rmac_pause_cfg);
	val64 &= ~(RMAC_PAUSE_HG_PTIME(0xffff));
	val64 |= RMAC_PAUSE_HG_PTIME(nic->mac_control.rmac_pause_time);
	writeq(val64, &bar0->rmac_pause_cfg);

1660
	/*
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	 * Set the Threshold Limit for Generating the pause frame
	 * If the amount of data in any Queue exceeds ratio of
	 * (mac_control.mc_pause_threshold_q0q3 or q4q7)/256
	 * pause frame is generated
	 */
	val64 = 0;
	for (i = 0; i < 4; i++) {
		val64 |=
		    (((u64) 0xFF00 | nic->mac_control.
		      mc_pause_threshold_q0q3)
		     << (i * 2 * 8));
	}
	writeq(val64, &bar0->mc_pause_thresh_q0q3);

	val64 = 0;
	for (i = 0; i < 4; i++) {
		val64 |=
		    (((u64) 0xFF00 | nic->mac_control.
		      mc_pause_threshold_q4q7)
		     << (i * 2 * 8));
	}
	writeq(val64, &bar0->mc_pause_thresh_q4q7);

1684 1685
	/*
	 * TxDMA will stop Read request if the number of read split has
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	 * exceeded the limit pointed by shared_splits
	 */
	val64 = readq(&bar0->pic_control);
	val64 |= PIC_CNTL_SHARED_SPLITS(shared_splits);
	writeq(val64, &bar0->pic_control);

1692 1693 1694 1695 1696 1697
	if (nic->config.bus_speed == 266) {
		writeq(TXREQTO_VAL(0x7f) | TXREQTO_EN, &bar0->txreqtimeout);
		writeq(0x0, &bar0->read_retry_delay);
		writeq(0x0, &bar0->write_retry_delay);
	}

1698 1699 1700 1701 1702
	/*
	 * Programming the Herc to split every write transaction
	 * that does not start on an ADB to reduce disconnects.
	 */
	if (nic->device_type == XFRAME_II_DEVICE) {
1703 1704
		val64 = FAULT_BEHAVIOUR | EXT_REQ_EN |
			MISC_LINK_STABILITY_PRD(3);
1705 1706 1707 1708
		writeq(val64, &bar0->misc_control);
		val64 = readq(&bar0->pic_control2);
		val64 &= ~(BIT(13)|BIT(14)|BIT(15));
		writeq(val64, &bar0->pic_control2);
1709
	}
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	if (strstr(nic->product_name, "CX4")) {
		val64 = TMAC_AVG_IPG(0x17);
		writeq(val64, &bar0->tmac_avg_ipg);
1713 1714
	}

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	return SUCCESS;
}
1717 1718 1719
#define LINK_UP_DOWN_INTERRUPT		1
#define MAC_RMAC_ERR_TIMER		2

R
Ralf Baechle 已提交
1720
static int s2io_link_fault_indication(struct s2io_nic *nic)
1721
{
1722
	if (nic->config.intr_type != INTA)
1723
		return MAC_RMAC_ERR_TIMER;
1724 1725 1726 1727 1728
	if (nic->device_type == XFRAME_II_DEVICE)
		return LINK_UP_DOWN_INTERRUPT;
	else
		return MAC_RMAC_ERR_TIMER;
}
1729

1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750
/**
 *  do_s2io_write_bits -  update alarm bits in alarm register
 *  @value: alarm bits
 *  @flag: interrupt status
 *  @addr: address value
 *  Description: update alarm bits in alarm register
 *  Return Value:
 *  NONE.
 */
static void do_s2io_write_bits(u64 value, int flag, void __iomem *addr)
{
	u64 temp64;

	temp64 = readq(addr);

	if(flag == ENABLE_INTRS)
		temp64 &= ~((u64) value);
	else
		temp64 |= ((u64) value);
	writeq(temp64, addr);
}
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1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873
void en_dis_err_alarms(struct s2io_nic *nic, u16 mask, int flag)
{
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
	register u64 gen_int_mask = 0;

	if (mask & TX_DMA_INTR) {

		gen_int_mask |= TXDMA_INT_M;

		do_s2io_write_bits(TXDMA_TDA_INT | TXDMA_PFC_INT |
				TXDMA_PCC_INT | TXDMA_TTI_INT |
				TXDMA_LSO_INT | TXDMA_TPA_INT |
				TXDMA_SM_INT, flag, &bar0->txdma_int_mask);

		do_s2io_write_bits(PFC_ECC_DB_ERR | PFC_SM_ERR_ALARM |
				PFC_MISC_0_ERR | PFC_MISC_1_ERR |
				PFC_PCIX_ERR | PFC_ECC_SG_ERR, flag,
				&bar0->pfc_err_mask);

		do_s2io_write_bits(TDA_Fn_ECC_DB_ERR | TDA_SM0_ERR_ALARM |
				TDA_SM1_ERR_ALARM | TDA_Fn_ECC_SG_ERR |
				TDA_PCIX_ERR, flag, &bar0->tda_err_mask);

		do_s2io_write_bits(PCC_FB_ECC_DB_ERR | PCC_TXB_ECC_DB_ERR |
				PCC_SM_ERR_ALARM | PCC_WR_ERR_ALARM |
				PCC_N_SERR | PCC_6_COF_OV_ERR |
				PCC_7_COF_OV_ERR | PCC_6_LSO_OV_ERR |
				PCC_7_LSO_OV_ERR | PCC_FB_ECC_SG_ERR |
				PCC_TXB_ECC_SG_ERR, flag, &bar0->pcc_err_mask);

		do_s2io_write_bits(TTI_SM_ERR_ALARM | TTI_ECC_SG_ERR |
				TTI_ECC_DB_ERR, flag, &bar0->tti_err_mask);

		do_s2io_write_bits(LSO6_ABORT | LSO7_ABORT |
				LSO6_SM_ERR_ALARM | LSO7_SM_ERR_ALARM |
				LSO6_SEND_OFLOW | LSO7_SEND_OFLOW,
				flag, &bar0->lso_err_mask);

		do_s2io_write_bits(TPA_SM_ERR_ALARM | TPA_TX_FRM_DROP,
				flag, &bar0->tpa_err_mask);

		do_s2io_write_bits(SM_SM_ERR_ALARM, flag, &bar0->sm_err_mask);

	}

	if (mask & TX_MAC_INTR) {
		gen_int_mask |= TXMAC_INT_M;
		do_s2io_write_bits(MAC_INT_STATUS_TMAC_INT, flag,
				&bar0->mac_int_mask);
		do_s2io_write_bits(TMAC_TX_BUF_OVRN | TMAC_TX_SM_ERR |
				TMAC_ECC_SG_ERR | TMAC_ECC_DB_ERR |
				TMAC_DESC_ECC_SG_ERR | TMAC_DESC_ECC_DB_ERR,
				flag, &bar0->mac_tmac_err_mask);
	}

	if (mask & TX_XGXS_INTR) {
		gen_int_mask |= TXXGXS_INT_M;
		do_s2io_write_bits(XGXS_INT_STATUS_TXGXS, flag,
				&bar0->xgxs_int_mask);
		do_s2io_write_bits(TXGXS_ESTORE_UFLOW | TXGXS_TX_SM_ERR |
				TXGXS_ECC_SG_ERR | TXGXS_ECC_DB_ERR,
				flag, &bar0->xgxs_txgxs_err_mask);
	}

	if (mask & RX_DMA_INTR) {
		gen_int_mask |= RXDMA_INT_M;
		do_s2io_write_bits(RXDMA_INT_RC_INT_M | RXDMA_INT_RPA_INT_M |
				RXDMA_INT_RDA_INT_M | RXDMA_INT_RTI_INT_M,
				flag, &bar0->rxdma_int_mask);
		do_s2io_write_bits(RC_PRCn_ECC_DB_ERR | RC_FTC_ECC_DB_ERR |
				RC_PRCn_SM_ERR_ALARM | RC_FTC_SM_ERR_ALARM |
				RC_PRCn_ECC_SG_ERR | RC_FTC_ECC_SG_ERR |
				RC_RDA_FAIL_WR_Rn, flag, &bar0->rc_err_mask);
		do_s2io_write_bits(PRC_PCI_AB_RD_Rn | PRC_PCI_AB_WR_Rn |
				PRC_PCI_AB_F_WR_Rn | PRC_PCI_DP_RD_Rn |
				PRC_PCI_DP_WR_Rn | PRC_PCI_DP_F_WR_Rn, flag,
				&bar0->prc_pcix_err_mask);
		do_s2io_write_bits(RPA_SM_ERR_ALARM | RPA_CREDIT_ERR |
				RPA_ECC_SG_ERR | RPA_ECC_DB_ERR, flag,
				&bar0->rpa_err_mask);
		do_s2io_write_bits(RDA_RXDn_ECC_DB_ERR | RDA_FRM_ECC_DB_N_AERR |
				RDA_SM1_ERR_ALARM | RDA_SM0_ERR_ALARM |
				RDA_RXD_ECC_DB_SERR | RDA_RXDn_ECC_SG_ERR |
				RDA_FRM_ECC_SG_ERR | RDA_MISC_ERR|RDA_PCIX_ERR,
				flag, &bar0->rda_err_mask);
		do_s2io_write_bits(RTI_SM_ERR_ALARM |
				RTI_ECC_SG_ERR | RTI_ECC_DB_ERR,
				flag, &bar0->rti_err_mask);
	}

	if (mask & RX_MAC_INTR) {
		gen_int_mask |= RXMAC_INT_M;
		do_s2io_write_bits(MAC_INT_STATUS_RMAC_INT, flag,
				&bar0->mac_int_mask);
		do_s2io_write_bits(RMAC_RX_BUFF_OVRN | RMAC_RX_SM_ERR |
				RMAC_UNUSED_INT | RMAC_SINGLE_ECC_ERR |
				RMAC_DOUBLE_ECC_ERR |
				RMAC_LINK_STATE_CHANGE_INT,
				flag, &bar0->mac_rmac_err_mask);
	}

	if (mask & RX_XGXS_INTR)
	{
		gen_int_mask |= RXXGXS_INT_M;
		do_s2io_write_bits(XGXS_INT_STATUS_RXGXS, flag,
				&bar0->xgxs_int_mask);
		do_s2io_write_bits(RXGXS_ESTORE_OFLOW | RXGXS_RX_SM_ERR, flag,
				&bar0->xgxs_rxgxs_err_mask);
	}

	if (mask & MC_INTR) {
		gen_int_mask |= MC_INT_M;
		do_s2io_write_bits(MC_INT_MASK_MC_INT, flag, &bar0->mc_int_mask);
		do_s2io_write_bits(MC_ERR_REG_SM_ERR | MC_ERR_REG_ECC_ALL_SNG |
				MC_ERR_REG_ECC_ALL_DBL | PLL_LOCK_N, flag,
				&bar0->mc_err_mask);
	}
	nic->general_int_mask = gen_int_mask;

	/* Remove this line when alarm interrupts are enabled */
	nic->general_int_mask = 0;
}
1874 1875
/**
 *  en_dis_able_nic_intrs - Enable or Disable the interrupts
L
Linus Torvalds 已提交
1876 1877 1878 1879
 *  @nic: device private variable,
 *  @mask: A mask indicating which Intr block must be modified and,
 *  @flag: A flag indicating whether to enable or disable the Intrs.
 *  Description: This function will either disable or enable the interrupts
1880 1881
 *  depending on the flag argument. The mask argument can be used to
 *  enable/disable any Intr block.
L
Linus Torvalds 已提交
1882 1883 1884 1885 1886
 *  Return Value: NONE.
 */

static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
{
R
Ralf Baechle 已提交
1887
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
1888 1889 1890
	register u64 temp64 = 0, intr_mask = 0;

	intr_mask = nic->general_int_mask;
L
Linus Torvalds 已提交
1891 1892 1893

	/*  Top level interrupt classification */
	/*  PIC Interrupts */
1894
	if (mask & TX_PIC_INTR) {
L
Linus Torvalds 已提交
1895
		/*  Enable PIC Intrs in the general intr mask register */
1896
		intr_mask |= TXPIC_INT_M;
L
Linus Torvalds 已提交
1897
		if (flag == ENABLE_INTRS) {
1898
			/*
1899
			 * If Hercules adapter enable GPIO otherwise
1900
			 * disable all PCIX, Flash, MDIO, IIC and GPIO
1901 1902
			 * interrupts for now.
			 * TODO
L
Linus Torvalds 已提交
1903
			 */
1904 1905
			if (s2io_link_fault_indication(nic) ==
					LINK_UP_DOWN_INTERRUPT ) {
1906 1907 1908 1909 1910
				do_s2io_write_bits(PIC_INT_GPIO, flag,
						&bar0->pic_int_mask);
				do_s2io_write_bits(GPIO_INT_MASK_LINK_UP, flag,
						&bar0->gpio_int_mask);
			} else
1911
				writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
L
Linus Torvalds 已提交
1912
		} else if (flag == DISABLE_INTRS) {
1913 1914 1915
			/*
			 * Disable PIC Intrs in the general
			 * intr mask register
L
Linus Torvalds 已提交
1916 1917 1918 1919 1920 1921 1922
			 */
			writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
		}
	}

	/*  Tx traffic interrupts */
	if (mask & TX_TRAFFIC_INTR) {
1923
		intr_mask |= TXTRAFFIC_INT_M;
L
Linus Torvalds 已提交
1924
		if (flag == ENABLE_INTRS) {
1925
			/*
L
Linus Torvalds 已提交
1926
			 * Enable all the Tx side interrupts
1927
			 * writing 0 Enables all 64 TX interrupt levels
L
Linus Torvalds 已提交
1928 1929 1930
			 */
			writeq(0x0, &bar0->tx_traffic_mask);
		} else if (flag == DISABLE_INTRS) {
1931 1932
			/*
			 * Disable Tx Traffic Intrs in the general intr mask
L
Linus Torvalds 已提交
1933 1934 1935 1936 1937 1938 1939 1940
			 * register.
			 */
			writeq(DISABLE_ALL_INTRS, &bar0->tx_traffic_mask);
		}
	}

	/*  Rx traffic interrupts */
	if (mask & RX_TRAFFIC_INTR) {
1941
		intr_mask |= RXTRAFFIC_INT_M;
L
Linus Torvalds 已提交
1942 1943 1944 1945
		if (flag == ENABLE_INTRS) {
			/* writing 0 Enables all 8 RX interrupt levels */
			writeq(0x0, &bar0->rx_traffic_mask);
		} else if (flag == DISABLE_INTRS) {
1946 1947
			/*
			 * Disable Rx Traffic Intrs in the general intr mask
L
Linus Torvalds 已提交
1948 1949 1950 1951 1952
			 * register.
			 */
			writeq(DISABLE_ALL_INTRS, &bar0->rx_traffic_mask);
		}
	}
1953 1954 1955 1956 1957 1958 1959 1960 1961

	temp64 = readq(&bar0->general_int_mask);
	if (flag == ENABLE_INTRS)
		temp64 &= ~((u64) intr_mask);
	else
		temp64 = DISABLE_ALL_INTRS;
	writeq(temp64, &bar0->general_int_mask);

	nic->general_int_mask = readq(&bar0->general_int_mask);
L
Linus Torvalds 已提交
1962 1963
}

1964 1965 1966 1967 1968
/**
 *  verify_pcc_quiescent- Checks for PCC quiescent state
 *  Return: 1 If PCC is quiescence
 *          0 If PCC is not quiescence
 */
R
Ralf Baechle 已提交
1969
static int verify_pcc_quiescent(struct s2io_nic *sp, int flag)
1970
{
1971
	int ret = 0, herc;
R
Ralf Baechle 已提交
1972
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
1973
	u64 val64 = readq(&bar0->adapter_status);
1974

1975
	herc = (sp->device_type == XFRAME_II_DEVICE);
1976 1977

	if (flag == FALSE) {
1978
		if ((!herc && (sp->pdev->revision >= 4)) || herc) {
1979
			if (!(val64 & ADAPTER_STATUS_RMAC_PCC_IDLE))
1980
				ret = 1;
1981 1982
		} else {
			if (!(val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE))
1983
				ret = 1;
1984 1985
		}
	} else {
1986
		if ((!herc && (sp->pdev->revision >= 4)) || herc) {
1987
			if (((val64 & ADAPTER_STATUS_RMAC_PCC_IDLE) ==
1988
			     ADAPTER_STATUS_RMAC_PCC_IDLE))
1989 1990 1991
				ret = 1;
		} else {
			if (((val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE) ==
1992
			     ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE))
1993
				ret = 1;
1994 1995 1996 1997 1998 1999 2000
		}
	}

	return ret;
}
/**
 *  verify_xena_quiescence - Checks whether the H/W is ready
L
Linus Torvalds 已提交
2001
 *  Description: Returns whether the H/W is ready to go or not. Depending
2002
 *  on whether adapter enable bit was written or not the comparison
L
Linus Torvalds 已提交
2003 2004
 *  differs and the calling function passes the input argument flag to
 *  indicate this.
2005
 *  Return: 1 If xena is quiescence
L
Linus Torvalds 已提交
2006 2007 2008
 *          0 If Xena is not quiescence
 */

R
Ralf Baechle 已提交
2009
static int verify_xena_quiescence(struct s2io_nic *sp)
L
Linus Torvalds 已提交
2010
{
2011
	int  mode;
R
Ralf Baechle 已提交
2012
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
2013 2014
	u64 val64 = readq(&bar0->adapter_status);
	mode = s2io_verify_pci_mode(sp);
L
Linus Torvalds 已提交
2015

2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046
	if (!(val64 & ADAPTER_STATUS_TDMA_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "TDMA is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_RDMA_READY)) {
	DBG_PRINT(ERR_DBG, "%s", "RDMA is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_PFC_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "PFC is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_TMAC_BUF_EMPTY)) {
		DBG_PRINT(ERR_DBG, "%s", "TMAC BUF is not empty!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_PIC_QUIESCENT)) {
		DBG_PRINT(ERR_DBG, "%s", "PIC is not QUIESCENT!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_MC_DRAM_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "MC_DRAM is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_MC_QUEUES_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "MC_QUEUES is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_M_PLL_LOCK)) {
		DBG_PRINT(ERR_DBG, "%s", "M_PLL is not locked!");
		return 0;
L
Linus Torvalds 已提交
2047 2048
	}

2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065
	/*
	 * In PCI 33 mode, the P_PLL is not used, and therefore,
	 * the the P_PLL_LOCK bit in the adapter_status register will
	 * not be asserted.
	 */
	if (!(val64 & ADAPTER_STATUS_P_PLL_LOCK) &&
		sp->device_type == XFRAME_II_DEVICE && mode !=
		PCI_MODE_PCI_33) {
		DBG_PRINT(ERR_DBG, "%s", "P_PLL is not locked!");
		return 0;
	}
	if (!((val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ==
			ADAPTER_STATUS_RC_PRC_QUIESCENT)) {
		DBG_PRINT(ERR_DBG, "%s", "RC_PRC is not QUIESCENT!");
		return 0;
	}
	return 1;
L
Linus Torvalds 已提交
2066 2067 2068 2069 2070
}

/**
 * fix_mac_address -  Fix for Mac addr problem on Alpha platforms
 * @sp: Pointer to device specifc structure
2071
 * Description :
L
Linus Torvalds 已提交
2072 2073 2074 2075
 * New procedure to clear mac address reading  problems on Alpha platforms
 *
 */

R
Ralf Baechle 已提交
2076
static void fix_mac_address(struct s2io_nic * sp)
L
Linus Torvalds 已提交
2077
{
R
Ralf Baechle 已提交
2078
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
2079 2080 2081 2082 2083
	u64 val64;
	int i = 0;

	while (fix_mac[i] != END_SIGN) {
		writeq(fix_mac[i++], &bar0->gpio_control);
2084
		udelay(10);
L
Linus Torvalds 已提交
2085 2086 2087 2088 2089
		val64 = readq(&bar0->gpio_control);
	}
}

/**
2090
 *  start_nic - Turns the device on
L
Linus Torvalds 已提交
2091
 *  @nic : device private variable.
2092 2093 2094 2095
 *  Description:
 *  This function actually turns the device on. Before this  function is
 *  called,all Registers are configured from their reset states
 *  and shared memory is allocated but the NIC is still quiescent. On
L
Linus Torvalds 已提交
2096 2097
 *  calling this function, the device interrupts are cleared and the NIC is
 *  literally switched on by writing into the adapter control register.
2098
 *  Return Value:
L
Linus Torvalds 已提交
2099 2100 2101 2102 2103
 *  SUCCESS on success and -1 on failure.
 */

static int start_nic(struct s2io_nic *nic)
{
R
Ralf Baechle 已提交
2104
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
L
Linus Torvalds 已提交
2105 2106
	struct net_device *dev = nic->dev;
	register u64 val64 = 0;
2107
	u16 subid, i;
R
Ralf Baechle 已提交
2108
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2109 2110 2111 2112 2113 2114 2115
	struct config_param *config;

	mac_control = &nic->mac_control;
	config = &nic->config;

	/*  PRC Initialization and configuration */
	for (i = 0; i < config->rx_ring_num; i++) {
2116
		writeq((u64) mac_control->rings[i].rx_blocks[0].block_dma_addr,
L
Linus Torvalds 已提交
2117 2118 2119
		       &bar0->prc_rxd0_n[i]);

		val64 = readq(&bar0->prc_ctrl_n[i]);
2120 2121 2122 2123
		if (nic->rxd_mode == RXD_MODE_1)
			val64 |= PRC_CTRL_RC_ENABLED;
		else
			val64 |= PRC_CTRL_RC_ENABLED | PRC_CTRL_RING_MODE_3;
2124 2125 2126 2127
		if (nic->device_type == XFRAME_II_DEVICE)
			val64 |= PRC_CTRL_GROUP_READS;
		val64 &= ~PRC_CTRL_RXD_BACKOFF_INTERVAL(0xFFFFFF);
		val64 |= PRC_CTRL_RXD_BACKOFF_INTERVAL(0x1000);
L
Linus Torvalds 已提交
2128 2129 2130
		writeq(val64, &bar0->prc_ctrl_n[i]);
	}

2131 2132 2133 2134 2135 2136
	if (nic->rxd_mode == RXD_MODE_3B) {
		/* Enabling 2 buffer mode by writing into Rx_pa_cfg reg. */
		val64 = readq(&bar0->rx_pa_cfg);
		val64 |= RX_PA_CFG_IGNORE_L2_ERR;
		writeq(val64, &bar0->rx_pa_cfg);
	}
L
Linus Torvalds 已提交
2137

2138 2139 2140 2141 2142 2143 2144
	if (vlan_tag_strip == 0) {
		val64 = readq(&bar0->rx_pa_cfg);
		val64 &= ~RX_PA_CFG_STRIP_VLAN_TAG;
		writeq(val64, &bar0->rx_pa_cfg);
		vlan_strip_flag = 0;
	}

2145
	/*
L
Linus Torvalds 已提交
2146 2147 2148 2149 2150 2151 2152 2153 2154
	 * Enabling MC-RLDRAM. After enabling the device, we timeout
	 * for around 100ms, which is approximately the time required
	 * for the device to be ready for operation.
	 */
	val64 = readq(&bar0->mc_rldram_mrs);
	val64 |= MC_RLDRAM_QUEUE_SIZE_ENABLE | MC_RLDRAM_MRS_ENABLE;
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);
	val64 = readq(&bar0->mc_rldram_mrs);

2155
	msleep(100);	/* Delay by around 100 ms. */
L
Linus Torvalds 已提交
2156 2157 2158 2159 2160 2161

	/* Enabling ECC Protection. */
	val64 = readq(&bar0->adapter_control);
	val64 &= ~ADAPTER_ECC_EN;
	writeq(val64, &bar0->adapter_control);

2162 2163
	/*
	 * Verify if the device is ready to be enabled, if so enable
L
Linus Torvalds 已提交
2164 2165 2166
	 * it.
	 */
	val64 = readq(&bar0->adapter_status);
2167
	if (!verify_xena_quiescence(nic)) {
L
Linus Torvalds 已提交
2168 2169 2170 2171 2172 2173
		DBG_PRINT(ERR_DBG, "%s: device is not ready, ", dev->name);
		DBG_PRINT(ERR_DBG, "Adapter status reads: 0x%llx\n",
			  (unsigned long long) val64);
		return FAILURE;
	}

2174
	/*
L
Linus Torvalds 已提交
2175
	 * With some switches, link might be already up at this point.
2176 2177 2178 2179
	 * Because of this weird behavior, when we enable laser,
	 * we may not get link. We need to handle this. We cannot
	 * figure out which switch is misbehaving. So we are forced to
	 * make a global change.
L
Linus Torvalds 已提交
2180 2181 2182 2183 2184 2185 2186
	 */

	/* Enabling Laser. */
	val64 = readq(&bar0->adapter_control);
	val64 |= ADAPTER_EOI_TX_ON;
	writeq(val64, &bar0->adapter_control);

A
Ananda Raju 已提交
2187 2188 2189 2190 2191 2192 2193
	if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
		/*
		 * Dont see link state interrupts initally on some switches,
		 * so directly scheduling the link state task here.
		 */
		schedule_work(&nic->set_link_task);
	}
L
Linus Torvalds 已提交
2194 2195
	/* SXE-002: Initialize link and activity LED */
	subid = nic->pdev->subsystem_device;
2196 2197
	if (((subid & 0xFF) >= 0x07) &&
	    (nic->device_type == XFRAME_I_DEVICE)) {
L
Linus Torvalds 已提交
2198 2199 2200 2201
		val64 = readq(&bar0->gpio_control);
		val64 |= 0x0000800000000000ULL;
		writeq(val64, &bar0->gpio_control);
		val64 = 0x0411040400000000ULL;
2202
		writeq(val64, (void __iomem *)bar0 + 0x2700);
L
Linus Torvalds 已提交
2203 2204 2205 2206
	}

	return SUCCESS;
}
A
Ananda Raju 已提交
2207 2208 2209
/**
 * s2io_txdl_getskb - Get the skb from txdl, unmap and return skb
 */
R
Ralf Baechle 已提交
2210 2211
static struct sk_buff *s2io_txdl_getskb(struct fifo_info *fifo_data, struct \
					TxD *txdlp, int get_off)
A
Ananda Raju 已提交
2212
{
R
Ralf Baechle 已提交
2213
	struct s2io_nic *nic = fifo_data->nic;
A
Ananda Raju 已提交
2214
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2215
	struct TxD *txds;
A
Ananda Raju 已提交
2216 2217 2218
	u16 j, frg_cnt;

	txds = txdlp;
2219
	if (txds->Host_Control == (u64)(long)nic->ufo_in_band_v) {
A
Ananda Raju 已提交
2220 2221 2222 2223 2224 2225 2226 2227 2228
		pci_unmap_single(nic->pdev, (dma_addr_t)
			txds->Buffer_Pointer, sizeof(u64),
			PCI_DMA_TODEVICE);
		txds++;
	}

	skb = (struct sk_buff *) ((unsigned long)
			txds->Host_Control);
	if (!skb) {
R
Ralf Baechle 已提交
2229
		memset(txdlp, 0, (sizeof(struct TxD) * fifo_data->max_txds));
A
Ananda Raju 已提交
2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242
		return NULL;
	}
	pci_unmap_single(nic->pdev, (dma_addr_t)
			 txds->Buffer_Pointer,
			 skb->len - skb->data_len,
			 PCI_DMA_TODEVICE);
	frg_cnt = skb_shinfo(skb)->nr_frags;
	if (frg_cnt) {
		txds++;
		for (j = 0; j < frg_cnt; j++, txds++) {
			skb_frag_t *frag = &skb_shinfo(skb)->frags[j];
			if (!txds->Buffer_Pointer)
				break;
2243
			pci_unmap_page(nic->pdev, (dma_addr_t)
A
Ananda Raju 已提交
2244 2245 2246 2247
					txds->Buffer_Pointer,
				       frag->size, PCI_DMA_TODEVICE);
		}
	}
R
Ralf Baechle 已提交
2248
	memset(txdlp,0, (sizeof(struct TxD) * fifo_data->max_txds));
A
Ananda Raju 已提交
2249 2250
	return(skb);
}
L
Linus Torvalds 已提交
2251

2252 2253
/**
 *  free_tx_buffers - Free all queued Tx buffers
L
Linus Torvalds 已提交
2254
 *  @nic : device private variable.
2255
 *  Description:
L
Linus Torvalds 已提交
2256
 *  Free all queued Tx buffers.
2257
 *  Return Value: void
L
Linus Torvalds 已提交
2258 2259 2260 2261 2262 2263
*/

static void free_tx_buffers(struct s2io_nic *nic)
{
	struct net_device *dev = nic->dev;
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2264
	struct TxD *txdp;
L
Linus Torvalds 已提交
2265
	int i, j;
R
Ralf Baechle 已提交
2266
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2267
	struct config_param *config;
A
Ananda Raju 已提交
2268
	int cnt = 0;
L
Linus Torvalds 已提交
2269 2270 2271 2272 2273 2274

	mac_control = &nic->mac_control;
	config = &nic->config;

	for (i = 0; i < config->tx_fifo_num; i++) {
		for (j = 0; j < config->tx_cfg[i].fifo_len - 1; j++) {
2275 2276
			txdp = (struct TxD *) \
			mac_control->fifos[i].list_info[j].list_virt_addr;
A
Ananda Raju 已提交
2277 2278
			skb = s2io_txdl_getskb(&mac_control->fifos[i], txdp, j);
			if (skb) {
2279
				nic->mac_control.stats_info->sw_stat.mem_freed
2280
					+= skb->truesize;
A
Ananda Raju 已提交
2281 2282
				dev_kfree_skb(skb);
				cnt++;
L
Linus Torvalds 已提交
2283 2284 2285 2286 2287
			}
		}
		DBG_PRINT(INTR_DBG,
			  "%s:forcibly freeing %d skbs on FIFO%d\n",
			  dev->name, cnt, i);
2288 2289
		mac_control->fifos[i].tx_curr_get_info.offset = 0;
		mac_control->fifos[i].tx_curr_put_info.offset = 0;
L
Linus Torvalds 已提交
2290 2291 2292
	}
}

2293 2294
/**
 *   stop_nic -  To stop the nic
L
Linus Torvalds 已提交
2295
 *   @nic ; device private variable.
2296 2297
 *   Description:
 *   This function does exactly the opposite of what the start_nic()
L
Linus Torvalds 已提交
2298 2299 2300 2301 2302 2303 2304
 *   function does. This function is called to stop the device.
 *   Return Value:
 *   void.
 */

static void stop_nic(struct s2io_nic *nic)
{
R
Ralf Baechle 已提交
2305
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
L
Linus Torvalds 已提交
2306
	register u64 val64 = 0;
2307
	u16 interruptible;
R
Ralf Baechle 已提交
2308
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2309 2310 2311 2312 2313 2314
	struct config_param *config;

	mac_control = &nic->mac_control;
	config = &nic->config;

	/*  Disable all interrupts */
2315
	en_dis_err_alarms(nic, ENA_ALL_INTRS, DISABLE_INTRS);
2316
	interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
2317
	interruptible |= TX_PIC_INTR;
L
Linus Torvalds 已提交
2318 2319
	en_dis_able_nic_intrs(nic, interruptible, DISABLE_INTRS);

2320 2321 2322 2323
	/* Clearing Adapter_En bit of ADAPTER_CONTROL Register */
	val64 = readq(&bar0->adapter_control);
	val64 &= ~(ADAPTER_CNTL_EN);
	writeq(val64, &bar0->adapter_control);
L
Linus Torvalds 已提交
2324 2325
}

2326 2327
/**
 *  fill_rx_buffers - Allocates the Rx side skbs
L
Linus Torvalds 已提交
2328
 *  @nic:  device private variable
2329 2330
 *  @ring_no: ring number
 *  Description:
L
Linus Torvalds 已提交
2331 2332 2333 2334 2335 2336 2337
 *  The function allocates Rx side skbs and puts the physical
 *  address of these buffers into the RxD buffer pointers, so that the NIC
 *  can DMA the received frame into these locations.
 *  The NIC supports 3 receive modes, viz
 *  1. single buffer,
 *  2. three buffer and
 *  3. Five buffer modes.
2338 2339
 *  Each mode defines how many fragments the received frame will be split
 *  up into by the NIC. The frame is split into L3 header, L4 Header,
L
Linus Torvalds 已提交
2340 2341 2342 2343 2344 2345 2346
 *  L4 payload in three buffer mode and in 5 buffer mode, L4 payload itself
 *  is split into 3 fragments. As of now only single buffer mode is
 *  supported.
 *   Return Value:
 *  SUCCESS on success or an appropriate -ve value on failure.
 */

2347
static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
L
Linus Torvalds 已提交
2348 2349 2350
{
	struct net_device *dev = nic->dev;
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2351
	struct RxD_t *rxdp;
L
Linus Torvalds 已提交
2352 2353
	int off, off1, size, block_no, block_no1;
	u32 alloc_tab = 0;
2354
	u32 alloc_cnt;
R
Ralf Baechle 已提交
2355
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2356
	struct config_param *config;
2357
	u64 tmp;
R
Ralf Baechle 已提交
2358
	struct buffAdd *ba;
L
Linus Torvalds 已提交
2359
	unsigned long flags;
R
Ralf Baechle 已提交
2360
	struct RxD_t *first_rxdp = NULL;
2361
	u64 Buffer0_ptr = 0, Buffer1_ptr = 0;
2362 2363
	struct RxD1 *rxdp1;
	struct RxD3 *rxdp3;
2364
	struct swStat *stats = &nic->mac_control.stats_info->sw_stat;
L
Linus Torvalds 已提交
2365 2366 2367

	mac_control = &nic->mac_control;
	config = &nic->config;
2368 2369
	alloc_cnt = mac_control->rings[ring_no].pkt_cnt -
	    atomic_read(&nic->rx_bufs_left[ring_no]);
L
Linus Torvalds 已提交
2370

2371
	block_no1 = mac_control->rings[ring_no].rx_curr_get_info.block_index;
2372
	off1 = mac_control->rings[ring_no].rx_curr_get_info.offset;
L
Linus Torvalds 已提交
2373
	while (alloc_tab < alloc_cnt) {
2374
		block_no = mac_control->rings[ring_no].rx_curr_put_info.
L
Linus Torvalds 已提交
2375
		    block_index;
2376
		off = mac_control->rings[ring_no].rx_curr_put_info.offset;
L
Linus Torvalds 已提交
2377

2378 2379 2380 2381 2382 2383 2384
		rxdp = mac_control->rings[ring_no].
				rx_blocks[block_no].rxds[off].virt_addr;

		if ((block_no == block_no1) && (off == off1) &&
					(rxdp->Host_Control)) {
			DBG_PRINT(INTR_DBG, "%s: Get and Put",
				  dev->name);
L
Linus Torvalds 已提交
2385 2386 2387
			DBG_PRINT(INTR_DBG, " info equated\n");
			goto end;
		}
2388
		if (off && (off == rxd_count[nic->rxd_mode])) {
2389
			mac_control->rings[ring_no].rx_curr_put_info.
L
Linus Torvalds 已提交
2390
			    block_index++;
2391 2392 2393 2394 2395 2396 2397 2398 2399
			if (mac_control->rings[ring_no].rx_curr_put_info.
			    block_index == mac_control->rings[ring_no].
					block_count)
				mac_control->rings[ring_no].rx_curr_put_info.
					block_index = 0;
			block_no = mac_control->rings[ring_no].
					rx_curr_put_info.block_index;
			if (off == rxd_count[nic->rxd_mode])
				off = 0;
2400
			mac_control->rings[ring_no].rx_curr_put_info.
2401 2402 2403
				offset = off;
			rxdp = mac_control->rings[ring_no].
				rx_blocks[block_no].block_virt_addr;
L
Linus Torvalds 已提交
2404 2405 2406
			DBG_PRINT(INTR_DBG, "%s: Next block at: %p\n",
				  dev->name, rxdp);
		}
2407 2408 2409 2410 2411 2412 2413 2414 2415
		if(!napi) {
			spin_lock_irqsave(&nic->put_lock, flags);
			mac_control->rings[ring_no].put_pos =
			(block_no * (rxd_count[nic->rxd_mode] + 1)) + off;
			spin_unlock_irqrestore(&nic->put_lock, flags);
		} else {
			mac_control->rings[ring_no].put_pos =
			(block_no * (rxd_count[nic->rxd_mode] + 1)) + off;
		}
2416
		if ((rxdp->Control_1 & RXD_OWN_XENA) &&
2417
			((nic->rxd_mode == RXD_MODE_3B) &&
2418
				(rxdp->Control_2 & BIT(0)))) {
2419
			mac_control->rings[ring_no].rx_curr_put_info.
2420
					offset = off;
L
Linus Torvalds 已提交
2421 2422
			goto end;
		}
2423 2424 2425 2426 2427 2428
		/* calculate size of skb based on ring mode */
		size = dev->mtu + HEADER_ETHERNET_II_802_3_SIZE +
				HEADER_802_2_SIZE + HEADER_SNAP_SIZE;
		if (nic->rxd_mode == RXD_MODE_1)
			size += NET_IP_ALIGN;
		else
2429
			size = dev->mtu + ALIGN_SIZE + BUF0_LEN + 4;
L
Linus Torvalds 已提交
2430

2431 2432 2433
		/* allocate skb */
		skb = dev_alloc_skb(size);
		if(!skb) {
2434 2435
			DBG_PRINT(INFO_DBG, "%s: Out of ", dev->name);
			DBG_PRINT(INFO_DBG, "memory to allocate SKBs\n");
2436 2437 2438 2439
			if (first_rxdp) {
				wmb();
				first_rxdp->Control_1 |= RXD_OWN_XENA;
			}
2440 2441
			nic->mac_control.stats_info->sw_stat. \
				mem_alloc_fail_cnt++;
2442 2443
			return -ENOMEM ;
		}
2444
		nic->mac_control.stats_info->sw_stat.mem_allocated
2445
			+= skb->truesize;
2446 2447
		if (nic->rxd_mode == RXD_MODE_1) {
			/* 1 buffer mode - normal operation mode */
2448
			rxdp1 = (struct RxD1*)rxdp;
R
Ralf Baechle 已提交
2449
			memset(rxdp, 0, sizeof(struct RxD1));
2450
			skb_reserve(skb, NET_IP_ALIGN);
2451
			rxdp1->Buffer0_ptr = pci_map_single
2452 2453
			    (nic->pdev, skb->data, size - NET_IP_ALIGN,
				PCI_DMA_FROMDEVICE);
2454 2455 2456 2457 2458
			if( (rxdp1->Buffer0_ptr == 0) ||
				(rxdp1->Buffer0_ptr ==
				DMA_ERROR_CODE))
				goto pci_map_failed;

2459
			rxdp->Control_2 =
2460
				SET_BUFFER0_SIZE_1(size - NET_IP_ALIGN);
2461

2462
		} else if (nic->rxd_mode == RXD_MODE_3B) {
2463
			/*
2464 2465
			 * 2 buffer mode -
			 * 2 buffer mode provides 128
2466 2467 2468
			 * byte aligned receive buffers.
			 */

2469
			rxdp3 = (struct RxD3*)rxdp;
2470
			/* save buffer pointers to avoid frequent dma mapping */
2471 2472
			Buffer0_ptr = rxdp3->Buffer0_ptr;
			Buffer1_ptr = rxdp3->Buffer1_ptr;
R
Ralf Baechle 已提交
2473
			memset(rxdp, 0, sizeof(struct RxD3));
2474
			/* restore the buffer pointers for dma sync*/
2475 2476
			rxdp3->Buffer0_ptr = Buffer0_ptr;
			rxdp3->Buffer1_ptr = Buffer1_ptr;
2477

2478 2479 2480 2481 2482 2483
			ba = &mac_control->rings[ring_no].ba[block_no][off];
			skb_reserve(skb, BUF0_LEN);
			tmp = (u64)(unsigned long) skb->data;
			tmp += ALIGN_SIZE;
			tmp &= ~ALIGN_SIZE;
			skb->data = (void *) (unsigned long)tmp;
2484
			skb_reset_tail_pointer(skb);
2485

2486 2487
			if (!(rxdp3->Buffer0_ptr))
				rxdp3->Buffer0_ptr =
2488
				   pci_map_single(nic->pdev, ba->ba_0, BUF0_LEN,
2489
					   PCI_DMA_FROMDEVICE);
2490 2491
			else
				pci_dma_sync_single_for_device(nic->pdev,
2492
				(dma_addr_t) rxdp3->Buffer0_ptr,
2493
				    BUF0_LEN, PCI_DMA_FROMDEVICE);
2494 2495 2496 2497
			if( (rxdp3->Buffer0_ptr == 0) ||
				(rxdp3->Buffer0_ptr == DMA_ERROR_CODE))
				goto pci_map_failed;

2498 2499 2500 2501 2502
			rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN);
			if (nic->rxd_mode == RXD_MODE_3B) {
				/* Two buffer mode */

				/*
2503
				 * Buffer2 will have L3/L4 header plus
2504 2505
				 * L4 payload
				 */
2506
				rxdp3->Buffer2_ptr = pci_map_single
2507 2508 2509
				(nic->pdev, skb->data, dev->mtu + 4,
						PCI_DMA_FROMDEVICE);

2510 2511 2512 2513 2514
				if( (rxdp3->Buffer2_ptr == 0) ||
					(rxdp3->Buffer2_ptr == DMA_ERROR_CODE))
					goto pci_map_failed;

				rxdp3->Buffer1_ptr =
2515
						pci_map_single(nic->pdev,
2516 2517
						ba->ba_1, BUF1_LEN,
						PCI_DMA_FROMDEVICE);
2518 2519 2520 2521
				if( (rxdp3->Buffer1_ptr == 0) ||
					(rxdp3->Buffer1_ptr == DMA_ERROR_CODE)) {
					pci_unmap_single
						(nic->pdev,
A
Al Viro 已提交
2522
						(dma_addr_t)rxdp3->Buffer2_ptr,
2523 2524 2525
						dev->mtu + 4,
						PCI_DMA_FROMDEVICE);
					goto pci_map_failed;
2526
				}
2527 2528 2529 2530 2531
				rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1);
				rxdp->Control_2 |= SET_BUFFER2_SIZE_3
								(dev->mtu + 4);
			}
			rxdp->Control_2 |= BIT(0);
L
Linus Torvalds 已提交
2532 2533
		}
		rxdp->Host_Control = (unsigned long) (skb);
2534 2535
		if (alloc_tab & ((1 << rxsync_frequency) - 1))
			rxdp->Control_1 |= RXD_OWN_XENA;
L
Linus Torvalds 已提交
2536
		off++;
2537 2538
		if (off == (rxd_count[nic->rxd_mode] + 1))
			off = 0;
2539 2540
		mac_control->rings[ring_no].rx_curr_put_info.offset = off;

2541
		rxdp->Control_2 |= SET_RXD_MARKER;
2542 2543 2544 2545 2546 2547 2548
		if (!(alloc_tab & ((1 << rxsync_frequency) - 1))) {
			if (first_rxdp) {
				wmb();
				first_rxdp->Control_1 |= RXD_OWN_XENA;
			}
			first_rxdp = rxdp;
		}
L
Linus Torvalds 已提交
2549 2550 2551 2552 2553
		atomic_inc(&nic->rx_bufs_left[ring_no]);
		alloc_tab++;
	}

      end:
2554 2555 2556 2557 2558 2559 2560 2561 2562
	/* Transfer ownership of first descriptor to adapter just before
	 * exiting. Before that, use memory barrier so that ownership
	 * and other fields are seen by adapter correctly.
	 */
	if (first_rxdp) {
		wmb();
		first_rxdp->Control_1 |= RXD_OWN_XENA;
	}

L
Linus Torvalds 已提交
2563
	return SUCCESS;
2564 2565 2566 2567 2568
pci_map_failed:
	stats->pci_map_fail_cnt++;
	stats->mem_freed += skb->truesize;
	dev_kfree_skb_irq(skb);
	return -ENOMEM;
L
Linus Torvalds 已提交
2569 2570
}

2571 2572 2573 2574 2575
static void free_rxd_blk(struct s2io_nic *sp, int ring_no, int blk)
{
	struct net_device *dev = sp->dev;
	int j;
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2576 2577 2578
	struct RxD_t *rxdp;
	struct mac_info *mac_control;
	struct buffAdd *ba;
2579 2580
	struct RxD1 *rxdp1;
	struct RxD3 *rxdp3;
2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591

	mac_control = &sp->mac_control;
	for (j = 0 ; j < rxd_count[sp->rxd_mode]; j++) {
		rxdp = mac_control->rings[ring_no].
                                rx_blocks[blk].rxds[j].virt_addr;
		skb = (struct sk_buff *)
			((unsigned long) rxdp->Host_Control);
		if (!skb) {
			continue;
		}
		if (sp->rxd_mode == RXD_MODE_1) {
2592
			rxdp1 = (struct RxD1*)rxdp;
2593
			pci_unmap_single(sp->pdev, (dma_addr_t)
2594 2595 2596 2597 2598 2599
				rxdp1->Buffer0_ptr,
				dev->mtu +
				HEADER_ETHERNET_II_802_3_SIZE
				+ HEADER_802_2_SIZE +
				HEADER_SNAP_SIZE,
				PCI_DMA_FROMDEVICE);
R
Ralf Baechle 已提交
2600
			memset(rxdp, 0, sizeof(struct RxD1));
2601
		} else if(sp->rxd_mode == RXD_MODE_3B) {
2602
			rxdp3 = (struct RxD3*)rxdp;
2603 2604 2605
			ba = &mac_control->rings[ring_no].
				ba[blk][j];
			pci_unmap_single(sp->pdev, (dma_addr_t)
2606 2607
				rxdp3->Buffer0_ptr,
				BUF0_LEN,
2608 2609
				PCI_DMA_FROMDEVICE);
			pci_unmap_single(sp->pdev, (dma_addr_t)
2610 2611
				rxdp3->Buffer1_ptr,
				BUF1_LEN,
2612 2613
				PCI_DMA_FROMDEVICE);
			pci_unmap_single(sp->pdev, (dma_addr_t)
2614 2615
				rxdp3->Buffer2_ptr,
				dev->mtu + 4,
2616
				PCI_DMA_FROMDEVICE);
R
Ralf Baechle 已提交
2617
			memset(rxdp, 0, sizeof(struct RxD3));
2618
		}
2619
		sp->mac_control.stats_info->sw_stat.mem_freed += skb->truesize;
2620 2621 2622 2623 2624
		dev_kfree_skb(skb);
		atomic_dec(&sp->rx_bufs_left[ring_no]);
	}
}

L
Linus Torvalds 已提交
2625
/**
2626
 *  free_rx_buffers - Frees all Rx buffers
L
Linus Torvalds 已提交
2627
 *  @sp: device private variable.
2628
 *  Description:
L
Linus Torvalds 已提交
2629 2630 2631 2632 2633 2634 2635 2636
 *  This function will free all Rx buffers allocated by host.
 *  Return Value:
 *  NONE.
 */

static void free_rx_buffers(struct s2io_nic *sp)
{
	struct net_device *dev = sp->dev;
2637
	int i, blk = 0, buf_cnt = 0;
R
Ralf Baechle 已提交
2638
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2639 2640 2641 2642 2643 2644
	struct config_param *config;

	mac_control = &sp->mac_control;
	config = &sp->config;

	for (i = 0; i < config->rx_ring_num; i++) {
2645 2646
		for (blk = 0; blk < rx_ring_sz[i]; blk++)
			free_rxd_blk(sp,i,blk);
L
Linus Torvalds 已提交
2647

2648 2649 2650 2651
		mac_control->rings[i].rx_curr_put_info.block_index = 0;
		mac_control->rings[i].rx_curr_get_info.block_index = 0;
		mac_control->rings[i].rx_curr_put_info.offset = 0;
		mac_control->rings[i].rx_curr_get_info.offset = 0;
L
Linus Torvalds 已提交
2652 2653 2654 2655 2656 2657 2658 2659
		atomic_set(&sp->rx_bufs_left[i], 0);
		DBG_PRINT(INIT_DBG, "%s:Freed 0x%x Rx Buffers on ring%d\n",
			  dev->name, buf_cnt, i);
	}
}

/**
 * s2io_poll - Rx interrupt handler for NAPI support
2660
 * @napi : pointer to the napi structure.
2661
 * @budget : The number of packets that were budgeted to be processed
L
Linus Torvalds 已提交
2662 2663 2664 2665 2666 2667 2668 2669 2670
 * during  one pass through the 'Poll" function.
 * Description:
 * Comes into picture only if NAPI support has been incorporated. It does
 * the same thing that rx_intr_handler does, but not in a interrupt context
 * also It will process only a given number of packets.
 * Return value:
 * 0 on success and 1 if there are No Rx packets to be processed.
 */

2671
static int s2io_poll(struct napi_struct *napi, int budget)
L
Linus Torvalds 已提交
2672
{
2673 2674
	struct s2io_nic *nic = container_of(napi, struct s2io_nic, napi);
	struct net_device *dev = nic->dev;
2675
	int pkt_cnt = 0, org_pkts_to_process;
R
Ralf Baechle 已提交
2676
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2677
	struct config_param *config;
R
Ralf Baechle 已提交
2678
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
2679
	int i;
L
Linus Torvalds 已提交
2680

2681
	if (!is_s2io_card_up(nic))
2682 2683
		return 0;

L
Linus Torvalds 已提交
2684 2685 2686
	mac_control = &nic->mac_control;
	config = &nic->config;

2687
	nic->pkts_to_process = budget;
2688
	org_pkts_to_process = nic->pkts_to_process;
L
Linus Torvalds 已提交
2689

2690 2691
	writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int);
	readl(&bar0->rx_traffic_int);
L
Linus Torvalds 已提交
2692 2693

	for (i = 0; i < config->rx_ring_num; i++) {
2694 2695 2696 2697 2698
		rx_intr_handler(&mac_control->rings[i]);
		pkt_cnt = org_pkts_to_process - nic->pkts_to_process;
		if (!nic->pkts_to_process) {
			/* Quota for the current iteration has been met */
			goto no_rx;
L
Linus Torvalds 已提交
2699 2700 2701
		}
	}

2702
	netif_rx_complete(dev, napi);
L
Linus Torvalds 已提交
2703 2704 2705

	for (i = 0; i < config->rx_ring_num; i++) {
		if (fill_rx_buffers(nic, i) == -ENOMEM) {
2706 2707
			DBG_PRINT(INFO_DBG, "%s:Out of memory", dev->name);
			DBG_PRINT(INFO_DBG, " in Rx Poll!!\n");
L
Linus Torvalds 已提交
2708 2709 2710 2711
			break;
		}
	}
	/* Re enable the Rx interrupts. */
A
Ananda Raju 已提交
2712
	writeq(0x0, &bar0->rx_traffic_mask);
2713
	readl(&bar0->rx_traffic_mask);
2714
	return pkt_cnt;
L
Linus Torvalds 已提交
2715

2716
no_rx:
L
Linus Torvalds 已提交
2717 2718
	for (i = 0; i < config->rx_ring_num; i++) {
		if (fill_rx_buffers(nic, i) == -ENOMEM) {
2719 2720
			DBG_PRINT(INFO_DBG, "%s:Out of memory", dev->name);
			DBG_PRINT(INFO_DBG, " in Rx Poll!!\n");
L
Linus Torvalds 已提交
2721 2722 2723
			break;
		}
	}
2724
	return pkt_cnt;
L
Linus Torvalds 已提交
2725
}
2726

2727
#ifdef CONFIG_NET_POLL_CONTROLLER
2728
/**
2729
 * s2io_netpoll - netpoll event handler entry point
2730 2731
 * @dev : pointer to the device structure.
 * Description:
2732 2733 2734 2735
 * 	This function will be called by upper layer to check for events on the
 * interface in situations where interrupts are disabled. It is used for
 * specific in-kernel networking tasks, such as remote consoles and kernel
 * debugging over the network (example netdump in RedHat).
2736 2737 2738
 */
static void s2io_netpoll(struct net_device *dev)
{
R
Ralf Baechle 已提交
2739 2740
	struct s2io_nic *nic = dev->priv;
	struct mac_info *mac_control;
2741
	struct config_param *config;
R
Ralf Baechle 已提交
2742
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
2743
	u64 val64 = 0xFFFFFFFFFFFFFFFFULL;
2744 2745
	int i;

2746 2747 2748
	if (pci_channel_offline(nic->pdev))
		return;

2749 2750 2751 2752 2753 2754
	disable_irq(dev->irq);

	mac_control = &nic->mac_control;
	config = &nic->config;

	writeq(val64, &bar0->rx_traffic_int);
2755 2756
	writeq(val64, &bar0->tx_traffic_int);

2757
	/* we need to free up the transmitted skbufs or else netpoll will
2758 2759 2760 2761 2762
	 * run out of skbs and will fail and eventually netpoll application such
	 * as netdump will fail.
	 */
	for (i = 0; i < config->tx_fifo_num; i++)
		tx_intr_handler(&mac_control->fifos[i]);
2763

2764
	/* check for received packet and indicate up to network */
2765 2766 2767 2768 2769
	for (i = 0; i < config->rx_ring_num; i++)
		rx_intr_handler(&mac_control->rings[i]);

	for (i = 0; i < config->rx_ring_num; i++) {
		if (fill_rx_buffers(nic, i) == -ENOMEM) {
2770 2771
			DBG_PRINT(INFO_DBG, "%s:Out of memory", dev->name);
			DBG_PRINT(INFO_DBG, " in Rx Netpoll!!\n");
2772 2773 2774 2775 2776 2777 2778 2779
			break;
		}
	}
	enable_irq(dev->irq);
	return;
}
#endif

2780
/**
L
Linus Torvalds 已提交
2781 2782
 *  rx_intr_handler - Rx interrupt handler
 *  @nic: device private variable.
2783 2784
 *  Description:
 *  If the interrupt is because of a received frame or if the
L
Linus Torvalds 已提交
2785
 *  receive ring contains fresh as yet un-processed frames,this function is
2786 2787
 *  called. It picks out the RxD at which place the last Rx processing had
 *  stopped and sends the skb to the OSM's Rx handler and then increments
L
Linus Torvalds 已提交
2788 2789 2790 2791
 *  the offset.
 *  Return Value:
 *  NONE.
 */
R
Ralf Baechle 已提交
2792
static void rx_intr_handler(struct ring_info *ring_data)
L
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2793
{
R
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2794
	struct s2io_nic *nic = ring_data->nic;
L
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2795
	struct net_device *dev = (struct net_device *) nic->dev;
2796
	int get_block, put_block, put_offset;
R
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2797 2798
	struct rx_curr_get_info get_info, put_info;
	struct RxD_t *rxdp;
L
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2799
	struct sk_buff *skb;
2800
	int pkt_cnt = 0;
2801
	int i;
2802 2803
	struct RxD1* rxdp1;
	struct RxD3* rxdp3;
2804

2805 2806
	spin_lock(&nic->rx_lock);

2807 2808
	get_info = ring_data->rx_curr_get_info;
	get_block = get_info.block_index;
R
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2809
	memcpy(&put_info, &ring_data->rx_curr_put_info, sizeof(put_info));
2810
	put_block = put_info.block_index;
2811
	rxdp = ring_data->rx_blocks[get_block].rxds[get_info.offset].virt_addr;
2812 2813 2814 2815 2816 2817 2818
	if (!napi) {
		spin_lock(&nic->put_lock);
		put_offset = ring_data->put_pos;
		spin_unlock(&nic->put_lock);
	} else
		put_offset = ring_data->put_pos;

2819
	while (RXD_IS_UP2DT(rxdp)) {
2820 2821 2822 2823
		/*
		 * If your are next to put index then it's
		 * FIFO full condition
		 */
2824 2825
		if ((get_block == put_block) &&
		    (get_info.offset + 1) == put_info.offset) {
2826
			DBG_PRINT(INTR_DBG, "%s: Ring Full\n",dev->name);
2827 2828
			break;
		}
2829 2830 2831 2832 2833
		skb = (struct sk_buff *) ((unsigned long)rxdp->Host_Control);
		if (skb == NULL) {
			DBG_PRINT(ERR_DBG, "%s: The skb is ",
				  dev->name);
			DBG_PRINT(ERR_DBG, "Null in Rx Intr\n");
2834
			spin_unlock(&nic->rx_lock);
2835
			return;
L
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2836
		}
2837
		if (nic->rxd_mode == RXD_MODE_1) {
2838
			rxdp1 = (struct RxD1*)rxdp;
2839
			pci_unmap_single(nic->pdev, (dma_addr_t)
2840 2841 2842 2843 2844 2845
				rxdp1->Buffer0_ptr,
				dev->mtu +
				HEADER_ETHERNET_II_802_3_SIZE +
				HEADER_802_2_SIZE +
				HEADER_SNAP_SIZE,
				PCI_DMA_FROMDEVICE);
2846
		} else if (nic->rxd_mode == RXD_MODE_3B) {
2847
			rxdp3 = (struct RxD3*)rxdp;
2848
			pci_dma_sync_single_for_cpu(nic->pdev, (dma_addr_t)
2849 2850
				rxdp3->Buffer0_ptr,
				BUF0_LEN, PCI_DMA_FROMDEVICE);
2851
			pci_unmap_single(nic->pdev, (dma_addr_t)
2852 2853 2854
				rxdp3->Buffer2_ptr,
				dev->mtu + 4,
				PCI_DMA_FROMDEVICE);
2855
		}
2856
		prefetch(skb->data);
2857 2858
		rx_osm_handler(ring_data, rxdp);
		get_info.offset++;
2859 2860 2861 2862
		ring_data->rx_curr_get_info.offset = get_info.offset;
		rxdp = ring_data->rx_blocks[get_block].
				rxds[get_info.offset].virt_addr;
		if (get_info.offset == rxd_count[nic->rxd_mode]) {
2863
			get_info.offset = 0;
2864
			ring_data->rx_curr_get_info.offset = get_info.offset;
2865
			get_block++;
2866 2867 2868
			if (get_block == ring_data->block_count)
				get_block = 0;
			ring_data->rx_curr_get_info.block_index = get_block;
2869 2870
			rxdp = ring_data->rx_blocks[get_block].block_virt_addr;
		}
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2871

2872
		nic->pkts_to_process -= 1;
2873
		if ((napi) && (!nic->pkts_to_process))
2874 2875
			break;
		pkt_cnt++;
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2876 2877 2878
		if ((indicate_max_pkts) && (pkt_cnt > indicate_max_pkts))
			break;
	}
2879 2880 2881
	if (nic->lro) {
		/* Clear all LRO sessions before exiting */
		for (i=0; i<MAX_LRO_SESSIONS; i++) {
R
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2882
			struct lro *lro = &nic->lro0_n[i];
2883 2884 2885 2886 2887 2888 2889 2890
			if (lro->in_use) {
				update_L3L4_header(nic, lro);
				queue_rx_frame(lro->parent);
				clear_lro_session(lro);
			}
		}
	}

2891
	spin_unlock(&nic->rx_lock);
L
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2892
}
2893 2894

/**
L
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2895 2896
 *  tx_intr_handler - Transmit interrupt handler
 *  @nic : device private variable
2897 2898 2899 2900
 *  Description:
 *  If an interrupt was raised to indicate DMA complete of the
 *  Tx packet, this function is called. It identifies the last TxD
 *  whose buffer was freed and frees all skbs whose data have already
L
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2901 2902 2903 2904 2905
 *  DMA'ed into the NICs internal memory.
 *  Return Value:
 *  NONE
 */

R
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2906
static void tx_intr_handler(struct fifo_info *fifo_data)
L
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2907
{
R
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2908
	struct s2io_nic *nic = fifo_data->nic;
L
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2909
	struct net_device *dev = (struct net_device *) nic->dev;
R
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2910
	struct tx_curr_get_info get_info, put_info;
L
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2911
	struct sk_buff *skb;
R
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2912
	struct TxD *txdlp;
2913
	u8 err_mask;
L
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2914

2915
	get_info = fifo_data->tx_curr_get_info;
R
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2916 2917
	memcpy(&put_info, &fifo_data->tx_curr_put_info, sizeof(put_info));
	txdlp = (struct TxD *) fifo_data->list_info[get_info.offset].
2918 2919 2920 2921 2922 2923 2924 2925
	    list_virt_addr;
	while ((!(txdlp->Control_1 & TXD_LIST_OWN_XENA)) &&
	       (get_info.offset != put_info.offset) &&
	       (txdlp->Host_Control)) {
		/* Check for TxD errors */
		if (txdlp->Control_1 & TXD_T_CODE) {
			unsigned long long err;
			err = txdlp->Control_1 & TXD_T_CODE;
2926 2927 2928 2929
			if (err & 0x1) {
				nic->mac_control.stats_info->sw_stat.
						parity_err_cnt++;
			}
2930 2931

			/* update t_code statistics */
2932 2933
			err_mask = err >> 48;
			switch(err_mask) {
2934 2935 2936 2937 2938 2939 2940 2941 2942 2943 2944 2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957 2958
				case 2:
					nic->mac_control.stats_info->sw_stat.
							tx_buf_abort_cnt++;
				break;

				case 3:
					nic->mac_control.stats_info->sw_stat.
							tx_desc_abort_cnt++;
				break;

				case 7:
					nic->mac_control.stats_info->sw_stat.
							tx_parity_err_cnt++;
				break;

				case 10:
					nic->mac_control.stats_info->sw_stat.
							tx_link_loss_cnt++;
				break;

				case 15:
					nic->mac_control.stats_info->sw_stat.
							tx_list_proc_err_cnt++;
				break;
                        }
2959
		}
L
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2960

A
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2961
		skb = s2io_txdl_getskb(fifo_data, txdlp, get_info.offset);
2962 2963 2964 2965 2966 2967 2968 2969 2970
		if (skb == NULL) {
			DBG_PRINT(ERR_DBG, "%s: Null skb ",
			__FUNCTION__);
			DBG_PRINT(ERR_DBG, "in Tx Free Intr\n");
			return;
		}

		/* Updating the statistics block */
		nic->stats.tx_bytes += skb->len;
2971
		nic->mac_control.stats_info->sw_stat.mem_freed += skb->truesize;
2972 2973 2974
		dev_kfree_skb_irq(skb);

		get_info.offset++;
2975 2976
		if (get_info.offset == get_info.fifo_len + 1)
			get_info.offset = 0;
R
Ralf Baechle 已提交
2977
		txdlp = (struct TxD *) fifo_data->list_info
2978 2979 2980
		    [get_info.offset].list_virt_addr;
		fifo_data->tx_curr_get_info.offset =
		    get_info.offset;
L
Linus Torvalds 已提交
2981 2982 2983 2984 2985 2986 2987 2988
	}

	spin_lock(&nic->tx_lock);
	if (netif_queue_stopped(dev))
		netif_wake_queue(dev);
	spin_unlock(&nic->tx_lock);
}

2989 2990 2991 2992 2993 2994 2995 2996 2997 2998 2999 3000 3001
/**
 *  s2io_mdio_write - Function to write in to MDIO registers
 *  @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
 *  @addr     : address value
 *  @value    : data value
 *  @dev      : pointer to net_device structure
 *  Description:
 *  This function is used to write values to the MDIO registers
 *  NONE
 */
static void s2io_mdio_write(u32 mmd_type, u64 addr, u16 value, struct net_device *dev)
{
	u64 val64 = 0x0;
R
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3002 3003
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
3004 3005 3006 3007 3008 3009 3010 3011 3012 3013 3014 3015 3016 3017 3018 3019 3020 3021 3022 3023 3024 3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050

	//address transaction
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	//Data transaction
	val64 = 0x0;
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0)
			| MDIO_MDIO_DATA(value)
			| MDIO_OP(MDIO_OP_WRITE_TRANS);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	val64 = 0x0;
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
	| MDIO_MMD_DEV_ADDR(mmd_type)
	| MDIO_MMS_PRT_ADDR(0x0)
	| MDIO_OP(MDIO_OP_READ_TRANS);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

}

/**
 *  s2io_mdio_read - Function to write in to MDIO registers
 *  @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
 *  @addr     : address value
 *  @dev      : pointer to net_device structure
 *  Description:
 *  This function is used to read values to the MDIO registers
 *  NONE
 */
static u64 s2io_mdio_read(u32 mmd_type, u64 addr, struct net_device *dev)
{
	u64 val64 = 0x0;
	u64 rval64 = 0x0;
R
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3051 3052
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074 3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 3097 3098 3099 3100 3101 3102 3103 3104 3105 3106 3107 3108 3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125 3126 3127 3128 3129 3130 3131 3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154

	/* address transaction */
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	/* Data transaction */
	val64 = 0x0;
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0)
			| MDIO_OP(MDIO_OP_READ_TRANS);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	/* Read the value from regs */
	rval64 = readq(&bar0->mdio_control);
	rval64 = rval64 & 0xFFFF0000;
	rval64 = rval64 >> 16;
	return rval64;
}
/**
 *  s2io_chk_xpak_counter - Function to check the status of the xpak counters
 *  @counter      : couter value to be updated
 *  @flag         : flag to indicate the status
 *  @type         : counter type
 *  Description:
 *  This function is to check the status of the xpak counters value
 *  NONE
 */

static void s2io_chk_xpak_counter(u64 *counter, u64 * regs_stat, u32 index, u16 flag, u16 type)
{
	u64 mask = 0x3;
	u64 val64;
	int i;
	for(i = 0; i <index; i++)
		mask = mask << 0x2;

	if(flag > 0)
	{
		*counter = *counter + 1;
		val64 = *regs_stat & mask;
		val64 = val64 >> (index * 0x2);
		val64 = val64 + 1;
		if(val64 == 3)
		{
			switch(type)
			{
			case 1:
				DBG_PRINT(ERR_DBG, "Take Xframe NIC out of "
					  "service. Excessive temperatures may "
					  "result in premature transceiver "
					  "failure \n");
			break;
			case 2:
				DBG_PRINT(ERR_DBG, "Take Xframe NIC out of "
					  "service Excessive bias currents may "
					  "indicate imminent laser diode "
					  "failure \n");
			break;
			case 3:
				DBG_PRINT(ERR_DBG, "Take Xframe NIC out of "
					  "service Excessive laser output "
					  "power may saturate far-end "
					  "receiver\n");
			break;
			default:
				DBG_PRINT(ERR_DBG, "Incorrect XPAK Alarm "
					  "type \n");
			}
			val64 = 0x0;
		}
		val64 = val64 << (index * 0x2);
		*regs_stat = (*regs_stat & (~mask)) | (val64);

	} else {
		*regs_stat = *regs_stat & (~mask);
	}
}

/**
 *  s2io_updt_xpak_counter - Function to update the xpak counters
 *  @dev         : pointer to net_device struct
 *  Description:
 *  This function is to upate the status of the xpak counters value
 *  NONE
 */
static void s2io_updt_xpak_counter(struct net_device *dev)
{
	u16 flag  = 0x0;
	u16 type  = 0x0;
	u16 val16 = 0x0;
	u64 val64 = 0x0;
	u64 addr  = 0x0;

R
Ralf Baechle 已提交
3155 3156
	struct s2io_nic *sp = dev->priv;
	struct stat_block *stat_info = sp->mac_control.stats_info;
3157 3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181 3182 3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199 3200 3201 3202 3203 3204 3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238

	/* Check the communication with the MDIO slave */
	addr = 0x0000;
	val64 = 0x0;
	val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);
	if((val64 == 0xFFFF) || (val64 == 0x0000))
	{
		DBG_PRINT(ERR_DBG, "ERR: MDIO slave access failed - "
			  "Returned %llx\n", (unsigned long long)val64);
		return;
	}

	/* Check for the expecte value of 2040 at PMA address 0x0000 */
	if(val64 != 0x2040)
	{
		DBG_PRINT(ERR_DBG, "Incorrect value at PMA address 0x0000 - ");
		DBG_PRINT(ERR_DBG, "Returned: %llx- Expected: 0x2040\n",
			  (unsigned long long)val64);
		return;
	}

	/* Loading the DOM register to MDIO register */
	addr = 0xA100;
	s2io_mdio_write(MDIO_MMD_PMA_DEV_ADDR, addr, val16, dev);
	val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);

	/* Reading the Alarm flags */
	addr = 0xA070;
	val64 = 0x0;
	val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);

	flag = CHECKBIT(val64, 0x7);
	type = 1;
	s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_transceiver_temp_high,
				&stat_info->xpak_stat.xpak_regs_stat,
				0x0, flag, type);

	if(CHECKBIT(val64, 0x6))
		stat_info->xpak_stat.alarm_transceiver_temp_low++;

	flag = CHECKBIT(val64, 0x3);
	type = 2;
	s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_laser_bias_current_high,
				&stat_info->xpak_stat.xpak_regs_stat,
				0x2, flag, type);

	if(CHECKBIT(val64, 0x2))
		stat_info->xpak_stat.alarm_laser_bias_current_low++;

	flag = CHECKBIT(val64, 0x1);
	type = 3;
	s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_laser_output_power_high,
				&stat_info->xpak_stat.xpak_regs_stat,
				0x4, flag, type);

	if(CHECKBIT(val64, 0x0))
		stat_info->xpak_stat.alarm_laser_output_power_low++;

	/* Reading the Warning flags */
	addr = 0xA074;
	val64 = 0x0;
	val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);

	if(CHECKBIT(val64, 0x7))
		stat_info->xpak_stat.warn_transceiver_temp_high++;

	if(CHECKBIT(val64, 0x6))
		stat_info->xpak_stat.warn_transceiver_temp_low++;

	if(CHECKBIT(val64, 0x3))
		stat_info->xpak_stat.warn_laser_bias_current_high++;

	if(CHECKBIT(val64, 0x2))
		stat_info->xpak_stat.warn_laser_bias_current_low++;

	if(CHECKBIT(val64, 0x1))
		stat_info->xpak_stat.warn_laser_output_power_high++;

	if(CHECKBIT(val64, 0x0))
		stat_info->xpak_stat.warn_laser_output_power_low++;
}

3239
/**
L
Linus Torvalds 已提交
3240
 *  wait_for_cmd_complete - waits for a command to complete.
3241
 *  @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
3242
 *  s2io_nic structure.
3243 3244 3245
 *  Description: Function that waits for a command to Write into RMAC
 *  ADDR DATA registers to be completed and returns either success or
 *  error depending on whether the command was complete or not.
L
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3246 3247 3248 3249
 *  Return value:
 *   SUCCESS on success and FAILURE on failure.
 */

3250 3251
static int wait_for_cmd_complete(void __iomem *addr, u64 busy_bit,
				int bit_state)
L
Linus Torvalds 已提交
3252
{
3253
	int ret = FAILURE, cnt = 0, delay = 1;
L
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3254 3255
	u64 val64;

3256 3257 3258 3259
	if ((bit_state != S2IO_BIT_RESET) && (bit_state != S2IO_BIT_SET))
		return FAILURE;

	do {
A
Ananda Raju 已提交
3260
		val64 = readq(addr);
3261 3262 3263 3264 3265 3266 3267 3268 3269 3270
		if (bit_state == S2IO_BIT_RESET) {
			if (!(val64 & busy_bit)) {
				ret = SUCCESS;
				break;
			}
		} else {
			if (!(val64 & busy_bit)) {
				ret = SUCCESS;
				break;
			}
L
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3271
		}
A
Ananda Raju 已提交
3272 3273

		if(in_interrupt())
3274
			mdelay(delay);
A
Ananda Raju 已提交
3275
		else
3276
			msleep(delay);
A
Ananda Raju 已提交
3277

3278 3279 3280
		if (++cnt >= 10)
			delay = 50;
	} while (cnt < 20);
L
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3281 3282
	return ret;
}
3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301
/*
 * check_pci_device_id - Checks if the device id is supported
 * @id : device id
 * Description: Function to check if the pci device id is supported by driver.
 * Return value: Actual device id if supported else PCI_ANY_ID
 */
static u16 check_pci_device_id(u16 id)
{
	switch (id) {
	case PCI_DEVICE_ID_HERC_WIN:
	case PCI_DEVICE_ID_HERC_UNI:
		return XFRAME_II_DEVICE;
	case PCI_DEVICE_ID_S2IO_UNI:
	case PCI_DEVICE_ID_S2IO_WIN:
		return XFRAME_I_DEVICE;
	default:
		return PCI_ANY_ID;
	}
}
L
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3302

3303 3304
/**
 *  s2io_reset - Resets the card.
L
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3305 3306
 *  @sp : private member of the device structure.
 *  Description: Function to Reset the card. This function then also
3307
 *  restores the previously saved PCI configuration space registers as
L
Linus Torvalds 已提交
3308 3309 3310 3311 3312
 *  the card reset also resets the configuration space.
 *  Return value:
 *  void.
 */

R
Ralf Baechle 已提交
3313
static void s2io_reset(struct s2io_nic * sp)
L
Linus Torvalds 已提交
3314
{
R
Ralf Baechle 已提交
3315
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
3316
	u64 val64;
3317
	u16 subid, pci_cmd;
3318 3319
	int i;
	u16 val16;
3320 3321 3322
	unsigned long long up_cnt, down_cnt, up_time, down_time, reset_cnt;
	unsigned long long mem_alloc_cnt, mem_free_cnt, watchdog_cnt;

3323 3324
	DBG_PRINT(INIT_DBG,"%s - Resetting XFrame card %s\n",
			__FUNCTION__, sp->dev->name);
L
Linus Torvalds 已提交
3325

3326
	/* Back up  the PCI-X CMD reg, dont want to lose MMRBC, OST settings */
3327
	pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, &(pci_cmd));
3328

L
Linus Torvalds 已提交
3329 3330
	val64 = SW_RESET_ALL;
	writeq(val64, &bar0->sw_reset);
A
Ananda Raju 已提交
3331 3332 3333
	if (strstr(sp->product_name, "CX4")) {
		msleep(750);
	}
3334 3335
	msleep(250);
	for (i = 0; i < S2IO_MAX_PCI_CONFIG_SPACE_REINIT; i++) {
L
Linus Torvalds 已提交
3336

3337 3338 3339 3340 3341 3342 3343
		/* Restore the PCI state saved during initialization. */
		pci_restore_state(sp->pdev);
		pci_read_config_word(sp->pdev, 0x2, &val16);
		if (check_pci_device_id(val16) != (u16)PCI_ANY_ID)
			break;
		msleep(200);
	}
L
Linus Torvalds 已提交
3344

3345 3346 3347 3348 3349 3350 3351
	if (check_pci_device_id(val16) == (u16)PCI_ANY_ID) {
		DBG_PRINT(ERR_DBG,"%s SW_Reset failed!\n", __FUNCTION__);
	}

	pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER, pci_cmd);

	s2io_init_pci(sp);
L
Linus Torvalds 已提交
3352

3353 3354 3355
	/* Set swapper to enable I/O register access */
	s2io_set_swapper(sp);

3356 3357 3358
	/* Restore the MSIX table entries from local variables */
	restore_xmsi_data(sp);

3359
	/* Clear certain PCI/PCI-X fields after reset */
3360
	if (sp->device_type == XFRAME_II_DEVICE) {
3361
		/* Clear "detected parity error" bit */
3362
		pci_write_config_word(sp->pdev, PCI_STATUS, 0x8000);
3363

3364 3365
		/* Clearing PCIX Ecc status register */
		pci_write_config_dword(sp->pdev, 0x68, 0x7C);
3366

3367 3368 3369
		/* Clearing PCI_STATUS error reflected here */
		writeq(BIT(62), &bar0->txpic_int_reg);
	}
3370

3371 3372
	/* Reset device statistics maintained by OS */
	memset(&sp->stats, 0, sizeof (struct net_device_stats));
3373

3374 3375 3376 3377
	up_cnt = sp->mac_control.stats_info->sw_stat.link_up_cnt;
	down_cnt = sp->mac_control.stats_info->sw_stat.link_down_cnt;
	up_time = sp->mac_control.stats_info->sw_stat.link_up_time;
	down_time = sp->mac_control.stats_info->sw_stat.link_down_time;
3378
	reset_cnt = sp->mac_control.stats_info->sw_stat.soft_reset_cnt;
3379 3380 3381 3382
	mem_alloc_cnt = sp->mac_control.stats_info->sw_stat.mem_allocated;
	mem_free_cnt = sp->mac_control.stats_info->sw_stat.mem_freed;
	watchdog_cnt = sp->mac_control.stats_info->sw_stat.watchdog_timer_cnt;
	/* save link up/down time/cnt, reset/memory/watchdog cnt */
3383
	memset(sp->mac_control.stats_info, 0, sizeof(struct stat_block));
3384 3385 3386 3387 3388
	/* restore link up/down time/cnt, reset/memory/watchdog cnt */
	sp->mac_control.stats_info->sw_stat.link_up_cnt = up_cnt;
	sp->mac_control.stats_info->sw_stat.link_down_cnt = down_cnt;
	sp->mac_control.stats_info->sw_stat.link_up_time = up_time;
	sp->mac_control.stats_info->sw_stat.link_down_time = down_time;
3389
	sp->mac_control.stats_info->sw_stat.soft_reset_cnt = reset_cnt;
3390 3391 3392
	sp->mac_control.stats_info->sw_stat.mem_allocated = mem_alloc_cnt;
	sp->mac_control.stats_info->sw_stat.mem_freed = mem_free_cnt;
	sp->mac_control.stats_info->sw_stat.watchdog_timer_cnt = watchdog_cnt;
3393

L
Linus Torvalds 已提交
3394 3395
	/* SXE-002: Configure link and activity LED to turn it off */
	subid = sp->pdev->subsystem_device;
3396 3397
	if (((subid & 0xFF) >= 0x07) &&
	    (sp->device_type == XFRAME_I_DEVICE)) {
L
Linus Torvalds 已提交
3398 3399 3400 3401
		val64 = readq(&bar0->gpio_control);
		val64 |= 0x0000800000000000ULL;
		writeq(val64, &bar0->gpio_control);
		val64 = 0x0411040400000000ULL;
3402
		writeq(val64, (void __iomem *)bar0 + 0x2700);
L
Linus Torvalds 已提交
3403 3404
	}

3405 3406 3407 3408 3409 3410 3411 3412 3413
	/*
	 * Clear spurious ECC interrupts that would have occured on
	 * XFRAME II cards after reset.
	 */
	if (sp->device_type == XFRAME_II_DEVICE) {
		val64 = readq(&bar0->pcc_err_reg);
		writeq(val64, &bar0->pcc_err_reg);
	}

3414 3415 3416
	/* restore the previously assigned mac address */
	s2io_set_mac_addr(sp->dev, (u8 *)&sp->def_mac_addr[0].mac_addr);

L
Linus Torvalds 已提交
3417 3418 3419 3420
	sp->device_enabled_once = FALSE;
}

/**
3421 3422
 *  s2io_set_swapper - to set the swapper controle on the card
 *  @sp : private member of the device structure,
L
Linus Torvalds 已提交
3423
 *  pointer to the s2io_nic structure.
3424
 *  Description: Function to set the swapper control on the card
L
Linus Torvalds 已提交
3425 3426 3427 3428 3429
 *  correctly depending on the 'endianness' of the system.
 *  Return value:
 *  SUCCESS on success and FAILURE on failure.
 */

R
Ralf Baechle 已提交
3430
static int s2io_set_swapper(struct s2io_nic * sp)
L
Linus Torvalds 已提交
3431 3432
{
	struct net_device *dev = sp->dev;
R
Ralf Baechle 已提交
3433
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
3434 3435
	u64 val64, valt, valr;

3436
	/*
L
Linus Torvalds 已提交
3437 3438 3439 3440 3441 3442 3443 3444 3445 3446 3447 3448 3449 3450 3451 3452 3453 3454 3455 3456 3457 3458 3459 3460 3461 3462 3463 3464 3465 3466 3467 3468 3469 3470 3471 3472 3473 3474 3475 3476 3477 3478 3479 3480 3481 3482 3483 3484 3485 3486 3487
	 * Set proper endian settings and verify the same by reading
	 * the PIF Feed-back register.
	 */

	val64 = readq(&bar0->pif_rd_swapper_fb);
	if (val64 != 0x0123456789ABCDEFULL) {
		int i = 0;
		u64 value[] = { 0xC30000C3C30000C3ULL,   /* FE=1, SE=1 */
				0x8100008181000081ULL,  /* FE=1, SE=0 */
				0x4200004242000042ULL,  /* FE=0, SE=1 */
				0};                     /* FE=0, SE=0 */

		while(i<4) {
			writeq(value[i], &bar0->swapper_ctrl);
			val64 = readq(&bar0->pif_rd_swapper_fb);
			if (val64 == 0x0123456789ABCDEFULL)
				break;
			i++;
		}
		if (i == 4) {
			DBG_PRINT(ERR_DBG, "%s: Endian settings are wrong, ",
				dev->name);
			DBG_PRINT(ERR_DBG, "feedback read %llx\n",
				(unsigned long long) val64);
			return FAILURE;
		}
		valr = value[i];
	} else {
		valr = readq(&bar0->swapper_ctrl);
	}

	valt = 0x0123456789ABCDEFULL;
	writeq(valt, &bar0->xmsi_address);
	val64 = readq(&bar0->xmsi_address);

	if(val64 != valt) {
		int i = 0;
		u64 value[] = { 0x00C3C30000C3C300ULL,  /* FE=1, SE=1 */
				0x0081810000818100ULL,  /* FE=1, SE=0 */
				0x0042420000424200ULL,  /* FE=0, SE=1 */
				0};                     /* FE=0, SE=0 */

		while(i<4) {
			writeq((value[i] | valr), &bar0->swapper_ctrl);
			writeq(valt, &bar0->xmsi_address);
			val64 = readq(&bar0->xmsi_address);
			if(val64 == valt)
				break;
			i++;
		}
		if(i == 4) {
3488
			unsigned long long x = val64;
L
Linus Torvalds 已提交
3489
			DBG_PRINT(ERR_DBG, "Write failed, Xmsi_addr ");
3490
			DBG_PRINT(ERR_DBG, "reads:0x%llx\n", x);
L
Linus Torvalds 已提交
3491 3492 3493 3494 3495 3496 3497
			return FAILURE;
		}
	}
	val64 = readq(&bar0->swapper_ctrl);
	val64 &= 0xFFFF000000000000ULL;

#ifdef  __BIG_ENDIAN
3498 3499
	/*
	 * The device by default set to a big endian format, so a
L
Linus Torvalds 已提交
3500 3501 3502 3503 3504 3505 3506 3507 3508 3509 3510 3511
	 * big endian driver need not set anything.
	 */
	val64 |= (SWAPPER_CTRL_TXP_FE |
		 SWAPPER_CTRL_TXP_SE |
		 SWAPPER_CTRL_TXD_R_FE |
		 SWAPPER_CTRL_TXD_W_FE |
		 SWAPPER_CTRL_TXF_R_FE |
		 SWAPPER_CTRL_RXD_R_FE |
		 SWAPPER_CTRL_RXD_W_FE |
		 SWAPPER_CTRL_RXF_W_FE |
		 SWAPPER_CTRL_XMSI_FE |
		 SWAPPER_CTRL_STATS_FE | SWAPPER_CTRL_STATS_SE);
3512
	if (sp->config.intr_type == INTA)
3513
		val64 |= SWAPPER_CTRL_XMSI_SE;
L
Linus Torvalds 已提交
3514 3515
	writeq(val64, &bar0->swapper_ctrl);
#else
3516
	/*
L
Linus Torvalds 已提交
3517
	 * Initially we enable all bits to make it accessible by the
3518
	 * driver, then we selectively enable only those bits that
L
Linus Torvalds 已提交
3519 3520 3521 3522 3523 3524 3525 3526 3527 3528 3529 3530 3531 3532 3533 3534
	 * we want to set.
	 */
	val64 |= (SWAPPER_CTRL_TXP_FE |
		 SWAPPER_CTRL_TXP_SE |
		 SWAPPER_CTRL_TXD_R_FE |
		 SWAPPER_CTRL_TXD_R_SE |
		 SWAPPER_CTRL_TXD_W_FE |
		 SWAPPER_CTRL_TXD_W_SE |
		 SWAPPER_CTRL_TXF_R_FE |
		 SWAPPER_CTRL_RXD_R_FE |
		 SWAPPER_CTRL_RXD_R_SE |
		 SWAPPER_CTRL_RXD_W_FE |
		 SWAPPER_CTRL_RXD_W_SE |
		 SWAPPER_CTRL_RXF_W_FE |
		 SWAPPER_CTRL_XMSI_FE |
		 SWAPPER_CTRL_STATS_FE | SWAPPER_CTRL_STATS_SE);
3535
	if (sp->config.intr_type == INTA)
3536
		val64 |= SWAPPER_CTRL_XMSI_SE;
L
Linus Torvalds 已提交
3537 3538 3539 3540
	writeq(val64, &bar0->swapper_ctrl);
#endif
	val64 = readq(&bar0->swapper_ctrl);

3541 3542
	/*
	 * Verifying if endian settings are accurate by reading a
L
Linus Torvalds 已提交
3543 3544 3545 3546 3547 3548 3549 3550 3551 3552 3553 3554 3555 3556 3557
	 * feedback register.
	 */
	val64 = readq(&bar0->pif_rd_swapper_fb);
	if (val64 != 0x0123456789ABCDEFULL) {
		/* Endian settings are incorrect, calls for another dekko. */
		DBG_PRINT(ERR_DBG, "%s: Endian settings are wrong, ",
			  dev->name);
		DBG_PRINT(ERR_DBG, "feedback read %llx\n",
			  (unsigned long long) val64);
		return FAILURE;
	}

	return SUCCESS;
}

R
Ralf Baechle 已提交
3558
static int wait_for_msix_trans(struct s2io_nic *nic, int i)
3559
{
R
Ralf Baechle 已提交
3560
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3561 3562 3563 3564 3565 3566 3567 3568 3569 3570 3571 3572 3573 3574 3575 3576 3577 3578
	u64 val64;
	int ret = 0, cnt = 0;

	do {
		val64 = readq(&bar0->xmsi_access);
		if (!(val64 & BIT(15)))
			break;
		mdelay(1);
		cnt++;
	} while(cnt < 5);
	if (cnt == 5) {
		DBG_PRINT(ERR_DBG, "XMSI # %d Access failed\n", i);
		ret = 1;
	}

	return ret;
}

R
Ralf Baechle 已提交
3579
static void restore_xmsi_data(struct s2io_nic *nic)
3580
{
R
Ralf Baechle 已提交
3581
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3582 3583 3584
	u64 val64;
	int i;

3585
	for (i=0; i < MAX_REQUESTED_MSI_X; i++) {
3586 3587 3588 3589 3590 3591 3592 3593 3594 3595 3596
		writeq(nic->msix_info[i].addr, &bar0->xmsi_address);
		writeq(nic->msix_info[i].data, &bar0->xmsi_data);
		val64 = (BIT(7) | BIT(15) | vBIT(i, 26, 6));
		writeq(val64, &bar0->xmsi_access);
		if (wait_for_msix_trans(nic, i)) {
			DBG_PRINT(ERR_DBG, "failed in %s\n", __FUNCTION__);
			continue;
		}
	}
}

R
Ralf Baechle 已提交
3597
static void store_xmsi_data(struct s2io_nic *nic)
3598
{
R
Ralf Baechle 已提交
3599
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3600 3601 3602 3603
	u64 val64, addr, data;
	int i;

	/* Store and display */
3604
	for (i=0; i < MAX_REQUESTED_MSI_X; i++) {
3605 3606 3607 3608 3609 3610 3611 3612 3613 3614 3615 3616 3617 3618 3619
		val64 = (BIT(15) | vBIT(i, 26, 6));
		writeq(val64, &bar0->xmsi_access);
		if (wait_for_msix_trans(nic, i)) {
			DBG_PRINT(ERR_DBG, "failed in %s\n", __FUNCTION__);
			continue;
		}
		addr = readq(&bar0->xmsi_address);
		data = readq(&bar0->xmsi_data);
		if (addr && data) {
			nic->msix_info[i].addr = addr;
			nic->msix_info[i].data = data;
		}
	}
}

R
Ralf Baechle 已提交
3620
static int s2io_enable_msi_x(struct s2io_nic *nic)
3621
{
R
Ralf Baechle 已提交
3622
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3623 3624 3625 3626
	u64 tx_mat, rx_mat;
	u16 msi_control; /* Temp variable */
	int ret, i, j, msix_indx = 1;

3627
	nic->entries = kcalloc(MAX_REQUESTED_MSI_X, sizeof(struct msix_entry),
3628
			       GFP_KERNEL);
3629
	if (!nic->entries) {
3630 3631
		DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n", \
			__FUNCTION__);
3632
		nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
3633 3634
		return -ENOMEM;
	}
3635
	nic->mac_control.stats_info->sw_stat.mem_allocated
3636
		+= (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry));
3637 3638

	nic->s2io_entries =
3639
		kcalloc(MAX_REQUESTED_MSI_X, sizeof(struct s2io_msix_entry),
3640
				   GFP_KERNEL);
3641
	if (!nic->s2io_entries) {
3642
		DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n",
3643
			__FUNCTION__);
3644
		nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
3645
		kfree(nic->entries);
3646
		nic->mac_control.stats_info->sw_stat.mem_freed
3647
			+= (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry));
3648 3649
		return -ENOMEM;
	}
3650
	 nic->mac_control.stats_info->sw_stat.mem_allocated
3651
		+= (MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry));
3652 3653 3654 3655 3656 3657 3658 3659 3660 3661 3662 3663 3664 3665 3666 3667 3668

	for (i=0; i< MAX_REQUESTED_MSI_X; i++) {
		nic->entries[i].entry = i;
		nic->s2io_entries[i].entry = i;
		nic->s2io_entries[i].arg = NULL;
		nic->s2io_entries[i].in_use = 0;
	}

	tx_mat = readq(&bar0->tx_mat0_n[0]);
	for (i=0; i<nic->config.tx_fifo_num; i++, msix_indx++) {
		tx_mat |= TX_MAT_SET(i, msix_indx);
		nic->s2io_entries[msix_indx].arg = &nic->mac_control.fifos[i];
		nic->s2io_entries[msix_indx].type = MSIX_FIFO_TYPE;
		nic->s2io_entries[msix_indx].in_use = MSIX_FLG;
	}
	writeq(tx_mat, &bar0->tx_mat0_n[0]);

3669 3670 3671 3672 3673 3674 3675
	rx_mat = readq(&bar0->rx_mat);
	for (j = 0; j < nic->config.rx_ring_num; j++, msix_indx++) {
		rx_mat |= RX_MAT_SET(j, msix_indx);
		nic->s2io_entries[msix_indx].arg
			= &nic->mac_control.rings[j];
		nic->s2io_entries[msix_indx].type = MSIX_RING_TYPE;
		nic->s2io_entries[msix_indx].in_use = MSIX_FLG;
3676
	}
3677
	writeq(rx_mat, &bar0->rx_mat);
3678

A
Ananda Raju 已提交
3679
	nic->avail_msix_vectors = 0;
3680
	ret = pci_enable_msix(nic->pdev, nic->entries, MAX_REQUESTED_MSI_X);
A
Ananda Raju 已提交
3681 3682 3683 3684 3685
	/* We fail init if error or we get less vectors than min required */
	if (ret >= (nic->config.tx_fifo_num + nic->config.rx_ring_num + 1)) {
		nic->avail_msix_vectors = ret;
		ret = pci_enable_msix(nic->pdev, nic->entries, ret);
	}
3686 3687 3688
	if (ret) {
		DBG_PRINT(ERR_DBG, "%s: Enabling MSIX failed\n", nic->dev->name);
		kfree(nic->entries);
3689
		nic->mac_control.stats_info->sw_stat.mem_freed
3690
			+= (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry));
3691
		kfree(nic->s2io_entries);
3692
		nic->mac_control.stats_info->sw_stat.mem_freed
3693
		+= (MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry));
3694 3695
		nic->entries = NULL;
		nic->s2io_entries = NULL;
A
Ananda Raju 已提交
3696
		nic->avail_msix_vectors = 0;
3697 3698
		return -ENOMEM;
	}
A
Ananda Raju 已提交
3699 3700
	if (!nic->avail_msix_vectors)
		nic->avail_msix_vectors = MAX_REQUESTED_MSI_X;
3701 3702 3703 3704 3705 3706 3707 3708 3709 3710 3711 3712

	/*
	 * To enable MSI-X, MSI also needs to be enabled, due to a bug
	 * in the herc NIC. (Temp change, needs to be removed later)
	 */
	pci_read_config_word(nic->pdev, 0x42, &msi_control);
	msi_control |= 0x1; /* Enable MSI */
	pci_write_config_word(nic->pdev, 0x42, msi_control);

	return 0;
}

3713 3714 3715 3716 3717 3718 3719 3720 3721 3722 3723 3724 3725 3726 3727 3728 3729 3730 3731 3732 3733 3734 3735 3736 3737 3738 3739 3740 3741 3742 3743 3744 3745 3746 3747 3748 3749 3750 3751 3752 3753 3754 3755 3756 3757 3758 3759 3760 3761 3762 3763 3764 3765
/* Handle software interrupt used during MSI(X) test */
static irqreturn_t __devinit s2io_test_intr(int irq, void *dev_id)
{
	struct s2io_nic *sp = dev_id;

	sp->msi_detected = 1;
	wake_up(&sp->msi_wait);

	return IRQ_HANDLED;
}

/* Test interrupt path by forcing a a software IRQ */
static int __devinit s2io_test_msi(struct s2io_nic *sp)
{
	struct pci_dev *pdev = sp->pdev;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
	int err;
	u64 val64, saved64;

	err = request_irq(sp->entries[1].vector, s2io_test_intr, 0,
			sp->name, sp);
	if (err) {
		DBG_PRINT(ERR_DBG, "%s: PCI %s: cannot assign irq %d\n",
		       sp->dev->name, pci_name(pdev), pdev->irq);
		return err;
	}

	init_waitqueue_head (&sp->msi_wait);
	sp->msi_detected = 0;

	saved64 = val64 = readq(&bar0->scheduled_int_ctrl);
	val64 |= SCHED_INT_CTRL_ONE_SHOT;
	val64 |= SCHED_INT_CTRL_TIMER_EN;
	val64 |= SCHED_INT_CTRL_INT2MSI(1);
	writeq(val64, &bar0->scheduled_int_ctrl);

	wait_event_timeout(sp->msi_wait, sp->msi_detected, HZ/10);

	if (!sp->msi_detected) {
		/* MSI(X) test failed, go back to INTx mode */
		DBG_PRINT(ERR_DBG, "%s: PCI %s: No interrupt was generated"
			"using MSI(X) during test\n", sp->dev->name,
			pci_name(pdev));

		err = -EOPNOTSUPP;
	}

	free_irq(sp->entries[1].vector, sp);

	writeq(saved64, &bar0->scheduled_int_ctrl);

	return err;
}
L
Linus Torvalds 已提交
3766 3767 3768 3769
/* ********************************************************* *
 * Functions defined below concern the OS part of the driver *
 * ********************************************************* */

3770
/**
L
Linus Torvalds 已提交
3771 3772 3773 3774 3775
 *  s2io_open - open entry point of the driver
 *  @dev : pointer to the device structure.
 *  Description:
 *  This function is the open entry point of the driver. It mainly calls a
 *  function to allocate Rx buffers and inserts them into the buffer
3776
 *  descriptors and then enables the Rx part of the NIC.
L
Linus Torvalds 已提交
3777 3778 3779 3780 3781
 *  Return value:
 *  0 on success and an appropriate (-)ve integer as defined in errno.h
 *   file on failure.
 */

3782
static int s2io_open(struct net_device *dev)
L
Linus Torvalds 已提交
3783
{
R
Ralf Baechle 已提交
3784
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
3785 3786
	int err = 0;

3787 3788
	/*
	 * Make sure you have link off by default every time
L
Linus Torvalds 已提交
3789 3790 3791
	 * Nic is initialized
	 */
	netif_carrier_off(dev);
3792
	sp->last_link_state = 0;
L
Linus Torvalds 已提交
3793

3794 3795
	napi_enable(&sp->napi);

3796
	if (sp->config.intr_type == MSI_X) {
3797 3798 3799 3800 3801 3802 3803 3804 3805 3806 3807 3808 3809 3810 3811 3812 3813 3814 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824 3825 3826 3827
		int ret = s2io_enable_msi_x(sp);

		if (!ret) {
			u16 msi_control;

			ret = s2io_test_msi(sp);

			/* rollback MSI-X, will re-enable during add_isr() */
			kfree(sp->entries);
			sp->mac_control.stats_info->sw_stat.mem_freed +=
				(MAX_REQUESTED_MSI_X *
				sizeof(struct msix_entry));
			kfree(sp->s2io_entries);
			sp->mac_control.stats_info->sw_stat.mem_freed +=
				(MAX_REQUESTED_MSI_X *
				sizeof(struct s2io_msix_entry));
			sp->entries = NULL;
			sp->s2io_entries = NULL;

			pci_read_config_word(sp->pdev, 0x42, &msi_control);
			msi_control &= 0xFFFE; /* Disable MSI */
			pci_write_config_word(sp->pdev, 0x42, msi_control);

			pci_disable_msix(sp->pdev);

		}
		if (ret) {

			DBG_PRINT(ERR_DBG,
			  "%s: MSI-X requested but failed to enable\n",
			  dev->name);
3828
			sp->config.intr_type = INTA;
3829 3830 3831
		}
	}

3832
	/* NAPI doesn't work well with MSI(X) */
3833
	 if (sp->config.intr_type != INTA) {
3834 3835 3836 3837
		if(sp->config.napi)
			sp->config.napi = 0;
	}

L
Linus Torvalds 已提交
3838
	/* Initialize H/W and enable interrupts */
A
Ananda Raju 已提交
3839 3840
	err = s2io_card_up(sp);
	if (err) {
L
Linus Torvalds 已提交
3841 3842
		DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
			  dev->name);
A
Ananda Raju 已提交
3843
		goto hw_init_failed;
L
Linus Torvalds 已提交
3844 3845 3846 3847
	}

	if (s2io_set_mac_addr(dev, dev->dev_addr) == FAILURE) {
		DBG_PRINT(ERR_DBG, "Set Mac Address Failed\n");
A
Ananda Raju 已提交
3848
		s2io_card_down(sp);
3849
		err = -ENODEV;
A
Ananda Raju 已提交
3850
		goto hw_init_failed;
L
Linus Torvalds 已提交
3851 3852 3853 3854
	}

	netif_start_queue(dev);
	return 0;
3855 3856

hw_init_failed:
3857
	napi_disable(&sp->napi);
3858
	if (sp->config.intr_type == MSI_X) {
3859
		if (sp->entries) {
3860
			kfree(sp->entries);
3861
			sp->mac_control.stats_info->sw_stat.mem_freed
3862 3863 3864
			+= (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry));
		}
		if (sp->s2io_entries) {
3865
			kfree(sp->s2io_entries);
3866
			sp->mac_control.stats_info->sw_stat.mem_freed
3867 3868
			+= (MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry));
		}
3869
	}
3870
	return err;
L
Linus Torvalds 已提交
3871 3872 3873 3874 3875 3876 3877 3878 3879 3880 3881 3882 3883 3884 3885
}

/**
 *  s2io_close -close entry point of the driver
 *  @dev : device pointer.
 *  Description:
 *  This is the stop entry point of the driver. It needs to undo exactly
 *  whatever was done by the open entry point,thus it's usually referred to
 *  as the close function.Among other things this function mainly stops the
 *  Rx side of the NIC and frees all the Rx buffers in the Rx rings.
 *  Return value:
 *  0 on success and an appropriate (-)ve integer as defined in errno.h
 *  file on failure.
 */

3886
static int s2io_close(struct net_device *dev)
L
Linus Torvalds 已提交
3887
{
R
Ralf Baechle 已提交
3888
	struct s2io_nic *sp = dev->priv;
3889

L
Linus Torvalds 已提交
3890
	netif_stop_queue(dev);
3891
	napi_disable(&sp->napi);
L
Linus Torvalds 已提交
3892
	/* Reset card, kill tasklet and free Tx and Rx buffers. */
A
Ananda Raju 已提交
3893
	s2io_card_down(sp);
3894

L
Linus Torvalds 已提交
3895 3896 3897 3898 3899 3900 3901 3902 3903 3904 3905 3906 3907 3908 3909 3910
	return 0;
}

/**
 *  s2io_xmit - Tx entry point of te driver
 *  @skb : the socket buffer containing the Tx data.
 *  @dev : device pointer.
 *  Description :
 *  This function is the Tx entry point of the driver. S2IO NIC supports
 *  certain protocol assist features on Tx side, namely  CSO, S/G, LSO.
 *  NOTE: when device cant queue the pkt,just the trans_start variable will
 *  not be upadted.
 *  Return value:
 *  0 on success & 1 on failure.
 */

3911
static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
L
Linus Torvalds 已提交
3912
{
R
Ralf Baechle 已提交
3913
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
3914 3915
	u16 frg_cnt, frg_len, i, queue, queue_len, put_off, get_off;
	register u64 val64;
R
Ralf Baechle 已提交
3916 3917
	struct TxD *txdp;
	struct TxFIFO_element __iomem *tx_fifo;
L
Linus Torvalds 已提交
3918
	unsigned long flags;
3919 3920
	u16 vlan_tag = 0;
	int vlan_priority = 0;
R
Ralf Baechle 已提交
3921
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
3922
	struct config_param *config;
3923
	int offload_type;
3924
	struct swStat *stats = &sp->mac_control.stats_info->sw_stat;
L
Linus Torvalds 已提交
3925 3926 3927 3928

	mac_control = &sp->mac_control;
	config = &sp->config;

3929
	DBG_PRINT(TX_DBG, "%s: In Neterion Tx routine\n", dev->name);
3930 3931 3932 3933 3934 3935 3936

	if (unlikely(skb->len <= 0)) {
		DBG_PRINT(TX_DBG, "%s:Buffer has no data..\n", dev->name);
		dev_kfree_skb_any(skb);
		return 0;
}

L
Linus Torvalds 已提交
3937
	spin_lock_irqsave(&sp->tx_lock, flags);
3938
	if (!is_s2io_card_up(sp)) {
3939
		DBG_PRINT(TX_DBG, "%s: Card going down for reset\n",
L
Linus Torvalds 已提交
3940 3941
			  dev->name);
		spin_unlock_irqrestore(&sp->tx_lock, flags);
3942 3943
		dev_kfree_skb(skb);
		return 0;
L
Linus Torvalds 已提交
3944 3945 3946
	}

	queue = 0;
3947 3948 3949 3950 3951 3952 3953
	/* Get Fifo number to Transmit based on vlan priority */
	if (sp->vlgrp && vlan_tx_tag_present(skb)) {
		vlan_tag = vlan_tx_tag_get(skb);
		vlan_priority = vlan_tag >> 13;
		queue = config->fifo_mapping[vlan_priority];
	}

3954 3955
	put_off = (u16) mac_control->fifos[queue].tx_curr_put_info.offset;
	get_off = (u16) mac_control->fifos[queue].tx_curr_get_info.offset;
R
Ralf Baechle 已提交
3956
	txdp = (struct TxD *) mac_control->fifos[queue].list_info[put_off].
3957 3958 3959
		list_virt_addr;

	queue_len = mac_control->fifos[queue].tx_curr_put_info.fifo_len + 1;
L
Linus Torvalds 已提交
3960
	/* Avoid "put" pointer going beyond "get" pointer */
3961 3962
	if (txdp->Host_Control ||
		   ((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
3963
		DBG_PRINT(TX_DBG, "Error in xmit, No free TXDs.\n");
L
Linus Torvalds 已提交
3964 3965 3966 3967 3968
		netif_stop_queue(dev);
		dev_kfree_skb(skb);
		spin_unlock_irqrestore(&sp->tx_lock, flags);
		return 0;
	}
3969

3970 3971
	offload_type = s2io_offload_type(skb);
	if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
L
Linus Torvalds 已提交
3972
		txdp->Control_1 |= TXD_TCP_LSO_EN;
3973
		txdp->Control_1 |= TXD_TCP_LSO_MSS(s2io_tcp_mss(skb));
L
Linus Torvalds 已提交
3974
	}
3975
	if (skb->ip_summed == CHECKSUM_PARTIAL) {
L
Linus Torvalds 已提交
3976 3977 3978 3979
		txdp->Control_2 |=
		    (TXD_TX_CKO_IPV4_EN | TXD_TX_CKO_TCP_EN |
		     TXD_TX_CKO_UDP_EN);
	}
A
Ananda Raju 已提交
3980 3981
	txdp->Control_1 |= TXD_GATHER_CODE_FIRST;
	txdp->Control_1 |= TXD_LIST_OWN_XENA;
L
Linus Torvalds 已提交
3982
	txdp->Control_2 |= config->tx_intr_type;
3983

3984 3985 3986 3987 3988
	if (sp->vlgrp && vlan_tx_tag_present(skb)) {
		txdp->Control_2 |= TXD_VLAN_ENABLE;
		txdp->Control_2 |= TXD_VLAN_TAG(vlan_tag);
	}

A
Ananda Raju 已提交
3989
	frg_len = skb->len - skb->data_len;
3990
	if (offload_type == SKB_GSO_UDP) {
A
Ananda Raju 已提交
3991 3992
		int ufo_size;

3993
		ufo_size = s2io_udp_mss(skb);
A
Ananda Raju 已提交
3994 3995 3996 3997 3998 3999 4000 4001 4002 4003 4004 4005 4006 4007 4008
		ufo_size &= ~7;
		txdp->Control_1 |= TXD_UFO_EN;
		txdp->Control_1 |= TXD_UFO_MSS(ufo_size);
		txdp->Control_1 |= TXD_BUFFER0_SIZE(8);
#ifdef __BIG_ENDIAN
		sp->ufo_in_band_v[put_off] =
				(u64)skb_shinfo(skb)->ip6_frag_id;
#else
		sp->ufo_in_band_v[put_off] =
				(u64)skb_shinfo(skb)->ip6_frag_id << 32;
#endif
		txdp->Host_Control = (unsigned long)sp->ufo_in_band_v;
		txdp->Buffer_Pointer = pci_map_single(sp->pdev,
					sp->ufo_in_band_v,
					sizeof(u64), PCI_DMA_TODEVICE);
4009 4010 4011
		if((txdp->Buffer_Pointer == 0) ||
			(txdp->Buffer_Pointer == DMA_ERROR_CODE))
			goto pci_map_failed;
A
Ananda Raju 已提交
4012 4013
		txdp++;
	}
L
Linus Torvalds 已提交
4014

A
Ananda Raju 已提交
4015 4016
	txdp->Buffer_Pointer = pci_map_single
	    (sp->pdev, skb->data, frg_len, PCI_DMA_TODEVICE);
4017 4018 4019 4020
	if((txdp->Buffer_Pointer == 0) ||
		(txdp->Buffer_Pointer == DMA_ERROR_CODE))
		goto pci_map_failed;

A
Ananda Raju 已提交
4021 4022
	txdp->Host_Control = (unsigned long) skb;
	txdp->Control_1 |= TXD_BUFFER0_SIZE(frg_len);
4023
	if (offload_type == SKB_GSO_UDP)
A
Ananda Raju 已提交
4024 4025 4026
		txdp->Control_1 |= TXD_UFO_EN;

	frg_cnt = skb_shinfo(skb)->nr_frags;
L
Linus Torvalds 已提交
4027 4028 4029
	/* For fragmented SKB. */
	for (i = 0; i < frg_cnt; i++) {
		skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
4030 4031 4032
		/* A '0' length fragment will be ignored */
		if (!frag->size)
			continue;
L
Linus Torvalds 已提交
4033 4034 4035 4036
		txdp++;
		txdp->Buffer_Pointer = (u64) pci_map_page
		    (sp->pdev, frag->page, frag->page_offset,
		     frag->size, PCI_DMA_TODEVICE);
4037
		txdp->Control_1 = TXD_BUFFER0_SIZE(frag->size);
4038
		if (offload_type == SKB_GSO_UDP)
A
Ananda Raju 已提交
4039
			txdp->Control_1 |= TXD_UFO_EN;
L
Linus Torvalds 已提交
4040 4041 4042
	}
	txdp->Control_1 |= TXD_GATHER_CODE_LAST;

4043
	if (offload_type == SKB_GSO_UDP)
A
Ananda Raju 已提交
4044 4045
		frg_cnt++; /* as Txd0 was used for inband header */

L
Linus Torvalds 已提交
4046
	tx_fifo = mac_control->tx_FIFO_start[queue];
4047
	val64 = mac_control->fifos[queue].list_info[put_off].list_phy_addr;
L
Linus Torvalds 已提交
4048 4049 4050 4051
	writeq(val64, &tx_fifo->TxDL_Pointer);

	val64 = (TX_FIFO_LAST_TXD_NUM(frg_cnt) | TX_FIFO_FIRST_LIST |
		 TX_FIFO_LAST_LIST);
4052
	if (offload_type)
A
Ananda Raju 已提交
4053
		val64 |= TX_FIFO_SPECIAL_FUNC;
4054

L
Linus Torvalds 已提交
4055 4056
	writeq(val64, &tx_fifo->List_Control);

4057 4058
	mmiowb();

L
Linus Torvalds 已提交
4059
	put_off++;
4060 4061
	if (put_off == mac_control->fifos[queue].tx_curr_put_info.fifo_len + 1)
		put_off = 0;
4062
	mac_control->fifos[queue].tx_curr_put_info.offset = put_off;
L
Linus Torvalds 已提交
4063 4064

	/* Avoid "put" pointer going beyond "get" pointer */
4065
	if (((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
4066
		sp->mac_control.stats_info->sw_stat.fifo_full_cnt++;
L
Linus Torvalds 已提交
4067 4068 4069 4070 4071
		DBG_PRINT(TX_DBG,
			  "No free TxDs for xmit, Put: 0x%x Get:0x%x\n",
			  put_off, get_off);
		netif_stop_queue(dev);
	}
4072
	mac_control->stats_info->sw_stat.mem_allocated += skb->truesize;
L
Linus Torvalds 已提交
4073 4074 4075
	dev->trans_start = jiffies;
	spin_unlock_irqrestore(&sp->tx_lock, flags);

4076 4077 4078 4079 4080 4081 4082
	return 0;
pci_map_failed:
	stats->pci_map_fail_cnt++;
	netif_stop_queue(dev);
	stats->mem_freed += skb->truesize;
	dev_kfree_skb(skb);
	spin_unlock_irqrestore(&sp->tx_lock, flags);
L
Linus Torvalds 已提交
4083 4084 4085
	return 0;
}

4086 4087 4088
static void
s2io_alarm_handle(unsigned long data)
{
R
Ralf Baechle 已提交
4089
	struct s2io_nic *sp = (struct s2io_nic *)data;
4090
	struct net_device *dev = sp->dev;
4091

4092
	s2io_handle_errors(dev);
4093 4094 4095
	mod_timer(&sp->alarm_timer, jiffies + HZ / 2);
}

R
Ralf Baechle 已提交
4096
static int s2io_chk_rx_buffers(struct s2io_nic *sp, int rng_n)
4097 4098 4099 4100 4101 4102 4103 4104 4105 4106 4107 4108
{
	int rxb_size, level;

	if (!sp->lro) {
		rxb_size = atomic_read(&sp->rx_bufs_left[rng_n]);
		level = rx_buffer_level(sp, rxb_size, rng_n);

		if ((level == PANIC) && (!TASKLET_IN_USE)) {
			int ret;
			DBG_PRINT(INTR_DBG, "%s: Rx BD hit ", __FUNCTION__);
			DBG_PRINT(INTR_DBG, "PANIC levels\n");
			if ((ret = fill_rx_buffers(sp, rng_n)) == -ENOMEM) {
4109
				DBG_PRINT(INFO_DBG, "Out of memory in %s",
4110 4111 4112 4113 4114 4115 4116 4117 4118
					  __FUNCTION__);
				clear_bit(0, (&sp->tasklet_status));
				return -1;
			}
			clear_bit(0, (&sp->tasklet_status));
		} else if (level == LOW)
			tasklet_schedule(&sp->task);

	} else if (fill_rx_buffers(sp, rng_n) == -ENOMEM) {
4119 4120
			DBG_PRINT(INFO_DBG, "%s:Out of memory", sp->dev->name);
			DBG_PRINT(INFO_DBG, " in Rx Intr!!\n");
4121 4122 4123 4124
	}
	return 0;
}

4125
static irqreturn_t s2io_msix_ring_handle(int irq, void *dev_id)
4126
{
R
Ralf Baechle 已提交
4127 4128
	struct ring_info *ring = (struct ring_info *)dev_id;
	struct s2io_nic *sp = ring->nic;
4129

4130
	if (!is_s2io_card_up(sp))
4131 4132
		return IRQ_HANDLED;

4133 4134
	rx_intr_handler(ring);
	s2io_chk_rx_buffers(sp, ring->ring_no);
4135

4136 4137 4138
	return IRQ_HANDLED;
}

4139
static irqreturn_t s2io_msix_fifo_handle(int irq, void *dev_id)
4140
{
R
Ralf Baechle 已提交
4141 4142
	struct fifo_info *fifo = (struct fifo_info *)dev_id;
	struct s2io_nic *sp = fifo->nic;
4143

4144
	if (!is_s2io_card_up(sp))
4145 4146
		return IRQ_HANDLED;

4147 4148 4149
	tx_intr_handler(fifo);
	return IRQ_HANDLED;
}
R
Ralf Baechle 已提交
4150
static void s2io_txpic_intr_handle(struct s2io_nic *sp)
4151
{
R
Ralf Baechle 已提交
4152
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
4153 4154 4155 4156 4157 4158 4159
	u64 val64;

	val64 = readq(&bar0->pic_int_status);
	if (val64 & PIC_INT_GPIO) {
		val64 = readq(&bar0->gpio_int_reg);
		if ((val64 & GPIO_INT_REG_LINK_DOWN) &&
		    (val64 & GPIO_INT_REG_LINK_UP)) {
A
Ananda Raju 已提交
4160 4161 4162 4163
			/*
			 * This is unstable state so clear both up/down
			 * interrupt and adapter to re-evaluate the link state.
			 */
4164 4165 4166 4167
			val64 |=  GPIO_INT_REG_LINK_DOWN;
			val64 |= GPIO_INT_REG_LINK_UP;
			writeq(val64, &bar0->gpio_int_reg);
			val64 = readq(&bar0->gpio_int_mask);
A
Ananda Raju 已提交
4168 4169
			val64 &= ~(GPIO_INT_MASK_LINK_UP |
				   GPIO_INT_MASK_LINK_DOWN);
4170 4171
			writeq(val64, &bar0->gpio_int_mask);
		}
A
Ananda Raju 已提交
4172 4173 4174
		else if (val64 & GPIO_INT_REG_LINK_UP) {
			val64 = readq(&bar0->adapter_status);
				/* Enable Adapter */
4175 4176 4177 4178 4179 4180 4181
			val64 = readq(&bar0->adapter_control);
			val64 |= ADAPTER_CNTL_EN;
			writeq(val64, &bar0->adapter_control);
			val64 |= ADAPTER_LED_ON;
			writeq(val64, &bar0->adapter_control);
			if (!sp->device_enabled_once)
				sp->device_enabled_once = 1;
A
Ananda Raju 已提交
4182

4183 4184 4185 4186 4187 4188 4189 4190 4191
			s2io_link(sp, LINK_UP);
			/*
			 * unmask link down interrupt and mask link-up
			 * intr
			 */
			val64 = readq(&bar0->gpio_int_mask);
			val64 &= ~GPIO_INT_MASK_LINK_DOWN;
			val64 |= GPIO_INT_MASK_LINK_UP;
			writeq(val64, &bar0->gpio_int_mask);
A
Ananda Raju 已提交
4192 4193 4194

		}else if (val64 & GPIO_INT_REG_LINK_DOWN) {
			val64 = readq(&bar0->adapter_status);
4195 4196 4197 4198 4199 4200
			s2io_link(sp, LINK_DOWN);
			/* Link is down so unmaks link up interrupt */
			val64 = readq(&bar0->gpio_int_mask);
			val64 &= ~GPIO_INT_MASK_LINK_UP;
			val64 |= GPIO_INT_MASK_LINK_DOWN;
			writeq(val64, &bar0->gpio_int_mask);
4201 4202 4203 4204 4205

			/* turn off LED */
			val64 = readq(&bar0->adapter_control);
			val64 = val64 &(~ADAPTER_LED_ON);
			writeq(val64, &bar0->adapter_control);
4206 4207
		}
	}
A
Ananda Raju 已提交
4208
	val64 = readq(&bar0->gpio_int_mask);
4209 4210
}

4211 4212 4213 4214 4215 4216 4217 4218 4219 4220 4221 4222 4223 4224 4225 4226 4227 4228 4229 4230 4231 4232 4233 4234 4235 4236 4237 4238 4239 4240 4241 4242 4243 4244 4245 4246 4247 4248 4249 4250 4251 4252 4253
/**
 *  do_s2io_chk_alarm_bit - Check for alarm and incrment the counter
 *  @value: alarm bits
 *  @addr: address value
 *  @cnt: counter variable
 *  Description: Check for alarm and increment the counter
 *  Return Value:
 *  1 - if alarm bit set
 *  0 - if alarm bit is not set
 */
int do_s2io_chk_alarm_bit(u64 value, void __iomem * addr,
			  unsigned long long *cnt)
{
	u64 val64;
	val64 = readq(addr);
	if ( val64 & value ) {
		writeq(val64, addr);
		(*cnt)++;
		return 1;
	}
	return 0;

}

/**
 *  s2io_handle_errors - Xframe error indication handler
 *  @nic: device private variable
 *  Description: Handle alarms such as loss of link, single or
 *  double ECC errors, critical and serious errors.
 *  Return Value:
 *  NONE
 */
static void s2io_handle_errors(void * dev_id)
{
	struct net_device *dev = (struct net_device *) dev_id;
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
	u64 temp64 = 0,val64=0;
	int i = 0;

	struct swStat *sw_stat = &sp->mac_control.stats_info->sw_stat;
	struct xpakStat *stats = &sp->mac_control.stats_info->xpak_stat;

4254
	if (!is_s2io_card_up(sp))
4255 4256 4257 4258 4259 4260 4261 4262 4263 4264 4265 4266 4267 4268 4269 4270 4271 4272 4273 4274 4275 4276 4277 4278 4279 4280 4281 4282 4283 4284 4285 4286 4287 4288 4289 4290 4291 4292 4293 4294 4295 4296 4297 4298 4299 4300 4301 4302 4303 4304 4305 4306 4307 4308 4309 4310 4311 4312 4313 4314 4315 4316 4317 4318 4319 4320 4321 4322 4323 4324 4325 4326 4327 4328 4329 4330 4331 4332 4333 4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344 4345 4346 4347 4348 4349 4350 4351 4352 4353 4354 4355 4356 4357 4358 4359 4360 4361 4362 4363 4364 4365 4366 4367 4368 4369 4370 4371 4372 4373 4374 4375 4376 4377 4378 4379 4380 4381 4382 4383 4384 4385 4386 4387 4388 4389 4390 4391 4392 4393 4394 4395 4396 4397 4398 4399 4400 4401 4402 4403 4404 4405 4406 4407 4408 4409 4410 4411 4412 4413 4414 4415 4416 4417 4418 4419 4420 4421 4422 4423 4424 4425 4426 4427 4428 4429 4430 4431 4432 4433 4434 4435 4436 4437 4438 4439 4440 4441 4442 4443 4444 4445 4446 4447 4448 4449 4450 4451 4452 4453 4454 4455 4456 4457 4458 4459 4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472 4473 4474 4475 4476 4477 4478 4479 4480 4481 4482 4483 4484 4485 4486 4487 4488 4489 4490 4491 4492 4493 4494 4495 4496
		return;

	if (pci_channel_offline(sp->pdev))
		return;

	memset(&sw_stat->ring_full_cnt, 0,
		sizeof(sw_stat->ring_full_cnt));

	/* Handling the XPAK counters update */
	if(stats->xpak_timer_count < 72000) {
		/* waiting for an hour */
		stats->xpak_timer_count++;
	} else {
		s2io_updt_xpak_counter(dev);
		/* reset the count to zero */
		stats->xpak_timer_count = 0;
	}

	/* Handling link status change error Intr */
	if (s2io_link_fault_indication(sp) == MAC_RMAC_ERR_TIMER) {
		val64 = readq(&bar0->mac_rmac_err_reg);
		writeq(val64, &bar0->mac_rmac_err_reg);
		if (val64 & RMAC_LINK_STATE_CHANGE_INT)
			schedule_work(&sp->set_link_task);
	}

	/* In case of a serious error, the device will be Reset. */
	if (do_s2io_chk_alarm_bit(SERR_SOURCE_ANY, &bar0->serr_source,
				&sw_stat->serious_err_cnt))
		goto reset;

	/* Check for data parity error */
	if (do_s2io_chk_alarm_bit(GPIO_INT_REG_DP_ERR_INT, &bar0->gpio_int_reg,
				&sw_stat->parity_err_cnt))
		goto reset;

	/* Check for ring full counter */
	if (sp->device_type == XFRAME_II_DEVICE) {
		val64 = readq(&bar0->ring_bump_counter1);
		for (i=0; i<4; i++) {
			temp64 = ( val64 & vBIT(0xFFFF,(i*16),16));
			temp64 >>= 64 - ((i+1)*16);
			sw_stat->ring_full_cnt[i] += temp64;
		}

		val64 = readq(&bar0->ring_bump_counter2);
		for (i=0; i<4; i++) {
			temp64 = ( val64 & vBIT(0xFFFF,(i*16),16));
			temp64 >>= 64 - ((i+1)*16);
			 sw_stat->ring_full_cnt[i+4] += temp64;
		}
	}

	val64 = readq(&bar0->txdma_int_status);
	/*check for pfc_err*/
	if (val64 & TXDMA_PFC_INT) {
		if (do_s2io_chk_alarm_bit(PFC_ECC_DB_ERR | PFC_SM_ERR_ALARM|
				PFC_MISC_0_ERR | PFC_MISC_1_ERR|
				PFC_PCIX_ERR, &bar0->pfc_err_reg,
				&sw_stat->pfc_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(PFC_ECC_SG_ERR, &bar0->pfc_err_reg,
				&sw_stat->pfc_err_cnt);
	}

	/*check for tda_err*/
	if (val64 & TXDMA_TDA_INT) {
		if(do_s2io_chk_alarm_bit(TDA_Fn_ECC_DB_ERR | TDA_SM0_ERR_ALARM |
				TDA_SM1_ERR_ALARM, &bar0->tda_err_reg,
				&sw_stat->tda_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TDA_Fn_ECC_SG_ERR | TDA_PCIX_ERR,
				&bar0->tda_err_reg, &sw_stat->tda_err_cnt);
	}
	/*check for pcc_err*/
	if (val64 & TXDMA_PCC_INT) {
		if (do_s2io_chk_alarm_bit(PCC_SM_ERR_ALARM | PCC_WR_ERR_ALARM
				| PCC_N_SERR | PCC_6_COF_OV_ERR
				| PCC_7_COF_OV_ERR | PCC_6_LSO_OV_ERR
				| PCC_7_LSO_OV_ERR | PCC_FB_ECC_DB_ERR
				| PCC_TXB_ECC_DB_ERR, &bar0->pcc_err_reg,
				&sw_stat->pcc_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(PCC_FB_ECC_SG_ERR | PCC_TXB_ECC_SG_ERR,
				&bar0->pcc_err_reg, &sw_stat->pcc_err_cnt);
	}

	/*check for tti_err*/
	if (val64 & TXDMA_TTI_INT) {
		if (do_s2io_chk_alarm_bit(TTI_SM_ERR_ALARM, &bar0->tti_err_reg,
				&sw_stat->tti_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TTI_ECC_SG_ERR | TTI_ECC_DB_ERR,
				&bar0->tti_err_reg, &sw_stat->tti_err_cnt);
	}

	/*check for lso_err*/
	if (val64 & TXDMA_LSO_INT) {
		if (do_s2io_chk_alarm_bit(LSO6_ABORT | LSO7_ABORT
				| LSO6_SM_ERR_ALARM | LSO7_SM_ERR_ALARM,
				&bar0->lso_err_reg, &sw_stat->lso_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(LSO6_SEND_OFLOW | LSO7_SEND_OFLOW,
				&bar0->lso_err_reg, &sw_stat->lso_err_cnt);
	}

	/*check for tpa_err*/
	if (val64 & TXDMA_TPA_INT) {
		if (do_s2io_chk_alarm_bit(TPA_SM_ERR_ALARM, &bar0->tpa_err_reg,
			&sw_stat->tpa_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TPA_TX_FRM_DROP, &bar0->tpa_err_reg,
			&sw_stat->tpa_err_cnt);
	}

	/*check for sm_err*/
	if (val64 & TXDMA_SM_INT) {
		if (do_s2io_chk_alarm_bit(SM_SM_ERR_ALARM, &bar0->sm_err_reg,
			&sw_stat->sm_err_cnt))
			goto reset;
	}

	val64 = readq(&bar0->mac_int_status);
	if (val64 & MAC_INT_STATUS_TMAC_INT) {
		if (do_s2io_chk_alarm_bit(TMAC_TX_BUF_OVRN | TMAC_TX_SM_ERR,
				&bar0->mac_tmac_err_reg,
				&sw_stat->mac_tmac_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TMAC_ECC_SG_ERR | TMAC_ECC_DB_ERR
				| TMAC_DESC_ECC_SG_ERR | TMAC_DESC_ECC_DB_ERR,
				&bar0->mac_tmac_err_reg,
				&sw_stat->mac_tmac_err_cnt);
	}

	val64 = readq(&bar0->xgxs_int_status);
	if (val64 & XGXS_INT_STATUS_TXGXS) {
		if (do_s2io_chk_alarm_bit(TXGXS_ESTORE_UFLOW | TXGXS_TX_SM_ERR,
				&bar0->xgxs_txgxs_err_reg,
				&sw_stat->xgxs_txgxs_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TXGXS_ECC_SG_ERR | TXGXS_ECC_DB_ERR,
				&bar0->xgxs_txgxs_err_reg,
				&sw_stat->xgxs_txgxs_err_cnt);
	}

	val64 = readq(&bar0->rxdma_int_status);
	if (val64 & RXDMA_INT_RC_INT_M) {
		if (do_s2io_chk_alarm_bit(RC_PRCn_ECC_DB_ERR | RC_FTC_ECC_DB_ERR
				| RC_PRCn_SM_ERR_ALARM |RC_FTC_SM_ERR_ALARM,
				&bar0->rc_err_reg, &sw_stat->rc_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RC_PRCn_ECC_SG_ERR | RC_FTC_ECC_SG_ERR
				| RC_RDA_FAIL_WR_Rn, &bar0->rc_err_reg,
				&sw_stat->rc_err_cnt);
		if (do_s2io_chk_alarm_bit(PRC_PCI_AB_RD_Rn | PRC_PCI_AB_WR_Rn
				| PRC_PCI_AB_F_WR_Rn, &bar0->prc_pcix_err_reg,
				&sw_stat->prc_pcix_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(PRC_PCI_DP_RD_Rn | PRC_PCI_DP_WR_Rn
				| PRC_PCI_DP_F_WR_Rn, &bar0->prc_pcix_err_reg,
				&sw_stat->prc_pcix_err_cnt);
	}

	if (val64 & RXDMA_INT_RPA_INT_M) {
		if (do_s2io_chk_alarm_bit(RPA_SM_ERR_ALARM | RPA_CREDIT_ERR,
				&bar0->rpa_err_reg, &sw_stat->rpa_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RPA_ECC_SG_ERR | RPA_ECC_DB_ERR,
				&bar0->rpa_err_reg, &sw_stat->rpa_err_cnt);
	}

	if (val64 & RXDMA_INT_RDA_INT_M) {
		if (do_s2io_chk_alarm_bit(RDA_RXDn_ECC_DB_ERR
				| RDA_FRM_ECC_DB_N_AERR | RDA_SM1_ERR_ALARM
				| RDA_SM0_ERR_ALARM | RDA_RXD_ECC_DB_SERR,
				&bar0->rda_err_reg, &sw_stat->rda_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RDA_RXDn_ECC_SG_ERR | RDA_FRM_ECC_SG_ERR
				| RDA_MISC_ERR | RDA_PCIX_ERR,
				&bar0->rda_err_reg, &sw_stat->rda_err_cnt);
	}

	if (val64 & RXDMA_INT_RTI_INT_M) {
		if (do_s2io_chk_alarm_bit(RTI_SM_ERR_ALARM, &bar0->rti_err_reg,
				&sw_stat->rti_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RTI_ECC_SG_ERR | RTI_ECC_DB_ERR,
				&bar0->rti_err_reg, &sw_stat->rti_err_cnt);
	}

	val64 = readq(&bar0->mac_int_status);
	if (val64 & MAC_INT_STATUS_RMAC_INT) {
		if (do_s2io_chk_alarm_bit(RMAC_RX_BUFF_OVRN | RMAC_RX_SM_ERR,
				&bar0->mac_rmac_err_reg,
				&sw_stat->mac_rmac_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RMAC_UNUSED_INT|RMAC_SINGLE_ECC_ERR|
				RMAC_DOUBLE_ECC_ERR, &bar0->mac_rmac_err_reg,
				&sw_stat->mac_rmac_err_cnt);
	}

	val64 = readq(&bar0->xgxs_int_status);
	if (val64 & XGXS_INT_STATUS_RXGXS) {
		if (do_s2io_chk_alarm_bit(RXGXS_ESTORE_OFLOW | RXGXS_RX_SM_ERR,
				&bar0->xgxs_rxgxs_err_reg,
				&sw_stat->xgxs_rxgxs_err_cnt))
			goto reset;
	}

	val64 = readq(&bar0->mc_int_status);
	if(val64 & MC_INT_STATUS_MC_INT) {
		if (do_s2io_chk_alarm_bit(MC_ERR_REG_SM_ERR, &bar0->mc_err_reg,
				&sw_stat->mc_err_cnt))
			goto reset;

		/* Handling Ecc errors */
		if (val64 & (MC_ERR_REG_ECC_ALL_SNG | MC_ERR_REG_ECC_ALL_DBL)) {
			writeq(val64, &bar0->mc_err_reg);
			if (val64 & MC_ERR_REG_ECC_ALL_DBL) {
				sw_stat->double_ecc_errs++;
				if (sp->device_type != XFRAME_II_DEVICE) {
					/*
					 * Reset XframeI only if critical error
					 */
					if (val64 &
						(MC_ERR_REG_MIRI_ECC_DB_ERR_0 |
						MC_ERR_REG_MIRI_ECC_DB_ERR_1))
								goto reset;
					}
			} else
				sw_stat->single_ecc_errs++;
		}
	}
	return;

reset:
	netif_stop_queue(dev);
	schedule_work(&sp->rst_timer_task);
	sw_stat->soft_reset_cnt++;
	return;
}

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Linus Torvalds 已提交
4497 4498 4499 4500
/**
 *  s2io_isr - ISR handler of the device .
 *  @irq: the irq of the device.
 *  @dev_id: a void pointer to the dev structure of the NIC.
4501 4502 4503
 *  Description:  This function is the ISR handler of the device. It
 *  identifies the reason for the interrupt and calls the relevant
 *  service routines. As a contongency measure, this ISR allocates the
L
Linus Torvalds 已提交
4504 4505 4506
 *  recv buffers, if their numbers are below the panic value which is
 *  presently set to 25% of the original number of rcv buffers allocated.
 *  Return value:
4507
 *   IRQ_HANDLED: will be returned if IRQ was handled by this routine
L
Linus Torvalds 已提交
4508 4509
 *   IRQ_NONE: will be returned if interrupt is not from our device
 */
4510
static irqreturn_t s2io_isr(int irq, void *dev_id)
L
Linus Torvalds 已提交
4511 4512
{
	struct net_device *dev = (struct net_device *) dev_id;
R
Ralf Baechle 已提交
4513 4514
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
4515
	int i;
4516
	u64 reason = 0;
R
Ralf Baechle 已提交
4517
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
4518 4519
	struct config_param *config;

4520 4521 4522 4523
	/* Pretend we handled any irq's from a disconnected card */
	if (pci_channel_offline(sp->pdev))
		return IRQ_NONE;

4524
	if (!is_s2io_card_up(sp))
4525 4526
		return IRQ_NONE;

L
Linus Torvalds 已提交
4527 4528 4529
	mac_control = &sp->mac_control;
	config = &sp->config;

4530
	/*
L
Linus Torvalds 已提交
4531 4532 4533 4534 4535 4536 4537 4538
	 * Identify the cause for interrupt and call the appropriate
	 * interrupt handler. Causes for the interrupt could be;
	 * 1. Rx of packet.
	 * 2. Tx complete.
	 * 3. Link down.
	 */
	reason = readq(&bar0->general_int_status);

4539 4540 4541
	if (unlikely(reason == S2IO_MINUS_ONE) ) {
		/* Nothing much can be done. Get out */
		return IRQ_HANDLED;
L
Linus Torvalds 已提交
4542
	}
4543

4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555 4556 4557 4558
	if (reason & (GEN_INTR_RXTRAFFIC |
		GEN_INTR_TXTRAFFIC | GEN_INTR_TXPIC))
	{
		writeq(S2IO_MINUS_ONE, &bar0->general_int_mask);

		if (config->napi) {
			if (reason & GEN_INTR_RXTRAFFIC) {
				if (likely(netif_rx_schedule_prep(dev,
							&sp->napi))) {
					__netif_rx_schedule(dev, &sp->napi);
					writeq(S2IO_MINUS_ONE,
					       &bar0->rx_traffic_mask);
				} else
					writeq(S2IO_MINUS_ONE,
					       &bar0->rx_traffic_int);
4559
			}
4560 4561 4562 4563 4564 4565 4566
		} else {
			/*
			 * rx_traffic_int reg is an R1 register, writing all 1's
			 * will ensure that the actual interrupt causing bit
			 * get's cleared and hence a read can be avoided.
			 */
			if (reason & GEN_INTR_RXTRAFFIC)
4567
				writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int);
4568 4569 4570

			for (i = 0; i < config->rx_ring_num; i++)
				rx_intr_handler(&mac_control->rings[i]);
4571
		}
4572

4573
		/*
4574
		 * tx_traffic_int reg is an R1 register, writing all 1's
4575 4576 4577
		 * will ensure that the actual interrupt causing bit get's
		 * cleared and hence a read can be avoided.
		 */
4578 4579
		if (reason & GEN_INTR_TXTRAFFIC)
			writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int);
4580

4581 4582
		for (i = 0; i < config->tx_fifo_num; i++)
			tx_intr_handler(&mac_control->fifos[i]);
L
Linus Torvalds 已提交
4583

4584 4585
		if (reason & GEN_INTR_TXPIC)
			s2io_txpic_intr_handle(sp);
4586

4587 4588 4589 4590 4591 4592 4593 4594 4595
		/*
		 * Reallocate the buffers from the interrupt handler itself.
		 */
		if (!config->napi) {
			for (i = 0; i < config->rx_ring_num; i++)
				s2io_chk_rx_buffers(sp, i);
		}
		writeq(sp->general_int_mask, &bar0->general_int_mask);
		readl(&bar0->general_int_status);
4596

4597
		return IRQ_HANDLED;
4598

4599 4600 4601 4602 4603
	}
	else if (!reason) {
		/* The interrupt was not raised by us */
		return IRQ_NONE;
	}
4604

L
Linus Torvalds 已提交
4605 4606 4607
	return IRQ_HANDLED;
}

4608 4609 4610
/**
 * s2io_updt_stats -
 */
R
Ralf Baechle 已提交
4611
static void s2io_updt_stats(struct s2io_nic *sp)
4612
{
R
Ralf Baechle 已提交
4613
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
4614 4615 4616
	u64 val64;
	int cnt = 0;

4617
	if (is_s2io_card_up(sp)) {
4618 4619 4620 4621 4622 4623 4624 4625 4626 4627 4628 4629 4630
		/* Apprx 30us on a 133 MHz bus */
		val64 = SET_UPDT_CLICKS(10) |
			STAT_CFG_ONE_SHOT_EN | STAT_CFG_STAT_EN;
		writeq(val64, &bar0->stat_cfg);
		do {
			udelay(100);
			val64 = readq(&bar0->stat_cfg);
			if (!(val64 & BIT(0)))
				break;
			cnt++;
			if (cnt == 5)
				break; /* Updt failed */
		} while(1);
4631
	}
4632 4633
}

L
Linus Torvalds 已提交
4634
/**
4635
 *  s2io_get_stats - Updates the device statistics structure.
L
Linus Torvalds 已提交
4636 4637
 *  @dev : pointer to the device structure.
 *  Description:
4638
 *  This function updates the device statistics structure in the s2io_nic
L
Linus Torvalds 已提交
4639 4640 4641 4642 4643
 *  structure and returns a pointer to the same.
 *  Return value:
 *  pointer to the updated net_device_stats structure.
 */

4644
static struct net_device_stats *s2io_get_stats(struct net_device *dev)
L
Linus Torvalds 已提交
4645
{
R
Ralf Baechle 已提交
4646 4647
	struct s2io_nic *sp = dev->priv;
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
4648 4649
	struct config_param *config;

4650

L
Linus Torvalds 已提交
4651 4652 4653
	mac_control = &sp->mac_control;
	config = &sp->config;

4654 4655 4656 4657 4658
	/* Configure Stats for immediate updt */
	s2io_updt_stats(sp);

	sp->stats.tx_packets =
		le32_to_cpu(mac_control->stats_info->tmac_frms);
4659 4660 4661
	sp->stats.tx_errors =
		le32_to_cpu(mac_control->stats_info->tmac_any_err_frms);
	sp->stats.rx_errors =
A
Al Viro 已提交
4662
		le64_to_cpu(mac_control->stats_info->rmac_drop_frms);
4663 4664
	sp->stats.multicast =
		le32_to_cpu(mac_control->stats_info->rmac_vld_mcst_frms);
L
Linus Torvalds 已提交
4665
	sp->stats.rx_length_errors =
A
Al Viro 已提交
4666
		le64_to_cpu(mac_control->stats_info->rmac_long_frms);
L
Linus Torvalds 已提交
4667 4668 4669 4670 4671 4672 4673 4674

	return (&sp->stats);
}

/**
 *  s2io_set_multicast - entry point for multicast address enable/disable.
 *  @dev : pointer to the device structure
 *  Description:
4675 4676
 *  This function is a driver entry point which gets called by the kernel
 *  whenever multicast addresses must be enabled/disabled. This also gets
L
Linus Torvalds 已提交
4677 4678 4679 4680 4681 4682 4683 4684 4685 4686 4687
 *  called to set/reset promiscuous mode. Depending on the deivce flag, we
 *  determine, if multicast address must be enabled or if promiscuous mode
 *  is to be disabled etc.
 *  Return value:
 *  void.
 */

static void s2io_set_multicast(struct net_device *dev)
{
	int i, j, prev_cnt;
	struct dev_mc_list *mclist;
R
Ralf Baechle 已提交
4688 4689
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
4690 4691 4692 4693 4694 4695 4696 4697 4698 4699 4700 4701 4702 4703 4704 4705
	u64 val64 = 0, multi_mac = 0x010203040506ULL, mask =
	    0xfeffffffffffULL;
	u64 dis_addr = 0xffffffffffffULL, mac_addr = 0;
	void __iomem *add;

	if ((dev->flags & IFF_ALLMULTI) && (!sp->m_cast_flg)) {
		/*  Enable all Multicast addresses */
		writeq(RMAC_ADDR_DATA0_MEM_ADDR(multi_mac),
		       &bar0->rmac_addr_data0_mem);
		writeq(RMAC_ADDR_DATA1_MEM_MASK(mask),
		       &bar0->rmac_addr_data1_mem);
		val64 = RMAC_ADDR_CMD_MEM_WE |
		    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
		    RMAC_ADDR_CMD_MEM_OFFSET(MAC_MC_ALL_MC_ADDR_OFFSET);
		writeq(val64, &bar0->rmac_addr_cmd_mem);
		/* Wait till command completes */
A
Ananda Raju 已提交
4706
		wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
4707 4708
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET);
L
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4709 4710 4711 4712 4713 4714 4715

		sp->m_cast_flg = 1;
		sp->all_multi_pos = MAC_MC_ALL_MC_ADDR_OFFSET;
	} else if ((dev->flags & IFF_ALLMULTI) && (sp->m_cast_flg)) {
		/*  Disable all Multicast addresses */
		writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
		       &bar0->rmac_addr_data0_mem);
4716 4717
		writeq(RMAC_ADDR_DATA1_MEM_MASK(0x0),
		       &bar0->rmac_addr_data1_mem);
L
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4718 4719 4720 4721 4722
		val64 = RMAC_ADDR_CMD_MEM_WE |
		    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
		    RMAC_ADDR_CMD_MEM_OFFSET(sp->all_multi_pos);
		writeq(val64, &bar0->rmac_addr_cmd_mem);
		/* Wait till command completes */
A
Ananda Raju 已提交
4723
		wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
4724 4725
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET);
L
Linus Torvalds 已提交
4726 4727 4728 4729 4730 4731 4732 4733 4734 4735 4736 4737 4738 4739 4740 4741

		sp->m_cast_flg = 0;
		sp->all_multi_pos = 0;
	}

	if ((dev->flags & IFF_PROMISC) && (!sp->promisc_flg)) {
		/*  Put the NIC into promiscuous mode */
		add = &bar0->mac_cfg;
		val64 = readq(&bar0->mac_cfg);
		val64 |= MAC_CFG_RMAC_PROM_ENABLE;

		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) val64, add);
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64 >> 32), (add + 4));

4742 4743 4744 4745 4746 4747 4748
		if (vlan_tag_strip != 1) {
			val64 = readq(&bar0->rx_pa_cfg);
			val64 &= ~RX_PA_CFG_STRIP_VLAN_TAG;
			writeq(val64, &bar0->rx_pa_cfg);
			vlan_strip_flag = 0;
		}

L
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4749 4750
		val64 = readq(&bar0->mac_cfg);
		sp->promisc_flg = 1;
4751
		DBG_PRINT(INFO_DBG, "%s: entered promiscuous mode\n",
L
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4752 4753 4754 4755 4756 4757 4758 4759 4760 4761 4762 4763
			  dev->name);
	} else if (!(dev->flags & IFF_PROMISC) && (sp->promisc_flg)) {
		/*  Remove the NIC from promiscuous mode */
		add = &bar0->mac_cfg;
		val64 = readq(&bar0->mac_cfg);
		val64 &= ~MAC_CFG_RMAC_PROM_ENABLE;

		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) val64, add);
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64 >> 32), (add + 4));

4764 4765 4766 4767 4768 4769 4770
		if (vlan_tag_strip != 0) {
			val64 = readq(&bar0->rx_pa_cfg);
			val64 |= RX_PA_CFG_STRIP_VLAN_TAG;
			writeq(val64, &bar0->rx_pa_cfg);
			vlan_strip_flag = 1;
		}

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4771 4772
		val64 = readq(&bar0->mac_cfg);
		sp->promisc_flg = 0;
4773
		DBG_PRINT(INFO_DBG, "%s: left promiscuous mode\n",
L
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4774 4775 4776 4777 4778 4779 4780 4781 4782 4783 4784 4785 4786 4787 4788 4789 4790 4791 4792 4793 4794 4795
			  dev->name);
	}

	/*  Update individual M_CAST address list */
	if ((!sp->m_cast_flg) && dev->mc_count) {
		if (dev->mc_count >
		    (MAX_ADDRS_SUPPORTED - MAC_MC_ADDR_START_OFFSET - 1)) {
			DBG_PRINT(ERR_DBG, "%s: No more Rx filters ",
				  dev->name);
			DBG_PRINT(ERR_DBG, "can be added, please enable ");
			DBG_PRINT(ERR_DBG, "ALL_MULTI instead\n");
			return;
		}

		prev_cnt = sp->mc_addr_count;
		sp->mc_addr_count = dev->mc_count;

		/* Clear out the previous list of Mc in the H/W. */
		for (i = 0; i < prev_cnt; i++) {
			writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
			       &bar0->rmac_addr_data0_mem);
			writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
4796
				&bar0->rmac_addr_data1_mem);
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4797 4798 4799 4800 4801 4802 4803
			val64 = RMAC_ADDR_CMD_MEM_WE |
			    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
			    RMAC_ADDR_CMD_MEM_OFFSET
			    (MAC_MC_ADDR_START_OFFSET + i);
			writeq(val64, &bar0->rmac_addr_cmd_mem);

			/* Wait for command completes */
A
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4804
			if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
4805 4806
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET)) {
L
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4807 4808 4809 4810 4811 4812 4813 4814 4815 4816 4817 4818
				DBG_PRINT(ERR_DBG, "%s: Adding ",
					  dev->name);
				DBG_PRINT(ERR_DBG, "Multicasts failed\n");
				return;
			}
		}

		/* Create the new Rx filter list and update the same in H/W. */
		for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
		     i++, mclist = mclist->next) {
			memcpy(sp->usr_addrs[i].addr, mclist->dmi_addr,
			       ETH_ALEN);
4819
			mac_addr = 0;
L
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4820 4821 4822 4823 4824 4825 4826 4827
			for (j = 0; j < ETH_ALEN; j++) {
				mac_addr |= mclist->dmi_addr[j];
				mac_addr <<= 8;
			}
			mac_addr >>= 8;
			writeq(RMAC_ADDR_DATA0_MEM_ADDR(mac_addr),
			       &bar0->rmac_addr_data0_mem);
			writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
4828
				&bar0->rmac_addr_data1_mem);
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4829 4830 4831 4832 4833 4834 4835
			val64 = RMAC_ADDR_CMD_MEM_WE |
			    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
			    RMAC_ADDR_CMD_MEM_OFFSET
			    (i + MAC_MC_ADDR_START_OFFSET);
			writeq(val64, &bar0->rmac_addr_cmd_mem);

			/* Wait for command completes */
A
Ananda Raju 已提交
4836
			if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
4837 4838
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET)) {
L
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4839 4840 4841 4842 4843 4844 4845 4846 4847 4848
				DBG_PRINT(ERR_DBG, "%s: Adding ",
					  dev->name);
				DBG_PRINT(ERR_DBG, "Multicasts failed\n");
				return;
			}
		}
	}
}

/**
4849
 *  s2io_set_mac_addr - Programs the Xframe mac address
L
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4850 4851
 *  @dev : pointer to the device structure.
 *  @addr: a uchar pointer to the new mac address which is to be set.
4852
 *  Description : This procedure will program the Xframe to receive
L
Linus Torvalds 已提交
4853
 *  frames with new Mac Address
4854
 *  Return value: SUCCESS on success and an appropriate (-)ve integer
L
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4855 4856 4857
 *  as defined in errno.h file on failure.
 */

4858
static int s2io_set_mac_addr(struct net_device *dev, u8 * addr)
L
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4859
{
R
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	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
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4862 4863
	register u64 val64, mac_addr = 0;
	int i;
4864
	u64 old_mac_addr = 0;
L
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4865

4866
	/*
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4867 4868
	 * Set the new MAC address as the new unicast filter and reflect this
	 * change on the device address registered with the OS. It will be
4869
	 * at offset 0.
L
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4870 4871 4872 4873
	 */
	for (i = 0; i < ETH_ALEN; i++) {
		mac_addr <<= 8;
		mac_addr |= addr[i];
4874 4875 4876 4877 4878 4879 4880 4881 4882 4883 4884 4885 4886 4887 4888 4889
		old_mac_addr <<= 8;
		old_mac_addr |= sp->def_mac_addr[0].mac_addr[i];
	}

	if(0 == mac_addr)
		return SUCCESS;

	/* Update the internal structure with this new mac address */
	if(mac_addr != old_mac_addr) {
		memset(sp->def_mac_addr[0].mac_addr, 0, sizeof(ETH_ALEN));
		sp->def_mac_addr[0].mac_addr[5] = (u8) (mac_addr);
		sp->def_mac_addr[0].mac_addr[4] = (u8) (mac_addr >> 8);
		sp->def_mac_addr[0].mac_addr[3] = (u8) (mac_addr >> 16);
		sp->def_mac_addr[0].mac_addr[2] = (u8) (mac_addr >> 24);
		sp->def_mac_addr[0].mac_addr[1] = (u8) (mac_addr >> 32);
		sp->def_mac_addr[0].mac_addr[0] = (u8) (mac_addr >> 40);
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4890 4891 4892 4893 4894 4895 4896 4897 4898 4899
	}

	writeq(RMAC_ADDR_DATA0_MEM_ADDR(mac_addr),
	       &bar0->rmac_addr_data0_mem);

	val64 =
	    RMAC_ADDR_CMD_MEM_WE | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
	    RMAC_ADDR_CMD_MEM_OFFSET(0);
	writeq(val64, &bar0->rmac_addr_cmd_mem);
	/* Wait till command completes */
A
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4900
	if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
4901
		      RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING, S2IO_BIT_RESET)) {
L
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4902 4903 4904 4905 4906 4907 4908 4909
		DBG_PRINT(ERR_DBG, "%s: set_mac_addr failed\n", dev->name);
		return FAILURE;
	}

	return SUCCESS;
}

/**
4910
 * s2io_ethtool_sset - Sets different link parameters.
L
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4911 4912 4913 4914
 * @sp : private member of the device structure, which is a pointer to the  * s2io_nic structure.
 * @info: pointer to the structure with parameters given by ethtool to set
 * link information.
 * Description:
4915
 * The function sets different link parameters provided by the user onto
L
Linus Torvalds 已提交
4916 4917 4918 4919 4920 4921 4922 4923
 * the NIC.
 * Return value:
 * 0 on success.
*/

static int s2io_ethtool_sset(struct net_device *dev,
			     struct ethtool_cmd *info)
{
R
Ralf Baechle 已提交
4924
	struct s2io_nic *sp = dev->priv;
L
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4925 4926 4927 4928 4929 4930 4931 4932 4933 4934 4935 4936
	if ((info->autoneg == AUTONEG_ENABLE) ||
	    (info->speed != SPEED_10000) || (info->duplex != DUPLEX_FULL))
		return -EINVAL;
	else {
		s2io_close(sp->dev);
		s2io_open(sp->dev);
	}

	return 0;
}

/**
4937
 * s2io_ethtol_gset - Return link specific information.
L
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4938 4939 4940 4941 4942 4943 4944 4945 4946 4947 4948 4949
 * @sp : private member of the device structure, pointer to the
 *      s2io_nic structure.
 * @info : pointer to the structure with parameters given by ethtool
 * to return link information.
 * Description:
 * Returns link specific information like speed, duplex etc.. to ethtool.
 * Return value :
 * return 0 on success.
 */

static int s2io_ethtool_gset(struct net_device *dev, struct ethtool_cmd *info)
{
R
Ralf Baechle 已提交
4950
	struct s2io_nic *sp = dev->priv;
L
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4951 4952 4953 4954 4955 4956 4957 4958 4959 4960 4961 4962 4963 4964 4965 4966 4967 4968
	info->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
	info->advertising = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
	info->port = PORT_FIBRE;
	/* info->transceiver?? TODO */

	if (netif_carrier_ok(sp->dev)) {
		info->speed = 10000;
		info->duplex = DUPLEX_FULL;
	} else {
		info->speed = -1;
		info->duplex = -1;
	}

	info->autoneg = AUTONEG_DISABLE;
	return 0;
}

/**
4969 4970
 * s2io_ethtool_gdrvinfo - Returns driver specific information.
 * @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
4971 4972 4973 4974 4975 4976 4977 4978 4979 4980 4981 4982
 * s2io_nic structure.
 * @info : pointer to the structure with parameters given by ethtool to
 * return driver information.
 * Description:
 * Returns driver specefic information like name, version etc.. to ethtool.
 * Return value:
 *  void
 */

static void s2io_ethtool_gdrvinfo(struct net_device *dev,
				  struct ethtool_drvinfo *info)
{
R
Ralf Baechle 已提交
4983
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
4984

4985 4986 4987 4988
	strncpy(info->driver, s2io_driver_name, sizeof(info->driver));
	strncpy(info->version, s2io_driver_version, sizeof(info->version));
	strncpy(info->fw_version, "", sizeof(info->fw_version));
	strncpy(info->bus_info, pci_name(sp->pdev), sizeof(info->bus_info));
L
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4989 4990 4991 4992 4993 4994
	info->regdump_len = XENA_REG_SPACE;
	info->eedump_len = XENA_EEPROM_SPACE;
}

/**
 *  s2io_ethtool_gregs - dumps the entire space of Xfame into the buffer.
4995
 *  @sp: private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
4996
 *  s2io_nic structure.
4997
 *  @regs : pointer to the structure with parameters given by ethtool for
L
Linus Torvalds 已提交
4998 4999 5000 5001 5002 5003 5004 5005 5006 5007 5008 5009 5010 5011 5012
 *  dumping the registers.
 *  @reg_space: The input argumnet into which all the registers are dumped.
 *  Description:
 *  Dumps the entire register space of xFrame NIC into the user given
 *  buffer area.
 * Return value :
 * void .
*/

static void s2io_ethtool_gregs(struct net_device *dev,
			       struct ethtool_regs *regs, void *space)
{
	int i;
	u64 reg;
	u8 *reg_space = (u8 *) space;
R
Ralf Baechle 已提交
5013
	struct s2io_nic *sp = dev->priv;
L
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5014 5015 5016 5017 5018 5019 5020 5021 5022 5023 5024 5025

	regs->len = XENA_REG_SPACE;
	regs->version = sp->pdev->subsystem_device;

	for (i = 0; i < regs->len; i += 8) {
		reg = readq(sp->bar0 + i);
		memcpy((reg_space + i), &reg, 8);
	}
}

/**
 *  s2io_phy_id  - timer function that alternates adapter LED.
5026
 *  @data : address of the private member of the device structure, which
L
Linus Torvalds 已提交
5027
 *  is a pointer to the s2io_nic structure, provided as an u32.
5028 5029 5030
 * Description: This is actually the timer function that alternates the
 * adapter LED bit of the adapter control bit to set/reset every time on
 * invocation. The timer is set for 1/2 a second, hence tha NIC blinks
L
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5031 5032 5033 5034
 *  once every second.
*/
static void s2io_phy_id(unsigned long data)
{
R
Ralf Baechle 已提交
5035 5036
	struct s2io_nic *sp = (struct s2io_nic *) data;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
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5037 5038 5039 5040
	u64 val64 = 0;
	u16 subid;

	subid = sp->pdev->subsystem_device;
5041 5042
	if ((sp->device_type == XFRAME_II_DEVICE) ||
		   ((subid & 0xFF) >= 0x07)) {
L
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5043 5044 5045 5046 5047 5048 5049 5050 5051 5052 5053 5054 5055 5056 5057 5058
		val64 = readq(&bar0->gpio_control);
		val64 ^= GPIO_CTRL_GPIO_0;
		writeq(val64, &bar0->gpio_control);
	} else {
		val64 = readq(&bar0->adapter_control);
		val64 ^= ADAPTER_LED_ON;
		writeq(val64, &bar0->adapter_control);
	}

	mod_timer(&sp->id_timer, jiffies + HZ / 2);
}

/**
 * s2io_ethtool_idnic - To physically identify the nic on the system.
 * @sp : private member of the device structure, which is a pointer to the
 * s2io_nic structure.
5059
 * @id : pointer to the structure with identification parameters given by
L
Linus Torvalds 已提交
5060 5061
 * ethtool.
 * Description: Used to physically identify the NIC on the system.
5062
 * The Link LED will blink for a time specified by the user for
L
Linus Torvalds 已提交
5063
 * identification.
5064
 * NOTE: The Link has to be Up to be able to blink the LED. Hence
L
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5065 5066 5067 5068 5069 5070 5071 5072
 * identification is possible only if it's link is up.
 * Return value:
 * int , returns 0 on success
 */

static int s2io_ethtool_idnic(struct net_device *dev, u32 data)
{
	u64 val64 = 0, last_gpio_ctrl_val;
R
Ralf Baechle 已提交
5073 5074
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
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5075 5076 5077 5078
	u16 subid;

	subid = sp->pdev->subsystem_device;
	last_gpio_ctrl_val = readq(&bar0->gpio_control);
5079 5080
	if ((sp->device_type == XFRAME_I_DEVICE) &&
		((subid & 0xFF) < 0x07)) {
L
Linus Torvalds 已提交
5081 5082 5083 5084 5085 5086 5087 5088 5089 5090 5091 5092 5093 5094
		val64 = readq(&bar0->adapter_control);
		if (!(val64 & ADAPTER_CNTL_EN)) {
			printk(KERN_ERR
			       "Adapter Link down, cannot blink LED\n");
			return -EFAULT;
		}
	}
	if (sp->id_timer.function == NULL) {
		init_timer(&sp->id_timer);
		sp->id_timer.function = s2io_phy_id;
		sp->id_timer.data = (unsigned long) sp;
	}
	mod_timer(&sp->id_timer, jiffies);
	if (data)
5095
		msleep_interruptible(data * HZ);
L
Linus Torvalds 已提交
5096
	else
5097
		msleep_interruptible(MAX_FLICKER_TIME);
L
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5098 5099
	del_timer_sync(&sp->id_timer);

5100
	if (CARDS_WITH_FAULTY_LINK_INDICATORS(sp->device_type, subid)) {
L
Linus Torvalds 已提交
5101 5102 5103 5104 5105 5106 5107
		writeq(last_gpio_ctrl_val, &bar0->gpio_control);
		last_gpio_ctrl_val = readq(&bar0->gpio_control);
	}

	return 0;
}

5108 5109 5110 5111 5112 5113 5114 5115 5116 5117 5118 5119
static void s2io_ethtool_gringparam(struct net_device *dev,
                                    struct ethtool_ringparam *ering)
{
	struct s2io_nic *sp = dev->priv;
	int i,tx_desc_count=0,rx_desc_count=0;

	if (sp->rxd_mode == RXD_MODE_1)
		ering->rx_max_pending = MAX_RX_DESC_1;
	else if (sp->rxd_mode == RXD_MODE_3B)
		ering->rx_max_pending = MAX_RX_DESC_2;

	ering->tx_max_pending = MAX_TX_DESC;
5120
	for (i = 0 ; i < sp->config.tx_fifo_num ; i++)
5121
		tx_desc_count += sp->config.tx_cfg[i].fifo_len;
5122

5123 5124 5125
	DBG_PRINT(INFO_DBG,"\nmax txds : %d\n",sp->config.max_txds);
	ering->tx_pending = tx_desc_count;
	rx_desc_count = 0;
5126
	for (i = 0 ; i < sp->config.rx_ring_num ; i++)
5127
		rx_desc_count += sp->config.rx_cfg[i].num_rxd;
5128

5129 5130 5131 5132 5133 5134 5135 5136 5137 5138 5139
	ering->rx_pending = rx_desc_count;

	ering->rx_mini_max_pending = 0;
	ering->rx_mini_pending = 0;
	if(sp->rxd_mode == RXD_MODE_1)
		ering->rx_jumbo_max_pending = MAX_RX_DESC_1;
	else if (sp->rxd_mode == RXD_MODE_3B)
		ering->rx_jumbo_max_pending = MAX_RX_DESC_2;
	ering->rx_jumbo_pending = rx_desc_count;
}

L
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5140 5141
/**
 * s2io_ethtool_getpause_data -Pause frame frame generation and reception.
5142 5143
 * @sp : private member of the device structure, which is a pointer to the
 *	s2io_nic structure.
L
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5144 5145 5146 5147 5148 5149 5150 5151 5152 5153
 * @ep : pointer to the structure with pause parameters given by ethtool.
 * Description:
 * Returns the Pause frame generation and reception capability of the NIC.
 * Return value:
 *  void
 */
static void s2io_ethtool_getpause_data(struct net_device *dev,
				       struct ethtool_pauseparam *ep)
{
	u64 val64;
R
Ralf Baechle 已提交
5154 5155
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
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5156 5157 5158 5159 5160 5161 5162 5163 5164 5165 5166

	val64 = readq(&bar0->rmac_pause_cfg);
	if (val64 & RMAC_PAUSE_GEN_ENABLE)
		ep->tx_pause = TRUE;
	if (val64 & RMAC_PAUSE_RX_ENABLE)
		ep->rx_pause = TRUE;
	ep->autoneg = FALSE;
}

/**
 * s2io_ethtool_setpause_data -  set/reset pause frame generation.
5167
 * @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5168 5169 5170 5171 5172 5173 5174 5175 5176 5177
 *      s2io_nic structure.
 * @ep : pointer to the structure with pause parameters given by ethtool.
 * Description:
 * It can be used to set or reset Pause frame generation or reception
 * support of the NIC.
 * Return value:
 * int, returns 0 on Success
 */

static int s2io_ethtool_setpause_data(struct net_device *dev,
5178
			       struct ethtool_pauseparam *ep)
L
Linus Torvalds 已提交
5179 5180
{
	u64 val64;
R
Ralf Baechle 已提交
5181 5182
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
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5183 5184 5185 5186 5187 5188 5189 5190 5191 5192 5193 5194 5195 5196 5197 5198

	val64 = readq(&bar0->rmac_pause_cfg);
	if (ep->tx_pause)
		val64 |= RMAC_PAUSE_GEN_ENABLE;
	else
		val64 &= ~RMAC_PAUSE_GEN_ENABLE;
	if (ep->rx_pause)
		val64 |= RMAC_PAUSE_RX_ENABLE;
	else
		val64 &= ~RMAC_PAUSE_RX_ENABLE;
	writeq(val64, &bar0->rmac_pause_cfg);
	return 0;
}

/**
 * read_eeprom - reads 4 bytes of data from user given offset.
5199
 * @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5200 5201 5202
 *      s2io_nic structure.
 * @off : offset at which the data must be written
 * @data : Its an output parameter where the data read at the given
5203
 *	offset is stored.
L
Linus Torvalds 已提交
5204
 * Description:
5205
 * Will read 4 bytes of data from the user given offset and return the
L
Linus Torvalds 已提交
5206 5207 5208 5209 5210 5211 5212 5213
 * read data.
 * NOTE: Will allow to read only part of the EEPROM visible through the
 *   I2C bus.
 * Return value:
 *  -1 on failure and 0 on success.
 */

#define S2IO_DEV_ID		5
R
Ralf Baechle 已提交
5214
static int read_eeprom(struct s2io_nic * sp, int off, u64 * data)
L
Linus Torvalds 已提交
5215 5216 5217 5218
{
	int ret = -1;
	u32 exit_cnt = 0;
	u64 val64;
R
Ralf Baechle 已提交
5219
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
5220

5221 5222 5223 5224 5225
	if (sp->device_type == XFRAME_I_DEVICE) {
		val64 = I2C_CONTROL_DEV_ID(S2IO_DEV_ID) | I2C_CONTROL_ADDR(off) |
		    I2C_CONTROL_BYTE_CNT(0x3) | I2C_CONTROL_READ |
		    I2C_CONTROL_CNTL_START;
		SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF);
L
Linus Torvalds 已提交
5226

5227 5228 5229 5230 5231 5232 5233 5234 5235
		while (exit_cnt < 5) {
			val64 = readq(&bar0->i2c_control);
			if (I2C_CONTROL_CNTL_END(val64)) {
				*data = I2C_CONTROL_GET_DATA(val64);
				ret = 0;
				break;
			}
			msleep(50);
			exit_cnt++;
L
Linus Torvalds 已提交
5236 5237 5238
		}
	}

5239 5240
	if (sp->device_type == XFRAME_II_DEVICE) {
		val64 = SPI_CONTROL_KEY(0x9) | SPI_CONTROL_SEL1 |
5241
			SPI_CONTROL_BYTECNT(0x3) |
5242 5243 5244 5245 5246 5247 5248 5249 5250 5251 5252 5253 5254 5255 5256 5257 5258 5259 5260
			SPI_CONTROL_CMD(0x3) | SPI_CONTROL_ADDR(off);
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		val64 |= SPI_CONTROL_REQ;
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		while (exit_cnt < 5) {
			val64 = readq(&bar0->spi_control);
			if (val64 & SPI_CONTROL_NACK) {
				ret = 1;
				break;
			} else if (val64 & SPI_CONTROL_DONE) {
				*data = readq(&bar0->spi_data);
				*data &= 0xffffff;
				ret = 0;
				break;
			}
			msleep(50);
			exit_cnt++;
		}
	}
L
Linus Torvalds 已提交
5261 5262 5263 5264 5265 5266 5267 5268 5269
	return ret;
}

/**
 *  write_eeprom - actually writes the relevant part of the data value.
 *  @sp : private member of the device structure, which is a pointer to the
 *       s2io_nic structure.
 *  @off : offset at which the data must be written
 *  @data : The data that is to be written
5270
 *  @cnt : Number of bytes of the data that are actually to be written into
L
Linus Torvalds 已提交
5271 5272 5273 5274 5275 5276 5277 5278
 *  the Eeprom. (max of 3)
 * Description:
 *  Actually writes the relevant part of the data value into the Eeprom
 *  through the I2C bus.
 * Return value:
 *  0 on success, -1 on failure.
 */

R
Ralf Baechle 已提交
5279
static int write_eeprom(struct s2io_nic * sp, int off, u64 data, int cnt)
L
Linus Torvalds 已提交
5280 5281 5282
{
	int exit_cnt = 0, ret = -1;
	u64 val64;
R
Ralf Baechle 已提交
5283
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
5284

5285 5286 5287 5288 5289 5290 5291 5292 5293 5294 5295 5296 5297 5298 5299 5300 5301
	if (sp->device_type == XFRAME_I_DEVICE) {
		val64 = I2C_CONTROL_DEV_ID(S2IO_DEV_ID) | I2C_CONTROL_ADDR(off) |
		    I2C_CONTROL_BYTE_CNT(cnt) | I2C_CONTROL_SET_DATA((u32)data) |
		    I2C_CONTROL_CNTL_START;
		SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF);

		while (exit_cnt < 5) {
			val64 = readq(&bar0->i2c_control);
			if (I2C_CONTROL_CNTL_END(val64)) {
				if (!(val64 & I2C_CONTROL_NACK))
					ret = 0;
				break;
			}
			msleep(50);
			exit_cnt++;
		}
	}
L
Linus Torvalds 已提交
5302

5303 5304 5305 5306 5307
	if (sp->device_type == XFRAME_II_DEVICE) {
		int write_cnt = (cnt == 8) ? 0 : cnt;
		writeq(SPI_DATA_WRITE(data,(cnt<<3)), &bar0->spi_data);

		val64 = SPI_CONTROL_KEY(0x9) | SPI_CONTROL_SEL1 |
5308
			SPI_CONTROL_BYTECNT(write_cnt) |
5309 5310 5311 5312 5313 5314 5315 5316 5317 5318
			SPI_CONTROL_CMD(0x2) | SPI_CONTROL_ADDR(off);
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		val64 |= SPI_CONTROL_REQ;
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		while (exit_cnt < 5) {
			val64 = readq(&bar0->spi_control);
			if (val64 & SPI_CONTROL_NACK) {
				ret = 1;
				break;
			} else if (val64 & SPI_CONTROL_DONE) {
L
Linus Torvalds 已提交
5319
				ret = 0;
5320 5321 5322 5323
				break;
			}
			msleep(50);
			exit_cnt++;
L
Linus Torvalds 已提交
5324 5325 5326 5327
		}
	}
	return ret;
}
R
Ralf Baechle 已提交
5328
static void s2io_vpd_read(struct s2io_nic *nic)
5329
{
5330 5331
	u8 *vpd_data;
	u8 data;
5332 5333 5334 5335 5336 5337 5338 5339 5340 5341 5342
	int i=0, cnt, fail = 0;
	int vpd_addr = 0x80;

	if (nic->device_type == XFRAME_II_DEVICE) {
		strcpy(nic->product_name, "Xframe II 10GbE network adapter");
		vpd_addr = 0x80;
	}
	else {
		strcpy(nic->product_name, "Xframe I 10GbE network adapter");
		vpd_addr = 0x50;
	}
5343
	strcpy(nic->serial_num, "NOT AVAILABLE");
5344

5345
	vpd_data = kmalloc(256, GFP_KERNEL);
5346 5347
	if (!vpd_data) {
		nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
5348
		return;
5349
	}
5350
	nic->mac_control.stats_info->sw_stat.mem_allocated += 256;
5351

5352 5353 5354 5355 5356 5357 5358 5359 5360 5361 5362 5363 5364 5365 5366 5367 5368 5369
	for (i = 0; i < 256; i +=4 ) {
		pci_write_config_byte(nic->pdev, (vpd_addr + 2), i);
		pci_read_config_byte(nic->pdev,  (vpd_addr + 2), &data);
		pci_write_config_byte(nic->pdev, (vpd_addr + 3), 0);
		for (cnt = 0; cnt <5; cnt++) {
			msleep(2);
			pci_read_config_byte(nic->pdev, (vpd_addr + 3), &data);
			if (data == 0x80)
				break;
		}
		if (cnt >= 5) {
			DBG_PRINT(ERR_DBG, "Read of VPD data failed\n");
			fail = 1;
			break;
		}
		pci_read_config_dword(nic->pdev,  (vpd_addr + 4),
				      (u32 *)&vpd_data[i]);
	}
5370 5371 5372 5373 5374 5375 5376 5377 5378 5379 5380 5381 5382 5383 5384 5385

	if(!fail) {
		/* read serial number of adapter */
		for (cnt = 0; cnt < 256; cnt++) {
		if ((vpd_data[cnt] == 'S') &&
			(vpd_data[cnt+1] == 'N') &&
			(vpd_data[cnt+2] < VPD_STRING_LEN)) {
				memset(nic->serial_num, 0, VPD_STRING_LEN);
				memcpy(nic->serial_num, &vpd_data[cnt + 3],
					vpd_data[cnt+2]);
				break;
			}
		}
	}

	if ((!fail) && (vpd_data[1] < VPD_STRING_LEN)) {
5386 5387 5388
		memset(nic->product_name, 0, vpd_data[1]);
		memcpy(nic->product_name, &vpd_data[3], vpd_data[1]);
	}
5389
	kfree(vpd_data);
5390
	nic->mac_control.stats_info->sw_stat.mem_freed += 256;
5391 5392
}

L
Linus Torvalds 已提交
5393 5394 5395
/**
 *  s2io_ethtool_geeprom  - reads the value stored in the Eeprom.
 *  @sp : private member of the device structure, which is a pointer to the *       s2io_nic structure.
5396
 *  @eeprom : pointer to the user level structure provided by ethtool,
L
Linus Torvalds 已提交
5397 5398 5399 5400 5401 5402 5403 5404 5405 5406
 *  containing all relevant information.
 *  @data_buf : user defined value to be written into Eeprom.
 *  Description: Reads the values stored in the Eeprom at given offset
 *  for a given length. Stores these values int the input argument data
 *  buffer 'data_buf' and returns these to the caller (ethtool.)
 *  Return value:
 *  int  0 on success
 */

static int s2io_ethtool_geeprom(struct net_device *dev,
5407
			 struct ethtool_eeprom *eeprom, u8 * data_buf)
L
Linus Torvalds 已提交
5408
{
5409 5410
	u32 i, valid;
	u64 data;
R
Ralf Baechle 已提交
5411
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
5412 5413 5414 5415 5416 5417 5418 5419 5420 5421 5422 5423 5424 5425 5426 5427 5428 5429 5430 5431 5432

	eeprom->magic = sp->pdev->vendor | (sp->pdev->device << 16);

	if ((eeprom->offset + eeprom->len) > (XENA_EEPROM_SPACE))
		eeprom->len = XENA_EEPROM_SPACE - eeprom->offset;

	for (i = 0; i < eeprom->len; i += 4) {
		if (read_eeprom(sp, (eeprom->offset + i), &data)) {
			DBG_PRINT(ERR_DBG, "Read of EEPROM failed\n");
			return -EFAULT;
		}
		valid = INV(data);
		memcpy((data_buf + i), &valid, 4);
	}
	return 0;
}

/**
 *  s2io_ethtool_seeprom - tries to write the user provided value in Eeprom
 *  @sp : private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
5433
 *  @eeprom : pointer to the user level structure provided by ethtool,
L
Linus Torvalds 已提交
5434 5435 5436 5437 5438 5439 5440 5441 5442 5443 5444 5445 5446 5447
 *  containing all relevant information.
 *  @data_buf ; user defined value to be written into Eeprom.
 *  Description:
 *  Tries to write the user provided value in the Eeprom, at the offset
 *  given by the user.
 *  Return value:
 *  0 on success, -EFAULT on failure.
 */

static int s2io_ethtool_seeprom(struct net_device *dev,
				struct ethtool_eeprom *eeprom,
				u8 * data_buf)
{
	int len = eeprom->len, cnt = 0;
5448
	u64 valid = 0, data;
R
Ralf Baechle 已提交
5449
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
5450 5451 5452 5453 5454 5455 5456 5457 5458 5459 5460 5461 5462 5463 5464 5465 5466 5467 5468 5469 5470 5471 5472 5473 5474 5475 5476 5477 5478 5479 5480

	if (eeprom->magic != (sp->pdev->vendor | (sp->pdev->device << 16))) {
		DBG_PRINT(ERR_DBG,
			  "ETHTOOL_WRITE_EEPROM Err: Magic value ");
		DBG_PRINT(ERR_DBG, "is wrong, Its not 0x%x\n",
			  eeprom->magic);
		return -EFAULT;
	}

	while (len) {
		data = (u32) data_buf[cnt] & 0x000000FF;
		if (data) {
			valid = (u32) (data << 24);
		} else
			valid = data;

		if (write_eeprom(sp, (eeprom->offset + cnt), valid, 0)) {
			DBG_PRINT(ERR_DBG,
				  "ETHTOOL_WRITE_EEPROM Err: Cannot ");
			DBG_PRINT(ERR_DBG,
				  "write into the specified offset\n");
			return -EFAULT;
		}
		cnt++;
		len--;
	}

	return 0;
}

/**
5481 5482
 * s2io_register_test - reads and writes into all clock domains.
 * @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5483 5484 5485 5486 5487 5488 5489 5490 5491 5492
 * s2io_nic structure.
 * @data : variable that returns the result of each of the test conducted b
 * by the driver.
 * Description:
 * Read and write into all clock domains. The NIC has 3 clock domains,
 * see that registers in all the three regions are accessible.
 * Return value:
 * 0 on success.
 */

R
Ralf Baechle 已提交
5493
static int s2io_register_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
5494
{
R
Ralf Baechle 已提交
5495
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
5496
	u64 val64 = 0, exp_val;
L
Linus Torvalds 已提交
5497 5498
	int fail = 0;

5499 5500
	val64 = readq(&bar0->pif_rd_swapper_fb);
	if (val64 != 0x123456789abcdefULL) {
L
Linus Torvalds 已提交
5501 5502 5503 5504 5505 5506 5507 5508 5509 5510 5511
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 1 fails\n");
	}

	val64 = readq(&bar0->rmac_pause_cfg);
	if (val64 != 0xc000ffff00000000ULL) {
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 2 fails\n");
	}

	val64 = readq(&bar0->rx_queue_cfg);
5512 5513 5514 5515 5516
	if (sp->device_type == XFRAME_II_DEVICE)
		exp_val = 0x0404040404040404ULL;
	else
		exp_val = 0x0808080808080808ULL;
	if (val64 != exp_val) {
L
Linus Torvalds 已提交
5517 5518 5519 5520 5521 5522 5523 5524 5525 5526 5527 5528 5529 5530 5531 5532 5533 5534 5535 5536 5537 5538 5539 5540 5541 5542 5543
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 3 fails\n");
	}

	val64 = readq(&bar0->xgxs_efifo_cfg);
	if (val64 != 0x000000001923141EULL) {
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 4 fails\n");
	}

	val64 = 0x5A5A5A5A5A5A5A5AULL;
	writeq(val64, &bar0->xmsi_data);
	val64 = readq(&bar0->xmsi_data);
	if (val64 != 0x5A5A5A5A5A5A5A5AULL) {
		fail = 1;
		DBG_PRINT(ERR_DBG, "Write Test level 1 fails\n");
	}

	val64 = 0xA5A5A5A5A5A5A5A5ULL;
	writeq(val64, &bar0->xmsi_data);
	val64 = readq(&bar0->xmsi_data);
	if (val64 != 0xA5A5A5A5A5A5A5A5ULL) {
		fail = 1;
		DBG_PRINT(ERR_DBG, "Write Test level 2 fails\n");
	}

	*data = fail;
5544
	return fail;
L
Linus Torvalds 已提交
5545 5546 5547
}

/**
5548
 * s2io_eeprom_test - to verify that EEprom in the xena can be programmed.
L
Linus Torvalds 已提交
5549 5550 5551 5552 5553
 * @sp : private member of the device structure, which is a pointer to the
 * s2io_nic structure.
 * @data:variable that returns the result of each of the test conducted by
 * the driver.
 * Description:
5554
 * Verify that EEPROM in the xena can be programmed using I2C_CONTROL
L
Linus Torvalds 已提交
5555 5556 5557 5558 5559
 * register.
 * Return value:
 * 0 on success.
 */

R
Ralf Baechle 已提交
5560
static int s2io_eeprom_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
5561 5562
{
	int fail = 0;
5563 5564 5565
	u64 ret_data, org_4F0, org_7F0;
	u8 saved_4F0 = 0, saved_7F0 = 0;
	struct net_device *dev = sp->dev;
L
Linus Torvalds 已提交
5566 5567

	/* Test Write Error at offset 0 */
5568 5569 5570 5571 5572 5573 5574 5575 5576 5577 5578 5579
	/* Note that SPI interface allows write access to all areas
	 * of EEPROM. Hence doing all negative testing only for Xframe I.
	 */
	if (sp->device_type == XFRAME_I_DEVICE)
		if (!write_eeprom(sp, 0, 0, 3))
			fail = 1;

	/* Save current values at offsets 0x4F0 and 0x7F0 */
	if (!read_eeprom(sp, 0x4F0, &org_4F0))
		saved_4F0 = 1;
	if (!read_eeprom(sp, 0x7F0, &org_7F0))
		saved_7F0 = 1;
L
Linus Torvalds 已提交
5580 5581

	/* Test Write at offset 4f0 */
5582
	if (write_eeprom(sp, 0x4F0, 0x012345, 3))
L
Linus Torvalds 已提交
5583 5584 5585 5586
		fail = 1;
	if (read_eeprom(sp, 0x4F0, &ret_data))
		fail = 1;

5587
	if (ret_data != 0x012345) {
5588 5589 5590 5591
		DBG_PRINT(ERR_DBG, "%s: eeprom test error at offset 0x4F0. "
			"Data written %llx Data read %llx\n",
			dev->name, (unsigned long long)0x12345,
			(unsigned long long)ret_data);
L
Linus Torvalds 已提交
5592
		fail = 1;
5593
	}
L
Linus Torvalds 已提交
5594 5595

	/* Reset the EEPROM data go FFFF */
5596
	write_eeprom(sp, 0x4F0, 0xFFFFFF, 3);
L
Linus Torvalds 已提交
5597 5598

	/* Test Write Request Error at offset 0x7c */
5599 5600 5601
	if (sp->device_type == XFRAME_I_DEVICE)
		if (!write_eeprom(sp, 0x07C, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
5602

5603 5604
	/* Test Write Request at offset 0x7f0 */
	if (write_eeprom(sp, 0x7F0, 0x012345, 3))
L
Linus Torvalds 已提交
5605
		fail = 1;
5606
	if (read_eeprom(sp, 0x7F0, &ret_data))
L
Linus Torvalds 已提交
5607 5608
		fail = 1;

5609
	if (ret_data != 0x012345) {
5610 5611 5612 5613
		DBG_PRINT(ERR_DBG, "%s: eeprom test error at offset 0x7F0. "
			"Data written %llx Data read %llx\n",
			dev->name, (unsigned long long)0x12345,
			(unsigned long long)ret_data);
L
Linus Torvalds 已提交
5614
		fail = 1;
5615
	}
L
Linus Torvalds 已提交
5616 5617

	/* Reset the EEPROM data go FFFF */
5618
	write_eeprom(sp, 0x7F0, 0xFFFFFF, 3);
L
Linus Torvalds 已提交
5619

5620 5621 5622 5623
	if (sp->device_type == XFRAME_I_DEVICE) {
		/* Test Write Error at offset 0x80 */
		if (!write_eeprom(sp, 0x080, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
5624

5625 5626 5627
		/* Test Write Error at offset 0xfc */
		if (!write_eeprom(sp, 0x0FC, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
5628

5629 5630 5631
		/* Test Write Error at offset 0x100 */
		if (!write_eeprom(sp, 0x100, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
5632

5633 5634 5635 5636 5637 5638 5639 5640 5641 5642
		/* Test Write Error at offset 4ec */
		if (!write_eeprom(sp, 0x4EC, 0, 3))
			fail = 1;
	}

	/* Restore values at offsets 0x4F0 and 0x7F0 */
	if (saved_4F0)
		write_eeprom(sp, 0x4F0, org_4F0, 3);
	if (saved_7F0)
		write_eeprom(sp, 0x7F0, org_7F0, 3);
L
Linus Torvalds 已提交
5643 5644

	*data = fail;
5645
	return fail;
L
Linus Torvalds 已提交
5646 5647 5648 5649
}

/**
 * s2io_bist_test - invokes the MemBist test of the card .
5650
 * @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5651
 * s2io_nic structure.
5652
 * @data:variable that returns the result of each of the test conducted by
L
Linus Torvalds 已提交
5653 5654 5655 5656
 * the driver.
 * Description:
 * This invokes the MemBist test of the card. We give around
 * 2 secs time for the Test to complete. If it's still not complete
5657
 * within this peiod, we consider that the test failed.
L
Linus Torvalds 已提交
5658 5659 5660 5661
 * Return value:
 * 0 on success and -1 on failure.
 */

R
Ralf Baechle 已提交
5662
static int s2io_bist_test(struct s2io_nic * sp, uint64_t * data)
L
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5663 5664 5665 5666 5667 5668 5669 5670 5671 5672 5673 5674 5675 5676 5677 5678 5679 5680 5681 5682 5683 5684 5685
{
	u8 bist = 0;
	int cnt = 0, ret = -1;

	pci_read_config_byte(sp->pdev, PCI_BIST, &bist);
	bist |= PCI_BIST_START;
	pci_write_config_word(sp->pdev, PCI_BIST, bist);

	while (cnt < 20) {
		pci_read_config_byte(sp->pdev, PCI_BIST, &bist);
		if (!(bist & PCI_BIST_START)) {
			*data = (bist & PCI_BIST_CODE_MASK);
			ret = 0;
			break;
		}
		msleep(100);
		cnt++;
	}

	return ret;
}

/**
5686 5687
 * s2io-link_test - verifies the link state of the nic
 * @sp ; private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5688 5689 5690 5691
 * s2io_nic structure.
 * @data: variable that returns the result of each of the test conducted by
 * the driver.
 * Description:
5692
 * The function verifies the link state of the NIC and updates the input
L
Linus Torvalds 已提交
5693 5694 5695 5696 5697
 * argument 'data' appropriately.
 * Return value:
 * 0 on success.
 */

R
Ralf Baechle 已提交
5698
static int s2io_link_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
5699
{
R
Ralf Baechle 已提交
5700
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
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5701 5702 5703
	u64 val64;

	val64 = readq(&bar0->adapter_status);
A
Ananda Raju 已提交
5704
	if(!(LINK_IS_UP(val64)))
L
Linus Torvalds 已提交
5705
		*data = 1;
A
Ananda Raju 已提交
5706 5707
	else
		*data = 0;
L
Linus Torvalds 已提交
5708

5709
	return *data;
L
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5710 5711 5712
}

/**
5713 5714
 * s2io_rldram_test - offline test for access to the RldRam chip on the NIC
 * @sp - private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5715
 * s2io_nic structure.
5716
 * @data - variable that returns the result of each of the test
L
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5717 5718
 * conducted by the driver.
 * Description:
5719
 *  This is one of the offline test that tests the read and write
L
Linus Torvalds 已提交
5720 5721 5722 5723 5724
 *  access to the RldRam chip on the NIC.
 * Return value:
 *  0 on success.
 */

R
Ralf Baechle 已提交
5725
static int s2io_rldram_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
5726
{
R
Ralf Baechle 已提交
5727
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
5728
	u64 val64;
5729
	int cnt, iteration = 0, test_fail = 0;
L
Linus Torvalds 已提交
5730 5731 5732 5733 5734 5735 5736

	val64 = readq(&bar0->adapter_control);
	val64 &= ~ADAPTER_ECC_EN;
	writeq(val64, &bar0->adapter_control);

	val64 = readq(&bar0->mc_rldram_test_ctrl);
	val64 |= MC_RLDRAM_TEST_MODE;
5737
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
L
Linus Torvalds 已提交
5738 5739 5740 5741 5742 5743 5744 5745 5746 5747 5748 5749 5750 5751 5752 5753 5754 5755 5756 5757 5758 5759 5760 5761 5762 5763 5764

	val64 = readq(&bar0->mc_rldram_mrs);
	val64 |= MC_RLDRAM_QUEUE_SIZE_ENABLE;
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);

	val64 |= MC_RLDRAM_MRS_ENABLE;
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);

	while (iteration < 2) {
		val64 = 0x55555555aaaa0000ULL;
		if (iteration == 1) {
			val64 ^= 0xFFFFFFFFFFFF0000ULL;
		}
		writeq(val64, &bar0->mc_rldram_test_d0);

		val64 = 0xaaaa5a5555550000ULL;
		if (iteration == 1) {
			val64 ^= 0xFFFFFFFFFFFF0000ULL;
		}
		writeq(val64, &bar0->mc_rldram_test_d1);

		val64 = 0x55aaaaaaaa5a0000ULL;
		if (iteration == 1) {
			val64 ^= 0xFFFFFFFFFFFF0000ULL;
		}
		writeq(val64, &bar0->mc_rldram_test_d2);

5765
		val64 = (u64) (0x0000003ffffe0100ULL);
L
Linus Torvalds 已提交
5766 5767
		writeq(val64, &bar0->mc_rldram_test_add);

5768 5769 5770
		val64 = MC_RLDRAM_TEST_MODE | MC_RLDRAM_TEST_WRITE |
		    	MC_RLDRAM_TEST_GO;
		SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
L
Linus Torvalds 已提交
5771 5772 5773 5774 5775 5776 5777 5778 5779 5780 5781

		for (cnt = 0; cnt < 5; cnt++) {
			val64 = readq(&bar0->mc_rldram_test_ctrl);
			if (val64 & MC_RLDRAM_TEST_DONE)
				break;
			msleep(200);
		}

		if (cnt == 5)
			break;

5782 5783
		val64 = MC_RLDRAM_TEST_MODE | MC_RLDRAM_TEST_GO;
		SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
L
Linus Torvalds 已提交
5784 5785 5786 5787 5788 5789 5790 5791 5792 5793 5794 5795

		for (cnt = 0; cnt < 5; cnt++) {
			val64 = readq(&bar0->mc_rldram_test_ctrl);
			if (val64 & MC_RLDRAM_TEST_DONE)
				break;
			msleep(500);
		}

		if (cnt == 5)
			break;

		val64 = readq(&bar0->mc_rldram_test_ctrl);
5796 5797
		if (!(val64 & MC_RLDRAM_TEST_PASS))
			test_fail = 1;
L
Linus Torvalds 已提交
5798 5799 5800 5801

		iteration++;
	}

5802
	*data = test_fail;
L
Linus Torvalds 已提交
5803

5804 5805 5806 5807
	/* Bring the adapter out of test mode */
	SPECIAL_REG_WRITE(0, &bar0->mc_rldram_test_ctrl, LF);

	return test_fail;
L
Linus Torvalds 已提交
5808 5809 5810 5811 5812 5813 5814 5815
}

/**
 *  s2io_ethtool_test - conducts 6 tsets to determine the health of card.
 *  @sp : private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
 *  @ethtest : pointer to a ethtool command specific structure that will be
 *  returned to the user.
5816
 *  @data : variable that returns the result of each of the test
L
Linus Torvalds 已提交
5817 5818 5819 5820 5821 5822 5823 5824 5825 5826 5827 5828
 * conducted by the driver.
 * Description:
 *  This function conducts 6 tests ( 4 offline and 2 online) to determine
 *  the health of the card.
 * Return value:
 *  void
 */

static void s2io_ethtool_test(struct net_device *dev,
			      struct ethtool_test *ethtest,
			      uint64_t * data)
{
R
Ralf Baechle 已提交
5829
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
5830 5831 5832 5833
	int orig_state = netif_running(sp->dev);

	if (ethtest->flags == ETH_TEST_FL_OFFLINE) {
		/* Offline Tests. */
5834
		if (orig_state)
L
Linus Torvalds 已提交
5835 5836 5837 5838 5839 5840 5841 5842 5843 5844 5845 5846 5847 5848 5849 5850 5851 5852 5853 5854 5855 5856 5857 5858 5859 5860 5861 5862 5863 5864 5865 5866 5867 5868 5869 5870 5871 5872 5873 5874 5875 5876 5877 5878 5879 5880 5881 5882 5883
			s2io_close(sp->dev);

		if (s2io_register_test(sp, &data[0]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		s2io_reset(sp);

		if (s2io_rldram_test(sp, &data[3]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		s2io_reset(sp);

		if (s2io_eeprom_test(sp, &data[1]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		if (s2io_bist_test(sp, &data[4]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		if (orig_state)
			s2io_open(sp->dev);

		data[2] = 0;
	} else {
		/* Online Tests. */
		if (!orig_state) {
			DBG_PRINT(ERR_DBG,
				  "%s: is not up, cannot run test\n",
				  dev->name);
			data[0] = -1;
			data[1] = -1;
			data[2] = -1;
			data[3] = -1;
			data[4] = -1;
		}

		if (s2io_link_test(sp, &data[2]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		data[0] = 0;
		data[1] = 0;
		data[3] = 0;
		data[4] = 0;
	}
}

static void s2io_get_ethtool_stats(struct net_device *dev,
				   struct ethtool_stats *estats,
				   u64 * tmp_stats)
{
5884
	int i = 0, k;
R
Ralf Baechle 已提交
5885 5886
	struct s2io_nic *sp = dev->priv;
	struct stat_block *stat_info = sp->mac_control.stats_info;
L
Linus Torvalds 已提交
5887

5888
	s2io_updt_stats(sp);
5889 5890 5891 5892 5893 5894
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_frms_oflow) << 32  |
		le32_to_cpu(stat_info->tmac_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_data_octets_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_data_octets);
L
Linus Torvalds 已提交
5895
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_drop_frms);
5896 5897 5898 5899 5900 5901
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_mcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_mcst_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_bcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_bcst_frms);
L
Linus Torvalds 已提交
5902
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_pause_ctrl_frms);
5903 5904 5905 5906 5907 5908 5909 5910 5911
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->tmac_ttl_octets_oflow) << 32 |
                le32_to_cpu(stat_info->tmac_ttl_octets);
	tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->tmac_ucst_frms_oflow) << 32 |
                le32_to_cpu(stat_info->tmac_ucst_frms);
	tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->tmac_nucst_frms_oflow) << 32 |
                le32_to_cpu(stat_info->tmac_nucst_frms);
5912 5913 5914
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_any_err_frms_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_any_err_frms);
5915
        tmp_stats[i++] = le64_to_cpu(stat_info->tmac_ttl_less_fb_octets);
L
Linus Torvalds 已提交
5916
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_vld_ip_octets);
5917 5918 5919 5920 5921 5922 5923 5924 5925 5926 5927 5928
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_vld_ip_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_vld_ip);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_drop_ip_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_drop_ip);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_icmp_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_icmp);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_rst_tcp_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_rst_tcp);
L
Linus Torvalds 已提交
5929
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_tcp);
5930 5931 5932 5933 5934 5935 5936 5937
	tmp_stats[i++] = (u64)le32_to_cpu(stat_info->tmac_udp_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_udp);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_vld_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_vld_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_data_octets_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_data_octets);
L
Linus Torvalds 已提交
5938 5939
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_fcs_err_frms);
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_drop_frms);
5940 5941 5942 5943 5944 5945
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_vld_mcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_vld_mcst_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_vld_bcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_vld_bcst_frms);
L
Linus Torvalds 已提交
5946
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_in_rng_len_err_frms);
5947
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_out_rng_len_err_frms);
L
Linus Torvalds 已提交
5948 5949
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_long_frms);
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_pause_ctrl_frms);
5950 5951 5952 5953 5954 5955 5956 5957 5958 5959
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_unsup_ctrl_frms);
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_ttl_octets_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_ttl_octets);
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_accepted_ucst_frms_oflow)
		<< 32 | le32_to_cpu(stat_info->rmac_accepted_ucst_frms);
	tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_accepted_nucst_frms_oflow)
                 << 32 | le32_to_cpu(stat_info->rmac_accepted_nucst_frms);
5960 5961 5962
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_discarded_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_discarded_frms);
5963 5964 5965 5966 5967
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_drop_events_oflow)
                 << 32 | le32_to_cpu(stat_info->rmac_drop_events);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_less_fb_octets);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_frms);
5968 5969 5970 5971 5972 5973 5974 5975 5976 5977 5978 5979
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_usized_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_usized_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_osized_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_osized_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_frag_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_frag_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_jabber_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_jabber_frms);
5980 5981 5982 5983 5984 5985 5986 5987
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_64_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_65_127_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_128_255_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_256_511_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_512_1023_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_1024_1518_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_ip_oflow) << 32 |
5988
		le32_to_cpu(stat_info->rmac_ip);
L
Linus Torvalds 已提交
5989 5990
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ip_octets);
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_hdr_err_ip);
5991 5992
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_drop_ip_oflow) << 32 |
5993
		le32_to_cpu(stat_info->rmac_drop_ip);
5994 5995
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_icmp_oflow) << 32 |
5996
		le32_to_cpu(stat_info->rmac_icmp);
L
Linus Torvalds 已提交
5997
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_tcp);
5998 5999
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_udp_oflow) << 32 |
6000 6001 6002 6003
		le32_to_cpu(stat_info->rmac_udp);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_err_drp_udp_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_err_drp_udp);
6004 6005 6006 6007 6008 6009 6010 6011 6012 6013 6014 6015 6016 6017 6018 6019 6020
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_err_sym);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q0);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q1);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q2);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q3);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q4);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q5);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q6);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q7);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q0);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q1);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q2);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q3);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q4);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q5);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q6);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q7);
6021 6022 6023
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_pause_cnt_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_pause_cnt);
6024 6025
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_data_err_cnt);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_ctrl_err_cnt);
6026 6027 6028
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_accepted_ip_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_accepted_ip);
L
Linus Torvalds 已提交
6029
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_err_tcp);
6030 6031 6032 6033 6034 6035 6036 6037 6038 6039 6040 6041 6042 6043 6044 6045 6046 6047
	tmp_stats[i++] = le32_to_cpu(stat_info->rd_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_rd_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_rd_req_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rd_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_rtry_rd_ack_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_wr_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_wr_req_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_disc_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rd_rtry_wr_ack_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txp_wr_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txd_rd_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txd_wr_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rxd_rd_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rxd_wr_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txf_rd_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rxf_wr_cnt);
6048 6049 6050 6051 6052 6053 6054 6055 6056 6057 6058 6059 6060 6061 6062 6063 6064 6065 6066 6067 6068 6069 6070 6071

	/* Enhanced statistics exist only for Hercules */
	if(sp->device_type == XFRAME_II_DEVICE) {
		tmp_stats[i++] =
				le64_to_cpu(stat_info->rmac_ttl_1519_4095_frms);
		tmp_stats[i++] =
				le64_to_cpu(stat_info->rmac_ttl_4096_8191_frms);
		tmp_stats[i++] =
				le64_to_cpu(stat_info->rmac_ttl_8192_max_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_gt_max_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_osized_alt_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_jabber_alt_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_gt_max_alt_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_vlan_frms);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_len_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_fcs_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_pf_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_da_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_red_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_rts_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_ingm_full_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->link_fault_cnt);
	}

6072 6073 6074
	tmp_stats[i++] = 0;
	tmp_stats[i++] = stat_info->sw_stat.single_ecc_errs;
	tmp_stats[i++] = stat_info->sw_stat.double_ecc_errs;
6075 6076 6077 6078
	tmp_stats[i++] = stat_info->sw_stat.parity_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.serious_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.soft_reset_cnt;
	tmp_stats[i++] = stat_info->sw_stat.fifo_full_cnt;
6079 6080
	for (k = 0; k < MAX_RX_RINGS; k++)
		tmp_stats[i++] = stat_info->sw_stat.ring_full_cnt[k];
6081 6082 6083 6084 6085 6086 6087 6088 6089 6090 6091 6092
	tmp_stats[i++] = stat_info->xpak_stat.alarm_transceiver_temp_high;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_transceiver_temp_low;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_bias_current_high;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_bias_current_low;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_output_power_high;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_output_power_low;
	tmp_stats[i++] = stat_info->xpak_stat.warn_transceiver_temp_high;
	tmp_stats[i++] = stat_info->xpak_stat.warn_transceiver_temp_low;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_bias_current_high;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_bias_current_low;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_output_power_high;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_output_power_low;
6093 6094 6095 6096
	tmp_stats[i++] = stat_info->sw_stat.clubbed_frms_cnt;
	tmp_stats[i++] = stat_info->sw_stat.sending_both;
	tmp_stats[i++] = stat_info->sw_stat.outof_sequence_pkts;
	tmp_stats[i++] = stat_info->sw_stat.flush_max_pkts;
6097
	if (stat_info->sw_stat.num_aggregations) {
6098 6099
		u64 tmp = stat_info->sw_stat.sum_avg_pkts_aggregated;
		int count = 0;
6100
		/*
6101 6102 6103 6104 6105 6106 6107 6108
		 * Since 64-bit divide does not work on all platforms,
		 * do repeated subtraction.
		 */
		while (tmp >= stat_info->sw_stat.num_aggregations) {
			tmp -= stat_info->sw_stat.num_aggregations;
			count++;
		}
		tmp_stats[i++] = count;
6109
	}
6110 6111
	else
		tmp_stats[i++] = 0;
6112
	tmp_stats[i++] = stat_info->sw_stat.mem_alloc_fail_cnt;
6113
	tmp_stats[i++] = stat_info->sw_stat.pci_map_fail_cnt;
6114
	tmp_stats[i++] = stat_info->sw_stat.watchdog_timer_cnt;
6115 6116 6117 6118 6119 6120 6121 6122 6123 6124 6125 6126 6127 6128 6129 6130 6131 6132 6133 6134 6135 6136
	tmp_stats[i++] = stat_info->sw_stat.mem_allocated;
	tmp_stats[i++] = stat_info->sw_stat.mem_freed;
	tmp_stats[i++] = stat_info->sw_stat.link_up_cnt;
	tmp_stats[i++] = stat_info->sw_stat.link_down_cnt;
	tmp_stats[i++] = stat_info->sw_stat.link_up_time;
	tmp_stats[i++] = stat_info->sw_stat.link_down_time;

	tmp_stats[i++] = stat_info->sw_stat.tx_buf_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_desc_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_parity_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_link_loss_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_list_proc_err_cnt;

	tmp_stats[i++] = stat_info->sw_stat.rx_parity_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_parity_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_rda_fail_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_unkn_prot_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_fcs_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_buf_size_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_rxd_corrupt_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_unkn_err_cnt;
6137 6138 6139 6140 6141 6142 6143 6144 6145 6146 6147 6148 6149 6150 6151 6152 6153
	tmp_stats[i++] = stat_info->sw_stat.tda_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.pfc_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.pcc_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tti_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tpa_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.sm_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.lso_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.mac_tmac_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.mac_rmac_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.xgxs_txgxs_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.xgxs_rxgxs_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rc_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.prc_pcix_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rpa_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rda_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rti_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.mc_err_cnt;
L
Linus Torvalds 已提交
6154 6155
}

6156
static int s2io_ethtool_get_regs_len(struct net_device *dev)
L
Linus Torvalds 已提交
6157 6158 6159 6160 6161
{
	return (XENA_REG_SPACE);
}


6162
static u32 s2io_ethtool_get_rx_csum(struct net_device * dev)
L
Linus Torvalds 已提交
6163
{
R
Ralf Baechle 已提交
6164
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
6165 6166 6167

	return (sp->rx_csum);
}
6168 6169

static int s2io_ethtool_set_rx_csum(struct net_device *dev, u32 data)
L
Linus Torvalds 已提交
6170
{
R
Ralf Baechle 已提交
6171
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
6172 6173 6174 6175 6176 6177 6178 6179

	if (data)
		sp->rx_csum = 1;
	else
		sp->rx_csum = 0;

	return 0;
}
6180 6181

static int s2io_get_eeprom_len(struct net_device *dev)
L
Linus Torvalds 已提交
6182 6183 6184 6185
{
	return (XENA_EEPROM_SPACE);
}

6186
static int s2io_get_sset_count(struct net_device *dev, int sset)
L
Linus Torvalds 已提交
6187
{
6188 6189 6190 6191 6192 6193 6194 6195 6196 6197 6198 6199 6200 6201 6202 6203 6204
	struct s2io_nic *sp = dev->priv;

	switch (sset) {
	case ETH_SS_TEST:
		return S2IO_TEST_LEN;
	case ETH_SS_STATS:
		switch(sp->device_type) {
		case XFRAME_I_DEVICE:
			return XFRAME_I_STAT_LEN;
		case XFRAME_II_DEVICE:
			return XFRAME_II_STAT_LEN;
		default:
			return 0;
		}
	default:
		return -EOPNOTSUPP;
	}
L
Linus Torvalds 已提交
6205
}
6206 6207 6208

static void s2io_ethtool_get_strings(struct net_device *dev,
				     u32 stringset, u8 * data)
L
Linus Torvalds 已提交
6209
{
6210 6211 6212
	int stat_size = 0;
	struct s2io_nic *sp = dev->priv;

L
Linus Torvalds 已提交
6213 6214 6215 6216 6217
	switch (stringset) {
	case ETH_SS_TEST:
		memcpy(data, s2io_gstrings, S2IO_STRINGS_LEN);
		break;
	case ETH_SS_STATS:
6218 6219 6220 6221 6222 6223 6224 6225 6226 6227 6228
		stat_size = sizeof(ethtool_xena_stats_keys);
		memcpy(data, &ethtool_xena_stats_keys,stat_size);
		if(sp->device_type == XFRAME_II_DEVICE) {
			memcpy(data + stat_size,
				&ethtool_enhanced_stats_keys,
				sizeof(ethtool_enhanced_stats_keys));
			stat_size += sizeof(ethtool_enhanced_stats_keys);
		}

		memcpy(data + stat_size, &ethtool_driver_stats_keys,
			sizeof(ethtool_driver_stats_keys));
L
Linus Torvalds 已提交
6229 6230 6231
	}
}

6232
static int s2io_ethtool_op_set_tx_csum(struct net_device *dev, u32 data)
L
Linus Torvalds 已提交
6233 6234 6235 6236 6237 6238 6239 6240 6241
{
	if (data)
		dev->features |= NETIF_F_IP_CSUM;
	else
		dev->features &= ~NETIF_F_IP_CSUM;

	return 0;
}

6242 6243 6244 6245 6246 6247 6248 6249 6250 6251 6252 6253 6254
static u32 s2io_ethtool_op_get_tso(struct net_device *dev)
{
	return (dev->features & NETIF_F_TSO) != 0;
}
static int s2io_ethtool_op_set_tso(struct net_device *dev, u32 data)
{
	if (data)
		dev->features |= (NETIF_F_TSO | NETIF_F_TSO6);
	else
		dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);

	return 0;
}
L
Linus Torvalds 已提交
6255

6256
static const struct ethtool_ops netdev_ethtool_ops = {
L
Linus Torvalds 已提交
6257 6258 6259 6260 6261 6262 6263 6264 6265
	.get_settings = s2io_ethtool_gset,
	.set_settings = s2io_ethtool_sset,
	.get_drvinfo = s2io_ethtool_gdrvinfo,
	.get_regs_len = s2io_ethtool_get_regs_len,
	.get_regs = s2io_ethtool_gregs,
	.get_link = ethtool_op_get_link,
	.get_eeprom_len = s2io_get_eeprom_len,
	.get_eeprom = s2io_ethtool_geeprom,
	.set_eeprom = s2io_ethtool_seeprom,
6266
	.get_ringparam = s2io_ethtool_gringparam,
L
Linus Torvalds 已提交
6267 6268 6269 6270 6271 6272
	.get_pauseparam = s2io_ethtool_getpause_data,
	.set_pauseparam = s2io_ethtool_setpause_data,
	.get_rx_csum = s2io_ethtool_get_rx_csum,
	.set_rx_csum = s2io_ethtool_set_rx_csum,
	.set_tx_csum = s2io_ethtool_op_set_tx_csum,
	.set_sg = ethtool_op_set_sg,
6273 6274
	.get_tso = s2io_ethtool_op_get_tso,
	.set_tso = s2io_ethtool_op_set_tso,
A
Ananda Raju 已提交
6275
	.set_ufo = ethtool_op_set_ufo,
L
Linus Torvalds 已提交
6276 6277 6278
	.self_test = s2io_ethtool_test,
	.get_strings = s2io_ethtool_get_strings,
	.phys_id = s2io_ethtool_idnic,
6279 6280
	.get_ethtool_stats = s2io_get_ethtool_stats,
	.get_sset_count = s2io_get_sset_count,
L
Linus Torvalds 已提交
6281 6282 6283
};

/**
6284
 *  s2io_ioctl - Entry point for the Ioctl
L
Linus Torvalds 已提交
6285 6286 6287 6288 6289 6290
 *  @dev :  Device pointer.
 *  @ifr :  An IOCTL specefic structure, that can contain a pointer to
 *  a proprietary structure used to pass information to the driver.
 *  @cmd :  This is used to distinguish between the different commands that
 *  can be passed to the IOCTL functions.
 *  Description:
6291 6292
 *  Currently there are no special functionality supported in IOCTL, hence
 *  function always return EOPNOTSUPPORTED
L
Linus Torvalds 已提交
6293 6294
 */

6295
static int s2io_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
L
Linus Torvalds 已提交
6296 6297 6298 6299 6300 6301 6302 6303 6304 6305 6306 6307 6308 6309 6310
{
	return -EOPNOTSUPP;
}

/**
 *  s2io_change_mtu - entry point to change MTU size for the device.
 *   @dev : device pointer.
 *   @new_mtu : the new MTU size for the device.
 *   Description: A driver entry point to change MTU size for the device.
 *   Before changing the MTU the device must be stopped.
 *  Return value:
 *   0 on success and an appropriate (-)ve integer as defined in errno.h
 *   file on failure.
 */

6311
static int s2io_change_mtu(struct net_device *dev, int new_mtu)
L
Linus Torvalds 已提交
6312
{
R
Ralf Baechle 已提交
6313
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
6314 6315 6316 6317 6318 6319 6320 6321

	if ((new_mtu < MIN_MTU) || (new_mtu > S2IO_JUMBO_SIZE)) {
		DBG_PRINT(ERR_DBG, "%s: MTU size is invalid.\n",
			  dev->name);
		return -EPERM;
	}

	dev->mtu = new_mtu;
6322
	if (netif_running(dev)) {
A
Ananda Raju 已提交
6323
		s2io_card_down(sp);
6324 6325 6326 6327 6328 6329 6330 6331
		netif_stop_queue(dev);
		if (s2io_card_up(sp)) {
			DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n",
				  __FUNCTION__);
		}
		if (netif_queue_stopped(dev))
			netif_wake_queue(dev);
	} else { /* Device is down */
R
Ralf Baechle 已提交
6332
		struct XENA_dev_config __iomem *bar0 = sp->bar0;
6333 6334 6335 6336
		u64 val64 = new_mtu;

		writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);
	}
L
Linus Torvalds 已提交
6337 6338 6339 6340 6341 6342 6343 6344 6345

	return 0;
}

/**
 *  s2io_tasklet - Bottom half of the ISR.
 *  @dev_adr : address of the device structure in dma_addr_t format.
 *  Description:
 *  This is the tasklet or the bottom half of the ISR. This is
6346
 *  an extension of the ISR which is scheduled by the scheduler to be run
L
Linus Torvalds 已提交
6347
 *  when the load on the CPU is low. All low priority tasks of the ISR can
6348
 *  be pushed into the tasklet. For now the tasklet is used only to
L
Linus Torvalds 已提交
6349 6350 6351 6352 6353 6354 6355 6356
 *  replenish the Rx buffers in the Rx buffer descriptors.
 *  Return value:
 *  void.
 */

static void s2io_tasklet(unsigned long dev_addr)
{
	struct net_device *dev = (struct net_device *) dev_addr;
R
Ralf Baechle 已提交
6357
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
6358
	int i, ret;
R
Ralf Baechle 已提交
6359
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
6360 6361 6362 6363 6364 6365 6366 6367 6368
	struct config_param *config;

	mac_control = &sp->mac_control;
	config = &sp->config;

	if (!TASKLET_IN_USE) {
		for (i = 0; i < config->rx_ring_num; i++) {
			ret = fill_rx_buffers(sp, i);
			if (ret == -ENOMEM) {
6369
				DBG_PRINT(INFO_DBG, "%s: Out of ",
L
Linus Torvalds 已提交
6370
					  dev->name);
6371
				DBG_PRINT(INFO_DBG, "memory in tasklet\n");
L
Linus Torvalds 已提交
6372 6373
				break;
			} else if (ret == -EFILL) {
6374
				DBG_PRINT(INFO_DBG,
L
Linus Torvalds 已提交
6375 6376 6377 6378 6379 6380 6381 6382 6383 6384 6385 6386 6387 6388 6389
					  "%s: Rx Ring %d is full\n",
					  dev->name, i);
				break;
			}
		}
		clear_bit(0, (&sp->tasklet_status));
	}
}

/**
 * s2io_set_link - Set the LInk status
 * @data: long pointer to device private structue
 * Description: Sets the link status for the adapter
 */

6390
static void s2io_set_link(struct work_struct *work)
L
Linus Torvalds 已提交
6391
{
R
Ralf Baechle 已提交
6392
	struct s2io_nic *nic = container_of(work, struct s2io_nic, set_link_task);
L
Linus Torvalds 已提交
6393
	struct net_device *dev = nic->dev;
R
Ralf Baechle 已提交
6394
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
L
Linus Torvalds 已提交
6395 6396 6397
	register u64 val64;
	u16 subid;

6398 6399 6400 6401 6402
	rtnl_lock();

	if (!netif_running(dev))
		goto out_unlock;

6403
	if (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(nic->state))) {
L
Linus Torvalds 已提交
6404
		/* The card is being reset, no point doing anything */
6405
		goto out_unlock;
L
Linus Torvalds 已提交
6406 6407 6408
	}

	subid = nic->pdev->subsystem_device;
6409 6410 6411 6412 6413 6414 6415
	if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
		/*
		 * Allow a small delay for the NICs self initiated
		 * cleanup to complete.
		 */
		msleep(100);
	}
L
Linus Torvalds 已提交
6416 6417

	val64 = readq(&bar0->adapter_status);
6418 6419 6420 6421 6422
	if (LINK_IS_UP(val64)) {
		if (!(readq(&bar0->adapter_control) & ADAPTER_CNTL_EN)) {
			if (verify_xena_quiescence(nic)) {
				val64 = readq(&bar0->adapter_control);
				val64 |= ADAPTER_CNTL_EN;
L
Linus Torvalds 已提交
6423
				writeq(val64, &bar0->adapter_control);
6424 6425 6426 6427 6428 6429 6430 6431 6432
				if (CARDS_WITH_FAULTY_LINK_INDICATORS(
					nic->device_type, subid)) {
					val64 = readq(&bar0->gpio_control);
					val64 |= GPIO_CTRL_GPIO_0;
					writeq(val64, &bar0->gpio_control);
					val64 = readq(&bar0->gpio_control);
				} else {
					val64 |= ADAPTER_LED_ON;
					writeq(val64, &bar0->adapter_control);
6433
				}
L
Linus Torvalds 已提交
6434
				nic->device_enabled_once = TRUE;
6435 6436 6437 6438
			} else {
				DBG_PRINT(ERR_DBG, "%s: Error: ", dev->name);
				DBG_PRINT(ERR_DBG, "device is not Quiescent\n");
				netif_stop_queue(dev);
L
Linus Torvalds 已提交
6439
			}
6440
		}
6441 6442 6443 6444
		val64 = readq(&bar0->adapter_control);
		val64 |= ADAPTER_LED_ON;
		writeq(val64, &bar0->adapter_control);
		s2io_link(nic, LINK_UP);
6445 6446 6447 6448 6449 6450 6451
	} else {
		if (CARDS_WITH_FAULTY_LINK_INDICATORS(nic->device_type,
						      subid)) {
			val64 = readq(&bar0->gpio_control);
			val64 &= ~GPIO_CTRL_GPIO_0;
			writeq(val64, &bar0->gpio_control);
			val64 = readq(&bar0->gpio_control);
L
Linus Torvalds 已提交
6452
		}
6453 6454 6455 6456
		/* turn off LED */
		val64 = readq(&bar0->adapter_control);
		val64 = val64 &(~ADAPTER_LED_ON);
		writeq(val64, &bar0->adapter_control);
6457
		s2io_link(nic, LINK_DOWN);
L
Linus Torvalds 已提交
6458
	}
6459
	clear_bit(__S2IO_STATE_LINK_TASK, &(nic->state));
6460 6461

out_unlock:
6462
	rtnl_unlock();
L
Linus Torvalds 已提交
6463 6464
}

R
Ralf Baechle 已提交
6465 6466 6467 6468
static int set_rxd_buffer_pointer(struct s2io_nic *sp, struct RxD_t *rxdp,
				struct buffAdd *ba,
				struct sk_buff **skb, u64 *temp0, u64 *temp1,
				u64 *temp2, int size)
6469 6470
{
	struct net_device *dev = sp->dev;
6471
	struct swStat *stats = &sp->mac_control.stats_info->sw_stat;
6472 6473

	if ((sp->rxd_mode == RXD_MODE_1) && (rxdp->Host_Control == 0)) {
6474
		struct RxD1 *rxdp1 = (struct RxD1 *)rxdp;
6475 6476 6477 6478 6479 6480 6481 6482
		/* allocate skb */
		if (*skb) {
			DBG_PRINT(INFO_DBG, "SKB is not NULL\n");
			/*
			 * As Rx frame are not going to be processed,
			 * using same mapped address for the Rxd
			 * buffer pointer
			 */
6483
			rxdp1->Buffer0_ptr = *temp0;
6484 6485 6486
		} else {
			*skb = dev_alloc_skb(size);
			if (!(*skb)) {
6487
				DBG_PRINT(INFO_DBG, "%s: Out of ", dev->name);
6488 6489 6490 6491
				DBG_PRINT(INFO_DBG, "memory to allocate ");
				DBG_PRINT(INFO_DBG, "1 buf mode SKBs\n");
				sp->mac_control.stats_info->sw_stat. \
					mem_alloc_fail_cnt++;
6492 6493
				return -ENOMEM ;
			}
6494
			sp->mac_control.stats_info->sw_stat.mem_allocated
6495
				+= (*skb)->truesize;
6496 6497 6498 6499
			/* storing the mapped addr in a temp variable
			 * such it will be used for next rxd whose
			 * Host Control is NULL
			 */
6500
			rxdp1->Buffer0_ptr = *temp0 =
6501 6502 6503
				pci_map_single( sp->pdev, (*skb)->data,
					size - NET_IP_ALIGN,
					PCI_DMA_FROMDEVICE);
6504 6505 6506 6507
			if( (rxdp1->Buffer0_ptr == 0) ||
				(rxdp1->Buffer0_ptr == DMA_ERROR_CODE)) {
				goto memalloc_failed;
			}
6508 6509 6510
			rxdp->Host_Control = (unsigned long) (*skb);
		}
	} else if ((sp->rxd_mode == RXD_MODE_3B) && (rxdp->Host_Control == 0)) {
6511
		struct RxD3 *rxdp3 = (struct RxD3 *)rxdp;
6512 6513
		/* Two buffer Mode */
		if (*skb) {
6514 6515 6516
			rxdp3->Buffer2_ptr = *temp2;
			rxdp3->Buffer0_ptr = *temp0;
			rxdp3->Buffer1_ptr = *temp1;
6517 6518
		} else {
			*skb = dev_alloc_skb(size);
6519
			if (!(*skb)) {
6520 6521 6522 6523 6524
				DBG_PRINT(INFO_DBG, "%s: Out of ", dev->name);
				DBG_PRINT(INFO_DBG, "memory to allocate ");
				DBG_PRINT(INFO_DBG, "2 buf mode SKBs\n");
				sp->mac_control.stats_info->sw_stat. \
					mem_alloc_fail_cnt++;
6525 6526
				return -ENOMEM;
			}
6527
			sp->mac_control.stats_info->sw_stat.mem_allocated
6528
				+= (*skb)->truesize;
6529
			rxdp3->Buffer2_ptr = *temp2 =
6530 6531 6532
				pci_map_single(sp->pdev, (*skb)->data,
					       dev->mtu + 4,
					       PCI_DMA_FROMDEVICE);
6533 6534 6535 6536
			if( (rxdp3->Buffer2_ptr == 0) ||
				(rxdp3->Buffer2_ptr == DMA_ERROR_CODE)) {
				goto memalloc_failed;
			}
6537
			rxdp3->Buffer0_ptr = *temp0 =
6538 6539
				pci_map_single( sp->pdev, ba->ba_0, BUF0_LEN,
						PCI_DMA_FROMDEVICE);
6540 6541 6542
			if( (rxdp3->Buffer0_ptr == 0) ||
				(rxdp3->Buffer0_ptr == DMA_ERROR_CODE)) {
				pci_unmap_single (sp->pdev,
A
Al Viro 已提交
6543
					(dma_addr_t)rxdp3->Buffer2_ptr,
6544 6545 6546
					dev->mtu + 4, PCI_DMA_FROMDEVICE);
				goto memalloc_failed;
			}
6547 6548 6549
			rxdp->Host_Control = (unsigned long) (*skb);

			/* Buffer-1 will be dummy buffer not used */
6550
			rxdp3->Buffer1_ptr = *temp1 =
6551 6552
				pci_map_single(sp->pdev, ba->ba_1, BUF1_LEN,
						PCI_DMA_FROMDEVICE);
6553 6554 6555
			if( (rxdp3->Buffer1_ptr == 0) ||
				(rxdp3->Buffer1_ptr == DMA_ERROR_CODE)) {
				pci_unmap_single (sp->pdev,
A
Al Viro 已提交
6556 6557 6558 6559
					(dma_addr_t)rxdp3->Buffer0_ptr,
					BUF0_LEN, PCI_DMA_FROMDEVICE);
				pci_unmap_single (sp->pdev,
					(dma_addr_t)rxdp3->Buffer2_ptr,
6560 6561 6562
					dev->mtu + 4, PCI_DMA_FROMDEVICE);
				goto memalloc_failed;
			}
6563 6564 6565
		}
	}
	return 0;
6566 6567 6568 6569 6570
	memalloc_failed:
		stats->pci_map_fail_cnt++;
		stats->mem_freed += (*skb)->truesize;
		dev_kfree_skb(*skb);
		return -ENOMEM;
6571
}
6572

R
Ralf Baechle 已提交
6573 6574
static void set_rxd_buffer_size(struct s2io_nic *sp, struct RxD_t *rxdp,
				int size)
6575 6576 6577 6578 6579 6580 6581 6582 6583 6584 6585
{
	struct net_device *dev = sp->dev;
	if (sp->rxd_mode == RXD_MODE_1) {
		rxdp->Control_2 = SET_BUFFER0_SIZE_1( size - NET_IP_ALIGN);
	} else if (sp->rxd_mode == RXD_MODE_3B) {
		rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN);
		rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1);
		rxdp->Control_2 |= SET_BUFFER2_SIZE_3( dev->mtu + 4);
	}
}

R
Ralf Baechle 已提交
6586
static  int rxd_owner_bit_reset(struct s2io_nic *sp)
6587 6588
{
	int i, j, k, blk_cnt = 0, size;
R
Ralf Baechle 已提交
6589
	struct mac_info * mac_control = &sp->mac_control;
6590 6591
	struct config_param *config = &sp->config;
	struct net_device *dev = sp->dev;
R
Ralf Baechle 已提交
6592
	struct RxD_t *rxdp = NULL;
6593
	struct sk_buff *skb = NULL;
R
Ralf Baechle 已提交
6594
	struct buffAdd *ba = NULL;
6595 6596 6597 6598 6599 6600 6601 6602 6603 6604 6605 6606 6607 6608 6609 6610 6611 6612
	u64 temp0_64 = 0, temp1_64 = 0, temp2_64 = 0;

	/* Calculate the size based on ring mode */
	size = dev->mtu + HEADER_ETHERNET_II_802_3_SIZE +
		HEADER_802_2_SIZE + HEADER_SNAP_SIZE;
	if (sp->rxd_mode == RXD_MODE_1)
		size += NET_IP_ALIGN;
	else if (sp->rxd_mode == RXD_MODE_3B)
		size = dev->mtu + ALIGN_SIZE + BUF0_LEN + 4;

	for (i = 0; i < config->rx_ring_num; i++) {
		blk_cnt = config->rx_cfg[i].num_rxd /
			(rxd_count[sp->rxd_mode] +1);

		for (j = 0; j < blk_cnt; j++) {
			for (k = 0; k < rxd_count[sp->rxd_mode]; k++) {
				rxdp = mac_control->rings[i].
					rx_blocks[j].rxds[k].virt_addr;
6613
				if(sp->rxd_mode == RXD_MODE_3B)
6614
					ba = &mac_control->rings[i].ba[j][k];
6615
				if (set_rxd_buffer_pointer(sp, rxdp, ba,
6616 6617
						       &skb,(u64 *)&temp0_64,
						       (u64 *)&temp1_64,
6618 6619 6620 6621
						       (u64 *)&temp2_64,
							size) == ENOMEM) {
					return 0;
				}
6622 6623 6624 6625 6626 6627 6628 6629 6630 6631 6632 6633

				set_rxd_buffer_size(sp, rxdp, size);
				wmb();
				/* flip the Ownership bit to Hardware */
				rxdp->Control_1 |= RXD_OWN_XENA;
			}
		}
	}
	return 0;

}

R
Ralf Baechle 已提交
6634
static int s2io_add_isr(struct s2io_nic * sp)
L
Linus Torvalds 已提交
6635
{
A
Ananda Raju 已提交
6636
	int ret = 0;
A
Ananda Raju 已提交
6637
	struct net_device *dev = sp->dev;
A
Ananda Raju 已提交
6638
	int err = 0;
L
Linus Torvalds 已提交
6639

6640
	if (sp->config.intr_type == MSI_X)
A
Ananda Raju 已提交
6641 6642 6643
		ret = s2io_enable_msi_x(sp);
	if (ret) {
		DBG_PRINT(ERR_DBG, "%s: Defaulting to INTA\n", dev->name);
6644
		sp->config.intr_type = INTA;
6645
	}
L
Linus Torvalds 已提交
6646

R
Ralf Baechle 已提交
6647
	/* Store the values of the MSIX table in the struct s2io_nic structure */
A
Ananda Raju 已提交
6648
	store_xmsi_data(sp);
A
Ananda Raju 已提交
6649

A
Ananda Raju 已提交
6650
	/* After proper initialization of H/W, register ISR */
6651
	if (sp->config.intr_type == MSI_X) {
6652
		int i, msix_tx_cnt=0,msix_rx_cnt=0;
A
Ananda Raju 已提交
6653

A
Ananda Raju 已提交
6654 6655 6656 6657 6658 6659 6660
		for (i=1; (sp->s2io_entries[i].in_use == MSIX_FLG); i++) {
			if (sp->s2io_entries[i].type == MSIX_FIFO_TYPE) {
				sprintf(sp->desc[i], "%s:MSI-X-%d-TX",
					dev->name, i);
				err = request_irq(sp->entries[i].vector,
					  s2io_msix_fifo_handle, 0, sp->desc[i],
						  sp->s2io_entries[i].arg);
6661 6662 6663 6664 6665 6666 6667 6668 6669 6670 6671 6672
				/* If either data or addr is zero print it */
				if(!(sp->msix_info[i].addr &&
					sp->msix_info[i].data)) {
					DBG_PRINT(ERR_DBG, "%s @ Addr:0x%llx"
						"Data:0x%lx\n",sp->desc[i],
						(unsigned long long)
						sp->msix_info[i].addr,
						(unsigned long)
						ntohl(sp->msix_info[i].data));
				} else {
					msix_tx_cnt++;
				}
A
Ananda Raju 已提交
6673 6674 6675 6676 6677 6678
			} else {
				sprintf(sp->desc[i], "%s:MSI-X-%d-RX",
					dev->name, i);
				err = request_irq(sp->entries[i].vector,
					  s2io_msix_ring_handle, 0, sp->desc[i],
						  sp->s2io_entries[i].arg);
6679 6680 6681 6682 6683 6684 6685 6686 6687 6688 6689 6690
				/* If either data or addr is zero print it */
				if(!(sp->msix_info[i].addr &&
					sp->msix_info[i].data)) {
					DBG_PRINT(ERR_DBG, "%s @ Addr:0x%llx"
						"Data:0x%lx\n",sp->desc[i],
						(unsigned long long)
						sp->msix_info[i].addr,
						(unsigned long)
						ntohl(sp->msix_info[i].data));
				} else {
					msix_rx_cnt++;
				}
A
Ananda Raju 已提交
6691
			}
A
Ananda Raju 已提交
6692 6693 6694 6695 6696 6697 6698 6699
			if (err) {
				DBG_PRINT(ERR_DBG,"%s:MSI-X-%d registration "
					  "failed\n", dev->name, i);
				DBG_PRINT(ERR_DBG, "Returned: %d\n", err);
				return -1;
			}
			sp->s2io_entries[i].in_use = MSIX_REGISTERED_SUCCESS;
		}
6700 6701
		printk("MSI-X-TX %d entries enabled\n",msix_tx_cnt);
		printk("MSI-X-RX %d entries enabled\n",msix_rx_cnt);
A
Ananda Raju 已提交
6702
	}
6703
	if (sp->config.intr_type == INTA) {
A
Ananda Raju 已提交
6704 6705 6706 6707 6708 6709 6710 6711 6712 6713
		err = request_irq((int) sp->pdev->irq, s2io_isr, IRQF_SHARED,
				sp->name, dev);
		if (err) {
			DBG_PRINT(ERR_DBG, "%s: ISR registration failed\n",
				  dev->name);
			return -1;
		}
	}
	return 0;
}
R
Ralf Baechle 已提交
6714
static void s2io_rem_isr(struct s2io_nic * sp)
A
Ananda Raju 已提交
6715 6716
{
	struct net_device *dev = sp->dev;
6717
	struct swStat *stats = &sp->mac_control.stats_info->sw_stat;
A
Ananda Raju 已提交
6718

6719
	if (sp->config.intr_type == MSI_X) {
A
Ananda Raju 已提交
6720 6721 6722 6723 6724 6725 6726 6727
		int i;
		u16 msi_control;

		for (i=1; (sp->s2io_entries[i].in_use ==
			MSIX_REGISTERED_SUCCESS); i++) {
			int vector = sp->entries[i].vector;
			void *arg = sp->s2io_entries[i].arg;

6728
			synchronize_irq(vector);
A
Ananda Raju 已提交
6729 6730
			free_irq(vector, arg);
		}
6731 6732 6733 6734 6735 6736 6737 6738 6739 6740

		kfree(sp->entries);
		stats->mem_freed +=
			(MAX_REQUESTED_MSI_X * sizeof(struct msix_entry));
		kfree(sp->s2io_entries);
		stats->mem_freed +=
			(MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry));
		sp->entries = NULL;
		sp->s2io_entries = NULL;

A
Ananda Raju 已提交
6741 6742 6743 6744 6745 6746
		pci_read_config_word(sp->pdev, 0x42, &msi_control);
		msi_control &= 0xFFFE; /* Disable MSI */
		pci_write_config_word(sp->pdev, 0x42, msi_control);

		pci_disable_msix(sp->pdev);
	} else {
6747
		synchronize_irq(sp->pdev->irq);
A
Ananda Raju 已提交
6748
		free_irq(sp->pdev->irq, dev);
A
Ananda Raju 已提交
6749
	}
A
Ananda Raju 已提交
6750 6751
}

6752
static void do_s2io_card_down(struct s2io_nic * sp, int do_io)
A
Ananda Raju 已提交
6753 6754
{
	int cnt = 0;
R
Ralf Baechle 已提交
6755
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
A
Ananda Raju 已提交
6756 6757 6758 6759 6760
	unsigned long flags;
	register u64 val64 = 0;

	del_timer_sync(&sp->alarm_timer);
	/* If s2io_set_link task is executing, wait till it completes. */
6761
	while (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(sp->state))) {
A
Ananda Raju 已提交
6762 6763
		msleep(50);
	}
6764
	clear_bit(__S2IO_STATE_CARD_UP, &sp->state);
A
Ananda Raju 已提交
6765 6766

	/* disable Tx and Rx traffic on the NIC */
6767 6768
	if (do_io)
		stop_nic(sp);
A
Ananda Raju 已提交
6769 6770

	s2io_rem_isr(sp);
L
Linus Torvalds 已提交
6771 6772 6773 6774 6775

	/* Kill tasklet. */
	tasklet_kill(&sp->task);

	/* Check if the device is Quiescent and then Reset the NIC */
6776
	while(do_io) {
6777 6778 6779 6780 6781 6782 6783 6784 6785
		/* As per the HW requirement we need to replenish the
		 * receive buffer to avoid the ring bump. Since there is
		 * no intention of processing the Rx frame at this pointwe are
		 * just settting the ownership bit of rxd in Each Rx
		 * ring to HW and set the appropriate buffer size
		 * based on the ring mode
		 */
		rxd_owner_bit_reset(sp);

L
Linus Torvalds 已提交
6786
		val64 = readq(&bar0->adapter_status);
6787 6788
		if (verify_xena_quiescence(sp)) {
			if(verify_pcc_quiescent(sp, sp->device_enabled_once))
L
Linus Torvalds 已提交
6789 6790 6791 6792 6793 6794 6795 6796 6797 6798 6799 6800
			break;
		}

		msleep(50);
		cnt++;
		if (cnt == 10) {
			DBG_PRINT(ERR_DBG,
				  "s2io_close:Device not Quiescent ");
			DBG_PRINT(ERR_DBG, "adaper status reads 0x%llx\n",
				  (unsigned long long) val64);
			break;
		}
6801 6802 6803
	}
	if (do_io)
		s2io_reset(sp);
L
Linus Torvalds 已提交
6804

6805 6806
	spin_lock_irqsave(&sp->tx_lock, flags);
	/* Free all Tx buffers */
L
Linus Torvalds 已提交
6807
	free_tx_buffers(sp);
6808 6809 6810 6811
	spin_unlock_irqrestore(&sp->tx_lock, flags);

	/* Free all Rx buffers */
	spin_lock_irqsave(&sp->rx_lock, flags);
L
Linus Torvalds 已提交
6812
	free_rx_buffers(sp);
6813
	spin_unlock_irqrestore(&sp->rx_lock, flags);
L
Linus Torvalds 已提交
6814

6815
	clear_bit(__S2IO_STATE_LINK_TASK, &(sp->state));
L
Linus Torvalds 已提交
6816 6817
}

6818 6819 6820 6821 6822
static void s2io_card_down(struct s2io_nic * sp)
{
	do_s2io_card_down(sp, 1);
}

R
Ralf Baechle 已提交
6823
static int s2io_card_up(struct s2io_nic * sp)
L
Linus Torvalds 已提交
6824
{
6825
	int i, ret = 0;
R
Ralf Baechle 已提交
6826
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
6827 6828
	struct config_param *config;
	struct net_device *dev = (struct net_device *) sp->dev;
A
Ananda Raju 已提交
6829
	u16 interruptible;
L
Linus Torvalds 已提交
6830 6831 6832 6833 6834

	/* Initialize the H/W I/O registers */
	if (init_nic(sp) != 0) {
		DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
			  dev->name);
A
Ananda Raju 已提交
6835
		s2io_reset(sp);
L
Linus Torvalds 已提交
6836 6837 6838
		return -ENODEV;
	}

6839 6840
	/*
	 * Initializing the Rx buffers. For now we are considering only 1
L
Linus Torvalds 已提交
6841 6842 6843 6844 6845 6846 6847 6848 6849 6850 6851 6852 6853 6854 6855 6856
	 * Rx ring and initializing buffers into 30 Rx blocks
	 */
	mac_control = &sp->mac_control;
	config = &sp->config;

	for (i = 0; i < config->rx_ring_num; i++) {
		if ((ret = fill_rx_buffers(sp, i))) {
			DBG_PRINT(ERR_DBG, "%s: Out of memory in Open\n",
				  dev->name);
			s2io_reset(sp);
			free_rx_buffers(sp);
			return -ENOMEM;
		}
		DBG_PRINT(INFO_DBG, "Buf in ring:%d is %d:\n", i,
			  atomic_read(&sp->rx_bufs_left[i]));
	}
6857 6858 6859 6860 6861 6862 6863
	/* Maintain the state prior to the open */
	if (sp->promisc_flg)
		sp->promisc_flg = 0;
	if (sp->m_cast_flg) {
		sp->m_cast_flg = 0;
		sp->all_multi_pos= 0;
	}
L
Linus Torvalds 已提交
6864 6865 6866 6867

	/* Setting its receive mode */
	s2io_set_multicast(dev);

6868
	if (sp->lro) {
6869
		/* Initialize max aggregatable pkts per session based on MTU */
6870 6871 6872 6873 6874 6875
		sp->lro_max_aggr_per_sess = ((1<<16) - 1) / dev->mtu;
		/* Check if we can use(if specified) user provided value */
		if (lro_max_pkts < sp->lro_max_aggr_per_sess)
			sp->lro_max_aggr_per_sess = lro_max_pkts;
	}

L
Linus Torvalds 已提交
6876 6877 6878 6879
	/* Enable Rx Traffic and interrupts on the NIC */
	if (start_nic(sp)) {
		DBG_PRINT(ERR_DBG, "%s: Starting NIC failed\n", dev->name);
		s2io_reset(sp);
A
Ananda Raju 已提交
6880 6881 6882 6883 6884 6885
		free_rx_buffers(sp);
		return -ENODEV;
	}

	/* Add interrupt service routine */
	if (s2io_add_isr(sp) != 0) {
6886
		if (sp->config.intr_type == MSI_X)
A
Ananda Raju 已提交
6887 6888
			s2io_rem_isr(sp);
		s2io_reset(sp);
L
Linus Torvalds 已提交
6889 6890 6891 6892
		free_rx_buffers(sp);
		return -ENODEV;
	}

6893 6894
	S2IO_TIMER_CONF(sp->alarm_timer, s2io_alarm_handle, sp, (HZ/2));

A
Ananda Raju 已提交
6895 6896 6897 6898
	/* Enable tasklet for the device */
	tasklet_init(&sp->task, s2io_tasklet, (unsigned long) dev);

	/*  Enable select interrupts */
6899
	en_dis_err_alarms(sp, ENA_ALL_INTRS, ENABLE_INTRS);
6900
	if (sp->config.intr_type != INTA)
A
Ananda Raju 已提交
6901 6902 6903
		en_dis_able_nic_intrs(sp, ENA_ALL_INTRS, DISABLE_INTRS);
	else {
		interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
6904
		interruptible |= TX_PIC_INTR;
A
Ananda Raju 已提交
6905 6906 6907
		en_dis_able_nic_intrs(sp, interruptible, ENABLE_INTRS);
	}

6908
	set_bit(__S2IO_STATE_CARD_UP, &sp->state);
L
Linus Torvalds 已提交
6909 6910 6911
	return 0;
}

6912
/**
L
Linus Torvalds 已提交
6913 6914 6915 6916
 * s2io_restart_nic - Resets the NIC.
 * @data : long pointer to the device private structure
 * Description:
 * This function is scheduled to be run by the s2io_tx_watchdog
6917
 * function after 0.5 secs to reset the NIC. The idea is to reduce
L
Linus Torvalds 已提交
6918 6919 6920 6921
 * the run time of the watch dog routine which is run holding a
 * spin lock.
 */

6922
static void s2io_restart_nic(struct work_struct *work)
L
Linus Torvalds 已提交
6923
{
R
Ralf Baechle 已提交
6924
	struct s2io_nic *sp = container_of(work, struct s2io_nic, rst_timer_task);
6925
	struct net_device *dev = sp->dev;
L
Linus Torvalds 已提交
6926

6927 6928 6929 6930 6931
	rtnl_lock();

	if (!netif_running(dev))
		goto out_unlock;

A
Ananda Raju 已提交
6932
	s2io_card_down(sp);
L
Linus Torvalds 已提交
6933 6934 6935 6936 6937 6938 6939
	if (s2io_card_up(sp)) {
		DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n",
			  dev->name);
	}
	netif_wake_queue(dev);
	DBG_PRINT(ERR_DBG, "%s: was reset by Tx watchdog timer\n",
		  dev->name);
6940 6941
out_unlock:
	rtnl_unlock();
L
Linus Torvalds 已提交
6942 6943
}

6944 6945
/**
 *  s2io_tx_watchdog - Watchdog for transmit side.
L
Linus Torvalds 已提交
6946 6947 6948 6949 6950 6951 6952 6953 6954 6955 6956 6957 6958
 *  @dev : Pointer to net device structure
 *  Description:
 *  This function is triggered if the Tx Queue is stopped
 *  for a pre-defined amount of time when the Interface is still up.
 *  If the Interface is jammed in such a situation, the hardware is
 *  reset (by s2io_close) and restarted again (by s2io_open) to
 *  overcome any problem that might have been caused in the hardware.
 *  Return value:
 *  void
 */

static void s2io_tx_watchdog(struct net_device *dev)
{
R
Ralf Baechle 已提交
6959
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
6960 6961

	if (netif_carrier_ok(dev)) {
6962
		sp->mac_control.stats_info->sw_stat.watchdog_timer_cnt++;
L
Linus Torvalds 已提交
6963
		schedule_work(&sp->rst_timer_task);
6964
		sp->mac_control.stats_info->sw_stat.soft_reset_cnt++;
L
Linus Torvalds 已提交
6965 6966 6967 6968 6969 6970 6971 6972 6973 6974
	}
}

/**
 *   rx_osm_handler - To perform some OS related operations on SKB.
 *   @sp: private member of the device structure,pointer to s2io_nic structure.
 *   @skb : the socket buffer pointer.
 *   @len : length of the packet
 *   @cksum : FCS checksum of the frame.
 *   @ring_no : the ring from which this RxD was extracted.
6975
 *   Description:
6976
 *   This function is called by the Rx interrupt serivce routine to perform
L
Linus Torvalds 已提交
6977 6978 6979 6980 6981 6982 6983 6984
 *   some OS related operations on the SKB before passing it to the upper
 *   layers. It mainly checks if the checksum is OK, if so adds it to the
 *   SKBs cksum variable, increments the Rx packet count and passes the SKB
 *   to the upper layer. If the checksum is wrong, it increments the Rx
 *   packet error count, frees the SKB and returns error.
 *   Return value:
 *   SUCCESS on success and -1 on failure.
 */
R
Ralf Baechle 已提交
6985
static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp)
L
Linus Torvalds 已提交
6986
{
R
Ralf Baechle 已提交
6987
	struct s2io_nic *sp = ring_data->nic;
L
Linus Torvalds 已提交
6988
	struct net_device *dev = (struct net_device *) sp->dev;
6989 6990 6991
	struct sk_buff *skb = (struct sk_buff *)
		((unsigned long) rxdp->Host_Control);
	int ring_no = ring_data->ring_no;
L
Linus Torvalds 已提交
6992
	u16 l3_csum, l4_csum;
6993
	unsigned long long err = rxdp->Control_1 & RXD_T_CODE;
R
Ralf Baechle 已提交
6994
	struct lro *lro;
6995
	u8 err_mask;
6996

6997
	skb->dev = dev;
A
Ananda Raju 已提交
6998

6999
	if (err) {
7000 7001 7002 7003
		/* Check for parity error */
		if (err & 0x1) {
			sp->mac_control.stats_info->sw_stat.parity_err_cnt++;
		}
7004 7005
		err_mask = err >> 48;
		switch(err_mask) {
7006 7007 7008 7009 7010 7011 7012 7013 7014 7015 7016 7017 7018 7019 7020 7021 7022 7023 7024 7025 7026 7027 7028 7029 7030 7031 7032 7033 7034
			case 1:
				sp->mac_control.stats_info->sw_stat.
				rx_parity_err_cnt++;
			break;

			case 2:
				sp->mac_control.stats_info->sw_stat.
				rx_abort_cnt++;
			break;

			case 3:
				sp->mac_control.stats_info->sw_stat.
				rx_parity_abort_cnt++;
			break;

			case 4:
				sp->mac_control.stats_info->sw_stat.
				rx_rda_fail_cnt++;
			break;

			case 5:
				sp->mac_control.stats_info->sw_stat.
				rx_unkn_prot_cnt++;
			break;

			case 6:
				sp->mac_control.stats_info->sw_stat.
				rx_fcs_err_cnt++;
			break;
7035

7036 7037 7038 7039 7040 7041 7042 7043 7044 7045 7046 7047 7048 7049 7050
			case 7:
				sp->mac_control.stats_info->sw_stat.
				rx_buf_size_err_cnt++;
			break;

			case 8:
				sp->mac_control.stats_info->sw_stat.
				rx_rxd_corrupt_cnt++;
			break;

			case 15:
				sp->mac_control.stats_info->sw_stat.
				rx_unkn_err_cnt++;
			break;
		}
7051 7052 7053 7054 7055 7056 7057
		/*
		* Drop the packet if bad transfer code. Exception being
		* 0x5, which could be due to unsupported IPv6 extension header.
		* In this case, we let stack handle the packet.
		* Note that in this case, since checksum will be incorrect,
		* stack will validate the same.
		*/
7058 7059 7060
		if (err_mask != 0x5) {
			DBG_PRINT(ERR_DBG, "%s: Rx error Value: 0x%x\n",
				dev->name, err_mask);
7061
			sp->stats.rx_crc_errors++;
7062
			sp->mac_control.stats_info->sw_stat.mem_freed
7063
				+= skb->truesize;
7064 7065 7066 7067 7068
			dev_kfree_skb(skb);
			atomic_dec(&sp->rx_bufs_left[ring_no]);
			rxdp->Host_Control = 0;
			return 0;
		}
7069
	}
L
Linus Torvalds 已提交
7070

7071
	/* Updating statistics */
7072
	sp->stats.rx_packets++;
7073
	rxdp->Host_Control = 0;
7074 7075
	if (sp->rxd_mode == RXD_MODE_1) {
		int len = RXD_GET_BUFFER0_SIZE_1(rxdp->Control_2);
7076

7077 7078 7079
		sp->stats.rx_bytes += len;
		skb_put(skb, len);

7080
	} else if (sp->rxd_mode == RXD_MODE_3B) {
7081 7082 7083 7084 7085 7086
		int get_block = ring_data->rx_curr_get_info.block_index;
		int get_off = ring_data->rx_curr_get_info.offset;
		int buf0_len = RXD_GET_BUFFER0_SIZE_3(rxdp->Control_2);
		int buf2_len = RXD_GET_BUFFER2_SIZE_3(rxdp->Control_2);
		unsigned char *buff = skb_push(skb, buf0_len);

R
Ralf Baechle 已提交
7087
		struct buffAdd *ba = &ring_data->ba[get_block][get_off];
7088 7089
		sp->stats.rx_bytes += buf0_len + buf2_len;
		memcpy(buff, ba->ba_0, buf0_len);
7090
		skb_put(skb, buf2_len);
7091
	}
7092

7093 7094
	if ((rxdp->Control_1 & TCP_OR_UDP_FRAME) && ((!sp->lro) ||
	    (sp->lro && (!(rxdp->Control_1 & RXD_FRAME_IP_FRAG)))) &&
7095 7096
	    (sp->rx_csum)) {
		l3_csum = RXD_GET_L3_CKSUM(rxdp->Control_1);
L
Linus Torvalds 已提交
7097 7098
		l4_csum = RXD_GET_L4_CKSUM(rxdp->Control_1);
		if ((l3_csum == L3_CKSUM_OK) && (l4_csum == L4_CKSUM_OK)) {
7099
			/*
L
Linus Torvalds 已提交
7100 7101 7102 7103 7104
			 * NIC verifies if the Checksum of the received
			 * frame is Ok or not and accordingly returns
			 * a flag in the RxD.
			 */
			skb->ip_summed = CHECKSUM_UNNECESSARY;
7105 7106 7107 7108 7109 7110 7111 7112 7113 7114 7115 7116 7117 7118 7119 7120 7121 7122 7123 7124 7125 7126 7127 7128 7129 7130 7131 7132 7133 7134 7135 7136 7137 7138 7139 7140
			if (sp->lro) {
				u32 tcp_len;
				u8 *tcp;
				int ret = 0;

				ret = s2io_club_tcp_session(skb->data, &tcp,
						&tcp_len, &lro, rxdp, sp);
				switch (ret) {
					case 3: /* Begin anew */
						lro->parent = skb;
						goto aggregate;
					case 1: /* Aggregate */
					{
						lro_append_pkt(sp, lro,
							skb, tcp_len);
						goto aggregate;
					}
					case 4: /* Flush session */
					{
						lro_append_pkt(sp, lro,
							skb, tcp_len);
						queue_rx_frame(lro->parent);
						clear_lro_session(lro);
						sp->mac_control.stats_info->
						    sw_stat.flush_max_pkts++;
						goto aggregate;
					}
					case 2: /* Flush both */
						lro->parent->data_len =
							lro->frags_len;
						sp->mac_control.stats_info->
						     sw_stat.sending_both++;
						queue_rx_frame(lro->parent);
						clear_lro_session(lro);
						goto send_up;
					case 0: /* sessions exceeded */
A
Ananda Raju 已提交
7141 7142 7143
					case -1: /* non-TCP or not
						  * L2 aggregatable
						  */
7144 7145 7146 7147 7148 7149 7150 7151 7152 7153 7154 7155
					case 5: /*
						 * First pkt in session not
						 * L3/L4 aggregatable
						 */
						break;
					default:
						DBG_PRINT(ERR_DBG,
							"%s: Samadhana!!\n",
							 __FUNCTION__);
						BUG();
				}
			}
L
Linus Torvalds 已提交
7156
		} else {
7157 7158
			/*
			 * Packet with erroneous checksum, let the
L
Linus Torvalds 已提交
7159 7160 7161 7162 7163 7164 7165
			 * upper layers deal with it.
			 */
			skb->ip_summed = CHECKSUM_NONE;
		}
	} else {
		skb->ip_summed = CHECKSUM_NONE;
	}
7166
	sp->mac_control.stats_info->sw_stat.mem_freed += skb->truesize;
7167 7168
	if (!sp->lro) {
		skb->protocol = eth_type_trans(skb, dev);
7169 7170
		if ((sp->vlgrp && RXD_GET_VLAN_TAG(rxdp->Control_2) &&
			vlan_strip_flag)) {
7171
			/* Queueing the vlan frame to the upper layer */
7172 7173 7174 7175 7176 7177
			if (napi)
				vlan_hwaccel_receive_skb(skb, sp->vlgrp,
					RXD_GET_VLAN_TAG(rxdp->Control_2));
			else
				vlan_hwaccel_rx(skb, sp->vlgrp,
					RXD_GET_VLAN_TAG(rxdp->Control_2));
7178
		} else {
7179 7180 7181 7182
			if (napi)
				netif_receive_skb(skb);
			else
				netif_rx(skb);
7183 7184 7185 7186
		}
	} else {
send_up:
		queue_rx_frame(skb);
7187
	}
L
Linus Torvalds 已提交
7188
	dev->last_rx = jiffies;
7189
aggregate:
L
Linus Torvalds 已提交
7190 7191 7192 7193 7194 7195 7196 7197 7198 7199 7200
	atomic_dec(&sp->rx_bufs_left[ring_no]);
	return SUCCESS;
}

/**
 *  s2io_link - stops/starts the Tx queue.
 *  @sp : private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
 *  @link : inidicates whether link is UP/DOWN.
 *  Description:
 *  This function stops/starts the Tx queue depending on whether the link
7201 7202
 *  status of the NIC is is down or up. This is called by the Alarm
 *  interrupt handler whenever a link change interrupt comes up.
L
Linus Torvalds 已提交
7203 7204 7205 7206
 *  Return value:
 *  void.
 */

R
Ralf Baechle 已提交
7207
static void s2io_link(struct s2io_nic * sp, int link)
L
Linus Torvalds 已提交
7208 7209 7210 7211 7212 7213 7214
{
	struct net_device *dev = (struct net_device *) sp->dev;

	if (link != sp->last_link_state) {
		if (link == LINK_DOWN) {
			DBG_PRINT(ERR_DBG, "%s: Link down\n", dev->name);
			netif_carrier_off(dev);
7215
			if(sp->mac_control.stats_info->sw_stat.link_up_cnt)
7216
			sp->mac_control.stats_info->sw_stat.link_up_time =
7217 7218
				jiffies - sp->start_time;
			sp->mac_control.stats_info->sw_stat.link_down_cnt++;
L
Linus Torvalds 已提交
7219 7220
		} else {
			DBG_PRINT(ERR_DBG, "%s: Link Up\n", dev->name);
7221
			if (sp->mac_control.stats_info->sw_stat.link_down_cnt)
7222
			sp->mac_control.stats_info->sw_stat.link_down_time =
7223 7224
				jiffies - sp->start_time;
			sp->mac_control.stats_info->sw_stat.link_up_cnt++;
L
Linus Torvalds 已提交
7225 7226 7227 7228
			netif_carrier_on(dev);
		}
	}
	sp->last_link_state = link;
7229
	sp->start_time = jiffies;
L
Linus Torvalds 已提交
7230 7231
}

7232 7233 7234
/**
 *  s2io_init_pci -Initialization of PCI and PCI-X configuration registers .
 *  @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
7235 7236 7237 7238 7239 7240 7241 7242
 *  s2io_nic structure.
 *  Description:
 *  This function initializes a few of the PCI and PCI-X configuration registers
 *  with recommended values.
 *  Return value:
 *  void
 */

R
Ralf Baechle 已提交
7243
static void s2io_init_pci(struct s2io_nic * sp)
L
Linus Torvalds 已提交
7244
{
7245
	u16 pci_cmd = 0, pcix_cmd = 0;
L
Linus Torvalds 已提交
7246 7247 7248

	/* Enable Data Parity Error Recovery in PCI-X command register. */
	pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
7249
			     &(pcix_cmd));
L
Linus Torvalds 已提交
7250
	pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
7251
			      (pcix_cmd | 1));
L
Linus Torvalds 已提交
7252
	pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
7253
			     &(pcix_cmd));
L
Linus Torvalds 已提交
7254 7255 7256 7257 7258 7259 7260 7261

	/* Set the PErr Response bit in PCI command register. */
	pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
	pci_write_config_word(sp->pdev, PCI_COMMAND,
			      (pci_cmd | PCI_COMMAND_PARITY));
	pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
}

7262 7263 7264 7265 7266 7267 7268 7269 7270 7271 7272 7273 7274 7275
static int s2io_verify_parm(struct pci_dev *pdev, u8 *dev_intr_type)
{
	if ( tx_fifo_num > 8) {
		DBG_PRINT(ERR_DBG, "s2io: Requested number of Tx fifos not "
			 "supported\n");
		DBG_PRINT(ERR_DBG, "s2io: Default to 8 Tx fifos\n");
		tx_fifo_num = 8;
	}
	if ( rx_ring_num > 8) {
		DBG_PRINT(ERR_DBG, "s2io: Requested number of Rx rings not "
			 "supported\n");
		DBG_PRINT(ERR_DBG, "s2io: Default to 8 Rx rings\n");
		rx_ring_num = 8;
	}
7276 7277 7278
	if (*dev_intr_type != INTA)
		napi = 0;

7279
	if ((*dev_intr_type != INTA) && (*dev_intr_type != MSI_X)) {
7280 7281 7282 7283
		DBG_PRINT(ERR_DBG, "s2io: Wrong intr_type requested. "
			  "Defaulting to INTA\n");
		*dev_intr_type = INTA;
	}
7284

7285 7286 7287
	if ((*dev_intr_type == MSI_X) &&
			((pdev->device != PCI_DEVICE_ID_HERC_WIN) &&
			(pdev->device != PCI_DEVICE_ID_HERC_UNI))) {
7288
		DBG_PRINT(ERR_DBG, "s2io: Xframe I does not support MSI_X. "
7289 7290 7291
					"Defaulting to INTA\n");
		*dev_intr_type = INTA;
	}
7292

7293
	if ((rx_ring_mode != 1) && (rx_ring_mode != 2)) {
7294
		DBG_PRINT(ERR_DBG, "s2io: Requested ring mode not supported\n");
7295 7296
		DBG_PRINT(ERR_DBG, "s2io: Defaulting to 1-buffer mode\n");
		rx_ring_mode = 1;
7297 7298 7299 7300
	}
	return SUCCESS;
}

7301 7302 7303 7304 7305 7306 7307 7308 7309 7310 7311 7312 7313 7314 7315 7316 7317 7318 7319 7320 7321 7322 7323 7324 7325 7326 7327 7328 7329 7330 7331
/**
 * rts_ds_steer - Receive traffic steering based on IPv4 or IPv6 TOS
 * or Traffic class respectively.
 * @nic: device peivate variable
 * Description: The function configures the receive steering to
 * desired receive ring.
 * Return Value:  SUCCESS on success and
 * '-1' on failure (endian settings incorrect).
 */
static int rts_ds_steer(struct s2io_nic *nic, u8 ds_codepoint, u8 ring)
{
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
	register u64 val64 = 0;

	if (ds_codepoint > 63)
		return FAILURE;

	val64 = RTS_DS_MEM_DATA(ring);
	writeq(val64, &bar0->rts_ds_mem_data);

	val64 = RTS_DS_MEM_CTRL_WE |
		RTS_DS_MEM_CTRL_STROBE_NEW_CMD |
		RTS_DS_MEM_CTRL_OFFSET(ds_codepoint);

	writeq(val64, &bar0->rts_ds_mem_ctrl);

	return wait_for_cmd_complete(&bar0->rts_ds_mem_ctrl,
				RTS_DS_MEM_CTRL_STROBE_CMD_BEING_EXECUTED,
				S2IO_BIT_RESET);
}

L
Linus Torvalds 已提交
7332
/**
7333
 *  s2io_init_nic - Initialization of the adapter .
L
Linus Torvalds 已提交
7334 7335 7336 7337
 *  @pdev : structure containing the PCI related information of the device.
 *  @pre: List of PCI devices supported by the driver listed in s2io_tbl.
 *  Description:
 *  The function initializes an adapter identified by the pci_dec structure.
7338 7339 7340
 *  All OS related initialization including memory and device structure and
 *  initlaization of the device private variable is done. Also the swapper
 *  control register is initialized to enable read and write into the I/O
L
Linus Torvalds 已提交
7341 7342 7343 7344 7345 7346 7347 7348
 *  registers of the device.
 *  Return value:
 *  returns 0 on success and negative on failure.
 */

static int __devinit
s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
{
R
Ralf Baechle 已提交
7349
	struct s2io_nic *sp;
L
Linus Torvalds 已提交
7350 7351 7352 7353 7354
	struct net_device *dev;
	int i, j, ret;
	int dma_flag = FALSE;
	u32 mac_up, mac_down;
	u64 val64 = 0, tmp64 = 0;
R
Ralf Baechle 已提交
7355
	struct XENA_dev_config __iomem *bar0 = NULL;
L
Linus Torvalds 已提交
7356
	u16 subid;
R
Ralf Baechle 已提交
7357
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
7358
	struct config_param *config;
7359
	int mode;
7360
	u8 dev_intr_type = intr_type;
7361
	DECLARE_MAC_BUF(mac);
L
Linus Torvalds 已提交
7362

7363 7364
	if ((ret = s2io_verify_parm(pdev, &dev_intr_type)))
		return ret;
L
Linus Torvalds 已提交
7365 7366 7367 7368 7369 7370 7371

	if ((ret = pci_enable_device(pdev))) {
		DBG_PRINT(ERR_DBG,
			  "s2io_init_nic: pci_enable_device failed\n");
		return ret;
	}

7372
	if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
L
Linus Torvalds 已提交
7373 7374 7375
		DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 64bit DMA\n");
		dma_flag = TRUE;
		if (pci_set_consistent_dma_mask
7376
		    (pdev, DMA_64BIT_MASK)) {
L
Linus Torvalds 已提交
7377 7378 7379 7380 7381 7382
			DBG_PRINT(ERR_DBG,
				  "Unable to obtain 64bit DMA for \
					consistent allocations\n");
			pci_disable_device(pdev);
			return -ENOMEM;
		}
7383
	} else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
L
Linus Torvalds 已提交
7384 7385 7386 7387 7388
		DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 32bit DMA\n");
	} else {
		pci_disable_device(pdev);
		return -ENOMEM;
	}
7389 7390 7391 7392
	if ((ret = pci_request_regions(pdev, s2io_driver_name))) {
		DBG_PRINT(ERR_DBG, "%s: Request Regions failed - %x \n", __FUNCTION__, ret);
		pci_disable_device(pdev);
		return -ENODEV;
L
Linus Torvalds 已提交
7393 7394
	}

R
Ralf Baechle 已提交
7395
	dev = alloc_etherdev(sizeof(struct s2io_nic));
L
Linus Torvalds 已提交
7396 7397 7398 7399 7400 7401 7402 7403 7404 7405 7406 7407 7408
	if (dev == NULL) {
		DBG_PRINT(ERR_DBG, "Device allocation failed\n");
		pci_disable_device(pdev);
		pci_release_regions(pdev);
		return -ENODEV;
	}

	pci_set_master(pdev);
	pci_set_drvdata(pdev, dev);
	SET_NETDEV_DEV(dev, &pdev->dev);

	/*  Private member variable initialized to s2io NIC structure */
	sp = dev->priv;
R
Ralf Baechle 已提交
7409
	memset(sp, 0, sizeof(struct s2io_nic));
L
Linus Torvalds 已提交
7410 7411 7412 7413
	sp->dev = dev;
	sp->pdev = pdev;
	sp->high_dma_flag = dma_flag;
	sp->device_enabled_once = FALSE;
7414 7415 7416 7417 7418
	if (rx_ring_mode == 1)
		sp->rxd_mode = RXD_MODE_1;
	if (rx_ring_mode == 2)
		sp->rxd_mode = RXD_MODE_3B;

7419
	sp->config.intr_type = dev_intr_type;
L
Linus Torvalds 已提交
7420

7421 7422 7423 7424 7425 7426
	if ((pdev->device == PCI_DEVICE_ID_HERC_WIN) ||
		(pdev->device == PCI_DEVICE_ID_HERC_UNI))
		sp->device_type = XFRAME_II_DEVICE;
	else
		sp->device_type = XFRAME_I_DEVICE;

7427
	sp->lro = lro;
7428

L
Linus Torvalds 已提交
7429 7430 7431
	/* Initialize some PCI/PCI-X fields of the NIC. */
	s2io_init_pci(sp);

7432
	/*
L
Linus Torvalds 已提交
7433
	 * Setting the device configuration parameters.
7434 7435 7436
	 * Most of these parameters can be specified by the user during
	 * module insertion as they are module loadable parameters. If
	 * these parameters are not not specified during load time, they
L
Linus Torvalds 已提交
7437 7438 7439 7440 7441
	 * are initialized with default values.
	 */
	mac_control = &sp->mac_control;
	config = &sp->config;

7442 7443
	config->napi = napi;

L
Linus Torvalds 已提交
7444 7445 7446 7447 7448 7449 7450
	/* Tx side parameters. */
	config->tx_fifo_num = tx_fifo_num;
	for (i = 0; i < MAX_TX_FIFOS; i++) {
		config->tx_cfg[i].fifo_len = tx_fifo_len[i];
		config->tx_cfg[i].fifo_priority = i;
	}

7451 7452 7453 7454
	/* mapping the QoS priority to the configured fifos */
	for (i = 0; i < MAX_TX_FIFOS; i++)
		config->fifo_mapping[i] = fifo_map[config->tx_fifo_num][i];

L
Linus Torvalds 已提交
7455 7456 7457 7458 7459 7460 7461 7462 7463
	config->tx_intr_type = TXD_INT_TYPE_UTILZ;
	for (i = 0; i < config->tx_fifo_num; i++) {
		config->tx_cfg[i].f_no_snoop =
		    (NO_SNOOP_TXD | NO_SNOOP_TXD_BUFFER);
		if (config->tx_cfg[i].fifo_len < 65) {
			config->tx_intr_type = TXD_INT_TYPE_PER_LIST;
			break;
		}
	}
A
Ananda Raju 已提交
7464 7465
	/* + 2 because one Txd for skb->data and one Txd for UFO */
	config->max_txds = MAX_SKB_FRAGS + 2;
L
Linus Torvalds 已提交
7466 7467 7468 7469 7470

	/* Rx side parameters. */
	config->rx_ring_num = rx_ring_num;
	for (i = 0; i < MAX_RX_RINGS; i++) {
		config->rx_cfg[i].num_rxd = rx_ring_sz[i] *
7471
		    (rxd_count[sp->rxd_mode] + 1);
L
Linus Torvalds 已提交
7472 7473 7474 7475 7476 7477 7478 7479 7480 7481 7482 7483 7484 7485 7486 7487 7488 7489 7490 7491 7492 7493
		config->rx_cfg[i].ring_priority = i;
	}

	for (i = 0; i < rx_ring_num; i++) {
		config->rx_cfg[i].ring_org = RING_ORG_BUFF1;
		config->rx_cfg[i].f_no_snoop =
		    (NO_SNOOP_RXD | NO_SNOOP_RXD_BUFFER);
	}

	/*  Setting Mac Control parameters */
	mac_control->rmac_pause_time = rmac_pause_time;
	mac_control->mc_pause_threshold_q0q3 = mc_pause_threshold_q0q3;
	mac_control->mc_pause_threshold_q4q7 = mc_pause_threshold_q4q7;


	/* Initialize Ring buffer parameters. */
	for (i = 0; i < config->rx_ring_num; i++)
		atomic_set(&sp->rx_bufs_left[i], 0);

	/*  initialize the shared memory used by the NIC and the host */
	if (init_shared_mem(sp)) {
		DBG_PRINT(ERR_DBG, "%s: Memory allocation failed\n",
7494
			  dev->name);
L
Linus Torvalds 已提交
7495 7496 7497 7498 7499 7500 7501
		ret = -ENOMEM;
		goto mem_alloc_failed;
	}

	sp->bar0 = ioremap(pci_resource_start(pdev, 0),
				     pci_resource_len(pdev, 0));
	if (!sp->bar0) {
7502
		DBG_PRINT(ERR_DBG, "%s: Neterion: cannot remap io mem1\n",
L
Linus Torvalds 已提交
7503 7504 7505 7506 7507 7508 7509 7510
			  dev->name);
		ret = -ENOMEM;
		goto bar0_remap_failed;
	}

	sp->bar1 = ioremap(pci_resource_start(pdev, 2),
				     pci_resource_len(pdev, 2));
	if (!sp->bar1) {
7511
		DBG_PRINT(ERR_DBG, "%s: Neterion: cannot remap io mem2\n",
L
Linus Torvalds 已提交
7512 7513 7514 7515 7516 7517 7518 7519 7520 7521
			  dev->name);
		ret = -ENOMEM;
		goto bar1_remap_failed;
	}

	dev->irq = pdev->irq;
	dev->base_addr = (unsigned long) sp->bar0;

	/* Initializing the BAR1 address as the start of the FIFO pointer. */
	for (j = 0; j < MAX_TX_FIFOS; j++) {
R
Ralf Baechle 已提交
7522
		mac_control->tx_FIFO_start[j] = (struct TxFIFO_element __iomem *)
L
Linus Torvalds 已提交
7523 7524 7525 7526 7527 7528 7529 7530 7531 7532 7533 7534
		    (sp->bar1 + (j * 0x00020000));
	}

	/*  Driver entry points */
	dev->open = &s2io_open;
	dev->stop = &s2io_close;
	dev->hard_start_xmit = &s2io_xmit;
	dev->get_stats = &s2io_get_stats;
	dev->set_multicast_list = &s2io_set_multicast;
	dev->do_ioctl = &s2io_ioctl;
	dev->change_mtu = &s2io_change_mtu;
	SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
7535 7536
	dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
	dev->vlan_rx_register = s2io_vlan_rx_register;
7537

L
Linus Torvalds 已提交
7538 7539 7540 7541
	/*
	 * will use eth_mac_addr() for  dev->set_mac_address
	 * mac address will be set every time dev->open() is called
	 */
7542
	netif_napi_add(dev, &sp->napi, s2io_poll, 32);
L
Linus Torvalds 已提交
7543

7544 7545 7546 7547
#ifdef CONFIG_NET_POLL_CONTROLLER
	dev->poll_controller = s2io_netpoll;
#endif

L
Linus Torvalds 已提交
7548 7549 7550 7551
	dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
	if (sp->high_dma_flag == TRUE)
		dev->features |= NETIF_F_HIGHDMA;
	dev->features |= NETIF_F_TSO;
7552
	dev->features |= NETIF_F_TSO6;
7553
	if ((sp->device_type & XFRAME_II_DEVICE) && (ufo))  {
A
Ananda Raju 已提交
7554 7555 7556
		dev->features |= NETIF_F_UFO;
		dev->features |= NETIF_F_HW_CSUM;
	}
L
Linus Torvalds 已提交
7557 7558 7559

	dev->tx_timeout = &s2io_tx_watchdog;
	dev->watchdog_timeo = WATCH_DOG_TIMEOUT;
7560 7561
	INIT_WORK(&sp->rst_timer_task, s2io_restart_nic);
	INIT_WORK(&sp->set_link_task, s2io_set_link);
L
Linus Torvalds 已提交
7562

7563
	pci_save_state(sp->pdev);
L
Linus Torvalds 已提交
7564 7565 7566 7567 7568 7569 7570 7571 7572

	/* Setting swapper control on the NIC, for proper reset operation */
	if (s2io_set_swapper(sp)) {
		DBG_PRINT(ERR_DBG, "%s:swapper settings are wrong\n",
			  dev->name);
		ret = -EAGAIN;
		goto set_swap_failed;
	}

7573 7574 7575 7576 7577 7578 7579 7580 7581 7582 7583 7584 7585 7586 7587 7588 7589 7590 7591 7592
	/* Verify if the Herc works on the slot its placed into */
	if (sp->device_type & XFRAME_II_DEVICE) {
		mode = s2io_verify_pci_mode(sp);
		if (mode < 0) {
			DBG_PRINT(ERR_DBG, "%s: ", __FUNCTION__);
			DBG_PRINT(ERR_DBG, " Unsupported PCI bus mode\n");
			ret = -EBADSLT;
			goto set_swap_failed;
		}
	}

	/* Not needed for Herc */
	if (sp->device_type & XFRAME_I_DEVICE) {
		/*
		 * Fix for all "FFs" MAC address problems observed on
		 * Alpha platforms
		 */
		fix_mac_address(sp);
		s2io_reset(sp);
	}
L
Linus Torvalds 已提交
7593 7594 7595 7596 7597 7598 7599 7600 7601

	/*
	 * MAC address initialization.
	 * For now only one mac address will be read and used.
	 */
	bar0 = sp->bar0;
	val64 = RMAC_ADDR_CMD_MEM_RD | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
	    RMAC_ADDR_CMD_MEM_OFFSET(0 + MAC_MAC_ADDR_START_OFFSET);
	writeq(val64, &bar0->rmac_addr_cmd_mem);
A
Ananda Raju 已提交
7602
	wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
7603
		      RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING, S2IO_BIT_RESET);
L
Linus Torvalds 已提交
7604 7605 7606 7607 7608 7609 7610 7611 7612 7613 7614 7615 7616 7617 7618
	tmp64 = readq(&bar0->rmac_addr_data0_mem);
	mac_down = (u32) tmp64;
	mac_up = (u32) (tmp64 >> 32);

	sp->def_mac_addr[0].mac_addr[3] = (u8) (mac_up);
	sp->def_mac_addr[0].mac_addr[2] = (u8) (mac_up >> 8);
	sp->def_mac_addr[0].mac_addr[1] = (u8) (mac_up >> 16);
	sp->def_mac_addr[0].mac_addr[0] = (u8) (mac_up >> 24);
	sp->def_mac_addr[0].mac_addr[5] = (u8) (mac_down >> 16);
	sp->def_mac_addr[0].mac_addr[4] = (u8) (mac_down >> 24);

	/*  Set the factory defined MAC address initially   */
	dev->addr_len = ETH_ALEN;
	memcpy(dev->dev_addr, sp->def_mac_addr, ETH_ALEN);

7619 7620
	 /* Store the values of the MSIX table in the s2io_nic structure */
	store_xmsi_data(sp);
7621 7622 7623
	/* reset Nic and bring it to known state */
	s2io_reset(sp);

L
Linus Torvalds 已提交
7624
	/*
7625
	 * Initialize the tasklet status and link state flags
7626
	 * and the card state parameter
L
Linus Torvalds 已提交
7627 7628
	 */
	sp->tasklet_status = 0;
7629
	sp->state = 0;
L
Linus Torvalds 已提交
7630 7631 7632

	/* Initialize spinlocks */
	spin_lock_init(&sp->tx_lock);
7633 7634 7635

	if (!napi)
		spin_lock_init(&sp->put_lock);
7636
	spin_lock_init(&sp->rx_lock);
L
Linus Torvalds 已提交
7637

7638 7639 7640
	/*
	 * SXE-002: Configure link and activity LED to init state
	 * on driver load.
L
Linus Torvalds 已提交
7641 7642 7643 7644 7645 7646 7647 7648 7649 7650 7651 7652 7653 7654 7655 7656 7657 7658
	 */
	subid = sp->pdev->subsystem_device;
	if ((subid & 0xFF) >= 0x07) {
		val64 = readq(&bar0->gpio_control);
		val64 |= 0x0000800000000000ULL;
		writeq(val64, &bar0->gpio_control);
		val64 = 0x0411040400000000ULL;
		writeq(val64, (void __iomem *) bar0 + 0x2700);
		val64 = readq(&bar0->gpio_control);
	}

	sp->rx_csum = 1;	/* Rx chksum verify enabled by default */

	if (register_netdev(dev)) {
		DBG_PRINT(ERR_DBG, "Device registration failed\n");
		ret = -ENODEV;
		goto register_failed;
	}
7659
	s2io_vpd_read(sp);
7660
	DBG_PRINT(ERR_DBG, "Copyright(c) 2002-2007 Neterion Inc.\n");
7661
	DBG_PRINT(ERR_DBG, "%s: Neterion %s (rev %d)\n",dev->name,
7662
		  sp->product_name, pdev->revision);
7663 7664
	DBG_PRINT(ERR_DBG, "%s: Driver version %s\n", dev->name,
		  s2io_driver_version);
7665 7666
	DBG_PRINT(ERR_DBG, "%s: MAC ADDR: %s\n",
		  dev->name, print_mac(mac, dev->dev_addr));
7667
	DBG_PRINT(ERR_DBG, "SERIAL NUMBER: %s\n", sp->serial_num);
7668
	if (sp->device_type & XFRAME_II_DEVICE) {
7669
		mode = s2io_print_pci_mode(sp);
7670
		if (mode < 0) {
7671
			DBG_PRINT(ERR_DBG, " Unsupported PCI bus mode\n");
7672
			ret = -EBADSLT;
7673
			unregister_netdev(dev);
7674 7675 7676
			goto set_swap_failed;
		}
	}
7677 7678 7679 7680 7681 7682 7683 7684 7685 7686
	switch(sp->rxd_mode) {
		case RXD_MODE_1:
		    DBG_PRINT(ERR_DBG, "%s: 1-Buffer receive mode enabled\n",
						dev->name);
		    break;
		case RXD_MODE_3B:
		    DBG_PRINT(ERR_DBG, "%s: 2-Buffer receive mode enabled\n",
						dev->name);
		    break;
	}
7687 7688 7689

	if (napi)
		DBG_PRINT(ERR_DBG, "%s: NAPI enabled\n", dev->name);
7690
	switch(sp->config.intr_type) {
7691 7692 7693 7694 7695 7696 7697
		case INTA:
		    DBG_PRINT(ERR_DBG, "%s: Interrupt type INTA\n", dev->name);
		    break;
		case MSI_X:
		    DBG_PRINT(ERR_DBG, "%s: Interrupt type MSI-X\n", dev->name);
		    break;
	}
7698 7699
	if (sp->lro)
		DBG_PRINT(ERR_DBG, "%s: Large receive offload enabled\n",
7700
			  dev->name);
7701 7702 7703
	if (ufo)
		DBG_PRINT(ERR_DBG, "%s: UDP Fragmentation Offload(UFO)"
					" enabled\n", dev->name);
7704
	/* Initialize device name */
7705
	sprintf(sp->name, "%s Neterion %s", dev->name, sp->product_name);
7706

7707 7708 7709
	/*
	 * Make Link state as off at this point, when the Link change
	 * interrupt comes the state will be automatically changed to
L
Linus Torvalds 已提交
7710 7711 7712 7713 7714 7715 7716 7717 7718 7719 7720 7721 7722 7723 7724
	 * the right state.
	 */
	netif_carrier_off(dev);

	return 0;

      register_failed:
      set_swap_failed:
	iounmap(sp->bar1);
      bar1_remap_failed:
	iounmap(sp->bar0);
      bar0_remap_failed:
      mem_alloc_failed:
	free_shared_mem(sp);
	pci_disable_device(pdev);
7725
	pci_release_regions(pdev);
L
Linus Torvalds 已提交
7726 7727 7728 7729 7730 7731 7732
	pci_set_drvdata(pdev, NULL);
	free_netdev(dev);

	return ret;
}

/**
7733
 * s2io_rem_nic - Free the PCI device
L
Linus Torvalds 已提交
7734
 * @pdev: structure containing the PCI related information of the device.
7735
 * Description: This function is called by the Pci subsystem to release a
L
Linus Torvalds 已提交
7736
 * PCI device and free up all resource held up by the device. This could
7737
 * be in response to a Hot plug event or when the driver is to be removed
L
Linus Torvalds 已提交
7738 7739 7740 7741 7742 7743 7744
 * from memory.
 */

static void __devexit s2io_rem_nic(struct pci_dev *pdev)
{
	struct net_device *dev =
	    (struct net_device *) pci_get_drvdata(pdev);
R
Ralf Baechle 已提交
7745
	struct s2io_nic *sp;
L
Linus Torvalds 已提交
7746 7747 7748 7749 7750 7751

	if (dev == NULL) {
		DBG_PRINT(ERR_DBG, "Driver Data is NULL!!\n");
		return;
	}

7752 7753
	flush_scheduled_work();

L
Linus Torvalds 已提交
7754 7755 7756 7757 7758 7759
	sp = dev->priv;
	unregister_netdev(dev);

	free_shared_mem(sp);
	iounmap(sp->bar0);
	iounmap(sp->bar1);
7760
	pci_release_regions(pdev);
L
Linus Torvalds 已提交
7761 7762
	pci_set_drvdata(pdev, NULL);
	free_netdev(dev);
7763
	pci_disable_device(pdev);
L
Linus Torvalds 已提交
7764 7765 7766 7767 7768 7769 7770 7771 7772 7773
}

/**
 * s2io_starter - Entry point for the driver
 * Description: This function is the entry point for the driver. It verifies
 * the module loadable parameters and initializes PCI configuration space.
 */

int __init s2io_starter(void)
{
7774
	return pci_register_driver(&s2io_driver);
L
Linus Torvalds 已提交
7775 7776 7777
}

/**
7778
 * s2io_closer - Cleanup routine for the driver
L
Linus Torvalds 已提交
7779 7780 7781
 * Description: This function is the cleanup routine for the driver. It unregist * ers the driver.
 */

7782
static __exit void s2io_closer(void)
L
Linus Torvalds 已提交
7783 7784 7785 7786 7787 7788 7789
{
	pci_unregister_driver(&s2io_driver);
	DBG_PRINT(INIT_DBG, "cleanup done\n");
}

module_init(s2io_starter);
module_exit(s2io_closer);
7790

7791
static int check_L2_lro_capable(u8 *buffer, struct iphdr **ip,
R
Ralf Baechle 已提交
7792
		struct tcphdr **tcp, struct RxD_t *rxdp)
7793 7794 7795 7796 7797 7798 7799 7800 7801 7802 7803 7804 7805 7806 7807 7808 7809 7810 7811 7812 7813 7814 7815 7816 7817 7818 7819 7820 7821 7822 7823 7824 7825
{
	int ip_off;
	u8 l2_type = (u8)((rxdp->Control_1 >> 37) & 0x7), ip_len;

	if (!(rxdp->Control_1 & RXD_FRAME_PROTO_TCP)) {
		DBG_PRINT(INIT_DBG,"%s: Non-TCP frames not supported for LRO\n",
			  __FUNCTION__);
		return -1;
	}

	/* TODO:
	 * By default the VLAN field in the MAC is stripped by the card, if this
	 * feature is turned off in rx_pa_cfg register, then the ip_off field
	 * has to be shifted by a further 2 bytes
	 */
	switch (l2_type) {
		case 0: /* DIX type */
		case 4: /* DIX type with VLAN */
			ip_off = HEADER_ETHERNET_II_802_3_SIZE;
			break;
		/* LLC, SNAP etc are considered non-mergeable */
		default:
			return -1;
	}

	*ip = (struct iphdr *)((u8 *)buffer + ip_off);
	ip_len = (u8)((*ip)->ihl);
	ip_len <<= 2;
	*tcp = (struct tcphdr *)((unsigned long)*ip + ip_len);

	return 0;
}

R
Ralf Baechle 已提交
7826
static int check_for_socket_match(struct lro *lro, struct iphdr *ip,
7827 7828 7829 7830 7831 7832 7833 7834 7835 7836 7837 7838 7839 7840
				  struct tcphdr *tcp)
{
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __FUNCTION__);
	if ((lro->iph->saddr != ip->saddr) || (lro->iph->daddr != ip->daddr) ||
	   (lro->tcph->source != tcp->source) || (lro->tcph->dest != tcp->dest))
		return -1;
	return 0;
}

static inline int get_l4_pyld_length(struct iphdr *ip, struct tcphdr *tcp)
{
	return(ntohs(ip->tot_len) - (ip->ihl << 2) - (tcp->doff << 2));
}

R
Ralf Baechle 已提交
7841
static void initiate_new_session(struct lro *lro, u8 *l2h,
7842 7843 7844 7845 7846 7847 7848 7849 7850 7851 7852
		     struct iphdr *ip, struct tcphdr *tcp, u32 tcp_pyld_len)
{
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __FUNCTION__);
	lro->l2h = l2h;
	lro->iph = ip;
	lro->tcph = tcp;
	lro->tcp_next_seq = tcp_pyld_len + ntohl(tcp->seq);
	lro->tcp_ack = ntohl(tcp->ack_seq);
	lro->sg_num = 1;
	lro->total_len = ntohs(ip->tot_len);
	lro->frags_len = 0;
7853
	/*
7854 7855 7856 7857 7858 7859 7860 7861 7862 7863 7864 7865 7866
	 * check if we saw TCP timestamp. Other consistency checks have
	 * already been done.
 	 */
	if (tcp->doff == 8) {
		u32 *ptr;
		ptr = (u32 *)(tcp+1);
		lro->saw_ts = 1;
		lro->cur_tsval = *(ptr+1);
		lro->cur_tsecr = *(ptr+2);
	}
	lro->in_use = 1;
}

R
Ralf Baechle 已提交
7867
static void update_L3L4_header(struct s2io_nic *sp, struct lro *lro)
7868 7869 7870
{
	struct iphdr *ip = lro->iph;
	struct tcphdr *tcp = lro->tcph;
7871
	__sum16 nchk;
R
Ralf Baechle 已提交
7872
	struct stat_block *statinfo = sp->mac_control.stats_info;
7873 7874 7875 7876 7877 7878 7879 7880 7881 7882 7883 7884 7885 7886 7887 7888 7889 7890 7891 7892 7893 7894 7895 7896 7897
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __FUNCTION__);

	/* Update L3 header */
	ip->tot_len = htons(lro->total_len);
	ip->check = 0;
	nchk = ip_fast_csum((u8 *)lro->iph, ip->ihl);
	ip->check = nchk;

	/* Update L4 header */
	tcp->ack_seq = lro->tcp_ack;
	tcp->window = lro->window;

	/* Update tsecr field if this session has timestamps enabled */
	if (lro->saw_ts) {
		u32 *ptr = (u32 *)(tcp + 1);
		*(ptr+2) = lro->cur_tsecr;
	}

	/* Update counters required for calculation of
	 * average no. of packets aggregated.
	 */
	statinfo->sw_stat.sum_avg_pkts_aggregated += lro->sg_num;
	statinfo->sw_stat.num_aggregations++;
}

R
Ralf Baechle 已提交
7898
static void aggregate_new_rx(struct lro *lro, struct iphdr *ip,
7899 7900 7901 7902 7903 7904 7905 7906 7907 7908 7909
		struct tcphdr *tcp, u32 l4_pyld)
{
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __FUNCTION__);
	lro->total_len += l4_pyld;
	lro->frags_len += l4_pyld;
	lro->tcp_next_seq += l4_pyld;
	lro->sg_num++;

	/* Update ack seq no. and window ad(from this pkt) in LRO object */
	lro->tcp_ack = tcp->ack_seq;
	lro->window = tcp->window;
7910

7911 7912 7913 7914
	if (lro->saw_ts) {
		u32 *ptr;
		/* Update tsecr and tsval from this packet */
		ptr = (u32 *) (tcp + 1);
7915
		lro->cur_tsval = *(ptr + 1);
7916 7917 7918 7919
		lro->cur_tsecr = *(ptr + 2);
	}
}

R
Ralf Baechle 已提交
7920
static int verify_l3_l4_lro_capable(struct lro *l_lro, struct iphdr *ip,
7921 7922 7923 7924
				    struct tcphdr *tcp, u32 tcp_pyld_len)
{
	u8 *ptr;

7925 7926
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __FUNCTION__);

7927 7928 7929 7930 7931 7932 7933 7934
	if (!tcp_pyld_len) {
		/* Runt frame or a pure ack */
		return -1;
	}

	if (ip->ihl != 5) /* IP has options */
		return -1;

7935 7936 7937 7938 7939
	/* If we see CE codepoint in IP header, packet is not mergeable */
	if (INET_ECN_is_ce(ipv4_get_dsfield(ip)))
		return -1;

	/* If we see ECE or CWR flags in TCP header, packet is not mergeable */
7940
	if (tcp->urg || tcp->psh || tcp->rst || tcp->syn || tcp->fin ||
7941
				    tcp->ece || tcp->cwr || !tcp->ack) {
7942 7943 7944 7945 7946 7947 7948 7949
		/*
		 * Currently recognize only the ack control word and
		 * any other control field being set would result in
		 * flushing the LRO session
		 */
		return -1;
	}

7950
	/*
7951 7952 7953 7954 7955 7956 7957
	 * Allow only one TCP timestamp option. Don't aggregate if
	 * any other options are detected.
	 */
	if (tcp->doff != 5 && tcp->doff != 8)
		return -1;

	if (tcp->doff == 8) {
7958
		ptr = (u8 *)(tcp + 1);
7959 7960 7961 7962 7963 7964 7965 7966 7967 7968 7969
		while (*ptr == TCPOPT_NOP)
			ptr++;
		if (*ptr != TCPOPT_TIMESTAMP || *(ptr+1) != TCPOLEN_TIMESTAMP)
			return -1;

		/* Ensure timestamp value increases monotonically */
		if (l_lro)
			if (l_lro->cur_tsval > *((u32 *)(ptr+2)))
				return -1;

		/* timestamp echo reply should be non-zero */
7970
		if (*((u32 *)(ptr+6)) == 0)
7971 7972 7973 7974 7975 7976 7977
			return -1;
	}

	return 0;
}

static int
R
Ralf Baechle 已提交
7978 7979
s2io_club_tcp_session(u8 *buffer, u8 **tcp, u32 *tcp_len, struct lro **lro,
		      struct RxD_t *rxdp, struct s2io_nic *sp)
7980 7981 7982 7983 7984 7985 7986 7987 7988 7989 7990 7991 7992 7993 7994 7995
{
	struct iphdr *ip;
	struct tcphdr *tcph;
	int ret = 0, i;

	if (!(ret = check_L2_lro_capable(buffer, &ip, (struct tcphdr **)tcp,
					 rxdp))) {
		DBG_PRINT(INFO_DBG,"IP Saddr: %x Daddr: %x\n",
			  ip->saddr, ip->daddr);
	} else {
		return ret;
	}

	tcph = (struct tcphdr *)*tcp;
	*tcp_len = get_l4_pyld_length(ip, tcph);
	for (i=0; i<MAX_LRO_SESSIONS; i++) {
R
Ralf Baechle 已提交
7996
		struct lro *l_lro = &sp->lro0_n[i];
7997 7998 7999 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 8020 8021 8022 8023 8024 8025 8026 8027 8028 8029 8030 8031 8032 8033
		if (l_lro->in_use) {
			if (check_for_socket_match(l_lro, ip, tcph))
				continue;
			/* Sock pair matched */
			*lro = l_lro;

			if ((*lro)->tcp_next_seq != ntohl(tcph->seq)) {
				DBG_PRINT(INFO_DBG, "%s:Out of order. expected "
					  "0x%x, actual 0x%x\n", __FUNCTION__,
					  (*lro)->tcp_next_seq,
					  ntohl(tcph->seq));

				sp->mac_control.stats_info->
				   sw_stat.outof_sequence_pkts++;
				ret = 2;
				break;
			}

			if (!verify_l3_l4_lro_capable(l_lro, ip, tcph,*tcp_len))
				ret = 1; /* Aggregate */
			else
				ret = 2; /* Flush both */
			break;
		}
	}

	if (ret == 0) {
		/* Before searching for available LRO objects,
		 * check if the pkt is L3/L4 aggregatable. If not
		 * don't create new LRO session. Just send this
		 * packet up.
		 */
		if (verify_l3_l4_lro_capable(NULL, ip, tcph, *tcp_len)) {
			return 5;
		}

		for (i=0; i<MAX_LRO_SESSIONS; i++) {
R
Ralf Baechle 已提交
8034
			struct lro *l_lro = &sp->lro0_n[i];
8035 8036 8037 8038 8039 8040 8041 8042 8043 8044 8045 8046 8047 8048 8049 8050 8051 8052 8053 8054 8055 8056 8057 8058 8059 8060 8061 8062 8063 8064 8065 8066 8067 8068 8069 8070 8071 8072
			if (!(l_lro->in_use)) {
				*lro = l_lro;
				ret = 3; /* Begin anew */
				break;
			}
		}
	}

	if (ret == 0) { /* sessions exceeded */
		DBG_PRINT(INFO_DBG,"%s:All LRO sessions already in use\n",
			  __FUNCTION__);
		*lro = NULL;
		return ret;
	}

	switch (ret) {
		case 3:
			initiate_new_session(*lro, buffer, ip, tcph, *tcp_len);
			break;
		case 2:
			update_L3L4_header(sp, *lro);
			break;
		case 1:
			aggregate_new_rx(*lro, ip, tcph, *tcp_len);
			if ((*lro)->sg_num == sp->lro_max_aggr_per_sess) {
				update_L3L4_header(sp, *lro);
				ret = 4; /* Flush the LRO */
			}
			break;
		default:
			DBG_PRINT(ERR_DBG,"%s:Dont know, can't say!!\n",
				__FUNCTION__);
			break;
	}

	return ret;
}

R
Ralf Baechle 已提交
8073
static void clear_lro_session(struct lro *lro)
8074
{
R
Ralf Baechle 已提交
8075
	static u16 lro_struct_size = sizeof(struct lro);
8076 8077 8078 8079 8080 8081 8082 8083 8084

	memset(lro, 0, lro_struct_size);
}

static void queue_rx_frame(struct sk_buff *skb)
{
	struct net_device *dev = skb->dev;

	skb->protocol = eth_type_trans(skb, dev);
8085 8086 8087 8088
	if (napi)
		netif_receive_skb(skb);
	else
		netif_rx(skb);
8089 8090
}

R
Ralf Baechle 已提交
8091 8092
static void lro_append_pkt(struct s2io_nic *sp, struct lro *lro,
			   struct sk_buff *skb,
8093 8094
			   u32 tcp_len)
{
8095
	struct sk_buff *first = lro->parent;
8096 8097 8098 8099

	first->len += tcp_len;
	first->data_len = lro->frags_len;
	skb_pull(skb, (skb->len - tcp_len));
8100 8101
	if (skb_shinfo(first)->frag_list)
		lro->last_frag->next = skb;
8102 8103
	else
		skb_shinfo(first)->frag_list = skb;
8104
	first->truesize += skb->truesize;
8105
	lro->last_frag = skb;
8106 8107 8108
	sp->mac_control.stats_info->sw_stat.clubbed_frms_cnt++;
	return;
}
8109 8110 8111 8112

/**
 * s2io_io_error_detected - called when PCI error is detected
 * @pdev: Pointer to PCI device
8113
 * @state: The current pci connection state
8114 8115 8116 8117 8118 8119 8120 8121 8122 8123 8124 8125 8126 8127 8128 8129 8130 8131 8132 8133 8134 8135 8136 8137 8138 8139 8140 8141 8142 8143 8144 8145 8146 8147 8148 8149 8150 8151 8152 8153 8154 8155 8156 8157 8158 8159 8160 8161 8162 8163 8164 8165 8166 8167 8168 8169 8170 8171 8172 8173 8174 8175 8176 8177 8178 8179 8180 8181 8182 8183 8184 8185 8186 8187 8188 8189 8190
 *
 * This function is called after a PCI bus error affecting
 * this device has been detected.
 */
static pci_ers_result_t s2io_io_error_detected(struct pci_dev *pdev,
                                               pci_channel_state_t state)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct s2io_nic *sp = netdev->priv;

	netif_device_detach(netdev);

	if (netif_running(netdev)) {
		/* Bring down the card, while avoiding PCI I/O */
		do_s2io_card_down(sp, 0);
	}
	pci_disable_device(pdev);

	return PCI_ERS_RESULT_NEED_RESET;
}

/**
 * s2io_io_slot_reset - called after the pci bus has been reset.
 * @pdev: Pointer to PCI device
 *
 * Restart the card from scratch, as if from a cold-boot.
 * At this point, the card has exprienced a hard reset,
 * followed by fixups by BIOS, and has its config space
 * set up identically to what it was at cold boot.
 */
static pci_ers_result_t s2io_io_slot_reset(struct pci_dev *pdev)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct s2io_nic *sp = netdev->priv;

	if (pci_enable_device(pdev)) {
		printk(KERN_ERR "s2io: "
		       "Cannot re-enable PCI device after reset.\n");
		return PCI_ERS_RESULT_DISCONNECT;
	}

	pci_set_master(pdev);
	s2io_reset(sp);

	return PCI_ERS_RESULT_RECOVERED;
}

/**
 * s2io_io_resume - called when traffic can start flowing again.
 * @pdev: Pointer to PCI device
 *
 * This callback is called when the error recovery driver tells
 * us that its OK to resume normal operation.
 */
static void s2io_io_resume(struct pci_dev *pdev)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct s2io_nic *sp = netdev->priv;

	if (netif_running(netdev)) {
		if (s2io_card_up(sp)) {
			printk(KERN_ERR "s2io: "
			       "Can't bring device back up after reset.\n");
			return;
		}

		if (s2io_set_mac_addr(netdev, netdev->dev_addr) == FAILURE) {
			s2io_card_down(sp);
			printk(KERN_ERR "s2io: "
			       "Can't resetore mac addr after reset.\n");
			return;
		}
	}

	netif_device_attach(netdev);
	netif_wake_queue(netdev);
}
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