s2io.c 245.4 KB
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/************************************************************************
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 * s2io.c: A Linux PCI-X Ethernet driver for Neterion 10GbE Server NIC
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 * Copyright(c) 2002-2007 Neterion Inc.
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 * This software may be used and distributed according to the terms of
 * the GNU General Public License (GPL), incorporated herein by reference.
 * Drivers based on or derived from this code fall under the GPL and must
 * retain the authorship, copyright and license notice.  This file is not
 * a complete program and may only be used when the entire operating
 * system is licensed under the GPL.
 * See the file COPYING in this distribution for more information.
 *
 * Credits:
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 * Jeff Garzik		: For pointing out the improper error condition
 *			  check in the s2io_xmit routine and also some
 *			  issues in the Tx watch dog function. Also for
 *			  patiently answering all those innumerable
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 *			  questions regaring the 2.6 porting issues.
 * Stephen Hemminger	: Providing proper 2.6 porting mechanism for some
 *			  macros available only in 2.6 Kernel.
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 * Francois Romieu	: For pointing out all code part that were
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 *			  deprecated and also styling related comments.
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 * Grant Grundler	: For helping me get rid of some Architecture
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 *			  dependent code.
 * Christopher Hellwig	: Some more 2.6 specific issues in the driver.
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 *
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 * The module loadable parameters that are supported by the driver and a brief
 * explaination of all the variables.
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 *
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 * rx_ring_num : This can be used to program the number of receive rings used
 * in the driver.
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 * rx_ring_sz: This defines the number of receive blocks each ring can have.
 *     This is also an array of size 8.
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 * rx_ring_mode: This defines the operation mode of all 8 rings. The valid
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 *		values are 1, 2.
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 * tx_fifo_num: This defines the number of Tx FIFOs thats used int the driver.
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 * tx_fifo_len: This too is an array of 8. Each element defines the number of
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 * Tx descriptors that can be associated with each corresponding FIFO.
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 * intr_type: This defines the type of interrupt. The values can be 0(INTA),
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 *     2(MSI_X). Default value is '2(MSI_X)'
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 * lro_enable: Specifies whether to enable Large Receive Offload (LRO) or not.
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 *     Possible values '1' for enable '0' for disable. Default is '0'
 * lro_max_pkts: This parameter defines maximum number of packets can be
 *     aggregated as a single large packet
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 * napi: This parameter used to enable/disable NAPI (polling Rx)
 *     Possible values '1' for enable and '0' for disable. Default is '1'
 * ufo: This parameter used to enable/disable UDP Fragmentation Offload(UFO)
 *      Possible values '1' for enable and '0' for disable. Default is '0'
 * vlan_tag_strip: This can be used to enable or disable vlan stripping.
 *                 Possible values '1' for enable , '0' for disable.
 *                 Default is '2' - which means disable in promisc mode
 *                 and enable in non-promiscuous mode.
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 * multiq: This parameter used to enable/disable MULTIQUEUE support.
 *      Possible values '1' for enable and '0' for disable. Default is '0'
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 ************************************************************************/

#include <linux/module.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/pci.h>
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#include <linux/dma-mapping.h>
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#include <linux/kernel.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/stddef.h>
#include <linux/ioctl.h>
#include <linux/timex.h>
#include <linux/ethtool.h>
#include <linux/workqueue.h>
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#include <linux/if_vlan.h>
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#include <linux/ip.h>
#include <linux/tcp.h>
#include <net/tcp.h>
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#include <asm/system.h>
#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/div64.h>
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#include <asm/irq.h>
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/* local include */
#include "s2io.h"
#include "s2io-regs.h"

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#define DRV_VERSION "2.0.26.24"
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/* S2io Driver name & version. */
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static char s2io_driver_name[] = "Neterion";
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static char s2io_driver_version[] = DRV_VERSION;
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static int rxd_size[2] = {32,48};
static int rxd_count[2] = {127,85};
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static inline int RXD_IS_UP2DT(struct RxD_t *rxdp)
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{
	int ret;

	ret = ((!(rxdp->Control_1 & RXD_OWN_XENA)) &&
		(GET_RXD_MARKER(rxdp->Control_2) != THE_RXD_MARK));

	return ret;
}

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/*
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 * Cards with following subsystem_id have a link state indication
 * problem, 600B, 600C, 600D, 640B, 640C and 640D.
 * macro below identifies these cards given the subsystem_id.
 */
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#define CARDS_WITH_FAULTY_LINK_INDICATORS(dev_type, subid) \
	(dev_type == XFRAME_I_DEVICE) ?			\
		((((subid >= 0x600B) && (subid <= 0x600D)) || \
		 ((subid >= 0x640B) && (subid <= 0x640D))) ? 1 : 0) : 0
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#define LINK_IS_UP(val64) (!(val64 & (ADAPTER_STATUS_RMAC_REMOTE_FAULT | \
				      ADAPTER_STATUS_RMAC_LOCAL_FAULT)))

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static inline int is_s2io_card_up(const struct s2io_nic * sp)
{
	return test_bit(__S2IO_STATE_CARD_UP, &sp->state);
}

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/* Ethtool related variables and Macros. */
static char s2io_gstrings[][ETH_GSTRING_LEN] = {
	"Register test\t(offline)",
	"Eeprom test\t(offline)",
	"Link test\t(online)",
	"RLDRAM test\t(offline)",
	"BIST Test\t(offline)"
};

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static char ethtool_xena_stats_keys[][ETH_GSTRING_LEN] = {
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	{"tmac_frms"},
	{"tmac_data_octets"},
	{"tmac_drop_frms"},
	{"tmac_mcst_frms"},
	{"tmac_bcst_frms"},
	{"tmac_pause_ctrl_frms"},
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	{"tmac_ttl_octets"},
	{"tmac_ucst_frms"},
	{"tmac_nucst_frms"},
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	{"tmac_any_err_frms"},
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	{"tmac_ttl_less_fb_octets"},
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	{"tmac_vld_ip_octets"},
	{"tmac_vld_ip"},
	{"tmac_drop_ip"},
	{"tmac_icmp"},
	{"tmac_rst_tcp"},
	{"tmac_tcp"},
	{"tmac_udp"},
	{"rmac_vld_frms"},
	{"rmac_data_octets"},
	{"rmac_fcs_err_frms"},
	{"rmac_drop_frms"},
	{"rmac_vld_mcst_frms"},
	{"rmac_vld_bcst_frms"},
	{"rmac_in_rng_len_err_frms"},
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	{"rmac_out_rng_len_err_frms"},
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	{"rmac_long_frms"},
	{"rmac_pause_ctrl_frms"},
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	{"rmac_unsup_ctrl_frms"},
	{"rmac_ttl_octets"},
	{"rmac_accepted_ucst_frms"},
	{"rmac_accepted_nucst_frms"},
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	{"rmac_discarded_frms"},
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	{"rmac_drop_events"},
	{"rmac_ttl_less_fb_octets"},
	{"rmac_ttl_frms"},
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	{"rmac_usized_frms"},
	{"rmac_osized_frms"},
	{"rmac_frag_frms"},
	{"rmac_jabber_frms"},
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	{"rmac_ttl_64_frms"},
	{"rmac_ttl_65_127_frms"},
	{"rmac_ttl_128_255_frms"},
	{"rmac_ttl_256_511_frms"},
	{"rmac_ttl_512_1023_frms"},
	{"rmac_ttl_1024_1518_frms"},
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	{"rmac_ip"},
	{"rmac_ip_octets"},
	{"rmac_hdr_err_ip"},
	{"rmac_drop_ip"},
	{"rmac_icmp"},
	{"rmac_tcp"},
	{"rmac_udp"},
	{"rmac_err_drp_udp"},
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	{"rmac_xgmii_err_sym"},
	{"rmac_frms_q0"},
	{"rmac_frms_q1"},
	{"rmac_frms_q2"},
	{"rmac_frms_q3"},
	{"rmac_frms_q4"},
	{"rmac_frms_q5"},
	{"rmac_frms_q6"},
	{"rmac_frms_q7"},
	{"rmac_full_q0"},
	{"rmac_full_q1"},
	{"rmac_full_q2"},
	{"rmac_full_q3"},
	{"rmac_full_q4"},
	{"rmac_full_q5"},
	{"rmac_full_q6"},
	{"rmac_full_q7"},
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	{"rmac_pause_cnt"},
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	{"rmac_xgmii_data_err_cnt"},
	{"rmac_xgmii_ctrl_err_cnt"},
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	{"rmac_accepted_ip"},
	{"rmac_err_tcp"},
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	{"rd_req_cnt"},
	{"new_rd_req_cnt"},
	{"new_rd_req_rtry_cnt"},
	{"rd_rtry_cnt"},
	{"wr_rtry_rd_ack_cnt"},
	{"wr_req_cnt"},
	{"new_wr_req_cnt"},
	{"new_wr_req_rtry_cnt"},
	{"wr_rtry_cnt"},
	{"wr_disc_cnt"},
	{"rd_rtry_wr_ack_cnt"},
	{"txp_wr_cnt"},
	{"txd_rd_cnt"},
	{"txd_wr_cnt"},
	{"rxd_rd_cnt"},
	{"rxd_wr_cnt"},
	{"txf_rd_cnt"},
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	{"rxf_wr_cnt"}
};

static char ethtool_enhanced_stats_keys[][ETH_GSTRING_LEN] = {
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	{"rmac_ttl_1519_4095_frms"},
	{"rmac_ttl_4096_8191_frms"},
	{"rmac_ttl_8192_max_frms"},
	{"rmac_ttl_gt_max_frms"},
	{"rmac_osized_alt_frms"},
	{"rmac_jabber_alt_frms"},
	{"rmac_gt_max_alt_frms"},
	{"rmac_vlan_frms"},
	{"rmac_len_discard"},
	{"rmac_fcs_discard"},
	{"rmac_pf_discard"},
	{"rmac_da_discard"},
	{"rmac_red_discard"},
	{"rmac_rts_discard"},
	{"rmac_ingm_full_discard"},
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	{"link_fault_cnt"}
};

static char ethtool_driver_stats_keys[][ETH_GSTRING_LEN] = {
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	{"\n DRIVER STATISTICS"},
	{"single_bit_ecc_errs"},
	{"double_bit_ecc_errs"},
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	{"parity_err_cnt"},
	{"serious_err_cnt"},
	{"soft_reset_cnt"},
	{"fifo_full_cnt"},
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	{"ring_0_full_cnt"},
	{"ring_1_full_cnt"},
	{"ring_2_full_cnt"},
	{"ring_3_full_cnt"},
	{"ring_4_full_cnt"},
	{"ring_5_full_cnt"},
	{"ring_6_full_cnt"},
	{"ring_7_full_cnt"},
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	{"alarm_transceiver_temp_high"},
	{"alarm_transceiver_temp_low"},
	{"alarm_laser_bias_current_high"},
	{"alarm_laser_bias_current_low"},
	{"alarm_laser_output_power_high"},
	{"alarm_laser_output_power_low"},
	{"warn_transceiver_temp_high"},
	{"warn_transceiver_temp_low"},
	{"warn_laser_bias_current_high"},
	{"warn_laser_bias_current_low"},
	{"warn_laser_output_power_high"},
	{"warn_laser_output_power_low"},
	{"lro_aggregated_pkts"},
	{"lro_flush_both_count"},
	{"lro_out_of_sequence_pkts"},
	{"lro_flush_due_to_max_pkts"},
	{"lro_avg_aggr_pkts"},
	{"mem_alloc_fail_cnt"},
	{"pci_map_fail_cnt"},
	{"watchdog_timer_cnt"},
	{"mem_allocated"},
	{"mem_freed"},
	{"link_up_cnt"},
	{"link_down_cnt"},
	{"link_up_time"},
	{"link_down_time"},
	{"tx_tcode_buf_abort_cnt"},
	{"tx_tcode_desc_abort_cnt"},
	{"tx_tcode_parity_err_cnt"},
	{"tx_tcode_link_loss_cnt"},
	{"tx_tcode_list_proc_err_cnt"},
	{"rx_tcode_parity_err_cnt"},
	{"rx_tcode_abort_cnt"},
	{"rx_tcode_parity_abort_cnt"},
	{"rx_tcode_rda_fail_cnt"},
	{"rx_tcode_unkn_prot_cnt"},
	{"rx_tcode_fcs_err_cnt"},
	{"rx_tcode_buf_size_err_cnt"},
	{"rx_tcode_rxd_corrupt_cnt"},
	{"rx_tcode_unkn_err_cnt"},
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	{"tda_err_cnt"},
	{"pfc_err_cnt"},
	{"pcc_err_cnt"},
	{"tti_err_cnt"},
	{"tpa_err_cnt"},
	{"sm_err_cnt"},
	{"lso_err_cnt"},
	{"mac_tmac_err_cnt"},
	{"mac_rmac_err_cnt"},
	{"xgxs_txgxs_err_cnt"},
	{"xgxs_rxgxs_err_cnt"},
	{"rc_err_cnt"},
	{"prc_pcix_err_cnt"},
	{"rpa_err_cnt"},
	{"rda_err_cnt"},
	{"rti_err_cnt"},
	{"mc_err_cnt"}
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};

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#define S2IO_XENA_STAT_LEN	ARRAY_SIZE(ethtool_xena_stats_keys)
#define S2IO_ENHANCED_STAT_LEN	ARRAY_SIZE(ethtool_enhanced_stats_keys)
#define S2IO_DRIVER_STAT_LEN	ARRAY_SIZE(ethtool_driver_stats_keys)
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#define XFRAME_I_STAT_LEN (S2IO_XENA_STAT_LEN + S2IO_DRIVER_STAT_LEN )
#define XFRAME_II_STAT_LEN (XFRAME_I_STAT_LEN + S2IO_ENHANCED_STAT_LEN )

#define XFRAME_I_STAT_STRINGS_LEN ( XFRAME_I_STAT_LEN * ETH_GSTRING_LEN )
#define XFRAME_II_STAT_STRINGS_LEN ( XFRAME_II_STAT_LEN * ETH_GSTRING_LEN )
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#define S2IO_TEST_LEN	ARRAY_SIZE(s2io_gstrings)
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#define S2IO_STRINGS_LEN	S2IO_TEST_LEN * ETH_GSTRING_LEN

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#define S2IO_TIMER_CONF(timer, handle, arg, exp)		\
			init_timer(&timer);			\
			timer.function = handle;		\
			timer.data = (unsigned long) arg;	\
			mod_timer(&timer, (jiffies + exp))	\

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/* copy mac addr to def_mac_addr array */
static void do_s2io_copy_mac_addr(struct s2io_nic *sp, int offset, u64 mac_addr)
{
	sp->def_mac_addr[offset].mac_addr[5] = (u8) (mac_addr);
	sp->def_mac_addr[offset].mac_addr[4] = (u8) (mac_addr >> 8);
	sp->def_mac_addr[offset].mac_addr[3] = (u8) (mac_addr >> 16);
	sp->def_mac_addr[offset].mac_addr[2] = (u8) (mac_addr >> 24);
	sp->def_mac_addr[offset].mac_addr[1] = (u8) (mac_addr >> 32);
	sp->def_mac_addr[offset].mac_addr[0] = (u8) (mac_addr >> 40);
}
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/* Add the vlan */
static void s2io_vlan_rx_register(struct net_device *dev,
					struct vlan_group *grp)
{
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	int i;
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	struct s2io_nic *nic = dev->priv;
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	unsigned long flags[MAX_TX_FIFOS];
	struct mac_info *mac_control = &nic->mac_control;
	struct config_param *config = &nic->config;

	for (i = 0; i < config->tx_fifo_num; i++)
		spin_lock_irqsave(&mac_control->fifos[i].tx_lock, flags[i]);
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	nic->vlgrp = grp;
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	for (i = config->tx_fifo_num - 1; i >= 0; i--)
		spin_unlock_irqrestore(&mac_control->fifos[i].tx_lock,
				flags[i]);
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}

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/* A flag indicating whether 'RX_PA_CFG_STRIP_VLAN_TAG' bit is set or not */
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static int vlan_strip_flag;
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/* Unregister the vlan */
static void s2io_vlan_rx_kill_vid(struct net_device *dev, unsigned long vid)
{
	int i;
	struct s2io_nic *nic = dev->priv;
	unsigned long flags[MAX_TX_FIFOS];
	struct mac_info *mac_control = &nic->mac_control;
	struct config_param *config = &nic->config;

	for (i = 0; i < config->tx_fifo_num; i++)
		spin_lock_irqsave(&mac_control->fifos[i].tx_lock, flags[i]);

	if (nic->vlgrp)
		vlan_group_set_device(nic->vlgrp, vid, NULL);

	for (i = config->tx_fifo_num - 1; i >= 0; i--)
		spin_unlock_irqrestore(&mac_control->fifos[i].tx_lock,
			flags[i]);
}

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/*
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 * Constants to be programmed into the Xena's registers, to configure
 * the XAUI.
 */

#define	END_SIGN	0x0
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static const u64 herc_act_dtx_cfg[] = {
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	/* Set address */
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	0x8000051536750000ULL, 0x80000515367500E0ULL,
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	/* Write data */
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	0x8000051536750004ULL, 0x80000515367500E4ULL,
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	/* Set address */
	0x80010515003F0000ULL, 0x80010515003F00E0ULL,
	/* Write data */
	0x80010515003F0004ULL, 0x80010515003F00E4ULL,
	/* Set address */
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	0x801205150D440000ULL, 0x801205150D4400E0ULL,
	/* Write data */
	0x801205150D440004ULL, 0x801205150D4400E4ULL,
	/* Set address */
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	0x80020515F2100000ULL, 0x80020515F21000E0ULL,
	/* Write data */
	0x80020515F2100004ULL, 0x80020515F21000E4ULL,
	/* Done */
	END_SIGN
};

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static const u64 xena_dtx_cfg[] = {
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	/* Set address */
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	0x8000051500000000ULL, 0x80000515000000E0ULL,
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	/* Write data */
	0x80000515D9350004ULL, 0x80000515D93500E4ULL,
	/* Set address */
	0x8001051500000000ULL, 0x80010515000000E0ULL,
	/* Write data */
	0x80010515001E0004ULL, 0x80010515001E00E4ULL,
	/* Set address */
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	0x8002051500000000ULL, 0x80020515000000E0ULL,
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	/* Write data */
	0x80020515F2100004ULL, 0x80020515F21000E4ULL,
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	END_SIGN
};

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/*
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 * Constants for Fixing the MacAddress problem seen mostly on
 * Alpha machines.
 */
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static const u64 fix_mac[] = {
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	0x0060000000000000ULL, 0x0060600000000000ULL,
	0x0040600000000000ULL, 0x0000600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0060600000000000ULL,
	0x0020600000000000ULL, 0x0000600000000000ULL,
	0x0040600000000000ULL, 0x0060600000000000ULL,
	END_SIGN
};

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MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);


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/* Module Loadable parameters. */
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S2IO_PARM_INT(tx_fifo_num, FIFO_DEFAULT_NUM);
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S2IO_PARM_INT(rx_ring_num, 1);
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S2IO_PARM_INT(multiq, 0);
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S2IO_PARM_INT(rx_ring_mode, 1);
S2IO_PARM_INT(use_continuous_tx_intrs, 1);
S2IO_PARM_INT(rmac_pause_time, 0x100);
S2IO_PARM_INT(mc_pause_threshold_q0q3, 187);
S2IO_PARM_INT(mc_pause_threshold_q4q7, 187);
S2IO_PARM_INT(shared_splits, 0);
S2IO_PARM_INT(tmac_util_period, 5);
S2IO_PARM_INT(rmac_util_period, 5);
S2IO_PARM_INT(l3l4hdr_size, 128);
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/* 0 is no steering, 1 is Priority steering, 2 is Default steering */
S2IO_PARM_INT(tx_steering_type, TX_DEFAULT_STEERING);
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/* Frequency of Rx desc syncs expressed as power of 2 */
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S2IO_PARM_INT(rxsync_frequency, 3);
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/* Interrupt type. Values can be 0(INTA), 2(MSI_X) */
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S2IO_PARM_INT(intr_type, 2);
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/* Large receive offload feature */
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static unsigned int lro_enable;
module_param_named(lro, lro_enable, uint, 0);

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/* Max pkts to be aggregated by LRO at one time. If not specified,
 * aggregation happens until we hit max IP pkt size(64K)
 */
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S2IO_PARM_INT(lro_max_pkts, 0xFFFF);
S2IO_PARM_INT(indicate_max_pkts, 0);
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S2IO_PARM_INT(napi, 1);
S2IO_PARM_INT(ufo, 0);
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S2IO_PARM_INT(vlan_tag_strip, NO_STRIP_IN_PROMISC);
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static unsigned int tx_fifo_len[MAX_TX_FIFOS] =
    {DEFAULT_FIFO_0_LEN, [1 ...(MAX_TX_FIFOS - 1)] = DEFAULT_FIFO_1_7_LEN};
static unsigned int rx_ring_sz[MAX_RX_RINGS] =
    {[0 ...(MAX_RX_RINGS - 1)] = SMALL_BLK_CNT};
static unsigned int rts_frm_len[MAX_RX_RINGS] =
    {[0 ...(MAX_RX_RINGS - 1)] = 0 };

module_param_array(tx_fifo_len, uint, NULL, 0);
module_param_array(rx_ring_sz, uint, NULL, 0);
module_param_array(rts_frm_len, uint, NULL, 0);
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/*
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 * S2IO device table.
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 * This table lists all the devices that this driver supports.
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 */
static struct pci_device_id s2io_tbl[] __devinitdata = {
	{PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_WIN,
	 PCI_ANY_ID, PCI_ANY_ID},
	{PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_UNI,
	 PCI_ANY_ID, PCI_ANY_ID},
	{PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_WIN,
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         PCI_ANY_ID, PCI_ANY_ID},
        {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_UNI,
         PCI_ANY_ID, PCI_ANY_ID},
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	{0,}
};

MODULE_DEVICE_TABLE(pci, s2io_tbl);

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static struct pci_error_handlers s2io_err_handler = {
	.error_detected = s2io_io_error_detected,
	.slot_reset = s2io_io_slot_reset,
	.resume = s2io_io_resume,
};

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static struct pci_driver s2io_driver = {
      .name = "S2IO",
      .id_table = s2io_tbl,
      .probe = s2io_init_nic,
      .remove = __devexit_p(s2io_rem_nic),
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      .err_handler = &s2io_err_handler,
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};

/* A simplifier macro used both by init and free shared_mem Fns(). */
#define TXD_MEM_PAGE_CNT(len, per_each) ((len+per_each - 1) / per_each)

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/* netqueue manipulation helper functions */
static inline void s2io_stop_all_tx_queue(struct s2io_nic *sp)
{
	int i;
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
	if (sp->config.multiq) {
		for (i = 0; i < sp->config.tx_fifo_num; i++)
			netif_stop_subqueue(sp->dev, i);
	} else
#endif
	{
		for (i = 0; i < sp->config.tx_fifo_num; i++)
			sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_STOP;
		netif_stop_queue(sp->dev);
	}
}

static inline void s2io_stop_tx_queue(struct s2io_nic *sp, int fifo_no)
{
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
	if (sp->config.multiq)
		netif_stop_subqueue(sp->dev, fifo_no);
	else
#endif
	{
		sp->mac_control.fifos[fifo_no].queue_state =
			FIFO_QUEUE_STOP;
		netif_stop_queue(sp->dev);
	}
}

static inline void s2io_start_all_tx_queue(struct s2io_nic *sp)
{
	int i;
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
	if (sp->config.multiq) {
		for (i = 0; i < sp->config.tx_fifo_num; i++)
			netif_start_subqueue(sp->dev, i);
	} else
#endif
	{
		for (i = 0; i < sp->config.tx_fifo_num; i++)
			sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_START;
		netif_start_queue(sp->dev);
	}
}

static inline void s2io_start_tx_queue(struct s2io_nic *sp, int fifo_no)
{
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
	if (sp->config.multiq)
		netif_start_subqueue(sp->dev, fifo_no);
	else
#endif
	{
		sp->mac_control.fifos[fifo_no].queue_state =
			FIFO_QUEUE_START;
		netif_start_queue(sp->dev);
	}
}

static inline void s2io_wake_all_tx_queue(struct s2io_nic *sp)
{
	int i;
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
	if (sp->config.multiq) {
		for (i = 0; i < sp->config.tx_fifo_num; i++)
			netif_wake_subqueue(sp->dev, i);
	} else
#endif
	{
		for (i = 0; i < sp->config.tx_fifo_num; i++)
			sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_START;
		netif_wake_queue(sp->dev);
	}
}

static inline void s2io_wake_tx_queue(
	struct fifo_info *fifo, int cnt, u8 multiq)
{

#ifdef CONFIG_NETDEVICES_MULTIQUEUE
	if (multiq) {
		if (cnt && __netif_subqueue_stopped(fifo->dev, fifo->fifo_no))
			netif_wake_subqueue(fifo->dev, fifo->fifo_no);
	} else
#endif
	if (cnt && (fifo->queue_state == FIFO_QUEUE_STOP)) {
		if (netif_queue_stopped(fifo->dev)) {
			fifo->queue_state = FIFO_QUEUE_START;
			netif_wake_queue(fifo->dev);
		}
	}
}

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/**
 * init_shared_mem - Allocation and Initialization of Memory
 * @nic: Device private variable.
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 * Description: The function allocates all the memory areas shared
 * between the NIC and the driver. This includes Tx descriptors,
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 * Rx descriptors and the statistics block.
 */

static int init_shared_mem(struct s2io_nic *nic)
{
	u32 size;
	void *tmp_v_addr, *tmp_v_addr_next;
	dma_addr_t tmp_p_addr, tmp_p_addr_next;
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	struct RxD_block *pre_rxd_blk = NULL;
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	int i, j, blk_cnt;
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	int lst_size, lst_per_page;
	struct net_device *dev = nic->dev;
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	unsigned long tmp;
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	struct buffAdd *ba;
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	struct mac_info *mac_control;
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	struct config_param *config;
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	unsigned long long mem_allocated = 0;
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	mac_control = &nic->mac_control;
	config = &nic->config;


	/* Allocation and initialization of TXDLs in FIOFs */
	size = 0;
	for (i = 0; i < config->tx_fifo_num; i++) {
		size += config->tx_cfg[i].fifo_len;
	}
	if (size > MAX_AVAILABLE_TXDS) {
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		DBG_PRINT(ERR_DBG, "s2io: Requested TxDs too high, ");
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		DBG_PRINT(ERR_DBG, "Requested: %d, max supported: 8192\n", size);
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		return -EINVAL;
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	}

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	size = 0;
	for (i = 0; i < config->tx_fifo_num; i++) {
		size = config->tx_cfg[i].fifo_len;
		/*
		 * Legal values are from 2 to 8192
		 */
		if (size < 2) {
			DBG_PRINT(ERR_DBG, "s2io: Invalid fifo len (%d)", size);
			DBG_PRINT(ERR_DBG, "for fifo %d\n", i);
			DBG_PRINT(ERR_DBG, "s2io: Legal values for fifo len"
				"are 2 to 8192\n");
			return -EINVAL;
		}
	}

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	lst_size = (sizeof(struct TxD) * config->max_txds);
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	lst_per_page = PAGE_SIZE / lst_size;

	for (i = 0; i < config->tx_fifo_num; i++) {
		int fifo_len = config->tx_cfg[i].fifo_len;
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		int list_holder_size = fifo_len * sizeof(struct list_info_hold);
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		mac_control->fifos[i].list_info = kzalloc(list_holder_size,
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							  GFP_KERNEL);
		if (!mac_control->fifos[i].list_info) {
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			DBG_PRINT(INFO_DBG,
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				  "Malloc failed for list_info\n");
			return -ENOMEM;
		}
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		mem_allocated += list_holder_size;
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	}
	for (i = 0; i < config->tx_fifo_num; i++) {
		int page_num = TXD_MEM_PAGE_CNT(config->tx_cfg[i].fifo_len,
						lst_per_page);
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		mac_control->fifos[i].tx_curr_put_info.offset = 0;
		mac_control->fifos[i].tx_curr_put_info.fifo_len =
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		    config->tx_cfg[i].fifo_len - 1;
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		mac_control->fifos[i].tx_curr_get_info.offset = 0;
		mac_control->fifos[i].tx_curr_get_info.fifo_len =
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		    config->tx_cfg[i].fifo_len - 1;
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		mac_control->fifos[i].fifo_no = i;
		mac_control->fifos[i].nic = nic;
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		mac_control->fifos[i].max_txds = MAX_SKB_FRAGS + 2;
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		mac_control->fifos[i].dev = dev;
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		for (j = 0; j < page_num; j++) {
			int k = 0;
			dma_addr_t tmp_p;
			void *tmp_v;
			tmp_v = pci_alloc_consistent(nic->pdev,
						     PAGE_SIZE, &tmp_p);
			if (!tmp_v) {
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				DBG_PRINT(INFO_DBG,
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					  "pci_alloc_consistent ");
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				DBG_PRINT(INFO_DBG, "failed for TxDL\n");
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				return -ENOMEM;
			}
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			/* If we got a zero DMA address(can happen on
			 * certain platforms like PPC), reallocate.
			 * Store virtual address of page we don't want,
			 * to be freed later.
			 */
			if (!tmp_p) {
				mac_control->zerodma_virt_addr = tmp_v;
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				DBG_PRINT(INIT_DBG,
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				"%s: Zero DMA address for TxDL. ", dev->name);
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				DBG_PRINT(INIT_DBG,
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				"Virtual address %p\n", tmp_v);
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				tmp_v = pci_alloc_consistent(nic->pdev,
						     PAGE_SIZE, &tmp_p);
				if (!tmp_v) {
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					DBG_PRINT(INFO_DBG,
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					  "pci_alloc_consistent ");
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					DBG_PRINT(INFO_DBG, "failed for TxDL\n");
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					return -ENOMEM;
				}
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				mem_allocated += PAGE_SIZE;
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			}
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			while (k < lst_per_page) {
				int l = (j * lst_per_page) + k;
				if (l == config->tx_cfg[i].fifo_len)
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					break;
				mac_control->fifos[i].list_info[l].list_virt_addr =
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				    tmp_v + (k * lst_size);
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				mac_control->fifos[i].list_info[l].list_phy_addr =
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				    tmp_p + (k * lst_size);
				k++;
			}
		}
	}

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	for (i = 0; i < config->tx_fifo_num; i++) {
		size = config->tx_cfg[i].fifo_len;
		mac_control->fifos[i].ufo_in_band_v
			= kcalloc(size, sizeof(u64), GFP_KERNEL);
		if (!mac_control->fifos[i].ufo_in_band_v)
			return -ENOMEM;
		mem_allocated += (size * sizeof(u64));
	}
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	/* Allocation and initialization of RXDs in Rings */
	size = 0;
	for (i = 0; i < config->rx_ring_num; i++) {
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		if (config->rx_cfg[i].num_rxd %
		    (rxd_count[nic->rxd_mode] + 1)) {
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			DBG_PRINT(ERR_DBG, "%s: RxD count of ", dev->name);
			DBG_PRINT(ERR_DBG, "Ring%d is not a multiple of ",
				  i);
			DBG_PRINT(ERR_DBG, "RxDs per Block");
			return FAILURE;
		}
		size += config->rx_cfg[i].num_rxd;
790
		mac_control->rings[i].block_count =
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			config->rx_cfg[i].num_rxd /
			(rxd_count[nic->rxd_mode] + 1 );
		mac_control->rings[i].pkt_cnt = config->rx_cfg[i].num_rxd -
			mac_control->rings[i].block_count;
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	}
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	if (nic->rxd_mode == RXD_MODE_1)
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		size = (size * (sizeof(struct RxD1)));
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	else
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		size = (size * (sizeof(struct RxD3)));
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	for (i = 0; i < config->rx_ring_num; i++) {
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		mac_control->rings[i].rx_curr_get_info.block_index = 0;
		mac_control->rings[i].rx_curr_get_info.offset = 0;
		mac_control->rings[i].rx_curr_get_info.ring_len =
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		    config->rx_cfg[i].num_rxd - 1;
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		mac_control->rings[i].rx_curr_put_info.block_index = 0;
		mac_control->rings[i].rx_curr_put_info.offset = 0;
		mac_control->rings[i].rx_curr_put_info.ring_len =
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		    config->rx_cfg[i].num_rxd - 1;
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		mac_control->rings[i].nic = nic;
		mac_control->rings[i].ring_no = i;
812
		mac_control->rings[i].lro = lro_enable;
813

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		blk_cnt = config->rx_cfg[i].num_rxd /
				(rxd_count[nic->rxd_mode] + 1);
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		/*  Allocating all the Rx blocks */
		for (j = 0; j < blk_cnt; j++) {
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			struct rx_block_info *rx_blocks;
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			int l;

			rx_blocks = &mac_control->rings[i].rx_blocks[j];
			size = SIZE_OF_BLOCK; //size is always page size
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			tmp_v_addr = pci_alloc_consistent(nic->pdev, size,
							  &tmp_p_addr);
			if (tmp_v_addr == NULL) {
				/*
827 828 829
				 * In case of failure, free_shared_mem()
				 * is called, which should free any
				 * memory that was alloced till the
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				 * failure happened.
				 */
832
				rx_blocks->block_virt_addr = tmp_v_addr;
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				return -ENOMEM;
			}
835
			mem_allocated += size;
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			memset(tmp_v_addr, 0, size);
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			rx_blocks->block_virt_addr = tmp_v_addr;
			rx_blocks->block_dma_addr = tmp_p_addr;
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			rx_blocks->rxds = kmalloc(sizeof(struct rxd_info)*
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						  rxd_count[nic->rxd_mode],
						  GFP_KERNEL);
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			if (!rx_blocks->rxds)
				return -ENOMEM;
844
			mem_allocated +=
845
			(sizeof(struct rxd_info)* rxd_count[nic->rxd_mode]);
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			for (l=0; l<rxd_count[nic->rxd_mode];l++) {
				rx_blocks->rxds[l].virt_addr =
					rx_blocks->block_virt_addr +
					(rxd_size[nic->rxd_mode] * l);
				rx_blocks->rxds[l].dma_addr =
					rx_blocks->block_dma_addr +
					(rxd_size[nic->rxd_mode] * l);
			}
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		}
		/* Interlinking all Rx Blocks */
		for (j = 0; j < blk_cnt; j++) {
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			tmp_v_addr =
				mac_control->rings[i].rx_blocks[j].block_virt_addr;
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			tmp_v_addr_next =
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				mac_control->rings[i].rx_blocks[(j + 1) %
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					      blk_cnt].block_virt_addr;
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			tmp_p_addr =
				mac_control->rings[i].rx_blocks[j].block_dma_addr;
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			tmp_p_addr_next =
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				mac_control->rings[i].rx_blocks[(j + 1) %
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					      blk_cnt].block_dma_addr;

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			pre_rxd_blk = (struct RxD_block *) tmp_v_addr;
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			pre_rxd_blk->reserved_2_pNext_RxD_block =
			    (unsigned long) tmp_v_addr_next;
			pre_rxd_blk->pNext_RxD_Blk_physical =
			    (u64) tmp_p_addr_next;
		}
	}
875
	if (nic->rxd_mode == RXD_MODE_3B) {
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		/*
		 * Allocation of Storages for buffer addresses in 2BUFF mode
		 * and the buffers as well.
		 */
		for (i = 0; i < config->rx_ring_num; i++) {
			blk_cnt = config->rx_cfg[i].num_rxd /
			   (rxd_count[nic->rxd_mode]+ 1);
			mac_control->rings[i].ba =
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				kmalloc((sizeof(struct buffAdd *) * blk_cnt),
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				     GFP_KERNEL);
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			if (!mac_control->rings[i].ba)
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				return -ENOMEM;
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			mem_allocated +=(sizeof(struct buffAdd *) * blk_cnt);
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			for (j = 0; j < blk_cnt; j++) {
				int k = 0;
				mac_control->rings[i].ba[j] =
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					kmalloc((sizeof(struct buffAdd) *
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						(rxd_count[nic->rxd_mode] + 1)),
						GFP_KERNEL);
				if (!mac_control->rings[i].ba[j])
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					return -ENOMEM;
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				mem_allocated += (sizeof(struct buffAdd) *  \
					(rxd_count[nic->rxd_mode] + 1));
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				while (k != rxd_count[nic->rxd_mode]) {
					ba = &mac_control->rings[i].ba[j][k];

					ba->ba_0_org = (void *) kmalloc
					    (BUF0_LEN + ALIGN_SIZE, GFP_KERNEL);
					if (!ba->ba_0_org)
						return -ENOMEM;
906
					mem_allocated +=
907
						(BUF0_LEN + ALIGN_SIZE);
908 909 910 911 912 913 914 915 916
					tmp = (unsigned long)ba->ba_0_org;
					tmp += ALIGN_SIZE;
					tmp &= ~((unsigned long) ALIGN_SIZE);
					ba->ba_0 = (void *) tmp;

					ba->ba_1_org = (void *) kmalloc
					    (BUF1_LEN + ALIGN_SIZE, GFP_KERNEL);
					if (!ba->ba_1_org)
						return -ENOMEM;
917
					mem_allocated
918
						+= (BUF1_LEN + ALIGN_SIZE);
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					tmp = (unsigned long) ba->ba_1_org;
					tmp += ALIGN_SIZE;
					tmp &= ~((unsigned long) ALIGN_SIZE);
					ba->ba_1 = (void *) tmp;
					k++;
				}
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			}
		}
	}

	/* Allocation and initialization of Statistics block */
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	size = sizeof(struct stat_block);
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	mac_control->stats_mem = pci_alloc_consistent
	    (nic->pdev, size, &mac_control->stats_mem_phy);

	if (!mac_control->stats_mem) {
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		/*
		 * In case of failure, free_shared_mem() is called, which
		 * should free any memory that was alloced till the
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		 * failure happened.
		 */
		return -ENOMEM;
	}
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	mem_allocated += size;
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	mac_control->stats_mem_sz = size;

	tmp_v_addr = mac_control->stats_mem;
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	mac_control->stats_info = (struct stat_block *) tmp_v_addr;
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	memset(tmp_v_addr, 0, size);
	DBG_PRINT(INIT_DBG, "%s:Ring Mem PHY: 0x%llx\n", dev->name,
		  (unsigned long long) tmp_p_addr);
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	mac_control->stats_info->sw_stat.mem_allocated += mem_allocated;
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	return SUCCESS;
}

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/**
 * free_shared_mem - Free the allocated Memory
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 * @nic:  Device private variable.
 * Description: This function is to free all memory locations allocated by
 * the init_shared_mem() function and return it to the kernel.
 */

static void free_shared_mem(struct s2io_nic *nic)
{
	int i, j, blk_cnt, size;
	void *tmp_v_addr;
	dma_addr_t tmp_p_addr;
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	struct mac_info *mac_control;
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	struct config_param *config;
	int lst_size, lst_per_page;
969
	struct net_device *dev;
970
	int page_num = 0;
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	if (!nic)
		return;

975 976
	dev = nic->dev;

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	mac_control = &nic->mac_control;
	config = &nic->config;

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	lst_size = (sizeof(struct TxD) * config->max_txds);
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	lst_per_page = PAGE_SIZE / lst_size;

	for (i = 0; i < config->tx_fifo_num; i++) {
984 985
		page_num = TXD_MEM_PAGE_CNT(config->tx_cfg[i].fifo_len,
							lst_per_page);
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		for (j = 0; j < page_num; j++) {
			int mem_blks = (j * lst_per_page);
988
			if (!mac_control->fifos[i].list_info)
989
				return;
990 991
			if (!mac_control->fifos[i].list_info[mem_blks].
				 list_virt_addr)
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				break;
			pci_free_consistent(nic->pdev, PAGE_SIZE,
994 995
					    mac_control->fifos[i].
					    list_info[mem_blks].
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					    list_virt_addr,
997 998
					    mac_control->fifos[i].
					    list_info[mem_blks].
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					    list_phy_addr);
1000
			nic->mac_control.stats_info->sw_stat.mem_freed
1001
						+= PAGE_SIZE;
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		}
1003 1004 1005 1006 1007 1008 1009
		/* If we got a zero DMA address during allocation,
		 * free the page now
		 */
		if (mac_control->zerodma_virt_addr) {
			pci_free_consistent(nic->pdev, PAGE_SIZE,
					    mac_control->zerodma_virt_addr,
					    (dma_addr_t)0);
1010
			DBG_PRINT(INIT_DBG,
1011 1012 1013 1014
			  	"%s: Freeing TxDL with zero DMA addr. ",
				dev->name);
			DBG_PRINT(INIT_DBG, "Virtual address %p\n",
				mac_control->zerodma_virt_addr);
1015
			nic->mac_control.stats_info->sw_stat.mem_freed
1016
						+= PAGE_SIZE;
1017
		}
1018
		kfree(mac_control->fifos[i].list_info);
1019
		nic->mac_control.stats_info->sw_stat.mem_freed +=
1020
		(nic->config.tx_cfg[i].fifo_len *sizeof(struct list_info_hold));
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	}

	size = SIZE_OF_BLOCK;
	for (i = 0; i < config->rx_ring_num; i++) {
1025
		blk_cnt = mac_control->rings[i].block_count;
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		for (j = 0; j < blk_cnt; j++) {
1027 1028 1029 1030
			tmp_v_addr = mac_control->rings[i].rx_blocks[j].
				block_virt_addr;
			tmp_p_addr = mac_control->rings[i].rx_blocks[j].
				block_dma_addr;
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			if (tmp_v_addr == NULL)
				break;
			pci_free_consistent(nic->pdev, size,
					    tmp_v_addr, tmp_p_addr);
1035
			nic->mac_control.stats_info->sw_stat.mem_freed += size;
1036
			kfree(mac_control->rings[i].rx_blocks[j].rxds);
1037
			nic->mac_control.stats_info->sw_stat.mem_freed +=
1038
			( sizeof(struct rxd_info)* rxd_count[nic->rxd_mode]);
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		}
	}

1042
	if (nic->rxd_mode == RXD_MODE_3B) {
1043 1044 1045 1046 1047 1048 1049 1050 1051
		/* Freeing buffer storage addresses in 2BUFF mode. */
		for (i = 0; i < config->rx_ring_num; i++) {
			blk_cnt = config->rx_cfg[i].num_rxd /
			    (rxd_count[nic->rxd_mode] + 1);
			for (j = 0; j < blk_cnt; j++) {
				int k = 0;
				if (!mac_control->rings[i].ba[j])
					continue;
				while (k != rxd_count[nic->rxd_mode]) {
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					struct buffAdd *ba =
1053 1054
						&mac_control->rings[i].ba[j][k];
					kfree(ba->ba_0_org);
1055 1056
					nic->mac_control.stats_info->sw_stat.\
					mem_freed += (BUF0_LEN + ALIGN_SIZE);
1057
					kfree(ba->ba_1_org);
1058 1059
					nic->mac_control.stats_info->sw_stat.\
					mem_freed += (BUF1_LEN + ALIGN_SIZE);
1060 1061 1062
					k++;
				}
				kfree(mac_control->rings[i].ba[j]);
1063 1064 1065
				nic->mac_control.stats_info->sw_stat.mem_freed +=
					(sizeof(struct buffAdd) *
					(rxd_count[nic->rxd_mode] + 1));
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			}
1067
			kfree(mac_control->rings[i].ba);
1068
			nic->mac_control.stats_info->sw_stat.mem_freed +=
1069
			(sizeof(struct buffAdd *) * blk_cnt);
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		}
	}

1073 1074 1075 1076 1077 1078 1079 1080
	for (i = 0; i < nic->config.tx_fifo_num; i++) {
		if (mac_control->fifos[i].ufo_in_band_v) {
			nic->mac_control.stats_info->sw_stat.mem_freed
				+= (config->tx_cfg[i].fifo_len * sizeof(u64));
			kfree(mac_control->fifos[i].ufo_in_band_v);
		}
	}

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	if (mac_control->stats_mem) {
1082 1083
		nic->mac_control.stats_info->sw_stat.mem_freed +=
			mac_control->stats_mem_sz;
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		pci_free_consistent(nic->pdev,
				    mac_control->stats_mem_sz,
				    mac_control->stats_mem,
				    mac_control->stats_mem_phy);
1088
	}
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}

1091 1092 1093 1094
/**
 * s2io_verify_pci_mode -
 */

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static int s2io_verify_pci_mode(struct s2io_nic *nic)
1096
{
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	struct XENA_dev_config __iomem *bar0 = nic->bar0;
1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108
	register u64 val64 = 0;
	int     mode;

	val64 = readq(&bar0->pci_mode);
	mode = (u8)GET_PCI_MODE(val64);

	if ( val64 & PCI_MODE_UNKNOWN_MODE)
		return -1;      /* Unknown PCI mode */
	return mode;
}

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#define NEC_VENID   0x1033
#define NEC_DEVID   0x0125
static int s2io_on_nec_bridge(struct pci_dev *s2io_pdev)
{
	struct pci_dev *tdev = NULL;
1114 1115
	while ((tdev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, tdev)) != NULL) {
		if (tdev->vendor == NEC_VENID && tdev->device == NEC_DEVID) {
1116
			if (tdev->bus == s2io_pdev->bus->parent) {
1117
				pci_dev_put(tdev);
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				return 1;
1119
			}
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		}
	}
	return 0;
}
1124

1125
static int bus_speed[8] = {33, 133, 133, 200, 266, 133, 200, 266};
1126 1127 1128
/**
 * s2io_print_pci_mode -
 */
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static int s2io_print_pci_mode(struct s2io_nic *nic)
1130
{
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	struct XENA_dev_config __iomem *bar0 = nic->bar0;
1132 1133 1134 1135 1136 1137 1138 1139 1140 1141
	register u64 val64 = 0;
	int	mode;
	struct config_param *config = &nic->config;

	val64 = readq(&bar0->pci_mode);
	mode = (u8)GET_PCI_MODE(val64);

	if ( val64 & PCI_MODE_UNKNOWN_MODE)
		return -1;	/* Unknown PCI mode */

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	config->bus_speed = bus_speed[mode];

	if (s2io_on_nec_bridge(nic->pdev)) {
		DBG_PRINT(ERR_DBG, "%s: Device is on PCI-E bus\n",
							nic->dev->name);
		return mode;
	}

1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187
	if (val64 & PCI_MODE_32_BITS) {
		DBG_PRINT(ERR_DBG, "%s: Device is on 32 bit ", nic->dev->name);
	} else {
		DBG_PRINT(ERR_DBG, "%s: Device is on 64 bit ", nic->dev->name);
	}

	switch(mode) {
		case PCI_MODE_PCI_33:
			DBG_PRINT(ERR_DBG, "33MHz PCI bus\n");
			break;
		case PCI_MODE_PCI_66:
			DBG_PRINT(ERR_DBG, "66MHz PCI bus\n");
			break;
		case PCI_MODE_PCIX_M1_66:
			DBG_PRINT(ERR_DBG, "66MHz PCIX(M1) bus\n");
			break;
		case PCI_MODE_PCIX_M1_100:
			DBG_PRINT(ERR_DBG, "100MHz PCIX(M1) bus\n");
			break;
		case PCI_MODE_PCIX_M1_133:
			DBG_PRINT(ERR_DBG, "133MHz PCIX(M1) bus\n");
			break;
		case PCI_MODE_PCIX_M2_66:
			DBG_PRINT(ERR_DBG, "133MHz PCIX(M2) bus\n");
			break;
		case PCI_MODE_PCIX_M2_100:
			DBG_PRINT(ERR_DBG, "200MHz PCIX(M2) bus\n");
			break;
		case PCI_MODE_PCIX_M2_133:
			DBG_PRINT(ERR_DBG, "266MHz PCIX(M2) bus\n");
			break;
		default:
			return -1;	/* Unsupported bus speed */
	}

	return mode;
}

1188 1189 1190 1191 1192 1193 1194 1195 1196 1197
/**
 *  init_tti - Initialization transmit traffic interrupt scheme
 *  @nic: device private variable
 *  @link: link status (UP/DOWN) used to enable/disable continuous
 *  transmit interrupts
 *  Description: The function configures transmit traffic interrupts
 *  Return Value:  SUCCESS on success and
 *  '-1' on failure
 */

1198
static int init_tti(struct s2io_nic *nic, int link)
1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222
{
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
	register u64 val64 = 0;
	int i;
	struct config_param *config;

	config = &nic->config;

	for (i = 0; i < config->tx_fifo_num; i++) {
		/*
		 * TTI Initialization. Default Tx timer gets us about
		 * 250 interrupts per sec. Continuous interrupts are enabled
		 * by default.
		 */
		if (nic->device_type == XFRAME_II_DEVICE) {
			int count = (nic->config.bus_speed * 125)/2;
			val64 = TTI_DATA1_MEM_TX_TIMER_VAL(count);
		} else
			val64 = TTI_DATA1_MEM_TX_TIMER_VAL(0x2078);

		val64 |= TTI_DATA1_MEM_TX_URNG_A(0xA) |
				TTI_DATA1_MEM_TX_URNG_B(0x10) |
				TTI_DATA1_MEM_TX_URNG_C(0x30) |
				TTI_DATA1_MEM_TX_TIMER_AC_EN;
1223 1224 1225
		if (i == 0)
			if (use_continuous_tx_intrs && (link == LINK_UP))
				val64 |= TTI_DATA1_MEM_TX_TIMER_CI_EN;
1226 1227
		writeq(val64, &bar0->tti_data1_mem);

1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249
		if (nic->config.intr_type == MSI_X) {
			val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
				TTI_DATA2_MEM_TX_UFC_B(0x100) |
				TTI_DATA2_MEM_TX_UFC_C(0x200) |
				TTI_DATA2_MEM_TX_UFC_D(0x300);
		} else {
			if ((nic->config.tx_steering_type ==
				TX_DEFAULT_STEERING) &&
				(config->tx_fifo_num > 1) &&
				(i >= nic->udp_fifo_idx) &&
				(i < (nic->udp_fifo_idx +
				nic->total_udp_fifos)))
				val64 = TTI_DATA2_MEM_TX_UFC_A(0x50) |
					TTI_DATA2_MEM_TX_UFC_B(0x80) |
					TTI_DATA2_MEM_TX_UFC_C(0x100) |
					TTI_DATA2_MEM_TX_UFC_D(0x120);
			else
				val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
					TTI_DATA2_MEM_TX_UFC_B(0x20) |
					TTI_DATA2_MEM_TX_UFC_C(0x40) |
					TTI_DATA2_MEM_TX_UFC_D(0x80);
		}
1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264

		writeq(val64, &bar0->tti_data2_mem);

		val64 = TTI_CMD_MEM_WE | TTI_CMD_MEM_STROBE_NEW_CMD |
				TTI_CMD_MEM_OFFSET(i);
		writeq(val64, &bar0->tti_command_mem);

		if (wait_for_cmd_complete(&bar0->tti_command_mem,
			TTI_CMD_MEM_STROBE_NEW_CMD, S2IO_BIT_RESET) != SUCCESS)
			return FAILURE;
	}

	return SUCCESS;
}

1265 1266
/**
 *  init_nic - Initialization of hardware
1267
 *  @nic: device private variable
1268 1269 1270
 *  Description: The function sequentially configures every block
 *  of the H/W from their reset values.
 *  Return Value:  SUCCESS on success and
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 *  '-1' on failure (endian settings incorrect).
 */

static int init_nic(struct s2io_nic *nic)
{
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	struct XENA_dev_config __iomem *bar0 = nic->bar0;
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	struct net_device *dev = nic->dev;
	register u64 val64 = 0;
	void __iomem *add;
	u32 time;
	int i, j;
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	struct mac_info *mac_control;
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	struct config_param *config;
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	int dtx_cnt = 0;
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	unsigned long long mem_share;
1286
	int mem_size;
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	mac_control = &nic->mac_control;
	config = &nic->config;

1291
	/* to set the swapper controle on the card */
1292
	if(s2io_set_swapper(nic)) {
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		DBG_PRINT(ERR_DBG,"ERROR: Setting Swapper failed\n");
1294
		return -EIO;
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	}

1297 1298 1299 1300 1301 1302 1303 1304 1305 1306
	/*
	 * Herc requires EOI to be removed from reset before XGXS, so..
	 */
	if (nic->device_type & XFRAME_II_DEVICE) {
		val64 = 0xA500000000ULL;
		writeq(val64, &bar0->sw_reset);
		msleep(500);
		val64 = readq(&bar0->sw_reset);
	}

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	/* Remove XGXS from reset state */
	val64 = 0;
	writeq(val64, &bar0->sw_reset);
	msleep(500);
1311
	val64 = readq(&bar0->sw_reset);
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1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326
	/* Ensure that it's safe to access registers by checking
	 * RIC_RUNNING bit is reset. Check is valid only for XframeII.
	 */
	if (nic->device_type == XFRAME_II_DEVICE) {
		for (i = 0; i < 50; i++) {
			val64 = readq(&bar0->adapter_status);
			if (!(val64 & ADAPTER_STATUS_RIC_RUNNING))
				break;
			msleep(10);
		}
		if (i == 50)
			return -ENODEV;
	}

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	/*  Enable Receiving broadcasts */
	add = &bar0->mac_cfg;
	val64 = readq(&bar0->mac_cfg);
	val64 |= MAC_RMAC_BCAST_ENABLE;
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) val64, add);
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) (val64 >> 32), (add + 4));

	/* Read registers in all blocks */
	val64 = readq(&bar0->mac_int_mask);
	val64 = readq(&bar0->mc_int_mask);
	val64 = readq(&bar0->xgxs_int_mask);

	/*  Set MTU */
	val64 = dev->mtu;
	writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);

1345 1346
	if (nic->device_type & XFRAME_II_DEVICE) {
		while (herc_act_dtx_cfg[dtx_cnt] != END_SIGN) {
1347
			SPECIAL_REG_WRITE(herc_act_dtx_cfg[dtx_cnt],
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					  &bar0->dtx_control, UF);
1349 1350
			if (dtx_cnt & 0x1)
				msleep(1); /* Necessary!! */
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			dtx_cnt++;
		}
1353
	} else {
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		while (xena_dtx_cfg[dtx_cnt] != END_SIGN) {
			SPECIAL_REG_WRITE(xena_dtx_cfg[dtx_cnt],
					  &bar0->dtx_control, UF);
			val64 = readq(&bar0->dtx_control);
			dtx_cnt++;
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		}
	}

	/*  Tx DMA Initialization */
	val64 = 0;
	writeq(val64, &bar0->tx_fifo_partition_0);
	writeq(val64, &bar0->tx_fifo_partition_1);
	writeq(val64, &bar0->tx_fifo_partition_2);
	writeq(val64, &bar0->tx_fifo_partition_3);


	for (i = 0, j = 0; i < config->tx_fifo_num; i++) {
		val64 |=
1372
		    vBIT(config->tx_cfg[i].fifo_len - 1, ((j * 32) + 19),
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			 13) | vBIT(config->tx_cfg[i].fifo_priority,
1374
				    ((j * 32) + 5), 3);
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		if (i == (config->tx_fifo_num - 1)) {
			if (i % 2 == 0)
				i++;
		}

		switch (i) {
		case 1:
			writeq(val64, &bar0->tx_fifo_partition_0);
			val64 = 0;
1385
			j = 0;
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			break;
		case 3:
			writeq(val64, &bar0->tx_fifo_partition_1);
			val64 = 0;
1390
			j = 0;
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			break;
		case 5:
			writeq(val64, &bar0->tx_fifo_partition_2);
			val64 = 0;
1395
			j = 0;
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			break;
		case 7:
			writeq(val64, &bar0->tx_fifo_partition_3);
1399 1400 1401 1402 1403
			val64 = 0;
			j = 0;
			break;
		default:
			j++;
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			break;
		}
	}

1408 1409 1410 1411
	/*
	 * Disable 4 PCCs for Xena1, 2 and 3 as per H/W bug
	 * SXE-008 TRANSMIT DMA ARBITRATION ISSUE.
	 */
1412
	if ((nic->device_type == XFRAME_I_DEVICE) &&
1413
		(nic->pdev->revision < 4))
1414 1415
		writeq(PCC_ENABLE_FOUR, &bar0->pcc_enable);

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	val64 = readq(&bar0->tx_fifo_partition_0);
	DBG_PRINT(INIT_DBG, "Fifo partition at: 0x%p is: 0x%llx\n",
		  &bar0->tx_fifo_partition_0, (unsigned long long) val64);

1420 1421
	/*
	 * Initialization of Tx_PA_CONFIG register to ignore packet
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	 * integrity checking.
	 */
	val64 = readq(&bar0->tx_pa_cfg);
	val64 |= TX_PA_CFG_IGNORE_FRM_ERR | TX_PA_CFG_IGNORE_SNAP_OUI |
	    TX_PA_CFG_IGNORE_LLC_CTRL | TX_PA_CFG_IGNORE_L2_ERR;
	writeq(val64, &bar0->tx_pa_cfg);

	/* Rx DMA intialization. */
	val64 = 0;
	for (i = 0; i < config->rx_ring_num; i++) {
		val64 |=
		    vBIT(config->rx_cfg[i].ring_priority, (5 + (i * 8)),
			 3);
	}
	writeq(val64, &bar0->rx_queue_priority);

1438 1439
	/*
	 * Allocating equal share of memory to all the
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	 * configured Rings.
	 */
	val64 = 0;
1443 1444 1445 1446 1447
	if (nic->device_type & XFRAME_II_DEVICE)
		mem_size = 32;
	else
		mem_size = 64;

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1448 1449 1450
	for (i = 0; i < config->rx_ring_num; i++) {
		switch (i) {
		case 0:
1451 1452
			mem_share = (mem_size / config->rx_ring_num +
				     mem_size % config->rx_ring_num);
L
Linus Torvalds 已提交
1453 1454 1455
			val64 |= RX_QUEUE_CFG_Q0_SZ(mem_share);
			continue;
		case 1:
1456
			mem_share = (mem_size / config->rx_ring_num);
L
Linus Torvalds 已提交
1457 1458 1459
			val64 |= RX_QUEUE_CFG_Q1_SZ(mem_share);
			continue;
		case 2:
1460
			mem_share = (mem_size / config->rx_ring_num);
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Linus Torvalds 已提交
1461 1462 1463
			val64 |= RX_QUEUE_CFG_Q2_SZ(mem_share);
			continue;
		case 3:
1464
			mem_share = (mem_size / config->rx_ring_num);
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1465 1466 1467
			val64 |= RX_QUEUE_CFG_Q3_SZ(mem_share);
			continue;
		case 4:
1468
			mem_share = (mem_size / config->rx_ring_num);
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1469 1470 1471
			val64 |= RX_QUEUE_CFG_Q4_SZ(mem_share);
			continue;
		case 5:
1472
			mem_share = (mem_size / config->rx_ring_num);
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Linus Torvalds 已提交
1473 1474 1475
			val64 |= RX_QUEUE_CFG_Q5_SZ(mem_share);
			continue;
		case 6:
1476
			mem_share = (mem_size / config->rx_ring_num);
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1477 1478 1479
			val64 |= RX_QUEUE_CFG_Q6_SZ(mem_share);
			continue;
		case 7:
1480
			mem_share = (mem_size / config->rx_ring_num);
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1481 1482 1483 1484 1485 1486
			val64 |= RX_QUEUE_CFG_Q7_SZ(mem_share);
			continue;
		}
	}
	writeq(val64, &bar0->rx_queue_cfg);

1487
	/*
1488
	 * Filling Tx round robin registers
1489
	 * as per the number of FIFOs for equal scheduling priority
L
Linus Torvalds 已提交
1490
	 */
1491 1492
	switch (config->tx_fifo_num) {
	case 1:
1493
		val64 = 0x0;
1494 1495 1496 1497 1498 1499 1500
		writeq(val64, &bar0->tx_w_round_robin_0);
		writeq(val64, &bar0->tx_w_round_robin_1);
		writeq(val64, &bar0->tx_w_round_robin_2);
		writeq(val64, &bar0->tx_w_round_robin_3);
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 2:
1501
		val64 = 0x0001000100010001ULL;
1502 1503 1504 1505
		writeq(val64, &bar0->tx_w_round_robin_0);
		writeq(val64, &bar0->tx_w_round_robin_1);
		writeq(val64, &bar0->tx_w_round_robin_2);
		writeq(val64, &bar0->tx_w_round_robin_3);
1506
		val64 = 0x0001000100000000ULL;
1507 1508 1509
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 3:
1510
		val64 = 0x0001020001020001ULL;
1511
		writeq(val64, &bar0->tx_w_round_robin_0);
1512
		val64 = 0x0200010200010200ULL;
1513
		writeq(val64, &bar0->tx_w_round_robin_1);
1514
		val64 = 0x0102000102000102ULL;
1515
		writeq(val64, &bar0->tx_w_round_robin_2);
1516
		val64 = 0x0001020001020001ULL;
1517
		writeq(val64, &bar0->tx_w_round_robin_3);
1518
		val64 = 0x0200010200000000ULL;
1519 1520 1521
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 4:
1522
		val64 = 0x0001020300010203ULL;
1523 1524 1525 1526
		writeq(val64, &bar0->tx_w_round_robin_0);
		writeq(val64, &bar0->tx_w_round_robin_1);
		writeq(val64, &bar0->tx_w_round_robin_2);
		writeq(val64, &bar0->tx_w_round_robin_3);
1527
		val64 = 0x0001020300000000ULL;
1528 1529 1530
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 5:
1531
		val64 = 0x0001020304000102ULL;
1532
		writeq(val64, &bar0->tx_w_round_robin_0);
1533
		val64 = 0x0304000102030400ULL;
1534
		writeq(val64, &bar0->tx_w_round_robin_1);
1535
		val64 = 0x0102030400010203ULL;
1536
		writeq(val64, &bar0->tx_w_round_robin_2);
1537
		val64 = 0x0400010203040001ULL;
1538
		writeq(val64, &bar0->tx_w_round_robin_3);
1539
		val64 = 0x0203040000000000ULL;
1540 1541 1542
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 6:
1543
		val64 = 0x0001020304050001ULL;
1544
		writeq(val64, &bar0->tx_w_round_robin_0);
1545
		val64 = 0x0203040500010203ULL;
1546
		writeq(val64, &bar0->tx_w_round_robin_1);
1547
		val64 = 0x0405000102030405ULL;
1548
		writeq(val64, &bar0->tx_w_round_robin_2);
1549
		val64 = 0x0001020304050001ULL;
1550
		writeq(val64, &bar0->tx_w_round_robin_3);
1551
		val64 = 0x0203040500000000ULL;
1552 1553 1554
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 7:
1555
		val64 = 0x0001020304050600ULL;
1556
		writeq(val64, &bar0->tx_w_round_robin_0);
1557
		val64 = 0x0102030405060001ULL;
1558
		writeq(val64, &bar0->tx_w_round_robin_1);
1559
		val64 = 0x0203040506000102ULL;
1560
		writeq(val64, &bar0->tx_w_round_robin_2);
1561
		val64 = 0x0304050600010203ULL;
1562
		writeq(val64, &bar0->tx_w_round_robin_3);
1563
		val64 = 0x0405060000000000ULL;
1564 1565 1566
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	case 8:
1567
		val64 = 0x0001020304050607ULL;
1568 1569 1570 1571
		writeq(val64, &bar0->tx_w_round_robin_0);
		writeq(val64, &bar0->tx_w_round_robin_1);
		writeq(val64, &bar0->tx_w_round_robin_2);
		writeq(val64, &bar0->tx_w_round_robin_3);
1572
		val64 = 0x0001020300000000ULL;
1573 1574 1575 1576
		writeq(val64, &bar0->tx_w_round_robin_4);
		break;
	}

1577
	/* Enable all configured Tx FIFO partitions */
1578 1579 1580 1581
	val64 = readq(&bar0->tx_fifo_partition_0);
	val64 |= (TX_FIFO_PARTITION_EN);
	writeq(val64, &bar0->tx_fifo_partition_0);

1582
	/* Filling the Rx round robin registers as per the
1583 1584 1585
	 * number of Rings and steering based on QoS with
	 * equal priority.
	 */
1586 1587
	switch (config->rx_ring_num) {
	case 1:
1588 1589 1590 1591 1592 1593 1594
		val64 = 0x0;
		writeq(val64, &bar0->rx_w_round_robin_0);
		writeq(val64, &bar0->rx_w_round_robin_1);
		writeq(val64, &bar0->rx_w_round_robin_2);
		writeq(val64, &bar0->rx_w_round_robin_3);
		writeq(val64, &bar0->rx_w_round_robin_4);

1595 1596 1597 1598
		val64 = 0x8080808080808080ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 2:
1599
		val64 = 0x0001000100010001ULL;
1600 1601 1602 1603
		writeq(val64, &bar0->rx_w_round_robin_0);
		writeq(val64, &bar0->rx_w_round_robin_1);
		writeq(val64, &bar0->rx_w_round_robin_2);
		writeq(val64, &bar0->rx_w_round_robin_3);
1604
		val64 = 0x0001000100000000ULL;
1605 1606 1607 1608 1609 1610
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080808040404040ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 3:
1611
		val64 = 0x0001020001020001ULL;
1612
		writeq(val64, &bar0->rx_w_round_robin_0);
1613
		val64 = 0x0200010200010200ULL;
1614
		writeq(val64, &bar0->rx_w_round_robin_1);
1615
		val64 = 0x0102000102000102ULL;
1616
		writeq(val64, &bar0->rx_w_round_robin_2);
1617
		val64 = 0x0001020001020001ULL;
1618
		writeq(val64, &bar0->rx_w_round_robin_3);
1619
		val64 = 0x0200010200000000ULL;
1620 1621 1622 1623 1624 1625
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080804040402020ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 4:
1626
		val64 = 0x0001020300010203ULL;
1627 1628 1629 1630
		writeq(val64, &bar0->rx_w_round_robin_0);
		writeq(val64, &bar0->rx_w_round_robin_1);
		writeq(val64, &bar0->rx_w_round_robin_2);
		writeq(val64, &bar0->rx_w_round_robin_3);
1631
		val64 = 0x0001020300000000ULL;
1632 1633 1634 1635 1636 1637
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080404020201010ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 5:
1638
		val64 = 0x0001020304000102ULL;
1639
		writeq(val64, &bar0->rx_w_round_robin_0);
1640
		val64 = 0x0304000102030400ULL;
1641
		writeq(val64, &bar0->rx_w_round_robin_1);
1642
		val64 = 0x0102030400010203ULL;
1643
		writeq(val64, &bar0->rx_w_round_robin_2);
1644
		val64 = 0x0400010203040001ULL;
1645
		writeq(val64, &bar0->rx_w_round_robin_3);
1646
		val64 = 0x0203040000000000ULL;
1647 1648 1649 1650 1651 1652
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080404020201008ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 6:
1653
		val64 = 0x0001020304050001ULL;
1654
		writeq(val64, &bar0->rx_w_round_robin_0);
1655
		val64 = 0x0203040500010203ULL;
1656
		writeq(val64, &bar0->rx_w_round_robin_1);
1657
		val64 = 0x0405000102030405ULL;
1658
		writeq(val64, &bar0->rx_w_round_robin_2);
1659
		val64 = 0x0001020304050001ULL;
1660
		writeq(val64, &bar0->rx_w_round_robin_3);
1661
		val64 = 0x0203040500000000ULL;
1662 1663 1664 1665 1666 1667
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080404020100804ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 7:
1668
		val64 = 0x0001020304050600ULL;
1669
		writeq(val64, &bar0->rx_w_round_robin_0);
1670
		val64 = 0x0102030405060001ULL;
1671
		writeq(val64, &bar0->rx_w_round_robin_1);
1672
		val64 = 0x0203040506000102ULL;
1673
		writeq(val64, &bar0->rx_w_round_robin_2);
1674
		val64 = 0x0304050600010203ULL;
1675
		writeq(val64, &bar0->rx_w_round_robin_3);
1676
		val64 = 0x0405060000000000ULL;
1677 1678 1679 1680 1681 1682
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8080402010080402ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	case 8:
1683
		val64 = 0x0001020304050607ULL;
1684 1685 1686 1687
		writeq(val64, &bar0->rx_w_round_robin_0);
		writeq(val64, &bar0->rx_w_round_robin_1);
		writeq(val64, &bar0->rx_w_round_robin_2);
		writeq(val64, &bar0->rx_w_round_robin_3);
1688
		val64 = 0x0001020300000000ULL;
1689 1690 1691 1692 1693 1694
		writeq(val64, &bar0->rx_w_round_robin_4);

		val64 = 0x8040201008040201ULL;
		writeq(val64, &bar0->rts_qos_steering);
		break;
	}
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1695 1696 1697

	/* UDP Fix */
	val64 = 0;
1698
	for (i = 0; i < 8; i++)
L
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1699 1700
		writeq(val64, &bar0->rts_frm_len_n[i]);

1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720
	/* Set the default rts frame length for the rings configured */
	val64 = MAC_RTS_FRM_LEN_SET(dev->mtu+22);
	for (i = 0 ; i < config->rx_ring_num ; i++)
		writeq(val64, &bar0->rts_frm_len_n[i]);

	/* Set the frame length for the configured rings
	 * desired by the user
	 */
	for (i = 0; i < config->rx_ring_num; i++) {
		/* If rts_frm_len[i] == 0 then it is assumed that user not
		 * specified frame length steering.
		 * If the user provides the frame length then program
		 * the rts_frm_len register for those values or else
		 * leave it as it is.
		 */
		if (rts_frm_len[i] != 0) {
			writeq(MAC_RTS_FRM_LEN_SET(rts_frm_len[i]),
				&bar0->rts_frm_len_n[i]);
		}
	}
1721

1722 1723 1724 1725 1726 1727
	/* Disable differentiated services steering logic */
	for (i = 0; i < 64; i++) {
		if (rts_ds_steer(nic, i, 0) == FAILURE) {
			DBG_PRINT(ERR_DBG, "%s: failed rts ds steering",
				dev->name);
			DBG_PRINT(ERR_DBG, "set on codepoint %d\n", i);
1728
			return -ENODEV;
1729 1730 1731
		}
	}

1732
	/* Program statistics memory */
L
Linus Torvalds 已提交
1733 1734
	writeq(mac_control->stats_mem_phy, &bar0->stat_addr);

1735 1736 1737 1738 1739
	if (nic->device_type == XFRAME_II_DEVICE) {
		val64 = STAT_BC(0x320);
		writeq(val64, &bar0->stat_byte_cnt);
	}

1740
	/*
L
Linus Torvalds 已提交
1741 1742 1743 1744 1745 1746 1747
	 * Initializing the sampling rate for the device to calculate the
	 * bandwidth utilization.
	 */
	val64 = MAC_TX_LINK_UTIL_VAL(tmac_util_period) |
	    MAC_RX_LINK_UTIL_VAL(rmac_util_period);
	writeq(val64, &bar0->mac_link_util);

1748 1749
	/*
	 * Initializing the Transmit and Receive Traffic Interrupt
L
Linus Torvalds 已提交
1750 1751 1752
	 * Scheme.
	 */

1753 1754 1755
	/* Initialize TTI */
	if (SUCCESS != init_tti(nic, nic->last_link_state))
		return -ENODEV;
L
Linus Torvalds 已提交
1756

1757 1758
	/* RTI Initialization */
	if (nic->device_type == XFRAME_II_DEVICE) {
1759
		/*
1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781
		 * Programmed to generate Apprx 500 Intrs per
		 * second
		 */
		int count = (nic->config.bus_speed * 125)/4;
		val64 = RTI_DATA1_MEM_RX_TIMER_VAL(count);
	} else
		val64 = RTI_DATA1_MEM_RX_TIMER_VAL(0xFFF);
	val64 |= RTI_DATA1_MEM_RX_URNG_A(0xA) |
		 RTI_DATA1_MEM_RX_URNG_B(0x10) |
		 RTI_DATA1_MEM_RX_URNG_C(0x30) | RTI_DATA1_MEM_RX_TIMER_AC_EN;

	writeq(val64, &bar0->rti_data1_mem);

	val64 = RTI_DATA2_MEM_RX_UFC_A(0x1) |
		RTI_DATA2_MEM_RX_UFC_B(0x2) ;
	if (nic->config.intr_type == MSI_X)
	    val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x20) | \
			RTI_DATA2_MEM_RX_UFC_D(0x40));
	else
	    val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x40) | \
			RTI_DATA2_MEM_RX_UFC_D(0x80));
	writeq(val64, &bar0->rti_data2_mem);
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Linus Torvalds 已提交
1782

1783 1784 1785 1786
	for (i = 0; i < config->rx_ring_num; i++) {
		val64 = RTI_CMD_MEM_WE | RTI_CMD_MEM_STROBE_NEW_CMD
				| RTI_CMD_MEM_OFFSET(i);
		writeq(val64, &bar0->rti_command_mem);
L
Linus Torvalds 已提交
1787

1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799
		/*
		 * Once the operation completes, the Strobe bit of the
		 * command register will be reset. We poll for this
		 * particular condition. We wait for a maximum of 500ms
		 * for the operation to complete, if it's not complete
		 * by then we return error.
		 */
		time = 0;
		while (TRUE) {
			val64 = readq(&bar0->rti_command_mem);
			if (!(val64 & RTI_CMD_MEM_STROBE_NEW_CMD))
				break;
1800

1801 1802 1803
			if (time > 10) {
				DBG_PRINT(ERR_DBG, "%s: RTI init Failed\n",
					  dev->name);
1804
				return -ENODEV;
1805
			}
1806 1807
			time++;
			msleep(50);
L
Linus Torvalds 已提交
1808 1809 1810
		}
	}

1811 1812
	/*
	 * Initializing proper values as Pause threshold into all
L
Linus Torvalds 已提交
1813 1814 1815 1816 1817 1818
	 * the 8 Queues on Rx side.
	 */
	writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q0q3);
	writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q4q7);

	/* Disable RMAC PAD STRIPPING */
1819
	add = &bar0->mac_cfg;
L
Linus Torvalds 已提交
1820 1821 1822 1823 1824 1825 1826 1827
	val64 = readq(&bar0->mac_cfg);
	val64 &= ~(MAC_CFG_RMAC_STRIP_PAD);
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) (val64), add);
	writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
	writel((u32) (val64 >> 32), (add + 4));
	val64 = readq(&bar0->mac_cfg);

1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840
	/* Enable FCS stripping by adapter */
	add = &bar0->mac_cfg;
	val64 = readq(&bar0->mac_cfg);
	val64 |= MAC_CFG_RMAC_STRIP_FCS;
	if (nic->device_type == XFRAME_II_DEVICE)
		writeq(val64, &bar0->mac_cfg);
	else {
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64), add);
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64 >> 32), (add + 4));
	}

1841 1842
	/*
	 * Set the time value to be inserted in the pause frame
L
Linus Torvalds 已提交
1843 1844 1845 1846 1847 1848 1849
	 * generated by xena.
	 */
	val64 = readq(&bar0->rmac_pause_cfg);
	val64 &= ~(RMAC_PAUSE_HG_PTIME(0xffff));
	val64 |= RMAC_PAUSE_HG_PTIME(nic->mac_control.rmac_pause_time);
	writeq(val64, &bar0->rmac_pause_cfg);

1850
	/*
L
Linus Torvalds 已提交
1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873
	 * Set the Threshold Limit for Generating the pause frame
	 * If the amount of data in any Queue exceeds ratio of
	 * (mac_control.mc_pause_threshold_q0q3 or q4q7)/256
	 * pause frame is generated
	 */
	val64 = 0;
	for (i = 0; i < 4; i++) {
		val64 |=
		    (((u64) 0xFF00 | nic->mac_control.
		      mc_pause_threshold_q0q3)
		     << (i * 2 * 8));
	}
	writeq(val64, &bar0->mc_pause_thresh_q0q3);

	val64 = 0;
	for (i = 0; i < 4; i++) {
		val64 |=
		    (((u64) 0xFF00 | nic->mac_control.
		      mc_pause_threshold_q4q7)
		     << (i * 2 * 8));
	}
	writeq(val64, &bar0->mc_pause_thresh_q4q7);

1874 1875
	/*
	 * TxDMA will stop Read request if the number of read split has
L
Linus Torvalds 已提交
1876 1877 1878 1879 1880 1881
	 * exceeded the limit pointed by shared_splits
	 */
	val64 = readq(&bar0->pic_control);
	val64 |= PIC_CNTL_SHARED_SPLITS(shared_splits);
	writeq(val64, &bar0->pic_control);

1882 1883 1884 1885 1886 1887
	if (nic->config.bus_speed == 266) {
		writeq(TXREQTO_VAL(0x7f) | TXREQTO_EN, &bar0->txreqtimeout);
		writeq(0x0, &bar0->read_retry_delay);
		writeq(0x0, &bar0->write_retry_delay);
	}

1888 1889 1890 1891 1892
	/*
	 * Programming the Herc to split every write transaction
	 * that does not start on an ADB to reduce disconnects.
	 */
	if (nic->device_type == XFRAME_II_DEVICE) {
1893 1894
		val64 = FAULT_BEHAVIOUR | EXT_REQ_EN |
			MISC_LINK_STABILITY_PRD(3);
1895 1896
		writeq(val64, &bar0->misc_control);
		val64 = readq(&bar0->pic_control2);
J
Jiri Slaby 已提交
1897
		val64 &= ~(s2BIT(13)|s2BIT(14)|s2BIT(15));
1898
		writeq(val64, &bar0->pic_control2);
1899
	}
A
Ananda Raju 已提交
1900 1901 1902
	if (strstr(nic->product_name, "CX4")) {
		val64 = TMAC_AVG_IPG(0x17);
		writeq(val64, &bar0->tmac_avg_ipg);
1903 1904
	}

L
Linus Torvalds 已提交
1905 1906
	return SUCCESS;
}
1907 1908 1909
#define LINK_UP_DOWN_INTERRUPT		1
#define MAC_RMAC_ERR_TIMER		2

R
Ralf Baechle 已提交
1910
static int s2io_link_fault_indication(struct s2io_nic *nic)
1911
{
1912
	if (nic->config.intr_type != INTA)
1913
		return MAC_RMAC_ERR_TIMER;
1914 1915 1916 1917 1918
	if (nic->device_type == XFRAME_II_DEVICE)
		return LINK_UP_DOWN_INTERRUPT;
	else
		return MAC_RMAC_ERR_TIMER;
}
1919

1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940
/**
 *  do_s2io_write_bits -  update alarm bits in alarm register
 *  @value: alarm bits
 *  @flag: interrupt status
 *  @addr: address value
 *  Description: update alarm bits in alarm register
 *  Return Value:
 *  NONE.
 */
static void do_s2io_write_bits(u64 value, int flag, void __iomem *addr)
{
	u64 temp64;

	temp64 = readq(addr);

	if(flag == ENABLE_INTRS)
		temp64 &= ~((u64) value);
	else
		temp64 |= ((u64) value);
	writeq(temp64, addr);
}
L
Linus Torvalds 已提交
1941

1942
static void en_dis_err_alarms(struct s2io_nic *nic, u16 mask, int flag)
1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063
{
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
	register u64 gen_int_mask = 0;

	if (mask & TX_DMA_INTR) {

		gen_int_mask |= TXDMA_INT_M;

		do_s2io_write_bits(TXDMA_TDA_INT | TXDMA_PFC_INT |
				TXDMA_PCC_INT | TXDMA_TTI_INT |
				TXDMA_LSO_INT | TXDMA_TPA_INT |
				TXDMA_SM_INT, flag, &bar0->txdma_int_mask);

		do_s2io_write_bits(PFC_ECC_DB_ERR | PFC_SM_ERR_ALARM |
				PFC_MISC_0_ERR | PFC_MISC_1_ERR |
				PFC_PCIX_ERR | PFC_ECC_SG_ERR, flag,
				&bar0->pfc_err_mask);

		do_s2io_write_bits(TDA_Fn_ECC_DB_ERR | TDA_SM0_ERR_ALARM |
				TDA_SM1_ERR_ALARM | TDA_Fn_ECC_SG_ERR |
				TDA_PCIX_ERR, flag, &bar0->tda_err_mask);

		do_s2io_write_bits(PCC_FB_ECC_DB_ERR | PCC_TXB_ECC_DB_ERR |
				PCC_SM_ERR_ALARM | PCC_WR_ERR_ALARM |
				PCC_N_SERR | PCC_6_COF_OV_ERR |
				PCC_7_COF_OV_ERR | PCC_6_LSO_OV_ERR |
				PCC_7_LSO_OV_ERR | PCC_FB_ECC_SG_ERR |
				PCC_TXB_ECC_SG_ERR, flag, &bar0->pcc_err_mask);

		do_s2io_write_bits(TTI_SM_ERR_ALARM | TTI_ECC_SG_ERR |
				TTI_ECC_DB_ERR, flag, &bar0->tti_err_mask);

		do_s2io_write_bits(LSO6_ABORT | LSO7_ABORT |
				LSO6_SM_ERR_ALARM | LSO7_SM_ERR_ALARM |
				LSO6_SEND_OFLOW | LSO7_SEND_OFLOW,
				flag, &bar0->lso_err_mask);

		do_s2io_write_bits(TPA_SM_ERR_ALARM | TPA_TX_FRM_DROP,
				flag, &bar0->tpa_err_mask);

		do_s2io_write_bits(SM_SM_ERR_ALARM, flag, &bar0->sm_err_mask);

	}

	if (mask & TX_MAC_INTR) {
		gen_int_mask |= TXMAC_INT_M;
		do_s2io_write_bits(MAC_INT_STATUS_TMAC_INT, flag,
				&bar0->mac_int_mask);
		do_s2io_write_bits(TMAC_TX_BUF_OVRN | TMAC_TX_SM_ERR |
				TMAC_ECC_SG_ERR | TMAC_ECC_DB_ERR |
				TMAC_DESC_ECC_SG_ERR | TMAC_DESC_ECC_DB_ERR,
				flag, &bar0->mac_tmac_err_mask);
	}

	if (mask & TX_XGXS_INTR) {
		gen_int_mask |= TXXGXS_INT_M;
		do_s2io_write_bits(XGXS_INT_STATUS_TXGXS, flag,
				&bar0->xgxs_int_mask);
		do_s2io_write_bits(TXGXS_ESTORE_UFLOW | TXGXS_TX_SM_ERR |
				TXGXS_ECC_SG_ERR | TXGXS_ECC_DB_ERR,
				flag, &bar0->xgxs_txgxs_err_mask);
	}

	if (mask & RX_DMA_INTR) {
		gen_int_mask |= RXDMA_INT_M;
		do_s2io_write_bits(RXDMA_INT_RC_INT_M | RXDMA_INT_RPA_INT_M |
				RXDMA_INT_RDA_INT_M | RXDMA_INT_RTI_INT_M,
				flag, &bar0->rxdma_int_mask);
		do_s2io_write_bits(RC_PRCn_ECC_DB_ERR | RC_FTC_ECC_DB_ERR |
				RC_PRCn_SM_ERR_ALARM | RC_FTC_SM_ERR_ALARM |
				RC_PRCn_ECC_SG_ERR | RC_FTC_ECC_SG_ERR |
				RC_RDA_FAIL_WR_Rn, flag, &bar0->rc_err_mask);
		do_s2io_write_bits(PRC_PCI_AB_RD_Rn | PRC_PCI_AB_WR_Rn |
				PRC_PCI_AB_F_WR_Rn | PRC_PCI_DP_RD_Rn |
				PRC_PCI_DP_WR_Rn | PRC_PCI_DP_F_WR_Rn, flag,
				&bar0->prc_pcix_err_mask);
		do_s2io_write_bits(RPA_SM_ERR_ALARM | RPA_CREDIT_ERR |
				RPA_ECC_SG_ERR | RPA_ECC_DB_ERR, flag,
				&bar0->rpa_err_mask);
		do_s2io_write_bits(RDA_RXDn_ECC_DB_ERR | RDA_FRM_ECC_DB_N_AERR |
				RDA_SM1_ERR_ALARM | RDA_SM0_ERR_ALARM |
				RDA_RXD_ECC_DB_SERR | RDA_RXDn_ECC_SG_ERR |
				RDA_FRM_ECC_SG_ERR | RDA_MISC_ERR|RDA_PCIX_ERR,
				flag, &bar0->rda_err_mask);
		do_s2io_write_bits(RTI_SM_ERR_ALARM |
				RTI_ECC_SG_ERR | RTI_ECC_DB_ERR,
				flag, &bar0->rti_err_mask);
	}

	if (mask & RX_MAC_INTR) {
		gen_int_mask |= RXMAC_INT_M;
		do_s2io_write_bits(MAC_INT_STATUS_RMAC_INT, flag,
				&bar0->mac_int_mask);
		do_s2io_write_bits(RMAC_RX_BUFF_OVRN | RMAC_RX_SM_ERR |
				RMAC_UNUSED_INT | RMAC_SINGLE_ECC_ERR |
				RMAC_DOUBLE_ECC_ERR |
				RMAC_LINK_STATE_CHANGE_INT,
				flag, &bar0->mac_rmac_err_mask);
	}

	if (mask & RX_XGXS_INTR)
	{
		gen_int_mask |= RXXGXS_INT_M;
		do_s2io_write_bits(XGXS_INT_STATUS_RXGXS, flag,
				&bar0->xgxs_int_mask);
		do_s2io_write_bits(RXGXS_ESTORE_OFLOW | RXGXS_RX_SM_ERR, flag,
				&bar0->xgxs_rxgxs_err_mask);
	}

	if (mask & MC_INTR) {
		gen_int_mask |= MC_INT_M;
		do_s2io_write_bits(MC_INT_MASK_MC_INT, flag, &bar0->mc_int_mask);
		do_s2io_write_bits(MC_ERR_REG_SM_ERR | MC_ERR_REG_ECC_ALL_SNG |
				MC_ERR_REG_ECC_ALL_DBL | PLL_LOCK_N, flag,
				&bar0->mc_err_mask);
	}
	nic->general_int_mask = gen_int_mask;

	/* Remove this line when alarm interrupts are enabled */
	nic->general_int_mask = 0;
}
2064 2065
/**
 *  en_dis_able_nic_intrs - Enable or Disable the interrupts
L
Linus Torvalds 已提交
2066 2067 2068 2069
 *  @nic: device private variable,
 *  @mask: A mask indicating which Intr block must be modified and,
 *  @flag: A flag indicating whether to enable or disable the Intrs.
 *  Description: This function will either disable or enable the interrupts
2070 2071
 *  depending on the flag argument. The mask argument can be used to
 *  enable/disable any Intr block.
L
Linus Torvalds 已提交
2072 2073 2074 2075 2076
 *  Return Value: NONE.
 */

static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
{
R
Ralf Baechle 已提交
2077
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
2078 2079 2080
	register u64 temp64 = 0, intr_mask = 0;

	intr_mask = nic->general_int_mask;
L
Linus Torvalds 已提交
2081 2082 2083

	/*  Top level interrupt classification */
	/*  PIC Interrupts */
2084
	if (mask & TX_PIC_INTR) {
L
Linus Torvalds 已提交
2085
		/*  Enable PIC Intrs in the general intr mask register */
2086
		intr_mask |= TXPIC_INT_M;
L
Linus Torvalds 已提交
2087
		if (flag == ENABLE_INTRS) {
2088
			/*
2089
			 * If Hercules adapter enable GPIO otherwise
2090
			 * disable all PCIX, Flash, MDIO, IIC and GPIO
2091 2092
			 * interrupts for now.
			 * TODO
L
Linus Torvalds 已提交
2093
			 */
2094 2095
			if (s2io_link_fault_indication(nic) ==
					LINK_UP_DOWN_INTERRUPT ) {
2096 2097 2098 2099 2100
				do_s2io_write_bits(PIC_INT_GPIO, flag,
						&bar0->pic_int_mask);
				do_s2io_write_bits(GPIO_INT_MASK_LINK_UP, flag,
						&bar0->gpio_int_mask);
			} else
2101
				writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
L
Linus Torvalds 已提交
2102
		} else if (flag == DISABLE_INTRS) {
2103 2104 2105
			/*
			 * Disable PIC Intrs in the general
			 * intr mask register
L
Linus Torvalds 已提交
2106 2107 2108 2109 2110 2111 2112
			 */
			writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
		}
	}

	/*  Tx traffic interrupts */
	if (mask & TX_TRAFFIC_INTR) {
2113
		intr_mask |= TXTRAFFIC_INT_M;
L
Linus Torvalds 已提交
2114
		if (flag == ENABLE_INTRS) {
2115
			/*
L
Linus Torvalds 已提交
2116
			 * Enable all the Tx side interrupts
2117
			 * writing 0 Enables all 64 TX interrupt levels
L
Linus Torvalds 已提交
2118 2119 2120
			 */
			writeq(0x0, &bar0->tx_traffic_mask);
		} else if (flag == DISABLE_INTRS) {
2121 2122
			/*
			 * Disable Tx Traffic Intrs in the general intr mask
L
Linus Torvalds 已提交
2123 2124 2125 2126 2127 2128 2129 2130
			 * register.
			 */
			writeq(DISABLE_ALL_INTRS, &bar0->tx_traffic_mask);
		}
	}

	/*  Rx traffic interrupts */
	if (mask & RX_TRAFFIC_INTR) {
2131
		intr_mask |= RXTRAFFIC_INT_M;
L
Linus Torvalds 已提交
2132 2133 2134 2135
		if (flag == ENABLE_INTRS) {
			/* writing 0 Enables all 8 RX interrupt levels */
			writeq(0x0, &bar0->rx_traffic_mask);
		} else if (flag == DISABLE_INTRS) {
2136 2137
			/*
			 * Disable Rx Traffic Intrs in the general intr mask
L
Linus Torvalds 已提交
2138 2139 2140 2141 2142
			 * register.
			 */
			writeq(DISABLE_ALL_INTRS, &bar0->rx_traffic_mask);
		}
	}
2143 2144 2145 2146 2147 2148 2149 2150 2151

	temp64 = readq(&bar0->general_int_mask);
	if (flag == ENABLE_INTRS)
		temp64 &= ~((u64) intr_mask);
	else
		temp64 = DISABLE_ALL_INTRS;
	writeq(temp64, &bar0->general_int_mask);

	nic->general_int_mask = readq(&bar0->general_int_mask);
L
Linus Torvalds 已提交
2152 2153
}

2154 2155 2156 2157 2158
/**
 *  verify_pcc_quiescent- Checks for PCC quiescent state
 *  Return: 1 If PCC is quiescence
 *          0 If PCC is not quiescence
 */
R
Ralf Baechle 已提交
2159
static int verify_pcc_quiescent(struct s2io_nic *sp, int flag)
2160
{
2161
	int ret = 0, herc;
R
Ralf Baechle 已提交
2162
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
2163
	u64 val64 = readq(&bar0->adapter_status);
2164

2165
	herc = (sp->device_type == XFRAME_II_DEVICE);
2166 2167

	if (flag == FALSE) {
2168
		if ((!herc && (sp->pdev->revision >= 4)) || herc) {
2169
			if (!(val64 & ADAPTER_STATUS_RMAC_PCC_IDLE))
2170
				ret = 1;
2171 2172
		} else {
			if (!(val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE))
2173
				ret = 1;
2174 2175
		}
	} else {
2176
		if ((!herc && (sp->pdev->revision >= 4)) || herc) {
2177
			if (((val64 & ADAPTER_STATUS_RMAC_PCC_IDLE) ==
2178
			     ADAPTER_STATUS_RMAC_PCC_IDLE))
2179 2180 2181
				ret = 1;
		} else {
			if (((val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE) ==
2182
			     ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE))
2183
				ret = 1;
2184 2185 2186 2187 2188 2189 2190
		}
	}

	return ret;
}
/**
 *  verify_xena_quiescence - Checks whether the H/W is ready
L
Linus Torvalds 已提交
2191
 *  Description: Returns whether the H/W is ready to go or not. Depending
2192
 *  on whether adapter enable bit was written or not the comparison
L
Linus Torvalds 已提交
2193 2194
 *  differs and the calling function passes the input argument flag to
 *  indicate this.
2195
 *  Return: 1 If xena is quiescence
L
Linus Torvalds 已提交
2196 2197 2198
 *          0 If Xena is not quiescence
 */

R
Ralf Baechle 已提交
2199
static int verify_xena_quiescence(struct s2io_nic *sp)
L
Linus Torvalds 已提交
2200
{
2201
	int  mode;
R
Ralf Baechle 已提交
2202
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
2203 2204
	u64 val64 = readq(&bar0->adapter_status);
	mode = s2io_verify_pci_mode(sp);
L
Linus Torvalds 已提交
2205

2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236
	if (!(val64 & ADAPTER_STATUS_TDMA_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "TDMA is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_RDMA_READY)) {
	DBG_PRINT(ERR_DBG, "%s", "RDMA is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_PFC_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "PFC is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_TMAC_BUF_EMPTY)) {
		DBG_PRINT(ERR_DBG, "%s", "TMAC BUF is not empty!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_PIC_QUIESCENT)) {
		DBG_PRINT(ERR_DBG, "%s", "PIC is not QUIESCENT!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_MC_DRAM_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "MC_DRAM is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_MC_QUEUES_READY)) {
		DBG_PRINT(ERR_DBG, "%s", "MC_QUEUES is not ready!");
		return 0;
	}
	if (!(val64 & ADAPTER_STATUS_M_PLL_LOCK)) {
		DBG_PRINT(ERR_DBG, "%s", "M_PLL is not locked!");
		return 0;
L
Linus Torvalds 已提交
2237 2238
	}

2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255
	/*
	 * In PCI 33 mode, the P_PLL is not used, and therefore,
	 * the the P_PLL_LOCK bit in the adapter_status register will
	 * not be asserted.
	 */
	if (!(val64 & ADAPTER_STATUS_P_PLL_LOCK) &&
		sp->device_type == XFRAME_II_DEVICE && mode !=
		PCI_MODE_PCI_33) {
		DBG_PRINT(ERR_DBG, "%s", "P_PLL is not locked!");
		return 0;
	}
	if (!((val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ==
			ADAPTER_STATUS_RC_PRC_QUIESCENT)) {
		DBG_PRINT(ERR_DBG, "%s", "RC_PRC is not QUIESCENT!");
		return 0;
	}
	return 1;
L
Linus Torvalds 已提交
2256 2257 2258 2259 2260
}

/**
 * fix_mac_address -  Fix for Mac addr problem on Alpha platforms
 * @sp: Pointer to device specifc structure
2261
 * Description :
L
Linus Torvalds 已提交
2262 2263 2264 2265
 * New procedure to clear mac address reading  problems on Alpha platforms
 *
 */

R
Ralf Baechle 已提交
2266
static void fix_mac_address(struct s2io_nic * sp)
L
Linus Torvalds 已提交
2267
{
R
Ralf Baechle 已提交
2268
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
2269 2270 2271 2272 2273
	u64 val64;
	int i = 0;

	while (fix_mac[i] != END_SIGN) {
		writeq(fix_mac[i++], &bar0->gpio_control);
2274
		udelay(10);
L
Linus Torvalds 已提交
2275 2276 2277 2278 2279
		val64 = readq(&bar0->gpio_control);
	}
}

/**
2280
 *  start_nic - Turns the device on
L
Linus Torvalds 已提交
2281
 *  @nic : device private variable.
2282 2283 2284 2285
 *  Description:
 *  This function actually turns the device on. Before this  function is
 *  called,all Registers are configured from their reset states
 *  and shared memory is allocated but the NIC is still quiescent. On
L
Linus Torvalds 已提交
2286 2287
 *  calling this function, the device interrupts are cleared and the NIC is
 *  literally switched on by writing into the adapter control register.
2288
 *  Return Value:
L
Linus Torvalds 已提交
2289 2290 2291 2292 2293
 *  SUCCESS on success and -1 on failure.
 */

static int start_nic(struct s2io_nic *nic)
{
R
Ralf Baechle 已提交
2294
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
L
Linus Torvalds 已提交
2295 2296
	struct net_device *dev = nic->dev;
	register u64 val64 = 0;
2297
	u16 subid, i;
R
Ralf Baechle 已提交
2298
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2299 2300 2301 2302 2303 2304 2305
	struct config_param *config;

	mac_control = &nic->mac_control;
	config = &nic->config;

	/*  PRC Initialization and configuration */
	for (i = 0; i < config->rx_ring_num; i++) {
2306
		writeq((u64) mac_control->rings[i].rx_blocks[0].block_dma_addr,
L
Linus Torvalds 已提交
2307 2308 2309
		       &bar0->prc_rxd0_n[i]);

		val64 = readq(&bar0->prc_ctrl_n[i]);
2310 2311 2312 2313
		if (nic->rxd_mode == RXD_MODE_1)
			val64 |= PRC_CTRL_RC_ENABLED;
		else
			val64 |= PRC_CTRL_RC_ENABLED | PRC_CTRL_RING_MODE_3;
2314 2315 2316 2317
		if (nic->device_type == XFRAME_II_DEVICE)
			val64 |= PRC_CTRL_GROUP_READS;
		val64 &= ~PRC_CTRL_RXD_BACKOFF_INTERVAL(0xFFFFFF);
		val64 |= PRC_CTRL_RXD_BACKOFF_INTERVAL(0x1000);
L
Linus Torvalds 已提交
2318 2319 2320
		writeq(val64, &bar0->prc_ctrl_n[i]);
	}

2321 2322 2323 2324 2325 2326
	if (nic->rxd_mode == RXD_MODE_3B) {
		/* Enabling 2 buffer mode by writing into Rx_pa_cfg reg. */
		val64 = readq(&bar0->rx_pa_cfg);
		val64 |= RX_PA_CFG_IGNORE_L2_ERR;
		writeq(val64, &bar0->rx_pa_cfg);
	}
L
Linus Torvalds 已提交
2327

2328 2329 2330 2331 2332 2333 2334
	if (vlan_tag_strip == 0) {
		val64 = readq(&bar0->rx_pa_cfg);
		val64 &= ~RX_PA_CFG_STRIP_VLAN_TAG;
		writeq(val64, &bar0->rx_pa_cfg);
		vlan_strip_flag = 0;
	}

2335
	/*
L
Linus Torvalds 已提交
2336 2337 2338 2339 2340 2341 2342 2343 2344
	 * Enabling MC-RLDRAM. After enabling the device, we timeout
	 * for around 100ms, which is approximately the time required
	 * for the device to be ready for operation.
	 */
	val64 = readq(&bar0->mc_rldram_mrs);
	val64 |= MC_RLDRAM_QUEUE_SIZE_ENABLE | MC_RLDRAM_MRS_ENABLE;
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);
	val64 = readq(&bar0->mc_rldram_mrs);

2345
	msleep(100);	/* Delay by around 100 ms. */
L
Linus Torvalds 已提交
2346 2347 2348 2349 2350 2351

	/* Enabling ECC Protection. */
	val64 = readq(&bar0->adapter_control);
	val64 &= ~ADAPTER_ECC_EN;
	writeq(val64, &bar0->adapter_control);

2352 2353
	/*
	 * Verify if the device is ready to be enabled, if so enable
L
Linus Torvalds 已提交
2354 2355 2356
	 * it.
	 */
	val64 = readq(&bar0->adapter_status);
2357
	if (!verify_xena_quiescence(nic)) {
L
Linus Torvalds 已提交
2358 2359 2360 2361 2362 2363
		DBG_PRINT(ERR_DBG, "%s: device is not ready, ", dev->name);
		DBG_PRINT(ERR_DBG, "Adapter status reads: 0x%llx\n",
			  (unsigned long long) val64);
		return FAILURE;
	}

2364
	/*
L
Linus Torvalds 已提交
2365
	 * With some switches, link might be already up at this point.
2366 2367 2368 2369
	 * Because of this weird behavior, when we enable laser,
	 * we may not get link. We need to handle this. We cannot
	 * figure out which switch is misbehaving. So we are forced to
	 * make a global change.
L
Linus Torvalds 已提交
2370 2371 2372 2373 2374 2375 2376
	 */

	/* Enabling Laser. */
	val64 = readq(&bar0->adapter_control);
	val64 |= ADAPTER_EOI_TX_ON;
	writeq(val64, &bar0->adapter_control);

A
Ananda Raju 已提交
2377 2378 2379 2380 2381 2382 2383
	if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
		/*
		 * Dont see link state interrupts initally on some switches,
		 * so directly scheduling the link state task here.
		 */
		schedule_work(&nic->set_link_task);
	}
L
Linus Torvalds 已提交
2384 2385
	/* SXE-002: Initialize link and activity LED */
	subid = nic->pdev->subsystem_device;
2386 2387
	if (((subid & 0xFF) >= 0x07) &&
	    (nic->device_type == XFRAME_I_DEVICE)) {
L
Linus Torvalds 已提交
2388 2389 2390 2391
		val64 = readq(&bar0->gpio_control);
		val64 |= 0x0000800000000000ULL;
		writeq(val64, &bar0->gpio_control);
		val64 = 0x0411040400000000ULL;
2392
		writeq(val64, (void __iomem *)bar0 + 0x2700);
L
Linus Torvalds 已提交
2393 2394 2395 2396
	}

	return SUCCESS;
}
A
Ananda Raju 已提交
2397 2398 2399
/**
 * s2io_txdl_getskb - Get the skb from txdl, unmap and return skb
 */
R
Ralf Baechle 已提交
2400 2401
static struct sk_buff *s2io_txdl_getskb(struct fifo_info *fifo_data, struct \
					TxD *txdlp, int get_off)
A
Ananda Raju 已提交
2402
{
R
Ralf Baechle 已提交
2403
	struct s2io_nic *nic = fifo_data->nic;
A
Ananda Raju 已提交
2404
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2405
	struct TxD *txds;
A
Ananda Raju 已提交
2406 2407 2408
	u16 j, frg_cnt;

	txds = txdlp;
2409
	if (txds->Host_Control == (u64)(long)fifo_data->ufo_in_band_v) {
A
Ananda Raju 已提交
2410 2411 2412 2413 2414 2415 2416 2417 2418
		pci_unmap_single(nic->pdev, (dma_addr_t)
			txds->Buffer_Pointer, sizeof(u64),
			PCI_DMA_TODEVICE);
		txds++;
	}

	skb = (struct sk_buff *) ((unsigned long)
			txds->Host_Control);
	if (!skb) {
R
Ralf Baechle 已提交
2419
		memset(txdlp, 0, (sizeof(struct TxD) * fifo_data->max_txds));
A
Ananda Raju 已提交
2420 2421 2422 2423 2424 2425 2426 2427 2428 2429 2430 2431 2432
		return NULL;
	}
	pci_unmap_single(nic->pdev, (dma_addr_t)
			 txds->Buffer_Pointer,
			 skb->len - skb->data_len,
			 PCI_DMA_TODEVICE);
	frg_cnt = skb_shinfo(skb)->nr_frags;
	if (frg_cnt) {
		txds++;
		for (j = 0; j < frg_cnt; j++, txds++) {
			skb_frag_t *frag = &skb_shinfo(skb)->frags[j];
			if (!txds->Buffer_Pointer)
				break;
2433
			pci_unmap_page(nic->pdev, (dma_addr_t)
A
Ananda Raju 已提交
2434 2435 2436 2437
					txds->Buffer_Pointer,
				       frag->size, PCI_DMA_TODEVICE);
		}
	}
R
Ralf Baechle 已提交
2438
	memset(txdlp,0, (sizeof(struct TxD) * fifo_data->max_txds));
A
Ananda Raju 已提交
2439 2440
	return(skb);
}
L
Linus Torvalds 已提交
2441

2442 2443
/**
 *  free_tx_buffers - Free all queued Tx buffers
L
Linus Torvalds 已提交
2444
 *  @nic : device private variable.
2445
 *  Description:
L
Linus Torvalds 已提交
2446
 *  Free all queued Tx buffers.
2447
 *  Return Value: void
L
Linus Torvalds 已提交
2448 2449 2450 2451 2452 2453
*/

static void free_tx_buffers(struct s2io_nic *nic)
{
	struct net_device *dev = nic->dev;
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2454
	struct TxD *txdp;
L
Linus Torvalds 已提交
2455
	int i, j;
R
Ralf Baechle 已提交
2456
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2457
	struct config_param *config;
A
Ananda Raju 已提交
2458
	int cnt = 0;
L
Linus Torvalds 已提交
2459 2460 2461 2462 2463

	mac_control = &nic->mac_control;
	config = &nic->config;

	for (i = 0; i < config->tx_fifo_num; i++) {
2464 2465
		unsigned long flags;
		spin_lock_irqsave(&mac_control->fifos[i].tx_lock, flags);
2466
		for (j = 0; j < config->tx_cfg[i].fifo_len; j++) {
2467 2468
			txdp = (struct TxD *) \
			mac_control->fifos[i].list_info[j].list_virt_addr;
A
Ananda Raju 已提交
2469 2470
			skb = s2io_txdl_getskb(&mac_control->fifos[i], txdp, j);
			if (skb) {
2471
				nic->mac_control.stats_info->sw_stat.mem_freed
2472
					+= skb->truesize;
A
Ananda Raju 已提交
2473 2474
				dev_kfree_skb(skb);
				cnt++;
L
Linus Torvalds 已提交
2475 2476 2477 2478 2479
			}
		}
		DBG_PRINT(INTR_DBG,
			  "%s:forcibly freeing %d skbs on FIFO%d\n",
			  dev->name, cnt, i);
2480 2481
		mac_control->fifos[i].tx_curr_get_info.offset = 0;
		mac_control->fifos[i].tx_curr_put_info.offset = 0;
2482
		spin_unlock_irqrestore(&mac_control->fifos[i].tx_lock, flags);
L
Linus Torvalds 已提交
2483 2484 2485
	}
}

2486 2487
/**
 *   stop_nic -  To stop the nic
L
Linus Torvalds 已提交
2488
 *   @nic ; device private variable.
2489 2490
 *   Description:
 *   This function does exactly the opposite of what the start_nic()
L
Linus Torvalds 已提交
2491 2492 2493 2494 2495 2496 2497
 *   function does. This function is called to stop the device.
 *   Return Value:
 *   void.
 */

static void stop_nic(struct s2io_nic *nic)
{
R
Ralf Baechle 已提交
2498
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
L
Linus Torvalds 已提交
2499
	register u64 val64 = 0;
2500
	u16 interruptible;
R
Ralf Baechle 已提交
2501
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2502 2503 2504 2505 2506 2507
	struct config_param *config;

	mac_control = &nic->mac_control;
	config = &nic->config;

	/*  Disable all interrupts */
2508
	en_dis_err_alarms(nic, ENA_ALL_INTRS, DISABLE_INTRS);
2509
	interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
2510
	interruptible |= TX_PIC_INTR;
L
Linus Torvalds 已提交
2511 2512
	en_dis_able_nic_intrs(nic, interruptible, DISABLE_INTRS);

2513 2514 2515 2516
	/* Clearing Adapter_En bit of ADAPTER_CONTROL Register */
	val64 = readq(&bar0->adapter_control);
	val64 &= ~(ADAPTER_CNTL_EN);
	writeq(val64, &bar0->adapter_control);
L
Linus Torvalds 已提交
2517 2518
}

2519 2520
/**
 *  fill_rx_buffers - Allocates the Rx side skbs
2521
 *  @ring_info: per ring structure
2522
 *  Description:
L
Linus Torvalds 已提交
2523 2524 2525 2526 2527 2528 2529
 *  The function allocates Rx side skbs and puts the physical
 *  address of these buffers into the RxD buffer pointers, so that the NIC
 *  can DMA the received frame into these locations.
 *  The NIC supports 3 receive modes, viz
 *  1. single buffer,
 *  2. three buffer and
 *  3. Five buffer modes.
2530 2531
 *  Each mode defines how many fragments the received frame will be split
 *  up into by the NIC. The frame is split into L3 header, L4 Header,
L
Linus Torvalds 已提交
2532 2533 2534 2535 2536 2537 2538
 *  L4 payload in three buffer mode and in 5 buffer mode, L4 payload itself
 *  is split into 3 fragments. As of now only single buffer mode is
 *  supported.
 *   Return Value:
 *  SUCCESS on success or an appropriate -ve value on failure.
 */

2539
static int fill_rx_buffers(struct ring_info *ring)
L
Linus Torvalds 已提交
2540 2541
{
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2542
	struct RxD_t *rxdp;
2543
	int off, size, block_no, block_no1;
L
Linus Torvalds 已提交
2544
	u32 alloc_tab = 0;
2545 2546
	u32 alloc_cnt;
	u64 tmp;
R
Ralf Baechle 已提交
2547 2548
	struct buffAdd *ba;
	struct RxD_t *first_rxdp = NULL;
2549
	u64 Buffer0_ptr = 0, Buffer1_ptr = 0;
2550
	int rxd_index = 0;
2551 2552
	struct RxD1 *rxdp1;
	struct RxD3 *rxdp3;
2553
	struct swStat *stats = &ring->nic->mac_control.stats_info->sw_stat;
L
Linus Torvalds 已提交
2554

2555
	alloc_cnt = ring->pkt_cnt - ring->rx_bufs_left;
L
Linus Torvalds 已提交
2556

2557
	block_no1 = ring->rx_curr_get_info.block_index;
L
Linus Torvalds 已提交
2558
	while (alloc_tab < alloc_cnt) {
2559
		block_no = ring->rx_curr_put_info.block_index;
L
Linus Torvalds 已提交
2560

2561 2562 2563 2564 2565 2566 2567
		off = ring->rx_curr_put_info.offset;

		rxdp = ring->rx_blocks[block_no].rxds[off].virt_addr;

		rxd_index = off + 1;
		if (block_no)
			rxd_index += (block_no * ring->rxd_count);
2568

2569 2570 2571
		if ((block_no == block_no1) && 
			(off == ring->rx_curr_get_info.offset) &&
			(rxdp->Host_Control)) {
2572
			DBG_PRINT(INTR_DBG, "%s: Get and Put",
2573
				ring->dev->name);
L
Linus Torvalds 已提交
2574 2575 2576
			DBG_PRINT(INTR_DBG, " info equated\n");
			goto end;
		}
2577 2578 2579 2580 2581 2582 2583 2584 2585
		if (off && (off == ring->rxd_count)) {
			ring->rx_curr_put_info.block_index++;
			if (ring->rx_curr_put_info.block_index ==
							ring->block_count)
				ring->rx_curr_put_info.block_index = 0;
			block_no = ring->rx_curr_put_info.block_index;
			off = 0;
			ring->rx_curr_put_info.offset = off;
			rxdp = ring->rx_blocks[block_no].block_virt_addr;
L
Linus Torvalds 已提交
2586
			DBG_PRINT(INTR_DBG, "%s: Next block at: %p\n",
2587 2588
				  ring->dev->name, rxdp);

L
Linus Torvalds 已提交
2589
		}
2590

2591
		if ((rxdp->Control_1 & RXD_OWN_XENA) &&
2592
			((ring->rxd_mode == RXD_MODE_3B) &&
J
Jiri Slaby 已提交
2593
				(rxdp->Control_2 & s2BIT(0)))) {
2594
			ring->rx_curr_put_info.offset = off;
L
Linus Torvalds 已提交
2595 2596
			goto end;
		}
2597
		/* calculate size of skb based on ring mode */
2598
		size = ring->mtu + HEADER_ETHERNET_II_802_3_SIZE +
2599
				HEADER_802_2_SIZE + HEADER_SNAP_SIZE;
2600
		if (ring->rxd_mode == RXD_MODE_1)
2601 2602
			size += NET_IP_ALIGN;
		else
2603
			size = ring->mtu + ALIGN_SIZE + BUF0_LEN + 4;
L
Linus Torvalds 已提交
2604

2605 2606 2607
		/* allocate skb */
		skb = dev_alloc_skb(size);
		if(!skb) {
2608
			DBG_PRINT(INFO_DBG, "%s: Out of ", ring->dev->name);
2609
			DBG_PRINT(INFO_DBG, "memory to allocate SKBs\n");
2610 2611 2612 2613
			if (first_rxdp) {
				wmb();
				first_rxdp->Control_1 |= RXD_OWN_XENA;
			}
2614 2615
			stats->mem_alloc_fail_cnt++;
				
2616 2617
			return -ENOMEM ;
		}
2618 2619 2620
		stats->mem_allocated += skb->truesize;

		if (ring->rxd_mode == RXD_MODE_1) {
2621
			/* 1 buffer mode - normal operation mode */
2622
			rxdp1 = (struct RxD1*)rxdp;
R
Ralf Baechle 已提交
2623
			memset(rxdp, 0, sizeof(struct RxD1));
2624
			skb_reserve(skb, NET_IP_ALIGN);
2625
			rxdp1->Buffer0_ptr = pci_map_single
2626
			    (ring->pdev, skb->data, size - NET_IP_ALIGN,
2627
				PCI_DMA_FROMDEVICE);
2628 2629 2630 2631 2632
			if( (rxdp1->Buffer0_ptr == 0) ||
				(rxdp1->Buffer0_ptr ==
				DMA_ERROR_CODE))
				goto pci_map_failed;

2633
			rxdp->Control_2 =
2634
				SET_BUFFER0_SIZE_1(size - NET_IP_ALIGN);
2635 2636
			rxdp->Host_Control = (unsigned long) (skb);
		} else if (ring->rxd_mode == RXD_MODE_3B) {
2637
			/*
2638 2639
			 * 2 buffer mode -
			 * 2 buffer mode provides 128
2640 2641 2642
			 * byte aligned receive buffers.
			 */

2643
			rxdp3 = (struct RxD3*)rxdp;
2644
			/* save buffer pointers to avoid frequent dma mapping */
2645 2646
			Buffer0_ptr = rxdp3->Buffer0_ptr;
			Buffer1_ptr = rxdp3->Buffer1_ptr;
R
Ralf Baechle 已提交
2647
			memset(rxdp, 0, sizeof(struct RxD3));
2648
			/* restore the buffer pointers for dma sync*/
2649 2650
			rxdp3->Buffer0_ptr = Buffer0_ptr;
			rxdp3->Buffer1_ptr = Buffer1_ptr;
2651

2652
			ba = &ring->ba[block_no][off];
2653 2654 2655 2656 2657
			skb_reserve(skb, BUF0_LEN);
			tmp = (u64)(unsigned long) skb->data;
			tmp += ALIGN_SIZE;
			tmp &= ~ALIGN_SIZE;
			skb->data = (void *) (unsigned long)tmp;
2658
			skb_reset_tail_pointer(skb);
2659

2660 2661
			if (!(rxdp3->Buffer0_ptr))
				rxdp3->Buffer0_ptr =
2662 2663
				   pci_map_single(ring->pdev, ba->ba_0,
					BUF0_LEN, PCI_DMA_FROMDEVICE);
2664
			else
2665
				pci_dma_sync_single_for_device(ring->pdev,
2666
				(dma_addr_t) rxdp3->Buffer0_ptr,
2667
				    BUF0_LEN, PCI_DMA_FROMDEVICE);
2668 2669 2670 2671
			if( (rxdp3->Buffer0_ptr == 0) ||
				(rxdp3->Buffer0_ptr == DMA_ERROR_CODE))
				goto pci_map_failed;

2672
			rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN);
2673
			if (ring->rxd_mode == RXD_MODE_3B) {
2674 2675 2676
				/* Two buffer mode */

				/*
2677
				 * Buffer2 will have L3/L4 header plus
2678 2679
				 * L4 payload
				 */
2680
				rxdp3->Buffer2_ptr = pci_map_single
2681
				(ring->pdev, skb->data, ring->mtu + 4,
2682 2683
						PCI_DMA_FROMDEVICE);

2684 2685 2686 2687
				if( (rxdp3->Buffer2_ptr == 0) ||
					(rxdp3->Buffer2_ptr == DMA_ERROR_CODE))
					goto pci_map_failed;

2688 2689 2690
				if (!rxdp3->Buffer1_ptr)
					rxdp3->Buffer1_ptr =
						pci_map_single(ring->pdev,
2691 2692
						ba->ba_1, BUF1_LEN,
						PCI_DMA_FROMDEVICE);
2693

2694 2695 2696
				if( (rxdp3->Buffer1_ptr == 0) ||
					(rxdp3->Buffer1_ptr == DMA_ERROR_CODE)) {
					pci_unmap_single
2697 2698 2699 2700
						(ring->pdev,
						(dma_addr_t)(unsigned long)
						skb->data,
						ring->mtu + 4,
2701 2702
						PCI_DMA_FROMDEVICE);
					goto pci_map_failed;
2703
				}
2704 2705
				rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1);
				rxdp->Control_2 |= SET_BUFFER2_SIZE_3
2706
								(ring->mtu + 4);
2707
			}
J
Jiri Slaby 已提交
2708
			rxdp->Control_2 |= s2BIT(0);
2709
			rxdp->Host_Control = (unsigned long) (skb);
L
Linus Torvalds 已提交
2710
		}
2711 2712
		if (alloc_tab & ((1 << rxsync_frequency) - 1))
			rxdp->Control_1 |= RXD_OWN_XENA;
L
Linus Torvalds 已提交
2713
		off++;
2714
		if (off == (ring->rxd_count + 1))
2715
			off = 0;
2716
		ring->rx_curr_put_info.offset = off;
2717

2718
		rxdp->Control_2 |= SET_RXD_MARKER;
2719 2720 2721 2722 2723 2724 2725
		if (!(alloc_tab & ((1 << rxsync_frequency) - 1))) {
			if (first_rxdp) {
				wmb();
				first_rxdp->Control_1 |= RXD_OWN_XENA;
			}
			first_rxdp = rxdp;
		}
2726
		ring->rx_bufs_left += 1;
L
Linus Torvalds 已提交
2727 2728 2729 2730
		alloc_tab++;
	}

      end:
2731 2732 2733 2734 2735 2736 2737 2738 2739
	/* Transfer ownership of first descriptor to adapter just before
	 * exiting. Before that, use memory barrier so that ownership
	 * and other fields are seen by adapter correctly.
	 */
	if (first_rxdp) {
		wmb();
		first_rxdp->Control_1 |= RXD_OWN_XENA;
	}

L
Linus Torvalds 已提交
2740
	return SUCCESS;
2741 2742 2743 2744 2745
pci_map_failed:
	stats->pci_map_fail_cnt++;
	stats->mem_freed += skb->truesize;
	dev_kfree_skb_irq(skb);
	return -ENOMEM;
L
Linus Torvalds 已提交
2746 2747
}

2748 2749 2750 2751 2752
static void free_rxd_blk(struct s2io_nic *sp, int ring_no, int blk)
{
	struct net_device *dev = sp->dev;
	int j;
	struct sk_buff *skb;
R
Ralf Baechle 已提交
2753 2754 2755
	struct RxD_t *rxdp;
	struct mac_info *mac_control;
	struct buffAdd *ba;
2756 2757
	struct RxD1 *rxdp1;
	struct RxD3 *rxdp3;
2758 2759 2760 2761 2762 2763 2764 2765 2766 2767 2768

	mac_control = &sp->mac_control;
	for (j = 0 ; j < rxd_count[sp->rxd_mode]; j++) {
		rxdp = mac_control->rings[ring_no].
                                rx_blocks[blk].rxds[j].virt_addr;
		skb = (struct sk_buff *)
			((unsigned long) rxdp->Host_Control);
		if (!skb) {
			continue;
		}
		if (sp->rxd_mode == RXD_MODE_1) {
2769
			rxdp1 = (struct RxD1*)rxdp;
2770
			pci_unmap_single(sp->pdev, (dma_addr_t)
2771 2772 2773 2774 2775 2776
				rxdp1->Buffer0_ptr,
				dev->mtu +
				HEADER_ETHERNET_II_802_3_SIZE
				+ HEADER_802_2_SIZE +
				HEADER_SNAP_SIZE,
				PCI_DMA_FROMDEVICE);
R
Ralf Baechle 已提交
2777
			memset(rxdp, 0, sizeof(struct RxD1));
2778
		} else if(sp->rxd_mode == RXD_MODE_3B) {
2779
			rxdp3 = (struct RxD3*)rxdp;
2780 2781 2782
			ba = &mac_control->rings[ring_no].
				ba[blk][j];
			pci_unmap_single(sp->pdev, (dma_addr_t)
2783 2784
				rxdp3->Buffer0_ptr,
				BUF0_LEN,
2785 2786
				PCI_DMA_FROMDEVICE);
			pci_unmap_single(sp->pdev, (dma_addr_t)
2787 2788
				rxdp3->Buffer1_ptr,
				BUF1_LEN,
2789 2790
				PCI_DMA_FROMDEVICE);
			pci_unmap_single(sp->pdev, (dma_addr_t)
2791 2792
				rxdp3->Buffer2_ptr,
				dev->mtu + 4,
2793
				PCI_DMA_FROMDEVICE);
R
Ralf Baechle 已提交
2794
			memset(rxdp, 0, sizeof(struct RxD3));
2795
		}
2796
		sp->mac_control.stats_info->sw_stat.mem_freed += skb->truesize;
2797
		dev_kfree_skb(skb);
2798
		mac_control->rings[ring_no].rx_bufs_left -= 1;
2799 2800 2801
	}
}

L
Linus Torvalds 已提交
2802
/**
2803
 *  free_rx_buffers - Frees all Rx buffers
L
Linus Torvalds 已提交
2804
 *  @sp: device private variable.
2805
 *  Description:
L
Linus Torvalds 已提交
2806 2807 2808 2809 2810 2811 2812 2813
 *  This function will free all Rx buffers allocated by host.
 *  Return Value:
 *  NONE.
 */

static void free_rx_buffers(struct s2io_nic *sp)
{
	struct net_device *dev = sp->dev;
2814
	int i, blk = 0, buf_cnt = 0;
R
Ralf Baechle 已提交
2815
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
2816 2817 2818 2819 2820 2821
	struct config_param *config;

	mac_control = &sp->mac_control;
	config = &sp->config;

	for (i = 0; i < config->rx_ring_num; i++) {
2822 2823
		for (blk = 0; blk < rx_ring_sz[i]; blk++)
			free_rxd_blk(sp,i,blk);
L
Linus Torvalds 已提交
2824

2825 2826 2827 2828
		mac_control->rings[i].rx_curr_put_info.block_index = 0;
		mac_control->rings[i].rx_curr_get_info.block_index = 0;
		mac_control->rings[i].rx_curr_put_info.offset = 0;
		mac_control->rings[i].rx_curr_get_info.offset = 0;
2829
		mac_control->rings[i].rx_bufs_left = 0;
L
Linus Torvalds 已提交
2830 2831 2832 2833 2834
		DBG_PRINT(INIT_DBG, "%s:Freed 0x%x Rx Buffers on ring%d\n",
			  dev->name, buf_cnt, i);
	}
}

2835 2836 2837 2838 2839 2840 2841 2842 2843
static int s2io_chk_rx_buffers(struct ring_info *ring)
{
	if (fill_rx_buffers(ring) == -ENOMEM) {
		DBG_PRINT(INFO_DBG, "%s:Out of memory", ring->dev->name);
		DBG_PRINT(INFO_DBG, " in Rx Intr!!\n");
	}
	return 0;
}

L
Linus Torvalds 已提交
2844 2845
/**
 * s2io_poll - Rx interrupt handler for NAPI support
2846
 * @napi : pointer to the napi structure.
2847
 * @budget : The number of packets that were budgeted to be processed
L
Linus Torvalds 已提交
2848 2849 2850 2851 2852 2853 2854 2855 2856
 * during  one pass through the 'Poll" function.
 * Description:
 * Comes into picture only if NAPI support has been incorporated. It does
 * the same thing that rx_intr_handler does, but not in a interrupt context
 * also It will process only a given number of packets.
 * Return value:
 * 0 on success and 1 if there are No Rx packets to be processed.
 */

2857
static int s2io_poll_msix(struct napi_struct *napi, int budget)
L
Linus Torvalds 已提交
2858
{
2859 2860
	struct ring_info *ring = container_of(napi, struct ring_info, napi);
	struct net_device *dev = ring->dev;
L
Linus Torvalds 已提交
2861
	struct config_param *config;
2862 2863 2864 2865
	struct mac_info *mac_control;
	int pkts_processed = 0;
	u8 *addr = NULL, val8 = 0;
	struct s2io_nic *nic = dev->priv;
R
Ralf Baechle 已提交
2866
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
2867
	int budget_org = budget;
L
Linus Torvalds 已提交
2868 2869

	config = &nic->config;
2870
	mac_control = &nic->mac_control;
L
Linus Torvalds 已提交
2871

2872 2873
	if (unlikely(!is_s2io_card_up(nic)))
		return 0;
L
Linus Torvalds 已提交
2874

2875 2876
	pkts_processed = rx_intr_handler(ring, budget);
	s2io_chk_rx_buffers(ring);
L
Linus Torvalds 已提交
2877

2878 2879 2880 2881 2882 2883 2884 2885
	if (pkts_processed < budget_org) {
		netif_rx_complete(dev, napi);
		/*Re Enable MSI-Rx Vector*/
		addr = (u8 *)&bar0->xmsi_mask_reg;
		addr += 7 - ring->ring_no;
		val8 = (ring->ring_no == 0) ? 0x3f : 0xbf;
		writeb(val8, addr);
		val8 = readb(addr);
L
Linus Torvalds 已提交
2886
	}
2887 2888 2889 2890 2891 2892 2893 2894 2895 2896 2897 2898 2899
	return pkts_processed;
}
static int s2io_poll_inta(struct napi_struct *napi, int budget)
{
	struct s2io_nic *nic = container_of(napi, struct s2io_nic, napi);
	struct ring_info *ring;
	struct net_device *dev = nic->dev;
	struct config_param *config;
	struct mac_info *mac_control;
	int pkts_processed = 0;
	int ring_pkts_processed, i;
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
	int budget_org = budget;
L
Linus Torvalds 已提交
2900

2901 2902
	config = &nic->config;
	mac_control = &nic->mac_control;
L
Linus Torvalds 已提交
2903

2904 2905
	if (unlikely(!is_s2io_card_up(nic)))
		return 0;
L
Linus Torvalds 已提交
2906 2907

	for (i = 0; i < config->rx_ring_num; i++) {
2908 2909 2910 2911 2912 2913
		ring = &mac_control->rings[i];
		ring_pkts_processed = rx_intr_handler(ring, budget);
		s2io_chk_rx_buffers(ring);
		pkts_processed += ring_pkts_processed;
		budget -= ring_pkts_processed;
		if (budget <= 0)
L
Linus Torvalds 已提交
2914 2915
			break;
	}
2916 2917 2918 2919 2920 2921 2922
	if (pkts_processed < budget_org) {
		netif_rx_complete(dev, napi);
		/* Re enable the Rx interrupts for the ring */
		writeq(0, &bar0->rx_traffic_mask);
		readl(&bar0->rx_traffic_mask);
	}
	return pkts_processed;
L
Linus Torvalds 已提交
2923
}
2924

2925
#ifdef CONFIG_NET_POLL_CONTROLLER
2926
/**
2927
 * s2io_netpoll - netpoll event handler entry point
2928 2929
 * @dev : pointer to the device structure.
 * Description:
2930 2931 2932 2933
 * 	This function will be called by upper layer to check for events on the
 * interface in situations where interrupts are disabled. It is used for
 * specific in-kernel networking tasks, such as remote consoles and kernel
 * debugging over the network (example netdump in RedHat).
2934 2935 2936
 */
static void s2io_netpoll(struct net_device *dev)
{
R
Ralf Baechle 已提交
2937 2938
	struct s2io_nic *nic = dev->priv;
	struct mac_info *mac_control;
2939
	struct config_param *config;
R
Ralf Baechle 已提交
2940
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
2941
	u64 val64 = 0xFFFFFFFFFFFFFFFFULL;
2942 2943
	int i;

2944 2945 2946
	if (pci_channel_offline(nic->pdev))
		return;

2947 2948 2949 2950 2951 2952
	disable_irq(dev->irq);

	mac_control = &nic->mac_control;
	config = &nic->config;

	writeq(val64, &bar0->rx_traffic_int);
2953 2954
	writeq(val64, &bar0->tx_traffic_int);

2955
	/* we need to free up the transmitted skbufs or else netpoll will
2956 2957 2958 2959 2960
	 * run out of skbs and will fail and eventually netpoll application such
	 * as netdump will fail.
	 */
	for (i = 0; i < config->tx_fifo_num; i++)
		tx_intr_handler(&mac_control->fifos[i]);
2961

2962
	/* check for received packet and indicate up to network */
2963
	for (i = 0; i < config->rx_ring_num; i++)
2964
		rx_intr_handler(&mac_control->rings[i], 0);
2965 2966

	for (i = 0; i < config->rx_ring_num; i++) {
2967
		if (fill_rx_buffers(&mac_control->rings[i]) == -ENOMEM) {
2968 2969
			DBG_PRINT(INFO_DBG, "%s:Out of memory", dev->name);
			DBG_PRINT(INFO_DBG, " in Rx Netpoll!!\n");
2970 2971 2972 2973 2974 2975 2976 2977
			break;
		}
	}
	enable_irq(dev->irq);
	return;
}
#endif

2978
/**
L
Linus Torvalds 已提交
2979
 *  rx_intr_handler - Rx interrupt handler
2980 2981
 *  @ring_info: per ring structure.
 *  @budget: budget for napi processing.
2982 2983
 *  Description:
 *  If the interrupt is because of a received frame or if the
L
Linus Torvalds 已提交
2984
 *  receive ring contains fresh as yet un-processed frames,this function is
2985 2986
 *  called. It picks out the RxD at which place the last Rx processing had
 *  stopped and sends the skb to the OSM's Rx handler and then increments
L
Linus Torvalds 已提交
2987 2988
 *  the offset.
 *  Return Value:
2989
 *  No. of napi packets processed.
L
Linus Torvalds 已提交
2990
 */
2991
static int rx_intr_handler(struct ring_info *ring_data, int budget)
L
Linus Torvalds 已提交
2992
{
2993
	int get_block, put_block;
R
Ralf Baechle 已提交
2994 2995
	struct rx_curr_get_info get_info, put_info;
	struct RxD_t *rxdp;
L
Linus Torvalds 已提交
2996
	struct sk_buff *skb;
2997
	int pkt_cnt = 0, napi_pkts = 0;
2998
	int i;
2999 3000
	struct RxD1* rxdp1;
	struct RxD3* rxdp3;
3001

3002 3003
	get_info = ring_data->rx_curr_get_info;
	get_block = get_info.block_index;
R
Ralf Baechle 已提交
3004
	memcpy(&put_info, &ring_data->rx_curr_put_info, sizeof(put_info));
3005
	put_block = put_info.block_index;
3006
	rxdp = ring_data->rx_blocks[get_block].rxds[get_info.offset].virt_addr;
3007

3008
	while (RXD_IS_UP2DT(rxdp)) {
3009 3010 3011 3012
		/*
		 * If your are next to put index then it's
		 * FIFO full condition
		 */
3013 3014
		if ((get_block == put_block) &&
		    (get_info.offset + 1) == put_info.offset) {
3015 3016
			DBG_PRINT(INTR_DBG, "%s: Ring Full\n",
				ring_data->dev->name);
3017 3018
			break;
		}
3019 3020 3021
		skb = (struct sk_buff *) ((unsigned long)rxdp->Host_Control);
		if (skb == NULL) {
			DBG_PRINT(ERR_DBG, "%s: The skb is ",
3022
				  ring_data->dev->name);
3023
			DBG_PRINT(ERR_DBG, "Null in Rx Intr\n");
3024
			return 0;
L
Linus Torvalds 已提交
3025
		}
3026
		if (ring_data->rxd_mode == RXD_MODE_1) {
3027
			rxdp1 = (struct RxD1*)rxdp;
3028
			pci_unmap_single(ring_data->pdev, (dma_addr_t)
3029
				rxdp1->Buffer0_ptr,
3030
				ring_data->mtu +
3031 3032 3033 3034
				HEADER_ETHERNET_II_802_3_SIZE +
				HEADER_802_2_SIZE +
				HEADER_SNAP_SIZE,
				PCI_DMA_FROMDEVICE);
3035
		} else if (ring_data->rxd_mode == RXD_MODE_3B) {
3036
			rxdp3 = (struct RxD3*)rxdp;
3037
			pci_dma_sync_single_for_cpu(ring_data->pdev, (dma_addr_t)
3038 3039
				rxdp3->Buffer0_ptr,
				BUF0_LEN, PCI_DMA_FROMDEVICE);
3040
			pci_unmap_single(ring_data->pdev, (dma_addr_t)
3041
				rxdp3->Buffer2_ptr,
3042
				ring_data->mtu + 4,
3043
				PCI_DMA_FROMDEVICE);
3044
		}
3045
		prefetch(skb->data);
3046 3047
		rx_osm_handler(ring_data, rxdp);
		get_info.offset++;
3048 3049 3050
		ring_data->rx_curr_get_info.offset = get_info.offset;
		rxdp = ring_data->rx_blocks[get_block].
				rxds[get_info.offset].virt_addr;
3051
		if (get_info.offset == rxd_count[ring_data->rxd_mode]) {
3052
			get_info.offset = 0;
3053
			ring_data->rx_curr_get_info.offset = get_info.offset;
3054
			get_block++;
3055 3056 3057
			if (get_block == ring_data->block_count)
				get_block = 0;
			ring_data->rx_curr_get_info.block_index = get_block;
3058 3059
			rxdp = ring_data->rx_blocks[get_block].block_virt_addr;
		}
L
Linus Torvalds 已提交
3060

3061 3062 3063 3064
		if (ring_data->nic->config.napi) {
			budget--;
			napi_pkts++;
			if (!budget)
3065 3066
				break;
		}
3067
		pkt_cnt++;
L
Linus Torvalds 已提交
3068 3069 3070
		if ((indicate_max_pkts) && (pkt_cnt > indicate_max_pkts))
			break;
	}
3071
	if (ring_data->lro) {
3072 3073
		/* Clear all LRO sessions before exiting */
		for (i=0; i<MAX_LRO_SESSIONS; i++) {
3074
			struct lro *lro = &ring_data->lro0_n[i];
3075
			if (lro->in_use) {
3076
				update_L3L4_header(ring_data->nic, lro);
3077
				queue_rx_frame(lro->parent, lro->vlan_tag);
3078 3079 3080 3081
				clear_lro_session(lro);
			}
		}
	}
3082
	return(napi_pkts);
L
Linus Torvalds 已提交
3083
}
3084 3085

/**
L
Linus Torvalds 已提交
3086 3087
 *  tx_intr_handler - Transmit interrupt handler
 *  @nic : device private variable
3088 3089 3090 3091
 *  Description:
 *  If an interrupt was raised to indicate DMA complete of the
 *  Tx packet, this function is called. It identifies the last TxD
 *  whose buffer was freed and frees all skbs whose data have already
L
Linus Torvalds 已提交
3092 3093 3094 3095 3096
 *  DMA'ed into the NICs internal memory.
 *  Return Value:
 *  NONE
 */

R
Ralf Baechle 已提交
3097
static void tx_intr_handler(struct fifo_info *fifo_data)
L
Linus Torvalds 已提交
3098
{
R
Ralf Baechle 已提交
3099 3100
	struct s2io_nic *nic = fifo_data->nic;
	struct tx_curr_get_info get_info, put_info;
3101
	struct sk_buff *skb = NULL;
R
Ralf Baechle 已提交
3102
	struct TxD *txdlp;
3103
	int pkt_cnt = 0;
3104
	unsigned long flags = 0;
3105
	u8 err_mask;
L
Linus Torvalds 已提交
3106

3107 3108 3109
	if (!spin_trylock_irqsave(&fifo_data->tx_lock, flags))
			return;

3110
	get_info = fifo_data->tx_curr_get_info;
R
Ralf Baechle 已提交
3111 3112
	memcpy(&put_info, &fifo_data->tx_curr_put_info, sizeof(put_info));
	txdlp = (struct TxD *) fifo_data->list_info[get_info.offset].
3113 3114 3115 3116 3117 3118 3119 3120
	    list_virt_addr;
	while ((!(txdlp->Control_1 & TXD_LIST_OWN_XENA)) &&
	       (get_info.offset != put_info.offset) &&
	       (txdlp->Host_Control)) {
		/* Check for TxD errors */
		if (txdlp->Control_1 & TXD_T_CODE) {
			unsigned long long err;
			err = txdlp->Control_1 & TXD_T_CODE;
3121 3122 3123 3124
			if (err & 0x1) {
				nic->mac_control.stats_info->sw_stat.
						parity_err_cnt++;
			}
3125 3126

			/* update t_code statistics */
3127 3128
			err_mask = err >> 48;
			switch(err_mask) {
3129 3130 3131 3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153
				case 2:
					nic->mac_control.stats_info->sw_stat.
							tx_buf_abort_cnt++;
				break;

				case 3:
					nic->mac_control.stats_info->sw_stat.
							tx_desc_abort_cnt++;
				break;

				case 7:
					nic->mac_control.stats_info->sw_stat.
							tx_parity_err_cnt++;
				break;

				case 10:
					nic->mac_control.stats_info->sw_stat.
							tx_link_loss_cnt++;
				break;

				case 15:
					nic->mac_control.stats_info->sw_stat.
							tx_list_proc_err_cnt++;
				break;
                        }
3154
		}
L
Linus Torvalds 已提交
3155

A
Ananda Raju 已提交
3156
		skb = s2io_txdl_getskb(fifo_data, txdlp, get_info.offset);
3157
		if (skb == NULL) {
3158
			spin_unlock_irqrestore(&fifo_data->tx_lock, flags);
3159 3160 3161 3162 3163
			DBG_PRINT(ERR_DBG, "%s: Null skb ",
			__FUNCTION__);
			DBG_PRINT(ERR_DBG, "in Tx Free Intr\n");
			return;
		}
3164
		pkt_cnt++;
3165 3166 3167

		/* Updating the statistics block */
		nic->stats.tx_bytes += skb->len;
3168
		nic->mac_control.stats_info->sw_stat.mem_freed += skb->truesize;
3169 3170 3171
		dev_kfree_skb_irq(skb);

		get_info.offset++;
3172 3173
		if (get_info.offset == get_info.fifo_len + 1)
			get_info.offset = 0;
R
Ralf Baechle 已提交
3174
		txdlp = (struct TxD *) fifo_data->list_info
3175 3176 3177
		    [get_info.offset].list_virt_addr;
		fifo_data->tx_curr_get_info.offset =
		    get_info.offset;
L
Linus Torvalds 已提交
3178 3179
	}

3180
	s2io_wake_tx_queue(fifo_data, pkt_cnt, nic->config.multiq);
3181 3182

	spin_unlock_irqrestore(&fifo_data->tx_lock, flags);
L
Linus Torvalds 已提交
3183 3184
}

3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197
/**
 *  s2io_mdio_write - Function to write in to MDIO registers
 *  @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
 *  @addr     : address value
 *  @value    : data value
 *  @dev      : pointer to net_device structure
 *  Description:
 *  This function is used to write values to the MDIO registers
 *  NONE
 */
static void s2io_mdio_write(u32 mmd_type, u64 addr, u16 value, struct net_device *dev)
{
	u64 val64 = 0x0;
R
Ralf Baechle 已提交
3198 3199
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
3200 3201 3202 3203 3204 3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246

	//address transaction
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	//Data transaction
	val64 = 0x0;
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0)
			| MDIO_MDIO_DATA(value)
			| MDIO_OP(MDIO_OP_WRITE_TRANS);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	val64 = 0x0;
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
	| MDIO_MMD_DEV_ADDR(mmd_type)
	| MDIO_MMS_PRT_ADDR(0x0)
	| MDIO_OP(MDIO_OP_READ_TRANS);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

}

/**
 *  s2io_mdio_read - Function to write in to MDIO registers
 *  @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
 *  @addr     : address value
 *  @dev      : pointer to net_device structure
 *  Description:
 *  This function is used to read values to the MDIO registers
 *  NONE
 */
static u64 s2io_mdio_read(u32 mmd_type, u64 addr, struct net_device *dev)
{
	u64 val64 = 0x0;
	u64 rval64 = 0x0;
R
Ralf Baechle 已提交
3247 3248
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
3249 3250 3251 3252 3253 3254 3255 3256 3257 3258 3259 3260 3261 3262 3263 3264 3265 3266 3267 3268 3269 3270 3271 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306 3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350

	/* address transaction */
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	/* Data transaction */
	val64 = 0x0;
	val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
			| MDIO_MMD_DEV_ADDR(mmd_type)
			| MDIO_MMS_PRT_ADDR(0x0)
			| MDIO_OP(MDIO_OP_READ_TRANS);
	writeq(val64, &bar0->mdio_control);
	val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
	writeq(val64, &bar0->mdio_control);
	udelay(100);

	/* Read the value from regs */
	rval64 = readq(&bar0->mdio_control);
	rval64 = rval64 & 0xFFFF0000;
	rval64 = rval64 >> 16;
	return rval64;
}
/**
 *  s2io_chk_xpak_counter - Function to check the status of the xpak counters
 *  @counter      : couter value to be updated
 *  @flag         : flag to indicate the status
 *  @type         : counter type
 *  Description:
 *  This function is to check the status of the xpak counters value
 *  NONE
 */

static void s2io_chk_xpak_counter(u64 *counter, u64 * regs_stat, u32 index, u16 flag, u16 type)
{
	u64 mask = 0x3;
	u64 val64;
	int i;
	for(i = 0; i <index; i++)
		mask = mask << 0x2;

	if(flag > 0)
	{
		*counter = *counter + 1;
		val64 = *regs_stat & mask;
		val64 = val64 >> (index * 0x2);
		val64 = val64 + 1;
		if(val64 == 3)
		{
			switch(type)
			{
			case 1:
				DBG_PRINT(ERR_DBG, "Take Xframe NIC out of "
					  "service. Excessive temperatures may "
					  "result in premature transceiver "
					  "failure \n");
			break;
			case 2:
				DBG_PRINT(ERR_DBG, "Take Xframe NIC out of "
					  "service Excessive bias currents may "
					  "indicate imminent laser diode "
					  "failure \n");
			break;
			case 3:
				DBG_PRINT(ERR_DBG, "Take Xframe NIC out of "
					  "service Excessive laser output "
					  "power may saturate far-end "
					  "receiver\n");
			break;
			default:
				DBG_PRINT(ERR_DBG, "Incorrect XPAK Alarm "
					  "type \n");
			}
			val64 = 0x0;
		}
		val64 = val64 << (index * 0x2);
		*regs_stat = (*regs_stat & (~mask)) | (val64);

	} else {
		*regs_stat = *regs_stat & (~mask);
	}
}

/**
 *  s2io_updt_xpak_counter - Function to update the xpak counters
 *  @dev         : pointer to net_device struct
 *  Description:
 *  This function is to upate the status of the xpak counters value
 *  NONE
 */
static void s2io_updt_xpak_counter(struct net_device *dev)
{
	u16 flag  = 0x0;
	u16 type  = 0x0;
	u16 val16 = 0x0;
	u64 val64 = 0x0;
	u64 addr  = 0x0;

R
Ralf Baechle 已提交
3351 3352
	struct s2io_nic *sp = dev->priv;
	struct stat_block *stat_info = sp->mac_control.stats_info;
3353 3354 3355 3356 3357 3358 3359 3360 3361 3362 3363 3364 3365 3366 3367 3368 3369 3370 3371 3372 3373 3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384 3385 3386 3387 3388 3389 3390 3391 3392 3393 3394 3395 3396 3397 3398 3399 3400 3401 3402 3403 3404 3405 3406 3407 3408 3409 3410 3411 3412 3413 3414 3415 3416 3417 3418 3419 3420 3421 3422 3423 3424 3425 3426 3427 3428 3429 3430 3431 3432 3433 3434

	/* Check the communication with the MDIO slave */
	addr = 0x0000;
	val64 = 0x0;
	val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);
	if((val64 == 0xFFFF) || (val64 == 0x0000))
	{
		DBG_PRINT(ERR_DBG, "ERR: MDIO slave access failed - "
			  "Returned %llx\n", (unsigned long long)val64);
		return;
	}

	/* Check for the expecte value of 2040 at PMA address 0x0000 */
	if(val64 != 0x2040)
	{
		DBG_PRINT(ERR_DBG, "Incorrect value at PMA address 0x0000 - ");
		DBG_PRINT(ERR_DBG, "Returned: %llx- Expected: 0x2040\n",
			  (unsigned long long)val64);
		return;
	}

	/* Loading the DOM register to MDIO register */
	addr = 0xA100;
	s2io_mdio_write(MDIO_MMD_PMA_DEV_ADDR, addr, val16, dev);
	val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);

	/* Reading the Alarm flags */
	addr = 0xA070;
	val64 = 0x0;
	val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);

	flag = CHECKBIT(val64, 0x7);
	type = 1;
	s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_transceiver_temp_high,
				&stat_info->xpak_stat.xpak_regs_stat,
				0x0, flag, type);

	if(CHECKBIT(val64, 0x6))
		stat_info->xpak_stat.alarm_transceiver_temp_low++;

	flag = CHECKBIT(val64, 0x3);
	type = 2;
	s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_laser_bias_current_high,
				&stat_info->xpak_stat.xpak_regs_stat,
				0x2, flag, type);

	if(CHECKBIT(val64, 0x2))
		stat_info->xpak_stat.alarm_laser_bias_current_low++;

	flag = CHECKBIT(val64, 0x1);
	type = 3;
	s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_laser_output_power_high,
				&stat_info->xpak_stat.xpak_regs_stat,
				0x4, flag, type);

	if(CHECKBIT(val64, 0x0))
		stat_info->xpak_stat.alarm_laser_output_power_low++;

	/* Reading the Warning flags */
	addr = 0xA074;
	val64 = 0x0;
	val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);

	if(CHECKBIT(val64, 0x7))
		stat_info->xpak_stat.warn_transceiver_temp_high++;

	if(CHECKBIT(val64, 0x6))
		stat_info->xpak_stat.warn_transceiver_temp_low++;

	if(CHECKBIT(val64, 0x3))
		stat_info->xpak_stat.warn_laser_bias_current_high++;

	if(CHECKBIT(val64, 0x2))
		stat_info->xpak_stat.warn_laser_bias_current_low++;

	if(CHECKBIT(val64, 0x1))
		stat_info->xpak_stat.warn_laser_output_power_high++;

	if(CHECKBIT(val64, 0x0))
		stat_info->xpak_stat.warn_laser_output_power_low++;
}

3435
/**
L
Linus Torvalds 已提交
3436
 *  wait_for_cmd_complete - waits for a command to complete.
3437
 *  @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
3438
 *  s2io_nic structure.
3439 3440 3441
 *  Description: Function that waits for a command to Write into RMAC
 *  ADDR DATA registers to be completed and returns either success or
 *  error depending on whether the command was complete or not.
L
Linus Torvalds 已提交
3442 3443 3444 3445
 *  Return value:
 *   SUCCESS on success and FAILURE on failure.
 */

3446 3447
static int wait_for_cmd_complete(void __iomem *addr, u64 busy_bit,
				int bit_state)
L
Linus Torvalds 已提交
3448
{
3449
	int ret = FAILURE, cnt = 0, delay = 1;
L
Linus Torvalds 已提交
3450 3451
	u64 val64;

3452 3453 3454 3455
	if ((bit_state != S2IO_BIT_RESET) && (bit_state != S2IO_BIT_SET))
		return FAILURE;

	do {
A
Ananda Raju 已提交
3456
		val64 = readq(addr);
3457 3458 3459 3460 3461 3462 3463 3464 3465 3466
		if (bit_state == S2IO_BIT_RESET) {
			if (!(val64 & busy_bit)) {
				ret = SUCCESS;
				break;
			}
		} else {
			if (!(val64 & busy_bit)) {
				ret = SUCCESS;
				break;
			}
L
Linus Torvalds 已提交
3467
		}
A
Ananda Raju 已提交
3468 3469

		if(in_interrupt())
3470
			mdelay(delay);
A
Ananda Raju 已提交
3471
		else
3472
			msleep(delay);
A
Ananda Raju 已提交
3473

3474 3475 3476
		if (++cnt >= 10)
			delay = 50;
	} while (cnt < 20);
L
Linus Torvalds 已提交
3477 3478
	return ret;
}
3479 3480 3481 3482 3483 3484 3485 3486 3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497
/*
 * check_pci_device_id - Checks if the device id is supported
 * @id : device id
 * Description: Function to check if the pci device id is supported by driver.
 * Return value: Actual device id if supported else PCI_ANY_ID
 */
static u16 check_pci_device_id(u16 id)
{
	switch (id) {
	case PCI_DEVICE_ID_HERC_WIN:
	case PCI_DEVICE_ID_HERC_UNI:
		return XFRAME_II_DEVICE;
	case PCI_DEVICE_ID_S2IO_UNI:
	case PCI_DEVICE_ID_S2IO_WIN:
		return XFRAME_I_DEVICE;
	default:
		return PCI_ANY_ID;
	}
}
L
Linus Torvalds 已提交
3498

3499 3500
/**
 *  s2io_reset - Resets the card.
L
Linus Torvalds 已提交
3501 3502
 *  @sp : private member of the device structure.
 *  Description: Function to Reset the card. This function then also
3503
 *  restores the previously saved PCI configuration space registers as
L
Linus Torvalds 已提交
3504 3505 3506 3507 3508
 *  the card reset also resets the configuration space.
 *  Return value:
 *  void.
 */

R
Ralf Baechle 已提交
3509
static void s2io_reset(struct s2io_nic * sp)
L
Linus Torvalds 已提交
3510
{
R
Ralf Baechle 已提交
3511
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
3512
	u64 val64;
3513
	u16 subid, pci_cmd;
3514 3515
	int i;
	u16 val16;
3516 3517 3518
	unsigned long long up_cnt, down_cnt, up_time, down_time, reset_cnt;
	unsigned long long mem_alloc_cnt, mem_free_cnt, watchdog_cnt;

3519 3520
	DBG_PRINT(INIT_DBG,"%s - Resetting XFrame card %s\n",
			__FUNCTION__, sp->dev->name);
L
Linus Torvalds 已提交
3521

3522
	/* Back up  the PCI-X CMD reg, dont want to lose MMRBC, OST settings */
3523
	pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, &(pci_cmd));
3524

L
Linus Torvalds 已提交
3525 3526
	val64 = SW_RESET_ALL;
	writeq(val64, &bar0->sw_reset);
A
Ananda Raju 已提交
3527 3528 3529
	if (strstr(sp->product_name, "CX4")) {
		msleep(750);
	}
3530 3531
	msleep(250);
	for (i = 0; i < S2IO_MAX_PCI_CONFIG_SPACE_REINIT; i++) {
L
Linus Torvalds 已提交
3532

3533 3534 3535 3536 3537 3538 3539
		/* Restore the PCI state saved during initialization. */
		pci_restore_state(sp->pdev);
		pci_read_config_word(sp->pdev, 0x2, &val16);
		if (check_pci_device_id(val16) != (u16)PCI_ANY_ID)
			break;
		msleep(200);
	}
L
Linus Torvalds 已提交
3540

3541 3542 3543 3544 3545 3546 3547
	if (check_pci_device_id(val16) == (u16)PCI_ANY_ID) {
		DBG_PRINT(ERR_DBG,"%s SW_Reset failed!\n", __FUNCTION__);
	}

	pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER, pci_cmd);

	s2io_init_pci(sp);
L
Linus Torvalds 已提交
3548

3549 3550 3551
	/* Set swapper to enable I/O register access */
	s2io_set_swapper(sp);

3552 3553 3554
	/* restore mac_addr entries */
	do_s2io_restore_unicast_mc(sp);

3555 3556 3557
	/* Restore the MSIX table entries from local variables */
	restore_xmsi_data(sp);

3558
	/* Clear certain PCI/PCI-X fields after reset */
3559
	if (sp->device_type == XFRAME_II_DEVICE) {
3560
		/* Clear "detected parity error" bit */
3561
		pci_write_config_word(sp->pdev, PCI_STATUS, 0x8000);
3562

3563 3564
		/* Clearing PCIX Ecc status register */
		pci_write_config_dword(sp->pdev, 0x68, 0x7C);
3565

3566
		/* Clearing PCI_STATUS error reflected here */
J
Jiri Slaby 已提交
3567
		writeq(s2BIT(62), &bar0->txpic_int_reg);
3568
	}
3569

3570 3571
	/* Reset device statistics maintained by OS */
	memset(&sp->stats, 0, sizeof (struct net_device_stats));
3572

3573 3574 3575 3576
	up_cnt = sp->mac_control.stats_info->sw_stat.link_up_cnt;
	down_cnt = sp->mac_control.stats_info->sw_stat.link_down_cnt;
	up_time = sp->mac_control.stats_info->sw_stat.link_up_time;
	down_time = sp->mac_control.stats_info->sw_stat.link_down_time;
3577
	reset_cnt = sp->mac_control.stats_info->sw_stat.soft_reset_cnt;
3578 3579 3580 3581
	mem_alloc_cnt = sp->mac_control.stats_info->sw_stat.mem_allocated;
	mem_free_cnt = sp->mac_control.stats_info->sw_stat.mem_freed;
	watchdog_cnt = sp->mac_control.stats_info->sw_stat.watchdog_timer_cnt;
	/* save link up/down time/cnt, reset/memory/watchdog cnt */
3582
	memset(sp->mac_control.stats_info, 0, sizeof(struct stat_block));
3583 3584 3585 3586 3587
	/* restore link up/down time/cnt, reset/memory/watchdog cnt */
	sp->mac_control.stats_info->sw_stat.link_up_cnt = up_cnt;
	sp->mac_control.stats_info->sw_stat.link_down_cnt = down_cnt;
	sp->mac_control.stats_info->sw_stat.link_up_time = up_time;
	sp->mac_control.stats_info->sw_stat.link_down_time = down_time;
3588
	sp->mac_control.stats_info->sw_stat.soft_reset_cnt = reset_cnt;
3589 3590 3591
	sp->mac_control.stats_info->sw_stat.mem_allocated = mem_alloc_cnt;
	sp->mac_control.stats_info->sw_stat.mem_freed = mem_free_cnt;
	sp->mac_control.stats_info->sw_stat.watchdog_timer_cnt = watchdog_cnt;
3592

L
Linus Torvalds 已提交
3593 3594
	/* SXE-002: Configure link and activity LED to turn it off */
	subid = sp->pdev->subsystem_device;
3595 3596
	if (((subid & 0xFF) >= 0x07) &&
	    (sp->device_type == XFRAME_I_DEVICE)) {
L
Linus Torvalds 已提交
3597 3598 3599 3600
		val64 = readq(&bar0->gpio_control);
		val64 |= 0x0000800000000000ULL;
		writeq(val64, &bar0->gpio_control);
		val64 = 0x0411040400000000ULL;
3601
		writeq(val64, (void __iomem *)bar0 + 0x2700);
L
Linus Torvalds 已提交
3602 3603
	}

3604 3605 3606 3607 3608 3609 3610 3611 3612
	/*
	 * Clear spurious ECC interrupts that would have occured on
	 * XFRAME II cards after reset.
	 */
	if (sp->device_type == XFRAME_II_DEVICE) {
		val64 = readq(&bar0->pcc_err_reg);
		writeq(val64, &bar0->pcc_err_reg);
	}

L
Linus Torvalds 已提交
3613 3614 3615 3616
	sp->device_enabled_once = FALSE;
}

/**
3617 3618
 *  s2io_set_swapper - to set the swapper controle on the card
 *  @sp : private member of the device structure,
L
Linus Torvalds 已提交
3619
 *  pointer to the s2io_nic structure.
3620
 *  Description: Function to set the swapper control on the card
L
Linus Torvalds 已提交
3621 3622 3623 3624 3625
 *  correctly depending on the 'endianness' of the system.
 *  Return value:
 *  SUCCESS on success and FAILURE on failure.
 */

R
Ralf Baechle 已提交
3626
static int s2io_set_swapper(struct s2io_nic * sp)
L
Linus Torvalds 已提交
3627 3628
{
	struct net_device *dev = sp->dev;
R
Ralf Baechle 已提交
3629
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
3630 3631
	u64 val64, valt, valr;

3632
	/*
L
Linus Torvalds 已提交
3633 3634 3635 3636 3637 3638 3639 3640 3641 3642 3643 3644 3645 3646 3647 3648 3649 3650 3651 3652 3653 3654 3655 3656 3657 3658 3659 3660 3661 3662 3663 3664 3665 3666 3667 3668 3669 3670 3671 3672 3673 3674 3675 3676 3677 3678 3679 3680 3681 3682 3683
	 * Set proper endian settings and verify the same by reading
	 * the PIF Feed-back register.
	 */

	val64 = readq(&bar0->pif_rd_swapper_fb);
	if (val64 != 0x0123456789ABCDEFULL) {
		int i = 0;
		u64 value[] = { 0xC30000C3C30000C3ULL,   /* FE=1, SE=1 */
				0x8100008181000081ULL,  /* FE=1, SE=0 */
				0x4200004242000042ULL,  /* FE=0, SE=1 */
				0};                     /* FE=0, SE=0 */

		while(i<4) {
			writeq(value[i], &bar0->swapper_ctrl);
			val64 = readq(&bar0->pif_rd_swapper_fb);
			if (val64 == 0x0123456789ABCDEFULL)
				break;
			i++;
		}
		if (i == 4) {
			DBG_PRINT(ERR_DBG, "%s: Endian settings are wrong, ",
				dev->name);
			DBG_PRINT(ERR_DBG, "feedback read %llx\n",
				(unsigned long long) val64);
			return FAILURE;
		}
		valr = value[i];
	} else {
		valr = readq(&bar0->swapper_ctrl);
	}

	valt = 0x0123456789ABCDEFULL;
	writeq(valt, &bar0->xmsi_address);
	val64 = readq(&bar0->xmsi_address);

	if(val64 != valt) {
		int i = 0;
		u64 value[] = { 0x00C3C30000C3C300ULL,  /* FE=1, SE=1 */
				0x0081810000818100ULL,  /* FE=1, SE=0 */
				0x0042420000424200ULL,  /* FE=0, SE=1 */
				0};                     /* FE=0, SE=0 */

		while(i<4) {
			writeq((value[i] | valr), &bar0->swapper_ctrl);
			writeq(valt, &bar0->xmsi_address);
			val64 = readq(&bar0->xmsi_address);
			if(val64 == valt)
				break;
			i++;
		}
		if(i == 4) {
3684
			unsigned long long x = val64;
L
Linus Torvalds 已提交
3685
			DBG_PRINT(ERR_DBG, "Write failed, Xmsi_addr ");
3686
			DBG_PRINT(ERR_DBG, "reads:0x%llx\n", x);
L
Linus Torvalds 已提交
3687 3688 3689 3690 3691 3692 3693
			return FAILURE;
		}
	}
	val64 = readq(&bar0->swapper_ctrl);
	val64 &= 0xFFFF000000000000ULL;

#ifdef  __BIG_ENDIAN
3694 3695
	/*
	 * The device by default set to a big endian format, so a
L
Linus Torvalds 已提交
3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707
	 * big endian driver need not set anything.
	 */
	val64 |= (SWAPPER_CTRL_TXP_FE |
		 SWAPPER_CTRL_TXP_SE |
		 SWAPPER_CTRL_TXD_R_FE |
		 SWAPPER_CTRL_TXD_W_FE |
		 SWAPPER_CTRL_TXF_R_FE |
		 SWAPPER_CTRL_RXD_R_FE |
		 SWAPPER_CTRL_RXD_W_FE |
		 SWAPPER_CTRL_RXF_W_FE |
		 SWAPPER_CTRL_XMSI_FE |
		 SWAPPER_CTRL_STATS_FE | SWAPPER_CTRL_STATS_SE);
3708
	if (sp->config.intr_type == INTA)
3709
		val64 |= SWAPPER_CTRL_XMSI_SE;
L
Linus Torvalds 已提交
3710 3711
	writeq(val64, &bar0->swapper_ctrl);
#else
3712
	/*
L
Linus Torvalds 已提交
3713
	 * Initially we enable all bits to make it accessible by the
3714
	 * driver, then we selectively enable only those bits that
L
Linus Torvalds 已提交
3715 3716 3717 3718 3719 3720 3721 3722 3723 3724 3725 3726 3727 3728 3729 3730
	 * we want to set.
	 */
	val64 |= (SWAPPER_CTRL_TXP_FE |
		 SWAPPER_CTRL_TXP_SE |
		 SWAPPER_CTRL_TXD_R_FE |
		 SWAPPER_CTRL_TXD_R_SE |
		 SWAPPER_CTRL_TXD_W_FE |
		 SWAPPER_CTRL_TXD_W_SE |
		 SWAPPER_CTRL_TXF_R_FE |
		 SWAPPER_CTRL_RXD_R_FE |
		 SWAPPER_CTRL_RXD_R_SE |
		 SWAPPER_CTRL_RXD_W_FE |
		 SWAPPER_CTRL_RXD_W_SE |
		 SWAPPER_CTRL_RXF_W_FE |
		 SWAPPER_CTRL_XMSI_FE |
		 SWAPPER_CTRL_STATS_FE | SWAPPER_CTRL_STATS_SE);
3731
	if (sp->config.intr_type == INTA)
3732
		val64 |= SWAPPER_CTRL_XMSI_SE;
L
Linus Torvalds 已提交
3733 3734 3735 3736
	writeq(val64, &bar0->swapper_ctrl);
#endif
	val64 = readq(&bar0->swapper_ctrl);

3737 3738
	/*
	 * Verifying if endian settings are accurate by reading a
L
Linus Torvalds 已提交
3739 3740 3741 3742 3743 3744 3745 3746 3747 3748 3749 3750 3751 3752 3753
	 * feedback register.
	 */
	val64 = readq(&bar0->pif_rd_swapper_fb);
	if (val64 != 0x0123456789ABCDEFULL) {
		/* Endian settings are incorrect, calls for another dekko. */
		DBG_PRINT(ERR_DBG, "%s: Endian settings are wrong, ",
			  dev->name);
		DBG_PRINT(ERR_DBG, "feedback read %llx\n",
			  (unsigned long long) val64);
		return FAILURE;
	}

	return SUCCESS;
}

R
Ralf Baechle 已提交
3754
static int wait_for_msix_trans(struct s2io_nic *nic, int i)
3755
{
R
Ralf Baechle 已提交
3756
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3757 3758 3759 3760 3761
	u64 val64;
	int ret = 0, cnt = 0;

	do {
		val64 = readq(&bar0->xmsi_access);
J
Jiri Slaby 已提交
3762
		if (!(val64 & s2BIT(15)))
3763 3764 3765 3766 3767 3768 3769 3770 3771 3772 3773 3774
			break;
		mdelay(1);
		cnt++;
	} while(cnt < 5);
	if (cnt == 5) {
		DBG_PRINT(ERR_DBG, "XMSI # %d Access failed\n", i);
		ret = 1;
	}

	return ret;
}

R
Ralf Baechle 已提交
3775
static void restore_xmsi_data(struct s2io_nic *nic)
3776
{
R
Ralf Baechle 已提交
3777
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3778
	u64 val64;
3779 3780 3781 3782 3783
	int i, msix_index;


	if (nic->device_type == XFRAME_I_DEVICE)
		return;
3784

3785
	for (i=0; i < MAX_REQUESTED_MSI_X; i++) {
3786
		msix_index = (i) ? ((i-1) * 8 + 1): 0;
3787 3788
		writeq(nic->msix_info[i].addr, &bar0->xmsi_address);
		writeq(nic->msix_info[i].data, &bar0->xmsi_data);
3789
		val64 = (s2BIT(7) | s2BIT(15) | vBIT(msix_index, 26, 6));
3790
		writeq(val64, &bar0->xmsi_access);
3791
		if (wait_for_msix_trans(nic, msix_index)) {
3792 3793 3794 3795 3796 3797
			DBG_PRINT(ERR_DBG, "failed in %s\n", __FUNCTION__);
			continue;
		}
	}
}

R
Ralf Baechle 已提交
3798
static void store_xmsi_data(struct s2io_nic *nic)
3799
{
R
Ralf Baechle 已提交
3800
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3801
	u64 val64, addr, data;
3802 3803 3804 3805
	int i, msix_index;

	if (nic->device_type == XFRAME_I_DEVICE)
		return;
3806 3807

	/* Store and display */
3808
	for (i=0; i < MAX_REQUESTED_MSI_X; i++) {
3809 3810
		msix_index = (i) ? ((i-1) * 8 + 1): 0;
		val64 = (s2BIT(15) | vBIT(msix_index, 26, 6));
3811
		writeq(val64, &bar0->xmsi_access);
3812
		if (wait_for_msix_trans(nic, msix_index)) {
3813 3814 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824
			DBG_PRINT(ERR_DBG, "failed in %s\n", __FUNCTION__);
			continue;
		}
		addr = readq(&bar0->xmsi_address);
		data = readq(&bar0->xmsi_data);
		if (addr && data) {
			nic->msix_info[i].addr = addr;
			nic->msix_info[i].data = data;
		}
	}
}

R
Ralf Baechle 已提交
3825
static int s2io_enable_msi_x(struct s2io_nic *nic)
3826
{
R
Ralf Baechle 已提交
3827
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
3828
	u64 rx_mat;
3829 3830 3831
	u16 msi_control; /* Temp variable */
	int ret, i, j, msix_indx = 1;

3832
	nic->entries = kmalloc(nic->num_entries * sizeof(struct msix_entry),
3833
			       GFP_KERNEL);
3834
	if (!nic->entries) {
3835 3836
		DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n", \
			__FUNCTION__);
3837
		nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
3838 3839
		return -ENOMEM;
	}
3840
	nic->mac_control.stats_info->sw_stat.mem_allocated
3841 3842 3843
		+= (nic->num_entries * sizeof(struct msix_entry));

	memset(nic->entries, 0, nic->num_entries * sizeof(struct msix_entry));
3844 3845

	nic->s2io_entries =
3846
		kmalloc(nic->num_entries * sizeof(struct s2io_msix_entry),
3847
				   GFP_KERNEL);
3848
	if (!nic->s2io_entries) {
3849
		DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n",
3850
			__FUNCTION__);
3851
		nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
3852
		kfree(nic->entries);
3853
		nic->mac_control.stats_info->sw_stat.mem_freed
3854
			+= (nic->num_entries * sizeof(struct msix_entry));
3855 3856
		return -ENOMEM;
	}
3857
	 nic->mac_control.stats_info->sw_stat.mem_allocated
3858 3859 3860
		+= (nic->num_entries * sizeof(struct s2io_msix_entry));
	memset(nic->s2io_entries, 0,
		nic->num_entries * sizeof(struct s2io_msix_entry));
3861

3862 3863 3864 3865 3866 3867
	nic->entries[0].entry = 0;
	nic->s2io_entries[0].entry = 0;
	nic->s2io_entries[0].in_use = MSIX_FLG;
	nic->s2io_entries[0].type = MSIX_ALARM_TYPE;
	nic->s2io_entries[0].arg = &nic->mac_control.fifos;

3868 3869 3870
	for (i = 1; i < nic->num_entries; i++) {
		nic->entries[i].entry = ((i - 1) * 8) + 1;
		nic->s2io_entries[i].entry = ((i - 1) * 8) + 1;
3871 3872 3873 3874
		nic->s2io_entries[i].arg = NULL;
		nic->s2io_entries[i].in_use = 0;
	}

3875
	rx_mat = readq(&bar0->rx_mat);
3876
	for (j = 0; j < nic->config.rx_ring_num; j++) {
3877
		rx_mat |= RX_MAT_SET(j, msix_indx);
3878 3879 3880 3881
		nic->s2io_entries[j+1].arg = &nic->mac_control.rings[j];
		nic->s2io_entries[j+1].type = MSIX_RING_TYPE;
		nic->s2io_entries[j+1].in_use = MSIX_FLG;
		msix_indx += 8;
3882
	}
3883
	writeq(rx_mat, &bar0->rx_mat);
3884
	readq(&bar0->rx_mat);
3885

3886
	ret = pci_enable_msix(nic->pdev, nic->entries, nic->num_entries);
A
Ananda Raju 已提交
3887
	/* We fail init if error or we get less vectors than min required */
3888 3889 3890
	if (ret) {
		DBG_PRINT(ERR_DBG, "%s: Enabling MSIX failed\n", nic->dev->name);
		kfree(nic->entries);
3891
		nic->mac_control.stats_info->sw_stat.mem_freed
3892
			+= (nic->num_entries * sizeof(struct msix_entry));
3893
		kfree(nic->s2io_entries);
3894
		nic->mac_control.stats_info->sw_stat.mem_freed
3895
			+= (nic->num_entries * sizeof(struct s2io_msix_entry));
3896 3897 3898 3899 3900 3901 3902 3903 3904 3905 3906 3907 3908 3909 3910 3911
		nic->entries = NULL;
		nic->s2io_entries = NULL;
		return -ENOMEM;
	}

	/*
	 * To enable MSI-X, MSI also needs to be enabled, due to a bug
	 * in the herc NIC. (Temp change, needs to be removed later)
	 */
	pci_read_config_word(nic->pdev, 0x42, &msi_control);
	msi_control |= 0x1; /* Enable MSI */
	pci_write_config_word(nic->pdev, 0x42, msi_control);

	return 0;
}

3912
/* Handle software interrupt used during MSI(X) test */
3913
static irqreturn_t s2io_test_intr(int irq, void *dev_id)
3914 3915 3916 3917 3918 3919 3920 3921 3922 3923
{
	struct s2io_nic *sp = dev_id;

	sp->msi_detected = 1;
	wake_up(&sp->msi_wait);

	return IRQ_HANDLED;
}

/* Test interrupt path by forcing a a software IRQ */
3924
static int s2io_test_msi(struct s2io_nic *sp)
3925 3926 3927 3928 3929 3930 3931 3932 3933 3934 3935 3936 3937 3938 3939 3940 3941 3942 3943 3944 3945 3946 3947 3948 3949 3950 3951
{
	struct pci_dev *pdev = sp->pdev;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
	int err;
	u64 val64, saved64;

	err = request_irq(sp->entries[1].vector, s2io_test_intr, 0,
			sp->name, sp);
	if (err) {
		DBG_PRINT(ERR_DBG, "%s: PCI %s: cannot assign irq %d\n",
		       sp->dev->name, pci_name(pdev), pdev->irq);
		return err;
	}

	init_waitqueue_head (&sp->msi_wait);
	sp->msi_detected = 0;

	saved64 = val64 = readq(&bar0->scheduled_int_ctrl);
	val64 |= SCHED_INT_CTRL_ONE_SHOT;
	val64 |= SCHED_INT_CTRL_TIMER_EN;
	val64 |= SCHED_INT_CTRL_INT2MSI(1);
	writeq(val64, &bar0->scheduled_int_ctrl);

	wait_event_timeout(sp->msi_wait, sp->msi_detected, HZ/10);

	if (!sp->msi_detected) {
		/* MSI(X) test failed, go back to INTx mode */
3952
		DBG_PRINT(ERR_DBG, "%s: PCI %s: No interrupt was generated "
3953 3954 3955 3956 3957 3958 3959 3960 3961 3962 3963 3964
			"using MSI(X) during test\n", sp->dev->name,
			pci_name(pdev));

		err = -EOPNOTSUPP;
	}

	free_irq(sp->entries[1].vector, sp);

	writeq(saved64, &bar0->scheduled_int_ctrl);

	return err;
}
3965 3966 3967 3968 3969 3970

static void remove_msix_isr(struct s2io_nic *sp)
{
	int i;
	u16 msi_control;

3971
	for (i = 0; i < sp->num_entries; i++) {
3972 3973 3974 3975 3976 3977 3978 3979 3980 3981 3982 3983 3984 3985 3986 3987 3988 3989 3990 3991 3992 3993 3994 3995 3996 3997 3998
		if (sp->s2io_entries[i].in_use ==
			MSIX_REGISTERED_SUCCESS) {
			int vector = sp->entries[i].vector;
			void *arg = sp->s2io_entries[i].arg;
			free_irq(vector, arg);
		}
	}

	kfree(sp->entries);
	kfree(sp->s2io_entries);
	sp->entries = NULL;
	sp->s2io_entries = NULL;

	pci_read_config_word(sp->pdev, 0x42, &msi_control);
	msi_control &= 0xFFFE; /* Disable MSI */
	pci_write_config_word(sp->pdev, 0x42, msi_control);

	pci_disable_msix(sp->pdev);
}

static void remove_inta_isr(struct s2io_nic *sp)
{
	struct net_device *dev = sp->dev;

	free_irq(sp->pdev->irq, dev);
}

L
Linus Torvalds 已提交
3999 4000 4001 4002
/* ********************************************************* *
 * Functions defined below concern the OS part of the driver *
 * ********************************************************* */

4003
/**
L
Linus Torvalds 已提交
4004 4005 4006 4007 4008
 *  s2io_open - open entry point of the driver
 *  @dev : pointer to the device structure.
 *  Description:
 *  This function is the open entry point of the driver. It mainly calls a
 *  function to allocate Rx buffers and inserts them into the buffer
4009
 *  descriptors and then enables the Rx part of the NIC.
L
Linus Torvalds 已提交
4010 4011 4012 4013 4014
 *  Return value:
 *  0 on success and an appropriate (-)ve integer as defined in errno.h
 *   file on failure.
 */

4015
static int s2io_open(struct net_device *dev)
L
Linus Torvalds 已提交
4016
{
R
Ralf Baechle 已提交
4017
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
4018 4019
	int err = 0;

4020 4021
	/*
	 * Make sure you have link off by default every time
L
Linus Torvalds 已提交
4022 4023 4024
	 * Nic is initialized
	 */
	netif_carrier_off(dev);
4025
	sp->last_link_state = 0;
L
Linus Torvalds 已提交
4026 4027

	/* Initialize H/W and enable interrupts */
A
Ananda Raju 已提交
4028 4029
	err = s2io_card_up(sp);
	if (err) {
L
Linus Torvalds 已提交
4030 4031
		DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
			  dev->name);
A
Ananda Raju 已提交
4032
		goto hw_init_failed;
L
Linus Torvalds 已提交
4033 4034
	}

4035
	if (do_s2io_prog_unicast(dev, dev->dev_addr) == FAILURE) {
L
Linus Torvalds 已提交
4036
		DBG_PRINT(ERR_DBG, "Set Mac Address Failed\n");
A
Ananda Raju 已提交
4037
		s2io_card_down(sp);
4038
		err = -ENODEV;
A
Ananda Raju 已提交
4039
		goto hw_init_failed;
L
Linus Torvalds 已提交
4040
	}
4041
	s2io_start_all_tx_queue(sp);
L
Linus Torvalds 已提交
4042
	return 0;
4043 4044

hw_init_failed:
4045
	if (sp->config.intr_type == MSI_X) {
4046
		if (sp->entries) {
4047
			kfree(sp->entries);
4048
			sp->mac_control.stats_info->sw_stat.mem_freed
4049
			+= (sp->num_entries * sizeof(struct msix_entry));
4050 4051
		}
		if (sp->s2io_entries) {
4052
			kfree(sp->s2io_entries);
4053
			sp->mac_control.stats_info->sw_stat.mem_freed
4054
			+= (sp->num_entries * sizeof(struct s2io_msix_entry));
4055
		}
4056
	}
4057
	return err;
L
Linus Torvalds 已提交
4058 4059 4060 4061 4062 4063 4064 4065 4066 4067 4068 4069 4070 4071 4072
}

/**
 *  s2io_close -close entry point of the driver
 *  @dev : device pointer.
 *  Description:
 *  This is the stop entry point of the driver. It needs to undo exactly
 *  whatever was done by the open entry point,thus it's usually referred to
 *  as the close function.Among other things this function mainly stops the
 *  Rx side of the NIC and frees all the Rx buffers in the Rx rings.
 *  Return value:
 *  0 on success and an appropriate (-)ve integer as defined in errno.h
 *  file on failure.
 */

4073
static int s2io_close(struct net_device *dev)
L
Linus Torvalds 已提交
4074
{
R
Ralf Baechle 已提交
4075
	struct s2io_nic *sp = dev->priv;
4076 4077 4078
	struct config_param *config = &sp->config;
	u64 tmp64;
	int offset;
4079

4080 4081 4082 4083 4084 4085
	/* Return if the device is already closed               *
	*  Can happen when s2io_card_up failed in change_mtu    *
	*/
	if (!is_s2io_card_up(sp))
		return 0;

4086
	s2io_stop_all_tx_queue(sp);
4087 4088 4089 4090 4091 4092 4093
	/* delete all populated mac entries */
	for (offset = 1; offset < config->max_mc_addr; offset++) {
		tmp64 = do_s2io_read_unicast_mc(sp, offset);
		if (tmp64 != S2IO_DISABLE_MAC_ENTRY)
			do_s2io_delete_unicast_mc(sp, tmp64);
	}

A
Ananda Raju 已提交
4094
	s2io_card_down(sp);
4095

L
Linus Torvalds 已提交
4096 4097 4098 4099 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 4110 4111
	return 0;
}

/**
 *  s2io_xmit - Tx entry point of te driver
 *  @skb : the socket buffer containing the Tx data.
 *  @dev : device pointer.
 *  Description :
 *  This function is the Tx entry point of the driver. S2IO NIC supports
 *  certain protocol assist features on Tx side, namely  CSO, S/G, LSO.
 *  NOTE: when device cant queue the pkt,just the trans_start variable will
 *  not be upadted.
 *  Return value:
 *  0 on success & 1 on failure.
 */

4112
static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
L
Linus Torvalds 已提交
4113
{
R
Ralf Baechle 已提交
4114
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
4115 4116
	u16 frg_cnt, frg_len, i, queue, queue_len, put_off, get_off;
	register u64 val64;
R
Ralf Baechle 已提交
4117 4118
	struct TxD *txdp;
	struct TxFIFO_element __iomem *tx_fifo;
4119
	unsigned long flags = 0;
4120
	u16 vlan_tag = 0;
4121
	struct fifo_info *fifo = NULL;
R
Ralf Baechle 已提交
4122
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
4123
	struct config_param *config;
4124
	int do_spin_lock = 1;
4125
	int offload_type;
4126
	int enable_per_list_interrupt = 0;
4127
	struct swStat *stats = &sp->mac_control.stats_info->sw_stat;
L
Linus Torvalds 已提交
4128 4129 4130 4131

	mac_control = &sp->mac_control;
	config = &sp->config;

4132
	DBG_PRINT(TX_DBG, "%s: In Neterion Tx routine\n", dev->name);
4133 4134 4135 4136 4137

	if (unlikely(skb->len <= 0)) {
		DBG_PRINT(TX_DBG, "%s:Buffer has no data..\n", dev->name);
		dev_kfree_skb_any(skb);
		return 0;
4138
	}
4139

4140
	if (!is_s2io_card_up(sp)) {
4141
		DBG_PRINT(TX_DBG, "%s: Card going down for reset\n",
L
Linus Torvalds 已提交
4142
			  dev->name);
4143 4144
		dev_kfree_skb(skb);
		return 0;
L
Linus Torvalds 已提交
4145 4146 4147
	}

	queue = 0;
4148
	if (sp->vlgrp && vlan_tx_tag_present(skb))
4149
		vlan_tag = vlan_tx_tag_get(skb);
4150 4151 4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167 4168 4169 4170 4171 4172 4173 4174 4175 4176 4177 4178 4179 4180 4181 4182 4183 4184 4185
	if (sp->config.tx_steering_type == TX_DEFAULT_STEERING) {
		if (skb->protocol == htons(ETH_P_IP)) {
			struct iphdr *ip;
			struct tcphdr *th;
			ip = ip_hdr(skb);

			if ((ip->frag_off & htons(IP_OFFSET|IP_MF)) == 0) {
				th = (struct tcphdr *)(((unsigned char *)ip) +
						ip->ihl*4);

				if (ip->protocol == IPPROTO_TCP) {
					queue_len = sp->total_tcp_fifos;
					queue = (ntohs(th->source) +
							ntohs(th->dest)) &
					    sp->fifo_selector[queue_len - 1];
					if (queue >= queue_len)
						queue = queue_len - 1;
				} else if (ip->protocol == IPPROTO_UDP) {
					queue_len = sp->total_udp_fifos;
					queue = (ntohs(th->source) +
							ntohs(th->dest)) &
					    sp->fifo_selector[queue_len - 1];
					if (queue >= queue_len)
						queue = queue_len - 1;
					queue += sp->udp_fifo_idx;
					if (skb->len > 1024)
						enable_per_list_interrupt = 1;
					do_spin_lock = 0;
				}
			}
		}
	} else if (sp->config.tx_steering_type == TX_PRIORITY_STEERING)
		/* get fifo number based on skb->priority value */
		queue = config->fifo_mapping
					[skb->priority & (MAX_TX_FIFOS - 1)];
	fifo = &mac_control->fifos[queue];
4186

4187 4188 4189 4190 4191 4192
	if (do_spin_lock)
		spin_lock_irqsave(&fifo->tx_lock, flags);
	else {
		if (unlikely(!spin_trylock_irqsave(&fifo->tx_lock, flags)))
			return NETDEV_TX_LOCKED;
	}
4193

4194 4195 4196 4197 4198 4199 4200 4201 4202 4203 4204 4205 4206 4207 4208
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
	if (sp->config.multiq) {
		if (__netif_subqueue_stopped(dev, fifo->fifo_no)) {
			spin_unlock_irqrestore(&fifo->tx_lock, flags);
			return NETDEV_TX_BUSY;
		}
	} else
#endif
	if (unlikely(fifo->queue_state == FIFO_QUEUE_STOP)) {
		if (netif_queue_stopped(dev)) {
			spin_unlock_irqrestore(&fifo->tx_lock, flags);
			return NETDEV_TX_BUSY;
		}
	}

4209 4210 4211
	put_off = (u16) fifo->tx_curr_put_info.offset;
	get_off = (u16) fifo->tx_curr_get_info.offset;
	txdp = (struct TxD *) fifo->list_info[put_off].list_virt_addr;
4212

4213
	queue_len = fifo->tx_curr_put_info.fifo_len + 1;
L
Linus Torvalds 已提交
4214
	/* Avoid "put" pointer going beyond "get" pointer */
4215 4216
	if (txdp->Host_Control ||
		   ((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
4217
		DBG_PRINT(TX_DBG, "Error in xmit, No free TXDs.\n");
4218
		s2io_stop_tx_queue(sp, fifo->fifo_no);
L
Linus Torvalds 已提交
4219
		dev_kfree_skb(skb);
4220
		spin_unlock_irqrestore(&fifo->tx_lock, flags);
L
Linus Torvalds 已提交
4221 4222
		return 0;
	}
4223

4224 4225
	offload_type = s2io_offload_type(skb);
	if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
L
Linus Torvalds 已提交
4226
		txdp->Control_1 |= TXD_TCP_LSO_EN;
4227
		txdp->Control_1 |= TXD_TCP_LSO_MSS(s2io_tcp_mss(skb));
L
Linus Torvalds 已提交
4228
	}
4229
	if (skb->ip_summed == CHECKSUM_PARTIAL) {
L
Linus Torvalds 已提交
4230 4231 4232 4233
		txdp->Control_2 |=
		    (TXD_TX_CKO_IPV4_EN | TXD_TX_CKO_TCP_EN |
		     TXD_TX_CKO_UDP_EN);
	}
A
Ananda Raju 已提交
4234 4235
	txdp->Control_1 |= TXD_GATHER_CODE_FIRST;
	txdp->Control_1 |= TXD_LIST_OWN_XENA;
4236
	txdp->Control_2 |= TXD_INT_NUMBER(fifo->fifo_no);
4237 4238 4239
	if (enable_per_list_interrupt)
		if (put_off & (queue_len >> 5))
			txdp->Control_2 |= TXD_INT_TYPE_PER_LIST;
4240
	if (vlan_tag) {
4241 4242 4243 4244
		txdp->Control_2 |= TXD_VLAN_ENABLE;
		txdp->Control_2 |= TXD_VLAN_TAG(vlan_tag);
	}

A
Ananda Raju 已提交
4245
	frg_len = skb->len - skb->data_len;
4246
	if (offload_type == SKB_GSO_UDP) {
A
Ananda Raju 已提交
4247 4248
		int ufo_size;

4249
		ufo_size = s2io_udp_mss(skb);
A
Ananda Raju 已提交
4250 4251 4252 4253 4254
		ufo_size &= ~7;
		txdp->Control_1 |= TXD_UFO_EN;
		txdp->Control_1 |= TXD_UFO_MSS(ufo_size);
		txdp->Control_1 |= TXD_BUFFER0_SIZE(8);
#ifdef __BIG_ENDIAN
A
Al Viro 已提交
4255
		/* both variants do cpu_to_be64(be32_to_cpu(...)) */
4256
		fifo->ufo_in_band_v[put_off] =
A
Al Viro 已提交
4257
				(__force u64)skb_shinfo(skb)->ip6_frag_id;
A
Ananda Raju 已提交
4258
#else
4259
		fifo->ufo_in_band_v[put_off] =
A
Al Viro 已提交
4260
				(__force u64)skb_shinfo(skb)->ip6_frag_id << 32;
A
Ananda Raju 已提交
4261
#endif
4262
		txdp->Host_Control = (unsigned long)fifo->ufo_in_band_v;
A
Ananda Raju 已提交
4263
		txdp->Buffer_Pointer = pci_map_single(sp->pdev,
4264
					fifo->ufo_in_band_v,
A
Ananda Raju 已提交
4265
					sizeof(u64), PCI_DMA_TODEVICE);
4266 4267 4268
		if((txdp->Buffer_Pointer == 0) ||
			(txdp->Buffer_Pointer == DMA_ERROR_CODE))
			goto pci_map_failed;
A
Ananda Raju 已提交
4269 4270
		txdp++;
	}
L
Linus Torvalds 已提交
4271

A
Ananda Raju 已提交
4272 4273
	txdp->Buffer_Pointer = pci_map_single
	    (sp->pdev, skb->data, frg_len, PCI_DMA_TODEVICE);
4274 4275 4276 4277
	if((txdp->Buffer_Pointer == 0) ||
		(txdp->Buffer_Pointer == DMA_ERROR_CODE))
		goto pci_map_failed;

A
Ananda Raju 已提交
4278 4279
	txdp->Host_Control = (unsigned long) skb;
	txdp->Control_1 |= TXD_BUFFER0_SIZE(frg_len);
4280
	if (offload_type == SKB_GSO_UDP)
A
Ananda Raju 已提交
4281 4282 4283
		txdp->Control_1 |= TXD_UFO_EN;

	frg_cnt = skb_shinfo(skb)->nr_frags;
L
Linus Torvalds 已提交
4284 4285 4286
	/* For fragmented SKB. */
	for (i = 0; i < frg_cnt; i++) {
		skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
4287 4288 4289
		/* A '0' length fragment will be ignored */
		if (!frag->size)
			continue;
L
Linus Torvalds 已提交
4290 4291 4292 4293
		txdp++;
		txdp->Buffer_Pointer = (u64) pci_map_page
		    (sp->pdev, frag->page, frag->page_offset,
		     frag->size, PCI_DMA_TODEVICE);
4294
		txdp->Control_1 = TXD_BUFFER0_SIZE(frag->size);
4295
		if (offload_type == SKB_GSO_UDP)
A
Ananda Raju 已提交
4296
			txdp->Control_1 |= TXD_UFO_EN;
L
Linus Torvalds 已提交
4297 4298 4299
	}
	txdp->Control_1 |= TXD_GATHER_CODE_LAST;

4300
	if (offload_type == SKB_GSO_UDP)
A
Ananda Raju 已提交
4301 4302
		frg_cnt++; /* as Txd0 was used for inband header */

L
Linus Torvalds 已提交
4303
	tx_fifo = mac_control->tx_FIFO_start[queue];
4304
	val64 = fifo->list_info[put_off].list_phy_addr;
L
Linus Torvalds 已提交
4305 4306 4307 4308
	writeq(val64, &tx_fifo->TxDL_Pointer);

	val64 = (TX_FIFO_LAST_TXD_NUM(frg_cnt) | TX_FIFO_FIRST_LIST |
		 TX_FIFO_LAST_LIST);
4309
	if (offload_type)
A
Ananda Raju 已提交
4310
		val64 |= TX_FIFO_SPECIAL_FUNC;
4311

L
Linus Torvalds 已提交
4312 4313
	writeq(val64, &tx_fifo->List_Control);

4314 4315
	mmiowb();

L
Linus Torvalds 已提交
4316
	put_off++;
4317
	if (put_off == fifo->tx_curr_put_info.fifo_len + 1)
4318
		put_off = 0;
4319
	fifo->tx_curr_put_info.offset = put_off;
L
Linus Torvalds 已提交
4320 4321

	/* Avoid "put" pointer going beyond "get" pointer */
4322
	if (((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
4323
		sp->mac_control.stats_info->sw_stat.fifo_full_cnt++;
L
Linus Torvalds 已提交
4324 4325 4326
		DBG_PRINT(TX_DBG,
			  "No free TxDs for xmit, Put: 0x%x Get:0x%x\n",
			  put_off, get_off);
4327
		s2io_stop_tx_queue(sp, fifo->fifo_no);
L
Linus Torvalds 已提交
4328
	}
4329
	mac_control->stats_info->sw_stat.mem_allocated += skb->truesize;
L
Linus Torvalds 已提交
4330
	dev->trans_start = jiffies;
4331
	spin_unlock_irqrestore(&fifo->tx_lock, flags);
L
Linus Torvalds 已提交
4332

4333 4334 4335
	if (sp->config.intr_type == MSI_X)
		tx_intr_handler(fifo);

4336 4337 4338
	return 0;
pci_map_failed:
	stats->pci_map_fail_cnt++;
4339
	s2io_stop_tx_queue(sp, fifo->fifo_no);
4340 4341
	stats->mem_freed += skb->truesize;
	dev_kfree_skb(skb);
4342
	spin_unlock_irqrestore(&fifo->tx_lock, flags);
L
Linus Torvalds 已提交
4343 4344 4345
	return 0;
}

4346 4347 4348
static void
s2io_alarm_handle(unsigned long data)
{
R
Ralf Baechle 已提交
4349
	struct s2io_nic *sp = (struct s2io_nic *)data;
4350
	struct net_device *dev = sp->dev;
4351

4352
	s2io_handle_errors(dev);
4353 4354 4355
	mod_timer(&sp->alarm_timer, jiffies + HZ / 2);
}

4356
static irqreturn_t s2io_msix_ring_handle(int irq, void *dev_id)
4357
{
R
Ralf Baechle 已提交
4358 4359
	struct ring_info *ring = (struct ring_info *)dev_id;
	struct s2io_nic *sp = ring->nic;
4360 4361
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
	struct net_device *dev = sp->dev;
4362

4363
	if (unlikely(!is_s2io_card_up(sp)))
4364 4365
		return IRQ_HANDLED;

4366 4367 4368 4369 4370 4371 4372 4373 4374 4375 4376 4377 4378
	if (sp->config.napi) {
		u8 *addr = NULL, val8 = 0;

		addr = (u8 *)&bar0->xmsi_mask_reg;
		addr += (7 - ring->ring_no);
		val8 = (ring->ring_no == 0) ? 0x7f : 0xff;
		writeb(val8, addr);
		val8 = readb(addr);
		netif_rx_schedule(dev, &ring->napi);
	} else {
		rx_intr_handler(ring, 0);
		s2io_chk_rx_buffers(ring);
	}
4379

4380 4381 4382
	return IRQ_HANDLED;
}

4383
static irqreturn_t s2io_msix_fifo_handle(int irq, void *dev_id)
4384
{
4385 4386 4387 4388 4389 4390
	int i;
	struct fifo_info *fifos = (struct fifo_info *)dev_id;
	struct s2io_nic *sp = fifos->nic;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
	struct config_param *config  = &sp->config;
	u64 reason;
4391

4392 4393 4394 4395 4396 4397
	if (unlikely(!is_s2io_card_up(sp)))
		return IRQ_NONE;

	reason = readq(&bar0->general_int_status);
	if (unlikely(reason == S2IO_MINUS_ONE))
		/* Nothing much can be done. Get out */
4398 4399
		return IRQ_HANDLED;

4400 4401 4402 4403 4404 4405 4406 4407 4408 4409 4410
	writeq(S2IO_MINUS_ONE, &bar0->general_int_mask);

	if (reason & GEN_INTR_TXTRAFFIC)
		writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int);

	for (i = 0; i < config->tx_fifo_num; i++)
		tx_intr_handler(&fifos[i]);

	writeq(sp->general_int_mask, &bar0->general_int_mask);
	readl(&bar0->general_int_status);

4411 4412
	return IRQ_HANDLED;
}
4413

R
Ralf Baechle 已提交
4414
static void s2io_txpic_intr_handle(struct s2io_nic *sp)
4415
{
R
Ralf Baechle 已提交
4416
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
4417 4418 4419 4420 4421 4422 4423
	u64 val64;

	val64 = readq(&bar0->pic_int_status);
	if (val64 & PIC_INT_GPIO) {
		val64 = readq(&bar0->gpio_int_reg);
		if ((val64 & GPIO_INT_REG_LINK_DOWN) &&
		    (val64 & GPIO_INT_REG_LINK_UP)) {
A
Ananda Raju 已提交
4424 4425 4426 4427
			/*
			 * This is unstable state so clear both up/down
			 * interrupt and adapter to re-evaluate the link state.
			 */
4428 4429 4430 4431
			val64 |=  GPIO_INT_REG_LINK_DOWN;
			val64 |= GPIO_INT_REG_LINK_UP;
			writeq(val64, &bar0->gpio_int_reg);
			val64 = readq(&bar0->gpio_int_mask);
A
Ananda Raju 已提交
4432 4433
			val64 &= ~(GPIO_INT_MASK_LINK_UP |
				   GPIO_INT_MASK_LINK_DOWN);
4434 4435
			writeq(val64, &bar0->gpio_int_mask);
		}
A
Ananda Raju 已提交
4436 4437 4438
		else if (val64 & GPIO_INT_REG_LINK_UP) {
			val64 = readq(&bar0->adapter_status);
				/* Enable Adapter */
4439 4440 4441 4442 4443 4444 4445
			val64 = readq(&bar0->adapter_control);
			val64 |= ADAPTER_CNTL_EN;
			writeq(val64, &bar0->adapter_control);
			val64 |= ADAPTER_LED_ON;
			writeq(val64, &bar0->adapter_control);
			if (!sp->device_enabled_once)
				sp->device_enabled_once = 1;
A
Ananda Raju 已提交
4446

4447 4448 4449 4450 4451 4452 4453 4454 4455
			s2io_link(sp, LINK_UP);
			/*
			 * unmask link down interrupt and mask link-up
			 * intr
			 */
			val64 = readq(&bar0->gpio_int_mask);
			val64 &= ~GPIO_INT_MASK_LINK_DOWN;
			val64 |= GPIO_INT_MASK_LINK_UP;
			writeq(val64, &bar0->gpio_int_mask);
A
Ananda Raju 已提交
4456 4457 4458

		}else if (val64 & GPIO_INT_REG_LINK_DOWN) {
			val64 = readq(&bar0->adapter_status);
4459 4460 4461 4462 4463 4464
			s2io_link(sp, LINK_DOWN);
			/* Link is down so unmaks link up interrupt */
			val64 = readq(&bar0->gpio_int_mask);
			val64 &= ~GPIO_INT_MASK_LINK_UP;
			val64 |= GPIO_INT_MASK_LINK_DOWN;
			writeq(val64, &bar0->gpio_int_mask);
4465 4466 4467 4468 4469

			/* turn off LED */
			val64 = readq(&bar0->adapter_control);
			val64 = val64 &(~ADAPTER_LED_ON);
			writeq(val64, &bar0->adapter_control);
4470 4471
		}
	}
A
Ananda Raju 已提交
4472
	val64 = readq(&bar0->gpio_int_mask);
4473 4474
}

4475 4476 4477 4478 4479 4480 4481 4482 4483 4484
/**
 *  do_s2io_chk_alarm_bit - Check for alarm and incrment the counter
 *  @value: alarm bits
 *  @addr: address value
 *  @cnt: counter variable
 *  Description: Check for alarm and increment the counter
 *  Return Value:
 *  1 - if alarm bit set
 *  0 - if alarm bit is not set
 */
4485
static int do_s2io_chk_alarm_bit(u64 value, void __iomem * addr,
4486 4487 4488 4489 4490 4491 4492 4493 4494 4495 4496 4497 4498 4499 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517
			  unsigned long long *cnt)
{
	u64 val64;
	val64 = readq(addr);
	if ( val64 & value ) {
		writeq(val64, addr);
		(*cnt)++;
		return 1;
	}
	return 0;

}

/**
 *  s2io_handle_errors - Xframe error indication handler
 *  @nic: device private variable
 *  Description: Handle alarms such as loss of link, single or
 *  double ECC errors, critical and serious errors.
 *  Return Value:
 *  NONE
 */
static void s2io_handle_errors(void * dev_id)
{
	struct net_device *dev = (struct net_device *) dev_id;
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
	u64 temp64 = 0,val64=0;
	int i = 0;

	struct swStat *sw_stat = &sp->mac_control.stats_info->sw_stat;
	struct xpakStat *stats = &sp->mac_control.stats_info->xpak_stat;

4518
	if (!is_s2io_card_up(sp))
4519 4520 4521 4522 4523 4524 4525 4526 4527 4528 4529 4530 4531 4532 4533 4534 4535 4536 4537 4538 4539 4540 4541 4542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555 4556 4557 4558 4559 4560 4561 4562 4563 4564 4565 4566 4567 4568 4569 4570 4571 4572 4573 4574 4575 4576 4577 4578 4579 4580 4581 4582 4583 4584 4585 4586 4587 4588 4589 4590 4591 4592 4593 4594 4595 4596 4597 4598 4599 4600 4601 4602 4603 4604 4605 4606 4607 4608 4609 4610 4611 4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622 4623 4624 4625 4626 4627 4628 4629 4630 4631 4632 4633 4634 4635 4636 4637 4638 4639 4640 4641 4642 4643 4644 4645 4646 4647 4648 4649 4650 4651 4652 4653 4654 4655 4656 4657 4658 4659 4660 4661 4662 4663 4664 4665 4666 4667 4668 4669 4670 4671 4672 4673 4674 4675 4676 4677 4678 4679 4680 4681 4682 4683 4684 4685 4686 4687 4688 4689 4690 4691 4692 4693 4694 4695 4696 4697 4698 4699 4700 4701 4702 4703 4704 4705 4706 4707 4708 4709 4710 4711 4712 4713 4714 4715 4716 4717 4718 4719 4720 4721 4722 4723 4724 4725 4726 4727 4728 4729 4730 4731 4732 4733 4734 4735 4736 4737 4738 4739 4740 4741 4742 4743 4744 4745 4746 4747 4748 4749 4750 4751 4752 4753 4754
		return;

	if (pci_channel_offline(sp->pdev))
		return;

	memset(&sw_stat->ring_full_cnt, 0,
		sizeof(sw_stat->ring_full_cnt));

	/* Handling the XPAK counters update */
	if(stats->xpak_timer_count < 72000) {
		/* waiting for an hour */
		stats->xpak_timer_count++;
	} else {
		s2io_updt_xpak_counter(dev);
		/* reset the count to zero */
		stats->xpak_timer_count = 0;
	}

	/* Handling link status change error Intr */
	if (s2io_link_fault_indication(sp) == MAC_RMAC_ERR_TIMER) {
		val64 = readq(&bar0->mac_rmac_err_reg);
		writeq(val64, &bar0->mac_rmac_err_reg);
		if (val64 & RMAC_LINK_STATE_CHANGE_INT)
			schedule_work(&sp->set_link_task);
	}

	/* In case of a serious error, the device will be Reset. */
	if (do_s2io_chk_alarm_bit(SERR_SOURCE_ANY, &bar0->serr_source,
				&sw_stat->serious_err_cnt))
		goto reset;

	/* Check for data parity error */
	if (do_s2io_chk_alarm_bit(GPIO_INT_REG_DP_ERR_INT, &bar0->gpio_int_reg,
				&sw_stat->parity_err_cnt))
		goto reset;

	/* Check for ring full counter */
	if (sp->device_type == XFRAME_II_DEVICE) {
		val64 = readq(&bar0->ring_bump_counter1);
		for (i=0; i<4; i++) {
			temp64 = ( val64 & vBIT(0xFFFF,(i*16),16));
			temp64 >>= 64 - ((i+1)*16);
			sw_stat->ring_full_cnt[i] += temp64;
		}

		val64 = readq(&bar0->ring_bump_counter2);
		for (i=0; i<4; i++) {
			temp64 = ( val64 & vBIT(0xFFFF,(i*16),16));
			temp64 >>= 64 - ((i+1)*16);
			 sw_stat->ring_full_cnt[i+4] += temp64;
		}
	}

	val64 = readq(&bar0->txdma_int_status);
	/*check for pfc_err*/
	if (val64 & TXDMA_PFC_INT) {
		if (do_s2io_chk_alarm_bit(PFC_ECC_DB_ERR | PFC_SM_ERR_ALARM|
				PFC_MISC_0_ERR | PFC_MISC_1_ERR|
				PFC_PCIX_ERR, &bar0->pfc_err_reg,
				&sw_stat->pfc_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(PFC_ECC_SG_ERR, &bar0->pfc_err_reg,
				&sw_stat->pfc_err_cnt);
	}

	/*check for tda_err*/
	if (val64 & TXDMA_TDA_INT) {
		if(do_s2io_chk_alarm_bit(TDA_Fn_ECC_DB_ERR | TDA_SM0_ERR_ALARM |
				TDA_SM1_ERR_ALARM, &bar0->tda_err_reg,
				&sw_stat->tda_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TDA_Fn_ECC_SG_ERR | TDA_PCIX_ERR,
				&bar0->tda_err_reg, &sw_stat->tda_err_cnt);
	}
	/*check for pcc_err*/
	if (val64 & TXDMA_PCC_INT) {
		if (do_s2io_chk_alarm_bit(PCC_SM_ERR_ALARM | PCC_WR_ERR_ALARM
				| PCC_N_SERR | PCC_6_COF_OV_ERR
				| PCC_7_COF_OV_ERR | PCC_6_LSO_OV_ERR
				| PCC_7_LSO_OV_ERR | PCC_FB_ECC_DB_ERR
				| PCC_TXB_ECC_DB_ERR, &bar0->pcc_err_reg,
				&sw_stat->pcc_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(PCC_FB_ECC_SG_ERR | PCC_TXB_ECC_SG_ERR,
				&bar0->pcc_err_reg, &sw_stat->pcc_err_cnt);
	}

	/*check for tti_err*/
	if (val64 & TXDMA_TTI_INT) {
		if (do_s2io_chk_alarm_bit(TTI_SM_ERR_ALARM, &bar0->tti_err_reg,
				&sw_stat->tti_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TTI_ECC_SG_ERR | TTI_ECC_DB_ERR,
				&bar0->tti_err_reg, &sw_stat->tti_err_cnt);
	}

	/*check for lso_err*/
	if (val64 & TXDMA_LSO_INT) {
		if (do_s2io_chk_alarm_bit(LSO6_ABORT | LSO7_ABORT
				| LSO6_SM_ERR_ALARM | LSO7_SM_ERR_ALARM,
				&bar0->lso_err_reg, &sw_stat->lso_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(LSO6_SEND_OFLOW | LSO7_SEND_OFLOW,
				&bar0->lso_err_reg, &sw_stat->lso_err_cnt);
	}

	/*check for tpa_err*/
	if (val64 & TXDMA_TPA_INT) {
		if (do_s2io_chk_alarm_bit(TPA_SM_ERR_ALARM, &bar0->tpa_err_reg,
			&sw_stat->tpa_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TPA_TX_FRM_DROP, &bar0->tpa_err_reg,
			&sw_stat->tpa_err_cnt);
	}

	/*check for sm_err*/
	if (val64 & TXDMA_SM_INT) {
		if (do_s2io_chk_alarm_bit(SM_SM_ERR_ALARM, &bar0->sm_err_reg,
			&sw_stat->sm_err_cnt))
			goto reset;
	}

	val64 = readq(&bar0->mac_int_status);
	if (val64 & MAC_INT_STATUS_TMAC_INT) {
		if (do_s2io_chk_alarm_bit(TMAC_TX_BUF_OVRN | TMAC_TX_SM_ERR,
				&bar0->mac_tmac_err_reg,
				&sw_stat->mac_tmac_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TMAC_ECC_SG_ERR | TMAC_ECC_DB_ERR
				| TMAC_DESC_ECC_SG_ERR | TMAC_DESC_ECC_DB_ERR,
				&bar0->mac_tmac_err_reg,
				&sw_stat->mac_tmac_err_cnt);
	}

	val64 = readq(&bar0->xgxs_int_status);
	if (val64 & XGXS_INT_STATUS_TXGXS) {
		if (do_s2io_chk_alarm_bit(TXGXS_ESTORE_UFLOW | TXGXS_TX_SM_ERR,
				&bar0->xgxs_txgxs_err_reg,
				&sw_stat->xgxs_txgxs_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(TXGXS_ECC_SG_ERR | TXGXS_ECC_DB_ERR,
				&bar0->xgxs_txgxs_err_reg,
				&sw_stat->xgxs_txgxs_err_cnt);
	}

	val64 = readq(&bar0->rxdma_int_status);
	if (val64 & RXDMA_INT_RC_INT_M) {
		if (do_s2io_chk_alarm_bit(RC_PRCn_ECC_DB_ERR | RC_FTC_ECC_DB_ERR
				| RC_PRCn_SM_ERR_ALARM |RC_FTC_SM_ERR_ALARM,
				&bar0->rc_err_reg, &sw_stat->rc_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RC_PRCn_ECC_SG_ERR | RC_FTC_ECC_SG_ERR
				| RC_RDA_FAIL_WR_Rn, &bar0->rc_err_reg,
				&sw_stat->rc_err_cnt);
		if (do_s2io_chk_alarm_bit(PRC_PCI_AB_RD_Rn | PRC_PCI_AB_WR_Rn
				| PRC_PCI_AB_F_WR_Rn, &bar0->prc_pcix_err_reg,
				&sw_stat->prc_pcix_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(PRC_PCI_DP_RD_Rn | PRC_PCI_DP_WR_Rn
				| PRC_PCI_DP_F_WR_Rn, &bar0->prc_pcix_err_reg,
				&sw_stat->prc_pcix_err_cnt);
	}

	if (val64 & RXDMA_INT_RPA_INT_M) {
		if (do_s2io_chk_alarm_bit(RPA_SM_ERR_ALARM | RPA_CREDIT_ERR,
				&bar0->rpa_err_reg, &sw_stat->rpa_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RPA_ECC_SG_ERR | RPA_ECC_DB_ERR,
				&bar0->rpa_err_reg, &sw_stat->rpa_err_cnt);
	}

	if (val64 & RXDMA_INT_RDA_INT_M) {
		if (do_s2io_chk_alarm_bit(RDA_RXDn_ECC_DB_ERR
				| RDA_FRM_ECC_DB_N_AERR | RDA_SM1_ERR_ALARM
				| RDA_SM0_ERR_ALARM | RDA_RXD_ECC_DB_SERR,
				&bar0->rda_err_reg, &sw_stat->rda_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RDA_RXDn_ECC_SG_ERR | RDA_FRM_ECC_SG_ERR
				| RDA_MISC_ERR | RDA_PCIX_ERR,
				&bar0->rda_err_reg, &sw_stat->rda_err_cnt);
	}

	if (val64 & RXDMA_INT_RTI_INT_M) {
		if (do_s2io_chk_alarm_bit(RTI_SM_ERR_ALARM, &bar0->rti_err_reg,
				&sw_stat->rti_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RTI_ECC_SG_ERR | RTI_ECC_DB_ERR,
				&bar0->rti_err_reg, &sw_stat->rti_err_cnt);
	}

	val64 = readq(&bar0->mac_int_status);
	if (val64 & MAC_INT_STATUS_RMAC_INT) {
		if (do_s2io_chk_alarm_bit(RMAC_RX_BUFF_OVRN | RMAC_RX_SM_ERR,
				&bar0->mac_rmac_err_reg,
				&sw_stat->mac_rmac_err_cnt))
			goto reset;
		do_s2io_chk_alarm_bit(RMAC_UNUSED_INT|RMAC_SINGLE_ECC_ERR|
				RMAC_DOUBLE_ECC_ERR, &bar0->mac_rmac_err_reg,
				&sw_stat->mac_rmac_err_cnt);
	}

	val64 = readq(&bar0->xgxs_int_status);
	if (val64 & XGXS_INT_STATUS_RXGXS) {
		if (do_s2io_chk_alarm_bit(RXGXS_ESTORE_OFLOW | RXGXS_RX_SM_ERR,
				&bar0->xgxs_rxgxs_err_reg,
				&sw_stat->xgxs_rxgxs_err_cnt))
			goto reset;
	}

	val64 = readq(&bar0->mc_int_status);
	if(val64 & MC_INT_STATUS_MC_INT) {
		if (do_s2io_chk_alarm_bit(MC_ERR_REG_SM_ERR, &bar0->mc_err_reg,
				&sw_stat->mc_err_cnt))
			goto reset;

		/* Handling Ecc errors */
		if (val64 & (MC_ERR_REG_ECC_ALL_SNG | MC_ERR_REG_ECC_ALL_DBL)) {
			writeq(val64, &bar0->mc_err_reg);
			if (val64 & MC_ERR_REG_ECC_ALL_DBL) {
				sw_stat->double_ecc_errs++;
				if (sp->device_type != XFRAME_II_DEVICE) {
					/*
					 * Reset XframeI only if critical error
					 */
					if (val64 &
						(MC_ERR_REG_MIRI_ECC_DB_ERR_0 |
						MC_ERR_REG_MIRI_ECC_DB_ERR_1))
								goto reset;
					}
			} else
				sw_stat->single_ecc_errs++;
		}
	}
	return;

reset:
4755
	s2io_stop_all_tx_queue(sp);
4756 4757 4758 4759 4760
	schedule_work(&sp->rst_timer_task);
	sw_stat->soft_reset_cnt++;
	return;
}

L
Linus Torvalds 已提交
4761 4762 4763 4764
/**
 *  s2io_isr - ISR handler of the device .
 *  @irq: the irq of the device.
 *  @dev_id: a void pointer to the dev structure of the NIC.
4765 4766 4767
 *  Description:  This function is the ISR handler of the device. It
 *  identifies the reason for the interrupt and calls the relevant
 *  service routines. As a contongency measure, this ISR allocates the
L
Linus Torvalds 已提交
4768 4769 4770
 *  recv buffers, if their numbers are below the panic value which is
 *  presently set to 25% of the original number of rcv buffers allocated.
 *  Return value:
4771
 *   IRQ_HANDLED: will be returned if IRQ was handled by this routine
L
Linus Torvalds 已提交
4772 4773
 *   IRQ_NONE: will be returned if interrupt is not from our device
 */
4774
static irqreturn_t s2io_isr(int irq, void *dev_id)
L
Linus Torvalds 已提交
4775 4776
{
	struct net_device *dev = (struct net_device *) dev_id;
R
Ralf Baechle 已提交
4777 4778
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
4779
	int i;
4780
	u64 reason = 0;
R
Ralf Baechle 已提交
4781
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
4782 4783
	struct config_param *config;

4784 4785 4786 4787
	/* Pretend we handled any irq's from a disconnected card */
	if (pci_channel_offline(sp->pdev))
		return IRQ_NONE;

4788
	if (!is_s2io_card_up(sp))
4789 4790
		return IRQ_NONE;

L
Linus Torvalds 已提交
4791 4792 4793
	mac_control = &sp->mac_control;
	config = &sp->config;

4794
	/*
L
Linus Torvalds 已提交
4795 4796 4797 4798 4799 4800 4801 4802
	 * Identify the cause for interrupt and call the appropriate
	 * interrupt handler. Causes for the interrupt could be;
	 * 1. Rx of packet.
	 * 2. Tx complete.
	 * 3. Link down.
	 */
	reason = readq(&bar0->general_int_status);

4803 4804 4805
	if (unlikely(reason == S2IO_MINUS_ONE) ) {
		/* Nothing much can be done. Get out */
		return IRQ_HANDLED;
L
Linus Torvalds 已提交
4806
	}
4807

4808 4809 4810 4811 4812 4813 4814
	if (reason & (GEN_INTR_RXTRAFFIC |
		GEN_INTR_TXTRAFFIC | GEN_INTR_TXPIC))
	{
		writeq(S2IO_MINUS_ONE, &bar0->general_int_mask);

		if (config->napi) {
			if (reason & GEN_INTR_RXTRAFFIC) {
4815 4816 4817 4818
				netif_rx_schedule(dev, &sp->napi);
				writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_mask);
				writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int);
				readl(&bar0->rx_traffic_int);
4819
			}
4820 4821 4822 4823 4824 4825 4826
		} else {
			/*
			 * rx_traffic_int reg is an R1 register, writing all 1's
			 * will ensure that the actual interrupt causing bit
			 * get's cleared and hence a read can be avoided.
			 */
			if (reason & GEN_INTR_RXTRAFFIC)
4827
				writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int);
4828 4829

			for (i = 0; i < config->rx_ring_num; i++)
4830
				rx_intr_handler(&mac_control->rings[i], 0);
4831
		}
4832

4833
		/*
4834
		 * tx_traffic_int reg is an R1 register, writing all 1's
4835 4836 4837
		 * will ensure that the actual interrupt causing bit get's
		 * cleared and hence a read can be avoided.
		 */
4838 4839
		if (reason & GEN_INTR_TXTRAFFIC)
			writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int);
4840

4841 4842
		for (i = 0; i < config->tx_fifo_num; i++)
			tx_intr_handler(&mac_control->fifos[i]);
L
Linus Torvalds 已提交
4843

4844 4845
		if (reason & GEN_INTR_TXPIC)
			s2io_txpic_intr_handle(sp);
4846

4847 4848 4849 4850 4851
		/*
		 * Reallocate the buffers from the interrupt handler itself.
		 */
		if (!config->napi) {
			for (i = 0; i < config->rx_ring_num; i++)
4852
				s2io_chk_rx_buffers(&mac_control->rings[i]);
4853 4854 4855
		}
		writeq(sp->general_int_mask, &bar0->general_int_mask);
		readl(&bar0->general_int_status);
4856

4857
		return IRQ_HANDLED;
4858

4859 4860 4861 4862 4863
	}
	else if (!reason) {
		/* The interrupt was not raised by us */
		return IRQ_NONE;
	}
4864

L
Linus Torvalds 已提交
4865 4866 4867
	return IRQ_HANDLED;
}

4868 4869 4870
/**
 * s2io_updt_stats -
 */
R
Ralf Baechle 已提交
4871
static void s2io_updt_stats(struct s2io_nic *sp)
4872
{
R
Ralf Baechle 已提交
4873
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
4874 4875 4876
	u64 val64;
	int cnt = 0;

4877
	if (is_s2io_card_up(sp)) {
4878 4879 4880 4881 4882 4883 4884
		/* Apprx 30us on a 133 MHz bus */
		val64 = SET_UPDT_CLICKS(10) |
			STAT_CFG_ONE_SHOT_EN | STAT_CFG_STAT_EN;
		writeq(val64, &bar0->stat_cfg);
		do {
			udelay(100);
			val64 = readq(&bar0->stat_cfg);
J
Jiri Slaby 已提交
4885
			if (!(val64 & s2BIT(0)))
4886 4887 4888 4889 4890
				break;
			cnt++;
			if (cnt == 5)
				break; /* Updt failed */
		} while(1);
4891
	}
4892 4893
}

L
Linus Torvalds 已提交
4894
/**
4895
 *  s2io_get_stats - Updates the device statistics structure.
L
Linus Torvalds 已提交
4896 4897
 *  @dev : pointer to the device structure.
 *  Description:
4898
 *  This function updates the device statistics structure in the s2io_nic
L
Linus Torvalds 已提交
4899 4900 4901 4902 4903
 *  structure and returns a pointer to the same.
 *  Return value:
 *  pointer to the updated net_device_stats structure.
 */

4904
static struct net_device_stats *s2io_get_stats(struct net_device *dev)
L
Linus Torvalds 已提交
4905
{
R
Ralf Baechle 已提交
4906 4907
	struct s2io_nic *sp = dev->priv;
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
4908
	struct config_param *config;
4909
	int i;
L
Linus Torvalds 已提交
4910

4911

L
Linus Torvalds 已提交
4912 4913 4914
	mac_control = &sp->mac_control;
	config = &sp->config;

4915 4916 4917 4918 4919
	/* Configure Stats for immediate updt */
	s2io_updt_stats(sp);

	sp->stats.tx_packets =
		le32_to_cpu(mac_control->stats_info->tmac_frms);
4920 4921 4922
	sp->stats.tx_errors =
		le32_to_cpu(mac_control->stats_info->tmac_any_err_frms);
	sp->stats.rx_errors =
A
Al Viro 已提交
4923
		le64_to_cpu(mac_control->stats_info->rmac_drop_frms);
4924 4925
	sp->stats.multicast =
		le32_to_cpu(mac_control->stats_info->rmac_vld_mcst_frms);
L
Linus Torvalds 已提交
4926
	sp->stats.rx_length_errors =
A
Al Viro 已提交
4927
		le64_to_cpu(mac_control->stats_info->rmac_long_frms);
L
Linus Torvalds 已提交
4928

4929 4930 4931 4932 4933 4934 4935
	/* collect per-ring rx_packets and rx_bytes */
	sp->stats.rx_packets = sp->stats.rx_bytes = 0;
	for (i = 0; i < config->rx_ring_num; i++) {
		sp->stats.rx_packets += mac_control->rings[i].rx_packets;
		sp->stats.rx_bytes += mac_control->rings[i].rx_bytes;
	}

L
Linus Torvalds 已提交
4936 4937 4938 4939 4940 4941 4942
	return (&sp->stats);
}

/**
 *  s2io_set_multicast - entry point for multicast address enable/disable.
 *  @dev : pointer to the device structure
 *  Description:
4943 4944
 *  This function is a driver entry point which gets called by the kernel
 *  whenever multicast addresses must be enabled/disabled. This also gets
L
Linus Torvalds 已提交
4945 4946 4947 4948 4949 4950 4951 4952 4953 4954 4955
 *  called to set/reset promiscuous mode. Depending on the deivce flag, we
 *  determine, if multicast address must be enabled or if promiscuous mode
 *  is to be disabled etc.
 *  Return value:
 *  void.
 */

static void s2io_set_multicast(struct net_device *dev)
{
	int i, j, prev_cnt;
	struct dev_mc_list *mclist;
R
Ralf Baechle 已提交
4956 4957
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
4958 4959
	u64 val64 = 0, multi_mac = 0x010203040506ULL, mask =
	    0xfeffffffffffULL;
4960
	u64 dis_addr = S2IO_DISABLE_MAC_ENTRY, mac_addr = 0;
L
Linus Torvalds 已提交
4961
	void __iomem *add;
4962
	struct config_param *config = &sp->config;
L
Linus Torvalds 已提交
4963 4964 4965 4966 4967 4968 4969 4970 4971

	if ((dev->flags & IFF_ALLMULTI) && (!sp->m_cast_flg)) {
		/*  Enable all Multicast addresses */
		writeq(RMAC_ADDR_DATA0_MEM_ADDR(multi_mac),
		       &bar0->rmac_addr_data0_mem);
		writeq(RMAC_ADDR_DATA1_MEM_MASK(mask),
		       &bar0->rmac_addr_data1_mem);
		val64 = RMAC_ADDR_CMD_MEM_WE |
		    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
4972
		    RMAC_ADDR_CMD_MEM_OFFSET(config->max_mc_addr - 1);
L
Linus Torvalds 已提交
4973 4974
		writeq(val64, &bar0->rmac_addr_cmd_mem);
		/* Wait till command completes */
A
Ananda Raju 已提交
4975
		wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
4976 4977
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET);
L
Linus Torvalds 已提交
4978 4979

		sp->m_cast_flg = 1;
4980
		sp->all_multi_pos = config->max_mc_addr - 1;
L
Linus Torvalds 已提交
4981 4982 4983 4984
	} else if ((dev->flags & IFF_ALLMULTI) && (sp->m_cast_flg)) {
		/*  Disable all Multicast addresses */
		writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
		       &bar0->rmac_addr_data0_mem);
4985 4986
		writeq(RMAC_ADDR_DATA1_MEM_MASK(0x0),
		       &bar0->rmac_addr_data1_mem);
L
Linus Torvalds 已提交
4987 4988 4989 4990 4991
		val64 = RMAC_ADDR_CMD_MEM_WE |
		    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
		    RMAC_ADDR_CMD_MEM_OFFSET(sp->all_multi_pos);
		writeq(val64, &bar0->rmac_addr_cmd_mem);
		/* Wait till command completes */
A
Ananda Raju 已提交
4992
		wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
4993 4994
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET);
L
Linus Torvalds 已提交
4995 4996 4997 4998 4999 5000 5001 5002 5003 5004 5005 5006 5007 5008 5009 5010

		sp->m_cast_flg = 0;
		sp->all_multi_pos = 0;
	}

	if ((dev->flags & IFF_PROMISC) && (!sp->promisc_flg)) {
		/*  Put the NIC into promiscuous mode */
		add = &bar0->mac_cfg;
		val64 = readq(&bar0->mac_cfg);
		val64 |= MAC_CFG_RMAC_PROM_ENABLE;

		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) val64, add);
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64 >> 32), (add + 4));

5011 5012 5013 5014 5015 5016 5017
		if (vlan_tag_strip != 1) {
			val64 = readq(&bar0->rx_pa_cfg);
			val64 &= ~RX_PA_CFG_STRIP_VLAN_TAG;
			writeq(val64, &bar0->rx_pa_cfg);
			vlan_strip_flag = 0;
		}

L
Linus Torvalds 已提交
5018 5019
		val64 = readq(&bar0->mac_cfg);
		sp->promisc_flg = 1;
5020
		DBG_PRINT(INFO_DBG, "%s: entered promiscuous mode\n",
L
Linus Torvalds 已提交
5021 5022 5023 5024 5025 5026 5027 5028 5029 5030 5031 5032
			  dev->name);
	} else if (!(dev->flags & IFF_PROMISC) && (sp->promisc_flg)) {
		/*  Remove the NIC from promiscuous mode */
		add = &bar0->mac_cfg;
		val64 = readq(&bar0->mac_cfg);
		val64 &= ~MAC_CFG_RMAC_PROM_ENABLE;

		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) val64, add);
		writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
		writel((u32) (val64 >> 32), (add + 4));

5033 5034 5035 5036 5037 5038 5039
		if (vlan_tag_strip != 0) {
			val64 = readq(&bar0->rx_pa_cfg);
			val64 |= RX_PA_CFG_STRIP_VLAN_TAG;
			writeq(val64, &bar0->rx_pa_cfg);
			vlan_strip_flag = 1;
		}

L
Linus Torvalds 已提交
5040 5041
		val64 = readq(&bar0->mac_cfg);
		sp->promisc_flg = 0;
5042
		DBG_PRINT(INFO_DBG, "%s: left promiscuous mode\n",
L
Linus Torvalds 已提交
5043 5044 5045 5046 5047 5048
			  dev->name);
	}

	/*  Update individual M_CAST address list */
	if ((!sp->m_cast_flg) && dev->mc_count) {
		if (dev->mc_count >
5049
		    (config->max_mc_addr - config->max_mac_addr)) {
L
Linus Torvalds 已提交
5050 5051 5052 5053 5054 5055 5056 5057 5058 5059 5060 5061 5062 5063 5064
			DBG_PRINT(ERR_DBG, "%s: No more Rx filters ",
				  dev->name);
			DBG_PRINT(ERR_DBG, "can be added, please enable ");
			DBG_PRINT(ERR_DBG, "ALL_MULTI instead\n");
			return;
		}

		prev_cnt = sp->mc_addr_count;
		sp->mc_addr_count = dev->mc_count;

		/* Clear out the previous list of Mc in the H/W. */
		for (i = 0; i < prev_cnt; i++) {
			writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
			       &bar0->rmac_addr_data0_mem);
			writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
5065
				&bar0->rmac_addr_data1_mem);
L
Linus Torvalds 已提交
5066 5067 5068
			val64 = RMAC_ADDR_CMD_MEM_WE |
			    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
			    RMAC_ADDR_CMD_MEM_OFFSET
5069
			    (config->mc_start_offset + i);
L
Linus Torvalds 已提交
5070 5071 5072
			writeq(val64, &bar0->rmac_addr_cmd_mem);

			/* Wait for command completes */
A
Ananda Raju 已提交
5073
			if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
5074 5075
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET)) {
L
Linus Torvalds 已提交
5076 5077 5078 5079 5080 5081 5082 5083 5084 5085 5086 5087
				DBG_PRINT(ERR_DBG, "%s: Adding ",
					  dev->name);
				DBG_PRINT(ERR_DBG, "Multicasts failed\n");
				return;
			}
		}

		/* Create the new Rx filter list and update the same in H/W. */
		for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
		     i++, mclist = mclist->next) {
			memcpy(sp->usr_addrs[i].addr, mclist->dmi_addr,
			       ETH_ALEN);
5088
			mac_addr = 0;
L
Linus Torvalds 已提交
5089 5090 5091 5092 5093 5094 5095 5096
			for (j = 0; j < ETH_ALEN; j++) {
				mac_addr |= mclist->dmi_addr[j];
				mac_addr <<= 8;
			}
			mac_addr >>= 8;
			writeq(RMAC_ADDR_DATA0_MEM_ADDR(mac_addr),
			       &bar0->rmac_addr_data0_mem);
			writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
5097
				&bar0->rmac_addr_data1_mem);
L
Linus Torvalds 已提交
5098 5099 5100
			val64 = RMAC_ADDR_CMD_MEM_WE |
			    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
			    RMAC_ADDR_CMD_MEM_OFFSET
5101
			    (i + config->mc_start_offset);
L
Linus Torvalds 已提交
5102 5103 5104
			writeq(val64, &bar0->rmac_addr_cmd_mem);

			/* Wait for command completes */
A
Ananda Raju 已提交
5105
			if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
5106 5107
					RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
					S2IO_BIT_RESET)) {
L
Linus Torvalds 已提交
5108 5109 5110 5111 5112 5113 5114 5115 5116
				DBG_PRINT(ERR_DBG, "%s: Adding ",
					  dev->name);
				DBG_PRINT(ERR_DBG, "Multicasts failed\n");
				return;
			}
		}
	}
}

5117 5118 5119 5120 5121 5122 5123 5124 5125 5126 5127 5128 5129 5130 5131 5132 5133 5134 5135 5136 5137 5138 5139 5140 5141 5142 5143 5144 5145 5146 5147 5148 5149 5150 5151 5152 5153 5154 5155 5156 5157 5158 5159 5160 5161 5162 5163 5164 5165 5166 5167 5168 5169 5170 5171 5172 5173 5174 5175 5176 5177 5178 5179 5180 5181 5182 5183 5184 5185 5186 5187 5188
/* read from CAM unicast & multicast addresses and store it in
 * def_mac_addr structure
 */
void do_s2io_store_unicast_mc(struct s2io_nic *sp)
{
	int offset;
	u64 mac_addr = 0x0;
	struct config_param *config = &sp->config;

	/* store unicast & multicast mac addresses */
	for (offset = 0; offset < config->max_mc_addr; offset++) {
		mac_addr = do_s2io_read_unicast_mc(sp, offset);
		/* if read fails disable the entry */
		if (mac_addr == FAILURE)
			mac_addr = S2IO_DISABLE_MAC_ENTRY;
		do_s2io_copy_mac_addr(sp, offset, mac_addr);
	}
}

/* restore unicast & multicast MAC to CAM from def_mac_addr structure */
static void do_s2io_restore_unicast_mc(struct s2io_nic *sp)
{
	int offset;
	struct config_param *config = &sp->config;
	/* restore unicast mac address */
	for (offset = 0; offset < config->max_mac_addr; offset++)
		do_s2io_prog_unicast(sp->dev,
			sp->def_mac_addr[offset].mac_addr);

	/* restore multicast mac address */
	for (offset = config->mc_start_offset;
		offset < config->max_mc_addr; offset++)
		do_s2io_add_mc(sp, sp->def_mac_addr[offset].mac_addr);
}

/* add a multicast MAC address to CAM */
static int do_s2io_add_mc(struct s2io_nic *sp, u8 *addr)
{
	int i;
	u64 mac_addr = 0;
	struct config_param *config = &sp->config;

	for (i = 0; i < ETH_ALEN; i++) {
		mac_addr <<= 8;
		mac_addr |= addr[i];
	}
	if ((0ULL == mac_addr) || (mac_addr == S2IO_DISABLE_MAC_ENTRY))
		return SUCCESS;

	/* check if the multicast mac already preset in CAM */
	for (i = config->mc_start_offset; i < config->max_mc_addr; i++) {
		u64 tmp64;
		tmp64 = do_s2io_read_unicast_mc(sp, i);
		if (tmp64 == S2IO_DISABLE_MAC_ENTRY) /* CAM entry is empty */
			break;

		if (tmp64 == mac_addr)
			return SUCCESS;
	}
	if (i == config->max_mc_addr) {
		DBG_PRINT(ERR_DBG,
			"CAM full no space left for multicast MAC\n");
		return FAILURE;
	}
	/* Update the internal structure with this new mac address */
	do_s2io_copy_mac_addr(sp, i, mac_addr);

	return (do_s2io_add_mac(sp, mac_addr, i));
}

/* add MAC address to CAM */
static int do_s2io_add_mac(struct s2io_nic *sp, u64 addr, int off)
5189 5190 5191 5192 5193 5194 5195 5196 5197 5198 5199 5200 5201 5202 5203 5204
{
	u64 val64;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;

	writeq(RMAC_ADDR_DATA0_MEM_ADDR(addr),
		&bar0->rmac_addr_data0_mem);

	val64 =
		RMAC_ADDR_CMD_MEM_WE | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
		RMAC_ADDR_CMD_MEM_OFFSET(off);
	writeq(val64, &bar0->rmac_addr_cmd_mem);

	/* Wait till command completes */
	if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
		RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
		S2IO_BIT_RESET)) {
5205
		DBG_PRINT(INFO_DBG, "do_s2io_add_mac failed\n");
5206 5207 5208 5209
		return FAILURE;
	}
	return SUCCESS;
}
5210 5211 5212 5213 5214 5215 5216 5217 5218 5219 5220 5221 5222 5223 5224 5225 5226 5227 5228 5229 5230 5231 5232 5233 5234 5235 5236 5237 5238 5239 5240 5241 5242 5243 5244 5245 5246 5247 5248 5249 5250 5251 5252 5253 5254 5255
/* deletes a specified unicast/multicast mac entry from CAM */
static int do_s2io_delete_unicast_mc(struct s2io_nic *sp, u64 addr)
{
	int offset;
	u64 dis_addr = S2IO_DISABLE_MAC_ENTRY, tmp64;
	struct config_param *config = &sp->config;

	for (offset = 1;
		offset < config->max_mc_addr; offset++) {
		tmp64 = do_s2io_read_unicast_mc(sp, offset);
		if (tmp64 == addr) {
			/* disable the entry by writing  0xffffffffffffULL */
			if (do_s2io_add_mac(sp, dis_addr, offset) ==  FAILURE)
				return FAILURE;
			/* store the new mac list from CAM */
			do_s2io_store_unicast_mc(sp);
			return SUCCESS;
		}
	}
	DBG_PRINT(ERR_DBG, "MAC address 0x%llx not found in CAM\n",
			(unsigned long long)addr);
	return FAILURE;
}

/* read mac entries from CAM */
static u64 do_s2io_read_unicast_mc(struct s2io_nic *sp, int offset)
{
	u64 tmp64 = 0xffffffffffff0000ULL, val64;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;

	/* read mac addr */
	val64 =
		RMAC_ADDR_CMD_MEM_RD | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
		RMAC_ADDR_CMD_MEM_OFFSET(offset);
	writeq(val64, &bar0->rmac_addr_cmd_mem);

	/* Wait till command completes */
	if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
		RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
		S2IO_BIT_RESET)) {
		DBG_PRINT(INFO_DBG, "do_s2io_read_unicast_mc failed\n");
		return FAILURE;
	}
	tmp64 = readq(&bar0->rmac_addr_data0_mem);
	return (tmp64 >> 16);
}
5256 5257 5258 5259

/**
 * s2io_set_mac_addr driver entry point
 */
5260

5261 5262 5263 5264 5265 5266 5267 5268 5269 5270 5271 5272
static int s2io_set_mac_addr(struct net_device *dev, void *p)
{
	struct sockaddr *addr = p;

	if (!is_valid_ether_addr(addr->sa_data))
		return -EINVAL;

	memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);

	/* store the MAC address in CAM */
	return (do_s2io_prog_unicast(dev, dev->dev_addr));
}
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/**
5274
 *  do_s2io_prog_unicast - Programs the Xframe mac address
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 *  @dev : pointer to the device structure.
 *  @addr: a uchar pointer to the new mac address which is to be set.
5277
 *  Description : This procedure will program the Xframe to receive
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 *  frames with new Mac Address
5279
 *  Return value: SUCCESS on success and an appropriate (-)ve integer
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 *  as defined in errno.h file on failure.
 */
5282

5283
static int do_s2io_prog_unicast(struct net_device *dev, u8 *addr)
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{
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	struct s2io_nic *sp = dev->priv;
5286
	register u64 mac_addr = 0, perm_addr = 0;
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	int i;
5288 5289
	u64 tmp64;
	struct config_param *config = &sp->config;
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5290

5291
	/*
5292 5293 5294 5295
	* Set the new MAC address as the new unicast filter and reflect this
	* change on the device address registered with the OS. It will be
	* at offset 0.
	*/
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	for (i = 0; i < ETH_ALEN; i++) {
		mac_addr <<= 8;
		mac_addr |= addr[i];
5299 5300
		perm_addr <<= 8;
		perm_addr |= sp->def_mac_addr[0].mac_addr[i];
5301 5302
	}

5303 5304
	/* check if the dev_addr is different than perm_addr */
	if (mac_addr == perm_addr)
5305 5306
		return SUCCESS;

5307 5308 5309 5310 5311 5312 5313 5314 5315 5316 5317 5318 5319 5320 5321 5322 5323
	/* check if the mac already preset in CAM */
	for (i = 1; i < config->max_mac_addr; i++) {
		tmp64 = do_s2io_read_unicast_mc(sp, i);
		if (tmp64 == S2IO_DISABLE_MAC_ENTRY) /* CAM entry is empty */
			break;

		if (tmp64 == mac_addr) {
			DBG_PRINT(INFO_DBG,
			"MAC addr:0x%llx already present in CAM\n",
			(unsigned long long)mac_addr);
			return SUCCESS;
		}
	}
	if (i == config->max_mac_addr) {
		DBG_PRINT(ERR_DBG, "CAM full no space left for Unicast MAC\n");
		return FAILURE;
	}
5324
	/* Update the internal structure with this new mac address */
5325 5326
	do_s2io_copy_mac_addr(sp, i, mac_addr);
	return (do_s2io_add_mac(sp, mac_addr, i));
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}

/**
5330
 * s2io_ethtool_sset - Sets different link parameters.
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 * @sp : private member of the device structure, which is a pointer to the  * s2io_nic structure.
 * @info: pointer to the structure with parameters given by ethtool to set
 * link information.
 * Description:
5335
 * The function sets different link parameters provided by the user onto
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 * the NIC.
 * Return value:
 * 0 on success.
*/

static int s2io_ethtool_sset(struct net_device *dev,
			     struct ethtool_cmd *info)
{
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	struct s2io_nic *sp = dev->priv;
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	if ((info->autoneg == AUTONEG_ENABLE) ||
	    (info->speed != SPEED_10000) || (info->duplex != DUPLEX_FULL))
		return -EINVAL;
	else {
		s2io_close(sp->dev);
		s2io_open(sp->dev);
	}

	return 0;
}

/**
5357
 * s2io_ethtol_gset - Return link specific information.
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 * @sp : private member of the device structure, pointer to the
 *      s2io_nic structure.
 * @info : pointer to the structure with parameters given by ethtool
 * to return link information.
 * Description:
 * Returns link specific information like speed, duplex etc.. to ethtool.
 * Return value :
 * return 0 on success.
 */

static int s2io_ethtool_gset(struct net_device *dev, struct ethtool_cmd *info)
{
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	struct s2io_nic *sp = dev->priv;
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	info->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
	info->advertising = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
	info->port = PORT_FIBRE;
5374 5375 5376

	/* info->transceiver */
	info->transceiver = XCVR_EXTERNAL;
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	if (netif_carrier_ok(sp->dev)) {
		info->speed = 10000;
		info->duplex = DUPLEX_FULL;
	} else {
		info->speed = -1;
		info->duplex = -1;
	}

	info->autoneg = AUTONEG_DISABLE;
	return 0;
}

/**
5391 5392
 * s2io_ethtool_gdrvinfo - Returns driver specific information.
 * @sp : private member of the device structure, which is a pointer to the
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 * s2io_nic structure.
 * @info : pointer to the structure with parameters given by ethtool to
 * return driver information.
 * Description:
 * Returns driver specefic information like name, version etc.. to ethtool.
 * Return value:
 *  void
 */

static void s2io_ethtool_gdrvinfo(struct net_device *dev,
				  struct ethtool_drvinfo *info)
{
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	struct s2io_nic *sp = dev->priv;
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5406

5407 5408 5409 5410
	strncpy(info->driver, s2io_driver_name, sizeof(info->driver));
	strncpy(info->version, s2io_driver_version, sizeof(info->version));
	strncpy(info->fw_version, "", sizeof(info->fw_version));
	strncpy(info->bus_info, pci_name(sp->pdev), sizeof(info->bus_info));
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	info->regdump_len = XENA_REG_SPACE;
	info->eedump_len = XENA_EEPROM_SPACE;
}

/**
 *  s2io_ethtool_gregs - dumps the entire space of Xfame into the buffer.
5417
 *  @sp: private member of the device structure, which is a pointer to the
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 *  s2io_nic structure.
5419
 *  @regs : pointer to the structure with parameters given by ethtool for
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 *  dumping the registers.
 *  @reg_space: The input argumnet into which all the registers are dumped.
 *  Description:
 *  Dumps the entire register space of xFrame NIC into the user given
 *  buffer area.
 * Return value :
 * void .
*/

static void s2io_ethtool_gregs(struct net_device *dev,
			       struct ethtool_regs *regs, void *space)
{
	int i;
	u64 reg;
	u8 *reg_space = (u8 *) space;
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	struct s2io_nic *sp = dev->priv;
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	regs->len = XENA_REG_SPACE;
	regs->version = sp->pdev->subsystem_device;

	for (i = 0; i < regs->len; i += 8) {
		reg = readq(sp->bar0 + i);
		memcpy((reg_space + i), &reg, 8);
	}
}

/**
 *  s2io_phy_id  - timer function that alternates adapter LED.
5448
 *  @data : address of the private member of the device structure, which
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 *  is a pointer to the s2io_nic structure, provided as an u32.
5450 5451 5452
 * Description: This is actually the timer function that alternates the
 * adapter LED bit of the adapter control bit to set/reset every time on
 * invocation. The timer is set for 1/2 a second, hence tha NIC blinks
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 *  once every second.
*/
static void s2io_phy_id(unsigned long data)
{
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	struct s2io_nic *sp = (struct s2io_nic *) data;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
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	u64 val64 = 0;
	u16 subid;

	subid = sp->pdev->subsystem_device;
5463 5464
	if ((sp->device_type == XFRAME_II_DEVICE) ||
		   ((subid & 0xFF) >= 0x07)) {
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		val64 = readq(&bar0->gpio_control);
		val64 ^= GPIO_CTRL_GPIO_0;
		writeq(val64, &bar0->gpio_control);
	} else {
		val64 = readq(&bar0->adapter_control);
		val64 ^= ADAPTER_LED_ON;
		writeq(val64, &bar0->adapter_control);
	}

	mod_timer(&sp->id_timer, jiffies + HZ / 2);
}

/**
 * s2io_ethtool_idnic - To physically identify the nic on the system.
 * @sp : private member of the device structure, which is a pointer to the
 * s2io_nic structure.
5481
 * @id : pointer to the structure with identification parameters given by
L
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5482 5483
 * ethtool.
 * Description: Used to physically identify the NIC on the system.
5484
 * The Link LED will blink for a time specified by the user for
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5485
 * identification.
5486
 * NOTE: The Link has to be Up to be able to blink the LED. Hence
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 * identification is possible only if it's link is up.
 * Return value:
 * int , returns 0 on success
 */

static int s2io_ethtool_idnic(struct net_device *dev, u32 data)
{
	u64 val64 = 0, last_gpio_ctrl_val;
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	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
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5497 5498 5499 5500
	u16 subid;

	subid = sp->pdev->subsystem_device;
	last_gpio_ctrl_val = readq(&bar0->gpio_control);
5501 5502
	if ((sp->device_type == XFRAME_I_DEVICE) &&
		((subid & 0xFF) < 0x07)) {
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5503 5504 5505 5506 5507 5508 5509 5510 5511 5512 5513 5514 5515 5516
		val64 = readq(&bar0->adapter_control);
		if (!(val64 & ADAPTER_CNTL_EN)) {
			printk(KERN_ERR
			       "Adapter Link down, cannot blink LED\n");
			return -EFAULT;
		}
	}
	if (sp->id_timer.function == NULL) {
		init_timer(&sp->id_timer);
		sp->id_timer.function = s2io_phy_id;
		sp->id_timer.data = (unsigned long) sp;
	}
	mod_timer(&sp->id_timer, jiffies);
	if (data)
5517
		msleep_interruptible(data * HZ);
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5518
	else
5519
		msleep_interruptible(MAX_FLICKER_TIME);
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5520 5521
	del_timer_sync(&sp->id_timer);

5522
	if (CARDS_WITH_FAULTY_LINK_INDICATORS(sp->device_type, subid)) {
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5523 5524 5525 5526 5527 5528 5529
		writeq(last_gpio_ctrl_val, &bar0->gpio_control);
		last_gpio_ctrl_val = readq(&bar0->gpio_control);
	}

	return 0;
}

5530 5531 5532 5533 5534 5535 5536 5537 5538 5539 5540 5541
static void s2io_ethtool_gringparam(struct net_device *dev,
                                    struct ethtool_ringparam *ering)
{
	struct s2io_nic *sp = dev->priv;
	int i,tx_desc_count=0,rx_desc_count=0;

	if (sp->rxd_mode == RXD_MODE_1)
		ering->rx_max_pending = MAX_RX_DESC_1;
	else if (sp->rxd_mode == RXD_MODE_3B)
		ering->rx_max_pending = MAX_RX_DESC_2;

	ering->tx_max_pending = MAX_TX_DESC;
5542
	for (i = 0 ; i < sp->config.tx_fifo_num ; i++)
5543
		tx_desc_count += sp->config.tx_cfg[i].fifo_len;
5544

5545 5546 5547
	DBG_PRINT(INFO_DBG,"\nmax txds : %d\n",sp->config.max_txds);
	ering->tx_pending = tx_desc_count;
	rx_desc_count = 0;
5548
	for (i = 0 ; i < sp->config.rx_ring_num ; i++)
5549
		rx_desc_count += sp->config.rx_cfg[i].num_rxd;
5550

5551 5552 5553 5554 5555 5556 5557 5558 5559 5560 5561
	ering->rx_pending = rx_desc_count;

	ering->rx_mini_max_pending = 0;
	ering->rx_mini_pending = 0;
	if(sp->rxd_mode == RXD_MODE_1)
		ering->rx_jumbo_max_pending = MAX_RX_DESC_1;
	else if (sp->rxd_mode == RXD_MODE_3B)
		ering->rx_jumbo_max_pending = MAX_RX_DESC_2;
	ering->rx_jumbo_pending = rx_desc_count;
}

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5562 5563
/**
 * s2io_ethtool_getpause_data -Pause frame frame generation and reception.
5564 5565
 * @sp : private member of the device structure, which is a pointer to the
 *	s2io_nic structure.
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5566 5567 5568 5569 5570 5571 5572 5573 5574 5575
 * @ep : pointer to the structure with pause parameters given by ethtool.
 * Description:
 * Returns the Pause frame generation and reception capability of the NIC.
 * Return value:
 *  void
 */
static void s2io_ethtool_getpause_data(struct net_device *dev,
				       struct ethtool_pauseparam *ep)
{
	u64 val64;
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5576 5577
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
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5578 5579 5580 5581 5582 5583 5584 5585 5586 5587 5588

	val64 = readq(&bar0->rmac_pause_cfg);
	if (val64 & RMAC_PAUSE_GEN_ENABLE)
		ep->tx_pause = TRUE;
	if (val64 & RMAC_PAUSE_RX_ENABLE)
		ep->rx_pause = TRUE;
	ep->autoneg = FALSE;
}

/**
 * s2io_ethtool_setpause_data -  set/reset pause frame generation.
5589
 * @sp : private member of the device structure, which is a pointer to the
L
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5590 5591 5592 5593 5594 5595 5596 5597 5598 5599
 *      s2io_nic structure.
 * @ep : pointer to the structure with pause parameters given by ethtool.
 * Description:
 * It can be used to set or reset Pause frame generation or reception
 * support of the NIC.
 * Return value:
 * int, returns 0 on Success
 */

static int s2io_ethtool_setpause_data(struct net_device *dev,
5600
			       struct ethtool_pauseparam *ep)
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5601 5602
{
	u64 val64;
R
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5603 5604
	struct s2io_nic *sp = dev->priv;
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
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5605 5606 5607 5608 5609 5610 5611 5612 5613 5614 5615 5616 5617 5618 5619 5620

	val64 = readq(&bar0->rmac_pause_cfg);
	if (ep->tx_pause)
		val64 |= RMAC_PAUSE_GEN_ENABLE;
	else
		val64 &= ~RMAC_PAUSE_GEN_ENABLE;
	if (ep->rx_pause)
		val64 |= RMAC_PAUSE_RX_ENABLE;
	else
		val64 &= ~RMAC_PAUSE_RX_ENABLE;
	writeq(val64, &bar0->rmac_pause_cfg);
	return 0;
}

/**
 * read_eeprom - reads 4 bytes of data from user given offset.
5621
 * @sp : private member of the device structure, which is a pointer to the
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5622 5623 5624
 *      s2io_nic structure.
 * @off : offset at which the data must be written
 * @data : Its an output parameter where the data read at the given
5625
 *	offset is stored.
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5626
 * Description:
5627
 * Will read 4 bytes of data from the user given offset and return the
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5628 5629 5630 5631 5632 5633 5634 5635
 * read data.
 * NOTE: Will allow to read only part of the EEPROM visible through the
 *   I2C bus.
 * Return value:
 *  -1 on failure and 0 on success.
 */

#define S2IO_DEV_ID		5
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5636
static int read_eeprom(struct s2io_nic * sp, int off, u64 * data)
L
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5637 5638 5639 5640
{
	int ret = -1;
	u32 exit_cnt = 0;
	u64 val64;
R
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5641
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
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5642

5643 5644 5645 5646 5647
	if (sp->device_type == XFRAME_I_DEVICE) {
		val64 = I2C_CONTROL_DEV_ID(S2IO_DEV_ID) | I2C_CONTROL_ADDR(off) |
		    I2C_CONTROL_BYTE_CNT(0x3) | I2C_CONTROL_READ |
		    I2C_CONTROL_CNTL_START;
		SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF);
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5648

5649 5650 5651 5652 5653 5654 5655 5656 5657
		while (exit_cnt < 5) {
			val64 = readq(&bar0->i2c_control);
			if (I2C_CONTROL_CNTL_END(val64)) {
				*data = I2C_CONTROL_GET_DATA(val64);
				ret = 0;
				break;
			}
			msleep(50);
			exit_cnt++;
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5658 5659 5660
		}
	}

5661 5662
	if (sp->device_type == XFRAME_II_DEVICE) {
		val64 = SPI_CONTROL_KEY(0x9) | SPI_CONTROL_SEL1 |
5663
			SPI_CONTROL_BYTECNT(0x3) |
5664 5665 5666 5667 5668 5669 5670 5671 5672 5673 5674 5675 5676 5677 5678 5679 5680 5681 5682
			SPI_CONTROL_CMD(0x3) | SPI_CONTROL_ADDR(off);
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		val64 |= SPI_CONTROL_REQ;
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		while (exit_cnt < 5) {
			val64 = readq(&bar0->spi_control);
			if (val64 & SPI_CONTROL_NACK) {
				ret = 1;
				break;
			} else if (val64 & SPI_CONTROL_DONE) {
				*data = readq(&bar0->spi_data);
				*data &= 0xffffff;
				ret = 0;
				break;
			}
			msleep(50);
			exit_cnt++;
		}
	}
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	return ret;
}

/**
 *  write_eeprom - actually writes the relevant part of the data value.
 *  @sp : private member of the device structure, which is a pointer to the
 *       s2io_nic structure.
 *  @off : offset at which the data must be written
 *  @data : The data that is to be written
5692
 *  @cnt : Number of bytes of the data that are actually to be written into
L
Linus Torvalds 已提交
5693 5694 5695 5696 5697 5698 5699 5700
 *  the Eeprom. (max of 3)
 * Description:
 *  Actually writes the relevant part of the data value into the Eeprom
 *  through the I2C bus.
 * Return value:
 *  0 on success, -1 on failure.
 */

R
Ralf Baechle 已提交
5701
static int write_eeprom(struct s2io_nic * sp, int off, u64 data, int cnt)
L
Linus Torvalds 已提交
5702 5703 5704
{
	int exit_cnt = 0, ret = -1;
	u64 val64;
R
Ralf Baechle 已提交
5705
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
5706

5707 5708 5709 5710 5711 5712 5713 5714 5715 5716 5717 5718 5719 5720 5721 5722 5723
	if (sp->device_type == XFRAME_I_DEVICE) {
		val64 = I2C_CONTROL_DEV_ID(S2IO_DEV_ID) | I2C_CONTROL_ADDR(off) |
		    I2C_CONTROL_BYTE_CNT(cnt) | I2C_CONTROL_SET_DATA((u32)data) |
		    I2C_CONTROL_CNTL_START;
		SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF);

		while (exit_cnt < 5) {
			val64 = readq(&bar0->i2c_control);
			if (I2C_CONTROL_CNTL_END(val64)) {
				if (!(val64 & I2C_CONTROL_NACK))
					ret = 0;
				break;
			}
			msleep(50);
			exit_cnt++;
		}
	}
L
Linus Torvalds 已提交
5724

5725 5726 5727 5728 5729
	if (sp->device_type == XFRAME_II_DEVICE) {
		int write_cnt = (cnt == 8) ? 0 : cnt;
		writeq(SPI_DATA_WRITE(data,(cnt<<3)), &bar0->spi_data);

		val64 = SPI_CONTROL_KEY(0x9) | SPI_CONTROL_SEL1 |
5730
			SPI_CONTROL_BYTECNT(write_cnt) |
5731 5732 5733 5734 5735 5736 5737 5738 5739 5740
			SPI_CONTROL_CMD(0x2) | SPI_CONTROL_ADDR(off);
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		val64 |= SPI_CONTROL_REQ;
		SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
		while (exit_cnt < 5) {
			val64 = readq(&bar0->spi_control);
			if (val64 & SPI_CONTROL_NACK) {
				ret = 1;
				break;
			} else if (val64 & SPI_CONTROL_DONE) {
L
Linus Torvalds 已提交
5741
				ret = 0;
5742 5743 5744 5745
				break;
			}
			msleep(50);
			exit_cnt++;
L
Linus Torvalds 已提交
5746 5747 5748 5749
		}
	}
	return ret;
}
R
Ralf Baechle 已提交
5750
static void s2io_vpd_read(struct s2io_nic *nic)
5751
{
5752 5753
	u8 *vpd_data;
	u8 data;
5754 5755 5756 5757 5758 5759 5760 5761 5762 5763 5764
	int i=0, cnt, fail = 0;
	int vpd_addr = 0x80;

	if (nic->device_type == XFRAME_II_DEVICE) {
		strcpy(nic->product_name, "Xframe II 10GbE network adapter");
		vpd_addr = 0x80;
	}
	else {
		strcpy(nic->product_name, "Xframe I 10GbE network adapter");
		vpd_addr = 0x50;
	}
5765
	strcpy(nic->serial_num, "NOT AVAILABLE");
5766

5767
	vpd_data = kmalloc(256, GFP_KERNEL);
5768 5769
	if (!vpd_data) {
		nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
5770
		return;
5771
	}
5772
	nic->mac_control.stats_info->sw_stat.mem_allocated += 256;
5773

5774 5775 5776 5777 5778 5779 5780 5781 5782 5783 5784 5785 5786 5787 5788 5789 5790 5791
	for (i = 0; i < 256; i +=4 ) {
		pci_write_config_byte(nic->pdev, (vpd_addr + 2), i);
		pci_read_config_byte(nic->pdev,  (vpd_addr + 2), &data);
		pci_write_config_byte(nic->pdev, (vpd_addr + 3), 0);
		for (cnt = 0; cnt <5; cnt++) {
			msleep(2);
			pci_read_config_byte(nic->pdev, (vpd_addr + 3), &data);
			if (data == 0x80)
				break;
		}
		if (cnt >= 5) {
			DBG_PRINT(ERR_DBG, "Read of VPD data failed\n");
			fail = 1;
			break;
		}
		pci_read_config_dword(nic->pdev,  (vpd_addr + 4),
				      (u32 *)&vpd_data[i]);
	}
5792 5793 5794 5795 5796 5797 5798 5799 5800 5801 5802 5803 5804 5805 5806 5807

	if(!fail) {
		/* read serial number of adapter */
		for (cnt = 0; cnt < 256; cnt++) {
		if ((vpd_data[cnt] == 'S') &&
			(vpd_data[cnt+1] == 'N') &&
			(vpd_data[cnt+2] < VPD_STRING_LEN)) {
				memset(nic->serial_num, 0, VPD_STRING_LEN);
				memcpy(nic->serial_num, &vpd_data[cnt + 3],
					vpd_data[cnt+2]);
				break;
			}
		}
	}

	if ((!fail) && (vpd_data[1] < VPD_STRING_LEN)) {
5808 5809 5810
		memset(nic->product_name, 0, vpd_data[1]);
		memcpy(nic->product_name, &vpd_data[3], vpd_data[1]);
	}
5811
	kfree(vpd_data);
5812
	nic->mac_control.stats_info->sw_stat.mem_freed += 256;
5813 5814
}

L
Linus Torvalds 已提交
5815 5816 5817
/**
 *  s2io_ethtool_geeprom  - reads the value stored in the Eeprom.
 *  @sp : private member of the device structure, which is a pointer to the *       s2io_nic structure.
5818
 *  @eeprom : pointer to the user level structure provided by ethtool,
L
Linus Torvalds 已提交
5819 5820 5821 5822 5823 5824 5825 5826 5827 5828
 *  containing all relevant information.
 *  @data_buf : user defined value to be written into Eeprom.
 *  Description: Reads the values stored in the Eeprom at given offset
 *  for a given length. Stores these values int the input argument data
 *  buffer 'data_buf' and returns these to the caller (ethtool.)
 *  Return value:
 *  int  0 on success
 */

static int s2io_ethtool_geeprom(struct net_device *dev,
5829
			 struct ethtool_eeprom *eeprom, u8 * data_buf)
L
Linus Torvalds 已提交
5830
{
5831 5832
	u32 i, valid;
	u64 data;
R
Ralf Baechle 已提交
5833
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
5834 5835 5836 5837 5838 5839 5840 5841 5842 5843 5844 5845 5846 5847 5848 5849 5850 5851 5852 5853 5854

	eeprom->magic = sp->pdev->vendor | (sp->pdev->device << 16);

	if ((eeprom->offset + eeprom->len) > (XENA_EEPROM_SPACE))
		eeprom->len = XENA_EEPROM_SPACE - eeprom->offset;

	for (i = 0; i < eeprom->len; i += 4) {
		if (read_eeprom(sp, (eeprom->offset + i), &data)) {
			DBG_PRINT(ERR_DBG, "Read of EEPROM failed\n");
			return -EFAULT;
		}
		valid = INV(data);
		memcpy((data_buf + i), &valid, 4);
	}
	return 0;
}

/**
 *  s2io_ethtool_seeprom - tries to write the user provided value in Eeprom
 *  @sp : private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
5855
 *  @eeprom : pointer to the user level structure provided by ethtool,
L
Linus Torvalds 已提交
5856 5857 5858 5859 5860 5861 5862 5863 5864 5865 5866 5867 5868 5869
 *  containing all relevant information.
 *  @data_buf ; user defined value to be written into Eeprom.
 *  Description:
 *  Tries to write the user provided value in the Eeprom, at the offset
 *  given by the user.
 *  Return value:
 *  0 on success, -EFAULT on failure.
 */

static int s2io_ethtool_seeprom(struct net_device *dev,
				struct ethtool_eeprom *eeprom,
				u8 * data_buf)
{
	int len = eeprom->len, cnt = 0;
5870
	u64 valid = 0, data;
R
Ralf Baechle 已提交
5871
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
5872 5873 5874 5875 5876 5877 5878 5879 5880 5881 5882 5883 5884 5885 5886 5887 5888 5889 5890 5891 5892 5893 5894 5895 5896 5897 5898 5899 5900 5901 5902

	if (eeprom->magic != (sp->pdev->vendor | (sp->pdev->device << 16))) {
		DBG_PRINT(ERR_DBG,
			  "ETHTOOL_WRITE_EEPROM Err: Magic value ");
		DBG_PRINT(ERR_DBG, "is wrong, Its not 0x%x\n",
			  eeprom->magic);
		return -EFAULT;
	}

	while (len) {
		data = (u32) data_buf[cnt] & 0x000000FF;
		if (data) {
			valid = (u32) (data << 24);
		} else
			valid = data;

		if (write_eeprom(sp, (eeprom->offset + cnt), valid, 0)) {
			DBG_PRINT(ERR_DBG,
				  "ETHTOOL_WRITE_EEPROM Err: Cannot ");
			DBG_PRINT(ERR_DBG,
				  "write into the specified offset\n");
			return -EFAULT;
		}
		cnt++;
		len--;
	}

	return 0;
}

/**
5903 5904
 * s2io_register_test - reads and writes into all clock domains.
 * @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
5905 5906 5907 5908 5909 5910 5911 5912 5913 5914
 * s2io_nic structure.
 * @data : variable that returns the result of each of the test conducted b
 * by the driver.
 * Description:
 * Read and write into all clock domains. The NIC has 3 clock domains,
 * see that registers in all the three regions are accessible.
 * Return value:
 * 0 on success.
 */

R
Ralf Baechle 已提交
5915
static int s2io_register_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
5916
{
R
Ralf Baechle 已提交
5917
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
5918
	u64 val64 = 0, exp_val;
L
Linus Torvalds 已提交
5919 5920
	int fail = 0;

5921 5922
	val64 = readq(&bar0->pif_rd_swapper_fb);
	if (val64 != 0x123456789abcdefULL) {
L
Linus Torvalds 已提交
5923 5924 5925 5926 5927 5928 5929 5930 5931 5932 5933
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 1 fails\n");
	}

	val64 = readq(&bar0->rmac_pause_cfg);
	if (val64 != 0xc000ffff00000000ULL) {
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 2 fails\n");
	}

	val64 = readq(&bar0->rx_queue_cfg);
5934 5935 5936 5937 5938
	if (sp->device_type == XFRAME_II_DEVICE)
		exp_val = 0x0404040404040404ULL;
	else
		exp_val = 0x0808080808080808ULL;
	if (val64 != exp_val) {
L
Linus Torvalds 已提交
5939 5940 5941 5942 5943 5944 5945 5946 5947 5948 5949 5950 5951 5952 5953 5954 5955 5956 5957 5958 5959 5960 5961 5962 5963 5964 5965
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 3 fails\n");
	}

	val64 = readq(&bar0->xgxs_efifo_cfg);
	if (val64 != 0x000000001923141EULL) {
		fail = 1;
		DBG_PRINT(INFO_DBG, "Read Test level 4 fails\n");
	}

	val64 = 0x5A5A5A5A5A5A5A5AULL;
	writeq(val64, &bar0->xmsi_data);
	val64 = readq(&bar0->xmsi_data);
	if (val64 != 0x5A5A5A5A5A5A5A5AULL) {
		fail = 1;
		DBG_PRINT(ERR_DBG, "Write Test level 1 fails\n");
	}

	val64 = 0xA5A5A5A5A5A5A5A5ULL;
	writeq(val64, &bar0->xmsi_data);
	val64 = readq(&bar0->xmsi_data);
	if (val64 != 0xA5A5A5A5A5A5A5A5ULL) {
		fail = 1;
		DBG_PRINT(ERR_DBG, "Write Test level 2 fails\n");
	}

	*data = fail;
5966
	return fail;
L
Linus Torvalds 已提交
5967 5968 5969
}

/**
5970
 * s2io_eeprom_test - to verify that EEprom in the xena can be programmed.
L
Linus Torvalds 已提交
5971 5972 5973 5974 5975
 * @sp : private member of the device structure, which is a pointer to the
 * s2io_nic structure.
 * @data:variable that returns the result of each of the test conducted by
 * the driver.
 * Description:
5976
 * Verify that EEPROM in the xena can be programmed using I2C_CONTROL
L
Linus Torvalds 已提交
5977 5978 5979 5980 5981
 * register.
 * Return value:
 * 0 on success.
 */

R
Ralf Baechle 已提交
5982
static int s2io_eeprom_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
5983 5984
{
	int fail = 0;
5985 5986 5987
	u64 ret_data, org_4F0, org_7F0;
	u8 saved_4F0 = 0, saved_7F0 = 0;
	struct net_device *dev = sp->dev;
L
Linus Torvalds 已提交
5988 5989

	/* Test Write Error at offset 0 */
5990 5991 5992 5993 5994 5995 5996 5997 5998 5999 6000 6001
	/* Note that SPI interface allows write access to all areas
	 * of EEPROM. Hence doing all negative testing only for Xframe I.
	 */
	if (sp->device_type == XFRAME_I_DEVICE)
		if (!write_eeprom(sp, 0, 0, 3))
			fail = 1;

	/* Save current values at offsets 0x4F0 and 0x7F0 */
	if (!read_eeprom(sp, 0x4F0, &org_4F0))
		saved_4F0 = 1;
	if (!read_eeprom(sp, 0x7F0, &org_7F0))
		saved_7F0 = 1;
L
Linus Torvalds 已提交
6002 6003

	/* Test Write at offset 4f0 */
6004
	if (write_eeprom(sp, 0x4F0, 0x012345, 3))
L
Linus Torvalds 已提交
6005 6006 6007 6008
		fail = 1;
	if (read_eeprom(sp, 0x4F0, &ret_data))
		fail = 1;

6009
	if (ret_data != 0x012345) {
6010 6011 6012 6013
		DBG_PRINT(ERR_DBG, "%s: eeprom test error at offset 0x4F0. "
			"Data written %llx Data read %llx\n",
			dev->name, (unsigned long long)0x12345,
			(unsigned long long)ret_data);
L
Linus Torvalds 已提交
6014
		fail = 1;
6015
	}
L
Linus Torvalds 已提交
6016 6017

	/* Reset the EEPROM data go FFFF */
6018
	write_eeprom(sp, 0x4F0, 0xFFFFFF, 3);
L
Linus Torvalds 已提交
6019 6020

	/* Test Write Request Error at offset 0x7c */
6021 6022 6023
	if (sp->device_type == XFRAME_I_DEVICE)
		if (!write_eeprom(sp, 0x07C, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
6024

6025 6026
	/* Test Write Request at offset 0x7f0 */
	if (write_eeprom(sp, 0x7F0, 0x012345, 3))
L
Linus Torvalds 已提交
6027
		fail = 1;
6028
	if (read_eeprom(sp, 0x7F0, &ret_data))
L
Linus Torvalds 已提交
6029 6030
		fail = 1;

6031
	if (ret_data != 0x012345) {
6032 6033 6034 6035
		DBG_PRINT(ERR_DBG, "%s: eeprom test error at offset 0x7F0. "
			"Data written %llx Data read %llx\n",
			dev->name, (unsigned long long)0x12345,
			(unsigned long long)ret_data);
L
Linus Torvalds 已提交
6036
		fail = 1;
6037
	}
L
Linus Torvalds 已提交
6038 6039

	/* Reset the EEPROM data go FFFF */
6040
	write_eeprom(sp, 0x7F0, 0xFFFFFF, 3);
L
Linus Torvalds 已提交
6041

6042 6043 6044 6045
	if (sp->device_type == XFRAME_I_DEVICE) {
		/* Test Write Error at offset 0x80 */
		if (!write_eeprom(sp, 0x080, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
6046

6047 6048 6049
		/* Test Write Error at offset 0xfc */
		if (!write_eeprom(sp, 0x0FC, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
6050

6051 6052 6053
		/* Test Write Error at offset 0x100 */
		if (!write_eeprom(sp, 0x100, 0, 3))
			fail = 1;
L
Linus Torvalds 已提交
6054

6055 6056 6057 6058 6059 6060 6061 6062 6063 6064
		/* Test Write Error at offset 4ec */
		if (!write_eeprom(sp, 0x4EC, 0, 3))
			fail = 1;
	}

	/* Restore values at offsets 0x4F0 and 0x7F0 */
	if (saved_4F0)
		write_eeprom(sp, 0x4F0, org_4F0, 3);
	if (saved_7F0)
		write_eeprom(sp, 0x7F0, org_7F0, 3);
L
Linus Torvalds 已提交
6065 6066

	*data = fail;
6067
	return fail;
L
Linus Torvalds 已提交
6068 6069 6070 6071
}

/**
 * s2io_bist_test - invokes the MemBist test of the card .
6072
 * @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
6073
 * s2io_nic structure.
6074
 * @data:variable that returns the result of each of the test conducted by
L
Linus Torvalds 已提交
6075 6076 6077 6078
 * the driver.
 * Description:
 * This invokes the MemBist test of the card. We give around
 * 2 secs time for the Test to complete. If it's still not complete
6079
 * within this peiod, we consider that the test failed.
L
Linus Torvalds 已提交
6080 6081 6082 6083
 * Return value:
 * 0 on success and -1 on failure.
 */

R
Ralf Baechle 已提交
6084
static int s2io_bist_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
6085 6086 6087 6088 6089 6090 6091 6092 6093 6094 6095 6096 6097 6098 6099 6100 6101 6102 6103 6104 6105 6106 6107
{
	u8 bist = 0;
	int cnt = 0, ret = -1;

	pci_read_config_byte(sp->pdev, PCI_BIST, &bist);
	bist |= PCI_BIST_START;
	pci_write_config_word(sp->pdev, PCI_BIST, bist);

	while (cnt < 20) {
		pci_read_config_byte(sp->pdev, PCI_BIST, &bist);
		if (!(bist & PCI_BIST_START)) {
			*data = (bist & PCI_BIST_CODE_MASK);
			ret = 0;
			break;
		}
		msleep(100);
		cnt++;
	}

	return ret;
}

/**
6108 6109
 * s2io-link_test - verifies the link state of the nic
 * @sp ; private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
6110 6111 6112 6113
 * s2io_nic structure.
 * @data: variable that returns the result of each of the test conducted by
 * the driver.
 * Description:
6114
 * The function verifies the link state of the NIC and updates the input
L
Linus Torvalds 已提交
6115 6116 6117 6118 6119
 * argument 'data' appropriately.
 * Return value:
 * 0 on success.
 */

R
Ralf Baechle 已提交
6120
static int s2io_link_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
6121
{
R
Ralf Baechle 已提交
6122
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
6123 6124 6125
	u64 val64;

	val64 = readq(&bar0->adapter_status);
A
Ananda Raju 已提交
6126
	if(!(LINK_IS_UP(val64)))
L
Linus Torvalds 已提交
6127
		*data = 1;
A
Ananda Raju 已提交
6128 6129
	else
		*data = 0;
L
Linus Torvalds 已提交
6130

6131
	return *data;
L
Linus Torvalds 已提交
6132 6133 6134
}

/**
6135 6136
 * s2io_rldram_test - offline test for access to the RldRam chip on the NIC
 * @sp - private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
6137
 * s2io_nic structure.
6138
 * @data - variable that returns the result of each of the test
L
Linus Torvalds 已提交
6139 6140
 * conducted by the driver.
 * Description:
6141
 *  This is one of the offline test that tests the read and write
L
Linus Torvalds 已提交
6142 6143 6144 6145 6146
 *  access to the RldRam chip on the NIC.
 * Return value:
 *  0 on success.
 */

R
Ralf Baechle 已提交
6147
static int s2io_rldram_test(struct s2io_nic * sp, uint64_t * data)
L
Linus Torvalds 已提交
6148
{
R
Ralf Baechle 已提交
6149
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
L
Linus Torvalds 已提交
6150
	u64 val64;
6151
	int cnt, iteration = 0, test_fail = 0;
L
Linus Torvalds 已提交
6152 6153 6154 6155 6156 6157 6158

	val64 = readq(&bar0->adapter_control);
	val64 &= ~ADAPTER_ECC_EN;
	writeq(val64, &bar0->adapter_control);

	val64 = readq(&bar0->mc_rldram_test_ctrl);
	val64 |= MC_RLDRAM_TEST_MODE;
6159
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
L
Linus Torvalds 已提交
6160 6161 6162 6163 6164 6165 6166 6167 6168 6169 6170 6171 6172 6173 6174 6175 6176 6177 6178 6179 6180 6181 6182 6183 6184 6185 6186

	val64 = readq(&bar0->mc_rldram_mrs);
	val64 |= MC_RLDRAM_QUEUE_SIZE_ENABLE;
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);

	val64 |= MC_RLDRAM_MRS_ENABLE;
	SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);

	while (iteration < 2) {
		val64 = 0x55555555aaaa0000ULL;
		if (iteration == 1) {
			val64 ^= 0xFFFFFFFFFFFF0000ULL;
		}
		writeq(val64, &bar0->mc_rldram_test_d0);

		val64 = 0xaaaa5a5555550000ULL;
		if (iteration == 1) {
			val64 ^= 0xFFFFFFFFFFFF0000ULL;
		}
		writeq(val64, &bar0->mc_rldram_test_d1);

		val64 = 0x55aaaaaaaa5a0000ULL;
		if (iteration == 1) {
			val64 ^= 0xFFFFFFFFFFFF0000ULL;
		}
		writeq(val64, &bar0->mc_rldram_test_d2);

6187
		val64 = (u64) (0x0000003ffffe0100ULL);
L
Linus Torvalds 已提交
6188 6189
		writeq(val64, &bar0->mc_rldram_test_add);

6190 6191 6192
		val64 = MC_RLDRAM_TEST_MODE | MC_RLDRAM_TEST_WRITE |
		    	MC_RLDRAM_TEST_GO;
		SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
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6193 6194 6195 6196 6197 6198 6199 6200 6201 6202 6203

		for (cnt = 0; cnt < 5; cnt++) {
			val64 = readq(&bar0->mc_rldram_test_ctrl);
			if (val64 & MC_RLDRAM_TEST_DONE)
				break;
			msleep(200);
		}

		if (cnt == 5)
			break;

6204 6205
		val64 = MC_RLDRAM_TEST_MODE | MC_RLDRAM_TEST_GO;
		SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
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Linus Torvalds 已提交
6206 6207 6208 6209 6210 6211 6212 6213 6214 6215 6216 6217

		for (cnt = 0; cnt < 5; cnt++) {
			val64 = readq(&bar0->mc_rldram_test_ctrl);
			if (val64 & MC_RLDRAM_TEST_DONE)
				break;
			msleep(500);
		}

		if (cnt == 5)
			break;

		val64 = readq(&bar0->mc_rldram_test_ctrl);
6218 6219
		if (!(val64 & MC_RLDRAM_TEST_PASS))
			test_fail = 1;
L
Linus Torvalds 已提交
6220 6221 6222 6223

		iteration++;
	}

6224
	*data = test_fail;
L
Linus Torvalds 已提交
6225

6226 6227 6228 6229
	/* Bring the adapter out of test mode */
	SPECIAL_REG_WRITE(0, &bar0->mc_rldram_test_ctrl, LF);

	return test_fail;
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6230 6231 6232 6233 6234 6235 6236 6237
}

/**
 *  s2io_ethtool_test - conducts 6 tsets to determine the health of card.
 *  @sp : private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
 *  @ethtest : pointer to a ethtool command specific structure that will be
 *  returned to the user.
6238
 *  @data : variable that returns the result of each of the test
L
Linus Torvalds 已提交
6239 6240 6241 6242 6243 6244 6245 6246 6247 6248 6249 6250
 * conducted by the driver.
 * Description:
 *  This function conducts 6 tests ( 4 offline and 2 online) to determine
 *  the health of the card.
 * Return value:
 *  void
 */

static void s2io_ethtool_test(struct net_device *dev,
			      struct ethtool_test *ethtest,
			      uint64_t * data)
{
R
Ralf Baechle 已提交
6251
	struct s2io_nic *sp = dev->priv;
L
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6252 6253 6254 6255
	int orig_state = netif_running(sp->dev);

	if (ethtest->flags == ETH_TEST_FL_OFFLINE) {
		/* Offline Tests. */
6256
		if (orig_state)
L
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6257 6258 6259 6260 6261 6262 6263 6264 6265 6266 6267 6268 6269 6270 6271 6272 6273 6274 6275 6276 6277 6278 6279 6280 6281 6282 6283 6284 6285 6286 6287 6288 6289 6290 6291 6292 6293 6294 6295 6296 6297 6298 6299 6300 6301 6302 6303 6304 6305
			s2io_close(sp->dev);

		if (s2io_register_test(sp, &data[0]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		s2io_reset(sp);

		if (s2io_rldram_test(sp, &data[3]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		s2io_reset(sp);

		if (s2io_eeprom_test(sp, &data[1]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		if (s2io_bist_test(sp, &data[4]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		if (orig_state)
			s2io_open(sp->dev);

		data[2] = 0;
	} else {
		/* Online Tests. */
		if (!orig_state) {
			DBG_PRINT(ERR_DBG,
				  "%s: is not up, cannot run test\n",
				  dev->name);
			data[0] = -1;
			data[1] = -1;
			data[2] = -1;
			data[3] = -1;
			data[4] = -1;
		}

		if (s2io_link_test(sp, &data[2]))
			ethtest->flags |= ETH_TEST_FL_FAILED;

		data[0] = 0;
		data[1] = 0;
		data[3] = 0;
		data[4] = 0;
	}
}

static void s2io_get_ethtool_stats(struct net_device *dev,
				   struct ethtool_stats *estats,
				   u64 * tmp_stats)
{
6306
	int i = 0, k;
R
Ralf Baechle 已提交
6307 6308
	struct s2io_nic *sp = dev->priv;
	struct stat_block *stat_info = sp->mac_control.stats_info;
L
Linus Torvalds 已提交
6309

6310
	s2io_updt_stats(sp);
6311 6312 6313 6314 6315 6316
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_frms_oflow) << 32  |
		le32_to_cpu(stat_info->tmac_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_data_octets_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_data_octets);
L
Linus Torvalds 已提交
6317
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_drop_frms);
6318 6319 6320 6321 6322 6323
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_mcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_mcst_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_bcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_bcst_frms);
L
Linus Torvalds 已提交
6324
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_pause_ctrl_frms);
6325 6326 6327 6328 6329 6330 6331 6332 6333
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->tmac_ttl_octets_oflow) << 32 |
                le32_to_cpu(stat_info->tmac_ttl_octets);
	tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->tmac_ucst_frms_oflow) << 32 |
                le32_to_cpu(stat_info->tmac_ucst_frms);
	tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->tmac_nucst_frms_oflow) << 32 |
                le32_to_cpu(stat_info->tmac_nucst_frms);
6334 6335 6336
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_any_err_frms_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_any_err_frms);
6337
        tmp_stats[i++] = le64_to_cpu(stat_info->tmac_ttl_less_fb_octets);
L
Linus Torvalds 已提交
6338
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_vld_ip_octets);
6339 6340 6341 6342 6343 6344 6345 6346 6347 6348 6349 6350
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_vld_ip_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_vld_ip);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_drop_ip_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_drop_ip);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_icmp_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_icmp);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->tmac_rst_tcp_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_rst_tcp);
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Linus Torvalds 已提交
6351
	tmp_stats[i++] = le64_to_cpu(stat_info->tmac_tcp);
6352 6353 6354 6355 6356 6357 6358 6359
	tmp_stats[i++] = (u64)le32_to_cpu(stat_info->tmac_udp_oflow) << 32 |
		le32_to_cpu(stat_info->tmac_udp);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_vld_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_vld_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_data_octets_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_data_octets);
L
Linus Torvalds 已提交
6360 6361
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_fcs_err_frms);
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_drop_frms);
6362 6363 6364 6365 6366 6367
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_vld_mcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_vld_mcst_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_vld_bcst_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_vld_bcst_frms);
L
Linus Torvalds 已提交
6368
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_in_rng_len_err_frms);
6369
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_out_rng_len_err_frms);
L
Linus Torvalds 已提交
6370 6371
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_long_frms);
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_pause_ctrl_frms);
6372 6373 6374 6375 6376 6377 6378 6379 6380 6381
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_unsup_ctrl_frms);
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_ttl_octets_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_ttl_octets);
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_accepted_ucst_frms_oflow)
		<< 32 | le32_to_cpu(stat_info->rmac_accepted_ucst_frms);
	tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_accepted_nucst_frms_oflow)
                 << 32 | le32_to_cpu(stat_info->rmac_accepted_nucst_frms);
6382 6383 6384
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_discarded_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_discarded_frms);
6385 6386 6387 6388 6389
        tmp_stats[i++] =
                (u64)le32_to_cpu(stat_info->rmac_drop_events_oflow)
                 << 32 | le32_to_cpu(stat_info->rmac_drop_events);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_less_fb_octets);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_frms);
6390 6391 6392 6393 6394 6395 6396 6397 6398 6399 6400 6401
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_usized_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_usized_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_osized_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_osized_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_frag_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_frag_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_jabber_frms_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_jabber_frms);
6402 6403 6404 6405 6406 6407 6408 6409
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_64_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_65_127_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_128_255_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_256_511_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_512_1023_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_1024_1518_frms);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_ip_oflow) << 32 |
6410
		le32_to_cpu(stat_info->rmac_ip);
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Linus Torvalds 已提交
6411 6412
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ip_octets);
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_hdr_err_ip);
6413 6414
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_drop_ip_oflow) << 32 |
6415
		le32_to_cpu(stat_info->rmac_drop_ip);
6416 6417
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_icmp_oflow) << 32 |
6418
		le32_to_cpu(stat_info->rmac_icmp);
L
Linus Torvalds 已提交
6419
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_tcp);
6420 6421
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_udp_oflow) << 32 |
6422 6423 6424 6425
		le32_to_cpu(stat_info->rmac_udp);
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_err_drp_udp_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_err_drp_udp);
6426 6427 6428 6429 6430 6431 6432 6433 6434 6435 6436 6437 6438 6439 6440 6441 6442
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_err_sym);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q0);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q1);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q2);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q3);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q4);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q5);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q6);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q7);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q0);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q1);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q2);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q3);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q4);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q5);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q6);
        tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q7);
6443 6444 6445
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_pause_cnt_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_pause_cnt);
6446 6447
	tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_data_err_cnt);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_ctrl_err_cnt);
6448 6449 6450
	tmp_stats[i++] =
		(u64)le32_to_cpu(stat_info->rmac_accepted_ip_oflow) << 32 |
		le32_to_cpu(stat_info->rmac_accepted_ip);
L
Linus Torvalds 已提交
6451
	tmp_stats[i++] = le32_to_cpu(stat_info->rmac_err_tcp);
6452 6453 6454 6455 6456 6457 6458 6459 6460 6461 6462 6463 6464 6465 6466 6467 6468 6469
	tmp_stats[i++] = le32_to_cpu(stat_info->rd_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_rd_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_rd_req_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rd_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_rtry_rd_ack_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_wr_req_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->new_wr_req_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_rtry_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->wr_disc_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rd_rtry_wr_ack_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txp_wr_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txd_rd_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txd_wr_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rxd_rd_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rxd_wr_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->txf_rd_cnt);
	tmp_stats[i++] = le32_to_cpu(stat_info->rxf_wr_cnt);
6470 6471 6472 6473 6474 6475 6476 6477 6478 6479 6480 6481 6482 6483 6484 6485 6486 6487 6488 6489 6490 6491 6492 6493

	/* Enhanced statistics exist only for Hercules */
	if(sp->device_type == XFRAME_II_DEVICE) {
		tmp_stats[i++] =
				le64_to_cpu(stat_info->rmac_ttl_1519_4095_frms);
		tmp_stats[i++] =
				le64_to_cpu(stat_info->rmac_ttl_4096_8191_frms);
		tmp_stats[i++] =
				le64_to_cpu(stat_info->rmac_ttl_8192_max_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_gt_max_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_osized_alt_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_jabber_alt_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_gt_max_alt_frms);
		tmp_stats[i++] = le64_to_cpu(stat_info->rmac_vlan_frms);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_len_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_fcs_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_pf_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_da_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_red_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_rts_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->rmac_ingm_full_discard);
		tmp_stats[i++] = le32_to_cpu(stat_info->link_fault_cnt);
	}

6494 6495 6496
	tmp_stats[i++] = 0;
	tmp_stats[i++] = stat_info->sw_stat.single_ecc_errs;
	tmp_stats[i++] = stat_info->sw_stat.double_ecc_errs;
6497 6498 6499 6500
	tmp_stats[i++] = stat_info->sw_stat.parity_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.serious_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.soft_reset_cnt;
	tmp_stats[i++] = stat_info->sw_stat.fifo_full_cnt;
6501 6502
	for (k = 0; k < MAX_RX_RINGS; k++)
		tmp_stats[i++] = stat_info->sw_stat.ring_full_cnt[k];
6503 6504 6505 6506 6507 6508 6509 6510 6511 6512 6513 6514
	tmp_stats[i++] = stat_info->xpak_stat.alarm_transceiver_temp_high;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_transceiver_temp_low;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_bias_current_high;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_bias_current_low;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_output_power_high;
	tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_output_power_low;
	tmp_stats[i++] = stat_info->xpak_stat.warn_transceiver_temp_high;
	tmp_stats[i++] = stat_info->xpak_stat.warn_transceiver_temp_low;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_bias_current_high;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_bias_current_low;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_output_power_high;
	tmp_stats[i++] = stat_info->xpak_stat.warn_laser_output_power_low;
6515 6516 6517 6518
	tmp_stats[i++] = stat_info->sw_stat.clubbed_frms_cnt;
	tmp_stats[i++] = stat_info->sw_stat.sending_both;
	tmp_stats[i++] = stat_info->sw_stat.outof_sequence_pkts;
	tmp_stats[i++] = stat_info->sw_stat.flush_max_pkts;
6519
	if (stat_info->sw_stat.num_aggregations) {
6520 6521
		u64 tmp = stat_info->sw_stat.sum_avg_pkts_aggregated;
		int count = 0;
6522
		/*
6523 6524 6525 6526 6527 6528 6529 6530
		 * Since 64-bit divide does not work on all platforms,
		 * do repeated subtraction.
		 */
		while (tmp >= stat_info->sw_stat.num_aggregations) {
			tmp -= stat_info->sw_stat.num_aggregations;
			count++;
		}
		tmp_stats[i++] = count;
6531
	}
6532 6533
	else
		tmp_stats[i++] = 0;
6534
	tmp_stats[i++] = stat_info->sw_stat.mem_alloc_fail_cnt;
6535
	tmp_stats[i++] = stat_info->sw_stat.pci_map_fail_cnt;
6536
	tmp_stats[i++] = stat_info->sw_stat.watchdog_timer_cnt;
6537 6538 6539 6540 6541 6542 6543 6544 6545 6546 6547 6548 6549 6550 6551 6552 6553 6554 6555 6556 6557 6558
	tmp_stats[i++] = stat_info->sw_stat.mem_allocated;
	tmp_stats[i++] = stat_info->sw_stat.mem_freed;
	tmp_stats[i++] = stat_info->sw_stat.link_up_cnt;
	tmp_stats[i++] = stat_info->sw_stat.link_down_cnt;
	tmp_stats[i++] = stat_info->sw_stat.link_up_time;
	tmp_stats[i++] = stat_info->sw_stat.link_down_time;

	tmp_stats[i++] = stat_info->sw_stat.tx_buf_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_desc_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_parity_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_link_loss_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tx_list_proc_err_cnt;

	tmp_stats[i++] = stat_info->sw_stat.rx_parity_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_parity_abort_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_rda_fail_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_unkn_prot_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_fcs_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_buf_size_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_rxd_corrupt_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rx_unkn_err_cnt;
6559 6560 6561 6562 6563 6564 6565 6566 6567 6568 6569 6570 6571 6572 6573 6574 6575
	tmp_stats[i++] = stat_info->sw_stat.tda_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.pfc_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.pcc_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tti_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.tpa_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.sm_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.lso_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.mac_tmac_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.mac_rmac_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.xgxs_txgxs_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.xgxs_rxgxs_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rc_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.prc_pcix_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rpa_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rda_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.rti_err_cnt;
	tmp_stats[i++] = stat_info->sw_stat.mc_err_cnt;
L
Linus Torvalds 已提交
6576 6577
}

6578
static int s2io_ethtool_get_regs_len(struct net_device *dev)
L
Linus Torvalds 已提交
6579 6580 6581 6582 6583
{
	return (XENA_REG_SPACE);
}


6584
static u32 s2io_ethtool_get_rx_csum(struct net_device * dev)
L
Linus Torvalds 已提交
6585
{
R
Ralf Baechle 已提交
6586
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
6587 6588 6589

	return (sp->rx_csum);
}
6590 6591

static int s2io_ethtool_set_rx_csum(struct net_device *dev, u32 data)
L
Linus Torvalds 已提交
6592
{
R
Ralf Baechle 已提交
6593
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
6594 6595 6596 6597 6598 6599 6600 6601

	if (data)
		sp->rx_csum = 1;
	else
		sp->rx_csum = 0;

	return 0;
}
6602 6603

static int s2io_get_eeprom_len(struct net_device *dev)
L
Linus Torvalds 已提交
6604 6605 6606 6607
{
	return (XENA_EEPROM_SPACE);
}

6608
static int s2io_get_sset_count(struct net_device *dev, int sset)
L
Linus Torvalds 已提交
6609
{
6610 6611 6612 6613 6614 6615 6616 6617 6618 6619 6620 6621 6622 6623 6624 6625 6626
	struct s2io_nic *sp = dev->priv;

	switch (sset) {
	case ETH_SS_TEST:
		return S2IO_TEST_LEN;
	case ETH_SS_STATS:
		switch(sp->device_type) {
		case XFRAME_I_DEVICE:
			return XFRAME_I_STAT_LEN;
		case XFRAME_II_DEVICE:
			return XFRAME_II_STAT_LEN;
		default:
			return 0;
		}
	default:
		return -EOPNOTSUPP;
	}
L
Linus Torvalds 已提交
6627
}
6628 6629 6630

static void s2io_ethtool_get_strings(struct net_device *dev,
				     u32 stringset, u8 * data)
L
Linus Torvalds 已提交
6631
{
6632 6633 6634
	int stat_size = 0;
	struct s2io_nic *sp = dev->priv;

L
Linus Torvalds 已提交
6635 6636 6637 6638 6639
	switch (stringset) {
	case ETH_SS_TEST:
		memcpy(data, s2io_gstrings, S2IO_STRINGS_LEN);
		break;
	case ETH_SS_STATS:
6640 6641 6642 6643 6644 6645 6646 6647 6648 6649 6650
		stat_size = sizeof(ethtool_xena_stats_keys);
		memcpy(data, &ethtool_xena_stats_keys,stat_size);
		if(sp->device_type == XFRAME_II_DEVICE) {
			memcpy(data + stat_size,
				&ethtool_enhanced_stats_keys,
				sizeof(ethtool_enhanced_stats_keys));
			stat_size += sizeof(ethtool_enhanced_stats_keys);
		}

		memcpy(data + stat_size, &ethtool_driver_stats_keys,
			sizeof(ethtool_driver_stats_keys));
L
Linus Torvalds 已提交
6651 6652 6653
	}
}

6654
static int s2io_ethtool_op_set_tx_csum(struct net_device *dev, u32 data)
L
Linus Torvalds 已提交
6655 6656 6657 6658 6659 6660 6661 6662 6663
{
	if (data)
		dev->features |= NETIF_F_IP_CSUM;
	else
		dev->features &= ~NETIF_F_IP_CSUM;

	return 0;
}

6664 6665 6666 6667 6668 6669 6670 6671 6672 6673 6674 6675 6676
static u32 s2io_ethtool_op_get_tso(struct net_device *dev)
{
	return (dev->features & NETIF_F_TSO) != 0;
}
static int s2io_ethtool_op_set_tso(struct net_device *dev, u32 data)
{
	if (data)
		dev->features |= (NETIF_F_TSO | NETIF_F_TSO6);
	else
		dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);

	return 0;
}
L
Linus Torvalds 已提交
6677

6678
static const struct ethtool_ops netdev_ethtool_ops = {
L
Linus Torvalds 已提交
6679 6680 6681 6682 6683 6684 6685 6686 6687
	.get_settings = s2io_ethtool_gset,
	.set_settings = s2io_ethtool_sset,
	.get_drvinfo = s2io_ethtool_gdrvinfo,
	.get_regs_len = s2io_ethtool_get_regs_len,
	.get_regs = s2io_ethtool_gregs,
	.get_link = ethtool_op_get_link,
	.get_eeprom_len = s2io_get_eeprom_len,
	.get_eeprom = s2io_ethtool_geeprom,
	.set_eeprom = s2io_ethtool_seeprom,
6688
	.get_ringparam = s2io_ethtool_gringparam,
L
Linus Torvalds 已提交
6689 6690 6691 6692 6693 6694
	.get_pauseparam = s2io_ethtool_getpause_data,
	.set_pauseparam = s2io_ethtool_setpause_data,
	.get_rx_csum = s2io_ethtool_get_rx_csum,
	.set_rx_csum = s2io_ethtool_set_rx_csum,
	.set_tx_csum = s2io_ethtool_op_set_tx_csum,
	.set_sg = ethtool_op_set_sg,
6695 6696
	.get_tso = s2io_ethtool_op_get_tso,
	.set_tso = s2io_ethtool_op_set_tso,
A
Ananda Raju 已提交
6697
	.set_ufo = ethtool_op_set_ufo,
L
Linus Torvalds 已提交
6698 6699 6700
	.self_test = s2io_ethtool_test,
	.get_strings = s2io_ethtool_get_strings,
	.phys_id = s2io_ethtool_idnic,
6701 6702
	.get_ethtool_stats = s2io_get_ethtool_stats,
	.get_sset_count = s2io_get_sset_count,
L
Linus Torvalds 已提交
6703 6704 6705
};

/**
6706
 *  s2io_ioctl - Entry point for the Ioctl
L
Linus Torvalds 已提交
6707 6708 6709 6710 6711 6712
 *  @dev :  Device pointer.
 *  @ifr :  An IOCTL specefic structure, that can contain a pointer to
 *  a proprietary structure used to pass information to the driver.
 *  @cmd :  This is used to distinguish between the different commands that
 *  can be passed to the IOCTL functions.
 *  Description:
6713 6714
 *  Currently there are no special functionality supported in IOCTL, hence
 *  function always return EOPNOTSUPPORTED
L
Linus Torvalds 已提交
6715 6716
 */

6717
static int s2io_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
L
Linus Torvalds 已提交
6718 6719 6720 6721 6722 6723 6724 6725 6726 6727 6728 6729 6730 6731 6732
{
	return -EOPNOTSUPP;
}

/**
 *  s2io_change_mtu - entry point to change MTU size for the device.
 *   @dev : device pointer.
 *   @new_mtu : the new MTU size for the device.
 *   Description: A driver entry point to change MTU size for the device.
 *   Before changing the MTU the device must be stopped.
 *  Return value:
 *   0 on success and an appropriate (-)ve integer as defined in errno.h
 *   file on failure.
 */

6733
static int s2io_change_mtu(struct net_device *dev, int new_mtu)
L
Linus Torvalds 已提交
6734
{
R
Ralf Baechle 已提交
6735
	struct s2io_nic *sp = dev->priv;
6736
	int ret = 0;
L
Linus Torvalds 已提交
6737 6738 6739 6740 6741 6742 6743 6744

	if ((new_mtu < MIN_MTU) || (new_mtu > S2IO_JUMBO_SIZE)) {
		DBG_PRINT(ERR_DBG, "%s: MTU size is invalid.\n",
			  dev->name);
		return -EPERM;
	}

	dev->mtu = new_mtu;
6745
	if (netif_running(dev)) {
6746
		s2io_stop_all_tx_queue(sp);
A
Ananda Raju 已提交
6747
		s2io_card_down(sp);
6748 6749
		ret = s2io_card_up(sp);
		if (ret) {
6750 6751
			DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n",
				  __FUNCTION__);
6752
			return ret;
6753
		}
6754
		s2io_wake_all_tx_queue(sp);
6755
	} else { /* Device is down */
R
Ralf Baechle 已提交
6756
		struct XENA_dev_config __iomem *bar0 = sp->bar0;
6757 6758 6759 6760
		u64 val64 = new_mtu;

		writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);
	}
L
Linus Torvalds 已提交
6761

6762
	return ret;
L
Linus Torvalds 已提交
6763 6764 6765 6766 6767 6768 6769 6770
}

/**
 * s2io_set_link - Set the LInk status
 * @data: long pointer to device private structue
 * Description: Sets the link status for the adapter
 */

6771
static void s2io_set_link(struct work_struct *work)
L
Linus Torvalds 已提交
6772
{
R
Ralf Baechle 已提交
6773
	struct s2io_nic *nic = container_of(work, struct s2io_nic, set_link_task);
L
Linus Torvalds 已提交
6774
	struct net_device *dev = nic->dev;
R
Ralf Baechle 已提交
6775
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
L
Linus Torvalds 已提交
6776 6777 6778
	register u64 val64;
	u16 subid;

6779 6780 6781 6782 6783
	rtnl_lock();

	if (!netif_running(dev))
		goto out_unlock;

6784
	if (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(nic->state))) {
L
Linus Torvalds 已提交
6785
		/* The card is being reset, no point doing anything */
6786
		goto out_unlock;
L
Linus Torvalds 已提交
6787 6788 6789
	}

	subid = nic->pdev->subsystem_device;
6790 6791 6792 6793 6794 6795 6796
	if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
		/*
		 * Allow a small delay for the NICs self initiated
		 * cleanup to complete.
		 */
		msleep(100);
	}
L
Linus Torvalds 已提交
6797 6798

	val64 = readq(&bar0->adapter_status);
6799 6800 6801 6802 6803
	if (LINK_IS_UP(val64)) {
		if (!(readq(&bar0->adapter_control) & ADAPTER_CNTL_EN)) {
			if (verify_xena_quiescence(nic)) {
				val64 = readq(&bar0->adapter_control);
				val64 |= ADAPTER_CNTL_EN;
L
Linus Torvalds 已提交
6804
				writeq(val64, &bar0->adapter_control);
6805 6806 6807 6808 6809 6810 6811 6812 6813
				if (CARDS_WITH_FAULTY_LINK_INDICATORS(
					nic->device_type, subid)) {
					val64 = readq(&bar0->gpio_control);
					val64 |= GPIO_CTRL_GPIO_0;
					writeq(val64, &bar0->gpio_control);
					val64 = readq(&bar0->gpio_control);
				} else {
					val64 |= ADAPTER_LED_ON;
					writeq(val64, &bar0->adapter_control);
6814
				}
L
Linus Torvalds 已提交
6815
				nic->device_enabled_once = TRUE;
6816 6817 6818
			} else {
				DBG_PRINT(ERR_DBG, "%s: Error: ", dev->name);
				DBG_PRINT(ERR_DBG, "device is not Quiescent\n");
6819
				s2io_stop_all_tx_queue(nic);
L
Linus Torvalds 已提交
6820
			}
6821
		}
6822 6823 6824 6825
		val64 = readq(&bar0->adapter_control);
		val64 |= ADAPTER_LED_ON;
		writeq(val64, &bar0->adapter_control);
		s2io_link(nic, LINK_UP);
6826 6827 6828 6829 6830 6831 6832
	} else {
		if (CARDS_WITH_FAULTY_LINK_INDICATORS(nic->device_type,
						      subid)) {
			val64 = readq(&bar0->gpio_control);
			val64 &= ~GPIO_CTRL_GPIO_0;
			writeq(val64, &bar0->gpio_control);
			val64 = readq(&bar0->gpio_control);
L
Linus Torvalds 已提交
6833
		}
6834 6835 6836 6837
		/* turn off LED */
		val64 = readq(&bar0->adapter_control);
		val64 = val64 &(~ADAPTER_LED_ON);
		writeq(val64, &bar0->adapter_control);
6838
		s2io_link(nic, LINK_DOWN);
L
Linus Torvalds 已提交
6839
	}
6840
	clear_bit(__S2IO_STATE_LINK_TASK, &(nic->state));
6841 6842

out_unlock:
6843
	rtnl_unlock();
L
Linus Torvalds 已提交
6844 6845
}

R
Ralf Baechle 已提交
6846 6847 6848 6849
static int set_rxd_buffer_pointer(struct s2io_nic *sp, struct RxD_t *rxdp,
				struct buffAdd *ba,
				struct sk_buff **skb, u64 *temp0, u64 *temp1,
				u64 *temp2, int size)
6850 6851
{
	struct net_device *dev = sp->dev;
6852
	struct swStat *stats = &sp->mac_control.stats_info->sw_stat;
6853 6854

	if ((sp->rxd_mode == RXD_MODE_1) && (rxdp->Host_Control == 0)) {
6855
		struct RxD1 *rxdp1 = (struct RxD1 *)rxdp;
6856 6857 6858 6859 6860 6861 6862 6863
		/* allocate skb */
		if (*skb) {
			DBG_PRINT(INFO_DBG, "SKB is not NULL\n");
			/*
			 * As Rx frame are not going to be processed,
			 * using same mapped address for the Rxd
			 * buffer pointer
			 */
6864
			rxdp1->Buffer0_ptr = *temp0;
6865 6866 6867
		} else {
			*skb = dev_alloc_skb(size);
			if (!(*skb)) {
6868
				DBG_PRINT(INFO_DBG, "%s: Out of ", dev->name);
6869 6870 6871 6872
				DBG_PRINT(INFO_DBG, "memory to allocate ");
				DBG_PRINT(INFO_DBG, "1 buf mode SKBs\n");
				sp->mac_control.stats_info->sw_stat. \
					mem_alloc_fail_cnt++;
6873 6874
				return -ENOMEM ;
			}
6875
			sp->mac_control.stats_info->sw_stat.mem_allocated
6876
				+= (*skb)->truesize;
6877 6878 6879 6880
			/* storing the mapped addr in a temp variable
			 * such it will be used for next rxd whose
			 * Host Control is NULL
			 */
6881
			rxdp1->Buffer0_ptr = *temp0 =
6882 6883 6884
				pci_map_single( sp->pdev, (*skb)->data,
					size - NET_IP_ALIGN,
					PCI_DMA_FROMDEVICE);
6885 6886 6887 6888
			if( (rxdp1->Buffer0_ptr == 0) ||
				(rxdp1->Buffer0_ptr == DMA_ERROR_CODE)) {
				goto memalloc_failed;
			}
6889 6890 6891
			rxdp->Host_Control = (unsigned long) (*skb);
		}
	} else if ((sp->rxd_mode == RXD_MODE_3B) && (rxdp->Host_Control == 0)) {
6892
		struct RxD3 *rxdp3 = (struct RxD3 *)rxdp;
6893 6894
		/* Two buffer Mode */
		if (*skb) {
6895 6896 6897
			rxdp3->Buffer2_ptr = *temp2;
			rxdp3->Buffer0_ptr = *temp0;
			rxdp3->Buffer1_ptr = *temp1;
6898 6899
		} else {
			*skb = dev_alloc_skb(size);
6900
			if (!(*skb)) {
6901 6902 6903 6904 6905
				DBG_PRINT(INFO_DBG, "%s: Out of ", dev->name);
				DBG_PRINT(INFO_DBG, "memory to allocate ");
				DBG_PRINT(INFO_DBG, "2 buf mode SKBs\n");
				sp->mac_control.stats_info->sw_stat. \
					mem_alloc_fail_cnt++;
6906 6907
				return -ENOMEM;
			}
6908
			sp->mac_control.stats_info->sw_stat.mem_allocated
6909
				+= (*skb)->truesize;
6910
			rxdp3->Buffer2_ptr = *temp2 =
6911 6912 6913
				pci_map_single(sp->pdev, (*skb)->data,
					       dev->mtu + 4,
					       PCI_DMA_FROMDEVICE);
6914 6915 6916 6917
			if( (rxdp3->Buffer2_ptr == 0) ||
				(rxdp3->Buffer2_ptr == DMA_ERROR_CODE)) {
				goto memalloc_failed;
			}
6918
			rxdp3->Buffer0_ptr = *temp0 =
6919 6920
				pci_map_single( sp->pdev, ba->ba_0, BUF0_LEN,
						PCI_DMA_FROMDEVICE);
6921 6922 6923
			if( (rxdp3->Buffer0_ptr == 0) ||
				(rxdp3->Buffer0_ptr == DMA_ERROR_CODE)) {
				pci_unmap_single (sp->pdev,
A
Al Viro 已提交
6924
					(dma_addr_t)rxdp3->Buffer2_ptr,
6925 6926 6927
					dev->mtu + 4, PCI_DMA_FROMDEVICE);
				goto memalloc_failed;
			}
6928 6929 6930
			rxdp->Host_Control = (unsigned long) (*skb);

			/* Buffer-1 will be dummy buffer not used */
6931
			rxdp3->Buffer1_ptr = *temp1 =
6932 6933
				pci_map_single(sp->pdev, ba->ba_1, BUF1_LEN,
						PCI_DMA_FROMDEVICE);
6934 6935 6936
			if( (rxdp3->Buffer1_ptr == 0) ||
				(rxdp3->Buffer1_ptr == DMA_ERROR_CODE)) {
				pci_unmap_single (sp->pdev,
A
Al Viro 已提交
6937 6938 6939 6940
					(dma_addr_t)rxdp3->Buffer0_ptr,
					BUF0_LEN, PCI_DMA_FROMDEVICE);
				pci_unmap_single (sp->pdev,
					(dma_addr_t)rxdp3->Buffer2_ptr,
6941 6942 6943
					dev->mtu + 4, PCI_DMA_FROMDEVICE);
				goto memalloc_failed;
			}
6944 6945 6946
		}
	}
	return 0;
6947 6948 6949 6950 6951
	memalloc_failed:
		stats->pci_map_fail_cnt++;
		stats->mem_freed += (*skb)->truesize;
		dev_kfree_skb(*skb);
		return -ENOMEM;
6952
}
6953

R
Ralf Baechle 已提交
6954 6955
static void set_rxd_buffer_size(struct s2io_nic *sp, struct RxD_t *rxdp,
				int size)
6956 6957 6958 6959 6960 6961 6962 6963 6964 6965 6966
{
	struct net_device *dev = sp->dev;
	if (sp->rxd_mode == RXD_MODE_1) {
		rxdp->Control_2 = SET_BUFFER0_SIZE_1( size - NET_IP_ALIGN);
	} else if (sp->rxd_mode == RXD_MODE_3B) {
		rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN);
		rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1);
		rxdp->Control_2 |= SET_BUFFER2_SIZE_3( dev->mtu + 4);
	}
}

R
Ralf Baechle 已提交
6967
static  int rxd_owner_bit_reset(struct s2io_nic *sp)
6968 6969
{
	int i, j, k, blk_cnt = 0, size;
R
Ralf Baechle 已提交
6970
	struct mac_info * mac_control = &sp->mac_control;
6971 6972
	struct config_param *config = &sp->config;
	struct net_device *dev = sp->dev;
R
Ralf Baechle 已提交
6973
	struct RxD_t *rxdp = NULL;
6974
	struct sk_buff *skb = NULL;
R
Ralf Baechle 已提交
6975
	struct buffAdd *ba = NULL;
6976 6977 6978 6979 6980 6981 6982 6983 6984 6985 6986 6987 6988 6989 6990 6991 6992 6993
	u64 temp0_64 = 0, temp1_64 = 0, temp2_64 = 0;

	/* Calculate the size based on ring mode */
	size = dev->mtu + HEADER_ETHERNET_II_802_3_SIZE +
		HEADER_802_2_SIZE + HEADER_SNAP_SIZE;
	if (sp->rxd_mode == RXD_MODE_1)
		size += NET_IP_ALIGN;
	else if (sp->rxd_mode == RXD_MODE_3B)
		size = dev->mtu + ALIGN_SIZE + BUF0_LEN + 4;

	for (i = 0; i < config->rx_ring_num; i++) {
		blk_cnt = config->rx_cfg[i].num_rxd /
			(rxd_count[sp->rxd_mode] +1);

		for (j = 0; j < blk_cnt; j++) {
			for (k = 0; k < rxd_count[sp->rxd_mode]; k++) {
				rxdp = mac_control->rings[i].
					rx_blocks[j].rxds[k].virt_addr;
6994
				if(sp->rxd_mode == RXD_MODE_3B)
6995
					ba = &mac_control->rings[i].ba[j][k];
6996
				if (set_rxd_buffer_pointer(sp, rxdp, ba,
6997 6998
						       &skb,(u64 *)&temp0_64,
						       (u64 *)&temp1_64,
6999 7000 7001 7002
						       (u64 *)&temp2_64,
							size) == ENOMEM) {
					return 0;
				}
7003 7004 7005 7006 7007 7008 7009 7010 7011 7012 7013 7014

				set_rxd_buffer_size(sp, rxdp, size);
				wmb();
				/* flip the Ownership bit to Hardware */
				rxdp->Control_1 |= RXD_OWN_XENA;
			}
		}
	}
	return 0;

}

R
Ralf Baechle 已提交
7015
static int s2io_add_isr(struct s2io_nic * sp)
L
Linus Torvalds 已提交
7016
{
A
Ananda Raju 已提交
7017
	int ret = 0;
A
Ananda Raju 已提交
7018
	struct net_device *dev = sp->dev;
A
Ananda Raju 已提交
7019
	int err = 0;
L
Linus Torvalds 已提交
7020

7021
	if (sp->config.intr_type == MSI_X)
A
Ananda Raju 已提交
7022 7023 7024
		ret = s2io_enable_msi_x(sp);
	if (ret) {
		DBG_PRINT(ERR_DBG, "%s: Defaulting to INTA\n", dev->name);
7025
		sp->config.intr_type = INTA;
7026
	}
L
Linus Torvalds 已提交
7027

R
Ralf Baechle 已提交
7028
	/* Store the values of the MSIX table in the struct s2io_nic structure */
A
Ananda Raju 已提交
7029
	store_xmsi_data(sp);
A
Ananda Raju 已提交
7030

A
Ananda Raju 已提交
7031
	/* After proper initialization of H/W, register ISR */
7032
	if (sp->config.intr_type == MSI_X) {
7033 7034
		int i, msix_rx_cnt = 0;

7035 7036 7037
		for (i = 0; i < sp->num_entries; i++) {
			if (sp->s2io_entries[i].in_use == MSIX_FLG) {
				if (sp->s2io_entries[i].type ==
7038 7039 7040 7041 7042 7043 7044 7045 7046 7047
					MSIX_RING_TYPE) {
					sprintf(sp->desc[i], "%s:MSI-X-%d-RX",
						dev->name, i);
					err = request_irq(sp->entries[i].vector,
						s2io_msix_ring_handle, 0,
						sp->desc[i],
						sp->s2io_entries[i].arg);
				} else if (sp->s2io_entries[i].type ==
					MSIX_ALARM_TYPE) {
					sprintf(sp->desc[i], "%s:MSI-X-%d-TX",
A
Ananda Raju 已提交
7048
					dev->name, i);
7049 7050 7051 7052 7053
					err = request_irq(sp->entries[i].vector,
						s2io_msix_fifo_handle, 0,
						sp->desc[i],
						sp->s2io_entries[i].arg);

7054
				}
7055 7056
				/* if either data or addr is zero print it. */
				if (!(sp->msix_info[i].addr &&
7057
					sp->msix_info[i].data)) {
7058 7059 7060
					DBG_PRINT(ERR_DBG,
						"%s @Addr:0x%llx Data:0x%llx\n",
						sp->desc[i],
7061 7062
						(unsigned long long)
						sp->msix_info[i].addr,
A
Al Viro 已提交
7063
						(unsigned long long)
7064 7065
						ntohl(sp->msix_info[i].data));
				} else
7066
					msix_rx_cnt++;
7067 7068 7069 7070 7071 7072 7073 7074 7075 7076 7077 7078
				if (err) {
					remove_msix_isr(sp);

					DBG_PRINT(ERR_DBG,
						"%s:MSI-X-%d registration "
						"failed\n", dev->name, i);

					DBG_PRINT(ERR_DBG,
						"%s: Defaulting to INTA\n",
						dev->name);
					sp->config.intr_type = INTA;
					break;
7079
				}
7080 7081
				sp->s2io_entries[i].in_use =
					MSIX_REGISTERED_SUCCESS;
7082
			}
A
Ananda Raju 已提交
7083
		}
7084 7085
		if (!err) {
			printk(KERN_INFO "MSI-X-RX %d entries enabled\n",
7086 7087 7088
				--msix_rx_cnt);
			DBG_PRINT(INFO_DBG, "MSI-X-TX entries enabled"
						" through alarm vector\n");
7089
		}
A
Ananda Raju 已提交
7090
	}
7091
	if (sp->config.intr_type == INTA) {
A
Ananda Raju 已提交
7092 7093 7094 7095 7096 7097 7098 7099 7100 7101
		err = request_irq((int) sp->pdev->irq, s2io_isr, IRQF_SHARED,
				sp->name, dev);
		if (err) {
			DBG_PRINT(ERR_DBG, "%s: ISR registration failed\n",
				  dev->name);
			return -1;
		}
	}
	return 0;
}
R
Ralf Baechle 已提交
7102
static void s2io_rem_isr(struct s2io_nic * sp)
A
Ananda Raju 已提交
7103
{
7104 7105 7106 7107
	if (sp->config.intr_type == MSI_X)
		remove_msix_isr(sp);
	else
		remove_inta_isr(sp);
A
Ananda Raju 已提交
7108 7109
}

7110
static void do_s2io_card_down(struct s2io_nic * sp, int do_io)
A
Ananda Raju 已提交
7111 7112
{
	int cnt = 0;
R
Ralf Baechle 已提交
7113
	struct XENA_dev_config __iomem *bar0 = sp->bar0;
A
Ananda Raju 已提交
7114
	register u64 val64 = 0;
7115 7116
	struct config_param *config;
	config = &sp->config;
A
Ananda Raju 已提交
7117

7118 7119 7120
	if (!is_s2io_card_up(sp))
		return;

A
Ananda Raju 已提交
7121 7122
	del_timer_sync(&sp->alarm_timer);
	/* If s2io_set_link task is executing, wait till it completes. */
7123
	while (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(sp->state))) {
A
Ananda Raju 已提交
7124 7125
		msleep(50);
	}
7126
	clear_bit(__S2IO_STATE_CARD_UP, &sp->state);
A
Ananda Raju 已提交
7127

7128
	/* Disable napi */
7129 7130 7131 7132 7133 7134 7135 7136 7137
	if (sp->config.napi) {
		int off = 0;
		if (config->intr_type ==  MSI_X) {
			for (; off < sp->config.rx_ring_num; off++)
				napi_disable(&sp->mac_control.rings[off].napi);
			}
		else
			napi_disable(&sp->napi);
	}
7138

A
Ananda Raju 已提交
7139
	/* disable Tx and Rx traffic on the NIC */
7140 7141
	if (do_io)
		stop_nic(sp);
A
Ananda Raju 已提交
7142 7143

	s2io_rem_isr(sp);
L
Linus Torvalds 已提交
7144 7145

	/* Check if the device is Quiescent and then Reset the NIC */
7146
	while(do_io) {
7147 7148 7149 7150 7151 7152 7153 7154 7155
		/* As per the HW requirement we need to replenish the
		 * receive buffer to avoid the ring bump. Since there is
		 * no intention of processing the Rx frame at this pointwe are
		 * just settting the ownership bit of rxd in Each Rx
		 * ring to HW and set the appropriate buffer size
		 * based on the ring mode
		 */
		rxd_owner_bit_reset(sp);

L
Linus Torvalds 已提交
7156
		val64 = readq(&bar0->adapter_status);
7157 7158
		if (verify_xena_quiescence(sp)) {
			if(verify_pcc_quiescent(sp, sp->device_enabled_once))
L
Linus Torvalds 已提交
7159 7160 7161 7162 7163 7164 7165 7166 7167 7168 7169 7170
			break;
		}

		msleep(50);
		cnt++;
		if (cnt == 10) {
			DBG_PRINT(ERR_DBG,
				  "s2io_close:Device not Quiescent ");
			DBG_PRINT(ERR_DBG, "adaper status reads 0x%llx\n",
				  (unsigned long long) val64);
			break;
		}
7171 7172 7173
	}
	if (do_io)
		s2io_reset(sp);
L
Linus Torvalds 已提交
7174

7175
	/* Free all Tx buffers */
L
Linus Torvalds 已提交
7176
	free_tx_buffers(sp);
7177 7178

	/* Free all Rx buffers */
L
Linus Torvalds 已提交
7179 7180
	free_rx_buffers(sp);

7181
	clear_bit(__S2IO_STATE_LINK_TASK, &(sp->state));
L
Linus Torvalds 已提交
7182 7183
}

7184 7185 7186 7187 7188
static void s2io_card_down(struct s2io_nic * sp)
{
	do_s2io_card_down(sp, 1);
}

R
Ralf Baechle 已提交
7189
static int s2io_card_up(struct s2io_nic * sp)
L
Linus Torvalds 已提交
7190
{
7191
	int i, ret = 0;
R
Ralf Baechle 已提交
7192
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
7193 7194
	struct config_param *config;
	struct net_device *dev = (struct net_device *) sp->dev;
A
Ananda Raju 已提交
7195
	u16 interruptible;
L
Linus Torvalds 已提交
7196 7197

	/* Initialize the H/W I/O registers */
7198 7199
	ret = init_nic(sp);
	if (ret != 0) {
L
Linus Torvalds 已提交
7200 7201
		DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
			  dev->name);
7202 7203 7204
		if (ret != -EIO)
			s2io_reset(sp);
		return ret;
L
Linus Torvalds 已提交
7205 7206
	}

7207 7208
	/*
	 * Initializing the Rx buffers. For now we are considering only 1
L
Linus Torvalds 已提交
7209 7210 7211 7212 7213 7214
	 * Rx ring and initializing buffers into 30 Rx blocks
	 */
	mac_control = &sp->mac_control;
	config = &sp->config;

	for (i = 0; i < config->rx_ring_num; i++) {
7215 7216 7217
		mac_control->rings[i].mtu = dev->mtu;
		ret = fill_rx_buffers(&mac_control->rings[i]);
		if (ret) {
L
Linus Torvalds 已提交
7218 7219 7220 7221 7222 7223 7224
			DBG_PRINT(ERR_DBG, "%s: Out of memory in Open\n",
				  dev->name);
			s2io_reset(sp);
			free_rx_buffers(sp);
			return -ENOMEM;
		}
		DBG_PRINT(INFO_DBG, "Buf in ring:%d is %d:\n", i,
7225
			  mac_control->rings[i].rx_bufs_left);
L
Linus Torvalds 已提交
7226
	}
7227 7228

	/* Initialise napi */
7229 7230 7231 7232 7233 7234 7235 7236 7237
	if (config->napi) {
		int i;
		if (config->intr_type ==  MSI_X) {
			for (i = 0; i < sp->config.rx_ring_num; i++)
				napi_enable(&sp->mac_control.rings[i].napi);
		} else {
			napi_enable(&sp->napi);
		}
	}
7238

7239 7240 7241 7242 7243 7244 7245
	/* Maintain the state prior to the open */
	if (sp->promisc_flg)
		sp->promisc_flg = 0;
	if (sp->m_cast_flg) {
		sp->m_cast_flg = 0;
		sp->all_multi_pos= 0;
	}
L
Linus Torvalds 已提交
7246 7247 7248 7249

	/* Setting its receive mode */
	s2io_set_multicast(dev);

7250
	if (sp->lro) {
7251
		/* Initialize max aggregatable pkts per session based on MTU */
7252 7253 7254 7255 7256 7257
		sp->lro_max_aggr_per_sess = ((1<<16) - 1) / dev->mtu;
		/* Check if we can use(if specified) user provided value */
		if (lro_max_pkts < sp->lro_max_aggr_per_sess)
			sp->lro_max_aggr_per_sess = lro_max_pkts;
	}

L
Linus Torvalds 已提交
7258 7259 7260 7261
	/* Enable Rx Traffic and interrupts on the NIC */
	if (start_nic(sp)) {
		DBG_PRINT(ERR_DBG, "%s: Starting NIC failed\n", dev->name);
		s2io_reset(sp);
A
Ananda Raju 已提交
7262 7263 7264 7265 7266 7267
		free_rx_buffers(sp);
		return -ENODEV;
	}

	/* Add interrupt service routine */
	if (s2io_add_isr(sp) != 0) {
7268
		if (sp->config.intr_type == MSI_X)
A
Ananda Raju 已提交
7269 7270
			s2io_rem_isr(sp);
		s2io_reset(sp);
L
Linus Torvalds 已提交
7271 7272 7273 7274
		free_rx_buffers(sp);
		return -ENODEV;
	}

7275 7276
	S2IO_TIMER_CONF(sp->alarm_timer, s2io_alarm_handle, sp, (HZ/2));

A
Ananda Raju 已提交
7277
	/*  Enable select interrupts */
7278
	en_dis_err_alarms(sp, ENA_ALL_INTRS, ENABLE_INTRS);
7279
	if (sp->config.intr_type != INTA)
7280
		en_dis_able_nic_intrs(sp, TX_TRAFFIC_INTR, ENABLE_INTRS);
A
Ananda Raju 已提交
7281 7282
	else {
		interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
7283
		interruptible |= TX_PIC_INTR;
A
Ananda Raju 已提交
7284 7285 7286
		en_dis_able_nic_intrs(sp, interruptible, ENABLE_INTRS);
	}

7287
	set_bit(__S2IO_STATE_CARD_UP, &sp->state);
L
Linus Torvalds 已提交
7288 7289 7290
	return 0;
}

7291
/**
L
Linus Torvalds 已提交
7292 7293 7294 7295
 * s2io_restart_nic - Resets the NIC.
 * @data : long pointer to the device private structure
 * Description:
 * This function is scheduled to be run by the s2io_tx_watchdog
7296
 * function after 0.5 secs to reset the NIC. The idea is to reduce
L
Linus Torvalds 已提交
7297 7298 7299 7300
 * the run time of the watch dog routine which is run holding a
 * spin lock.
 */

7301
static void s2io_restart_nic(struct work_struct *work)
L
Linus Torvalds 已提交
7302
{
R
Ralf Baechle 已提交
7303
	struct s2io_nic *sp = container_of(work, struct s2io_nic, rst_timer_task);
7304
	struct net_device *dev = sp->dev;
L
Linus Torvalds 已提交
7305

7306 7307 7308 7309 7310
	rtnl_lock();

	if (!netif_running(dev))
		goto out_unlock;

A
Ananda Raju 已提交
7311
	s2io_card_down(sp);
L
Linus Torvalds 已提交
7312 7313 7314 7315
	if (s2io_card_up(sp)) {
		DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n",
			  dev->name);
	}
7316
	s2io_wake_all_tx_queue(sp);
L
Linus Torvalds 已提交
7317 7318
	DBG_PRINT(ERR_DBG, "%s: was reset by Tx watchdog timer\n",
		  dev->name);
7319 7320
out_unlock:
	rtnl_unlock();
L
Linus Torvalds 已提交
7321 7322
}

7323 7324
/**
 *  s2io_tx_watchdog - Watchdog for transmit side.
L
Linus Torvalds 已提交
7325 7326 7327 7328 7329 7330 7331 7332 7333 7334 7335 7336 7337
 *  @dev : Pointer to net device structure
 *  Description:
 *  This function is triggered if the Tx Queue is stopped
 *  for a pre-defined amount of time when the Interface is still up.
 *  If the Interface is jammed in such a situation, the hardware is
 *  reset (by s2io_close) and restarted again (by s2io_open) to
 *  overcome any problem that might have been caused in the hardware.
 *  Return value:
 *  void
 */

static void s2io_tx_watchdog(struct net_device *dev)
{
R
Ralf Baechle 已提交
7338
	struct s2io_nic *sp = dev->priv;
L
Linus Torvalds 已提交
7339 7340

	if (netif_carrier_ok(dev)) {
7341
		sp->mac_control.stats_info->sw_stat.watchdog_timer_cnt++;
L
Linus Torvalds 已提交
7342
		schedule_work(&sp->rst_timer_task);
7343
		sp->mac_control.stats_info->sw_stat.soft_reset_cnt++;
L
Linus Torvalds 已提交
7344 7345 7346 7347 7348 7349 7350 7351 7352 7353
	}
}

/**
 *   rx_osm_handler - To perform some OS related operations on SKB.
 *   @sp: private member of the device structure,pointer to s2io_nic structure.
 *   @skb : the socket buffer pointer.
 *   @len : length of the packet
 *   @cksum : FCS checksum of the frame.
 *   @ring_no : the ring from which this RxD was extracted.
7354
 *   Description:
7355
 *   This function is called by the Rx interrupt serivce routine to perform
L
Linus Torvalds 已提交
7356 7357 7358 7359 7360 7361 7362 7363
 *   some OS related operations on the SKB before passing it to the upper
 *   layers. It mainly checks if the checksum is OK, if so adds it to the
 *   SKBs cksum variable, increments the Rx packet count and passes the SKB
 *   to the upper layer. If the checksum is wrong, it increments the Rx
 *   packet error count, frees the SKB and returns error.
 *   Return value:
 *   SUCCESS on success and -1 on failure.
 */
R
Ralf Baechle 已提交
7364
static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp)
L
Linus Torvalds 已提交
7365
{
R
Ralf Baechle 已提交
7366
	struct s2io_nic *sp = ring_data->nic;
7367
	struct net_device *dev = (struct net_device *) ring_data->dev;
7368 7369 7370
	struct sk_buff *skb = (struct sk_buff *)
		((unsigned long) rxdp->Host_Control);
	int ring_no = ring_data->ring_no;
L
Linus Torvalds 已提交
7371
	u16 l3_csum, l4_csum;
7372
	unsigned long long err = rxdp->Control_1 & RXD_T_CODE;
R
Ralf Baechle 已提交
7373
	struct lro *lro;
7374
	u8 err_mask;
7375

7376
	skb->dev = dev;
A
Ananda Raju 已提交
7377

7378
	if (err) {
7379 7380 7381 7382
		/* Check for parity error */
		if (err & 0x1) {
			sp->mac_control.stats_info->sw_stat.parity_err_cnt++;
		}
7383 7384
		err_mask = err >> 48;
		switch(err_mask) {
7385 7386 7387 7388 7389 7390 7391 7392 7393 7394 7395 7396 7397 7398 7399 7400 7401 7402 7403 7404 7405 7406 7407 7408 7409 7410 7411 7412 7413
			case 1:
				sp->mac_control.stats_info->sw_stat.
				rx_parity_err_cnt++;
			break;

			case 2:
				sp->mac_control.stats_info->sw_stat.
				rx_abort_cnt++;
			break;

			case 3:
				sp->mac_control.stats_info->sw_stat.
				rx_parity_abort_cnt++;
			break;

			case 4:
				sp->mac_control.stats_info->sw_stat.
				rx_rda_fail_cnt++;
			break;

			case 5:
				sp->mac_control.stats_info->sw_stat.
				rx_unkn_prot_cnt++;
			break;

			case 6:
				sp->mac_control.stats_info->sw_stat.
				rx_fcs_err_cnt++;
			break;
7414

7415 7416 7417 7418 7419 7420 7421 7422 7423 7424 7425 7426 7427 7428 7429
			case 7:
				sp->mac_control.stats_info->sw_stat.
				rx_buf_size_err_cnt++;
			break;

			case 8:
				sp->mac_control.stats_info->sw_stat.
				rx_rxd_corrupt_cnt++;
			break;

			case 15:
				sp->mac_control.stats_info->sw_stat.
				rx_unkn_err_cnt++;
			break;
		}
7430 7431 7432 7433 7434 7435 7436
		/*
		* Drop the packet if bad transfer code. Exception being
		* 0x5, which could be due to unsupported IPv6 extension header.
		* In this case, we let stack handle the packet.
		* Note that in this case, since checksum will be incorrect,
		* stack will validate the same.
		*/
7437 7438 7439
		if (err_mask != 0x5) {
			DBG_PRINT(ERR_DBG, "%s: Rx error Value: 0x%x\n",
				dev->name, err_mask);
7440
			sp->stats.rx_crc_errors++;
7441
			sp->mac_control.stats_info->sw_stat.mem_freed
7442
				+= skb->truesize;
7443
			dev_kfree_skb(skb);
7444
			ring_data->rx_bufs_left -= 1;
7445 7446 7447
			rxdp->Host_Control = 0;
			return 0;
		}
7448
	}
L
Linus Torvalds 已提交
7449

7450
	/* Updating statistics */
7451
	ring_data->rx_packets++;
7452
	rxdp->Host_Control = 0;
7453 7454
	if (sp->rxd_mode == RXD_MODE_1) {
		int len = RXD_GET_BUFFER0_SIZE_1(rxdp->Control_2);
7455

7456
		ring_data->rx_bytes += len;
7457 7458
		skb_put(skb, len);

7459
	} else if (sp->rxd_mode == RXD_MODE_3B) {
7460 7461 7462 7463 7464 7465
		int get_block = ring_data->rx_curr_get_info.block_index;
		int get_off = ring_data->rx_curr_get_info.offset;
		int buf0_len = RXD_GET_BUFFER0_SIZE_3(rxdp->Control_2);
		int buf2_len = RXD_GET_BUFFER2_SIZE_3(rxdp->Control_2);
		unsigned char *buff = skb_push(skb, buf0_len);

R
Ralf Baechle 已提交
7466
		struct buffAdd *ba = &ring_data->ba[get_block][get_off];
7467
		ring_data->rx_bytes += buf0_len + buf2_len;
7468
		memcpy(buff, ba->ba_0, buf0_len);
7469
		skb_put(skb, buf2_len);
7470
	}
7471

7472 7473
	if ((rxdp->Control_1 & TCP_OR_UDP_FRAME) && ((!ring_data->lro) ||
	    (ring_data->lro && (!(rxdp->Control_1 & RXD_FRAME_IP_FRAG)))) &&
7474 7475
	    (sp->rx_csum)) {
		l3_csum = RXD_GET_L3_CKSUM(rxdp->Control_1);
L
Linus Torvalds 已提交
7476 7477
		l4_csum = RXD_GET_L4_CKSUM(rxdp->Control_1);
		if ((l3_csum == L3_CKSUM_OK) && (l4_csum == L4_CKSUM_OK)) {
7478
			/*
L
Linus Torvalds 已提交
7479 7480 7481 7482 7483
			 * NIC verifies if the Checksum of the received
			 * frame is Ok or not and accordingly returns
			 * a flag in the RxD.
			 */
			skb->ip_summed = CHECKSUM_UNNECESSARY;
7484
			if (ring_data->lro) {
7485 7486 7487 7488
				u32 tcp_len;
				u8 *tcp;
				int ret = 0;

7489 7490 7491
				ret = s2io_club_tcp_session(ring_data,
					skb->data, &tcp, &tcp_len, &lro,
					rxdp, sp);
7492 7493 7494 7495 7496 7497 7498 7499 7500 7501 7502 7503 7504 7505
				switch (ret) {
					case 3: /* Begin anew */
						lro->parent = skb;
						goto aggregate;
					case 1: /* Aggregate */
					{
						lro_append_pkt(sp, lro,
							skb, tcp_len);
						goto aggregate;
					}
					case 4: /* Flush session */
					{
						lro_append_pkt(sp, lro,
							skb, tcp_len);
7506 7507
						queue_rx_frame(lro->parent,
							lro->vlan_tag);
7508 7509 7510 7511 7512 7513 7514 7515 7516 7517
						clear_lro_session(lro);
						sp->mac_control.stats_info->
						    sw_stat.flush_max_pkts++;
						goto aggregate;
					}
					case 2: /* Flush both */
						lro->parent->data_len =
							lro->frags_len;
						sp->mac_control.stats_info->
						     sw_stat.sending_both++;
7518 7519
						queue_rx_frame(lro->parent,
							lro->vlan_tag);
7520 7521 7522
						clear_lro_session(lro);
						goto send_up;
					case 0: /* sessions exceeded */
A
Ananda Raju 已提交
7523 7524 7525
					case -1: /* non-TCP or not
						  * L2 aggregatable
						  */
7526 7527 7528 7529 7530 7531 7532 7533 7534 7535 7536 7537
					case 5: /*
						 * First pkt in session not
						 * L3/L4 aggregatable
						 */
						break;
					default:
						DBG_PRINT(ERR_DBG,
							"%s: Samadhana!!\n",
							 __FUNCTION__);
						BUG();
				}
			}
L
Linus Torvalds 已提交
7538
		} else {
7539 7540
			/*
			 * Packet with erroneous checksum, let the
L
Linus Torvalds 已提交
7541 7542 7543 7544
			 * upper layers deal with it.
			 */
			skb->ip_summed = CHECKSUM_NONE;
		}
7545
	} else
L
Linus Torvalds 已提交
7546
		skb->ip_summed = CHECKSUM_NONE;
7547

7548
	sp->mac_control.stats_info->sw_stat.mem_freed += skb->truesize;
7549
send_up:
7550
	queue_rx_frame(skb, RXD_GET_VLAN_TAG(rxdp->Control_2));
L
Linus Torvalds 已提交
7551
	dev->last_rx = jiffies;
7552
aggregate:
7553
	sp->mac_control.rings[ring_no].rx_bufs_left -= 1;
L
Linus Torvalds 已提交
7554 7555 7556 7557 7558 7559 7560 7561 7562 7563
	return SUCCESS;
}

/**
 *  s2io_link - stops/starts the Tx queue.
 *  @sp : private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
 *  @link : inidicates whether link is UP/DOWN.
 *  Description:
 *  This function stops/starts the Tx queue depending on whether the link
7564 7565
 *  status of the NIC is is down or up. This is called by the Alarm
 *  interrupt handler whenever a link change interrupt comes up.
L
Linus Torvalds 已提交
7566 7567 7568 7569
 *  Return value:
 *  void.
 */

R
Ralf Baechle 已提交
7570
static void s2io_link(struct s2io_nic * sp, int link)
L
Linus Torvalds 已提交
7571 7572 7573 7574
{
	struct net_device *dev = (struct net_device *) sp->dev;

	if (link != sp->last_link_state) {
7575
		init_tti(sp, link);
L
Linus Torvalds 已提交
7576 7577
		if (link == LINK_DOWN) {
			DBG_PRINT(ERR_DBG, "%s: Link down\n", dev->name);
7578
			s2io_stop_all_tx_queue(sp);
L
Linus Torvalds 已提交
7579
			netif_carrier_off(dev);
7580
			if(sp->mac_control.stats_info->sw_stat.link_up_cnt)
7581
			sp->mac_control.stats_info->sw_stat.link_up_time =
7582 7583
				jiffies - sp->start_time;
			sp->mac_control.stats_info->sw_stat.link_down_cnt++;
L
Linus Torvalds 已提交
7584 7585
		} else {
			DBG_PRINT(ERR_DBG, "%s: Link Up\n", dev->name);
7586
			if (sp->mac_control.stats_info->sw_stat.link_down_cnt)
7587
			sp->mac_control.stats_info->sw_stat.link_down_time =
7588 7589
				jiffies - sp->start_time;
			sp->mac_control.stats_info->sw_stat.link_up_cnt++;
L
Linus Torvalds 已提交
7590
			netif_carrier_on(dev);
7591
			s2io_wake_all_tx_queue(sp);
L
Linus Torvalds 已提交
7592 7593 7594
		}
	}
	sp->last_link_state = link;
7595
	sp->start_time = jiffies;
L
Linus Torvalds 已提交
7596 7597
}

7598 7599 7600
/**
 *  s2io_init_pci -Initialization of PCI and PCI-X configuration registers .
 *  @sp : private member of the device structure, which is a pointer to the
L
Linus Torvalds 已提交
7601 7602 7603 7604 7605 7606 7607 7608
 *  s2io_nic structure.
 *  Description:
 *  This function initializes a few of the PCI and PCI-X configuration registers
 *  with recommended values.
 *  Return value:
 *  void
 */

R
Ralf Baechle 已提交
7609
static void s2io_init_pci(struct s2io_nic * sp)
L
Linus Torvalds 已提交
7610
{
7611
	u16 pci_cmd = 0, pcix_cmd = 0;
L
Linus Torvalds 已提交
7612 7613 7614

	/* Enable Data Parity Error Recovery in PCI-X command register. */
	pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
7615
			     &(pcix_cmd));
L
Linus Torvalds 已提交
7616
	pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
7617
			      (pcix_cmd | 1));
L
Linus Torvalds 已提交
7618
	pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
7619
			     &(pcix_cmd));
L
Linus Torvalds 已提交
7620 7621 7622 7623 7624 7625 7626 7627

	/* Set the PErr Response bit in PCI command register. */
	pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
	pci_write_config_word(sp->pdev, PCI_COMMAND,
			      (pci_cmd | PCI_COMMAND_PARITY));
	pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
}

7628 7629
static int s2io_verify_parm(struct pci_dev *pdev, u8 *dev_intr_type,
	u8 *dev_multiq)
7630
{
7631
	if ((tx_fifo_num > MAX_TX_FIFOS) ||
7632
		(tx_fifo_num < 1)) {
7633 7634
		DBG_PRINT(ERR_DBG, "s2io: Requested number of tx fifos "
			"(%d) not supported\n", tx_fifo_num);
7635 7636 7637 7638 7639 7640

		if (tx_fifo_num < 1)
			tx_fifo_num = 1;
		else
			tx_fifo_num = MAX_TX_FIFOS;

7641 7642
		DBG_PRINT(ERR_DBG, "s2io: Default to %d ", tx_fifo_num);
		DBG_PRINT(ERR_DBG, "tx fifos\n");
7643
	}
7644

7645 7646 7647 7648 7649 7650
#ifndef CONFIG_NETDEVICES_MULTIQUEUE
	if (multiq) {
		DBG_PRINT(ERR_DBG, "s2io: Multiqueue support not enabled\n");
		multiq = 0;
	}
#endif
7651
	if (multiq)
7652
		*dev_multiq = multiq;
7653 7654 7655 7656 7657 7658 7659 7660 7661 7662 7663 7664 7665 7666 7667

	if (tx_steering_type && (1 == tx_fifo_num)) {
		if (tx_steering_type != TX_DEFAULT_STEERING)
			DBG_PRINT(ERR_DBG,
				"s2io: Tx steering is not supported with "
				"one fifo. Disabling Tx steering.\n");
		tx_steering_type = NO_STEERING;
	}

	if ((tx_steering_type < NO_STEERING) ||
		(tx_steering_type > TX_DEFAULT_STEERING)) {
		DBG_PRINT(ERR_DBG, "s2io: Requested transmit steering not "
			 "supported\n");
		DBG_PRINT(ERR_DBG, "s2io: Disabling transmit steering\n");
		tx_steering_type = NO_STEERING;
7668 7669
	}

7670 7671
	if (rx_ring_num > MAX_RX_RINGS) {
		DBG_PRINT(ERR_DBG, "s2io: Requested number of rx rings not "
7672
			 "supported\n");
7673 7674 7675
		DBG_PRINT(ERR_DBG, "s2io: Default to %d rx rings\n",
			MAX_RX_RINGS);
		rx_ring_num = MAX_RX_RINGS;
7676
	}
7677

7678
	if ((*dev_intr_type != INTA) && (*dev_intr_type != MSI_X)) {
7679 7680 7681 7682
		DBG_PRINT(ERR_DBG, "s2io: Wrong intr_type requested. "
			  "Defaulting to INTA\n");
		*dev_intr_type = INTA;
	}
7683

7684 7685 7686
	if ((*dev_intr_type == MSI_X) &&
			((pdev->device != PCI_DEVICE_ID_HERC_WIN) &&
			(pdev->device != PCI_DEVICE_ID_HERC_UNI))) {
7687
		DBG_PRINT(ERR_DBG, "s2io: Xframe I does not support MSI_X. "
7688 7689 7690
					"Defaulting to INTA\n");
		*dev_intr_type = INTA;
	}
7691

7692
	if ((rx_ring_mode != 1) && (rx_ring_mode != 2)) {
7693
		DBG_PRINT(ERR_DBG, "s2io: Requested ring mode not supported\n");
7694 7695
		DBG_PRINT(ERR_DBG, "s2io: Defaulting to 1-buffer mode\n");
		rx_ring_mode = 1;
7696 7697 7698 7699
	}
	return SUCCESS;
}

7700 7701 7702
/**
 * rts_ds_steer - Receive traffic steering based on IPv4 or IPv6 TOS
 * or Traffic class respectively.
7703
 * @nic: device private variable
7704 7705 7706 7707 7708 7709 7710 7711 7712 7713 7714 7715 7716 7717 7718 7719 7720 7721 7722 7723 7724 7725 7726 7727 7728 7729 7730
 * Description: The function configures the receive steering to
 * desired receive ring.
 * Return Value:  SUCCESS on success and
 * '-1' on failure (endian settings incorrect).
 */
static int rts_ds_steer(struct s2io_nic *nic, u8 ds_codepoint, u8 ring)
{
	struct XENA_dev_config __iomem *bar0 = nic->bar0;
	register u64 val64 = 0;

	if (ds_codepoint > 63)
		return FAILURE;

	val64 = RTS_DS_MEM_DATA(ring);
	writeq(val64, &bar0->rts_ds_mem_data);

	val64 = RTS_DS_MEM_CTRL_WE |
		RTS_DS_MEM_CTRL_STROBE_NEW_CMD |
		RTS_DS_MEM_CTRL_OFFSET(ds_codepoint);

	writeq(val64, &bar0->rts_ds_mem_ctrl);

	return wait_for_cmd_complete(&bar0->rts_ds_mem_ctrl,
				RTS_DS_MEM_CTRL_STROBE_CMD_BEING_EXECUTED,
				S2IO_BIT_RESET);
}

L
Linus Torvalds 已提交
7731
/**
7732
 *  s2io_init_nic - Initialization of the adapter .
L
Linus Torvalds 已提交
7733 7734 7735 7736
 *  @pdev : structure containing the PCI related information of the device.
 *  @pre: List of PCI devices supported by the driver listed in s2io_tbl.
 *  Description:
 *  The function initializes an adapter identified by the pci_dec structure.
7737 7738 7739
 *  All OS related initialization including memory and device structure and
 *  initlaization of the device private variable is done. Also the swapper
 *  control register is initialized to enable read and write into the I/O
L
Linus Torvalds 已提交
7740 7741 7742 7743 7744 7745 7746 7747
 *  registers of the device.
 *  Return value:
 *  returns 0 on success and negative on failure.
 */

static int __devinit
s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
{
R
Ralf Baechle 已提交
7748
	struct s2io_nic *sp;
L
Linus Torvalds 已提交
7749 7750 7751 7752 7753
	struct net_device *dev;
	int i, j, ret;
	int dma_flag = FALSE;
	u32 mac_up, mac_down;
	u64 val64 = 0, tmp64 = 0;
R
Ralf Baechle 已提交
7754
	struct XENA_dev_config __iomem *bar0 = NULL;
L
Linus Torvalds 已提交
7755
	u16 subid;
R
Ralf Baechle 已提交
7756
	struct mac_info *mac_control;
L
Linus Torvalds 已提交
7757
	struct config_param *config;
7758
	int mode;
7759
	u8 dev_intr_type = intr_type;
7760
	u8 dev_multiq = 0;
7761
	DECLARE_MAC_BUF(mac);
L
Linus Torvalds 已提交
7762

7763 7764
	ret = s2io_verify_parm(pdev, &dev_intr_type, &dev_multiq);
	if (ret)
7765
		return ret;
L
Linus Torvalds 已提交
7766 7767 7768 7769 7770 7771 7772

	if ((ret = pci_enable_device(pdev))) {
		DBG_PRINT(ERR_DBG,
			  "s2io_init_nic: pci_enable_device failed\n");
		return ret;
	}

7773
	if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
L
Linus Torvalds 已提交
7774 7775 7776
		DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 64bit DMA\n");
		dma_flag = TRUE;
		if (pci_set_consistent_dma_mask
7777
		    (pdev, DMA_64BIT_MASK)) {
L
Linus Torvalds 已提交
7778 7779 7780 7781 7782 7783
			DBG_PRINT(ERR_DBG,
				  "Unable to obtain 64bit DMA for \
					consistent allocations\n");
			pci_disable_device(pdev);
			return -ENOMEM;
		}
7784
	} else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
L
Linus Torvalds 已提交
7785 7786 7787 7788 7789
		DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 32bit DMA\n");
	} else {
		pci_disable_device(pdev);
		return -ENOMEM;
	}
7790 7791 7792 7793
	if ((ret = pci_request_regions(pdev, s2io_driver_name))) {
		DBG_PRINT(ERR_DBG, "%s: Request Regions failed - %x \n", __FUNCTION__, ret);
		pci_disable_device(pdev);
		return -ENODEV;
L
Linus Torvalds 已提交
7794
	}
7795 7796
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
	if (dev_multiq)
7797
		dev = alloc_etherdev_mq(sizeof(struct s2io_nic), tx_fifo_num);
7798 7799
	else
#endif
R
Ralf Baechle 已提交
7800
	dev = alloc_etherdev(sizeof(struct s2io_nic));
L
Linus Torvalds 已提交
7801 7802 7803 7804 7805 7806 7807 7808 7809 7810 7811 7812 7813
	if (dev == NULL) {
		DBG_PRINT(ERR_DBG, "Device allocation failed\n");
		pci_disable_device(pdev);
		pci_release_regions(pdev);
		return -ENODEV;
	}

	pci_set_master(pdev);
	pci_set_drvdata(pdev, dev);
	SET_NETDEV_DEV(dev, &pdev->dev);

	/*  Private member variable initialized to s2io NIC structure */
	sp = dev->priv;
R
Ralf Baechle 已提交
7814
	memset(sp, 0, sizeof(struct s2io_nic));
L
Linus Torvalds 已提交
7815 7816 7817 7818
	sp->dev = dev;
	sp->pdev = pdev;
	sp->high_dma_flag = dma_flag;
	sp->device_enabled_once = FALSE;
7819 7820 7821 7822 7823
	if (rx_ring_mode == 1)
		sp->rxd_mode = RXD_MODE_1;
	if (rx_ring_mode == 2)
		sp->rxd_mode = RXD_MODE_3B;

7824
	sp->config.intr_type = dev_intr_type;
L
Linus Torvalds 已提交
7825

7826 7827 7828 7829 7830 7831
	if ((pdev->device == PCI_DEVICE_ID_HERC_WIN) ||
		(pdev->device == PCI_DEVICE_ID_HERC_UNI))
		sp->device_type = XFRAME_II_DEVICE;
	else
		sp->device_type = XFRAME_I_DEVICE;

7832
	sp->lro = lro_enable;
7833

L
Linus Torvalds 已提交
7834 7835 7836
	/* Initialize some PCI/PCI-X fields of the NIC. */
	s2io_init_pci(sp);

7837
	/*
L
Linus Torvalds 已提交
7838
	 * Setting the device configuration parameters.
7839 7840 7841
	 * Most of these parameters can be specified by the user during
	 * module insertion as they are module loadable parameters. If
	 * these parameters are not not specified during load time, they
L
Linus Torvalds 已提交
7842 7843 7844 7845 7846
	 * are initialized with default values.
	 */
	mac_control = &sp->mac_control;
	config = &sp->config;

7847
	config->napi = napi;
7848
	config->tx_steering_type = tx_steering_type;
7849

L
Linus Torvalds 已提交
7850
	/* Tx side parameters. */
7851 7852 7853 7854 7855 7856 7857 7858 7859 7860 7861 7862 7863 7864 7865 7866 7867 7868 7869 7870 7871 7872
	if (config->tx_steering_type == TX_PRIORITY_STEERING)
		config->tx_fifo_num = MAX_TX_FIFOS;
	else
		config->tx_fifo_num = tx_fifo_num;

	/* Initialize the fifos used for tx steering */
	if (config->tx_fifo_num < 5) {
			if (config->tx_fifo_num  == 1)
				sp->total_tcp_fifos = 1;
			else
				sp->total_tcp_fifos = config->tx_fifo_num - 1;
			sp->udp_fifo_idx = config->tx_fifo_num - 1;
			sp->total_udp_fifos = 1;
			sp->other_fifo_idx = sp->total_tcp_fifos - 1;
	} else {
		sp->total_tcp_fifos = (tx_fifo_num - FIFO_UDP_MAX_NUM -
						FIFO_OTHER_MAX_NUM);
		sp->udp_fifo_idx = sp->total_tcp_fifos;
		sp->total_udp_fifos = FIFO_UDP_MAX_NUM;
		sp->other_fifo_idx = sp->udp_fifo_idx + FIFO_UDP_MAX_NUM;
	}

7873
	config->multiq = dev_multiq;
7874
	for (i = 0; i < config->tx_fifo_num; i++) {
L
Linus Torvalds 已提交
7875 7876 7877 7878
		config->tx_cfg[i].fifo_len = tx_fifo_len[i];
		config->tx_cfg[i].fifo_priority = i;
	}

7879 7880
	/* mapping the QoS priority to the configured fifos */
	for (i = 0; i < MAX_TX_FIFOS; i++)
7881
		config->fifo_mapping[i] = fifo_map[config->tx_fifo_num - 1][i];
7882

7883 7884 7885 7886 7887
	/* map the hashing selector table to the configured fifos */
	for (i = 0; i < config->tx_fifo_num; i++)
		sp->fifo_selector[i] = fifo_selector[i];


L
Linus Torvalds 已提交
7888 7889 7890 7891 7892 7893 7894 7895 7896
	config->tx_intr_type = TXD_INT_TYPE_UTILZ;
	for (i = 0; i < config->tx_fifo_num; i++) {
		config->tx_cfg[i].f_no_snoop =
		    (NO_SNOOP_TXD | NO_SNOOP_TXD_BUFFER);
		if (config->tx_cfg[i].fifo_len < 65) {
			config->tx_intr_type = TXD_INT_TYPE_PER_LIST;
			break;
		}
	}
A
Ananda Raju 已提交
7897 7898
	/* + 2 because one Txd for skb->data and one Txd for UFO */
	config->max_txds = MAX_SKB_FRAGS + 2;
L
Linus Torvalds 已提交
7899 7900 7901

	/* Rx side parameters. */
	config->rx_ring_num = rx_ring_num;
7902
	for (i = 0; i < config->rx_ring_num; i++) {
L
Linus Torvalds 已提交
7903
		config->rx_cfg[i].num_rxd = rx_ring_sz[i] *
7904
		    (rxd_count[sp->rxd_mode] + 1);
L
Linus Torvalds 已提交
7905
		config->rx_cfg[i].ring_priority = i;
7906 7907 7908 7909 7910
		mac_control->rings[i].rx_bufs_left = 0;
		mac_control->rings[i].rxd_mode = sp->rxd_mode;
		mac_control->rings[i].rxd_count = rxd_count[sp->rxd_mode];
		mac_control->rings[i].pdev = sp->pdev;
		mac_control->rings[i].dev = sp->dev;
L
Linus Torvalds 已提交
7911 7912 7913 7914 7915 7916 7917 7918 7919 7920 7921 7922 7923 7924 7925 7926 7927
	}

	for (i = 0; i < rx_ring_num; i++) {
		config->rx_cfg[i].ring_org = RING_ORG_BUFF1;
		config->rx_cfg[i].f_no_snoop =
		    (NO_SNOOP_RXD | NO_SNOOP_RXD_BUFFER);
	}

	/*  Setting Mac Control parameters */
	mac_control->rmac_pause_time = rmac_pause_time;
	mac_control->mc_pause_threshold_q0q3 = mc_pause_threshold_q0q3;
	mac_control->mc_pause_threshold_q4q7 = mc_pause_threshold_q4q7;


	/*  initialize the shared memory used by the NIC and the host */
	if (init_shared_mem(sp)) {
		DBG_PRINT(ERR_DBG, "%s: Memory allocation failed\n",
7928
			  dev->name);
L
Linus Torvalds 已提交
7929 7930 7931 7932 7933 7934 7935
		ret = -ENOMEM;
		goto mem_alloc_failed;
	}

	sp->bar0 = ioremap(pci_resource_start(pdev, 0),
				     pci_resource_len(pdev, 0));
	if (!sp->bar0) {
7936
		DBG_PRINT(ERR_DBG, "%s: Neterion: cannot remap io mem1\n",
L
Linus Torvalds 已提交
7937 7938 7939 7940 7941 7942 7943 7944
			  dev->name);
		ret = -ENOMEM;
		goto bar0_remap_failed;
	}

	sp->bar1 = ioremap(pci_resource_start(pdev, 2),
				     pci_resource_len(pdev, 2));
	if (!sp->bar1) {
7945
		DBG_PRINT(ERR_DBG, "%s: Neterion: cannot remap io mem2\n",
L
Linus Torvalds 已提交
7946 7947 7948 7949 7950 7951 7952 7953 7954 7955
			  dev->name);
		ret = -ENOMEM;
		goto bar1_remap_failed;
	}

	dev->irq = pdev->irq;
	dev->base_addr = (unsigned long) sp->bar0;

	/* Initializing the BAR1 address as the start of the FIFO pointer. */
	for (j = 0; j < MAX_TX_FIFOS; j++) {
R
Ralf Baechle 已提交
7956
		mac_control->tx_FIFO_start[j] = (struct TxFIFO_element __iomem *)
L
Linus Torvalds 已提交
7957 7958 7959 7960 7961 7962 7963 7964 7965 7966
		    (sp->bar1 + (j * 0x00020000));
	}

	/*  Driver entry points */
	dev->open = &s2io_open;
	dev->stop = &s2io_close;
	dev->hard_start_xmit = &s2io_xmit;
	dev->get_stats = &s2io_get_stats;
	dev->set_multicast_list = &s2io_set_multicast;
	dev->do_ioctl = &s2io_ioctl;
7967
	dev->set_mac_address = &s2io_set_mac_addr;
L
Linus Torvalds 已提交
7968 7969
	dev->change_mtu = &s2io_change_mtu;
	SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
7970 7971
	dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
	dev->vlan_rx_register = s2io_vlan_rx_register;
7972
	dev->vlan_rx_kill_vid = (void *)s2io_vlan_rx_kill_vid;
7973

L
Linus Torvalds 已提交
7974 7975 7976 7977
	/*
	 * will use eth_mac_addr() for  dev->set_mac_address
	 * mac address will be set every time dev->open() is called
	 */
7978 7979 7980 7981
#ifdef CONFIG_NET_POLL_CONTROLLER
	dev->poll_controller = s2io_netpoll;
#endif

L
Linus Torvalds 已提交
7982 7983 7984 7985
	dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
	if (sp->high_dma_flag == TRUE)
		dev->features |= NETIF_F_HIGHDMA;
	dev->features |= NETIF_F_TSO;
7986
	dev->features |= NETIF_F_TSO6;
7987
	if ((sp->device_type & XFRAME_II_DEVICE) && (ufo))  {
A
Ananda Raju 已提交
7988 7989 7990
		dev->features |= NETIF_F_UFO;
		dev->features |= NETIF_F_HW_CSUM;
	}
7991 7992 7993 7994
#ifdef CONFIG_NETDEVICES_MULTIQUEUE
	if (config->multiq)
		dev->features |= NETIF_F_MULTI_QUEUE;
#endif
L
Linus Torvalds 已提交
7995 7996
	dev->tx_timeout = &s2io_tx_watchdog;
	dev->watchdog_timeo = WATCH_DOG_TIMEOUT;
7997 7998
	INIT_WORK(&sp->rst_timer_task, s2io_restart_nic);
	INIT_WORK(&sp->set_link_task, s2io_set_link);
L
Linus Torvalds 已提交
7999

8000
	pci_save_state(sp->pdev);
L
Linus Torvalds 已提交
8001 8002 8003 8004 8005 8006 8007 8008 8009

	/* Setting swapper control on the NIC, for proper reset operation */
	if (s2io_set_swapper(sp)) {
		DBG_PRINT(ERR_DBG, "%s:swapper settings are wrong\n",
			  dev->name);
		ret = -EAGAIN;
		goto set_swap_failed;
	}

8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 8020
	/* Verify if the Herc works on the slot its placed into */
	if (sp->device_type & XFRAME_II_DEVICE) {
		mode = s2io_verify_pci_mode(sp);
		if (mode < 0) {
			DBG_PRINT(ERR_DBG, "%s: ", __FUNCTION__);
			DBG_PRINT(ERR_DBG, " Unsupported PCI bus mode\n");
			ret = -EBADSLT;
			goto set_swap_failed;
		}
	}

8021 8022 8023 8024 8025 8026 8027 8028 8029 8030 8031 8032 8033 8034 8035 8036 8037 8038 8039 8040 8041 8042 8043 8044 8045 8046
	if (sp->config.intr_type == MSI_X) {
		sp->num_entries = config->rx_ring_num + 1;
		ret = s2io_enable_msi_x(sp);

		if (!ret) {
			ret = s2io_test_msi(sp);
			/* rollback MSI-X, will re-enable during add_isr() */
			remove_msix_isr(sp);
		}
		if (ret) {

			DBG_PRINT(ERR_DBG,
			  "%s: MSI-X requested but failed to enable\n",
			  dev->name);
			sp->config.intr_type = INTA;
		}
	}

	if (config->intr_type ==  MSI_X) {
		for (i = 0; i < config->rx_ring_num ; i++)
			netif_napi_add(dev, &mac_control->rings[i].napi,
				s2io_poll_msix, 64);
	} else {
		netif_napi_add(dev, &sp->napi, s2io_poll_inta, 64);
	}

8047 8048 8049 8050 8051 8052 8053 8054 8055
	/* Not needed for Herc */
	if (sp->device_type & XFRAME_I_DEVICE) {
		/*
		 * Fix for all "FFs" MAC address problems observed on
		 * Alpha platforms
		 */
		fix_mac_address(sp);
		s2io_reset(sp);
	}
L
Linus Torvalds 已提交
8056 8057 8058 8059 8060 8061 8062

	/*
	 * MAC address initialization.
	 * For now only one mac address will be read and used.
	 */
	bar0 = sp->bar0;
	val64 = RMAC_ADDR_CMD_MEM_RD | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
8063
	    RMAC_ADDR_CMD_MEM_OFFSET(0 + S2IO_MAC_ADDR_START_OFFSET);
L
Linus Torvalds 已提交
8064
	writeq(val64, &bar0->rmac_addr_cmd_mem);
A
Ananda Raju 已提交
8065
	wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
8066
		      RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING, S2IO_BIT_RESET);
L
Linus Torvalds 已提交
8067 8068 8069 8070 8071 8072 8073 8074 8075 8076 8077 8078 8079 8080
	tmp64 = readq(&bar0->rmac_addr_data0_mem);
	mac_down = (u32) tmp64;
	mac_up = (u32) (tmp64 >> 32);

	sp->def_mac_addr[0].mac_addr[3] = (u8) (mac_up);
	sp->def_mac_addr[0].mac_addr[2] = (u8) (mac_up >> 8);
	sp->def_mac_addr[0].mac_addr[1] = (u8) (mac_up >> 16);
	sp->def_mac_addr[0].mac_addr[0] = (u8) (mac_up >> 24);
	sp->def_mac_addr[0].mac_addr[5] = (u8) (mac_down >> 16);
	sp->def_mac_addr[0].mac_addr[4] = (u8) (mac_down >> 24);

	/*  Set the factory defined MAC address initially   */
	dev->addr_len = ETH_ALEN;
	memcpy(dev->dev_addr, sp->def_mac_addr, ETH_ALEN);
8081
	memcpy(dev->perm_addr, dev->dev_addr, ETH_ALEN);
L
Linus Torvalds 已提交
8082

8083 8084 8085 8086 8087 8088 8089 8090 8091 8092 8093 8094 8095 8096
	/* initialize number of multicast & unicast MAC entries variables */
	if (sp->device_type == XFRAME_I_DEVICE) {
		config->max_mc_addr = S2IO_XENA_MAX_MC_ADDRESSES;
		config->max_mac_addr = S2IO_XENA_MAX_MAC_ADDRESSES;
		config->mc_start_offset = S2IO_XENA_MC_ADDR_START_OFFSET;
	} else if (sp->device_type == XFRAME_II_DEVICE) {
		config->max_mc_addr = S2IO_HERC_MAX_MC_ADDRESSES;
		config->max_mac_addr = S2IO_HERC_MAX_MAC_ADDRESSES;
		config->mc_start_offset = S2IO_HERC_MC_ADDR_START_OFFSET;
	}

	/* store mac addresses from CAM to s2io_nic structure */
	do_s2io_store_unicast_mc(sp);

8097 8098 8099 8100 8101
	/* Configure MSIX vector for number of rings configured plus one */
	if ((sp->device_type == XFRAME_II_DEVICE) &&
		(config->intr_type == MSI_X))
		sp->num_entries = config->rx_ring_num + 1;

8102 8103
	 /* Store the values of the MSIX table in the s2io_nic structure */
	store_xmsi_data(sp);
8104 8105 8106
	/* reset Nic and bring it to known state */
	s2io_reset(sp);

L
Linus Torvalds 已提交
8107
	/*
8108
	 * Initialize link state flags
8109
	 * and the card state parameter
L
Linus Torvalds 已提交
8110
	 */
8111
	sp->state = 0;
L
Linus Torvalds 已提交
8112 8113

	/* Initialize spinlocks */
8114 8115
	for (i = 0; i < sp->config.tx_fifo_num; i++)
		spin_lock_init(&mac_control->fifos[i].tx_lock);
8116

8117 8118 8119
	/*
	 * SXE-002: Configure link and activity LED to init state
	 * on driver load.
L
Linus Torvalds 已提交
8120 8121 8122 8123 8124 8125 8126 8127 8128 8129 8130 8131 8132 8133 8134 8135 8136 8137
	 */
	subid = sp->pdev->subsystem_device;
	if ((subid & 0xFF) >= 0x07) {
		val64 = readq(&bar0->gpio_control);
		val64 |= 0x0000800000000000ULL;
		writeq(val64, &bar0->gpio_control);
		val64 = 0x0411040400000000ULL;
		writeq(val64, (void __iomem *) bar0 + 0x2700);
		val64 = readq(&bar0->gpio_control);
	}

	sp->rx_csum = 1;	/* Rx chksum verify enabled by default */

	if (register_netdev(dev)) {
		DBG_PRINT(ERR_DBG, "Device registration failed\n");
		ret = -ENODEV;
		goto register_failed;
	}
8138
	s2io_vpd_read(sp);
8139
	DBG_PRINT(ERR_DBG, "Copyright(c) 2002-2007 Neterion Inc.\n");
8140
	DBG_PRINT(ERR_DBG, "%s: Neterion %s (rev %d)\n",dev->name,
8141
		  sp->product_name, pdev->revision);
8142 8143
	DBG_PRINT(ERR_DBG, "%s: Driver version %s\n", dev->name,
		  s2io_driver_version);
8144 8145
	DBG_PRINT(ERR_DBG, "%s: MAC ADDR: %s\n",
		  dev->name, print_mac(mac, dev->dev_addr));
8146
	DBG_PRINT(ERR_DBG, "SERIAL NUMBER: %s\n", sp->serial_num);
8147
	if (sp->device_type & XFRAME_II_DEVICE) {
8148
		mode = s2io_print_pci_mode(sp);
8149
		if (mode < 0) {
8150
			DBG_PRINT(ERR_DBG, " Unsupported PCI bus mode\n");
8151
			ret = -EBADSLT;
8152
			unregister_netdev(dev);
8153 8154 8155
			goto set_swap_failed;
		}
	}
8156 8157 8158 8159 8160 8161 8162 8163 8164 8165
	switch(sp->rxd_mode) {
		case RXD_MODE_1:
		    DBG_PRINT(ERR_DBG, "%s: 1-Buffer receive mode enabled\n",
						dev->name);
		    break;
		case RXD_MODE_3B:
		    DBG_PRINT(ERR_DBG, "%s: 2-Buffer receive mode enabled\n",
						dev->name);
		    break;
	}
8166

8167 8168 8169 8170 8171
	switch (sp->config.napi) {
	case 0:
		DBG_PRINT(ERR_DBG, "%s: NAPI disabled\n", dev->name);
		break;
	case 1:
8172
		DBG_PRINT(ERR_DBG, "%s: NAPI enabled\n", dev->name);
8173 8174
		break;
	}
8175 8176 8177 8178

	DBG_PRINT(ERR_DBG, "%s: Using %d Tx fifo(s)\n", dev->name,
		sp->config.tx_fifo_num);

8179 8180 8181
	DBG_PRINT(ERR_DBG, "%s: Using %d Rx ring(s)\n", dev->name,
		  sp->config.rx_ring_num);

8182
	switch(sp->config.intr_type) {
8183 8184 8185 8186 8187 8188 8189
		case INTA:
		    DBG_PRINT(ERR_DBG, "%s: Interrupt type INTA\n", dev->name);
		    break;
		case MSI_X:
		    DBG_PRINT(ERR_DBG, "%s: Interrupt type MSI-X\n", dev->name);
		    break;
	}
8190 8191 8192 8193 8194 8195 8196 8197 8198
	if (sp->config.multiq) {
	for (i = 0; i < sp->config.tx_fifo_num; i++)
		mac_control->fifos[i].multiq = config->multiq;
		DBG_PRINT(ERR_DBG, "%s: Multiqueue support enabled\n",
			dev->name);
	} else
		DBG_PRINT(ERR_DBG, "%s: Multiqueue support disabled\n",
			dev->name);

8199 8200 8201 8202 8203 8204 8205 8206 8207 8208 8209 8210 8211 8212
	switch (sp->config.tx_steering_type) {
	case NO_STEERING:
		DBG_PRINT(ERR_DBG, "%s: No steering enabled for"
			" transmit\n", dev->name);
			break;
	case TX_PRIORITY_STEERING:
		DBG_PRINT(ERR_DBG, "%s: Priority steering enabled for"
			" transmit\n", dev->name);
		break;
	case TX_DEFAULT_STEERING:
		DBG_PRINT(ERR_DBG, "%s: Default steering enabled for"
			" transmit\n", dev->name);
	}

8213 8214
	if (sp->lro)
		DBG_PRINT(ERR_DBG, "%s: Large receive offload enabled\n",
8215
			  dev->name);
8216 8217 8218
	if (ufo)
		DBG_PRINT(ERR_DBG, "%s: UDP Fragmentation Offload(UFO)"
					" enabled\n", dev->name);
8219
	/* Initialize device name */
8220
	sprintf(sp->name, "%s Neterion %s", dev->name, sp->product_name);
8221

8222 8223 8224
	/*
	 * Make Link state as off at this point, when the Link change
	 * interrupt comes the state will be automatically changed to
L
Linus Torvalds 已提交
8225 8226 8227 8228 8229 8230 8231 8232 8233 8234 8235 8236 8237 8238 8239
	 * the right state.
	 */
	netif_carrier_off(dev);

	return 0;

      register_failed:
      set_swap_failed:
	iounmap(sp->bar1);
      bar1_remap_failed:
	iounmap(sp->bar0);
      bar0_remap_failed:
      mem_alloc_failed:
	free_shared_mem(sp);
	pci_disable_device(pdev);
8240
	pci_release_regions(pdev);
L
Linus Torvalds 已提交
8241 8242 8243 8244 8245 8246 8247
	pci_set_drvdata(pdev, NULL);
	free_netdev(dev);

	return ret;
}

/**
8248
 * s2io_rem_nic - Free the PCI device
L
Linus Torvalds 已提交
8249
 * @pdev: structure containing the PCI related information of the device.
8250
 * Description: This function is called by the Pci subsystem to release a
L
Linus Torvalds 已提交
8251
 * PCI device and free up all resource held up by the device. This could
8252
 * be in response to a Hot plug event or when the driver is to be removed
L
Linus Torvalds 已提交
8253 8254 8255 8256 8257 8258 8259
 * from memory.
 */

static void __devexit s2io_rem_nic(struct pci_dev *pdev)
{
	struct net_device *dev =
	    (struct net_device *) pci_get_drvdata(pdev);
R
Ralf Baechle 已提交
8260
	struct s2io_nic *sp;
L
Linus Torvalds 已提交
8261 8262 8263 8264 8265 8266

	if (dev == NULL) {
		DBG_PRINT(ERR_DBG, "Driver Data is NULL!!\n");
		return;
	}

8267 8268
	flush_scheduled_work();

L
Linus Torvalds 已提交
8269 8270 8271 8272 8273 8274
	sp = dev->priv;
	unregister_netdev(dev);

	free_shared_mem(sp);
	iounmap(sp->bar0);
	iounmap(sp->bar1);
8275
	pci_release_regions(pdev);
L
Linus Torvalds 已提交
8276 8277
	pci_set_drvdata(pdev, NULL);
	free_netdev(dev);
8278
	pci_disable_device(pdev);
L
Linus Torvalds 已提交
8279 8280 8281 8282 8283 8284 8285 8286
}

/**
 * s2io_starter - Entry point for the driver
 * Description: This function is the entry point for the driver. It verifies
 * the module loadable parameters and initializes PCI configuration space.
 */

8287
static int __init s2io_starter(void)
L
Linus Torvalds 已提交
8288
{
8289
	return pci_register_driver(&s2io_driver);
L
Linus Torvalds 已提交
8290 8291 8292
}

/**
8293
 * s2io_closer - Cleanup routine for the driver
L
Linus Torvalds 已提交
8294 8295 8296
 * Description: This function is the cleanup routine for the driver. It unregist * ers the driver.
 */

8297
static __exit void s2io_closer(void)
L
Linus Torvalds 已提交
8298 8299 8300 8301 8302 8303 8304
{
	pci_unregister_driver(&s2io_driver);
	DBG_PRINT(INIT_DBG, "cleanup done\n");
}

module_init(s2io_starter);
module_exit(s2io_closer);
8305

8306
static int check_L2_lro_capable(u8 *buffer, struct iphdr **ip,
8307 8308
		struct tcphdr **tcp, struct RxD_t *rxdp,
		struct s2io_nic *sp)
8309 8310 8311 8312 8313 8314 8315 8316 8317 8318
{
	int ip_off;
	u8 l2_type = (u8)((rxdp->Control_1 >> 37) & 0x7), ip_len;

	if (!(rxdp->Control_1 & RXD_FRAME_PROTO_TCP)) {
		DBG_PRINT(INIT_DBG,"%s: Non-TCP frames not supported for LRO\n",
			  __FUNCTION__);
		return -1;
	}

8319 8320 8321 8322 8323 8324 8325 8326 8327 8328 8329 8330
	/* Checking for DIX type or DIX type with VLAN */
	if ((l2_type == 0)
		|| (l2_type == 4)) {
		ip_off = HEADER_ETHERNET_II_802_3_SIZE;
		/*
		 * If vlan stripping is disabled and the frame is VLAN tagged,
		 * shift the offset by the VLAN header size bytes.
		 */
		if ((!vlan_strip_flag) &&
			(rxdp->Control_1 & RXD_FRAME_VLAN_TAG))
			ip_off += HEADER_VLAN_SIZE;
	} else {
8331
		/* LLC, SNAP etc are considered non-mergeable */
8332
		return -1;
8333 8334 8335 8336 8337 8338 8339 8340 8341 8342
	}

	*ip = (struct iphdr *)((u8 *)buffer + ip_off);
	ip_len = (u8)((*ip)->ihl);
	ip_len <<= 2;
	*tcp = (struct tcphdr *)((unsigned long)*ip + ip_len);

	return 0;
}

R
Ralf Baechle 已提交
8343
static int check_for_socket_match(struct lro *lro, struct iphdr *ip,
8344 8345 8346 8347 8348 8349 8350 8351 8352 8353 8354 8355 8356 8357
				  struct tcphdr *tcp)
{
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __FUNCTION__);
	if ((lro->iph->saddr != ip->saddr) || (lro->iph->daddr != ip->daddr) ||
	   (lro->tcph->source != tcp->source) || (lro->tcph->dest != tcp->dest))
		return -1;
	return 0;
}

static inline int get_l4_pyld_length(struct iphdr *ip, struct tcphdr *tcp)
{
	return(ntohs(ip->tot_len) - (ip->ihl << 2) - (tcp->doff << 2));
}

R
Ralf Baechle 已提交
8358
static void initiate_new_session(struct lro *lro, u8 *l2h,
8359
	struct iphdr *ip, struct tcphdr *tcp, u32 tcp_pyld_len, u16 vlan_tag)
8360 8361 8362 8363 8364 8365
{
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __FUNCTION__);
	lro->l2h = l2h;
	lro->iph = ip;
	lro->tcph = tcp;
	lro->tcp_next_seq = tcp_pyld_len + ntohl(tcp->seq);
S
Surjit Reang 已提交
8366
	lro->tcp_ack = tcp->ack_seq;
8367 8368 8369
	lro->sg_num = 1;
	lro->total_len = ntohs(ip->tot_len);
	lro->frags_len = 0;
8370
	lro->vlan_tag = vlan_tag;
8371
	/*
8372 8373 8374 8375
	 * check if we saw TCP timestamp. Other consistency checks have
	 * already been done.
 	 */
	if (tcp->doff == 8) {
S
Surjit Reang 已提交
8376 8377
		__be32 *ptr;
		ptr = (__be32 *)(tcp+1);
8378
		lro->saw_ts = 1;
S
Surjit Reang 已提交
8379
		lro->cur_tsval = ntohl(*(ptr+1));
8380 8381 8382 8383 8384
		lro->cur_tsecr = *(ptr+2);
	}
	lro->in_use = 1;
}

R
Ralf Baechle 已提交
8385
static void update_L3L4_header(struct s2io_nic *sp, struct lro *lro)
8386 8387 8388
{
	struct iphdr *ip = lro->iph;
	struct tcphdr *tcp = lro->tcph;
8389
	__sum16 nchk;
R
Ralf Baechle 已提交
8390
	struct stat_block *statinfo = sp->mac_control.stats_info;
8391 8392 8393 8394 8395 8396 8397 8398 8399 8400 8401 8402 8403 8404
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __FUNCTION__);

	/* Update L3 header */
	ip->tot_len = htons(lro->total_len);
	ip->check = 0;
	nchk = ip_fast_csum((u8 *)lro->iph, ip->ihl);
	ip->check = nchk;

	/* Update L4 header */
	tcp->ack_seq = lro->tcp_ack;
	tcp->window = lro->window;

	/* Update tsecr field if this session has timestamps enabled */
	if (lro->saw_ts) {
S
Surjit Reang 已提交
8405
		__be32 *ptr = (__be32 *)(tcp + 1);
8406 8407 8408 8409 8410 8411 8412 8413 8414 8415
		*(ptr+2) = lro->cur_tsecr;
	}

	/* Update counters required for calculation of
	 * average no. of packets aggregated.
	 */
	statinfo->sw_stat.sum_avg_pkts_aggregated += lro->sg_num;
	statinfo->sw_stat.num_aggregations++;
}

R
Ralf Baechle 已提交
8416
static void aggregate_new_rx(struct lro *lro, struct iphdr *ip,
8417 8418 8419 8420 8421 8422 8423 8424 8425 8426 8427
		struct tcphdr *tcp, u32 l4_pyld)
{
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __FUNCTION__);
	lro->total_len += l4_pyld;
	lro->frags_len += l4_pyld;
	lro->tcp_next_seq += l4_pyld;
	lro->sg_num++;

	/* Update ack seq no. and window ad(from this pkt) in LRO object */
	lro->tcp_ack = tcp->ack_seq;
	lro->window = tcp->window;
8428

8429
	if (lro->saw_ts) {
S
Surjit Reang 已提交
8430
		__be32 *ptr;
8431
		/* Update tsecr and tsval from this packet */
S
Surjit Reang 已提交
8432 8433
		ptr = (__be32 *)(tcp+1);
		lro->cur_tsval = ntohl(*(ptr+1));
8434 8435 8436 8437
		lro->cur_tsecr = *(ptr + 2);
	}
}

R
Ralf Baechle 已提交
8438
static int verify_l3_l4_lro_capable(struct lro *l_lro, struct iphdr *ip,
8439 8440 8441 8442
				    struct tcphdr *tcp, u32 tcp_pyld_len)
{
	u8 *ptr;

8443 8444
	DBG_PRINT(INFO_DBG,"%s: Been here...\n", __FUNCTION__);

8445 8446 8447 8448 8449 8450 8451 8452
	if (!tcp_pyld_len) {
		/* Runt frame or a pure ack */
		return -1;
	}

	if (ip->ihl != 5) /* IP has options */
		return -1;

8453 8454 8455 8456 8457
	/* If we see CE codepoint in IP header, packet is not mergeable */
	if (INET_ECN_is_ce(ipv4_get_dsfield(ip)))
		return -1;

	/* If we see ECE or CWR flags in TCP header, packet is not mergeable */
8458
	if (tcp->urg || tcp->psh || tcp->rst || tcp->syn || tcp->fin ||
8459
				    tcp->ece || tcp->cwr || !tcp->ack) {
8460 8461 8462 8463 8464 8465 8466 8467
		/*
		 * Currently recognize only the ack control word and
		 * any other control field being set would result in
		 * flushing the LRO session
		 */
		return -1;
	}

8468
	/*
8469 8470 8471 8472 8473 8474 8475
	 * Allow only one TCP timestamp option. Don't aggregate if
	 * any other options are detected.
	 */
	if (tcp->doff != 5 && tcp->doff != 8)
		return -1;

	if (tcp->doff == 8) {
8476
		ptr = (u8 *)(tcp + 1);
8477 8478 8479 8480 8481 8482 8483
		while (*ptr == TCPOPT_NOP)
			ptr++;
		if (*ptr != TCPOPT_TIMESTAMP || *(ptr+1) != TCPOLEN_TIMESTAMP)
			return -1;

		/* Ensure timestamp value increases monotonically */
		if (l_lro)
S
Surjit Reang 已提交
8484
			if (l_lro->cur_tsval > ntohl(*((__be32 *)(ptr+2))))
8485 8486 8487
				return -1;

		/* timestamp echo reply should be non-zero */
S
Surjit Reang 已提交
8488
		if (*((__be32 *)(ptr+6)) == 0)
8489 8490 8491 8492 8493 8494 8495
			return -1;
	}

	return 0;
}

static int
8496 8497 8498
s2io_club_tcp_session(struct ring_info *ring_data, u8 *buffer, u8 **tcp,
	u32 *tcp_len, struct lro **lro, struct RxD_t *rxdp,
	struct s2io_nic *sp)
8499 8500 8501 8502
{
	struct iphdr *ip;
	struct tcphdr *tcph;
	int ret = 0, i;
8503
	u16 vlan_tag = 0;
8504 8505

	if (!(ret = check_L2_lro_capable(buffer, &ip, (struct tcphdr **)tcp,
8506
					 rxdp, sp))) {
8507 8508
		DBG_PRINT(INFO_DBG,"IP Saddr: %x Daddr: %x\n",
			  ip->saddr, ip->daddr);
8509
	} else
8510 8511
		return ret;

8512
	vlan_tag = RXD_GET_VLAN_TAG(rxdp->Control_2);
8513 8514 8515
	tcph = (struct tcphdr *)*tcp;
	*tcp_len = get_l4_pyld_length(ip, tcph);
	for (i=0; i<MAX_LRO_SESSIONS; i++) {
8516
		struct lro *l_lro = &ring_data->lro0_n[i];
8517 8518 8519 8520 8521 8522 8523 8524 8525 8526 8527 8528 8529 8530 8531 8532 8533 8534 8535 8536 8537 8538 8539 8540 8541 8542 8543 8544 8545 8546 8547 8548 8549 8550 8551 8552 8553
		if (l_lro->in_use) {
			if (check_for_socket_match(l_lro, ip, tcph))
				continue;
			/* Sock pair matched */
			*lro = l_lro;

			if ((*lro)->tcp_next_seq != ntohl(tcph->seq)) {
				DBG_PRINT(INFO_DBG, "%s:Out of order. expected "
					  "0x%x, actual 0x%x\n", __FUNCTION__,
					  (*lro)->tcp_next_seq,
					  ntohl(tcph->seq));

				sp->mac_control.stats_info->
				   sw_stat.outof_sequence_pkts++;
				ret = 2;
				break;
			}

			if (!verify_l3_l4_lro_capable(l_lro, ip, tcph,*tcp_len))
				ret = 1; /* Aggregate */
			else
				ret = 2; /* Flush both */
			break;
		}
	}

	if (ret == 0) {
		/* Before searching for available LRO objects,
		 * check if the pkt is L3/L4 aggregatable. If not
		 * don't create new LRO session. Just send this
		 * packet up.
		 */
		if (verify_l3_l4_lro_capable(NULL, ip, tcph, *tcp_len)) {
			return 5;
		}

		for (i=0; i<MAX_LRO_SESSIONS; i++) {
8554
			struct lro *l_lro = &ring_data->lro0_n[i];
8555 8556 8557 8558 8559 8560 8561 8562 8563 8564 8565 8566 8567 8568 8569 8570 8571
			if (!(l_lro->in_use)) {
				*lro = l_lro;
				ret = 3; /* Begin anew */
				break;
			}
		}
	}

	if (ret == 0) { /* sessions exceeded */
		DBG_PRINT(INFO_DBG,"%s:All LRO sessions already in use\n",
			  __FUNCTION__);
		*lro = NULL;
		return ret;
	}

	switch (ret) {
		case 3:
8572 8573
			initiate_new_session(*lro, buffer, ip, tcph, *tcp_len,
								vlan_tag);
8574 8575 8576 8577 8578 8579 8580 8581 8582 8583 8584 8585 8586 8587 8588 8589 8590 8591 8592 8593
			break;
		case 2:
			update_L3L4_header(sp, *lro);
			break;
		case 1:
			aggregate_new_rx(*lro, ip, tcph, *tcp_len);
			if ((*lro)->sg_num == sp->lro_max_aggr_per_sess) {
				update_L3L4_header(sp, *lro);
				ret = 4; /* Flush the LRO */
			}
			break;
		default:
			DBG_PRINT(ERR_DBG,"%s:Dont know, can't say!!\n",
				__FUNCTION__);
			break;
	}

	return ret;
}

R
Ralf Baechle 已提交
8594
static void clear_lro_session(struct lro *lro)
8595
{
R
Ralf Baechle 已提交
8596
	static u16 lro_struct_size = sizeof(struct lro);
8597 8598 8599 8600

	memset(lro, 0, lro_struct_size);
}

8601
static void queue_rx_frame(struct sk_buff *skb, u16 vlan_tag)
8602 8603
{
	struct net_device *dev = skb->dev;
8604
	struct s2io_nic *sp = dev->priv;
8605 8606

	skb->protocol = eth_type_trans(skb, dev);
8607 8608 8609 8610 8611 8612 8613 8614 8615 8616 8617 8618 8619
	if (sp->vlgrp && vlan_tag
		&& (vlan_strip_flag)) {
		/* Queueing the vlan frame to the upper layer */
		if (sp->config.napi)
			vlan_hwaccel_receive_skb(skb, sp->vlgrp, vlan_tag);
		else
			vlan_hwaccel_rx(skb, sp->vlgrp, vlan_tag);
	} else {
		if (sp->config.napi)
			netif_receive_skb(skb);
		else
			netif_rx(skb);
	}
8620 8621
}

R
Ralf Baechle 已提交
8622 8623
static void lro_append_pkt(struct s2io_nic *sp, struct lro *lro,
			   struct sk_buff *skb,
8624 8625
			   u32 tcp_len)
{
8626
	struct sk_buff *first = lro->parent;
8627 8628 8629 8630

	first->len += tcp_len;
	first->data_len = lro->frags_len;
	skb_pull(skb, (skb->len - tcp_len));
8631 8632
	if (skb_shinfo(first)->frag_list)
		lro->last_frag->next = skb;
8633 8634
	else
		skb_shinfo(first)->frag_list = skb;
8635
	first->truesize += skb->truesize;
8636
	lro->last_frag = skb;
8637 8638 8639
	sp->mac_control.stats_info->sw_stat.clubbed_frms_cnt++;
	return;
}
8640 8641 8642 8643

/**
 * s2io_io_error_detected - called when PCI error is detected
 * @pdev: Pointer to PCI device
8644
 * @state: The current pci connection state
8645 8646 8647 8648 8649 8650 8651 8652 8653 8654 8655 8656 8657 8658 8659 8660 8661 8662 8663 8664 8665 8666 8667 8668 8669 8670 8671 8672 8673 8674 8675 8676 8677 8678 8679 8680 8681 8682 8683 8684 8685 8686 8687 8688 8689 8690 8691 8692 8693 8694 8695 8696 8697 8698 8699 8700 8701 8702 8703 8704 8705 8706 8707 8708 8709 8710 8711 8712 8713 8714 8715 8716 8717 8718 8719 8720 8721
 *
 * This function is called after a PCI bus error affecting
 * this device has been detected.
 */
static pci_ers_result_t s2io_io_error_detected(struct pci_dev *pdev,
                                               pci_channel_state_t state)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct s2io_nic *sp = netdev->priv;

	netif_device_detach(netdev);

	if (netif_running(netdev)) {
		/* Bring down the card, while avoiding PCI I/O */
		do_s2io_card_down(sp, 0);
	}
	pci_disable_device(pdev);

	return PCI_ERS_RESULT_NEED_RESET;
}

/**
 * s2io_io_slot_reset - called after the pci bus has been reset.
 * @pdev: Pointer to PCI device
 *
 * Restart the card from scratch, as if from a cold-boot.
 * At this point, the card has exprienced a hard reset,
 * followed by fixups by BIOS, and has its config space
 * set up identically to what it was at cold boot.
 */
static pci_ers_result_t s2io_io_slot_reset(struct pci_dev *pdev)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct s2io_nic *sp = netdev->priv;

	if (pci_enable_device(pdev)) {
		printk(KERN_ERR "s2io: "
		       "Cannot re-enable PCI device after reset.\n");
		return PCI_ERS_RESULT_DISCONNECT;
	}

	pci_set_master(pdev);
	s2io_reset(sp);

	return PCI_ERS_RESULT_RECOVERED;
}

/**
 * s2io_io_resume - called when traffic can start flowing again.
 * @pdev: Pointer to PCI device
 *
 * This callback is called when the error recovery driver tells
 * us that its OK to resume normal operation.
 */
static void s2io_io_resume(struct pci_dev *pdev)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct s2io_nic *sp = netdev->priv;

	if (netif_running(netdev)) {
		if (s2io_card_up(sp)) {
			printk(KERN_ERR "s2io: "
			       "Can't bring device back up after reset.\n");
			return;
		}

		if (s2io_set_mac_addr(netdev, netdev->dev_addr) == FAILURE) {
			s2io_card_down(sp);
			printk(KERN_ERR "s2io: "
			       "Can't resetore mac addr after reset.\n");
			return;
		}
	}

	netif_device_attach(netdev);
	netif_wake_queue(netdev);
}
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