- 28 9月, 2019 1 次提交
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由 Russell King 提交于
ADMA errors are potentially data corrupting events; although we print the register state, we do not usefully print the ADMA descriptors. Worse than that, we print them by referencing their virtual address which is meaningless when the register state gives us the DMA address of the failing descriptor. Print the ADMA descriptors giving their DMA addresses rather than their virtual addresses, and print them using SDHCI_DUMP() rather than DBG(). We also do not show the correct value of the interrupt status register; the register dump shows the current value, after we have cleared the pending interrupts we are going to service. What is more useful is to print the interrupts that _were_ pending at the time the ADMA error was encountered. Fix that too. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 13 9月, 2019 3 次提交
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由 Ulf Hansson 提交于
Accessing the device when it may be runtime suspended is a bug, which is the case in tmio_mmc_host_remove(). Let's fix the behaviour. Cc: stable@vger.kernel.org Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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由 Ulf Hansson 提交于
The tmio_mmc_host_probe() calls pm_runtime_set_active() to update the runtime PM status of the device, as to make it reflect the current status of the HW. This works fine for most cases, but unfortunate not for all. Especially, there is a generic problem when the device has a genpd attached and that genpd have the ->start|stop() callbacks assigned. More precisely, if the driver calls pm_runtime_set_active() during ->probe(), genpd does not get to invoke the ->start() callback for it, which means the HW isn't really fully powered on. Furthermore, in the next phase, when the device becomes runtime suspended, genpd will invoke the ->stop() callback for it, potentially leading to usage count imbalance problems, depending on what's implemented behind the callbacks of course. To fix this problem, convert to call pm_runtime_get_sync() from tmio_mmc_host_probe() rather than pm_runtime_set_active(). Additionally, to avoid bumping usage counters and unnecessary re-initializing the HW the first time the tmio driver's ->runtime_resume() callback is called, introduce a state flag to keeping track of this. Cc: stable@vger.kernel.org Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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由 Ulf Hansson 提交于
This reverts commit 7ff21319. It turns out that the above commit introduces other problems. For example, calling pm_runtime_set_active() must not be done prior calling pm_runtime_enable() as that makes it fail. This leads to additional problems, such as clock enables being wrongly balanced. Rather than fixing the problem on top, let's start over by doing a revert. Fixes: 7ff21319 ("mmc: tmio: move runtime PM enablement to the driver implementations") Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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- 12 9月, 2019 1 次提交
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由 Yoshihiro Shimoda 提交于
Since this host controller can merge bigger segments if DMA API layer cam merge the segments, this patch adds the flag. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChristoph Hellwig <hch@lst.de>
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- 11 9月, 2019 35 次提交
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由 Colin Ian King 提交于
Don't populate the array degrees on the stack but instead make it static const. Makes the object code smaller by 46 bytes. Before: text data bss dec hex filename 5356 1560 0 6916 1b04 dw_mmc-hi3798cv200.o After: text data bss dec hex filename 5214 1656 0 6870 1ad6 dw_mmc-hi3798cv200.o (gcc version 9.2.1, amd64) Signed-off-by: NColin Ian King <colin.king@canonical.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ulf Hansson 提交于
Instead of keeping track of whether SDIO IRQs have been enabled via an internal sdhci status flag, avoid the open-coding and convert into using sdio_irq_claimed(). Reviewed-by: NMatthias Kaehlcke <mka@chromium.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ulf Hansson 提交于
Nowadays sdhci prevents runtime suspend when SDIO IRQs are enabled. However, some variants such as sdhci-esdhc-imx's, tries to allow runtime suspend while having the SDIO IRQs enabled, but without supporting remote wakeups. This support is a bit questionable, especially if the host device have a PM domain attached that can be power gated, but more importantly, the code have also become redundant (which was not the case when it was introduced). Rather than keeping the redundant code around, let's drop it and leave this to be revisited later on. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ulf Hansson 提交于
The sdhci_ack_sdio_irq() is called only when SDIO IRQs are enabled. Therefore, let's drop the redundant check of the internal SDHCI_SDIO_IRQ_ENABLED flag and just re-enable the IRQs immediately. Reviewed-by: NMatthias Kaehlcke <mka@chromium.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ulf Hansson 提交于
In cases when SDIO IRQs have been enabled, runtime suspend is prevented by the driver. However, this still means msdc_runtime_suspend|resume() gets called during system suspend/resume, via pm_runtime_force_suspend|resume(). This means during system suspend/resume, the register context of the mtk-sd device most likely loses its register context, even in cases when SDIO IRQs have been enabled. To re-enable the SDIO IRQs during system resume, the mtk-sd driver currently relies on the mmc core to re-enable the SDIO IRQs when it resumes the SDIO card, but this isn't the recommended solution. Instead, it's better to deal with this locally in the mtk-sd driver, so let's do that. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ulf Hansson 提交于
In cases when SDIO IRQs have been enabled, runtime suspend is prevented by the driver. However, this still means dw_mci_runtime_suspend|resume() gets called during system suspend/resume, via pm_runtime_force_suspend|resume(). This means during system suspend/resume, the register context of the dw_mmc device most likely loses its register context, even in cases when SDIO IRQs have been enabled. To re-enable the SDIO IRQs during system resume, the dw_mmc driver currently relies on the mmc core to re-enable the SDIO IRQs when it resumes the SDIO card, but this isn't the recommended solution. Instead, it's better to deal with this locally in the dw_mmc driver, so let's do that. Tested-by: NMatthias Kaehlcke <mka@chromium.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Reviewed-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Shirley Her (SC) 提交于
Fix data read/write error in HS200 mode due to chip DLL lock phase shift Signed-off-by: NShirley Her <shirley.her@bayhubtech.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Shirley Her (SC) 提交于
Move functions in preparation to fix DLL lock phase shift issue Signed-off-by: NShirley Her <shirley.her@bayhubtech.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Shirley Her (SC) 提交于
Change O2 Host PLL and DLL register name Signed-off-by: NShirley Her <shirley.her@bayhubtech.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Al Cooper 提交于
When switching from any MMC speed mode that requires 1.8v (HS200, HS400 and HS400ES) to High Speed (HS) mode, the system ends up configured for SDR12 with a 50MHz clock which is an illegal mode. This happens because the SDHCI_CTRL_VDD_180 bit in the SDHCI_HOST_CONTROL2 register is left set and when this bit is set, the speed mode is controlled by the SDHCI_CTRL_UHS field in the SDHCI_HOST_CONTROL2 register. The SDHCI_CTRL_UHS field will end up being set to 0 (SDR12) by sdhci_set_uhs_signaling() because there is no UHS mode being set. The fix is to change sdhci_set_uhs_signaling() to set the SDHCI_CTRL_UHS field to SDR25 (which is the same as HS) for any switch to HS mode. This was found on a new eMMC controller that does strict checking of the speed mode and the corresponding clock rate. It caused the switch to HS400 mode to fail because part of the sequence to switch to HS400 requires a switch from HS200 to HS before going to HS400. Suggested-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NAl Cooper <alcooperx@gmail.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andrew Jeffery 提交于
Resolves the following build error reported by the 0-day bot: ERROR: "of_platform_device_create" [drivers/mmc/host/sdhci-of-aspeed.ko] undefined! SPARC does not set CONFIG_OF_ADDRESS so the symbol is missing. Depend on CONFIG_OF_ADDRESS to ensure the driver is only built for supported configurations. Fixes: 2d28dbe042f4 ("mmc: sdhci-of-aspeed: Add support for the ASPEED SD controller") Reported-by: Nkbuild test robot <lkp@intel.com> Signed-off-by: NAndrew Jeffery <andrew@aj.id.au> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andrew Jeffery 提交于
Add a get_max_clock() handler to sdhci-of-aspeed to report f_max as the maximum clock rate if it is set. This enables artificial limitation of the bus speed via max-frequency in the devicetree for e.g. the AST2600 evaluation board where I was seeing errors at 200MHz. Signed-off-by: NAndrew Jeffery <andrew@aj.id.au> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andrew Jeffery 提交于
The early-exit didn't seem to matter on the AST2500, but on the AST2600 the SD clock genuinely may not be running on entry to aspeed_sdhci_set_clock(). Remove the early exit to ensure we always run sdhci_enable_clk(). Signed-off-by: NAndrew Jeffery <andrew@aj.id.au> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andrew Jeffery 提交于
host->clock is already managed by sdhci_set_ios(). Suggested-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NAndrew Jeffery <andrew@aj.id.au> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andy Shevchenko 提交于
Use for_each_sg() macro instead of open coded variant. No functional change intended. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Tamás Szűcs 提交于
Save set clock in mmc_host actual_clock enabling exporting it via debugfs. This will indicate the precise SD clock in I/O settings rather than only the sometimes misleading requested clock. Signed-off-by: NTamás Szűcs <tszucs@protonmail.ch> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Masahiro Yamada 提交于
Currently, the DMA addresses are casted to (u64) for the upper 32bits to avoid "right shift count >= width of type" warning. <linux/kernel.h> provides macros to address this, and I like the macro names are self-documenting. I introduced a new helper, sdhci_set_adma_addr() to avoid the code duplication. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Masahiro Yamada 提交于
The datasheet of the IP (sd4hc) says it is compiatible with SDHCI v4, but the spec version field in the version register is read as 2 (i.e. SDHCI_SPEC_300) based on the RTL provided by Cadence. Socionext did not fix it up when it integrated the IP into the SoCs. So, it is working as SDHCI v3. It is not a real problem because there is no difference in the program flow in sdhci.c between SDHCI_SPEC_300/400, but set the real version just in case. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Masahiro Yamada 提交于
__sdhci_read_caps() does not modify *ver, *caps, or *caps1. Probably, the caller of this function will want to constifythe parameters passed in. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 yong mao 提交于
SDIO IRQ is not defaultly triggered by low level, but by falling edge. It needs to set related register to enable SDIO IRQ low level trigger function. Otherwise the SDIO IRQ may be lost in some specail condition. Signed-off-by: NYong Mao <yong.mao@mediatek.com> Signed-off-by: NChaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ben Chuang 提交于
Export sdhci_abort_tuning() function symbols which are used by other SD Host controller driver modules. Signed-off-by: NBen Chuang <ben.chuang@genesyslogic.com.tw> Co-developed-by: NMichael K Johnson <johnsonm@danlj.org> Signed-off-by: NMichael K Johnson <johnsonm@danlj.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ben Chuang 提交于
The GL9750 and GL9755 chipsets, and possibly others, require PLL Enable setup as part of the internal clock setup as described in 3.2.1 Internal Clock Setup Sequence of SD Host Controller Simplified Specification Version 4.20. Signed-off-by: NBen Chuang <ben.chuang@genesyslogic.com.tw> Co-developed-by: NMichael K Johnson <johnsonm@danlj.org> Signed-off-by: NMichael K Johnson <johnsonm@danlj.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ben Chuang 提交于
According to section 3.2.1 internal clock setup in SD Host Controller Simplified Specifications 4.20, the timeout of loop for checking internal clock stable is defined as 150ms. Signed-off-by: NBen Chuang <ben.chuang@genesyslogic.com.tw> Co-developed-by: NMichael K Johnson <johnsonm@danlj.org> Signed-off-by: NMichael K Johnson <johnsonm@danlj.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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The current arasan sdhci PHY configuration isn't compatible with the PHY on Intel's LGM(Lightning Mountain) SoC devices. Therefore, add a new compatible, to adapt the Intel's LGM eMMC PHY with arasan-sdhc controller to configure the PHY. Signed-off-by: NRamuthevar Vadivel Muruganx <vadivel.muruganx.ramuthevar@linux.intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Wei Yongjun 提交于
In case of error, the function of_platform_device_create() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Signed-off-by: NWei Yongjun <weiyongjun1@huawei.com> Reviewed-by: NAndrew Jeffery <andrew@aj.id.au> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Stefan Wahren 提交于
Make sure the sdhost driver doesn't use requests bigger than SWIOTLB can handle. Signed-off-by: NStefan Wahren <wahrenst@gmx.net> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andrew Jeffery 提交于
Add a minimal driver for ASPEED's SD controller, which exposes two SDHCIs. The ASPEED design implements a common register set for the SDHCIs, and moves some of the standard configuration elements out to this common area (e.g. 8-bit mode, and card detect configuration which is not currently supported). The SD controller has a dedicated hardware interrupt that is shared between the slots. The common register set exposes information on which slot triggered the interrupt; early revisions of the patch introduced an irqchip for the register, but reality is it doesn't behave as an irqchip, and the result fits awkwardly into the irqchip APIs. Instead I've taken the simple approach of using the IRQ as a shared IRQ with some minor performance impact for the second slot. Ryan was the original author of the patch - I've taken his work and massaged it to drop the irqchip support and rework the devicetree integration. The driver has been smoke tested under qemu against a minimal SD controller model and lightly tested on an ast2500-evb. Signed-off-by: NRyan Chen <ryanchen.aspeed@gmail.com> Signed-off-by: NAndrew Jeffery <andrew@aj.id.au> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Reviewed-by: NJoel Stanley <joel@jms.id.au> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Chaotian Jing 提交于
MSDC IP which support 64G DRAM will support 24bits BDMA buffer length, so add support it. Signed-off-by: NChaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Chaotian Jing 提交于
when plug out SD card, may get data CRC error, the MMC core will issue CMD13 to get card status, then CMD13 timeout(due to card plug out) will trigger CMD19 tuning, first CMD19 timeout has not call msdc_reset_hw() and cause the next CMD19 gets controller busy. Signed-off-by: NChaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Yoshihiro Shimoda 提交于
All R-Car Gen3 SoCs with any ES version cannot use this DMAC actually. So, this patch removes the compatibles of R-Car Gen3 SoCs from renesas_sdhi_sys_dmac_of_match. Since the previous code has an empty whitelist to prevent probing of R-Car Gen3 SoCs, no behavior changes. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Paul Cercueil 提交于
We don't need to set the 'slave_id' anymore - that field is never read by the DMA driver. Signed-off-by: NPaul Cercueil <paul@crapouillou.net> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Paul Cercueil 提交于
Fix wrong code indentation which made the code hard to read, and fix return with value in void function. Signed-off-by: NPaul Cercueil <paul@crapouillou.net> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Gustavo A. R. Silva 提交于
One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct sdhci_cdns_priv { ... struct sdhci_cdns_phy_param phy_params[0]; }; Make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes. So, replace the following form: sizeof(*priv) + sizeof(priv->phy_params[0]) * nr_phy_params with: struct_size(priv, phy_params, nr_phy_params) Also, notice that, in this case, variable priv_size is not necessary, hence it is removed. This code was detected with the help of Coccinelle. Signed-off-by: NGustavo A. R. Silva <gustavo@embeddedor.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Yinbo Zhu 提交于
This patch is to add erratum A011334 support in ls1028a 1.0 SoC Signed-off-by: NYinbo Zhu <yinbo.zhu@nxp.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Stephen Boyd 提交于
We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-mmc@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NStephen Boyd <swboyd@chromium.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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