mmc: sdhci: Change timeout of loop for checking internal clock stable
According to section 3.2.1 internal clock setup in SD Host Controller Simplified Specifications 4.20, the timeout of loop for checking internal clock stable is defined as 150ms. Signed-off-by: NBen Chuang <ben.chuang@genesyslogic.com.tw> Co-developed-by: NMichael K Johnson <johnsonm@danlj.org> Signed-off-by: NMichael K Johnson <johnsonm@danlj.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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