nouveau_bo.c 38.2 KB
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/*
 * Copyright 2007 Dave Airlied
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */
/*
 * Authors: Dave Airlied <airlied@linux.ie>
 *	    Ben Skeggs   <darktama@iinet.net.au>
 *	    Jeremy Kolb  <jkolb@brandeis.edu>
 */

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#include <core/engine.h>
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#include <linux/swiotlb.h>
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#include <subdev/fb.h>
#include <subdev/vm.h>
#include <subdev/bar.h>

#include "nouveau_drm.h"
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#include "nouveau_dma.h"
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#include "nouveau_fence.h"
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#include "nouveau_bo.h"
#include "nouveau_ttm.h"
#include "nouveau_gem.h"
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/*
 * NV10-NV40 tiling helpers
 */

static void
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nv10_bo_update_tile_region(struct drm_device *dev, struct nouveau_drm_tile *reg,
			   u32 addr, u32 size, u32 pitch, u32 flags)
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{
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	struct nouveau_drm *drm = nouveau_drm(dev);
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	int i = reg - drm->tile.reg;
	struct nouveau_fb *pfb = nouveau_fb(drm->device);
	struct nouveau_fb_tile *tile = &pfb->tile.region[i];
	struct nouveau_engine *engine;
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	nouveau_fence_unref(&reg->fence);
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	if (tile->pitch)
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		pfb->tile.fini(pfb, i, tile);
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	if (pitch)
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		pfb->tile.init(pfb, i, addr, size, pitch, flags, tile);
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	pfb->tile.prog(pfb, i, tile);
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	if ((engine = nouveau_engine(pfb, NVDEV_ENGINE_GR)))
		engine->tile_prog(engine, i);
	if ((engine = nouveau_engine(pfb, NVDEV_ENGINE_MPEG)))
		engine->tile_prog(engine, i);
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}

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static struct nouveau_drm_tile *
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nv10_bo_get_tile_region(struct drm_device *dev, int i)
{
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	struct nouveau_drm *drm = nouveau_drm(dev);
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	struct nouveau_drm_tile *tile = &drm->tile.reg[i];
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81
	spin_lock(&drm->tile.lock);
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	if (!tile->used &&
	    (!tile->fence || nouveau_fence_done(tile->fence)))
		tile->used = true;
	else
		tile = NULL;

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	spin_unlock(&drm->tile.lock);
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	return tile;
}

static void
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nv10_bo_put_tile_region(struct drm_device *dev, struct nouveau_drm_tile *tile,
			struct nouveau_fence *fence)
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{
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	struct nouveau_drm *drm = nouveau_drm(dev);
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	if (tile) {
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		spin_lock(&drm->tile.lock);
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		tile->fence = nouveau_fence_ref(fence);
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		tile->used = false;
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		spin_unlock(&drm->tile.lock);
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	}
}

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static struct nouveau_drm_tile *
nv10_bo_set_tiling(struct drm_device *dev, u32 addr,
		   u32 size, u32 pitch, u32 flags)
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{
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	struct nouveau_drm *drm = nouveau_drm(dev);
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	struct nouveau_fb *pfb = nouveau_fb(drm->device);
	struct nouveau_drm_tile *tile, *found = NULL;
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	int i;

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	for (i = 0; i < pfb->tile.regions; i++) {
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		tile = nv10_bo_get_tile_region(dev, i);

		if (pitch && !found) {
			found = tile;
			continue;

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		} else if (tile && pfb->tile.region[i].pitch) {
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			/* Kill an unused tile region. */
			nv10_bo_update_tile_region(dev, tile, 0, 0, 0, 0);
		}

		nv10_bo_put_tile_region(dev, tile, NULL);
	}

	if (found)
		nv10_bo_update_tile_region(dev, found, addr, size,
					    pitch, flags);
	return found;
}

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static void
nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
{
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	struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
	struct drm_device *dev = drm->dev;
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	struct nouveau_bo *nvbo = nouveau_bo(bo);

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	if (unlikely(nvbo->gem.filp))
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		DRM_ERROR("bo %p still attached to GEM object\n", bo);
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	WARN_ON(nvbo->pin_refcnt > 0);
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	nv10_bo_put_tile_region(dev, nvbo->tile, NULL);
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	kfree(nvbo);
}

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static void
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nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
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		       int *align, int *size)
154
{
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	struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
	struct nouveau_device *device = nv_device(drm->device);
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	if (device->card_type < NV_50) {
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		if (nvbo->tile_mode) {
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			if (device->chipset >= 0x40) {
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				*align = 65536;
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				*size = roundup(*size, 64 * nvbo->tile_mode);
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			} else if (device->chipset >= 0x30) {
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				*align = 32768;
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				*size = roundup(*size, 64 * nvbo->tile_mode);
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			} else if (device->chipset >= 0x20) {
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				*align = 16384;
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				*size = roundup(*size, 64 * nvbo->tile_mode);
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			} else if (device->chipset >= 0x10) {
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				*align = 16384;
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				*size = roundup(*size, 32 * nvbo->tile_mode);
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			}
		}
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	} else {
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		*size = roundup(*size, (1 << nvbo->page_shift));
		*align = max((1 <<  nvbo->page_shift), *align);
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	}

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	*size = roundup(*size, PAGE_SIZE);
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}

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int
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nouveau_bo_new(struct drm_device *dev, int size, int align,
	       uint32_t flags, uint32_t tile_mode, uint32_t tile_flags,
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	       struct sg_table *sg,
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	       struct nouveau_bo **pnvbo)
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{
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	struct nouveau_drm *drm = nouveau_drm(dev);
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	struct nouveau_bo *nvbo;
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	size_t acc_size;
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	int ret;
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	int type = ttm_bo_type_device;
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	int lpg_shift = 12;
	int max_size;

	if (drm->client.base.vm)
		lpg_shift = drm->client.base.vm->vmm->lpg_shift;
	max_size = INT_MAX & ~((1 << lpg_shift) - 1);
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	if (size <= 0 || size > max_size) {
		nv_warn(drm, "skipped size %x\n", (u32)size);
		return -EINVAL;
	}
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	if (sg)
		type = ttm_bo_type_sg;
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	nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
	if (!nvbo)
		return -ENOMEM;
	INIT_LIST_HEAD(&nvbo->head);
	INIT_LIST_HEAD(&nvbo->entry);
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	INIT_LIST_HEAD(&nvbo->vma_list);
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	nvbo->tile_mode = tile_mode;
	nvbo->tile_flags = tile_flags;
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	nvbo->bo.bdev = &drm->ttm.bdev;
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	nvbo->page_shift = 12;
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	if (drm->client.base.vm) {
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		if (!(flags & TTM_PL_FLAG_TT) && size > 256 * 1024)
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			nvbo->page_shift = drm->client.base.vm->vmm->lpg_shift;
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	}

	nouveau_bo_fixup_align(nvbo, flags, &align, &size);
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	nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
	nouveau_bo_placement_set(nvbo, flags, 0);
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	acc_size = ttm_bo_dma_acc_size(&drm->ttm.bdev, size,
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				       sizeof(struct nouveau_bo));

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	ret = ttm_bo_init(&drm->ttm.bdev, &nvbo->bo, size,
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			  type, &nvbo->placement,
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			  align >> PAGE_SHIFT, false, NULL, acc_size, sg,
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			  nouveau_bo_del_ttm);
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	if (ret) {
		/* ttm will call nouveau_bo_del_ttm if it fails.. */
		return ret;
	}

	*pnvbo = nvbo;
	return 0;
}

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static void
set_placement_list(uint32_t *pl, unsigned *n, uint32_t type, uint32_t flags)
{
	*n = 0;

	if (type & TTM_PL_FLAG_VRAM)
		pl[(*n)++] = TTM_PL_FLAG_VRAM | flags;
	if (type & TTM_PL_FLAG_TT)
		pl[(*n)++] = TTM_PL_FLAG_TT | flags;
	if (type & TTM_PL_FLAG_SYSTEM)
		pl[(*n)++] = TTM_PL_FLAG_SYSTEM | flags;
}

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static void
set_placement_range(struct nouveau_bo *nvbo, uint32_t type)
{
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	struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
	struct nouveau_fb *pfb = nouveau_fb(drm->device);
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	u32 vram_pages = pfb->ram->size >> PAGE_SHIFT;
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	if ((nv_device(drm->device)->card_type == NV_10 ||
	     nv_device(drm->device)->card_type == NV_11) &&
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	    nvbo->tile_mode && (type & TTM_PL_FLAG_VRAM) &&
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	    nvbo->bo.mem.num_pages < vram_pages / 4) {
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		/*
		 * Make sure that the color and depth buffers are handled
		 * by independent memory controller units. Up to a 9x
		 * speed up when alpha-blending and depth-test are enabled
		 * at the same time.
		 */
		if (nvbo->tile_flags & NOUVEAU_GEM_TILE_ZETA) {
			nvbo->placement.fpfn = vram_pages / 2;
			nvbo->placement.lpfn = ~0;
		} else {
			nvbo->placement.fpfn = 0;
			nvbo->placement.lpfn = vram_pages / 2;
		}
	}
}

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void
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nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t type, uint32_t busy)
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{
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	struct ttm_placement *pl = &nvbo->placement;
	uint32_t flags = TTM_PL_MASK_CACHING |
		(nvbo->pin_refcnt ? TTM_PL_FLAG_NO_EVICT : 0);

	pl->placement = nvbo->placements;
	set_placement_list(nvbo->placements, &pl->num_placement,
			   type, flags);

	pl->busy_placement = nvbo->busy_placements;
	set_placement_list(nvbo->busy_placements, &pl->num_busy_placement,
			   type | busy, flags);
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	set_placement_range(nvbo, type);
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}

int
nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype)
{
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	struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
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	struct ttm_buffer_object *bo = &nvbo->bo;
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	int ret;
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	ret = ttm_bo_reserve(bo, false, false, false, 0);
	if (ret)
		goto out;

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	if (nvbo->pin_refcnt && !(memtype & (1 << bo->mem.mem_type))) {
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		NV_ERROR(drm, "bo %p pinned elsewhere: 0x%08x vs 0x%08x\n", bo,
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			 1 << bo->mem.mem_type, memtype);
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		ret = -EINVAL;
		goto out;
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	}

	if (nvbo->pin_refcnt++)
		goto out;

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	nouveau_bo_placement_set(nvbo, memtype, 0);
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	ret = nouveau_bo_validate(nvbo, false, false);
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	if (ret == 0) {
		switch (bo->mem.mem_type) {
		case TTM_PL_VRAM:
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			drm->gem.vram_available -= bo->mem.size;
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			break;
		case TTM_PL_TT:
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			drm->gem.gart_available -= bo->mem.size;
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			break;
		default:
			break;
		}
	}
out:
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	ttm_bo_unreserve(bo);
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	return ret;
}

int
nouveau_bo_unpin(struct nouveau_bo *nvbo)
{
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	struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
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	struct ttm_buffer_object *bo = &nvbo->bo;
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	int ret, ref;
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	ret = ttm_bo_reserve(bo, false, false, false, 0);
	if (ret)
		return ret;

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	ref = --nvbo->pin_refcnt;
	WARN_ON_ONCE(ref < 0);
	if (ref)
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		goto out;

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	nouveau_bo_placement_set(nvbo, bo->mem.placement, 0);
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	ret = nouveau_bo_validate(nvbo, false, false);
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	if (ret == 0) {
		switch (bo->mem.mem_type) {
		case TTM_PL_VRAM:
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			drm->gem.vram_available += bo->mem.size;
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			break;
		case TTM_PL_TT:
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			drm->gem.gart_available += bo->mem.size;
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			break;
		default:
			break;
		}
	}

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out:
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	ttm_bo_unreserve(bo);
	return ret;
}

int
nouveau_bo_map(struct nouveau_bo *nvbo)
{
	int ret;

	ret = ttm_bo_reserve(&nvbo->bo, false, false, false, 0);
	if (ret)
		return ret;

	ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap);
	ttm_bo_unreserve(&nvbo->bo);
	return ret;
}

void
nouveau_bo_unmap(struct nouveau_bo *nvbo)
{
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	if (nvbo)
		ttm_bo_kunmap(&nvbo->kmap);
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}

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int
nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
406
		    bool no_wait_gpu)
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{
	int ret;

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	ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement,
			      interruptible, no_wait_gpu);
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	if (ret)
		return ret;

	return 0;
}

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u16
nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index)
{
	bool is_iomem;
	u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
	mem = &mem[index];
	if (is_iomem)
		return ioread16_native((void __force __iomem *)mem);
	else
		return *mem;
}

void
nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val)
{
	bool is_iomem;
	u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
	mem = &mem[index];
	if (is_iomem)
		iowrite16_native(val, (void __force __iomem *)mem);
	else
		*mem = val;
}

u32
nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index)
{
	bool is_iomem;
	u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
	mem = &mem[index];
	if (is_iomem)
		return ioread32_native((void __force __iomem *)mem);
	else
		return *mem;
}

void
nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val)
{
	bool is_iomem;
	u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
	mem = &mem[index];
	if (is_iomem)
		iowrite32_native(val, (void __force __iomem *)mem);
	else
		*mem = val;
}

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static struct ttm_tt *
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nouveau_ttm_tt_create(struct ttm_bo_device *bdev, unsigned long size,
		      uint32_t page_flags, struct page *dummy_read)
469
{
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#if __OS_HAS_AGP
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	struct nouveau_drm *drm = nouveau_bdev(bdev);
	struct drm_device *dev = drm->dev;
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	if (drm->agp.stat == ENABLED) {
		return ttm_agp_tt_create(bdev, dev->agp->bridge, size,
					 page_flags, dummy_read);
477
	}
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#endif
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	return nouveau_sgdma_create_ttm(bdev, size, page_flags, dummy_read);
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}

static int
nouveau_bo_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
{
	/* We'll do this from user space. */
	return 0;
}

static int
nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
			 struct ttm_mem_type_manager *man)
{
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	struct nouveau_drm *drm = nouveau_bdev(bdev);
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	switch (type) {
	case TTM_PL_SYSTEM:
		man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
		man->available_caching = TTM_PL_MASK_CACHING;
		man->default_caching = TTM_PL_FLAG_CACHED;
		break;
	case TTM_PL_VRAM:
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		if (nv_device(drm->device)->card_type >= NV_50) {
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			man->func = &nouveau_vram_manager;
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			man->io_reserve_fastpath = false;
			man->use_io_reserve_lru = true;
		} else {
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			man->func = &ttm_bo_manager_func;
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		}
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		man->flags = TTM_MEMTYPE_FLAG_FIXED |
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			     TTM_MEMTYPE_FLAG_MAPPABLE;
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		man->available_caching = TTM_PL_FLAG_UNCACHED |
					 TTM_PL_FLAG_WC;
		man->default_caching = TTM_PL_FLAG_WC;
		break;
	case TTM_PL_TT:
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		if (nv_device(drm->device)->card_type >= NV_50)
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			man->func = &nouveau_gart_manager;
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		else
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		if (drm->agp.stat != ENABLED)
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			man->func = &nv04_gart_manager;
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		else
			man->func = &ttm_bo_manager_func;
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		if (drm->agp.stat == ENABLED) {
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			man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
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			man->available_caching = TTM_PL_FLAG_UNCACHED |
				TTM_PL_FLAG_WC;
			man->default_caching = TTM_PL_FLAG_WC;
530
		} else {
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			man->flags = TTM_MEMTYPE_FLAG_MAPPABLE |
				     TTM_MEMTYPE_FLAG_CMA;
			man->available_caching = TTM_PL_MASK_CACHING;
			man->default_caching = TTM_PL_FLAG_CACHED;
		}
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		break;
	default:
		return -EINVAL;
	}
	return 0;
}

static void
nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
{
	struct nouveau_bo *nvbo = nouveau_bo(bo);

	switch (bo->mem.mem_type) {
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	case TTM_PL_VRAM:
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		nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT,
					 TTM_PL_FLAG_SYSTEM);
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		break;
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	default:
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		nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM, 0);
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		break;
	}
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	*pl = nvbo->placement;
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}


/* GPU-assisted copy using NV_MEMORY_TO_MEMORY_FORMAT, can access
 * TTM_PL_{VRAM,TT} directly.
 */
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static int
nouveau_bo_move_accel_cleanup(struct nouveau_channel *chan,
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			      struct nouveau_bo *nvbo, bool evict,
570
			      bool no_wait_gpu, struct ttm_mem_reg *new_mem)
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{
	struct nouveau_fence *fence = NULL;
	int ret;

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	ret = nouveau_fence_new(chan, false, &fence);
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	if (ret)
		return ret;

579
	ret = ttm_bo_move_accel_cleanup(&nvbo->bo, fence, evict,
580
					no_wait_gpu, new_mem);
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	nouveau_fence_unref(&fence);
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	return ret;
}

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static int
nve0_bo_move_init(struct nouveau_channel *chan, u32 handle)
{
	int ret = RING_SPACE(chan, 2);
	if (ret == 0) {
		BEGIN_NVC0(chan, NvSubCopy, 0x0000, 1);
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		OUT_RING  (chan, handle & 0x0000ffff);
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		FIRE_RING (chan);
	}
	return ret;
}

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static int
nve0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
	struct nouveau_mem *node = old_mem->mm_node;
	int ret = RING_SPACE(chan, 10);
	if (ret == 0) {
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		BEGIN_NVC0(chan, NvSubCopy, 0x0400, 8);
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		OUT_RING  (chan, upper_32_bits(node->vma[0].offset));
		OUT_RING  (chan, lower_32_bits(node->vma[0].offset));
		OUT_RING  (chan, upper_32_bits(node->vma[1].offset));
		OUT_RING  (chan, lower_32_bits(node->vma[1].offset));
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, new_mem->num_pages);
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		BEGIN_IMC0(chan, NvSubCopy, 0x0300, 0x0386);
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	}
	return ret;
}

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static int
nvc0_bo_move_init(struct nouveau_channel *chan, u32 handle)
{
	int ret = RING_SPACE(chan, 2);
	if (ret == 0) {
		BEGIN_NVC0(chan, NvSubCopy, 0x0000, 1);
		OUT_RING  (chan, handle);
	}
	return ret;
}

629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666
static int
nvc0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
	struct nouveau_mem *node = old_mem->mm_node;
	u64 src_offset = node->vma[0].offset;
	u64 dst_offset = node->vma[1].offset;
	u32 page_count = new_mem->num_pages;
	int ret;

	page_count = new_mem->num_pages;
	while (page_count) {
		int line_count = (page_count > 8191) ? 8191 : page_count;

		ret = RING_SPACE(chan, 11);
		if (ret)
			return ret;

		BEGIN_NVC0(chan, NvSubCopy, 0x030c, 8);
		OUT_RING  (chan, upper_32_bits(src_offset));
		OUT_RING  (chan, lower_32_bits(src_offset));
		OUT_RING  (chan, upper_32_bits(dst_offset));
		OUT_RING  (chan, lower_32_bits(dst_offset));
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, line_count);
		BEGIN_NVC0(chan, NvSubCopy, 0x0300, 1);
		OUT_RING  (chan, 0x00000110);

		page_count -= line_count;
		src_offset += (PAGE_SIZE * line_count);
		dst_offset += (PAGE_SIZE * line_count);
	}

	return 0;
}

B
Ben Skeggs 已提交
667 668 669 670
static int
nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
671 672 673
	struct nouveau_mem *node = old_mem->mm_node;
	u64 src_offset = node->vma[0].offset;
	u64 dst_offset = node->vma[1].offset;
B
Ben Skeggs 已提交
674 675 676 677 678 679 680 681 682 683 684
	u32 page_count = new_mem->num_pages;
	int ret;

	page_count = new_mem->num_pages;
	while (page_count) {
		int line_count = (page_count > 2047) ? 2047 : page_count;

		ret = RING_SPACE(chan, 12);
		if (ret)
			return ret;

685
		BEGIN_NVC0(chan, NvSubCopy, 0x0238, 2);
B
Ben Skeggs 已提交
686 687
		OUT_RING  (chan, upper_32_bits(dst_offset));
		OUT_RING  (chan, lower_32_bits(dst_offset));
688
		BEGIN_NVC0(chan, NvSubCopy, 0x030c, 6);
B
Ben Skeggs 已提交
689 690 691 692 693 694
		OUT_RING  (chan, upper_32_bits(src_offset));
		OUT_RING  (chan, lower_32_bits(src_offset));
		OUT_RING  (chan, PAGE_SIZE); /* src_pitch */
		OUT_RING  (chan, PAGE_SIZE); /* dst_pitch */
		OUT_RING  (chan, PAGE_SIZE); /* line_length */
		OUT_RING  (chan, line_count);
695
		BEGIN_NVC0(chan, NvSubCopy, 0x0300, 1);
B
Ben Skeggs 已提交
696 697 698 699 700 701 702 703 704 705
		OUT_RING  (chan, 0x00100110);

		page_count -= line_count;
		src_offset += (PAGE_SIZE * line_count);
		dst_offset += (PAGE_SIZE * line_count);
	}

	return 0;
}

706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743
static int
nva3_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
	struct nouveau_mem *node = old_mem->mm_node;
	u64 src_offset = node->vma[0].offset;
	u64 dst_offset = node->vma[1].offset;
	u32 page_count = new_mem->num_pages;
	int ret;

	page_count = new_mem->num_pages;
	while (page_count) {
		int line_count = (page_count > 8191) ? 8191 : page_count;

		ret = RING_SPACE(chan, 11);
		if (ret)
			return ret;

		BEGIN_NV04(chan, NvSubCopy, 0x030c, 8);
		OUT_RING  (chan, upper_32_bits(src_offset));
		OUT_RING  (chan, lower_32_bits(src_offset));
		OUT_RING  (chan, upper_32_bits(dst_offset));
		OUT_RING  (chan, lower_32_bits(dst_offset));
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, PAGE_SIZE);
		OUT_RING  (chan, line_count);
		BEGIN_NV04(chan, NvSubCopy, 0x0300, 1);
		OUT_RING  (chan, 0x00000110);

		page_count -= line_count;
		src_offset += (PAGE_SIZE * line_count);
		dst_offset += (PAGE_SIZE * line_count);
	}

	return 0;
}

744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761
static int
nv98_bo_move_exec(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
	struct nouveau_mem *node = old_mem->mm_node;
	int ret = RING_SPACE(chan, 7);
	if (ret == 0) {
		BEGIN_NV04(chan, NvSubCopy, 0x0320, 6);
		OUT_RING  (chan, upper_32_bits(node->vma[0].offset));
		OUT_RING  (chan, lower_32_bits(node->vma[0].offset));
		OUT_RING  (chan, upper_32_bits(node->vma[1].offset));
		OUT_RING  (chan, lower_32_bits(node->vma[1].offset));
		OUT_RING  (chan, 0x00000000 /* COPY */);
		OUT_RING  (chan, new_mem->num_pages << PAGE_SHIFT);
	}
	return ret;
}

762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779
static int
nv84_bo_move_exec(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
	struct nouveau_mem *node = old_mem->mm_node;
	int ret = RING_SPACE(chan, 7);
	if (ret == 0) {
		BEGIN_NV04(chan, NvSubCopy, 0x0304, 6);
		OUT_RING  (chan, new_mem->num_pages << PAGE_SHIFT);
		OUT_RING  (chan, upper_32_bits(node->vma[0].offset));
		OUT_RING  (chan, lower_32_bits(node->vma[0].offset));
		OUT_RING  (chan, upper_32_bits(node->vma[1].offset));
		OUT_RING  (chan, lower_32_bits(node->vma[1].offset));
		OUT_RING  (chan, 0x00000000 /* MODE_COPY, QUERY_NONE */);
	}
	return ret;
}

780 781 782
static int
nv50_bo_move_init(struct nouveau_channel *chan, u32 handle)
{
783
	int ret = RING_SPACE(chan, 6);
784
	if (ret == 0) {
785 786 787 788 789 790
		BEGIN_NV04(chan, NvSubCopy, 0x0000, 1);
		OUT_RING  (chan, handle);
		BEGIN_NV04(chan, NvSubCopy, 0x0180, 3);
		OUT_RING  (chan, NvNotify0);
		OUT_RING  (chan, NvDmaFB);
		OUT_RING  (chan, NvDmaFB);
791 792 793 794 795
	}

	return ret;
}

796
static int
797 798
nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
799
{
800
	struct nouveau_mem *node = old_mem->mm_node;
801
	u64 length = (new_mem->num_pages << PAGE_SHIFT);
802 803
	u64 src_offset = node->vma[0].offset;
	u64 dst_offset = node->vma[1].offset;
804 805
	int src_tiled = !!node->memtype;
	int dst_tiled = !!((struct nouveau_mem *)new_mem->mm_node)->memtype;
806 807
	int ret;

808 809 810
	while (length) {
		u32 amount, stride, height;

811 812 813 814
		ret = RING_SPACE(chan, 18 + 6 * (src_tiled + dst_tiled));
		if (ret)
			return ret;

815 816
		amount  = min(length, (u64)(4 * 1024 * 1024));
		stride  = 16 * 4;
817 818
		height  = amount / stride;

819
		if (src_tiled) {
820
			BEGIN_NV04(chan, NvSubCopy, 0x0200, 7);
821
			OUT_RING  (chan, 0);
822
			OUT_RING  (chan, 0);
823 824 825 826 827 828
			OUT_RING  (chan, stride);
			OUT_RING  (chan, height);
			OUT_RING  (chan, 1);
			OUT_RING  (chan, 0);
			OUT_RING  (chan, 0);
		} else {
829
			BEGIN_NV04(chan, NvSubCopy, 0x0200, 1);
830 831
			OUT_RING  (chan, 1);
		}
832
		if (dst_tiled) {
833
			BEGIN_NV04(chan, NvSubCopy, 0x021c, 7);
834
			OUT_RING  (chan, 0);
835
			OUT_RING  (chan, 0);
836 837 838 839 840 841
			OUT_RING  (chan, stride);
			OUT_RING  (chan, height);
			OUT_RING  (chan, 1);
			OUT_RING  (chan, 0);
			OUT_RING  (chan, 0);
		} else {
842
			BEGIN_NV04(chan, NvSubCopy, 0x021c, 1);
843 844 845
			OUT_RING  (chan, 1);
		}

846
		BEGIN_NV04(chan, NvSubCopy, 0x0238, 2);
847 848
		OUT_RING  (chan, upper_32_bits(src_offset));
		OUT_RING  (chan, upper_32_bits(dst_offset));
849
		BEGIN_NV04(chan, NvSubCopy, 0x030c, 8);
850 851 852 853 854 855 856 857
		OUT_RING  (chan, lower_32_bits(src_offset));
		OUT_RING  (chan, lower_32_bits(dst_offset));
		OUT_RING  (chan, stride);
		OUT_RING  (chan, stride);
		OUT_RING  (chan, stride);
		OUT_RING  (chan, height);
		OUT_RING  (chan, 0x00000101);
		OUT_RING  (chan, 0x00000000);
858
		BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
859 860 861 862 863
		OUT_RING  (chan, 0);

		length -= amount;
		src_offset += amount;
		dst_offset += amount;
864 865
	}

866 867 868
	return 0;
}

869 870 871
static int
nv04_bo_move_init(struct nouveau_channel *chan, u32 handle)
{
872
	int ret = RING_SPACE(chan, 4);
873
	if (ret == 0) {
874 875 876 877
		BEGIN_NV04(chan, NvSubCopy, 0x0000, 1);
		OUT_RING  (chan, handle);
		BEGIN_NV04(chan, NvSubCopy, 0x0180, 1);
		OUT_RING  (chan, NvNotify0);
878 879 880 881 882
	}

	return ret;
}

883 884 885 886 887
static inline uint32_t
nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo,
		      struct nouveau_channel *chan, struct ttm_mem_reg *mem)
{
	if (mem->mem_type == TTM_PL_TT)
888 889
		return NvDmaTT;
	return NvDmaFB;
890 891
}

892 893 894 895
static int
nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
896 897
	u32 src_offset = old_mem->start << PAGE_SHIFT;
	u32 dst_offset = new_mem->start << PAGE_SHIFT;
898 899 900 901 902 903 904
	u32 page_count = new_mem->num_pages;
	int ret;

	ret = RING_SPACE(chan, 3);
	if (ret)
		return ret;

905
	BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE, 2);
906 907 908
	OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, old_mem));
	OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, new_mem));

909 910 911 912 913 914 915
	page_count = new_mem->num_pages;
	while (page_count) {
		int line_count = (page_count > 2047) ? 2047 : page_count;

		ret = RING_SPACE(chan, 11);
		if (ret)
			return ret;
916

917
		BEGIN_NV04(chan, NvSubCopy,
918
				 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
919 920 921 922 923 924 925 926
		OUT_RING  (chan, src_offset);
		OUT_RING  (chan, dst_offset);
		OUT_RING  (chan, PAGE_SIZE); /* src_pitch */
		OUT_RING  (chan, PAGE_SIZE); /* dst_pitch */
		OUT_RING  (chan, PAGE_SIZE); /* line_length */
		OUT_RING  (chan, line_count);
		OUT_RING  (chan, 0x00000101);
		OUT_RING  (chan, 0x00000000);
927
		BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
928
		OUT_RING  (chan, 0);
929 930 931 932 933 934

		page_count -= line_count;
		src_offset += (PAGE_SIZE * line_count);
		dst_offset += (PAGE_SIZE * line_count);
	}

935 936 937
	return 0;
}

938 939 940 941 942 943 944
static int
nouveau_vma_getmap(struct nouveau_channel *chan, struct nouveau_bo *nvbo,
		   struct ttm_mem_reg *mem, struct nouveau_vma *vma)
{
	struct nouveau_mem *node = mem->mm_node;
	int ret;

945 946 947
	ret = nouveau_vm_get(nv_client(chan->cli)->vm, mem->num_pages <<
			     PAGE_SHIFT, node->page_shift,
			     NV_MEM_ACCESS_RW, vma);
948 949 950
	if (ret)
		return ret;

951
	nouveau_vm_map(vma, node);
952 953 954
	return 0;
}

955 956
static int
nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
957
		     bool no_wait_gpu, struct ttm_mem_reg *new_mem)
958
{
959
	struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
960
	struct nouveau_channel *chan = drm->ttm.chan;
961
	struct nouveau_bo *nvbo = nouveau_bo(bo);
962
	struct ttm_mem_reg *old_mem = &bo->mem;
963 964
	int ret;

965
	mutex_lock_nested(&chan->cli->mutex, SINGLE_DEPTH_NESTING);
966

967 968 969
	/* create temporary vmas for the transfer and attach them to the
	 * old nouveau_mem node, these will get cleaned up after ttm has
	 * destroyed the ttm_mem_reg
970
	 */
971
	if (nv_device(drm->device)->card_type >= NV_50) {
972
		struct nouveau_mem *node = old_mem->mm_node;
973

974 975 976 977 978 979 980
		ret = nouveau_vma_getmap(chan, nvbo, old_mem, &node->vma[0]);
		if (ret)
			goto out;

		ret = nouveau_vma_getmap(chan, nvbo, new_mem, &node->vma[1]);
		if (ret)
			goto out;
981 982
	}

983
	ret = drm->ttm.move(chan, bo, &bo->mem, new_mem);
984 985 986 987
	if (ret == 0) {
		ret = nouveau_bo_move_accel_cleanup(chan, nvbo, evict,
						    no_wait_gpu, new_mem);
	}
988

989
out:
990
	mutex_unlock(&chan->cli->mutex);
991
	return ret;
992 993
}

994
void
995
nouveau_bo_move_init(struct nouveau_drm *drm)
996 997 998
{
	static const struct {
		const char *name;
999
		int engine;
1000 1001 1002 1003 1004 1005
		u32 oclass;
		int (*exec)(struct nouveau_channel *,
			    struct ttm_buffer_object *,
			    struct ttm_mem_reg *, struct ttm_mem_reg *);
		int (*init)(struct nouveau_channel *, u32 handle);
	} _methods[] = {
1006
		{  "COPY", 4, 0xa0b5, nve0_bo_move_copy, nve0_bo_move_init },
1007
		{  "GRCE", 0, 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init },
1008 1009 1010 1011 1012 1013 1014
		{ "COPY1", 5, 0x90b8, nvc0_bo_move_copy, nvc0_bo_move_init },
		{ "COPY0", 4, 0x90b5, nvc0_bo_move_copy, nvc0_bo_move_init },
		{  "COPY", 0, 0x85b5, nva3_bo_move_copy, nv50_bo_move_init },
		{ "CRYPT", 0, 0x74c1, nv84_bo_move_exec, nv50_bo_move_init },
		{  "M2MF", 0, 0x9039, nvc0_bo_move_m2mf, nvc0_bo_move_init },
		{  "M2MF", 0, 0x5039, nv50_bo_move_m2mf, nv50_bo_move_init },
		{  "M2MF", 0, 0x0039, nv04_bo_move_m2mf, nv04_bo_move_init },
1015
		{},
1016
		{ "CRYPT", 0, 0x88b4, nv98_bo_move_exec, nv50_bo_move_init },
1017 1018 1019 1020 1021
	}, *mthd = _methods;
	const char *name = "CPU";
	int ret;

	do {
1022
		struct nouveau_object *object;
1023
		struct nouveau_channel *chan;
1024
		u32 handle = (mthd->engine << 16) | mthd->oclass;
1025

1026
		if (mthd->engine)
1027 1028 1029 1030 1031 1032 1033
			chan = drm->cechan;
		else
			chan = drm->channel;
		if (chan == NULL)
			continue;

		ret = nouveau_object_new(nv_object(drm), chan->handle, handle,
1034
					 mthd->oclass, NULL, 0, &object);
1035
		if (ret == 0) {
1036
			ret = mthd->init(chan, handle);
1037
			if (ret) {
1038
				nouveau_object_del(nv_object(drm),
1039 1040
						   chan->handle, handle);
				continue;
1041
			}
1042 1043

			drm->ttm.move = mthd->exec;
1044
			drm->ttm.chan = chan;
1045 1046
			name = mthd->name;
			break;
1047 1048 1049
		}
	} while ((++mthd)->exec);

1050
	NV_INFO(drm, "MM: using %s for buffer copies\n", name);
1051 1052
}

1053 1054
static int
nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
1055
		      bool no_wait_gpu, struct ttm_mem_reg *new_mem)
1056 1057 1058 1059 1060 1061 1062 1063
{
	u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
	struct ttm_placement placement;
	struct ttm_mem_reg tmp_mem;
	int ret;

	placement.fpfn = placement.lpfn = 0;
	placement.num_placement = placement.num_busy_placement = 1;
1064
	placement.placement = placement.busy_placement = &placement_memtype;
1065 1066 1067

	tmp_mem = *new_mem;
	tmp_mem.mm_node = NULL;
1068
	ret = ttm_bo_mem_space(bo, &placement, &tmp_mem, intr, no_wait_gpu);
1069 1070 1071 1072 1073 1074 1075
	if (ret)
		return ret;

	ret = ttm_tt_bind(bo->ttm, &tmp_mem);
	if (ret)
		goto out;

1076
	ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_gpu, &tmp_mem);
1077 1078 1079
	if (ret)
		goto out;

1080
	ret = ttm_bo_move_ttm(bo, true, no_wait_gpu, new_mem);
1081
out:
1082
	ttm_bo_mem_put(bo, &tmp_mem);
1083 1084 1085 1086 1087
	return ret;
}

static int
nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
1088
		      bool no_wait_gpu, struct ttm_mem_reg *new_mem)
1089 1090 1091 1092 1093 1094 1095 1096
{
	u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
	struct ttm_placement placement;
	struct ttm_mem_reg tmp_mem;
	int ret;

	placement.fpfn = placement.lpfn = 0;
	placement.num_placement = placement.num_busy_placement = 1;
1097
	placement.placement = placement.busy_placement = &placement_memtype;
1098 1099 1100

	tmp_mem = *new_mem;
	tmp_mem.mm_node = NULL;
1101
	ret = ttm_bo_mem_space(bo, &placement, &tmp_mem, intr, no_wait_gpu);
1102 1103 1104
	if (ret)
		return ret;

1105
	ret = ttm_bo_move_ttm(bo, true, no_wait_gpu, &tmp_mem);
1106 1107 1108
	if (ret)
		goto out;

1109
	ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_gpu, new_mem);
1110 1111 1112 1113
	if (ret)
		goto out;

out:
1114
	ttm_bo_mem_put(bo, &tmp_mem);
1115 1116 1117
	return ret;
}

1118 1119 1120 1121
static void
nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem)
{
	struct nouveau_bo *nvbo = nouveau_bo(bo);
1122 1123
	struct nouveau_vma *vma;

1124 1125 1126 1127
	/* ttm can now (stupidly) pass the driver bos it didn't create... */
	if (bo->destroy != nouveau_bo_del_ttm)
		return;

1128
	list_for_each_entry(vma, &nvbo->vma_list, head) {
1129 1130 1131
		if (new_mem && new_mem->mem_type != TTM_PL_SYSTEM &&
			      (new_mem->mem_type == TTM_PL_VRAM ||
			       nvbo->page_shift != vma->vm->vmm->lpg_shift)) {
1132 1133 1134 1135
			nouveau_vm_map(vma, new_mem->mm_node);
		} else {
			nouveau_vm_unmap(vma);
		}
1136 1137 1138
	}
}

1139
static int
1140
nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem,
1141
		   struct nouveau_drm_tile **new_tile)
1142
{
1143 1144
	struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
	struct drm_device *dev = drm->dev;
1145
	struct nouveau_bo *nvbo = nouveau_bo(bo);
1146
	u64 offset = new_mem->start << PAGE_SHIFT;
1147

1148 1149
	*new_tile = NULL;
	if (new_mem->mem_type != TTM_PL_VRAM)
1150 1151
		return 0;

1152
	if (nv_device(drm->device)->card_type >= NV_10) {
1153
		*new_tile = nv10_bo_set_tiling(dev, offset, new_mem->size,
1154 1155
						nvbo->tile_mode,
						nvbo->tile_flags);
1156 1157
	}

1158 1159 1160 1161 1162
	return 0;
}

static void
nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
1163 1164
		      struct nouveau_drm_tile *new_tile,
		      struct nouveau_drm_tile **old_tile)
1165
{
1166 1167
	struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
	struct drm_device *dev = drm->dev;
1168

1169
	nv10_bo_put_tile_region(dev, *old_tile, bo->sync_obj);
1170
	*old_tile = new_tile;
1171 1172 1173 1174
}

static int
nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr,
1175
		bool no_wait_gpu, struct ttm_mem_reg *new_mem)
1176
{
1177
	struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1178 1179
	struct nouveau_bo *nvbo = nouveau_bo(bo);
	struct ttm_mem_reg *old_mem = &bo->mem;
1180
	struct nouveau_drm_tile *new_tile = NULL;
1181 1182
	int ret = 0;

1183
	if (nv_device(drm->device)->card_type < NV_50) {
1184 1185 1186 1187
		ret = nouveau_bo_vm_bind(bo, new_mem, &new_tile);
		if (ret)
			return ret;
	}
1188 1189

	/* Fake bo copy. */
1190 1191 1192 1193
	if (old_mem->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
		BUG_ON(bo->mem.mm_node != NULL);
		bo->mem = *new_mem;
		new_mem->mm_node = NULL;
1194
		goto out;
1195 1196
	}

1197
	/* CPU copy if we have no accelerated method available */
1198
	if (!drm->ttm.move) {
1199
		ret = ttm_bo_move_memcpy(bo, evict, no_wait_gpu, new_mem);
1200 1201 1202
		goto out;
	}

1203 1204
	/* Hardware assisted copy. */
	if (new_mem->mem_type == TTM_PL_SYSTEM)
1205 1206
		ret = nouveau_bo_move_flipd(bo, evict, intr,
					    no_wait_gpu, new_mem);
1207
	else if (old_mem->mem_type == TTM_PL_SYSTEM)
1208 1209
		ret = nouveau_bo_move_flips(bo, evict, intr,
					    no_wait_gpu, new_mem);
1210
	else
1211 1212
		ret = nouveau_bo_move_m2mf(bo, evict, intr,
					   no_wait_gpu, new_mem);
1213

1214 1215 1216 1217
	if (!ret)
		goto out;

	/* Fallback to software copy. */
1218
	ret = ttm_bo_move_memcpy(bo, evict, no_wait_gpu, new_mem);
1219 1220

out:
1221
	if (nv_device(drm->device)->card_type < NV_50) {
1222 1223 1224 1225 1226
		if (ret)
			nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
		else
			nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
	}
1227 1228

	return ret;
1229 1230 1231 1232 1233
}

static int
nouveau_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)
{
1234 1235
	struct nouveau_bo *nvbo = nouveau_bo(bo);

1236
	return drm_vma_node_verify_access(&nvbo->gem.vma_node, filp);
1237 1238
}

1239 1240 1241 1242
static int
nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
{
	struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
1243 1244
	struct nouveau_drm *drm = nouveau_bdev(bdev);
	struct drm_device *dev = drm->dev;
1245
	int ret;
1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259

	mem->bus.addr = NULL;
	mem->bus.offset = 0;
	mem->bus.size = mem->num_pages << PAGE_SHIFT;
	mem->bus.base = 0;
	mem->bus.is_iomem = false;
	if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE))
		return -EINVAL;
	switch (mem->mem_type) {
	case TTM_PL_SYSTEM:
		/* System memory */
		return 0;
	case TTM_PL_TT:
#if __OS_HAS_AGP
1260
		if (drm->agp.stat == ENABLED) {
1261
			mem->bus.offset = mem->start << PAGE_SHIFT;
1262
			mem->bus.base = drm->agp.base;
1263
			mem->bus.is_iomem = !dev->agp->cant_use_aperture;
1264 1265 1266 1267
		}
#endif
		break;
	case TTM_PL_VRAM:
1268 1269 1270
		mem->bus.offset = mem->start << PAGE_SHIFT;
		mem->bus.base = pci_resource_start(dev->pdev, 1);
		mem->bus.is_iomem = true;
1271 1272
		if (nv_device(drm->device)->card_type >= NV_50) {
			struct nouveau_bar *bar = nouveau_bar(drm->device);
1273
			struct nouveau_mem *node = mem->mm_node;
1274

1275
			ret = bar->umap(bar, node, NV_MEM_ACCESS_RW,
1276 1277 1278
					&node->bar_vma);
			if (ret)
				return ret;
1279

1280
			mem->bus.offset = node->bar_vma.offset;
1281
		}
1282 1283 1284 1285 1286 1287 1288 1289 1290 1291
		break;
	default:
		return -EINVAL;
	}
	return 0;
}

static void
nouveau_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
{
1292 1293
	struct nouveau_drm *drm = nouveau_bdev(bdev);
	struct nouveau_bar *bar = nouveau_bar(drm->device);
1294
	struct nouveau_mem *node = mem->mm_node;
1295

1296
	if (!node->bar_vma.node)
1297 1298
		return;

1299
	bar->unmap(bar, &node->bar_vma);
1300 1301 1302 1303 1304
}

static int
nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
{
1305
	struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1306
	struct nouveau_bo *nvbo = nouveau_bo(bo);
1307 1308
	struct nouveau_device *device = nv_device(drm->device);
	u32 mappable = pci_resource_len(device->pdev, 1) >> PAGE_SHIFT;
1309 1310 1311 1312 1313

	/* as long as the bo isn't in vram, and isn't tiled, we've got
	 * nothing to do here.
	 */
	if (bo->mem.mem_type != TTM_PL_VRAM) {
1314
		if (nv_device(drm->device)->card_type < NV_50 ||
1315
		    !nouveau_bo_tile_layout(nvbo))
1316 1317 1318 1319
			return 0;
	}

	/* make sure bo is in mappable vram */
1320
	if (bo->mem.start + bo->mem.num_pages < mappable)
1321 1322 1323 1324
		return 0;


	nvbo->placement.fpfn = 0;
1325
	nvbo->placement.lpfn = mappable;
1326
	nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_VRAM, 0);
1327
	return nouveau_bo_validate(nvbo, false, false);
1328 1329
}

1330 1331 1332
static int
nouveau_ttm_tt_populate(struct ttm_tt *ttm)
{
1333
	struct ttm_dma_tt *ttm_dma = (void *)ttm;
1334
	struct nouveau_drm *drm;
1335 1336 1337
	struct drm_device *dev;
	unsigned i;
	int r;
D
Dave Airlie 已提交
1338
	bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
1339 1340 1341 1342

	if (ttm->state != tt_unpopulated)
		return 0;

D
Dave Airlie 已提交
1343 1344 1345 1346 1347 1348 1349 1350
	if (slave && ttm->sg) {
		/* make userspace faulting work */
		drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
						 ttm_dma->dma_address, ttm->num_pages);
		ttm->state = tt_unbound;
		return 0;
	}

1351 1352
	drm = nouveau_bdev(ttm->bdev);
	dev = drm->dev;
1353

J
Jerome Glisse 已提交
1354
#if __OS_HAS_AGP
1355
	if (drm->agp.stat == ENABLED) {
J
Jerome Glisse 已提交
1356 1357 1358 1359
		return ttm_agp_tt_populate(ttm);
	}
#endif

1360 1361
#ifdef CONFIG_SWIOTLB
	if (swiotlb_nr_tbl()) {
1362
		return ttm_dma_populate((void *)ttm, dev->dev);
1363 1364 1365 1366 1367 1368 1369 1370 1371
	}
#endif

	r = ttm_pool_populate(ttm);
	if (r) {
		return r;
	}

	for (i = 0; i < ttm->num_pages; i++) {
1372
		ttm_dma->dma_address[i] = pci_map_page(dev->pdev, ttm->pages[i],
1373 1374
						   0, PAGE_SIZE,
						   PCI_DMA_BIDIRECTIONAL);
1375
		if (pci_dma_mapping_error(dev->pdev, ttm_dma->dma_address[i])) {
1376
			while (--i) {
1377
				pci_unmap_page(dev->pdev, ttm_dma->dma_address[i],
1378
					       PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
1379
				ttm_dma->dma_address[i] = 0;
1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390
			}
			ttm_pool_unpopulate(ttm);
			return -EFAULT;
		}
	}
	return 0;
}

static void
nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm)
{
1391
	struct ttm_dma_tt *ttm_dma = (void *)ttm;
1392
	struct nouveau_drm *drm;
1393 1394
	struct drm_device *dev;
	unsigned i;
D
Dave Airlie 已提交
1395 1396 1397 1398
	bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);

	if (slave)
		return;
1399

1400 1401
	drm = nouveau_bdev(ttm->bdev);
	dev = drm->dev;
1402

J
Jerome Glisse 已提交
1403
#if __OS_HAS_AGP
1404
	if (drm->agp.stat == ENABLED) {
J
Jerome Glisse 已提交
1405 1406 1407 1408 1409
		ttm_agp_tt_unpopulate(ttm);
		return;
	}
#endif

1410 1411
#ifdef CONFIG_SWIOTLB
	if (swiotlb_nr_tbl()) {
1412
		ttm_dma_unpopulate((void *)ttm, dev->dev);
1413 1414 1415 1416 1417
		return;
	}
#endif

	for (i = 0; i < ttm->num_pages; i++) {
1418 1419
		if (ttm_dma->dma_address[i]) {
			pci_unmap_page(dev->pdev, ttm_dma->dma_address[i],
1420 1421 1422 1423 1424 1425 1426
				       PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
		}
	}

	ttm_pool_unpopulate(ttm);
}

1427 1428 1429
void
nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence)
{
1430
	struct nouveau_fence *new_fence = nouveau_fence_ref(fence);
1431 1432 1433 1434
	struct nouveau_fence *old_fence = NULL;

	spin_lock(&nvbo->bo.bdev->fence_lock);
	old_fence = nvbo->bo.sync_obj;
1435
	nvbo->bo.sync_obj = new_fence;
1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453
	spin_unlock(&nvbo->bo.bdev->fence_lock);

	nouveau_fence_unref(&old_fence);
}

static void
nouveau_bo_fence_unref(void **sync_obj)
{
	nouveau_fence_unref((struct nouveau_fence **)sync_obj);
}

static void *
nouveau_bo_fence_ref(void *sync_obj)
{
	return nouveau_fence_ref(sync_obj);
}

static bool
1454
nouveau_bo_fence_signalled(void *sync_obj)
1455
{
1456
	return nouveau_fence_done(sync_obj);
1457 1458 1459
}

static int
1460
nouveau_bo_fence_wait(void *sync_obj, bool lazy, bool intr)
1461 1462 1463 1464 1465
{
	return nouveau_fence_wait(sync_obj, lazy, intr);
}

static int
1466
nouveau_bo_fence_flush(void *sync_obj)
1467 1468 1469 1470
{
	return 0;
}

1471
struct ttm_bo_driver nouveau_bo_driver = {
1472
	.ttm_tt_create = &nouveau_ttm_tt_create,
1473 1474
	.ttm_tt_populate = &nouveau_ttm_tt_populate,
	.ttm_tt_unpopulate = &nouveau_ttm_tt_unpopulate,
1475 1476 1477
	.invalidate_caches = nouveau_bo_invalidate_caches,
	.init_mem_type = nouveau_bo_init_mem_type,
	.evict_flags = nouveau_bo_evict_flags,
1478
	.move_notify = nouveau_bo_move_ntfy,
1479 1480
	.move = nouveau_bo_move,
	.verify_access = nouveau_bo_verify_access,
1481 1482 1483 1484 1485
	.sync_obj_signaled = nouveau_bo_fence_signalled,
	.sync_obj_wait = nouveau_bo_fence_wait,
	.sync_obj_flush = nouveau_bo_fence_flush,
	.sync_obj_unref = nouveau_bo_fence_unref,
	.sync_obj_ref = nouveau_bo_fence_ref,
1486 1487 1488
	.fault_reserve_notify = &nouveau_ttm_fault_reserve_notify,
	.io_mem_reserve = &nouveau_ttm_io_mem_reserve,
	.io_mem_free = &nouveau_ttm_io_mem_free,
1489 1490
};

1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514
struct nouveau_vma *
nouveau_bo_vma_find(struct nouveau_bo *nvbo, struct nouveau_vm *vm)
{
	struct nouveau_vma *vma;
	list_for_each_entry(vma, &nvbo->vma_list, head) {
		if (vma->vm == vm)
			return vma;
	}

	return NULL;
}

int
nouveau_bo_vma_add(struct nouveau_bo *nvbo, struct nouveau_vm *vm,
		   struct nouveau_vma *vma)
{
	const u32 size = nvbo->bo.mem.num_pages << PAGE_SHIFT;
	int ret;

	ret = nouveau_vm_get(vm, size, nvbo->page_shift,
			     NV_MEM_ACCESS_RW, vma);
	if (ret)
		return ret;

1515 1516 1517
	if ( nvbo->bo.mem.mem_type != TTM_PL_SYSTEM &&
	    (nvbo->bo.mem.mem_type == TTM_PL_VRAM ||
	     nvbo->page_shift != vma->vm->vmm->lpg_shift))
1518 1519 1520
		nouveau_vm_map(vma, nvbo->bo.mem.mm_node);

	list_add_tail(&vma->head, &nvbo->vma_list);
1521
	vma->refcount = 1;
1522 1523 1524 1525 1526 1527 1528
	return 0;
}

void
nouveau_bo_vma_del(struct nouveau_bo *nvbo, struct nouveau_vma *vma)
{
	if (vma->node) {
1529
		if (nvbo->bo.mem.mem_type != TTM_PL_SYSTEM)
1530 1531 1532 1533 1534
			nouveau_vm_unmap(vma);
		nouveau_vm_put(vma);
		list_del(&vma->head);
	}
}