nouveau_bo.c 30.0 KB
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/*
 * Copyright 2007 Dave Airlied
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */
/*
 * Authors: Dave Airlied <airlied@linux.ie>
 *	    Ben Skeggs   <darktama@iinet.net.au>
 *	    Jeremy Kolb  <jkolb@brandeis.edu>
 */

#include "drmP.h"
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#include "ttm/ttm_page_alloc.h"
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#include "nouveau_drm.h"
#include "nouveau_drv.h"
#include "nouveau_dma.h"
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#include "nouveau_mm.h"
#include "nouveau_vm.h"
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#include <linux/log2.h>
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#include <linux/slab.h>
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static void
nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
{
	struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
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	struct drm_device *dev = dev_priv->dev;
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	struct nouveau_bo *nvbo = nouveau_bo(bo);

	if (unlikely(nvbo->gem))
		DRM_ERROR("bo %p still attached to GEM object\n", bo);

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	nv10_mem_put_tile_region(dev, nvbo->tile, NULL);
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	kfree(nvbo);
}

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static void
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nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
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		       int *align, int *size)
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{
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	struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
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	if (dev_priv->card_type < NV_50) {
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		if (nvbo->tile_mode) {
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			if (dev_priv->chipset >= 0x40) {
				*align = 65536;
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				*size = roundup(*size, 64 * nvbo->tile_mode);
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			} else if (dev_priv->chipset >= 0x30) {
				*align = 32768;
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				*size = roundup(*size, 64 * nvbo->tile_mode);
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			} else if (dev_priv->chipset >= 0x20) {
				*align = 16384;
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				*size = roundup(*size, 64 * nvbo->tile_mode);
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			} else if (dev_priv->chipset >= 0x10) {
				*align = 16384;
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				*size = roundup(*size, 32 * nvbo->tile_mode);
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			}
		}
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	} else {
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		*size = roundup(*size, (1 << nvbo->page_shift));
		*align = max((1 <<  nvbo->page_shift), *align);
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	}

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	*size = roundup(*size, PAGE_SIZE);
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}

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int
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nouveau_bo_new(struct drm_device *dev, int size, int align,
	       uint32_t flags, uint32_t tile_mode, uint32_t tile_flags,
	       struct nouveau_bo **pnvbo)
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{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_bo *nvbo;
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	size_t acc_size;
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	int ret;
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	nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
	if (!nvbo)
		return -ENOMEM;
	INIT_LIST_HEAD(&nvbo->head);
	INIT_LIST_HEAD(&nvbo->entry);
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	INIT_LIST_HEAD(&nvbo->vma_list);
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	nvbo->tile_mode = tile_mode;
	nvbo->tile_flags = tile_flags;
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	nvbo->bo.bdev = &dev_priv->ttm.bdev;
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	nvbo->page_shift = 12;
	if (dev_priv->bar1_vm) {
		if (!(flags & TTM_PL_FLAG_TT) && size > 256 * 1024)
			nvbo->page_shift = dev_priv->bar1_vm->lpg_shift;
	}

	nouveau_bo_fixup_align(nvbo, flags, &align, &size);
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	nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
	nouveau_bo_placement_set(nvbo, flags, 0);
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	acc_size = ttm_bo_dma_acc_size(&dev_priv->ttm.bdev, size,
				       sizeof(struct nouveau_bo));

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	ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size,
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			  ttm_bo_type_device, &nvbo->placement,
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			  align >> PAGE_SHIFT, 0, false, NULL, acc_size,
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			  nouveau_bo_del_ttm);
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	if (ret) {
		/* ttm will call nouveau_bo_del_ttm if it fails.. */
		return ret;
	}

	*pnvbo = nvbo;
	return 0;
}

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static void
set_placement_list(uint32_t *pl, unsigned *n, uint32_t type, uint32_t flags)
{
	*n = 0;

	if (type & TTM_PL_FLAG_VRAM)
		pl[(*n)++] = TTM_PL_FLAG_VRAM | flags;
	if (type & TTM_PL_FLAG_TT)
		pl[(*n)++] = TTM_PL_FLAG_TT | flags;
	if (type & TTM_PL_FLAG_SYSTEM)
		pl[(*n)++] = TTM_PL_FLAG_SYSTEM | flags;
}

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static void
set_placement_range(struct nouveau_bo *nvbo, uint32_t type)
{
	struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
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	int vram_pages = dev_priv->vram_size >> PAGE_SHIFT;
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	if (dev_priv->card_type == NV_10 &&
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	    nvbo->tile_mode && (type & TTM_PL_FLAG_VRAM) &&
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	    nvbo->bo.mem.num_pages < vram_pages / 4) {
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		/*
		 * Make sure that the color and depth buffers are handled
		 * by independent memory controller units. Up to a 9x
		 * speed up when alpha-blending and depth-test are enabled
		 * at the same time.
		 */
		if (nvbo->tile_flags & NOUVEAU_GEM_TILE_ZETA) {
			nvbo->placement.fpfn = vram_pages / 2;
			nvbo->placement.lpfn = ~0;
		} else {
			nvbo->placement.fpfn = 0;
			nvbo->placement.lpfn = vram_pages / 2;
		}
	}
}

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void
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nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t type, uint32_t busy)
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{
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	struct ttm_placement *pl = &nvbo->placement;
	uint32_t flags = TTM_PL_MASK_CACHING |
		(nvbo->pin_refcnt ? TTM_PL_FLAG_NO_EVICT : 0);

	pl->placement = nvbo->placements;
	set_placement_list(nvbo->placements, &pl->num_placement,
			   type, flags);

	pl->busy_placement = nvbo->busy_placements;
	set_placement_list(nvbo->busy_placements, &pl->num_busy_placement,
			   type | busy, flags);
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	set_placement_range(nvbo, type);
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}

int
nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype)
{
	struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
	struct ttm_buffer_object *bo = &nvbo->bo;
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	int ret;
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	if (nvbo->pin_refcnt && !(memtype & (1 << bo->mem.mem_type))) {
		NV_ERROR(nouveau_bdev(bo->bdev)->dev,
			 "bo %p pinned elsewhere: 0x%08x vs 0x%08x\n", bo,
			 1 << bo->mem.mem_type, memtype);
		return -EINVAL;
	}

	if (nvbo->pin_refcnt++)
		return 0;

	ret = ttm_bo_reserve(bo, false, false, false, 0);
	if (ret)
		goto out;

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	nouveau_bo_placement_set(nvbo, memtype, 0);
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	ret = nouveau_bo_validate(nvbo, false, false, false);
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	if (ret == 0) {
		switch (bo->mem.mem_type) {
		case TTM_PL_VRAM:
			dev_priv->fb_aper_free -= bo->mem.size;
			break;
		case TTM_PL_TT:
			dev_priv->gart_info.aper_free -= bo->mem.size;
			break;
		default:
			break;
		}
	}
	ttm_bo_unreserve(bo);
out:
	if (unlikely(ret))
		nvbo->pin_refcnt--;
	return ret;
}

int
nouveau_bo_unpin(struct nouveau_bo *nvbo)
{
	struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
	struct ttm_buffer_object *bo = &nvbo->bo;
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	int ret;
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	if (--nvbo->pin_refcnt)
		return 0;

	ret = ttm_bo_reserve(bo, false, false, false, 0);
	if (ret)
		return ret;

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	nouveau_bo_placement_set(nvbo, bo->mem.placement, 0);
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	ret = nouveau_bo_validate(nvbo, false, false, false);
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	if (ret == 0) {
		switch (bo->mem.mem_type) {
		case TTM_PL_VRAM:
			dev_priv->fb_aper_free += bo->mem.size;
			break;
		case TTM_PL_TT:
			dev_priv->gart_info.aper_free += bo->mem.size;
			break;
		default:
			break;
		}
	}

	ttm_bo_unreserve(bo);
	return ret;
}

int
nouveau_bo_map(struct nouveau_bo *nvbo)
{
	int ret;

	ret = ttm_bo_reserve(&nvbo->bo, false, false, false, 0);
	if (ret)
		return ret;

	ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap);
	ttm_bo_unreserve(&nvbo->bo);
	return ret;
}

void
nouveau_bo_unmap(struct nouveau_bo *nvbo)
{
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	if (nvbo)
		ttm_bo_kunmap(&nvbo->kmap);
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}

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int
nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
		    bool no_wait_reserve, bool no_wait_gpu)
{
	int ret;

	ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, interruptible,
			      no_wait_reserve, no_wait_gpu);
	if (ret)
		return ret;

	return 0;
}

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u16
nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index)
{
	bool is_iomem;
	u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
	mem = &mem[index];
	if (is_iomem)
		return ioread16_native((void __force __iomem *)mem);
	else
		return *mem;
}

void
nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val)
{
	bool is_iomem;
	u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
	mem = &mem[index];
	if (is_iomem)
		iowrite16_native(val, (void __force __iomem *)mem);
	else
		*mem = val;
}

u32
nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index)
{
	bool is_iomem;
	u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
	mem = &mem[index];
	if (is_iomem)
		return ioread32_native((void __force __iomem *)mem);
	else
		return *mem;
}

void
nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val)
{
	bool is_iomem;
	u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
	mem = &mem[index];
	if (is_iomem)
		iowrite32_native(val, (void __force __iomem *)mem);
	else
		*mem = val;
}

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static struct ttm_tt *
nouveau_ttm_tt_create(struct ttm_bo_device *bdev,
		      unsigned long size, uint32_t page_flags,
		      struct page *dummy_read_page)
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{
	struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev);
	struct drm_device *dev = dev_priv->dev;

	switch (dev_priv->gart_info.type) {
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#if __OS_HAS_AGP
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	case NOUVEAU_GART_AGP:
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		return ttm_agp_tt_create(bdev, dev->agp->bridge,
					 size, page_flags, dummy_read_page);
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#endif
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	case NOUVEAU_GART_PDMA:
	case NOUVEAU_GART_HW:
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		return nouveau_sgdma_create_ttm(bdev, size, page_flags,
						dummy_read_page);
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	default:
		NV_ERROR(dev, "Unknown GART type %d\n",
			 dev_priv->gart_info.type);
		break;
	}

	return NULL;
}

static int
nouveau_bo_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
{
	/* We'll do this from user space. */
	return 0;
}

static int
nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
			 struct ttm_mem_type_manager *man)
{
	struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev);
	struct drm_device *dev = dev_priv->dev;

	switch (type) {
	case TTM_PL_SYSTEM:
		man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
		man->available_caching = TTM_PL_MASK_CACHING;
		man->default_caching = TTM_PL_FLAG_CACHED;
		break;
	case TTM_PL_VRAM:
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		if (dev_priv->card_type >= NV_50) {
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			man->func = &nouveau_vram_manager;
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			man->io_reserve_fastpath = false;
			man->use_io_reserve_lru = true;
		} else {
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			man->func = &ttm_bo_manager_func;
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		}
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		man->flags = TTM_MEMTYPE_FLAG_FIXED |
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			     TTM_MEMTYPE_FLAG_MAPPABLE;
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		man->available_caching = TTM_PL_FLAG_UNCACHED |
					 TTM_PL_FLAG_WC;
		man->default_caching = TTM_PL_FLAG_WC;
		break;
	case TTM_PL_TT:
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		if (dev_priv->card_type >= NV_50)
			man->func = &nouveau_gart_manager;
		else
			man->func = &ttm_bo_manager_func;
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		switch (dev_priv->gart_info.type) {
		case NOUVEAU_GART_AGP:
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			man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
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			man->available_caching = TTM_PL_FLAG_UNCACHED |
				TTM_PL_FLAG_WC;
			man->default_caching = TTM_PL_FLAG_WC;
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			break;
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		case NOUVEAU_GART_PDMA:
		case NOUVEAU_GART_HW:
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			man->flags = TTM_MEMTYPE_FLAG_MAPPABLE |
				     TTM_MEMTYPE_FLAG_CMA;
			man->available_caching = TTM_PL_MASK_CACHING;
			man->default_caching = TTM_PL_FLAG_CACHED;
			break;
		default:
			NV_ERROR(dev, "Unknown GART type: %d\n",
				 dev_priv->gart_info.type);
			return -EINVAL;
		}
		break;
	default:
		NV_ERROR(dev, "Unsupported memory type %u\n", (unsigned)type);
		return -EINVAL;
	}
	return 0;
}

static void
nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
{
	struct nouveau_bo *nvbo = nouveau_bo(bo);

	switch (bo->mem.mem_type) {
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	case TTM_PL_VRAM:
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		nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT,
					 TTM_PL_FLAG_SYSTEM);
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		break;
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	default:
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		nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM, 0);
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		break;
	}
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	*pl = nvbo->placement;
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}


/* GPU-assisted copy using NV_MEMORY_TO_MEMORY_FORMAT, can access
 * TTM_PL_{VRAM,TT} directly.
 */
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static int
nouveau_bo_move_accel_cleanup(struct nouveau_channel *chan,
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			      struct nouveau_bo *nvbo, bool evict,
			      bool no_wait_reserve, bool no_wait_gpu,
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			      struct ttm_mem_reg *new_mem)
{
	struct nouveau_fence *fence = NULL;
	int ret;

	ret = nouveau_fence_new(chan, &fence, true);
	if (ret)
		return ret;

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	ret = ttm_bo_move_accel_cleanup(&nvbo->bo, fence, NULL, evict,
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					no_wait_reserve, no_wait_gpu, new_mem);
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	nouveau_fence_unref(&fence);
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	return ret;
}

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static int
nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
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	struct nouveau_mem *node = old_mem->mm_node;
	u64 src_offset = node->vma[0].offset;
	u64 dst_offset = node->vma[1].offset;
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	u32 page_count = new_mem->num_pages;
	int ret;

	page_count = new_mem->num_pages;
	while (page_count) {
		int line_count = (page_count > 2047) ? 2047 : page_count;

		ret = RING_SPACE(chan, 12);
		if (ret)
			return ret;

		BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0238, 2);
		OUT_RING  (chan, upper_32_bits(dst_offset));
		OUT_RING  (chan, lower_32_bits(dst_offset));
		BEGIN_NVC0(chan, 2, NvSubM2MF, 0x030c, 6);
		OUT_RING  (chan, upper_32_bits(src_offset));
		OUT_RING  (chan, lower_32_bits(src_offset));
		OUT_RING  (chan, PAGE_SIZE); /* src_pitch */
		OUT_RING  (chan, PAGE_SIZE); /* dst_pitch */
		OUT_RING  (chan, PAGE_SIZE); /* line_length */
		OUT_RING  (chan, line_count);
		BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0300, 1);
		OUT_RING  (chan, 0x00100110);

		page_count -= line_count;
		src_offset += (PAGE_SIZE * line_count);
		dst_offset += (PAGE_SIZE * line_count);
	}

	return 0;
}

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static int
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nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
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{
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	struct nouveau_mem *node = old_mem->mm_node;
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	struct nouveau_bo *nvbo = nouveau_bo(bo);
	u64 length = (new_mem->num_pages << PAGE_SHIFT);
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	u64 src_offset = node->vma[0].offset;
	u64 dst_offset = node->vma[1].offset;
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	int ret;

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	while (length) {
		u32 amount, stride, height;

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		amount  = min(length, (u64)(4 * 1024 * 1024));
		stride  = 16 * 4;
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		height  = amount / stride;

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		if (new_mem->mem_type == TTM_PL_VRAM &&
		    nouveau_bo_tile_layout(nvbo)) {
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			ret = RING_SPACE(chan, 8);
			if (ret)
				return ret;

			BEGIN_RING(chan, NvSubM2MF, 0x0200, 7);
			OUT_RING  (chan, 0);
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			OUT_RING  (chan, 0);
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			OUT_RING  (chan, stride);
			OUT_RING  (chan, height);
			OUT_RING  (chan, 1);
			OUT_RING  (chan, 0);
			OUT_RING  (chan, 0);
		} else {
			ret = RING_SPACE(chan, 2);
			if (ret)
				return ret;

			BEGIN_RING(chan, NvSubM2MF, 0x0200, 1);
			OUT_RING  (chan, 1);
		}
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		if (old_mem->mem_type == TTM_PL_VRAM &&
		    nouveau_bo_tile_layout(nvbo)) {
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			ret = RING_SPACE(chan, 8);
			if (ret)
				return ret;

			BEGIN_RING(chan, NvSubM2MF, 0x021c, 7);
			OUT_RING  (chan, 0);
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			OUT_RING  (chan, 0);
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			OUT_RING  (chan, stride);
			OUT_RING  (chan, height);
			OUT_RING  (chan, 1);
			OUT_RING  (chan, 0);
			OUT_RING  (chan, 0);
		} else {
			ret = RING_SPACE(chan, 2);
			if (ret)
				return ret;

			BEGIN_RING(chan, NvSubM2MF, 0x021c, 1);
			OUT_RING  (chan, 1);
		}

		ret = RING_SPACE(chan, 14);
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		if (ret)
			return ret;
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		BEGIN_RING(chan, NvSubM2MF, 0x0238, 2);
		OUT_RING  (chan, upper_32_bits(src_offset));
		OUT_RING  (chan, upper_32_bits(dst_offset));
		BEGIN_RING(chan, NvSubM2MF, 0x030c, 8);
		OUT_RING  (chan, lower_32_bits(src_offset));
		OUT_RING  (chan, lower_32_bits(dst_offset));
		OUT_RING  (chan, stride);
		OUT_RING  (chan, stride);
		OUT_RING  (chan, stride);
		OUT_RING  (chan, height);
		OUT_RING  (chan, 0x00000101);
		OUT_RING  (chan, 0x00000000);
		BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
		OUT_RING  (chan, 0);

		length -= amount;
		src_offset += amount;
		dst_offset += amount;
610 611
	}

612 613 614
	return 0;
}

615 616 617 618 619 620 621 622 623
static inline uint32_t
nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo,
		      struct nouveau_channel *chan, struct ttm_mem_reg *mem)
{
	if (mem->mem_type == TTM_PL_TT)
		return chan->gart_handle;
	return chan->vram_handle;
}

624 625 626 627
static int
nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
628 629
	u32 src_offset = old_mem->start << PAGE_SHIFT;
	u32 dst_offset = new_mem->start << PAGE_SHIFT;
630 631 632 633 634 635 636 637 638 639 640
	u32 page_count = new_mem->num_pages;
	int ret;

	ret = RING_SPACE(chan, 3);
	if (ret)
		return ret;

	BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE, 2);
	OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, old_mem));
	OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, new_mem));

641 642 643 644 645 646 647
	page_count = new_mem->num_pages;
	while (page_count) {
		int line_count = (page_count > 2047) ? 2047 : page_count;

		ret = RING_SPACE(chan, 11);
		if (ret)
			return ret;
648

649 650
		BEGIN_RING(chan, NvSubM2MF,
				 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
651 652 653 654 655 656 657 658
		OUT_RING  (chan, src_offset);
		OUT_RING  (chan, dst_offset);
		OUT_RING  (chan, PAGE_SIZE); /* src_pitch */
		OUT_RING  (chan, PAGE_SIZE); /* dst_pitch */
		OUT_RING  (chan, PAGE_SIZE); /* line_length */
		OUT_RING  (chan, line_count);
		OUT_RING  (chan, 0x00000101);
		OUT_RING  (chan, 0x00000000);
659
		BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
660
		OUT_RING  (chan, 0);
661 662 663 664 665 666

		page_count -= line_count;
		src_offset += (PAGE_SIZE * line_count);
		dst_offset += (PAGE_SIZE * line_count);
	}

667 668 669
	return 0;
}

670 671 672 673 674 675 676 677 678 679 680 681 682 683 684
static int
nouveau_vma_getmap(struct nouveau_channel *chan, struct nouveau_bo *nvbo,
		   struct ttm_mem_reg *mem, struct nouveau_vma *vma)
{
	struct nouveau_mem *node = mem->mm_node;
	int ret;

	ret = nouveau_vm_get(chan->vm, mem->num_pages << PAGE_SHIFT,
			     node->page_shift, NV_MEM_ACCESS_RO, vma);
	if (ret)
		return ret;

	if (mem->mem_type == TTM_PL_VRAM)
		nouveau_vm_map(vma, node);
	else
685
		nouveau_vm_map_sg(vma, 0, mem->num_pages << PAGE_SHIFT, node);
686 687 688 689

	return 0;
}

690 691 692 693 694 695 696
static int
nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
		     bool no_wait_reserve, bool no_wait_gpu,
		     struct ttm_mem_reg *new_mem)
{
	struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
	struct nouveau_bo *nvbo = nouveau_bo(bo);
697
	struct ttm_mem_reg *old_mem = &bo->mem;
698 699 700 701
	struct nouveau_channel *chan;
	int ret;

	chan = nvbo->channel;
702
	if (!chan) {
703
		chan = dev_priv->channel;
704
		mutex_lock_nested(&chan->mutex, NOUVEAU_KCHANNEL_MUTEX);
705
	}
706

707 708 709
	/* create temporary vmas for the transfer and attach them to the
	 * old nouveau_mem node, these will get cleaned up after ttm has
	 * destroyed the ttm_mem_reg
710
	 */
711
	if (dev_priv->card_type >= NV_50) {
712
		struct nouveau_mem *node = old_mem->mm_node;
713

714 715 716 717 718 719 720
		ret = nouveau_vma_getmap(chan, nvbo, old_mem, &node->vma[0]);
		if (ret)
			goto out;

		ret = nouveau_vma_getmap(chan, nvbo, new_mem, &node->vma[1]);
		if (ret)
			goto out;
721 722
	}

723 724 725
	if (dev_priv->card_type < NV_50)
		ret = nv04_bo_move_m2mf(chan, bo, &bo->mem, new_mem);
	else
B
Ben Skeggs 已提交
726
	if (dev_priv->card_type < NV_C0)
727
		ret = nv50_bo_move_m2mf(chan, bo, &bo->mem, new_mem);
B
Ben Skeggs 已提交
728 729
	else
		ret = nvc0_bo_move_m2mf(chan, bo, &bo->mem, new_mem);
730 731 732 733 734
	if (ret == 0) {
		ret = nouveau_bo_move_accel_cleanup(chan, nvbo, evict,
						    no_wait_reserve,
						    no_wait_gpu, new_mem);
	}
735

736
out:
737 738 739
	if (chan == dev_priv->channel)
		mutex_unlock(&chan->mutex);
	return ret;
740 741 742 743
}

static int
nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
744 745
		      bool no_wait_reserve, bool no_wait_gpu,
		      struct ttm_mem_reg *new_mem)
746 747 748 749 750 751 752 753
{
	u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
	struct ttm_placement placement;
	struct ttm_mem_reg tmp_mem;
	int ret;

	placement.fpfn = placement.lpfn = 0;
	placement.num_placement = placement.num_busy_placement = 1;
754
	placement.placement = placement.busy_placement = &placement_memtype;
755 756 757

	tmp_mem = *new_mem;
	tmp_mem.mm_node = NULL;
758
	ret = ttm_bo_mem_space(bo, &placement, &tmp_mem, intr, no_wait_reserve, no_wait_gpu);
759 760 761 762 763 764 765
	if (ret)
		return ret;

	ret = ttm_tt_bind(bo->ttm, &tmp_mem);
	if (ret)
		goto out;

766
	ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_reserve, no_wait_gpu, &tmp_mem);
767 768 769
	if (ret)
		goto out;

770
	ret = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, new_mem);
771
out:
772
	ttm_bo_mem_put(bo, &tmp_mem);
773 774 775 776 777
	return ret;
}

static int
nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
778 779
		      bool no_wait_reserve, bool no_wait_gpu,
		      struct ttm_mem_reg *new_mem)
780 781 782 783 784 785 786 787
{
	u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
	struct ttm_placement placement;
	struct ttm_mem_reg tmp_mem;
	int ret;

	placement.fpfn = placement.lpfn = 0;
	placement.num_placement = placement.num_busy_placement = 1;
788
	placement.placement = placement.busy_placement = &placement_memtype;
789 790 791

	tmp_mem = *new_mem;
	tmp_mem.mm_node = NULL;
792
	ret = ttm_bo_mem_space(bo, &placement, &tmp_mem, intr, no_wait_reserve, no_wait_gpu);
793 794 795
	if (ret)
		return ret;

796
	ret = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, &tmp_mem);
797 798 799
	if (ret)
		goto out;

800
	ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_reserve, no_wait_gpu, new_mem);
801 802 803 804
	if (ret)
		goto out;

out:
805
	ttm_bo_mem_put(bo, &tmp_mem);
806 807 808
	return ret;
}

809 810 811 812
static void
nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem)
{
	struct nouveau_bo *nvbo = nouveau_bo(bo);
813 814 815
	struct nouveau_vma *vma;

	list_for_each_entry(vma, &nvbo->vma_list, head) {
816
		if (new_mem && new_mem->mem_type == TTM_PL_VRAM) {
817 818
			nouveau_vm_map(vma, new_mem->mm_node);
		} else
819
		if (new_mem && new_mem->mem_type == TTM_PL_TT &&
820 821 822
		    nvbo->page_shift == vma->vm->spg_shift) {
			nouveau_vm_map_sg(vma, 0, new_mem->
					  num_pages << PAGE_SHIFT,
823
					  new_mem->mm_node);
824 825 826
		} else {
			nouveau_vm_unmap(vma);
		}
827 828 829
	}
}

830
static int
831 832
nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem,
		   struct nouveau_tile_reg **new_tile)
833 834 835
{
	struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
	struct drm_device *dev = dev_priv->dev;
836
	struct nouveau_bo *nvbo = nouveau_bo(bo);
837
	u64 offset = new_mem->start << PAGE_SHIFT;
838

839 840
	*new_tile = NULL;
	if (new_mem->mem_type != TTM_PL_VRAM)
841 842
		return 0;

843
	if (dev_priv->card_type >= NV_10) {
844
		*new_tile = nv10_mem_set_tiling(dev, offset, new_mem->size,
845 846
						nvbo->tile_mode,
						nvbo->tile_flags);
847 848
	}

849 850 851 852 853 854 855 856 857 858 859
	return 0;
}

static void
nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
		      struct nouveau_tile_reg *new_tile,
		      struct nouveau_tile_reg **old_tile)
{
	struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
	struct drm_device *dev = dev_priv->dev;

860 861
	nv10_mem_put_tile_region(dev, *old_tile, bo->sync_obj);
	*old_tile = new_tile;
862 863 864 865
}

static int
nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr,
866 867
		bool no_wait_reserve, bool no_wait_gpu,
		struct ttm_mem_reg *new_mem)
868 869 870 871 872 873 874
{
	struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
	struct nouveau_bo *nvbo = nouveau_bo(bo);
	struct ttm_mem_reg *old_mem = &bo->mem;
	struct nouveau_tile_reg *new_tile = NULL;
	int ret = 0;

875 876 877 878 879
	if (dev_priv->card_type < NV_50) {
		ret = nouveau_bo_vm_bind(bo, new_mem, &new_tile);
		if (ret)
			return ret;
	}
880 881

	/* Fake bo copy. */
882 883 884 885
	if (old_mem->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
		BUG_ON(bo->mem.mm_node != NULL);
		bo->mem = *new_mem;
		new_mem->mm_node = NULL;
886
		goto out;
887 888
	}

889
	/* Software copy if the card isn't up and running yet. */
B
Ben Skeggs 已提交
890
	if (!dev_priv->channel) {
891 892 893 894
		ret = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem);
		goto out;
	}

895 896
	/* Hardware assisted copy. */
	if (new_mem->mem_type == TTM_PL_SYSTEM)
897
		ret = nouveau_bo_move_flipd(bo, evict, intr, no_wait_reserve, no_wait_gpu, new_mem);
898
	else if (old_mem->mem_type == TTM_PL_SYSTEM)
899
		ret = nouveau_bo_move_flips(bo, evict, intr, no_wait_reserve, no_wait_gpu, new_mem);
900
	else
901
		ret = nouveau_bo_move_m2mf(bo, evict, intr, no_wait_reserve, no_wait_gpu, new_mem);
902

903 904 905 906
	if (!ret)
		goto out;

	/* Fallback to software copy. */
907
	ret = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem);
908 909

out:
910 911 912 913 914 915
	if (dev_priv->card_type < NV_50) {
		if (ret)
			nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
		else
			nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
	}
916 917

	return ret;
918 919 920 921 922 923 924 925
}

static int
nouveau_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)
{
	return 0;
}

926 927 928 929 930 931
static int
nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
{
	struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
	struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev);
	struct drm_device *dev = dev_priv->dev;
932
	int ret;
933 934 935 936 937 938 939 940 941 942 943 944 945 946 947

	mem->bus.addr = NULL;
	mem->bus.offset = 0;
	mem->bus.size = mem->num_pages << PAGE_SHIFT;
	mem->bus.base = 0;
	mem->bus.is_iomem = false;
	if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE))
		return -EINVAL;
	switch (mem->mem_type) {
	case TTM_PL_SYSTEM:
		/* System memory */
		return 0;
	case TTM_PL_TT:
#if __OS_HAS_AGP
		if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
948
			mem->bus.offset = mem->start << PAGE_SHIFT;
949 950 951 952 953 954
			mem->bus.base = dev_priv->gart_info.aper_base;
			mem->bus.is_iomem = true;
		}
#endif
		break;
	case TTM_PL_VRAM:
955
	{
956
		struct nouveau_mem *node = mem->mm_node;
957
		u8 page_shift;
958 959 960 961 962 963 964 965

		if (!dev_priv->bar1_vm) {
			mem->bus.offset = mem->start << PAGE_SHIFT;
			mem->bus.base = pci_resource_start(dev->pdev, 1);
			mem->bus.is_iomem = true;
			break;
		}

966
		if (dev_priv->card_type >= NV_C0)
967
			page_shift = node->page_shift;
968 969 970
		else
			page_shift = 12;

B
Ben Skeggs 已提交
971
		ret = nouveau_vm_get(dev_priv->bar1_vm, mem->bus.size,
972
				     page_shift, NV_MEM_ACCESS_RW,
973
				     &node->bar_vma);
974 975 976
		if (ret)
			return ret;

977
		nouveau_vm_map(&node->bar_vma, node);
978
		if (ret) {
979
			nouveau_vm_put(&node->bar_vma);
980 981 982
			return ret;
		}

983
		mem->bus.offset = node->bar_vma.offset;
984 985
		if (dev_priv->card_type == NV_50) /*XXX*/
			mem->bus.offset -= 0x0020000000ULL;
986
		mem->bus.base = pci_resource_start(dev->pdev, 1);
987
		mem->bus.is_iomem = true;
988
	}
989 990 991 992 993 994 995 996 997 998
		break;
	default:
		return -EINVAL;
	}
	return 0;
}

static void
nouveau_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
{
999
	struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev);
1000
	struct nouveau_mem *node = mem->mm_node;
1001 1002 1003 1004

	if (!dev_priv->bar1_vm || mem->mem_type != TTM_PL_VRAM)
		return;

1005
	if (!node->bar_vma.node)
1006 1007
		return;

1008 1009
	nouveau_vm_unmap(&node->bar_vma);
	nouveau_vm_put(&node->bar_vma);
1010 1011 1012 1013 1014
}

static int
nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
{
1015 1016 1017 1018 1019 1020 1021
	struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
	struct nouveau_bo *nvbo = nouveau_bo(bo);

	/* as long as the bo isn't in vram, and isn't tiled, we've got
	 * nothing to do here.
	 */
	if (bo->mem.mem_type != TTM_PL_VRAM) {
1022 1023
		if (dev_priv->card_type < NV_50 ||
		    !nouveau_bo_tile_layout(nvbo))
1024 1025 1026 1027
			return 0;
	}

	/* make sure bo is in mappable vram */
1028
	if (bo->mem.start + bo->mem.num_pages < dev_priv->fb_mappable_pages)
1029 1030 1031 1032 1033 1034
		return 0;


	nvbo->placement.fpfn = 0;
	nvbo->placement.lpfn = dev_priv->fb_mappable_pages;
	nouveau_bo_placement_set(nvbo, TTM_PL_VRAM, 0);
1035
	return nouveau_bo_validate(nvbo, false, true, false);
1036 1037
}

1038 1039 1040
void
nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence)
{
1041
	struct nouveau_fence *old_fence;
1042 1043

	if (likely(fence))
1044
		nouveau_fence_ref(fence);
1045

1046 1047 1048
	spin_lock(&nvbo->bo.bdev->fence_lock);
	old_fence = nvbo->bo.sync_obj;
	nvbo->bo.sync_obj = fence;
1049
	spin_unlock(&nvbo->bo.bdev->fence_lock);
1050 1051

	nouveau_fence_unref(&old_fence);
1052 1053
}

1054 1055 1056
static int
nouveau_ttm_tt_populate(struct ttm_tt *ttm)
{
1057
	struct ttm_dma_tt *ttm_dma = (void *)ttm;
1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068
	struct drm_nouveau_private *dev_priv;
	struct drm_device *dev;
	unsigned i;
	int r;

	if (ttm->state != tt_unpopulated)
		return 0;

	dev_priv = nouveau_bdev(ttm->bdev);
	dev = dev_priv->dev;

J
Jerome Glisse 已提交
1069 1070 1071 1072 1073 1074
#if __OS_HAS_AGP
	if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
		return ttm_agp_tt_populate(ttm);
	}
#endif

1075 1076
#ifdef CONFIG_SWIOTLB
	if (swiotlb_nr_tbl()) {
1077
		return ttm_dma_populate((void *)ttm, dev->dev);
1078 1079 1080 1081 1082 1083 1084 1085 1086
	}
#endif

	r = ttm_pool_populate(ttm);
	if (r) {
		return r;
	}

	for (i = 0; i < ttm->num_pages; i++) {
1087
		ttm_dma->dma_address[i] = pci_map_page(dev->pdev, ttm->pages[i],
1088 1089
						   0, PAGE_SIZE,
						   PCI_DMA_BIDIRECTIONAL);
1090
		if (pci_dma_mapping_error(dev->pdev, ttm_dma->dma_address[i])) {
1091
			while (--i) {
1092
				pci_unmap_page(dev->pdev, ttm_dma->dma_address[i],
1093
					       PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
1094
				ttm_dma->dma_address[i] = 0;
1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105
			}
			ttm_pool_unpopulate(ttm);
			return -EFAULT;
		}
	}
	return 0;
}

static void
nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm)
{
1106
	struct ttm_dma_tt *ttm_dma = (void *)ttm;
1107 1108 1109 1110 1111 1112 1113
	struct drm_nouveau_private *dev_priv;
	struct drm_device *dev;
	unsigned i;

	dev_priv = nouveau_bdev(ttm->bdev);
	dev = dev_priv->dev;

J
Jerome Glisse 已提交
1114 1115 1116 1117 1118 1119 1120
#if __OS_HAS_AGP
	if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
		ttm_agp_tt_unpopulate(ttm);
		return;
	}
#endif

1121 1122
#ifdef CONFIG_SWIOTLB
	if (swiotlb_nr_tbl()) {
1123
		ttm_dma_unpopulate((void *)ttm, dev->dev);
1124 1125 1126 1127 1128
		return;
	}
#endif

	for (i = 0; i < ttm->num_pages; i++) {
1129 1130
		if (ttm_dma->dma_address[i]) {
			pci_unmap_page(dev->pdev, ttm_dma->dma_address[i],
1131 1132 1133 1134 1135 1136 1137
				       PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
		}
	}

	ttm_pool_unpopulate(ttm);
}

1138
struct ttm_bo_driver nouveau_bo_driver = {
1139
	.ttm_tt_create = &nouveau_ttm_tt_create,
1140 1141
	.ttm_tt_populate = &nouveau_ttm_tt_populate,
	.ttm_tt_unpopulate = &nouveau_ttm_tt_unpopulate,
1142 1143 1144
	.invalidate_caches = nouveau_bo_invalidate_caches,
	.init_mem_type = nouveau_bo_init_mem_type,
	.evict_flags = nouveau_bo_evict_flags,
1145
	.move_notify = nouveau_bo_move_ntfy,
1146 1147
	.move = nouveau_bo_move,
	.verify_access = nouveau_bo_verify_access,
1148 1149 1150 1151 1152
	.sync_obj_signaled = __nouveau_fence_signalled,
	.sync_obj_wait = __nouveau_fence_wait,
	.sync_obj_flush = __nouveau_fence_flush,
	.sync_obj_unref = __nouveau_fence_unref,
	.sync_obj_ref = __nouveau_fence_ref,
1153 1154 1155
	.fault_reserve_notify = &nouveau_ttm_fault_reserve_notify,
	.io_mem_reserve = &nouveau_ttm_io_mem_reserve,
	.io_mem_free = &nouveau_ttm_io_mem_free,
1156 1157
};

1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186
struct nouveau_vma *
nouveau_bo_vma_find(struct nouveau_bo *nvbo, struct nouveau_vm *vm)
{
	struct nouveau_vma *vma;
	list_for_each_entry(vma, &nvbo->vma_list, head) {
		if (vma->vm == vm)
			return vma;
	}

	return NULL;
}

int
nouveau_bo_vma_add(struct nouveau_bo *nvbo, struct nouveau_vm *vm,
		   struct nouveau_vma *vma)
{
	const u32 size = nvbo->bo.mem.num_pages << PAGE_SHIFT;
	struct nouveau_mem *node = nvbo->bo.mem.mm_node;
	int ret;

	ret = nouveau_vm_get(vm, size, nvbo->page_shift,
			     NV_MEM_ACCESS_RW, vma);
	if (ret)
		return ret;

	if (nvbo->bo.mem.mem_type == TTM_PL_VRAM)
		nouveau_vm_map(vma, nvbo->bo.mem.mm_node);
	else
	if (nvbo->bo.mem.mem_type == TTM_PL_TT)
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		nouveau_vm_map_sg(vma, 0, size, node);
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	list_add_tail(&vma->head, &nvbo->vma_list);
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	vma->refcount = 1;
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	return 0;
}

void
nouveau_bo_vma_del(struct nouveau_bo *nvbo, struct nouveau_vma *vma)
{
	if (vma->node) {
		if (nvbo->bo.mem.mem_type != TTM_PL_SYSTEM) {
			spin_lock(&nvbo->bo.bdev->fence_lock);
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			ttm_bo_wait(&nvbo->bo, false, false, false);
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			spin_unlock(&nvbo->bo.bdev->fence_lock);
			nouveau_vm_unmap(vma);
		}

		nouveau_vm_put(vma);
		list_del(&vma->head);
	}
}