hpsa.c 230.0 KB
Newer Older
1 2
/*
 *    Disk Array driver for HP Smart Array SAS controllers
3
 *    Copyright 2000, 2014 Hewlett-Packard Development Company, L.P.
4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
 *
 *    This program is free software; you can redistribute it and/or modify
 *    it under the terms of the GNU General Public License as published by
 *    the Free Software Foundation; version 2 of the License.
 *
 *    This program is distributed in the hope that it will be useful,
 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
 *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 *    NON INFRINGEMENT.  See the GNU General Public License for more details.
 *
 *    You should have received a copy of the GNU General Public License
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
 *
 */

#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/types.h>
#include <linux/pci.h>
M
Matthew Garrett 已提交
26
#include <linux/pci-aspm.h>
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/fs.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/compat.h>
#include <linux/blktrace_api.h>
#include <linux/uaccess.h>
#include <linux/io.h>
#include <linux/dma-mapping.h>
#include <linux/completion.h>
#include <linux/moduleparam.h>
#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_host.h>
45
#include <scsi/scsi_tcq.h>
46
#include <scsi/scsi_eh.h>
47 48 49
#include <linux/cciss_ioctl.h>
#include <linux/string.h>
#include <linux/bitmap.h>
A
Arun Sharma 已提交
50
#include <linux/atomic.h>
51
#include <linux/jiffies.h>
D
Don Brace 已提交
52
#include <linux/percpu-defs.h>
53
#include <linux/percpu.h>
D
Don Brace 已提交
54
#include <asm/unaligned.h>
55
#include <asm/div64.h>
56 57 58 59
#include "hpsa_cmd.h"
#include "hpsa.h"

/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
60
#define HPSA_DRIVER_VERSION "3.4.4-1"
61
#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
62
#define HPSA "hpsa"
63

64 65 66 67 68
/* How long to wait for CISS doorbell communication */
#define CLEAR_EVENT_WAIT_INTERVAL 20	/* ms for each msleep() call */
#define MODE_CHANGE_WAIT_INTERVAL 10	/* ms for each msleep() call */
#define MAX_CLEAR_EVENT_WAIT 30000	/* times 20 ms = 600 s */
#define MAX_MODE_CHANGE_WAIT 2000	/* times 10 ms = 20 s */
69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
#define MAX_IOCTL_CONFIG_WAIT 1000

/*define how many times we will try a command because of bus resets */
#define MAX_CMD_RETRIES 3

/* Embedded module documentation macros - see modules.h */
MODULE_AUTHOR("Hewlett-Packard Company");
MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
	HPSA_DRIVER_VERSION);
MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
MODULE_VERSION(HPSA_DRIVER_VERSION);
MODULE_LICENSE("GPL");

static int hpsa_allow_any;
module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(hpsa_allow_any,
		"Allow hpsa driver to access unknown HP Smart Array hardware");
86 87 88 89
static int hpsa_simple_mode;
module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(hpsa_simple_mode,
	"Use 'simple mode' rather than 'performant mode'");
90 91 92 93 94 95 96 97

/* define the PCI info for the cards we can control */
static const struct pci_device_id hpsa_pci_device_id[] = {
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
98 99
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
100
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
101 102 103 104 105 106 107
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
108 109 110 111 112 113
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
114 115 116 117 118 119 120 121 122 123
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
124
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
125 126 127
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
128 129 130 131 132
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
133 134 135 136 137
	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
	{PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
138
	{PCI_VENDOR_ID_HP,     PCI_ANY_ID,	PCI_ANY_ID, PCI_ANY_ID,
139
		PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
140 141 142 143 144 145 146 147 148 149 150 151 152 153 154
	{0,}
};

MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);

/*  board_id = Subsystem Device ID & Vendor ID
 *  product = Marketing Name for the board
 *  access = Address of the struct of function pointers
 */
static struct board_type products[] = {
	{0x3241103C, "Smart Array P212", &SA5_access},
	{0x3243103C, "Smart Array P410", &SA5_access},
	{0x3245103C, "Smart Array P410i", &SA5_access},
	{0x3247103C, "Smart Array P411", &SA5_access},
	{0x3249103C, "Smart Array P812", &SA5_access},
155 156
	{0x324A103C, "Smart Array P712m", &SA5_access},
	{0x324B103C, "Smart Array P711m", &SA5_access},
157
	{0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
158 159 160 161 162 163 164
	{0x3350103C, "Smart Array P222", &SA5_access},
	{0x3351103C, "Smart Array P420", &SA5_access},
	{0x3352103C, "Smart Array P421", &SA5_access},
	{0x3353103C, "Smart Array P822", &SA5_access},
	{0x3354103C, "Smart Array P420i", &SA5_access},
	{0x3355103C, "Smart Array P220i", &SA5_access},
	{0x3356103C, "Smart Array P721m", &SA5_access},
165 166 167 168 169 170 171
	{0x1921103C, "Smart Array P830i", &SA5_access},
	{0x1922103C, "Smart Array P430", &SA5_access},
	{0x1923103C, "Smart Array P431", &SA5_access},
	{0x1924103C, "Smart Array P830", &SA5_access},
	{0x1926103C, "Smart Array P731m", &SA5_access},
	{0x1928103C, "Smart Array P230i", &SA5_access},
	{0x1929103C, "Smart Array P530", &SA5_access},
172 173 174 175
	{0x21BD103C, "Smart Array P244br", &SA5_access},
	{0x21BE103C, "Smart Array P741m", &SA5_access},
	{0x21BF103C, "Smart HBA H240ar", &SA5_access},
	{0x21C0103C, "Smart Array P440ar", &SA5_access},
176
	{0x21C1103C, "Smart Array P840ar", &SA5_access},
177 178
	{0x21C2103C, "Smart Array P440", &SA5_access},
	{0x21C3103C, "Smart Array P441", &SA5_access},
179
	{0x21C4103C, "Smart Array", &SA5_access},
180 181 182 183
	{0x21C5103C, "Smart Array P841", &SA5_access},
	{0x21C6103C, "Smart HBA H244br", &SA5_access},
	{0x21C7103C, "Smart HBA H240", &SA5_access},
	{0x21C8103C, "Smart HBA H241", &SA5_access},
184
	{0x21C9103C, "Smart Array", &SA5_access},
185 186
	{0x21CA103C, "Smart Array P246br", &SA5_access},
	{0x21CB103C, "Smart Array P840", &SA5_access},
187 188
	{0x21CC103C, "Smart Array", &SA5_access},
	{0x21CD103C, "Smart Array", &SA5_access},
189
	{0x21CE103C, "Smart HBA", &SA5_access},
190 191 192 193 194
	{0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
	{0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
	{0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
	{0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
	{0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
195 196 197 198 199
	{0xFFFF103C, "Unknown Smart Array", &SA5_access},
};

static int number_of_controllers;

200 201
static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
D
Don Brace 已提交
202
static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
203 204

#ifdef CONFIG_COMPAT
D
Don Brace 已提交
205 206
static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
	void __user *arg);
207 208 209 210
#endif

static void cmd_free(struct ctlr_info *h, struct CommandList *c);
static struct CommandList *cmd_alloc(struct ctlr_info *h);
211
static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
212
	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
213
	int cmd_type);
214
static void hpsa_free_cmd_pool(struct ctlr_info *h);
215
#define VPD_PAGE (1 << 8)
216

J
Jeff Garzik 已提交
217
static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
218 219 220
static void hpsa_scan_start(struct Scsi_Host *);
static int hpsa_scan_finished(struct Scsi_Host *sh,
	unsigned long elapsed_time);
D
Don Brace 已提交
221
static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
222 223

static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
224
static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
225
static int hpsa_slave_alloc(struct scsi_device *sdev);
226
static int hpsa_slave_configure(struct scsi_device *sdev);
227 228 229 230 231 232 233
static void hpsa_slave_destroy(struct scsi_device *sdev);

static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
static int check_for_unit_attention(struct ctlr_info *h,
	struct CommandList *c);
static void check_ioctl_unit_attention(struct ctlr_info *h,
	struct CommandList *c);
234 235
/* performant mode helper functions */
static void calc_bucket_map(int *bucket, int num_buckets,
D
Don Brace 已提交
236
	int nsgs, int min_blocks, u32 *bucket_map);
237
static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
238
static inline u32 next_command(struct ctlr_info *h, u8 q);
239 240 241 242 243 244 245 246
static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
			       u64 *cfg_offset);
static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
				    unsigned long *memory_bar);
static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
				     int wait_for_ready);
247
static inline void finish_cmd(struct CommandList *c);
248
static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
249 250
#define BOARD_NOT_READY 0
#define BOARD_READY 1
251
static void hpsa_drain_accel_commands(struct ctlr_info *h);
252
static void hpsa_flush_cache(struct ctlr_info *h);
253 254
static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
255
	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
256
static void hpsa_command_resubmit_worker(struct work_struct *work);
257 258
static u32 lockup_detected(struct ctlr_info *h);
static int detect_controller_lockup(struct ctlr_info *h);
259 260 261 262 263 264 265

static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
{
	unsigned long *priv = shost_priv(sdev->host);
	return (struct ctlr_info *) *priv;
}

266 267 268 269 270 271
static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
{
	unsigned long *priv = shost_priv(sh);
	return (struct ctlr_info *) *priv;
}

272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293
/* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
static void decode_sense_data(const u8 *sense_data, int sense_data_len,
			u8 *sense_key, u8 *asc, u8 *ascq)
{
	struct scsi_sense_hdr sshdr;
	bool rc;

	*sense_key = -1;
	*asc = -1;
	*ascq = -1;

	if (sense_data_len < 1)
		return;

	rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
	if (rc) {
		*sense_key = sshdr.sense_key;
		*asc = sshdr.asc;
		*ascq = sshdr.ascq;
	}
}

294 295 296
static int check_for_unit_attention(struct ctlr_info *h,
	struct CommandList *c)
{
297 298 299 300 301 302 303 304 305 306 307
	u8 sense_key, asc, ascq;
	int sense_len;

	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
		sense_len = sizeof(c->err_info->SenseInfo);
	else
		sense_len = c->err_info->SenseLen;

	decode_sense_data(c->err_info->SenseInfo, sense_len,
				&sense_key, &asc, &ascq);
	if (sense_key != UNIT_ATTENTION || asc == -1)
308 309
		return 0;

310
	switch (asc) {
311
	case STATE_CHANGED:
312 313 314
		dev_warn(&h->pdev->dev,
			HPSA "%d: a state change detected, command retried\n",
			h->ctlr);
315 316
		break;
	case LUN_FAILED:
317 318
		dev_warn(&h->pdev->dev,
			HPSA "%d: LUN failure detected\n", h->ctlr);
319 320
		break;
	case REPORT_LUNS_CHANGED:
321 322
		dev_warn(&h->pdev->dev,
			HPSA "%d: report LUN data changed\n", h->ctlr);
323
	/*
324 325
	 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
	 * target (array) devices.
326 327 328
	 */
		break;
	case POWER_OR_RESET:
329
		dev_warn(&h->pdev->dev, HPSA "%d: a power on "
330 331 332
			"or device reset detected\n", h->ctlr);
		break;
	case UNIT_ATTENTION_CLEARED:
333
		dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
334 335 336
		    "cleared by another initiator\n", h->ctlr);
		break;
	default:
337
		dev_warn(&h->pdev->dev, HPSA "%d: unknown "
338 339 340 341 342 343
			"unit attention detected\n", h->ctlr);
		break;
	}
	return 1;
}

344 345 346 347 348 349 350 351 352 353
static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
{
	if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
		(c->err_info->ScsiStatus != SAM_STAT_BUSY &&
		 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
		return 0;
	dev_warn(&h->pdev->dev, HPSA "device busy");
	return 1;
}

354 355 356 357 358 359 360 361 362 363 364 365 366 367
static u32 lockup_detected(struct ctlr_info *h);
static ssize_t host_show_lockup_detected(struct device *dev,
		struct device_attribute *attr, char *buf)
{
	int ld;
	struct ctlr_info *h;
	struct Scsi_Host *shost = class_to_shost(dev);

	h = shost_to_hba(shost);
	ld = lockup_detected(h);

	return sprintf(buf, "ld=%d\n", ld);
}

368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391
static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
					 struct device_attribute *attr,
					 const char *buf, size_t count)
{
	int status, len;
	struct ctlr_info *h;
	struct Scsi_Host *shost = class_to_shost(dev);
	char tmpbuf[10];

	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
		return -EACCES;
	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
	strncpy(tmpbuf, buf, len);
	tmpbuf[len] = '\0';
	if (sscanf(tmpbuf, "%d", &status) != 1)
		return -EINVAL;
	h = shost_to_hba(shost);
	h->acciopath_status = !!status;
	dev_warn(&h->pdev->dev,
		"hpsa: HP SSD Smart Path %s via sysfs update.\n",
		h->acciopath_status ? "enabled" : "disabled");
	return count;
}

392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416
static ssize_t host_store_raid_offload_debug(struct device *dev,
					 struct device_attribute *attr,
					 const char *buf, size_t count)
{
	int debug_level, len;
	struct ctlr_info *h;
	struct Scsi_Host *shost = class_to_shost(dev);
	char tmpbuf[10];

	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
		return -EACCES;
	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
	strncpy(tmpbuf, buf, len);
	tmpbuf[len] = '\0';
	if (sscanf(tmpbuf, "%d", &debug_level) != 1)
		return -EINVAL;
	if (debug_level < 0)
		debug_level = 0;
	h = shost_to_hba(shost);
	h->raid_offload_debug = debug_level;
	dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
		h->raid_offload_debug);
	return count;
}

417 418 419 420 421 422
static ssize_t host_store_rescan(struct device *dev,
				 struct device_attribute *attr,
				 const char *buf, size_t count)
{
	struct ctlr_info *h;
	struct Scsi_Host *shost = class_to_shost(dev);
423
	h = shost_to_hba(shost);
M
Mike Miller 已提交
424
	hpsa_scan_start(h->scsi_host);
425 426 427
	return count;
}

428 429 430 431 432 433 434 435 436 437 438 439 440 441 442
static ssize_t host_show_firmware_revision(struct device *dev,
	     struct device_attribute *attr, char *buf)
{
	struct ctlr_info *h;
	struct Scsi_Host *shost = class_to_shost(dev);
	unsigned char *fwrev;

	h = shost_to_hba(shost);
	if (!h->hba_inquiry_data)
		return 0;
	fwrev = &h->hba_inquiry_data[32];
	return snprintf(buf, 20, "%c%c%c%c\n",
		fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
}

443 444 445 446 447 448
static ssize_t host_show_commands_outstanding(struct device *dev,
	     struct device_attribute *attr, char *buf)
{
	struct Scsi_Host *shost = class_to_shost(dev);
	struct ctlr_info *h = shost_to_hba(shost);

449 450
	return snprintf(buf, 20, "%d\n",
			atomic_read(&h->commands_outstanding));
451 452
}

453 454 455 456 457 458 459 460
static ssize_t host_show_transport_mode(struct device *dev,
	struct device_attribute *attr, char *buf)
{
	struct ctlr_info *h;
	struct Scsi_Host *shost = class_to_shost(dev);

	h = shost_to_hba(shost);
	return snprintf(buf, 20, "%s\n",
461
		h->transMethod & CFGTBL_Trans_Performant ?
462 463 464
			"performant" : "simple");
}

465 466 467 468 469 470 471 472 473 474 475
static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
	struct device_attribute *attr, char *buf)
{
	struct ctlr_info *h;
	struct Scsi_Host *shost = class_to_shost(dev);

	h = shost_to_hba(shost);
	return snprintf(buf, 30, "HP SSD Smart Path %s\n",
		(h->acciopath_status == 1) ?  "enabled" : "disabled");
}

476
/* List of controllers which cannot be hard reset on kexec with reset_devices */
477 478
static u32 unresettable_controller[] = {
	0x324a103C, /* Smart Array P712m */
S
Stephen Cameron 已提交
479
	0x324b103C, /* Smart Array P711m */
480 481 482 483 484 485 486 487 488 489
	0x3223103C, /* Smart Array P800 */
	0x3234103C, /* Smart Array P400 */
	0x3235103C, /* Smart Array P400i */
	0x3211103C, /* Smart Array E200i */
	0x3212103C, /* Smart Array E200 */
	0x3213103C, /* Smart Array E200i */
	0x3214103C, /* Smart Array E200i */
	0x3215103C, /* Smart Array E200i */
	0x3237103C, /* Smart Array E500 */
	0x323D103C, /* Smart Array P700m */
490
	0x40800E11, /* Smart Array 5i */
491 492
	0x409C0E11, /* Smart Array 6400 */
	0x409D0E11, /* Smart Array 6400 EM */
493 494 495 496 497 498
	0x40700E11, /* Smart Array 5300 */
	0x40820E11, /* Smart Array 532 */
	0x40830E11, /* Smart Array 5312 */
	0x409A0E11, /* Smart Array 641 */
	0x409B0E11, /* Smart Array 642 */
	0x40910E11, /* Smart Array 6i */
499 500
};

501 502
/* List of controllers which cannot even be soft reset */
static u32 soft_unresettable_controller[] = {
503
	0x40800E11, /* Smart Array 5i */
504 505 506 507 508 509
	0x40700E11, /* Smart Array 5300 */
	0x40820E11, /* Smart Array 532 */
	0x40830E11, /* Smart Array 5312 */
	0x409A0E11, /* Smart Array 641 */
	0x409B0E11, /* Smart Array 642 */
	0x40910E11, /* Smart Array 6i */
510 511 512 513 514 515 516 517 518 519 520
	/* Exclude 640x boards.  These are two pci devices in one slot
	 * which share a battery backed cache module.  One controls the
	 * cache, the other accesses the cache through the one that controls
	 * it.  If we reset the one controlling the cache, the other will
	 * likely not be happy.  Just forbid resetting this conjoined mess.
	 * The 640x isn't really supported by hpsa anyway.
	 */
	0x409C0E11, /* Smart Array 6400 */
	0x409D0E11, /* Smart Array 6400 EM */
};

S
Stephen Cameron 已提交
521 522 523 524 525 526 527
static u32 needs_abort_tags_swizzled[] = {
	0x323D103C, /* Smart Array P700m */
	0x324a103C, /* Smart Array P712m */
	0x324b103C, /* SmartArray P711m */
};

static int board_id_in_array(u32 a[], int nelems, u32 board_id)
528 529 530
{
	int i;

S
Stephen Cameron 已提交
531 532 533 534
	for (i = 0; i < nelems; i++)
		if (a[i] == board_id)
			return 1;
	return 0;
535 536
}

S
Stephen Cameron 已提交
537
static int ctlr_is_hard_resettable(u32 board_id)
538
{
S
Stephen Cameron 已提交
539 540 541
	return !board_id_in_array(unresettable_controller,
			ARRAY_SIZE(unresettable_controller), board_id);
}
542

S
Stephen Cameron 已提交
543 544 545 546
static int ctlr_is_soft_resettable(u32 board_id)
{
	return !board_id_in_array(soft_unresettable_controller,
			ARRAY_SIZE(soft_unresettable_controller), board_id);
547 548
}

549 550 551 552 553 554
static int ctlr_is_resettable(u32 board_id)
{
	return ctlr_is_hard_resettable(board_id) ||
		ctlr_is_soft_resettable(board_id);
}

S
Stephen Cameron 已提交
555 556 557 558 559 560
static int ctlr_needs_abort_tags_swizzled(u32 board_id)
{
	return board_id_in_array(needs_abort_tags_swizzled,
			ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
}

561 562 563 564 565 566 567
static ssize_t host_show_resettable(struct device *dev,
	struct device_attribute *attr, char *buf)
{
	struct ctlr_info *h;
	struct Scsi_Host *shost = class_to_shost(dev);

	h = shost_to_hba(shost);
568
	return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
569 570
}

571 572 573 574 575
static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
{
	return (scsi3addr[3] & 0xC0) == 0x40;
}

576 577
static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
	"1(+0)ADM", "UNKNOWN"
578
};
579 580 581 582 583 584 585
#define HPSA_RAID_0	0
#define HPSA_RAID_4	1
#define HPSA_RAID_1	2	/* also used for RAID 10 */
#define HPSA_RAID_5	3	/* also used for RAID 50 */
#define HPSA_RAID_51	4
#define HPSA_RAID_6	5	/* also used for RAID 60 */
#define HPSA_RAID_ADM	6	/* also used for RAID 1+0 ADM */
586 587 588 589 590 591
#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)

static ssize_t raid_level_show(struct device *dev,
	     struct device_attribute *attr, char *buf)
{
	ssize_t l = 0;
592
	unsigned char rlevel;
593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615
	struct ctlr_info *h;
	struct scsi_device *sdev;
	struct hpsa_scsi_dev_t *hdev;
	unsigned long flags;

	sdev = to_scsi_device(dev);
	h = sdev_to_hba(sdev);
	spin_lock_irqsave(&h->lock, flags);
	hdev = sdev->hostdata;
	if (!hdev) {
		spin_unlock_irqrestore(&h->lock, flags);
		return -ENODEV;
	}

	/* Is this even a logical drive? */
	if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
		spin_unlock_irqrestore(&h->lock, flags);
		l = snprintf(buf, PAGE_SIZE, "N/A\n");
		return l;
	}

	rlevel = hdev->raid_level;
	spin_unlock_irqrestore(&h->lock, flags);
616
	if (rlevel > RAID_UNKNOWN)
617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673
		rlevel = RAID_UNKNOWN;
	l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
	return l;
}

static ssize_t lunid_show(struct device *dev,
	     struct device_attribute *attr, char *buf)
{
	struct ctlr_info *h;
	struct scsi_device *sdev;
	struct hpsa_scsi_dev_t *hdev;
	unsigned long flags;
	unsigned char lunid[8];

	sdev = to_scsi_device(dev);
	h = sdev_to_hba(sdev);
	spin_lock_irqsave(&h->lock, flags);
	hdev = sdev->hostdata;
	if (!hdev) {
		spin_unlock_irqrestore(&h->lock, flags);
		return -ENODEV;
	}
	memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
	spin_unlock_irqrestore(&h->lock, flags);
	return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
		lunid[0], lunid[1], lunid[2], lunid[3],
		lunid[4], lunid[5], lunid[6], lunid[7]);
}

static ssize_t unique_id_show(struct device *dev,
	     struct device_attribute *attr, char *buf)
{
	struct ctlr_info *h;
	struct scsi_device *sdev;
	struct hpsa_scsi_dev_t *hdev;
	unsigned long flags;
	unsigned char sn[16];

	sdev = to_scsi_device(dev);
	h = sdev_to_hba(sdev);
	spin_lock_irqsave(&h->lock, flags);
	hdev = sdev->hostdata;
	if (!hdev) {
		spin_unlock_irqrestore(&h->lock, flags);
		return -ENODEV;
	}
	memcpy(sn, hdev->device_id, sizeof(sn));
	spin_unlock_irqrestore(&h->lock, flags);
	return snprintf(buf, 16 * 2 + 2,
			"%02X%02X%02X%02X%02X%02X%02X%02X"
			"%02X%02X%02X%02X%02X%02X%02X%02X\n",
			sn[0], sn[1], sn[2], sn[3],
			sn[4], sn[5], sn[6], sn[7],
			sn[8], sn[9], sn[10], sn[11],
			sn[12], sn[13], sn[14], sn[15]);
}

674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695
static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
	     struct device_attribute *attr, char *buf)
{
	struct ctlr_info *h;
	struct scsi_device *sdev;
	struct hpsa_scsi_dev_t *hdev;
	unsigned long flags;
	int offload_enabled;

	sdev = to_scsi_device(dev);
	h = sdev_to_hba(sdev);
	spin_lock_irqsave(&h->lock, flags);
	hdev = sdev->hostdata;
	if (!hdev) {
		spin_unlock_irqrestore(&h->lock, flags);
		return -ENODEV;
	}
	offload_enabled = hdev->offload_enabled;
	spin_unlock_irqrestore(&h->lock, flags);
	return snprintf(buf, 20, "%d\n", offload_enabled);
}

696 697 698 699
static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
700 701
static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
			host_show_hp_ssd_smart_path_enabled, NULL);
702 703 704
static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
		host_show_hp_ssd_smart_path_status,
		host_store_hp_ssd_smart_path_status);
705 706
static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
			host_store_raid_offload_debug);
707 708 709 710 711 712
static DEVICE_ATTR(firmware_revision, S_IRUGO,
	host_show_firmware_revision, NULL);
static DEVICE_ATTR(commands_outstanding, S_IRUGO,
	host_show_commands_outstanding, NULL);
static DEVICE_ATTR(transport_mode, S_IRUGO,
	host_show_transport_mode, NULL);
713 714
static DEVICE_ATTR(resettable, S_IRUGO,
	host_show_resettable, NULL);
715 716
static DEVICE_ATTR(lockup_detected, S_IRUGO,
	host_show_lockup_detected, NULL);
717 718 719 720 721

static struct device_attribute *hpsa_sdev_attrs[] = {
	&dev_attr_raid_level,
	&dev_attr_lunid,
	&dev_attr_unique_id,
722
	&dev_attr_hp_ssd_smart_path_enabled,
723
	&dev_attr_lockup_detected,
724 725 726 727 728 729 730 731
	NULL,
};

static struct device_attribute *hpsa_shost_attrs[] = {
	&dev_attr_rescan,
	&dev_attr_firmware_revision,
	&dev_attr_commands_outstanding,
	&dev_attr_transport_mode,
732
	&dev_attr_resettable,
733
	&dev_attr_hp_ssd_smart_path_status,
734
	&dev_attr_raid_offload_debug,
735 736 737
	NULL,
};

738 739 740
#define HPSA_NRESERVED_CMDS	(HPSA_CMDS_RESERVED_FOR_ABORTS + \
		HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)

741 742
static struct scsi_host_template hpsa_driver_template = {
	.module			= THIS_MODULE,
743 744
	.name			= HPSA,
	.proc_name		= HPSA,
745 746 747
	.queuecommand		= hpsa_scsi_queue_command,
	.scan_start		= hpsa_scan_start,
	.scan_finished		= hpsa_scan_finished,
D
Don Brace 已提交
748
	.change_queue_depth	= hpsa_change_queue_depth,
749 750
	.this_id		= -1,
	.use_clustering		= ENABLE_CLUSTERING,
751
	.eh_abort_handler	= hpsa_eh_abort_handler,
752 753 754
	.eh_device_reset_handler = hpsa_eh_device_reset_handler,
	.ioctl			= hpsa_ioctl,
	.slave_alloc		= hpsa_slave_alloc,
755
	.slave_configure	= hpsa_slave_configure,
756 757 758 759 760 761
	.slave_destroy		= hpsa_slave_destroy,
#ifdef CONFIG_COMPAT
	.compat_ioctl		= hpsa_compat_ioctl,
#endif
	.sdev_attrs = hpsa_sdev_attrs,
	.shost_attrs = hpsa_shost_attrs,
762
	.max_sectors = 8192,
763
	.no_write_same = 1,
764 765
};

766
static inline u32 next_command(struct ctlr_info *h, u8 q)
767 768
{
	u32 a;
769
	struct reply_queue_buffer *rq = &h->reply_queue[q];
770

771 772 773
	if (h->transMethod & CFGTBL_Trans_io_accel1)
		return h->access.command_completed(h, q);

774
	if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
775
		return h->access.command_completed(h, q);
776

777 778 779
	if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
		a = rq->head[rq->current_entry];
		rq->current_entry++;
780
		atomic_dec(&h->commands_outstanding);
781 782 783 784
	} else {
		a = FIFO_EMPTY;
	}
	/* Check for wraparound */
785 786 787
	if (rq->current_entry == h->max_commands) {
		rq->current_entry = 0;
		rq->wraparound ^= 1;
788 789 790 791
	}
	return a;
}

792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817
/*
 * There are some special bits in the bus address of the
 * command that we have to set for the controller to know
 * how to process the command:
 *
 * Normal performant mode:
 * bit 0: 1 means performant mode, 0 means simple mode.
 * bits 1-3 = block fetch table entry
 * bits 4-6 = command type (== 0)
 *
 * ioaccel1 mode:
 * bit 0 = "performant mode" bit.
 * bits 1-3 = block fetch table entry
 * bits 4-6 = command type (== 110)
 * (command type is needed because ioaccel1 mode
 * commands are submitted through the same register as normal
 * mode commands, so this is how the controller knows whether
 * the command is normal mode or ioaccel1 mode.)
 *
 * ioaccel2 mode:
 * bit 0 = "performant mode" bit.
 * bits 1-4 = block fetch table entry (note extra bit)
 * bits 4-6 = not needed, because ioaccel2 mode has
 * a separate special register for submitting commands.
 */

818 819
/*
 * set_performant_mode: Modify the tag for cciss performant
820 821 822
 * set bit 0 for pull model, bits 3-1 for block fetch
 * register number
 */
823 824 825
#define DEFAULT_REPLY_QUEUE (-1)
static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
					int reply_queue)
826
{
827
	if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
828
		c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
829 830 831
		if (unlikely(!h->msix_vector))
			return;
		if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
832
			c->Header.ReplyQueue =
833
				raw_smp_processor_id() % h->nreply_queues;
834 835
		else
			c->Header.ReplyQueue = reply_queue % h->nreply_queues;
836
	}
837 838
}

839
static void set_ioaccel1_performant_mode(struct ctlr_info *h,
840 841
						struct CommandList *c,
						int reply_queue)
842 843 844
{
	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];

845 846
	/*
	 * Tell the controller to post the reply to the queue for this
847 848
	 * processor.  This seems to give the best I/O throughput.
	 */
849 850 851 852 853 854
	if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
		cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
	else
		cp->ReplyQueue = reply_queue % h->nreply_queues;
	/*
	 * Set the bits in the address sent down to include:
855 856 857 858 859 860 861 862 863
	 *  - performant mode bit (bit 0)
	 *  - pull count (bits 1-3)
	 *  - command type (bits 4-6)
	 */
	c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
					IOACCEL1_BUSADDR_CMDTYPE;
}

static void set_ioaccel2_performant_mode(struct ctlr_info *h,
864 865
						struct CommandList *c,
						int reply_queue)
866 867 868
{
	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];

869 870
	/*
	 * Tell the controller to post the reply to the queue for this
871 872
	 * processor.  This seems to give the best I/O throughput.
	 */
873 874 875 876 877 878
	if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
		cp->reply_queue = smp_processor_id() % h->nreply_queues;
	else
		cp->reply_queue = reply_queue % h->nreply_queues;
	/*
	 * Set the bits in the address sent down to include:
879 880 881 882 883 884 885
	 *  - performant mode bit not used in ioaccel mode 2
	 *  - pull count (bits 0-3)
	 *  - command type isn't needed for ioaccel2
	 */
	c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
}

886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914
static int is_firmware_flash_cmd(u8 *cdb)
{
	return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
}

/*
 * During firmware flash, the heartbeat register may not update as frequently
 * as it should.  So we dial down lockup detection during firmware flash. and
 * dial it back up when firmware flash completes.
 */
#define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
#define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
		struct CommandList *c)
{
	if (!is_firmware_flash_cmd(c->Request.CDB))
		return;
	atomic_inc(&h->firmware_flash_in_progress);
	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
}

static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
		struct CommandList *c)
{
	if (is_firmware_flash_cmd(c->Request.CDB) &&
		atomic_dec_and_test(&h->firmware_flash_in_progress))
		h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
}

915 916
static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
	struct CommandList *c, int reply_queue)
917
{
918 919
	dial_down_lockup_detection_during_fw_flash(h, c);
	atomic_inc(&h->commands_outstanding);
920 921
	switch (c->cmd_type) {
	case CMD_IOACCEL1:
922
		set_ioaccel1_performant_mode(h, c, reply_queue);
923
		writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
924 925
		break;
	case CMD_IOACCEL2:
926
		set_ioaccel2_performant_mode(h, c, reply_queue);
927
		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
928 929
		break;
	default:
930
		set_performant_mode(h, c, reply_queue);
931
		h->access.submit_command(h, c);
932
	}
933 934
}

935 936 937 938 939 940
static void enqueue_cmd_and_start_io(struct ctlr_info *h,
					struct CommandList *c)
{
	__enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
}

941 942 943 944 945 946 947 948 949 950 951 952 953 954
static inline int is_hba_lunid(unsigned char scsi3addr[])
{
	return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
}

static inline int is_scsi_rev_5(struct ctlr_info *h)
{
	if (!h->hba_inquiry_data)
		return 0;
	if ((h->hba_inquiry_data[2] & 0x07) == 5)
		return 1;
	return 0;
}

955 956 957 958 959 960 961
static int hpsa_find_target_lun(struct ctlr_info *h,
	unsigned char scsi3addr[], int bus, int *target, int *lun)
{
	/* finds an unused bus, target, lun for a new physical device
	 * assumes h->devlock is held
	 */
	int i, found = 0;
962
	DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
963

964
	bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
965 966 967

	for (i = 0; i < h->ndevices; i++) {
		if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
968
			__set_bit(h->dev[i]->target, lun_taken);
969 970
	}

971 972 973 974 975 976
	i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
	if (i < HPSA_MAX_DEVICES) {
		/* *bus = 1; */
		*target = i;
		*lun = 0;
		found = 1;
977 978 979 980
	}
	return !found;
}

981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997
static inline void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
	struct hpsa_scsi_dev_t *dev, char *description)
{
	dev_printk(level, &h->pdev->dev,
			"scsi %d:%d:%d:%d: %s %s %.8s %.16s RAID-%s SSDSmartPathCap%c En%c Exp=%d\n",
			h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
			description,
			scsi_device_type(dev->devtype),
			dev->vendor,
			dev->model,
			dev->raid_level > RAID_UNKNOWN ?
				"RAID-?" : raid_label[dev->raid_level],
			dev->offload_config ? '+' : '-',
			dev->offload_enabled ? '+' : '-',
			dev->expose_state);
}

998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008
/* Add an entry into h->dev[] array. */
static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
		struct hpsa_scsi_dev_t *device,
		struct hpsa_scsi_dev_t *added[], int *nadded)
{
	/* assumes h->devlock is held */
	int n = h->ndevices;
	int i;
	unsigned char addr1[8], addr2[8];
	struct hpsa_scsi_dev_t *sd;

1009
	if (n >= HPSA_MAX_DEVICES) {
1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021
		dev_err(&h->pdev->dev, "too many devices, some will be "
			"inaccessible.\n");
		return -1;
	}

	/* physical devices do not have lun or target assigned until now. */
	if (device->lun != -1)
		/* Logical device, lun is already assigned. */
		goto lun_assigned;

	/* If this device a non-zero lun of a multi-lun device
	 * byte 4 of the 8-byte LUN addr will contain the logical
D
Don Brace 已提交
1022
	 * unit no, zero otherwise.
1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064
	 */
	if (device->scsi3addr[4] == 0) {
		/* This is not a non-zero lun of a multi-lun device */
		if (hpsa_find_target_lun(h, device->scsi3addr,
			device->bus, &device->target, &device->lun) != 0)
			return -1;
		goto lun_assigned;
	}

	/* This is a non-zero lun of a multi-lun device.
	 * Search through our list and find the device which
	 * has the same 8 byte LUN address, excepting byte 4.
	 * Assign the same bus and target for this new LUN.
	 * Use the logical unit number from the firmware.
	 */
	memcpy(addr1, device->scsi3addr, 8);
	addr1[4] = 0;
	for (i = 0; i < n; i++) {
		sd = h->dev[i];
		memcpy(addr2, sd->scsi3addr, 8);
		addr2[4] = 0;
		/* differ only in byte 4? */
		if (memcmp(addr1, addr2, 8) == 0) {
			device->bus = sd->bus;
			device->target = sd->target;
			device->lun = device->scsi3addr[4];
			break;
		}
	}
	if (device->lun == -1) {
		dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
			" suspect firmware bug or unsupported hardware "
			"configuration.\n");
			return -1;
	}

lun_assigned:

	h->dev[n] = device;
	h->ndevices++;
	added[*nadded] = device;
	(*nadded)++;
1065 1066
	hpsa_show_dev_msg(KERN_INFO, h, device,
		device->expose_state & HPSA_SCSI_ADD ? "added" : "masked");
1067 1068
	device->offload_to_be_enabled = device->offload_enabled;
	device->offload_enabled = 0;
1069 1070 1071
	return 0;
}

1072 1073 1074 1075
/* Update an entry in h->dev[] array. */
static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
	int entry, struct hpsa_scsi_dev_t *new_entry)
{
1076
	int offload_enabled;
1077 1078 1079 1080 1081
	/* assumes h->devlock is held */
	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);

	/* Raid level changed. */
	h->dev[entry]->raid_level = new_entry->raid_level;
1082

1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095
	/* Raid offload parameters changed.  Careful about the ordering. */
	if (new_entry->offload_config && new_entry->offload_enabled) {
		/*
		 * if drive is newly offload_enabled, we want to copy the
		 * raid map data first.  If previously offload_enabled and
		 * offload_config were set, raid map data had better be
		 * the same as it was before.  if raid map data is changed
		 * then it had better be the case that
		 * h->dev[entry]->offload_enabled is currently 0.
		 */
		h->dev[entry]->raid_map = new_entry->raid_map;
		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
	}
1096 1097 1098 1099 1100
	if (new_entry->hba_ioaccel_enabled) {
		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
		wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
	}
	h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1101
	h->dev[entry]->offload_config = new_entry->offload_config;
1102
	h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1103
	h->dev[entry]->queue_depth = new_entry->queue_depth;
1104

1105 1106 1107 1108 1109 1110 1111 1112 1113
	/*
	 * We can turn off ioaccel offload now, but need to delay turning
	 * it on until we can update h->dev[entry]->phys_disk[], but we
	 * can't do that until all the devices are updated.
	 */
	h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
	if (!new_entry->offload_enabled)
		h->dev[entry]->offload_enabled = 0;

1114 1115
	offload_enabled = h->dev[entry]->offload_enabled;
	h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
1116
	hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1117
	h->dev[entry]->offload_enabled = offload_enabled;
1118 1119
}

1120 1121 1122 1123 1124 1125 1126
/* Replace an entry from h->dev[] array. */
static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
	int entry, struct hpsa_scsi_dev_t *new_entry,
	struct hpsa_scsi_dev_t *added[], int *nadded,
	struct hpsa_scsi_dev_t *removed[], int *nremoved)
{
	/* assumes h->devlock is held */
1127
	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1128 1129
	removed[*nremoved] = h->dev[entry];
	(*nremoved)++;
1130 1131 1132 1133 1134 1135 1136 1137 1138 1139

	/*
	 * New physical devices won't have target/lun assigned yet
	 * so we need to preserve the values in the slot we are replacing.
	 */
	if (new_entry->target == -1) {
		new_entry->target = h->dev[entry]->target;
		new_entry->lun = h->dev[entry]->lun;
	}

1140 1141 1142
	h->dev[entry] = new_entry;
	added[*nadded] = new_entry;
	(*nadded)++;
1143
	hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1144 1145
	new_entry->offload_to_be_enabled = new_entry->offload_enabled;
	new_entry->offload_enabled = 0;
1146 1147
}

1148 1149 1150 1151 1152 1153 1154 1155
/* Remove an entry from h->dev[] array. */
static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
	struct hpsa_scsi_dev_t *removed[], int *nremoved)
{
	/* assumes h->devlock is held */
	int i;
	struct hpsa_scsi_dev_t *sd;

1156
	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1157 1158 1159 1160 1161 1162 1163 1164

	sd = h->dev[entry];
	removed[*nremoved] = h->dev[entry];
	(*nremoved)++;

	for (i = entry; i < h->ndevices-1; i++)
		h->dev[i] = h->dev[i+1];
	h->ndevices--;
1165
	hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223
}

#define SCSI3ADDR_EQ(a, b) ( \
	(a)[7] == (b)[7] && \
	(a)[6] == (b)[6] && \
	(a)[5] == (b)[5] && \
	(a)[4] == (b)[4] && \
	(a)[3] == (b)[3] && \
	(a)[2] == (b)[2] && \
	(a)[1] == (b)[1] && \
	(a)[0] == (b)[0])

static void fixup_botched_add(struct ctlr_info *h,
	struct hpsa_scsi_dev_t *added)
{
	/* called when scsi_add_device fails in order to re-adjust
	 * h->dev[] to match the mid layer's view.
	 */
	unsigned long flags;
	int i, j;

	spin_lock_irqsave(&h->lock, flags);
	for (i = 0; i < h->ndevices; i++) {
		if (h->dev[i] == added) {
			for (j = i; j < h->ndevices-1; j++)
				h->dev[j] = h->dev[j+1];
			h->ndevices--;
			break;
		}
	}
	spin_unlock_irqrestore(&h->lock, flags);
	kfree(added);
}

static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
	struct hpsa_scsi_dev_t *dev2)
{
	/* we compare everything except lun and target as these
	 * are not yet assigned.  Compare parts likely
	 * to differ first
	 */
	if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
		sizeof(dev1->scsi3addr)) != 0)
		return 0;
	if (memcmp(dev1->device_id, dev2->device_id,
		sizeof(dev1->device_id)) != 0)
		return 0;
	if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
		return 0;
	if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
		return 0;
	if (dev1->devtype != dev2->devtype)
		return 0;
	if (dev1->bus != dev2->bus)
		return 0;
	return 1;
}

1224 1225 1226 1227 1228 1229 1230 1231 1232
static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
	struct hpsa_scsi_dev_t *dev2)
{
	/* Device attributes that can change, but don't mean
	 * that the device is a different device, nor that the OS
	 * needs to be told anything about the change.
	 */
	if (dev1->raid_level != dev2->raid_level)
		return 1;
1233 1234 1235 1236
	if (dev1->offload_config != dev2->offload_config)
		return 1;
	if (dev1->offload_enabled != dev2->offload_enabled)
		return 1;
1237 1238
	if (dev1->queue_depth != dev2->queue_depth)
		return 1;
1239 1240 1241
	return 0;
}

1242 1243 1244
/* Find needle in haystack.  If exact match found, return DEVICE_SAME,
 * and return needle location in *index.  If scsi3addr matches, but not
 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1245 1246 1247 1248
 * location in *index.
 * In the case of a minor device attribute change, such as RAID level, just
 * return DEVICE_UPDATED, along with the updated device's location in index.
 * If needle not found, return DEVICE_NOT_FOUND.
1249 1250 1251 1252 1253 1254 1255 1256 1257
 */
static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
	struct hpsa_scsi_dev_t *haystack[], int haystack_size,
	int *index)
{
	int i;
#define DEVICE_NOT_FOUND 0
#define DEVICE_CHANGED 1
#define DEVICE_SAME 2
1258
#define DEVICE_UPDATED 3
1259
	for (i = 0; i < haystack_size; i++) {
1260 1261
		if (haystack[i] == NULL) /* previously removed. */
			continue;
1262 1263
		if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
			*index = i;
1264 1265 1266
			if (device_is_the_same(needle, haystack[i])) {
				if (device_updated(needle, haystack[i]))
					return DEVICE_UPDATED;
1267
				return DEVICE_SAME;
1268
			} else {
1269 1270 1271
				/* Keep offline devices offline */
				if (needle->volume_offline)
					return DEVICE_NOT_FOUND;
1272
				return DEVICE_CHANGED;
1273
			}
1274 1275 1276 1277 1278 1279
		}
	}
	*index = -1;
	return DEVICE_NOT_FOUND;
}

1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383
static void hpsa_monitor_offline_device(struct ctlr_info *h,
					unsigned char scsi3addr[])
{
	struct offline_device_entry *device;
	unsigned long flags;

	/* Check to see if device is already on the list */
	spin_lock_irqsave(&h->offline_device_lock, flags);
	list_for_each_entry(device, &h->offline_device_list, offline_list) {
		if (memcmp(device->scsi3addr, scsi3addr,
			sizeof(device->scsi3addr)) == 0) {
			spin_unlock_irqrestore(&h->offline_device_lock, flags);
			return;
		}
	}
	spin_unlock_irqrestore(&h->offline_device_lock, flags);

	/* Device is not on the list, add it. */
	device = kmalloc(sizeof(*device), GFP_KERNEL);
	if (!device) {
		dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
		return;
	}
	memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
	spin_lock_irqsave(&h->offline_device_lock, flags);
	list_add_tail(&device->offline_list, &h->offline_device_list);
	spin_unlock_irqrestore(&h->offline_device_lock, flags);
}

/* Print a message explaining various offline volume states */
static void hpsa_show_volume_status(struct ctlr_info *h,
	struct hpsa_scsi_dev_t *sd)
{
	if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
	switch (sd->volume_offline) {
	case HPSA_LV_OK:
		break;
	case HPSA_LV_UNDERGOING_ERASE:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_UNDERGOING_RPI:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is undergoing rapid parity initialization process.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_PENDING_RPI:
		dev_info(&h->pdev->dev,
				"C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
				h->scsi_host->host_no,
				sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_ENCRYPTED_NO_KEY:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_UNDERGOING_ENCRYPTION:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_PENDING_ENCRYPTION:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	}
}

1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435
/*
 * Figure the list of physical drive pointers for a logical drive with
 * raid offload configured.
 */
static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
				struct hpsa_scsi_dev_t *dev[], int ndevices,
				struct hpsa_scsi_dev_t *logical_drive)
{
	struct raid_map_data *map = &logical_drive->raid_map;
	struct raid_map_disk_data *dd = &map->data[0];
	int i, j;
	int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
				le16_to_cpu(map->metadata_disks_per_row);
	int nraid_map_entries = le16_to_cpu(map->row_cnt) *
				le16_to_cpu(map->layout_map_count) *
				total_disks_per_row;
	int nphys_disk = le16_to_cpu(map->layout_map_count) *
				total_disks_per_row;
	int qdepth;

	if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
		nraid_map_entries = RAID_MAP_MAX_ENTRIES;

	qdepth = 0;
	for (i = 0; i < nraid_map_entries; i++) {
		logical_drive->phys_disk[i] = NULL;
		if (!logical_drive->offload_config)
			continue;
		for (j = 0; j < ndevices; j++) {
			if (dev[j]->devtype != TYPE_DISK)
				continue;
			if (is_logical_dev_addr_mode(dev[j]->scsi3addr))
				continue;
			if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
				continue;

			logical_drive->phys_disk[i] = dev[j];
			if (i < nphys_disk)
				qdepth = min(h->nr_cmds, qdepth +
				    logical_drive->phys_disk[i]->queue_depth);
			break;
		}

		/*
		 * This can happen if a physical drive is removed and
		 * the logical drive is degraded.  In that case, the RAID
		 * map data will refer to a physical disk which isn't actually
		 * present.  And in that case offload_enabled should already
		 * be 0, but we'll turn it off here just in case
		 */
		if (!logical_drive->phys_disk[i]) {
			logical_drive->offload_enabled = 0;
1436 1437
			logical_drive->offload_to_be_enabled = 0;
			logical_drive->queue_depth = 8;
1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459
		}
	}
	if (nraid_map_entries)
		/*
		 * This is correct for reads, too high for full stripe writes,
		 * way too high for partial stripe writes
		 */
		logical_drive->queue_depth = qdepth;
	else
		logical_drive->queue_depth = h->nr_cmds;
}

static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
				struct hpsa_scsi_dev_t *dev[], int ndevices)
{
	int i;

	for (i = 0; i < ndevices; i++) {
		if (dev[i]->devtype != TYPE_DISK)
			continue;
		if (!is_logical_dev_addr_mode(dev[i]->scsi3addr))
			continue;
1460 1461 1462 1463 1464 1465 1466 1467 1468 1469

		/*
		 * If offload is currently enabled, the RAID map and
		 * phys_disk[] assignment *better* not be changing
		 * and since it isn't changing, we do not need to
		 * update it.
		 */
		if (dev[i]->offload_enabled)
			continue;

1470 1471 1472 1473
		hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
	}
}

1474
static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487
	struct hpsa_scsi_dev_t *sd[], int nsds)
{
	/* sd contains scsi3 addresses and devtypes, and inquiry
	 * data.  This function takes what's in sd to be the current
	 * reality and updates h->dev[] to reflect that reality.
	 */
	int i, entry, device_change, changes = 0;
	struct hpsa_scsi_dev_t *csd;
	unsigned long flags;
	struct hpsa_scsi_dev_t **added, **removed;
	int nadded, nremoved;
	struct Scsi_Host *sh = NULL;

1488 1489
	added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
	removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502

	if (!added || !removed) {
		dev_warn(&h->pdev->dev, "out of memory in "
			"adjust_hpsa_scsi_table\n");
		goto free_and_out;
	}

	spin_lock_irqsave(&h->devlock, flags);

	/* find any devices in h->dev[] that are not in
	 * sd[] and remove them from h->dev[], and for any
	 * devices which have changed, remove the old device
	 * info and add the new device info.
1503 1504
	 * If minor device attributes change, just update
	 * the existing device structure.
1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518
	 */
	i = 0;
	nremoved = 0;
	nadded = 0;
	while (i < h->ndevices) {
		csd = h->dev[i];
		device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
		if (device_change == DEVICE_NOT_FOUND) {
			changes++;
			hpsa_scsi_remove_entry(h, hostno, i,
				removed, &nremoved);
			continue; /* remove ^^^, hence i not incremented */
		} else if (device_change == DEVICE_CHANGED) {
			changes++;
1519 1520
			hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
				added, &nadded, removed, &nremoved);
1521 1522 1523 1524
			/* Set it to NULL to prevent it from being freed
			 * at the bottom of hpsa_update_scsi_devices()
			 */
			sd[entry] = NULL;
1525 1526
		} else if (device_change == DEVICE_UPDATED) {
			hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537
		}
		i++;
	}

	/* Now, make sure every device listed in sd[] is also
	 * listed in h->dev[], adding them if they aren't found
	 */

	for (i = 0; i < nsds; i++) {
		if (!sd[i]) /* if already added above. */
			continue;
1538 1539 1540 1541 1542 1543 1544 1545

		/* Don't add devices which are NOT READY, FORMAT IN PROGRESS
		 * as the SCSI mid-layer does not handle such devices well.
		 * It relentlessly loops sending TUR at 3Hz, then READ(10)
		 * at 160Hz, and prevents the system from coming up.
		 */
		if (sd[i]->volume_offline) {
			hpsa_show_volume_status(h, sd[i]);
1546
			hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1547 1548 1549
			continue;
		}

1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565
		device_change = hpsa_scsi_find_entry(sd[i], h->dev,
					h->ndevices, &entry);
		if (device_change == DEVICE_NOT_FOUND) {
			changes++;
			if (hpsa_scsi_add_entry(h, hostno, sd[i],
				added, &nadded) != 0)
				break;
			sd[i] = NULL; /* prevent from being freed later. */
		} else if (device_change == DEVICE_CHANGED) {
			/* should never happen... */
			changes++;
			dev_warn(&h->pdev->dev,
				"device unexpectedly changed.\n");
			/* but if it does happen, we just ignore that device */
		}
	}
1566 1567 1568 1569 1570 1571 1572 1573
	hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);

	/* Now that h->dev[]->phys_disk[] is coherent, we can enable
	 * any logical drives that need it enabled.
	 */
	for (i = 0; i < h->ndevices; i++)
		h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;

1574 1575
	spin_unlock_irqrestore(&h->devlock, flags);

1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586
	/* Monitor devices which are in one of several NOT READY states to be
	 * brought online later. This must be done without holding h->devlock,
	 * so don't touch h->dev[]
	 */
	for (i = 0; i < nsds; i++) {
		if (!sd[i]) /* if already added above. */
			continue;
		if (sd[i]->volume_offline)
			hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
	}

1587 1588 1589 1590 1591 1592 1593 1594 1595 1596
	/* Don't notify scsi mid layer of any changes the first time through
	 * (or if there are no changes) scsi_scan_host will do it later the
	 * first time through.
	 */
	if (hostno == -1 || !changes)
		goto free_and_out;

	sh = h->scsi_host;
	/* Notify scsi mid layer of any removed devices */
	for (i = 0; i < nremoved; i++) {
1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609
		if (removed[i]->expose_state & HPSA_SCSI_ADD) {
			struct scsi_device *sdev =
				scsi_device_lookup(sh, removed[i]->bus,
					removed[i]->target, removed[i]->lun);
			if (sdev != NULL) {
				scsi_remove_device(sdev);
				scsi_device_put(sdev);
			} else {
				/*
				 * We don't expect to get here.
				 * future cmds to this device will get selection
				 * timeout as if the device was gone.
				 */
1610 1611
				hpsa_show_dev_msg(KERN_WARNING, h, removed[i],
					"didn't find device for removal.");
1612
			}
1613 1614 1615 1616 1617 1618 1619
		}
		kfree(removed[i]);
		removed[i] = NULL;
	}

	/* Notify scsi mid layer of any added devices */
	for (i = 0; i < nadded; i++) {
1620 1621
		if (!(added[i]->expose_state & HPSA_SCSI_ADD))
			continue;
1622 1623 1624
		if (scsi_add_device(sh, added[i]->bus,
			added[i]->target, added[i]->lun) == 0)
			continue;
1625 1626
		hpsa_show_dev_msg(KERN_WARNING, h, added[i],
					"addition failed, device not added.");
1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638
		/* now we have to remove it from h->dev,
		 * since it didn't get added to scsi mid layer
		 */
		fixup_botched_add(h, added[i]);
	}

free_and_out:
	kfree(added);
	kfree(removed);
}

/*
1639
 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665
 * Assume's h->devlock is held.
 */
static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
	int bus, int target, int lun)
{
	int i;
	struct hpsa_scsi_dev_t *sd;

	for (i = 0; i < h->ndevices; i++) {
		sd = h->dev[i];
		if (sd->bus == bus && sd->target == target && sd->lun == lun)
			return sd;
	}
	return NULL;
}

static int hpsa_slave_alloc(struct scsi_device *sdev)
{
	struct hpsa_scsi_dev_t *sd;
	unsigned long flags;
	struct ctlr_info *h;

	h = sdev_to_hba(sdev);
	spin_lock_irqsave(&h->devlock, flags);
	sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
		sdev_id(sdev), sdev->lun);
1666
	if (likely(sd)) {
1667
		atomic_set(&sd->ioaccel_cmds_out, 0);
1668 1669 1670
		sdev->hostdata = (sd->expose_state & HPSA_SCSI_ADD) ? sd : NULL;
	} else
		sdev->hostdata = NULL;
1671 1672 1673 1674
	spin_unlock_irqrestore(&h->devlock, flags);
	return 0;
}

1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694
/* configure scsi device based on internal per-device structure */
static int hpsa_slave_configure(struct scsi_device *sdev)
{
	struct hpsa_scsi_dev_t *sd;
	int queue_depth;

	sd = sdev->hostdata;
	sdev->no_uld_attach = !sd || !(sd->expose_state & HPSA_ULD_ATTACH);

	if (sd)
		queue_depth = sd->queue_depth != 0 ?
			sd->queue_depth : sdev->host->can_queue;
	else
		queue_depth = sdev->host->can_queue;

	scsi_change_queue_depth(sdev, queue_depth);

	return 0;
}

1695 1696
static void hpsa_slave_destroy(struct scsi_device *sdev)
{
1697
	/* nothing to do. */
1698 1699
}

1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722
static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
{
	int i;

	if (!h->cmd_sg_list)
		return;
	for (i = 0; i < h->nr_cmds; i++) {
		kfree(h->cmd_sg_list[i]);
		h->cmd_sg_list[i] = NULL;
	}
	kfree(h->cmd_sg_list);
	h->cmd_sg_list = NULL;
}

static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
{
	int i;

	if (h->chainsize <= 0)
		return 0;

	h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
				GFP_KERNEL);
1723 1724
	if (!h->cmd_sg_list) {
		dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
1725
		return -ENOMEM;
1726
	}
1727 1728 1729
	for (i = 0; i < h->nr_cmds; i++) {
		h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
						h->chainsize, GFP_KERNEL);
1730 1731
		if (!h->cmd_sg_list[i]) {
			dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
1732
			goto clean;
1733
		}
1734 1735 1736 1737 1738 1739 1740 1741
	}
	return 0;

clean:
	hpsa_free_sg_chain_blocks(h);
	return -ENOMEM;
}

1742
static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1743 1744 1745 1746
	struct CommandList *c)
{
	struct SGDescriptor *chain_sg, *chain_block;
	u64 temp64;
1747
	u32 chain_len;
1748 1749 1750

	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
	chain_block = h->cmd_sg_list[c->cmdindex];
1751 1752
	chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
	chain_len = sizeof(*chain_sg) *
D
Don Brace 已提交
1753
		(le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
1754 1755
	chain_sg->Len = cpu_to_le32(chain_len);
	temp64 = pci_map_single(h->pdev, chain_block, chain_len,
1756
				PCI_DMA_TODEVICE);
1757 1758
	if (dma_mapping_error(&h->pdev->dev, temp64)) {
		/* prevent subsequent unmapping */
1759
		chain_sg->Addr = cpu_to_le64(0);
1760 1761
		return -1;
	}
1762
	chain_sg->Addr = cpu_to_le64(temp64);
1763
	return 0;
1764 1765 1766 1767 1768 1769 1770
}

static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
	struct CommandList *c)
{
	struct SGDescriptor *chain_sg;

1771
	if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
1772 1773 1774
		return;

	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1775 1776
	pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
			le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
1777 1778
}

1779 1780 1781 1782 1783 1784

/* Decode the various types of errors on ioaccel2 path.
 * Return 1 for any error that should generate a RAID path retry.
 * Return 0 for errors that don't require a RAID path retry.
 */
static int handle_ioaccel_mode2_error(struct ctlr_info *h,
1785 1786 1787 1788 1789
					struct CommandList *c,
					struct scsi_cmnd *cmd,
					struct io_accel2_cmd *c2)
{
	int data_len;
1790
	int retry = 0;
1791 1792 1793 1794 1795 1796 1797 1798 1799 1800

	switch (c2->error_data.serv_response) {
	case IOACCEL2_SERV_RESPONSE_COMPLETE:
		switch (c2->error_data.status) {
		case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
			break;
		case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
			dev_warn(&h->pdev->dev,
				"%s: task complete with check condition.\n",
				"HP SSD Smart Path");
1801
			cmd->result |= SAM_STAT_CHECK_CONDITION;
1802
			if (c2->error_data.data_present !=
1803 1804 1805
					IOACCEL2_SENSE_DATA_PRESENT) {
				memset(cmd->sense_buffer, 0,
					SCSI_SENSE_BUFFERSIZE);
1806
				break;
1807
			}
1808 1809 1810 1811 1812 1813 1814 1815 1816
			/* copy the sense data */
			data_len = c2->error_data.sense_data_len;
			if (data_len > SCSI_SENSE_BUFFERSIZE)
				data_len = SCSI_SENSE_BUFFERSIZE;
			if (data_len > sizeof(c2->error_data.sense_data_buff))
				data_len =
					sizeof(c2->error_data.sense_data_buff);
			memcpy(cmd->sense_buffer,
				c2->error_data.sense_data_buff, data_len);
1817
			retry = 1;
1818 1819 1820 1821 1822
			break;
		case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
			dev_warn(&h->pdev->dev,
				"%s: task complete with BUSY status.\n",
				"HP SSD Smart Path");
1823
			retry = 1;
1824 1825 1826 1827 1828
			break;
		case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
			dev_warn(&h->pdev->dev,
				"%s: task complete with reservation conflict.\n",
				"HP SSD Smart Path");
1829
			retry = 1;
1830 1831
			break;
		case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
1832
			retry = 1;
1833 1834 1835 1836 1837
			break;
		case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
			dev_warn(&h->pdev->dev,
				"%s: task complete with aborted status.\n",
				"HP SSD Smart Path");
1838
			retry = 1;
1839 1840 1841 1842 1843
			break;
		default:
			dev_warn(&h->pdev->dev,
				"%s: task complete with unrecognized status: 0x%02x\n",
				"HP SSD Smart Path", c2->error_data.status);
1844
			retry = 1;
1845 1846 1847 1848 1849 1850 1851 1852
			break;
		}
		break;
	case IOACCEL2_SERV_RESPONSE_FAILURE:
		/* don't expect to get here. */
		dev_warn(&h->pdev->dev,
			"unexpected delivery or target failure, status = 0x%02x\n",
			c2->error_data.status);
1853
		retry = 1;
1854 1855 1856 1857 1858 1859 1860
		break;
	case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
		break;
	case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
		break;
	case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
		dev_warn(&h->pdev->dev, "task management function rejected.\n");
1861
		retry = 1;
1862 1863 1864 1865 1866 1867 1868
		break;
	case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
		dev_warn(&h->pdev->dev, "task management function invalid LUN\n");
		break;
	default:
		dev_warn(&h->pdev->dev,
			"%s: Unrecognized server response: 0x%02x\n",
1869 1870 1871
			"HP SSD Smart Path",
			c2->error_data.serv_response);
		retry = 1;
1872 1873
		break;
	}
1874 1875

	return retry;	/* retry on raid path? */
1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898
}

static void process_ioaccel2_completion(struct ctlr_info *h,
		struct CommandList *c, struct scsi_cmnd *cmd,
		struct hpsa_scsi_dev_t *dev)
{
	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];

	/* check for good status */
	if (likely(c2->error_data.serv_response == 0 &&
			c2->error_data.status == 0)) {
		cmd_free(h, c);
		cmd->scsi_done(cmd);
		return;
	}

	/* Any RAID offload error results in retry which will use
	 * the normal I/O path so the controller can handle whatever's
	 * wrong.
	 */
	if (is_logical_dev_addr_mode(dev->scsi3addr) &&
		c2->error_data.serv_response ==
			IOACCEL2_SERV_RESPONSE_FAILURE) {
1899 1900 1901 1902
		if (c2->error_data.status ==
			IOACCEL2_STATUS_SR_IOACCEL_DISABLED)
			dev->offload_enabled = 0;
		goto retry_cmd;
1903
	}
1904 1905 1906 1907

	if (handle_ioaccel_mode2_error(h, c, cmd, c2))
		goto retry_cmd;

1908 1909
	cmd_free(h, c);
	cmd->scsi_done(cmd);
1910 1911 1912 1913 1914
	return;

retry_cmd:
	INIT_WORK(&c->work, hpsa_command_resubmit_worker);
	queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
1915 1916
}

1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944
/* Returns 0 on success, < 0 otherwise. */
static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
					struct CommandList *cp)
{
	u8 tmf_status = cp->err_info->ScsiStatus;

	switch (tmf_status) {
	case CISS_TMF_COMPLETE:
		/*
		 * CISS_TMF_COMPLETE never happens, instead,
		 * ei->CommandStatus == 0 for this case.
		 */
	case CISS_TMF_SUCCESS:
		return 0;
	case CISS_TMF_INVALID_FRAME:
	case CISS_TMF_NOT_SUPPORTED:
	case CISS_TMF_FAILED:
	case CISS_TMF_WRONG_LUN:
	case CISS_TMF_OVERLAPPED_TAG:
		break;
	default:
		dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
				tmf_status);
		break;
	}
	return -tmf_status;
}

1945
static void complete_scsi_command(struct CommandList *cp)
1946 1947 1948 1949
{
	struct scsi_cmnd *cmd;
	struct ctlr_info *h;
	struct ErrorInfo *ei;
1950
	struct hpsa_scsi_dev_t *dev;
1951

1952 1953 1954
	u8 sense_key;
	u8 asc;      /* additional sense code */
	u8 ascq;     /* additional sense code qualifier */
1955
	unsigned long sense_data_size;
1956 1957

	ei = cp->err_info;
1958
	cmd = cp->scsi_cmd;
1959
	h = cp->h;
1960
	dev = cmd->device->hostdata;
1961 1962

	scsi_dma_unmap(cmd); /* undo the DMA mappings */
1963
	if ((cp->cmd_type == CMD_SCSI) &&
D
Don Brace 已提交
1964
		(le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
1965
		hpsa_unmap_sg_chain_block(h, cp);
1966 1967 1968

	cmd->result = (DID_OK << 16); 		/* host byte */
	cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */
1969

1970 1971 1972
	if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1)
		atomic_dec(&cp->phys_disk->ioaccel_cmds_out);

1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985
	/*
	 * We check for lockup status here as it may be set for
	 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
	 * fail_all_oustanding_cmds()
	 */
	if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
		/* DID_NO_CONNECT will prevent a retry */
		cmd->result = DID_NO_CONNECT << 16;
		cmd_free(h, cp);
		cmd->scsi_done(cmd);
		return;
	}

1986 1987 1988
	if (cp->cmd_type == CMD_IOACCEL2)
		return process_ioaccel2_completion(h, cp, cmd, dev);

1989 1990
	scsi_set_resid(cmd, ei->ResidualCnt);
	if (ei->CommandStatus == 0) {
1991 1992
		if (cp->cmd_type == CMD_IOACCEL1)
			atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
1993 1994 1995 1996 1997
		cmd_free(h, cp);
		cmd->scsi_done(cmd);
		return;
	}

1998 1999 2000 2001 2002
	/* For I/O accelerator commands, copy over some fields to the normal
	 * CISS header used below for error handling.
	 */
	if (cp->cmd_type == CMD_IOACCEL1) {
		struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
D
Don Brace 已提交
2003 2004 2005 2006
		cp->Header.SGList = scsi_sg_count(cmd);
		cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
		cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
			IOACCEL1_IOFLAGS_CDBLEN_MASK;
2007
		cp->Header.tag = c->tag;
2008 2009
		memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
		memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2010 2011 2012 2013 2014 2015 2016 2017

		/* Any RAID offload error results in retry which will use
		 * the normal I/O path so the controller can handle whatever's
		 * wrong.
		 */
		if (is_logical_dev_addr_mode(dev->scsi3addr)) {
			if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
				dev->offload_enabled = 0;
2018 2019 2020
			INIT_WORK(&cp->work, hpsa_command_resubmit_worker);
			queue_work_on(raw_smp_processor_id(),
					h->resubmit_wq, &cp->work);
2021 2022
			return;
		}
2023 2024
	}

2025 2026 2027 2028
	/* an error has occurred */
	switch (ei->CommandStatus) {

	case CMD_TARGET_STATUS:
2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040
		cmd->result |= ei->ScsiStatus;
		/* copy the sense data */
		if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
			sense_data_size = SCSI_SENSE_BUFFERSIZE;
		else
			sense_data_size = sizeof(ei->SenseInfo);
		if (ei->SenseLen < sense_data_size)
			sense_data_size = ei->SenseLen;
		memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
		if (ei->ScsiStatus)
			decode_sense_data(ei->SenseInfo, sense_data_size,
				&sense_key, &asc, &ascq);
2041
		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2042
			if (sense_key == ABORTED_COMMAND) {
2043
				cmd->result |= DID_SOFT_ERROR << 16;
2044 2045
				break;
			}
2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080
			break;
		}
		/* Problem was not a check condition
		 * Pass it up to the upper layers...
		 */
		if (ei->ScsiStatus) {
			dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
				"Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
				"Returning result: 0x%x\n",
				cp, ei->ScsiStatus,
				sense_key, asc, ascq,
				cmd->result);
		} else {  /* scsi status is zero??? How??? */
			dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
				"Returning no connection.\n", cp),

			/* Ordinarily, this case should never happen,
			 * but there is a bug in some released firmware
			 * revisions that allows it to happen if, for
			 * example, a 4100 backplane loses power and
			 * the tape drive is in it.  We assume that
			 * it's a fatal error of some kind because we
			 * can't show that it wasn't. We will make it
			 * look like selection timeout since that is
			 * the most common reason for this to occur,
			 * and it's severe enough.
			 */

			cmd->result = DID_NO_CONNECT << 16;
		}
		break;

	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
		break;
	case CMD_DATA_OVERRUN:
2081 2082
		dev_warn(&h->pdev->dev,
			"CDB %16phN data overrun\n", cp->Request.CDB);
2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096
		break;
	case CMD_INVALID: {
		/* print_bytes(cp, sizeof(*cp), 1, 0);
		print_cmd(cp); */
		/* We get CMD_INVALID if you address a non-existent device
		 * instead of a selection timeout (no response).  You will
		 * see this if you yank out a drive, then try to access it.
		 * This is kind of a shame because it means that any other
		 * CMD_INVALID (e.g. driver bug) will get interpreted as a
		 * missing target. */
		cmd->result = DID_NO_CONNECT << 16;
	}
		break;
	case CMD_PROTOCOL_ERR:
2097
		cmd->result = DID_ERROR << 16;
2098 2099
		dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
				cp->Request.CDB);
2100 2101 2102
		break;
	case CMD_HARDWARE_ERR:
		cmd->result = DID_ERROR << 16;
2103 2104
		dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
			cp->Request.CDB);
2105 2106 2107
		break;
	case CMD_CONNECTION_LOST:
		cmd->result = DID_ERROR << 16;
2108 2109
		dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
			cp->Request.CDB);
2110 2111 2112
		break;
	case CMD_ABORTED:
		cmd->result = DID_ABORT << 16;
2113 2114
		dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
				cp->Request.CDB, ei->ScsiStatus);
2115 2116 2117
		break;
	case CMD_ABORT_FAILED:
		cmd->result = DID_ERROR << 16;
2118 2119
		dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
			cp->Request.CDB);
2120 2121
		break;
	case CMD_UNSOLICITED_ABORT:
2122
		cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2123 2124
		dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
			cp->Request.CDB);
2125 2126 2127
		break;
	case CMD_TIMEOUT:
		cmd->result = DID_TIME_OUT << 16;
2128 2129
		dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
			cp->Request.CDB);
2130
		break;
2131 2132 2133 2134
	case CMD_UNABORTABLE:
		cmd->result = DID_ERROR << 16;
		dev_warn(&h->pdev->dev, "Command unabortable\n");
		break;
2135 2136 2137 2138
	case CMD_TMF_STATUS:
		if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
			cmd->result = DID_ERROR << 16;
		break;
2139 2140 2141 2142 2143 2144 2145 2146
	case CMD_IOACCEL_DISABLED:
		/* This only handles the direct pass-through case since RAID
		 * offload is handled above.  Just attempt a retry.
		 */
		cmd->result = DID_SOFT_ERROR << 16;
		dev_warn(&h->pdev->dev,
				"cp %p had HP SSD Smart Path error\n", cp);
		break;
2147 2148 2149 2150 2151 2152
	default:
		cmd->result = DID_ERROR << 16;
		dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
				cp, ei->CommandStatus);
	}
	cmd_free(h, cp);
2153
	cmd->scsi_done(cmd);
2154 2155 2156 2157 2158 2159 2160
}

static void hpsa_pci_unmap(struct pci_dev *pdev,
	struct CommandList *c, int sg_used, int data_direction)
{
	int i;

2161 2162 2163 2164
	for (i = 0; i < sg_used; i++)
		pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
				le32_to_cpu(c->SG[i].Len),
				data_direction);
2165 2166
}

2167
static int hpsa_map_one(struct pci_dev *pdev,
2168 2169 2170 2171 2172
		struct CommandList *cp,
		unsigned char *buf,
		size_t buflen,
		int data_direction)
{
2173
	u64 addr64;
2174 2175 2176

	if (buflen == 0 || data_direction == PCI_DMA_NONE) {
		cp->Header.SGList = 0;
2177
		cp->Header.SGTotal = cpu_to_le16(0);
2178
		return 0;
2179 2180
	}

2181
	addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2182
	if (dma_mapping_error(&pdev->dev, addr64)) {
2183
		/* Prevent subsequent unmap of something never mapped */
2184
		cp->Header.SGList = 0;
2185
		cp->Header.SGTotal = cpu_to_le16(0);
2186
		return -1;
2187
	}
2188 2189 2190 2191 2192
	cp->SG[0].Addr = cpu_to_le64(addr64);
	cp->SG[0].Len = cpu_to_le32(buflen);
	cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
	cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
	cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2193
	return 0;
2194 2195
}

2196 2197 2198 2199
#define NO_TIMEOUT ((unsigned long) -1)
#define DEFAULT_TIMEOUT 30000 /* milliseconds */
static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
	struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2200 2201 2202 2203
{
	DECLARE_COMPLETION_ONSTACK(wait);

	c->waiting = &wait;
2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225
	__enqueue_cmd_and_start_io(h, c, reply_queue);
	if (timeout_msecs == NO_TIMEOUT) {
		/* TODO: get rid of this no-timeout thing */
		wait_for_completion_io(&wait);
		return IO_OK;
	}
	if (!wait_for_completion_io_timeout(&wait,
					msecs_to_jiffies(timeout_msecs))) {
		dev_warn(&h->pdev->dev, "Command timed out.\n");
		return -ETIMEDOUT;
	}
	return IO_OK;
}

static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
				   int reply_queue, unsigned long timeout_msecs)
{
	if (unlikely(lockup_detected(h))) {
		c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
		return IO_OK;
	}
	return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2226 2227
}

2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239
static u32 lockup_detected(struct ctlr_info *h)
{
	int cpu;
	u32 rc, *lockup_detected;

	cpu = get_cpu();
	lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
	rc = *lockup_detected;
	put_cpu();
	return rc;
}

2240
#define MAX_DRIVER_CMD_RETRIES 25
2241 2242
static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
	struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2243
{
2244
	int backoff_time = 10, retry_count = 0;
2245
	int rc;
2246 2247

	do {
2248
		memset(c->err_info, 0, sizeof(*c->err_info));
2249 2250 2251 2252
		rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
						  timeout_msecs);
		if (rc)
			break;
2253
		retry_count++;
2254 2255 2256 2257 2258
		if (retry_count > 3) {
			msleep(backoff_time);
			if (backoff_time < 1000)
				backoff_time *= 2;
		}
2259
	} while ((check_for_unit_attention(h, c) ||
2260 2261
			check_for_busy(h, c)) &&
			retry_count <= MAX_DRIVER_CMD_RETRIES);
2262
	hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2263 2264 2265
	if (retry_count > MAX_DRIVER_CMD_RETRIES)
		rc = -EIO;
	return rc;
2266 2267
}

2268 2269
static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
				struct CommandList *c)
2270
{
2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281 2282 2283 2284 2285 2286 2287
	const u8 *cdb = c->Request.CDB;
	const u8 *lun = c->Header.LUN.LunAddrBytes;

	dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
	" CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
		txt, lun[0], lun[1], lun[2], lun[3],
		lun[4], lun[5], lun[6], lun[7],
		cdb[0], cdb[1], cdb[2], cdb[3],
		cdb[4], cdb[5], cdb[6], cdb[7],
		cdb[8], cdb[9], cdb[10], cdb[11],
		cdb[12], cdb[13], cdb[14], cdb[15]);
}

static void hpsa_scsi_interpret_error(struct ctlr_info *h,
			struct CommandList *cp)
{
	const struct ErrorInfo *ei = cp->err_info;
2288
	struct device *d = &cp->h->pdev->dev;
2289 2290
	u8 sense_key, asc, ascq;
	int sense_len;
2291 2292 2293

	switch (ei->CommandStatus) {
	case CMD_TARGET_STATUS:
2294 2295 2296 2297 2298 2299
		if (ei->SenseLen > sizeof(ei->SenseInfo))
			sense_len = sizeof(ei->SenseInfo);
		else
			sense_len = ei->SenseLen;
		decode_sense_data(ei->SenseInfo, sense_len,
					&sense_key, &asc, &ascq);
2300 2301
		hpsa_print_cmd(h, "SCSI status", cp);
		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2302 2303
			dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
				sense_key, asc, ascq);
2304
		else
2305
			dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2306 2307 2308 2309 2310 2311 2312 2313 2314
		if (ei->ScsiStatus == 0)
			dev_warn(d, "SCSI status is abnormally zero.  "
			"(probably indicates selection timeout "
			"reported incorrectly due to a known "
			"firmware bug, circa July, 2001.)\n");
		break;
	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
		break;
	case CMD_DATA_OVERRUN:
2315
		hpsa_print_cmd(h, "overrun condition", cp);
2316 2317 2318 2319 2320
		break;
	case CMD_INVALID: {
		/* controller unfortunately reports SCSI passthru's
		 * to non-existent targets as invalid commands.
		 */
2321 2322
		hpsa_print_cmd(h, "invalid command", cp);
		dev_warn(d, "probably means device no longer present\n");
2323 2324 2325
		}
		break;
	case CMD_PROTOCOL_ERR:
2326
		hpsa_print_cmd(h, "protocol error", cp);
2327 2328
		break;
	case CMD_HARDWARE_ERR:
2329
		hpsa_print_cmd(h, "hardware error", cp);
2330 2331
		break;
	case CMD_CONNECTION_LOST:
2332
		hpsa_print_cmd(h, "connection lost", cp);
2333 2334
		break;
	case CMD_ABORTED:
2335
		hpsa_print_cmd(h, "aborted", cp);
2336 2337
		break;
	case CMD_ABORT_FAILED:
2338
		hpsa_print_cmd(h, "abort failed", cp);
2339 2340
		break;
	case CMD_UNSOLICITED_ABORT:
2341
		hpsa_print_cmd(h, "unsolicited abort", cp);
2342 2343
		break;
	case CMD_TIMEOUT:
2344
		hpsa_print_cmd(h, "timed out", cp);
2345
		break;
2346
	case CMD_UNABORTABLE:
2347
		hpsa_print_cmd(h, "unabortable", cp);
2348
		break;
2349 2350 2351
	case CMD_CTLR_LOCKUP:
		hpsa_print_cmd(h, "controller lockup detected", cp);
		break;
2352
	default:
2353 2354
		hpsa_print_cmd(h, "unknown status", cp);
		dev_warn(d, "Unknown command status %x\n",
2355 2356 2357 2358 2359
				ei->CommandStatus);
	}
}

static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2360
			u16 page, unsigned char *buf,
2361 2362 2363 2364 2365 2366
			unsigned char bufsize)
{
	int rc = IO_OK;
	struct CommandList *c;
	struct ErrorInfo *ei;

2367
	c = cmd_alloc(h);
2368

2369
	if (c == NULL) {
2370
		dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2371
		return -ENOMEM;
2372 2373
	}

2374 2375 2376 2377 2378
	if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
			page, scsi3addr, TYPE_CMD)) {
		rc = -1;
		goto out;
	}
2379 2380 2381 2382
	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
					PCI_DMA_FROMDEVICE, NO_TIMEOUT);
	if (rc)
		goto out;
2383 2384
	ei = c->err_info;
	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2385
		hpsa_scsi_interpret_error(h, c);
2386 2387
		rc = -1;
	}
2388
out:
2389
	cmd_free(h, c);
2390 2391 2392
	return rc;
}

2393 2394 2395 2396 2397 2398 2399 2400
static int hpsa_bmic_ctrl_mode_sense(struct ctlr_info *h,
		unsigned char *scsi3addr, unsigned char page,
		struct bmic_controller_parameters *buf, size_t bufsize)
{
	int rc = IO_OK;
	struct CommandList *c;
	struct ErrorInfo *ei;

2401
	c = cmd_alloc(h);
2402
	if (c == NULL) {			/* trouble... */
2403
		dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2404 2405 2406 2407 2408 2409 2410 2411
		return -ENOMEM;
	}

	if (fill_cmd(c, BMIC_SENSE_CONTROLLER_PARAMETERS, h, buf, bufsize,
			page, scsi3addr, TYPE_CMD)) {
		rc = -1;
		goto out;
	}
2412 2413 2414 2415
	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
			PCI_DMA_FROMDEVICE, NO_TIMEOUT);
	if (rc)
		goto out;
2416 2417 2418 2419 2420 2421
	ei = c->err_info;
	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
		hpsa_scsi_interpret_error(h, c);
		rc = -1;
	}
out:
2422
	cmd_free(h, c);
2423 2424 2425
	return rc;
	}

2426
static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2427
	u8 reset_type, int reply_queue)
2428 2429 2430 2431 2432
{
	int rc = IO_OK;
	struct CommandList *c;
	struct ErrorInfo *ei;

2433
	c = cmd_alloc(h);
2434 2435

	if (c == NULL) {			/* trouble... */
2436
		dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2437
		return -ENOMEM;
2438 2439
	}

2440
	/* fill_cmd can't fail here, no data buffer to map. */
2441 2442 2443
	(void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
			scsi3addr, TYPE_MSG);
	c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2444 2445 2446 2447 2448
	rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
	if (rc) {
		dev_warn(&h->pdev->dev, "Failed to send reset command\n");
		goto out;
	}
2449 2450 2451 2452
	/* no unmap needed here because no data xfer. */

	ei = c->err_info;
	if (ei->CommandStatus != 0) {
2453
		hpsa_scsi_interpret_error(h, c);
2454 2455
		rc = -1;
	}
2456
out:
2457
	cmd_free(h, c);
2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470
	return rc;
}

static void hpsa_get_raid_level(struct ctlr_info *h,
	unsigned char *scsi3addr, unsigned char *raid_level)
{
	int rc;
	unsigned char *buf;

	*raid_level = RAID_UNKNOWN;
	buf = kzalloc(64, GFP_KERNEL);
	if (!buf)
		return;
2471
	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2472 2473 2474 2475 2476 2477 2478 2479
	if (rc == 0)
		*raid_level = buf[8];
	if (*raid_level > RAID_UNKNOWN)
		*raid_level = RAID_UNKNOWN;
	kfree(buf);
	return;
}

2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491
#define HPSA_MAP_DEBUG
#ifdef HPSA_MAP_DEBUG
static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
				struct raid_map_data *map_buff)
{
	struct raid_map_disk_data *dd = &map_buff->data[0];
	int map, row, col;
	u16 map_cnt, row_cnt, disks_per_row;

	if (rc != 0)
		return;

2492 2493 2494 2495
	/* Show details only if debugging has been activated. */
	if (h->raid_offload_debug < 2)
		return;

2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519
	dev_info(&h->pdev->dev, "structure_size = %u\n",
				le32_to_cpu(map_buff->structure_size));
	dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
			le32_to_cpu(map_buff->volume_blk_size));
	dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
			le64_to_cpu(map_buff->volume_blk_cnt));
	dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
			map_buff->phys_blk_shift);
	dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
			map_buff->parity_rotation_shift);
	dev_info(&h->pdev->dev, "strip_size = %u\n",
			le16_to_cpu(map_buff->strip_size));
	dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
			le64_to_cpu(map_buff->disk_starting_blk));
	dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
			le64_to_cpu(map_buff->disk_blk_cnt));
	dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
			le16_to_cpu(map_buff->data_disks_per_row));
	dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
			le16_to_cpu(map_buff->metadata_disks_per_row));
	dev_info(&h->pdev->dev, "row_cnt = %u\n",
			le16_to_cpu(map_buff->row_cnt));
	dev_info(&h->pdev->dev, "layout_map_count = %u\n",
			le16_to_cpu(map_buff->layout_map_count));
D
Don Brace 已提交
2520
	dev_info(&h->pdev->dev, "flags = 0x%x\n",
2521
			le16_to_cpu(map_buff->flags));
D
Don Brace 已提交
2522 2523 2524
	dev_info(&h->pdev->dev, "encrypytion = %s\n",
			le16_to_cpu(map_buff->flags) &
			RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
2525 2526
	dev_info(&h->pdev->dev, "dekindex = %u\n",
			le16_to_cpu(map_buff->dekindex));
2527 2528 2529 2530 2531 2532 2533 2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564
	map_cnt = le16_to_cpu(map_buff->layout_map_count);
	for (map = 0; map < map_cnt; map++) {
		dev_info(&h->pdev->dev, "Map%u:\n", map);
		row_cnt = le16_to_cpu(map_buff->row_cnt);
		for (row = 0; row < row_cnt; row++) {
			dev_info(&h->pdev->dev, "  Row%u:\n", row);
			disks_per_row =
				le16_to_cpu(map_buff->data_disks_per_row);
			for (col = 0; col < disks_per_row; col++, dd++)
				dev_info(&h->pdev->dev,
					"    D%02u: h=0x%04x xor=%u,%u\n",
					col, dd->ioaccel_handle,
					dd->xor_mult[0], dd->xor_mult[1]);
			disks_per_row =
				le16_to_cpu(map_buff->metadata_disks_per_row);
			for (col = 0; col < disks_per_row; col++, dd++)
				dev_info(&h->pdev->dev,
					"    M%02u: h=0x%04x xor=%u,%u\n",
					col, dd->ioaccel_handle,
					dd->xor_mult[0], dd->xor_mult[1]);
		}
	}
}
#else
static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
			__attribute__((unused)) int rc,
			__attribute__((unused)) struct raid_map_data *map_buff)
{
}
#endif

static int hpsa_get_raid_map(struct ctlr_info *h,
	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
{
	int rc = 0;
	struct CommandList *c;
	struct ErrorInfo *ei;

2565
	c = cmd_alloc(h);
2566
	if (c == NULL) {
2567
		dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2568 2569 2570 2571 2572 2573
		return -ENOMEM;
	}
	if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
			sizeof(this_device->raid_map), 0,
			scsi3addr, TYPE_CMD)) {
		dev_warn(&h->pdev->dev, "Out of memory in hpsa_get_raid_map()\n");
2574 2575
		rc = -ENOMEM;
		goto out;
2576
	}
2577 2578 2579 2580
	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
					PCI_DMA_FROMDEVICE, NO_TIMEOUT);
	if (rc)
		goto out;
2581 2582
	ei = c->err_info;
	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2583
		hpsa_scsi_interpret_error(h, c);
2584 2585
		rc = -1;
		goto out;
2586
	}
2587
	cmd_free(h, c);
2588 2589 2590 2591 2592 2593 2594 2595 2596

	/* @todo in the future, dynamically allocate RAID map memory */
	if (le32_to_cpu(this_device->raid_map.structure_size) >
				sizeof(this_device->raid_map)) {
		dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
		rc = -1;
	}
	hpsa_debug_map_buff(h, rc, &this_device->raid_map);
	return rc;
2597 2598 2599
out:
	cmd_free(h, c);
	return rc;
2600 2601
}

2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618
static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
		unsigned char scsi3addr[], u16 bmic_device_index,
		struct bmic_identify_physical_device *buf, size_t bufsize)
{
	int rc = IO_OK;
	struct CommandList *c;
	struct ErrorInfo *ei;

	c = cmd_alloc(h);
	rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
		0, RAID_CTLR_LUNID, TYPE_CMD);
	if (rc)
		goto out;

	c->Request.CDB[2] = bmic_device_index & 0xff;
	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;

2619 2620
	hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
						NO_TIMEOUT);
2621 2622 2623 2624 2625 2626 2627 2628 2629 2630
	ei = c->err_info;
	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
		hpsa_scsi_interpret_error(h, c);
		rc = -1;
	}
out:
	cmd_free(h, c);
	return rc;
}

2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655 2656 2657 2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668 2669 2670 2671 2672 2673
static int hpsa_vpd_page_supported(struct ctlr_info *h,
	unsigned char scsi3addr[], u8 page)
{
	int rc;
	int i;
	int pages;
	unsigned char *buf, bufsize;

	buf = kzalloc(256, GFP_KERNEL);
	if (!buf)
		return 0;

	/* Get the size of the page list first */
	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
				buf, HPSA_VPD_HEADER_SZ);
	if (rc != 0)
		goto exit_unsupported;
	pages = buf[3];
	if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
		bufsize = pages + HPSA_VPD_HEADER_SZ;
	else
		bufsize = 255;

	/* Get the whole VPD page list */
	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
				buf, bufsize);
	if (rc != 0)
		goto exit_unsupported;

	pages = buf[3];
	for (i = 1; i <= pages; i++)
		if (buf[3 + i] == page)
			goto exit_supported;
exit_unsupported:
	kfree(buf);
	return 0;
exit_supported:
	kfree(buf);
	return 1;
}

2674 2675 2676 2677 2678 2679 2680 2681 2682
static void hpsa_get_ioaccel_status(struct ctlr_info *h,
	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
{
	int rc;
	unsigned char *buf;
	u8 ioaccel_status;

	this_device->offload_config = 0;
	this_device->offload_enabled = 0;
2683
	this_device->offload_to_be_enabled = 0;
2684 2685 2686 2687

	buf = kzalloc(64, GFP_KERNEL);
	if (!buf)
		return;
2688 2689
	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
		goto out;
2690
	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2691
			VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706
	if (rc != 0)
		goto out;

#define IOACCEL_STATUS_BYTE 4
#define OFFLOAD_CONFIGURED_BIT 0x01
#define OFFLOAD_ENABLED_BIT 0x02
	ioaccel_status = buf[IOACCEL_STATUS_BYTE];
	this_device->offload_config =
		!!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
	if (this_device->offload_config) {
		this_device->offload_enabled =
			!!(ioaccel_status & OFFLOAD_ENABLED_BIT);
		if (hpsa_get_raid_map(h, scsi3addr, this_device))
			this_device->offload_enabled = 0;
	}
2707
	this_device->offload_to_be_enabled = this_device->offload_enabled;
2708 2709 2710 2711 2712
out:
	kfree(buf);
	return;
}

2713 2714 2715 2716 2717 2718 2719 2720 2721 2722 2723
/* Get the device id from inquiry page 0x83 */
static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
	unsigned char *device_id, int buflen)
{
	int rc;
	unsigned char *buf;

	if (buflen > 16)
		buflen = 16;
	buf = kzalloc(64, GFP_KERNEL);
	if (!buf)
2724
		return -ENOMEM;
2725
	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
2726 2727 2728 2729 2730 2731 2732
	if (rc == 0)
		memcpy(device_id, &buf[8], buflen);
	kfree(buf);
	return rc != 0;
}

static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
2733
		void *buf, int bufsize,
2734 2735 2736 2737 2738 2739 2740
		int extended_response)
{
	int rc = IO_OK;
	struct CommandList *c;
	unsigned char scsi3addr[8];
	struct ErrorInfo *ei;

2741
	c = cmd_alloc(h);
2742
	if (c == NULL) {			/* trouble... */
2743
		dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2744 2745
		return -1;
	}
2746 2747
	/* address the controller */
	memset(scsi3addr, 0, sizeof(scsi3addr));
2748 2749 2750 2751 2752
	if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
		buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
		rc = -1;
		goto out;
	}
2753 2754
	if (extended_response)
		c->Request.CDB[1] = extended_response;
2755 2756 2757 2758
	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
					PCI_DMA_FROMDEVICE, NO_TIMEOUT);
	if (rc)
		goto out;
2759 2760 2761
	ei = c->err_info;
	if (ei->CommandStatus != 0 &&
	    ei->CommandStatus != CMD_DATA_UNDERRUN) {
2762
		hpsa_scsi_interpret_error(h, c);
2763
		rc = -1;
2764
	} else {
2765 2766 2767
		struct ReportLUNdata *rld = buf;

		if (rld->extended_response_flag != extended_response) {
2768 2769 2770
			dev_err(&h->pdev->dev,
				"report luns requested format %u, got %u\n",
				extended_response,
2771
				rld->extended_response_flag);
2772 2773
			rc = -1;
		}
2774
	}
2775
out:
2776
	cmd_free(h, c);
2777 2778 2779 2780
	return rc;
}

static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
2781
		struct ReportExtendedLUNdata *buf, int bufsize)
2782
{
2783 2784
	return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
						HPSA_REPORT_PHYS_EXTENDED);
2785 2786 2787 2788 2789 2790 2791 2792 2793 2794 2795 2796 2797 2798 2799 2800
}

static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
		struct ReportLUNdata *buf, int bufsize)
{
	return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
}

static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
	int bus, int target, int lun)
{
	device->bus = bus;
	device->target = target;
	device->lun = lun;
}

2801 2802 2803 2804 2805 2806 2807 2808 2809 2810 2811 2812 2813 2814
/* Use VPD inquiry to get details of volume status */
static int hpsa_get_volume_status(struct ctlr_info *h,
					unsigned char scsi3addr[])
{
	int rc;
	int status;
	int size;
	unsigned char *buf;

	buf = kzalloc(64, GFP_KERNEL);
	if (!buf)
		return HPSA_VPD_LV_STATUS_UNSUPPORTED;

	/* Does controller have VPD for logical volume status? */
2815
	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
2816 2817 2818 2819 2820
		goto exit_failed;

	/* Get the size of the VPD return buffer */
	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
					buf, HPSA_VPD_HEADER_SZ);
2821
	if (rc != 0)
2822 2823 2824 2825 2826 2827
		goto exit_failed;
	size = buf[3];

	/* Now get the whole VPD buffer */
	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
					buf, size + HPSA_VPD_HEADER_SZ);
2828
	if (rc != 0)
2829 2830 2831 2832 2833 2834 2835 2836 2837 2838 2839 2840 2841
		goto exit_failed;
	status = buf[4]; /* status byte */

	kfree(buf);
	return status;
exit_failed:
	kfree(buf);
	return HPSA_VPD_LV_STATUS_UNSUPPORTED;
}

/* Determine offline status of a volume.
 * Return either:
 *  0 (not offline)
2842
 *  0xff (offline for unknown reasons)
2843 2844 2845
 *  # (integer code indicating one of several NOT READY states
 *     describing why a volume is to be kept offline)
 */
2846
static int hpsa_volume_offline(struct ctlr_info *h,
2847 2848 2849
					unsigned char scsi3addr[])
{
	struct CommandList *c;
2850 2851 2852
	unsigned char *sense;
	u8 sense_key, asc, ascq;
	int sense_len;
2853
	int rc, ldstat = 0;
2854 2855 2856 2857 2858 2859 2860 2861 2862 2863
	u16 cmd_status;
	u8 scsi_status;
#define ASC_LUN_NOT_READY 0x04
#define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
#define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02

	c = cmd_alloc(h);
	if (!c)
		return 0;
	(void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
2864 2865 2866 2867 2868
	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
	if (rc) {
		cmd_free(h, c);
		return 0;
	}
2869
	sense = c->err_info->SenseInfo;
2870 2871 2872 2873 2874
	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
		sense_len = sizeof(c->err_info->SenseInfo);
	else
		sense_len = c->err_info->SenseLen;
	decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
2875 2876 2877 2878 2879 2880 2881 2882 2883 2884 2885 2886 2887 2888 2889 2890 2891 2892 2893 2894 2895 2896 2897 2898 2899 2900 2901 2902 2903 2904 2905 2906 2907 2908 2909 2910 2911 2912 2913
	cmd_status = c->err_info->CommandStatus;
	scsi_status = c->err_info->ScsiStatus;
	cmd_free(h, c);
	/* Is the volume 'not ready'? */
	if (cmd_status != CMD_TARGET_STATUS ||
		scsi_status != SAM_STAT_CHECK_CONDITION ||
		sense_key != NOT_READY ||
		asc != ASC_LUN_NOT_READY)  {
		return 0;
	}

	/* Determine the reason for not ready state */
	ldstat = hpsa_get_volume_status(h, scsi3addr);

	/* Keep volume offline in certain cases: */
	switch (ldstat) {
	case HPSA_LV_UNDERGOING_ERASE:
	case HPSA_LV_UNDERGOING_RPI:
	case HPSA_LV_PENDING_RPI:
	case HPSA_LV_ENCRYPTED_NO_KEY:
	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
	case HPSA_LV_UNDERGOING_ENCRYPTION:
	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
		return ldstat;
	case HPSA_VPD_LV_STATUS_UNSUPPORTED:
		/* If VPD status page isn't available,
		 * use ASC/ASCQ to determine state
		 */
		if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
			(ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
			return ldstat;
		break;
	default:
		break;
	}
	return 0;
}

S
Stephen Cameron 已提交
2914 2915 2916 2917 2918 2919 2920 2921 2922 2923 2924 2925 2926 2927 2928 2929 2930 2931 2932 2933 2934 2935 2936 2937 2938 2939 2940 2941 2942 2943 2944 2945 2946 2947 2948 2949
/*
 * Find out if a logical device supports aborts by simply trying one.
 * Smart Array may claim not to support aborts on logical drives, but
 * if a MSA2000 * is connected, the drives on that will be presented
 * by the Smart Array as logical drives, and aborts may be sent to
 * those devices successfully.  So the simplest way to find out is
 * to simply try an abort and see how the device responds.
 */
static int hpsa_device_supports_aborts(struct ctlr_info *h,
					unsigned char *scsi3addr)
{
	struct CommandList *c;
	struct ErrorInfo *ei;
	int rc = 0;

	u64 tag = (u64) -1; /* bogus tag */

	/* Assume that physical devices support aborts */
	if (!is_logical_dev_addr_mode(scsi3addr))
		return 1;

	c = cmd_alloc(h);
	if (!c)
		return -ENOMEM;
	(void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
	(void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
	/* no unmap needed here because no data xfer. */
	ei = c->err_info;
	switch (ei->CommandStatus) {
	case CMD_INVALID:
		rc = 0;
		break;
	case CMD_UNABORTABLE:
	case CMD_ABORT_FAILED:
		rc = 1;
		break;
2950 2951 2952
	case CMD_TMF_STATUS:
		rc = hpsa_evaluate_tmf_status(h, c);
		break;
S
Stephen Cameron 已提交
2953 2954 2955 2956 2957 2958 2959 2960
	default:
		rc = 0;
		break;
	}
	cmd_free(h, c);
	return rc;
}

2961
static int hpsa_update_device_info(struct ctlr_info *h,
2962 2963
	unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
	unsigned char *is_OBDR_device)
2964
{
2965 2966 2967 2968 2969 2970

#define OBDR_SIG_OFFSET 43
#define OBDR_TAPE_SIG "$DR-10"
#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)

2971
	unsigned char *inq_buff;
2972
	unsigned char *obdr_sig;
2973

2974
	inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
2975 2976 2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995 2996 2997 2998
	if (!inq_buff)
		goto bail_out;

	/* Do an inquiry to the device to see what it is. */
	if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
		(unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
		/* Inquiry failed (msg printed already) */
		dev_err(&h->pdev->dev,
			"hpsa_update_device_info: inquiry failed\n");
		goto bail_out;
	}

	this_device->devtype = (inq_buff[0] & 0x1f);
	memcpy(this_device->scsi3addr, scsi3addr, 8);
	memcpy(this_device->vendor, &inq_buff[8],
		sizeof(this_device->vendor));
	memcpy(this_device->model, &inq_buff[16],
		sizeof(this_device->model));
	memset(this_device->device_id, 0,
		sizeof(this_device->device_id));
	hpsa_get_device_id(h, scsi3addr, this_device->device_id,
		sizeof(this_device->device_id));

	if (this_device->devtype == TYPE_DISK &&
2999
		is_logical_dev_addr_mode(scsi3addr)) {
3000 3001
		int volume_offline;

3002
		hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3003 3004
		if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
			hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3005 3006 3007 3008
		volume_offline = hpsa_volume_offline(h, scsi3addr);
		if (volume_offline < 0 || volume_offline > 0xff)
			volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
		this_device->volume_offline = volume_offline & 0xff;
3009
	} else {
3010
		this_device->raid_level = RAID_UNKNOWN;
3011 3012
		this_device->offload_config = 0;
		this_device->offload_enabled = 0;
3013
		this_device->offload_to_be_enabled = 0;
3014
		this_device->hba_ioaccel_enabled = 0;
3015
		this_device->volume_offline = 0;
3016
		this_device->queue_depth = h->nr_cmds;
3017
	}
3018

3019 3020 3021 3022 3023 3024 3025 3026 3027
	if (is_OBDR_device) {
		/* See if this is a One-Button-Disaster-Recovery device
		 * by looking for "$DR-10" at offset 43 in inquiry data.
		 */
		obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
		*is_OBDR_device = (this_device->devtype == TYPE_ROM &&
					strncmp(obdr_sig, OBDR_TAPE_SIG,
						OBDR_SIG_LEN) == 0);
	}
3028 3029 3030 3031 3032 3033 3034 3035
	kfree(inq_buff);
	return 0;

bail_out:
	kfree(inq_buff);
	return 1;
}

S
Stephen Cameron 已提交
3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060
static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
			struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
{
	unsigned long flags;
	int rc, entry;
	/*
	 * See if this device supports aborts.  If we already know
	 * the device, we already know if it supports aborts, otherwise
	 * we have to find out if it supports aborts by trying one.
	 */
	spin_lock_irqsave(&h->devlock, flags);
	rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
	if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
		entry >= 0 && entry < h->ndevices) {
		dev->supports_aborts = h->dev[entry]->supports_aborts;
		spin_unlock_irqrestore(&h->devlock, flags);
	} else {
		spin_unlock_irqrestore(&h->devlock, flags);
		dev->supports_aborts =
				hpsa_device_supports_aborts(h, scsi3addr);
		if (dev->supports_aborts < 0)
			dev->supports_aborts = 0;
	}
}

3061
static unsigned char *ext_target_model[] = {
3062 3063 3064 3065
	"MSA2012",
	"MSA2024",
	"MSA2312",
	"MSA2324",
3066
	"P2000 G3 SAS",
3067
	"MSA 2040 SAS",
3068 3069 3070
	NULL,
};

3071
static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
3072 3073 3074
{
	int i;

3075 3076 3077
	for (i = 0; ext_target_model[i]; i++)
		if (strncmp(device->model, ext_target_model[i],
			strlen(ext_target_model[i])) == 0)
3078 3079 3080 3081 3082
			return 1;
	return 0;
}

/* Helper function to assign bus, target, lun mapping of devices.
3083
 * Puts non-external target logical volumes on bus 0, external target logical
3084 3085 3086 3087 3088 3089
 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
 * Logical drive target and lun are assigned at this time, but
 * physical device lun and target assignment are deferred (assigned
 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
 */
static void figure_bus_target_lun(struct ctlr_info *h,
3090
	u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3091
{
3092 3093 3094 3095
	u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));

	if (!is_logical_dev_addr_mode(lunaddrbytes)) {
		/* physical device, target and lun filled in later */
3096
		if (is_hba_lunid(lunaddrbytes))
3097
			hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
3098
		else
3099 3100 3101 3102 3103
			/* defer target, lun assignment for physical devices */
			hpsa_set_bus_target_lun(device, 2, -1, -1);
		return;
	}
	/* It's a logical device */
3104 3105
	if (is_ext_target(h, device)) {
		/* external target way, put logicals on bus 1
3106 3107 3108 3109 3110 3111
		 * and match target/lun numbers box
		 * reports, other smart array, bus 0, target 0, match lunid
		 */
		hpsa_set_bus_target_lun(device,
			1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
		return;
3112
	}
3113
	hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
3114 3115 3116 3117
}

/*
 * If there is no lun 0 on a target, linux won't find any devices.
3118
 * For the external targets (arrays), we have to manually detect the enclosure
3119 3120 3121 3122 3123 3124 3125 3126
 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
 * it for some reason.  *tmpdevice is the target we're adding,
 * this_device is a pointer into the current element of currentsd[]
 * that we're building up in update_scsi_devices(), below.
 * lunzerobits is a bitmap that tracks which targets already have a
 * lun 0 assigned.
 * Returns 1 if an enclosure was added, 0 if not.
 */
3127
static int add_ext_target_dev(struct ctlr_info *h,
3128
	struct hpsa_scsi_dev_t *tmpdevice,
3129
	struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
3130
	unsigned long lunzerobits[], int *n_ext_target_devs)
3131 3132 3133
{
	unsigned char scsi3addr[8];

3134
	if (test_bit(tmpdevice->target, lunzerobits))
3135 3136 3137 3138 3139
		return 0; /* There is already a lun 0 on this target. */

	if (!is_logical_dev_addr_mode(lunaddrbytes))
		return 0; /* It's the logical targets that may lack lun 0. */

3140 3141
	if (!is_ext_target(h, tmpdevice))
		return 0; /* Only external target devices have this problem. */
3142

3143
	if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
3144 3145
		return 0;

3146
	memset(scsi3addr, 0, 8);
3147
	scsi3addr[3] = tmpdevice->target;
3148 3149 3150
	if (is_hba_lunid(scsi3addr))
		return 0; /* Don't add the RAID controller here. */

3151 3152 3153
	if (is_scsi_rev_5(h))
		return 0; /* p1210m doesn't need to do this. */

3154
	if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
3155 3156
		dev_warn(&h->pdev->dev, "Maximum number of external "
			"target devices exceeded.  Check your hardware "
3157 3158 3159 3160
			"configuration.");
		return 0;
	}

3161
	if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
3162
		return 0;
3163
	(*n_ext_target_devs)++;
3164 3165
	hpsa_set_bus_target_lun(this_device,
				tmpdevice->bus, tmpdevice->target, 0);
S
Stephen Cameron 已提交
3166
	hpsa_update_device_supports_aborts(h, this_device, scsi3addr);
3167
	set_bit(tmpdevice->target, lunzerobits);
3168 3169 3170
	return 1;
}

3171 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181
/*
 * Get address of physical disk used for an ioaccel2 mode command:
 *	1. Extract ioaccel2 handle from the command.
 *	2. Find a matching ioaccel2 handle from list of physical disks.
 *	3. Return:
 *		1 and set scsi3addr to address of matching physical
 *		0 if no matching physical disk was found.
 */
static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
	struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
{
3182 3183 3184
	struct io_accel2_cmd *c2 =
			&h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
	unsigned long flags;
3185 3186
	int i;

3187 3188 3189 3190 3191 3192 3193 3194 3195 3196
	spin_lock_irqsave(&h->devlock, flags);
	for (i = 0; i < h->ndevices; i++)
		if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
			memcpy(scsi3addr, h->dev[i]->scsi3addr,
				sizeof(h->dev[i]->scsi3addr));
			spin_unlock_irqrestore(&h->devlock, flags);
			return 1;
		}
	spin_unlock_irqrestore(&h->devlock, flags);
	return 0;
3197
}
3198

3199 3200 3201 3202 3203 3204 3205
/*
 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
 * logdev.  The number of luns in physdev and logdev are returned in
 * *nphysicals and *nlogicals, respectively.
 * Returns 0 on success, -1 otherwise.
 */
static int hpsa_gather_lun_info(struct ctlr_info *h,
3206
	struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
3207
	struct ReportLUNdata *logdev, u32 *nlogicals)
3208
{
3209
	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3210 3211 3212
		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
		return -1;
	}
3213
	*nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
3214
	if (*nphysicals > HPSA_MAX_PHYS_LUN) {
3215 3216
		dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
			HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
3217 3218
		*nphysicals = HPSA_MAX_PHYS_LUN;
	}
3219
	if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
3220 3221 3222
		dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
		return -1;
	}
3223
	*nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241
	/* Reject Logicals in excess of our max capability. */
	if (*nlogicals > HPSA_MAX_LUN) {
		dev_warn(&h->pdev->dev,
			"maximum logical LUNs (%d) exceeded.  "
			"%d LUNs ignored.\n", HPSA_MAX_LUN,
			*nlogicals - HPSA_MAX_LUN);
			*nlogicals = HPSA_MAX_LUN;
	}
	if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
		dev_warn(&h->pdev->dev,
			"maximum logical + physical LUNs (%d) exceeded. "
			"%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
			*nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
		*nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
	}
	return 0;
}

D
Don Brace 已提交
3242 3243
static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
	int i, int nphysicals, int nlogicals,
3244
	struct ReportExtendedLUNdata *physdev_list,
3245 3246 3247 3248 3249 3250 3251 3252 3253 3254 3255 3256 3257 3258
	struct ReportLUNdata *logdev_list)
{
	/* Helper function, figure out where the LUN ID info is coming from
	 * given index i, lists of physical and logical devices, where in
	 * the list the raid controller is supposed to appear (first or last)
	 */

	int logicals_start = nphysicals + (raid_ctlr_position == 0);
	int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);

	if (i == raid_ctlr_position)
		return RAID_CTLR_LUNID;

	if (i < logicals_start)
3259 3260
		return &physdev_list->LUN[i -
				(raid_ctlr_position == 0)].lunid[0];
3261 3262 3263 3264 3265 3266 3267 3268

	if (i < last_device)
		return &logdev_list->LUN[i - nphysicals -
			(raid_ctlr_position == 0)][0];
	BUG();
	return NULL;
}

3269 3270 3271
static int hpsa_hba_mode_enabled(struct ctlr_info *h)
{
	int rc;
3272
	int hba_mode_enabled;
3273 3274 3275 3276 3277
	struct bmic_controller_parameters *ctlr_params;
	ctlr_params = kzalloc(sizeof(struct bmic_controller_parameters),
		GFP_KERNEL);

	if (!ctlr_params)
3278
		return -ENOMEM;
3279 3280
	rc = hpsa_bmic_ctrl_mode_sense(h, RAID_CTLR_LUNID, 0, ctlr_params,
		sizeof(struct bmic_controller_parameters));
3281
	if (rc) {
3282
		kfree(ctlr_params);
3283
		return rc;
3284
	}
3285 3286 3287 3288 3289

	hba_mode_enabled =
		((ctlr_params->nvram_flags & HBA_MODE_ENABLED_FLAG) != 0);
	kfree(ctlr_params);
	return hba_mode_enabled;
3290 3291
}

3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302
/* get physical drive ioaccel handle and queue depth */
static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
		struct hpsa_scsi_dev_t *dev,
		u8 *lunaddrbytes,
		struct bmic_identify_physical_device *id_phys)
{
	int rc;
	struct ext_report_lun_entry *rle =
		(struct ext_report_lun_entry *) lunaddrbytes;

	dev->ioaccel_handle = rle->ioaccel_handle;
3303 3304
	if (PHYS_IOACCEL(lunaddrbytes) && dev->ioaccel_handle)
		dev->hba_ioaccel_enabled = 1;
3305 3306 3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317 3318 3319 3320
	memset(id_phys, 0, sizeof(*id_phys));
	rc = hpsa_bmic_id_physical_device(h, lunaddrbytes,
			GET_BMIC_DRIVE_NUMBER(lunaddrbytes), id_phys,
			sizeof(*id_phys));
	if (!rc)
		/* Reserve space for FW operations */
#define DRIVE_CMDS_RESERVED_FOR_FW 2
#define DRIVE_QUEUE_DEPTH 7
		dev->queue_depth =
			le16_to_cpu(id_phys->current_queue_depth_limit) -
				DRIVE_CMDS_RESERVED_FOR_FW;
	else
		dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
	atomic_set(&dev->ioaccel_cmds_out, 0);
}

3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332
static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
{
	/* the idea here is we could get notified
	 * that some devices have changed, so we do a report
	 * physical luns and report logical luns cmd, and adjust
	 * our list of devices accordingly.
	 *
	 * The scsi3addr's of devices won't change so long as the
	 * adapter is not reset.  That means we can rescan and
	 * tell which devices we already know about, vs. new
	 * devices, vs.  disappearing devices.
	 */
3333
	struct ReportExtendedLUNdata *physdev_list = NULL;
3334
	struct ReportLUNdata *logdev_list = NULL;
3335
	struct bmic_identify_physical_device *id_phys = NULL;
3336 3337 3338
	u32 nphysicals = 0;
	u32 nlogicals = 0;
	u32 ndev_allocated = 0;
3339 3340
	struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
	int ncurrent = 0;
3341
	int i, n_ext_target_devs, ndevs_to_allocate;
3342
	int raid_ctlr_position;
3343
	int rescan_hba_mode;
3344
	DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3345

3346
	currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3347 3348
	physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
	logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
3349
	tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3350
	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3351

3352 3353
	if (!currentsd || !physdev_list || !logdev_list ||
		!tmpdevice || !id_phys) {
3354 3355 3356 3357 3358
		dev_err(&h->pdev->dev, "out of memory\n");
		goto out;
	}
	memset(lunzerobits, 0, sizeof(lunzerobits));

3359
	rescan_hba_mode = hpsa_hba_mode_enabled(h);
3360 3361
	if (rescan_hba_mode < 0)
		goto out;
3362 3363 3364 3365 3366 3367 3368 3369

	if (!h->hba_mode_enabled && rescan_hba_mode)
		dev_warn(&h->pdev->dev, "HBA mode enabled\n");
	else if (h->hba_mode_enabled && !rescan_hba_mode)
		dev_warn(&h->pdev->dev, "HBA mode disabled\n");

	h->hba_mode_enabled = rescan_hba_mode;

3370 3371
	if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
			logdev_list, &nlogicals))
3372 3373
		goto out;

3374 3375 3376
	/* We might see up to the maximum number of logical and physical disks
	 * plus external target devices, and a device for the local RAID
	 * controller.
3377
	 */
3378
	ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3379 3380 3381

	/* Allocate the per device structures */
	for (i = 0; i < ndevs_to_allocate; i++) {
3382 3383 3384 3385 3386 3387 3388
		if (i >= HPSA_MAX_DEVICES) {
			dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
				"  %d devices ignored.\n", HPSA_MAX_DEVICES,
				ndevs_to_allocate - HPSA_MAX_DEVICES);
			break;
		}

3389 3390 3391 3392 3393 3394 3395 3396 3397
		currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
		if (!currentsd[i]) {
			dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
				__FILE__, __LINE__);
			goto out;
		}
		ndev_allocated++;
	}

3398
	if (is_scsi_rev_5(h))
3399 3400 3401 3402
		raid_ctlr_position = 0;
	else
		raid_ctlr_position = nphysicals + nlogicals;

3403
	/* adjust our table of devices */
3404
	n_ext_target_devs = 0;
3405
	for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3406
		u8 *lunaddrbytes, is_OBDR = 0;
3407 3408

		/* Figure out where the LUN ID info is coming from */
3409 3410
		lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
			i, nphysicals, nlogicals, physdev_list, logdev_list);
3411 3412 3413 3414 3415 3416

		/* skip masked non-disk devices */
		if (MASKED_DEVICE(lunaddrbytes))
			if (i < nphysicals + (raid_ctlr_position == 0) &&
				NON_DISK_PHYS_DEV(lunaddrbytes))
				continue;
3417 3418

		/* Get device type, vendor, model, device id */
3419 3420
		if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
							&is_OBDR))
3421
			continue; /* skip it if we can't talk to it. */
3422
		figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
S
Stephen Cameron 已提交
3423
		hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
3424 3425 3426
		this_device = currentsd[ncurrent];

		/*
3427
		 * For external target devices, we have to insert a LUN 0 which
3428 3429 3430 3431 3432
		 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
		 * is nonetheless an enclosure device there.  We have to
		 * present that otherwise linux won't find anything if
		 * there is no lun 0.
		 */
3433
		if (add_ext_target_dev(h, tmpdevice, this_device,
3434
				lunaddrbytes, lunzerobits,
3435
				&n_ext_target_devs)) {
3436 3437 3438 3439 3440 3441
			ncurrent++;
			this_device = currentsd[ncurrent];
		}

		*this_device = *tmpdevice;

3442 3443 3444 3445 3446 3447 3448 3449 3450 3451 3452 3453
		/* do not expose masked devices */
		if (MASKED_DEVICE(lunaddrbytes) &&
			i < nphysicals + (raid_ctlr_position == 0)) {
			if (h->hba_mode_enabled)
				dev_warn(&h->pdev->dev,
					"Masked physical device detected\n");
			this_device->expose_state = HPSA_DO_NOT_EXPOSE;
		} else {
			this_device->expose_state =
					HPSA_SG_ATTACH | HPSA_ULD_ATTACH;
		}

3454
		switch (this_device->devtype) {
3455
		case TYPE_ROM:
3456 3457 3458 3459 3460 3461 3462
			/* We don't *really* support actual CD-ROM devices,
			 * just "One Button Disaster Recovery" tape drive
			 * which temporarily pretends to be a CD-ROM drive.
			 * So we check that the device is really an OBDR tape
			 * device by checking for "$DR-10" in bytes 43-48 of
			 * the inquiry data.
			 */
3463 3464
			if (is_OBDR)
				ncurrent++;
3465 3466
			break;
		case TYPE_DISK:
3467
			if (i >= nphysicals) {
3468 3469
				ncurrent++;
				break;
3470
			}
3471 3472 3473 3474 3475 3476 3477 3478 3479 3480 3481 3482

			if (h->hba_mode_enabled)
				/* never use raid mapper in HBA mode */
				this_device->offload_enabled = 0;
			else if (!(h->transMethod & CFGTBL_Trans_io_accel1 ||
				h->transMethod & CFGTBL_Trans_io_accel2))
				break;

			hpsa_get_ioaccel_drive_info(h, this_device,
						lunaddrbytes, id_phys);
			atomic_set(&this_device->ioaccel_cmds_out, 0);
			ncurrent++;
3483 3484 3485 3486 3487
			break;
		case TYPE_TAPE:
		case TYPE_MEDIUM_CHANGER:
			ncurrent++;
			break;
3488 3489 3490 3491
		case TYPE_ENCLOSURE:
			if (h->hba_mode_enabled)
				ncurrent++;
			break;
3492 3493 3494 3495 3496 3497 3498 3499 3500 3501 3502 3503 3504
		case TYPE_RAID:
			/* Only present the Smartarray HBA as a RAID controller.
			 * If it's a RAID controller other than the HBA itself
			 * (an external RAID controller, MSA500 or similar)
			 * don't present it.
			 */
			if (!is_hba_lunid(lunaddrbytes))
				break;
			ncurrent++;
			break;
		default:
			break;
		}
3505
		if (ncurrent >= HPSA_MAX_DEVICES)
3506 3507 3508 3509 3510 3511 3512 3513 3514 3515
			break;
	}
	adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
out:
	kfree(tmpdevice);
	for (i = 0; i < ndev_allocated; i++)
		kfree(currentsd[i]);
	kfree(currentsd);
	kfree(physdev_list);
	kfree(logdev_list);
3516
	kfree(id_phys);
3517 3518
}

3519 3520 3521 3522 3523 3524 3525 3526 3527 3528 3529
static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
				   struct scatterlist *sg)
{
	u64 addr64 = (u64) sg_dma_address(sg);
	unsigned int len = sg_dma_len(sg);

	desc->Addr = cpu_to_le64(addr64);
	desc->Len = cpu_to_le32(len);
	desc->Ext = 0;
}

3530 3531
/*
 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3532 3533 3534
 * dma mapping  and fills in the scatter gather entries of the
 * hpsa command, cp.
 */
3535
static int hpsa_scatter_gather(struct ctlr_info *h,
3536 3537 3538 3539
		struct CommandList *cp,
		struct scsi_cmnd *cmd)
{
	struct scatterlist *sg;
3540 3541
	int use_sg, i, sg_index, chained;
	struct SGDescriptor *curr_sg;
3542

3543
	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3544 3545 3546 3547 3548 3549 3550 3551

	use_sg = scsi_dma_map(cmd);
	if (use_sg < 0)
		return use_sg;

	if (!use_sg)
		goto sglist_finished;

3552 3553 3554
	curr_sg = cp->SG;
	chained = 0;
	sg_index = 0;
3555
	scsi_for_each_sg(cmd, sg, use_sg, i) {
3556 3557 3558 3559 3560 3561
		if (i == h->max_cmd_sg_entries - 1 &&
			use_sg > h->max_cmd_sg_entries) {
			chained = 1;
			curr_sg = h->cmd_sg_list[cp->cmdindex];
			sg_index = 0;
		}
3562
		hpsa_set_sg_descriptor(curr_sg, sg);
3563 3564
		curr_sg++;
	}
3565 3566

	/* Back the pointer up to the last entry and mark it as "last". */
3567
	(--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3568 3569 3570 3571 3572 3573

	if (use_sg + chained > h->maxSG)
		h->maxSG = use_sg + chained;

	if (chained) {
		cp->Header.SGList = h->max_cmd_sg_entries;
3574
		cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
3575 3576 3577 3578
		if (hpsa_map_sg_chain_block(h, cp)) {
			scsi_dma_unmap(cmd);
			return -1;
		}
3579
		return 0;
3580 3581 3582 3583
	}

sglist_finished:

3584
	cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
3585
	cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
3586 3587 3588
	return 0;
}

3589 3590 3591 3592 3593 3594 3595 3596 3597 3598 3599 3600 3601 3602 3603 3604 3605 3606 3607 3608 3609 3610 3611 3612 3613 3614 3615 3616 3617 3618 3619 3620 3621 3622 3623 3624 3625 3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636
#define IO_ACCEL_INELIGIBLE (1)
static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
{
	int is_write = 0;
	u32 block;
	u32 block_cnt;

	/* Perform some CDB fixups if needed using 10 byte reads/writes only */
	switch (cdb[0]) {
	case WRITE_6:
	case WRITE_12:
		is_write = 1;
	case READ_6:
	case READ_12:
		if (*cdb_len == 6) {
			block = (((u32) cdb[2]) << 8) | cdb[3];
			block_cnt = cdb[4];
		} else {
			BUG_ON(*cdb_len != 12);
			block = (((u32) cdb[2]) << 24) |
				(((u32) cdb[3]) << 16) |
				(((u32) cdb[4]) << 8) |
				cdb[5];
			block_cnt =
				(((u32) cdb[6]) << 24) |
				(((u32) cdb[7]) << 16) |
				(((u32) cdb[8]) << 8) |
				cdb[9];
		}
		if (block_cnt > 0xffff)
			return IO_ACCEL_INELIGIBLE;

		cdb[0] = is_write ? WRITE_10 : READ_10;
		cdb[1] = 0;
		cdb[2] = (u8) (block >> 24);
		cdb[3] = (u8) (block >> 16);
		cdb[4] = (u8) (block >> 8);
		cdb[5] = (u8) (block);
		cdb[6] = 0;
		cdb[7] = (u8) (block_cnt >> 8);
		cdb[8] = (u8) (block_cnt);
		cdb[9] = 0;
		*cdb_len = 10;
		break;
	}
	return 0;
}

3637
static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
3638
	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3639
	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3640 3641 3642 3643 3644 3645 3646 3647 3648 3649 3650
{
	struct scsi_cmnd *cmd = c->scsi_cmd;
	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
	unsigned int len;
	unsigned int total_len = 0;
	struct scatterlist *sg;
	u64 addr64;
	int use_sg, i;
	struct SGDescriptor *curr_sg;
	u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;

3651
	/* TODO: implement chaining support */
3652 3653
	if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
		atomic_dec(&phys_disk->ioaccel_cmds_out);
3654
		return IO_ACCEL_INELIGIBLE;
3655
	}
3656

3657 3658
	BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);

3659 3660
	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
		atomic_dec(&phys_disk->ioaccel_cmds_out);
3661
		return IO_ACCEL_INELIGIBLE;
3662
	}
3663

3664 3665 3666 3667 3668 3669 3670 3671
	c->cmd_type = CMD_IOACCEL1;

	/* Adjust the DMA address to point to the accelerated command buffer */
	c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
				(c->cmdindex * sizeof(*cp));
	BUG_ON(c->busaddr & 0x0000007F);

	use_sg = scsi_dma_map(cmd);
3672 3673
	if (use_sg < 0) {
		atomic_dec(&phys_disk->ioaccel_cmds_out);
3674
		return use_sg;
3675
	}
3676 3677 3678 3679 3680 3681 3682

	if (use_sg) {
		curr_sg = cp->SG;
		scsi_for_each_sg(cmd, sg, use_sg, i) {
			addr64 = (u64) sg_dma_address(sg);
			len  = sg_dma_len(sg);
			total_len += len;
3683 3684 3685
			curr_sg->Addr = cpu_to_le64(addr64);
			curr_sg->Len = cpu_to_le32(len);
			curr_sg->Ext = cpu_to_le32(0);
3686 3687
			curr_sg++;
		}
3688
		(--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3689 3690 3691 3692 3693 3694 3695 3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708 3709

		switch (cmd->sc_data_direction) {
		case DMA_TO_DEVICE:
			control |= IOACCEL1_CONTROL_DATA_OUT;
			break;
		case DMA_FROM_DEVICE:
			control |= IOACCEL1_CONTROL_DATA_IN;
			break;
		case DMA_NONE:
			control |= IOACCEL1_CONTROL_NODATAXFER;
			break;
		default:
			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
			cmd->sc_data_direction);
			BUG();
			break;
		}
	} else {
		control |= IOACCEL1_CONTROL_NODATAXFER;
	}

3710
	c->Header.SGList = use_sg;
3711
	/* Fill out the command structure to submit */
D
Don Brace 已提交
3712 3713 3714 3715 3716
	cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
	cp->transfer_len = cpu_to_le32(total_len);
	cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
			(cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
	cp->control = cpu_to_le32(control);
3717 3718
	memcpy(cp->CDB, cdb, cdb_len);
	memcpy(cp->CISS_LUN, scsi3addr, 8);
3719
	/* Tag was already set at init time. */
3720
	enqueue_cmd_and_start_io(h, c);
3721 3722
	return 0;
}
3723

3724 3725 3726 3727 3728 3729 3730 3731 3732 3733
/*
 * Queue a command directly to a device behind the controller using the
 * I/O accelerator path.
 */
static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
	struct CommandList *c)
{
	struct scsi_cmnd *cmd = c->scsi_cmd;
	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;

3734 3735
	c->phys_disk = dev;

3736
	return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
3737
		cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
3738 3739
}

3740 3741 3742 3743 3744 3745 3746 3747 3748 3749 3750 3751
/*
 * Set encryption parameters for the ioaccel2 request
 */
static void set_encrypt_ioaccel2(struct ctlr_info *h,
	struct CommandList *c, struct io_accel2_cmd *cp)
{
	struct scsi_cmnd *cmd = c->scsi_cmd;
	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
	struct raid_map_data *map = &dev->raid_map;
	u64 first_block;

	/* Are we doing encryption on this device */
D
Don Brace 已提交
3752
	if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
3753 3754 3755 3756 3757 3758 3759 3760 3761 3762 3763 3764 3765 3766 3767
		return;
	/* Set the data encryption key index. */
	cp->dekindex = map->dekindex;

	/* Set the encryption enable flag, encoded into direction field. */
	cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;

	/* Set encryption tweak values based on logical block address
	 * If block size is 512, tweak value is LBA.
	 * For other block sizes, tweak is (LBA * block size)/ 512)
	 */
	switch (cmd->cmnd[0]) {
	/* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
	case WRITE_6:
	case READ_6:
D
Don Brace 已提交
3768
		first_block = get_unaligned_be16(&cmd->cmnd[2]);
3769 3770 3771 3772 3773 3774
		break;
	case WRITE_10:
	case READ_10:
	/* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
	case WRITE_12:
	case READ_12:
D
Don Brace 已提交
3775
		first_block = get_unaligned_be32(&cmd->cmnd[2]);
3776 3777 3778
		break;
	case WRITE_16:
	case READ_16:
D
Don Brace 已提交
3779
		first_block = get_unaligned_be64(&cmd->cmnd[2]);
3780 3781 3782
		break;
	default:
		dev_err(&h->pdev->dev,
D
Don Brace 已提交
3783 3784
			"ERROR: %s: size (0x%x) not supported for encryption\n",
			__func__, cmd->cmnd[0]);
3785 3786 3787
		BUG();
		break;
	}
D
Don Brace 已提交
3788 3789 3790 3791 3792 3793 3794

	if (le32_to_cpu(map->volume_blk_size) != 512)
		first_block = first_block *
				le32_to_cpu(map->volume_blk_size)/512;

	cp->tweak_lower = cpu_to_le32(first_block);
	cp->tweak_upper = cpu_to_le32(first_block >> 32);
3795 3796
}

3797 3798
static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3799
	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3800 3801 3802 3803 3804 3805 3806 3807 3808 3809
{
	struct scsi_cmnd *cmd = c->scsi_cmd;
	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
	struct ioaccel2_sg_element *curr_sg;
	int use_sg, i;
	struct scatterlist *sg;
	u64 addr64;
	u32 len;
	u32 total_len = 0;

3810 3811
	if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
		atomic_dec(&phys_disk->ioaccel_cmds_out);
3812
		return IO_ACCEL_INELIGIBLE;
3813
	}
3814

3815 3816
	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
		atomic_dec(&phys_disk->ioaccel_cmds_out);
3817
		return IO_ACCEL_INELIGIBLE;
3818 3819
	}

3820 3821 3822 3823 3824 3825 3826 3827 3828 3829
	c->cmd_type = CMD_IOACCEL2;
	/* Adjust the DMA address to point to the accelerated command buffer */
	c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
				(c->cmdindex * sizeof(*cp));
	BUG_ON(c->busaddr & 0x0000007F);

	memset(cp, 0, sizeof(*cp));
	cp->IU_type = IOACCEL2_IU_TYPE;

	use_sg = scsi_dma_map(cmd);
3830 3831
	if (use_sg < 0) {
		atomic_dec(&phys_disk->ioaccel_cmds_out);
3832
		return use_sg;
3833
	}
3834 3835 3836 3837 3838 3839 3840 3841 3842 3843 3844 3845 3846 3847 3848 3849 3850 3851 3852

	if (use_sg) {
		BUG_ON(use_sg > IOACCEL2_MAXSGENTRIES);
		curr_sg = cp->sg;
		scsi_for_each_sg(cmd, sg, use_sg, i) {
			addr64 = (u64) sg_dma_address(sg);
			len  = sg_dma_len(sg);
			total_len += len;
			curr_sg->address = cpu_to_le64(addr64);
			curr_sg->length = cpu_to_le32(len);
			curr_sg->reserved[0] = 0;
			curr_sg->reserved[1] = 0;
			curr_sg->reserved[2] = 0;
			curr_sg->chain_indicator = 0;
			curr_sg++;
		}

		switch (cmd->sc_data_direction) {
		case DMA_TO_DEVICE:
3853 3854
			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
			cp->direction |= IOACCEL2_DIR_DATA_OUT;
3855 3856
			break;
		case DMA_FROM_DEVICE:
3857 3858
			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
			cp->direction |= IOACCEL2_DIR_DATA_IN;
3859 3860
			break;
		case DMA_NONE:
3861 3862
			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
			cp->direction |= IOACCEL2_DIR_NO_DATA;
3863 3864 3865 3866 3867 3868 3869 3870
			break;
		default:
			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
				cmd->sc_data_direction);
			BUG();
			break;
		}
	} else {
3871 3872
		cp->direction &= ~IOACCEL2_DIRECTION_MASK;
		cp->direction |= IOACCEL2_DIR_NO_DATA;
3873
	}
3874 3875 3876 3877

	/* Set encryption parameters, if necessary */
	set_encrypt_ioaccel2(h, c, cp);

D
Don Brace 已提交
3878
	cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
3879
	cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
3880 3881 3882 3883 3884 3885 3886 3887
	memcpy(cp->cdb, cdb, sizeof(cp->cdb));

	/* fill in sg elements */
	cp->sg_count = (u8) use_sg;

	cp->data_len = cpu_to_le32(total_len);
	cp->err_ptr = cpu_to_le64(c->busaddr +
			offsetof(struct io_accel2_cmd, error_data));
3888
	cp->err_len = cpu_to_le32(sizeof(cp->error_data));
3889 3890 3891 3892 3893 3894 3895 3896 3897 3898

	enqueue_cmd_and_start_io(h, c);
	return 0;
}

/*
 * Queue a command to the correct I/O accelerator path.
 */
static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3899
	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3900
{
3901 3902 3903 3904 3905 3906
	/* Try to honor the device's queue depth */
	if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
					phys_disk->queue_depth) {
		atomic_dec(&phys_disk->ioaccel_cmds_out);
		return IO_ACCEL_INELIGIBLE;
	}
3907 3908
	if (h->transMethod & CFGTBL_Trans_io_accel1)
		return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
3909 3910
						cdb, cdb_len, scsi3addr,
						phys_disk);
3911 3912
	else
		return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
3913 3914
						cdb, cdb_len, scsi3addr,
						phys_disk);
3915 3916
}

3917 3918 3919 3920 3921
static void raid_map_helper(struct raid_map_data *map,
		int offload_to_mirror, u32 *map_index, u32 *current_group)
{
	if (offload_to_mirror == 0)  {
		/* use physical disk in the first mirrored group. */
D
Don Brace 已提交
3922
		*map_index %= le16_to_cpu(map->data_disks_per_row);
3923 3924 3925 3926
		return;
	}
	do {
		/* determine mirror group that *map_index indicates */
D
Don Brace 已提交
3927 3928
		*current_group = *map_index /
			le16_to_cpu(map->data_disks_per_row);
3929 3930
		if (offload_to_mirror == *current_group)
			continue;
D
Don Brace 已提交
3931
		if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
3932
			/* select map index from next group */
D
Don Brace 已提交
3933
			*map_index += le16_to_cpu(map->data_disks_per_row);
3934 3935 3936
			(*current_group)++;
		} else {
			/* select map index from first group */
D
Don Brace 已提交
3937
			*map_index %= le16_to_cpu(map->data_disks_per_row);
3938 3939 3940 3941 3942
			*current_group = 0;
		}
	} while (offload_to_mirror != *current_group);
}

3943 3944 3945 3946 3947 3948 3949 3950 3951 3952 3953 3954 3955 3956 3957 3958 3959 3960
/*
 * Attempt to perform offload RAID mapping for a logical volume I/O.
 */
static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
	struct CommandList *c)
{
	struct scsi_cmnd *cmd = c->scsi_cmd;
	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
	struct raid_map_data *map = &dev->raid_map;
	struct raid_map_disk_data *dd = &map->data[0];
	int is_write = 0;
	u32 map_index;
	u64 first_block, last_block;
	u32 block_cnt;
	u32 blocks_per_row;
	u64 first_row, last_row;
	u32 first_row_offset, last_row_offset;
	u32 first_column, last_column;
3961 3962 3963 3964 3965 3966 3967 3968
	u64 r0_first_row, r0_last_row;
	u32 r5or6_blocks_per_row;
	u64 r5or6_first_row, r5or6_last_row;
	u32 r5or6_first_row_offset, r5or6_last_row_offset;
	u32 r5or6_first_column, r5or6_last_column;
	u32 total_disks_per_row;
	u32 stripesize;
	u32 first_group, last_group, current_group;
3969 3970 3971 3972 3973 3974
	u32 map_row;
	u32 disk_handle;
	u64 disk_block;
	u32 disk_block_cnt;
	u8 cdb[16];
	u8 cdb_len;
D
Don Brace 已提交
3975
	u16 strip_size;
3976 3977 3978
#if BITS_PER_LONG == 32
	u64 tmpdiv;
#endif
3979
	int offload_to_mirror;
3980 3981 3982 3983 3984 3985 3986 3987 3988 3989

	/* check for valid opcode, get LBA and block count */
	switch (cmd->cmnd[0]) {
	case WRITE_6:
		is_write = 1;
	case READ_6:
		first_block =
			(((u64) cmd->cmnd[2]) << 8) |
			cmd->cmnd[3];
		block_cnt = cmd->cmnd[4];
3990 3991
		if (block_cnt == 0)
			block_cnt = 256;
3992 3993 3994 3995 3996 3997 3998 3999 4000 4001 4002 4003 4004 4005 4006 4007 4008 4009 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4032 4033 4034 4035 4036 4037 4038 4039 4040 4041 4042 4043 4044 4045 4046
		break;
	case WRITE_10:
		is_write = 1;
	case READ_10:
		first_block =
			(((u64) cmd->cmnd[2]) << 24) |
			(((u64) cmd->cmnd[3]) << 16) |
			(((u64) cmd->cmnd[4]) << 8) |
			cmd->cmnd[5];
		block_cnt =
			(((u32) cmd->cmnd[7]) << 8) |
			cmd->cmnd[8];
		break;
	case WRITE_12:
		is_write = 1;
	case READ_12:
		first_block =
			(((u64) cmd->cmnd[2]) << 24) |
			(((u64) cmd->cmnd[3]) << 16) |
			(((u64) cmd->cmnd[4]) << 8) |
			cmd->cmnd[5];
		block_cnt =
			(((u32) cmd->cmnd[6]) << 24) |
			(((u32) cmd->cmnd[7]) << 16) |
			(((u32) cmd->cmnd[8]) << 8) |
		cmd->cmnd[9];
		break;
	case WRITE_16:
		is_write = 1;
	case READ_16:
		first_block =
			(((u64) cmd->cmnd[2]) << 56) |
			(((u64) cmd->cmnd[3]) << 48) |
			(((u64) cmd->cmnd[4]) << 40) |
			(((u64) cmd->cmnd[5]) << 32) |
			(((u64) cmd->cmnd[6]) << 24) |
			(((u64) cmd->cmnd[7]) << 16) |
			(((u64) cmd->cmnd[8]) << 8) |
			cmd->cmnd[9];
		block_cnt =
			(((u32) cmd->cmnd[10]) << 24) |
			(((u32) cmd->cmnd[11]) << 16) |
			(((u32) cmd->cmnd[12]) << 8) |
			cmd->cmnd[13];
		break;
	default:
		return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
	}
	last_block = first_block + block_cnt - 1;

	/* check for write to non-RAID-0 */
	if (is_write && dev->raid_level != 0)
		return IO_ACCEL_INELIGIBLE;

	/* check for invalid block or wraparound */
D
Don Brace 已提交
4047 4048
	if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
		last_block < first_block)
4049 4050 4051
		return IO_ACCEL_INELIGIBLE;

	/* calculate stripe information for the request */
D
Don Brace 已提交
4052 4053 4054
	blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
				le16_to_cpu(map->strip_size);
	strip_size = le16_to_cpu(map->strip_size);
4055 4056 4057 4058 4059 4060 4061 4062 4063 4064
#if BITS_PER_LONG == 32
	tmpdiv = first_block;
	(void) do_div(tmpdiv, blocks_per_row);
	first_row = tmpdiv;
	tmpdiv = last_block;
	(void) do_div(tmpdiv, blocks_per_row);
	last_row = tmpdiv;
	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
	tmpdiv = first_row_offset;
D
Don Brace 已提交
4065
	(void) do_div(tmpdiv, strip_size);
4066 4067
	first_column = tmpdiv;
	tmpdiv = last_row_offset;
D
Don Brace 已提交
4068
	(void) do_div(tmpdiv, strip_size);
4069 4070 4071 4072 4073 4074
	last_column = tmpdiv;
#else
	first_row = first_block / blocks_per_row;
	last_row = last_block / blocks_per_row;
	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
D
Don Brace 已提交
4075 4076
	first_column = first_row_offset / strip_size;
	last_column = last_row_offset / strip_size;
4077 4078 4079 4080 4081 4082 4083
#endif

	/* if this isn't a single row/column then give to the controller */
	if ((first_row != last_row) || (first_column != last_column))
		return IO_ACCEL_INELIGIBLE;

	/* proceeding with driver mapping */
D
Don Brace 已提交
4084 4085
	total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
				le16_to_cpu(map->metadata_disks_per_row);
4086
	map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
D
Don Brace 已提交
4087
				le16_to_cpu(map->row_cnt);
4088 4089 4090 4091 4092 4093 4094 4095 4096
	map_index = (map_row * total_disks_per_row) + first_column;

	switch (dev->raid_level) {
	case HPSA_RAID_0:
		break; /* nothing special to do */
	case HPSA_RAID_1:
		/* Handles load balance across RAID 1 members.
		 * (2-drive R1 and R10 with even # of drives.)
		 * Appropriate for SSDs, not optimal for HDDs
4097
		 */
D
Don Brace 已提交
4098
		BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
4099
		if (dev->offload_to_mirror)
D
Don Brace 已提交
4100
			map_index += le16_to_cpu(map->data_disks_per_row);
4101
		dev->offload_to_mirror = !dev->offload_to_mirror;
4102 4103 4104 4105 4106
		break;
	case HPSA_RAID_ADM:
		/* Handles N-way mirrors  (R1-ADM)
		 * and R10 with # of drives divisible by 3.)
		 */
D
Don Brace 已提交
4107
		BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
4108 4109 4110 4111 4112 4113

		offload_to_mirror = dev->offload_to_mirror;
		raid_map_helper(map, offload_to_mirror,
				&map_index, &current_group);
		/* set mirror group to use next time */
		offload_to_mirror =
D
Don Brace 已提交
4114 4115
			(offload_to_mirror >=
			le16_to_cpu(map->layout_map_count) - 1)
4116 4117 4118 4119 4120 4121 4122 4123 4124
			? 0 : offload_to_mirror + 1;
		dev->offload_to_mirror = offload_to_mirror;
		/* Avoid direct use of dev->offload_to_mirror within this
		 * function since multiple threads might simultaneously
		 * increment it beyond the range of dev->layout_map_count -1.
		 */
		break;
	case HPSA_RAID_5:
	case HPSA_RAID_6:
D
Don Brace 已提交
4125
		if (le16_to_cpu(map->layout_map_count) <= 1)
4126 4127 4128 4129
			break;

		/* Verify first and last block are in same RAID group */
		r5or6_blocks_per_row =
D
Don Brace 已提交
4130 4131
			le16_to_cpu(map->strip_size) *
			le16_to_cpu(map->data_disks_per_row);
4132
		BUG_ON(r5or6_blocks_per_row == 0);
D
Don Brace 已提交
4133 4134
		stripesize = r5or6_blocks_per_row *
			le16_to_cpu(map->layout_map_count);
4135 4136 4137 4138 4139 4140 4141 4142 4143 4144 4145 4146 4147 4148 4149
#if BITS_PER_LONG == 32
		tmpdiv = first_block;
		first_group = do_div(tmpdiv, stripesize);
		tmpdiv = first_group;
		(void) do_div(tmpdiv, r5or6_blocks_per_row);
		first_group = tmpdiv;
		tmpdiv = last_block;
		last_group = do_div(tmpdiv, stripesize);
		tmpdiv = last_group;
		(void) do_div(tmpdiv, r5or6_blocks_per_row);
		last_group = tmpdiv;
#else
		first_group = (first_block % stripesize) / r5or6_blocks_per_row;
		last_group = (last_block % stripesize) / r5or6_blocks_per_row;
#endif
4150
		if (first_group != last_group)
4151 4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167 4168 4169 4170 4171 4172 4173 4174 4175 4176 4177 4178 4179 4180 4181 4182 4183 4184 4185 4186 4187 4188 4189 4190 4191 4192 4193 4194 4195 4196
			return IO_ACCEL_INELIGIBLE;

		/* Verify request is in a single row of RAID 5/6 */
#if BITS_PER_LONG == 32
		tmpdiv = first_block;
		(void) do_div(tmpdiv, stripesize);
		first_row = r5or6_first_row = r0_first_row = tmpdiv;
		tmpdiv = last_block;
		(void) do_div(tmpdiv, stripesize);
		r5or6_last_row = r0_last_row = tmpdiv;
#else
		first_row = r5or6_first_row = r0_first_row =
						first_block / stripesize;
		r5or6_last_row = r0_last_row = last_block / stripesize;
#endif
		if (r5or6_first_row != r5or6_last_row)
			return IO_ACCEL_INELIGIBLE;


		/* Verify request is in a single column */
#if BITS_PER_LONG == 32
		tmpdiv = first_block;
		first_row_offset = do_div(tmpdiv, stripesize);
		tmpdiv = first_row_offset;
		first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
		r5or6_first_row_offset = first_row_offset;
		tmpdiv = last_block;
		r5or6_last_row_offset = do_div(tmpdiv, stripesize);
		tmpdiv = r5or6_last_row_offset;
		r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
		tmpdiv = r5or6_first_row_offset;
		(void) do_div(tmpdiv, map->strip_size);
		first_column = r5or6_first_column = tmpdiv;
		tmpdiv = r5or6_last_row_offset;
		(void) do_div(tmpdiv, map->strip_size);
		r5or6_last_column = tmpdiv;
#else
		first_row_offset = r5or6_first_row_offset =
			(u32)((first_block % stripesize) %
						r5or6_blocks_per_row);

		r5or6_last_row_offset =
			(u32)((last_block % stripesize) %
						r5or6_blocks_per_row);

		first_column = r5or6_first_column =
D
Don Brace 已提交
4197
			r5or6_first_row_offset / le16_to_cpu(map->strip_size);
4198
		r5or6_last_column =
D
Don Brace 已提交
4199
			r5or6_last_row_offset / le16_to_cpu(map->strip_size);
4200 4201 4202 4203 4204 4205
#endif
		if (r5or6_first_column != r5or6_last_column)
			return IO_ACCEL_INELIGIBLE;

		/* Request is eligible */
		map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
D
Don Brace 已提交
4206
			le16_to_cpu(map->row_cnt);
4207 4208

		map_index = (first_group *
D
Don Brace 已提交
4209
			(le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
4210 4211 4212 4213
			(map_row * total_disks_per_row) + first_column;
		break;
	default:
		return IO_ACCEL_INELIGIBLE;
4214
	}
4215

4216 4217 4218
	if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
		return IO_ACCEL_INELIGIBLE;

4219 4220
	c->phys_disk = dev->phys_disk[map_index];

4221
	disk_handle = dd[map_index].ioaccel_handle;
D
Don Brace 已提交
4222 4223 4224 4225
	disk_block = le64_to_cpu(map->disk_starting_blk) +
			first_row * le16_to_cpu(map->strip_size) +
			(first_row_offset - first_column *
			le16_to_cpu(map->strip_size));
4226 4227 4228 4229 4230 4231 4232 4233 4234 4235 4236 4237 4238 4239 4240 4241 4242 4243 4244 4245 4246 4247 4248 4249 4250 4251 4252 4253 4254 4255 4256 4257 4258 4259 4260 4261 4262 4263 4264 4265 4266 4267
	disk_block_cnt = block_cnt;

	/* handle differing logical/physical block sizes */
	if (map->phys_blk_shift) {
		disk_block <<= map->phys_blk_shift;
		disk_block_cnt <<= map->phys_blk_shift;
	}
	BUG_ON(disk_block_cnt > 0xffff);

	/* build the new CDB for the physical disk I/O */
	if (disk_block > 0xffffffff) {
		cdb[0] = is_write ? WRITE_16 : READ_16;
		cdb[1] = 0;
		cdb[2] = (u8) (disk_block >> 56);
		cdb[3] = (u8) (disk_block >> 48);
		cdb[4] = (u8) (disk_block >> 40);
		cdb[5] = (u8) (disk_block >> 32);
		cdb[6] = (u8) (disk_block >> 24);
		cdb[7] = (u8) (disk_block >> 16);
		cdb[8] = (u8) (disk_block >> 8);
		cdb[9] = (u8) (disk_block);
		cdb[10] = (u8) (disk_block_cnt >> 24);
		cdb[11] = (u8) (disk_block_cnt >> 16);
		cdb[12] = (u8) (disk_block_cnt >> 8);
		cdb[13] = (u8) (disk_block_cnt);
		cdb[14] = 0;
		cdb[15] = 0;
		cdb_len = 16;
	} else {
		cdb[0] = is_write ? WRITE_10 : READ_10;
		cdb[1] = 0;
		cdb[2] = (u8) (disk_block >> 24);
		cdb[3] = (u8) (disk_block >> 16);
		cdb[4] = (u8) (disk_block >> 8);
		cdb[5] = (u8) (disk_block);
		cdb[6] = 0;
		cdb[7] = (u8) (disk_block_cnt >> 8);
		cdb[8] = (u8) (disk_block_cnt);
		cdb[9] = 0;
		cdb_len = 10;
	}
	return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
4268 4269
						dev->scsi3addr,
						dev->phys_disk[map_index]);
4270 4271
}

4272 4273 4274 4275 4276
/*
 * Submit commands down the "normal" RAID stack path
 * All callers to hpsa_ciss_submit must check lockup_detected
 * beforehand, before (opt.) and after calling cmd_alloc
 */
4277 4278 4279
static int hpsa_ciss_submit(struct ctlr_info *h,
	struct CommandList *c, struct scsi_cmnd *cmd,
	unsigned char scsi3addr[])
4280 4281 4282 4283 4284 4285
{
	cmd->host_scribble = (unsigned char *) c;
	c->cmd_type = CMD_SCSI;
	c->scsi_cmd = cmd;
	c->Header.ReplyQueue = 0;  /* unused in simple mode */
	memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
4286
	c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
4287 4288 4289 4290 4291 4292 4293 4294 4295

	/* Fill in the request block... */

	c->Request.Timeout = 0;
	BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
	c->Request.CDBLen = cmd->cmd_len;
	memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
	switch (cmd->sc_data_direction) {
	case DMA_TO_DEVICE:
4296 4297
		c->Request.type_attr_dir =
			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
4298 4299
		break;
	case DMA_FROM_DEVICE:
4300 4301
		c->Request.type_attr_dir =
			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
4302 4303
		break;
	case DMA_NONE:
4304 4305
		c->Request.type_attr_dir =
			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
4306 4307 4308 4309 4310 4311 4312
		break;
	case DMA_BIDIRECTIONAL:
		/* This can happen if a buggy application does a scsi passthru
		 * and sets both inlen and outlen to non-zero. ( see
		 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
		 */

4313 4314
		c->Request.type_attr_dir =
			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
4315 4316 4317 4318 4319 4320 4321 4322 4323 4324 4325 4326 4327 4328 4329 4330 4331
		/* This is technically wrong, and hpsa controllers should
		 * reject it with CMD_INVALID, which is the most correct
		 * response, but non-fibre backends appear to let it
		 * slide by, and give the same results as if this field
		 * were set correctly.  Either way is acceptable for
		 * our purposes here.
		 */

		break;

	default:
		dev_err(&h->pdev->dev, "unknown data direction: %d\n",
			cmd->sc_data_direction);
		BUG();
		break;
	}

4332
	if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4333 4334 4335 4336 4337 4338 4339 4340
		cmd_free(h, c);
		return SCSI_MLQUEUE_HOST_BUSY;
	}
	enqueue_cmd_and_start_io(h, c);
	/* the cmd'll come back via intr handler in complete_scsi_command()  */
	return 0;
}

4341 4342 4343 4344 4345 4346 4347 4348 4349 4350 4351 4352 4353 4354 4355 4356 4357 4358 4359 4360 4361 4362 4363 4364 4365 4366 4367 4368 4369 4370 4371 4372 4373 4374 4375 4376 4377 4378 4379 4380 4381 4382
static void hpsa_cmd_init(struct ctlr_info *h, int index,
				struct CommandList *c)
{
	dma_addr_t cmd_dma_handle, err_dma_handle;

	/* Zero out all of commandlist except the last field, refcount */
	memset(c, 0, offsetof(struct CommandList, refcount));
	c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
	cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
	c->err_info = h->errinfo_pool + index;
	memset(c->err_info, 0, sizeof(*c->err_info));
	err_dma_handle = h->errinfo_pool_dhandle
	    + index * sizeof(*c->err_info);
	c->cmdindex = index;
	c->busaddr = (u32) cmd_dma_handle;
	c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
	c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
	c->h = h;
}

static void hpsa_preinitialize_commands(struct ctlr_info *h)
{
	int i;

	for (i = 0; i < h->nr_cmds; i++) {
		struct CommandList *c = h->cmd_pool + i;

		hpsa_cmd_init(h, i, c);
		atomic_set(&c->refcount, 0);
	}
}

static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
				struct CommandList *c)
{
	dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);

	memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
	memset(c->err_info, 0, sizeof(*c->err_info));
	c->busaddr = (u32) cmd_dma_handle;
}

4383 4384 4385 4386 4387 4388 4389 4390 4391 4392 4393 4394 4395 4396 4397 4398
static int hpsa_ioaccel_submit(struct ctlr_info *h,
		struct CommandList *c, struct scsi_cmnd *cmd,
		unsigned char *scsi3addr)
{
	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
	int rc = IO_ACCEL_INELIGIBLE;

	cmd->host_scribble = (unsigned char *) c;

	if (dev->offload_enabled) {
		hpsa_cmd_init(h, c->cmdindex, c);
		c->cmd_type = CMD_SCSI;
		c->scsi_cmd = cmd;
		rc = hpsa_scsi_ioaccel_raid_map(h, c);
		if (rc < 0)     /* scsi_dma_map failed. */
			rc = SCSI_MLQUEUE_HOST_BUSY;
4399
	} else if (dev->hba_ioaccel_enabled) {
4400 4401 4402 4403 4404 4405 4406 4407 4408 4409
		hpsa_cmd_init(h, c->cmdindex, c);
		c->cmd_type = CMD_SCSI;
		c->scsi_cmd = cmd;
		rc = hpsa_scsi_ioaccel_direct_map(h, c);
		if (rc < 0)     /* scsi_dma_map failed. */
			rc = SCSI_MLQUEUE_HOST_BUSY;
	}
	return rc;
}

4410 4411 4412 4413 4414 4415 4416 4417 4418 4419 4420
static void hpsa_command_resubmit_worker(struct work_struct *work)
{
	struct scsi_cmnd *cmd;
	struct hpsa_scsi_dev_t *dev;
	struct CommandList *c =
			container_of(work, struct CommandList, work);

	cmd = c->scsi_cmd;
	dev = cmd->device->hostdata;
	if (!dev) {
		cmd->result = DID_NO_CONNECT << 16;
4421
		cmd_free(c->h, c);
4422 4423 4424
		cmd->scsi_done(cmd);
		return;
	}
4425 4426 4427 4428 4429 4430 4431 4432 4433 4434 4435 4436 4437 4438 4439 4440 4441 4442 4443 4444 4445 4446 4447 4448 4449 4450 4451
	if (c->cmd_type == CMD_IOACCEL2) {
		struct ctlr_info *h = c->h;
		struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
		int rc;

		if (c2->error_data.serv_response ==
				IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
			rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
			if (rc == 0)
				return;
			if (rc == SCSI_MLQUEUE_HOST_BUSY) {
				/*
				 * If we get here, it means dma mapping failed.
				 * Try again via scsi mid layer, which will
				 * then get SCSI_MLQUEUE_HOST_BUSY.
				 */
				cmd->result = DID_IMM_RETRY << 16;
				cmd->scsi_done(cmd);
				cmd_free(h, c);	/* FIX-ME:  on merge, change
						 * to cmd_tagged_free() and
						 * ultimately to
						 * hpsa_cmd_free_and_done(). */
				return;
			}
			/* else, fall thru and resubmit down CISS path */
		}
	}
4452
	hpsa_cmd_partial_init(c->h, c->cmdindex, c);
4453 4454 4455 4456 4457
	if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
		/*
		 * If we get here, it means dma mapping failed. Try
		 * again via scsi mid layer, which will then get
		 * SCSI_MLQUEUE_HOST_BUSY.
4458 4459 4460
		 *
		 * hpsa_ciss_submit will have already freed c
		 * if it encountered a dma mapping failure.
4461 4462 4463 4464 4465 4466
		 */
		cmd->result = DID_IMM_RETRY << 16;
		cmd->scsi_done(cmd);
	}
}

4467 4468 4469 4470 4471 4472 4473 4474 4475 4476 4477 4478 4479 4480 4481 4482 4483 4484 4485 4486
/* Running in struct Scsi_Host->host_lock less mode */
static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
{
	struct ctlr_info *h;
	struct hpsa_scsi_dev_t *dev;
	unsigned char scsi3addr[8];
	struct CommandList *c;
	int rc = 0;

	/* Get the ptr to our adapter structure out of cmd->host. */
	h = sdev_to_hba(cmd->device);
	dev = cmd->device->hostdata;
	if (!dev) {
		cmd->result = DID_NO_CONNECT << 16;
		cmd->scsi_done(cmd);
		return 0;
	}
	memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));

	if (unlikely(lockup_detected(h))) {
4487
		cmd->result = DID_NO_CONNECT << 16;
4488 4489 4490 4491 4492 4493 4494 4495
		cmd->scsi_done(cmd);
		return 0;
	}
	c = cmd_alloc(h);
	if (c == NULL) {			/* trouble... */
		dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
		return SCSI_MLQUEUE_HOST_BUSY;
	}
4496
	if (unlikely(lockup_detected(h))) {
4497
		cmd->result = DID_NO_CONNECT << 16;
4498 4499 4500 4501
		cmd_free(h, c);
		cmd->scsi_done(cmd);
		return 0;
	}
4502

4503 4504
	/*
	 * Call alternate submit routine for I/O accelerated commands.
4505 4506 4507 4508 4509
	 * Retries always go down the normal I/O path.
	 */
	if (likely(cmd->retries == 0 &&
		cmd->request->cmd_type == REQ_TYPE_FS &&
		h->acciopath_status)) {
4510 4511 4512 4513 4514 4515 4516 4517
		rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
		if (rc == 0)
			return 0;
		if (rc == SCSI_MLQUEUE_HOST_BUSY) {
			cmd_free(h, c);	/* FIX-ME:  on merge, change to
					 * cmd_tagged_free(), and ultimately
					 * to hpsa_cmd_resolve_and_free(). */
			return SCSI_MLQUEUE_HOST_BUSY;
4518 4519 4520 4521 4522
		}
	}
	return hpsa_ciss_submit(h, c, cmd, scsi3addr);
}

4523
static void hpsa_scan_complete(struct ctlr_info *h)
4524 4525 4526
{
	unsigned long flags;

4527 4528 4529 4530
	spin_lock_irqsave(&h->scan_lock, flags);
	h->scan_finished = 1;
	wake_up_all(&h->scan_wait_queue);
	spin_unlock_irqrestore(&h->scan_lock, flags);
4531 4532
}

4533 4534 4535 4536 4537
static void hpsa_scan_start(struct Scsi_Host *sh)
{
	struct ctlr_info *h = shost_to_hba(sh);
	unsigned long flags;

4538 4539 4540 4541 4542 4543 4544 4545
	/*
	 * Don't let rescans be initiated on a controller known to be locked
	 * up.  If the controller locks up *during* a rescan, that thread is
	 * probably hosed, but at least we can prevent new rescan threads from
	 * piling up on a locked up controller.
	 */
	if (unlikely(lockup_detected(h)))
		return hpsa_scan_complete(h);
4546

4547 4548 4549 4550 4551 4552 4553 4554 4555 4556 4557 4558 4559 4560 4561 4562
	/* wait until any scan already in progress is finished. */
	while (1) {
		spin_lock_irqsave(&h->scan_lock, flags);
		if (h->scan_finished)
			break;
		spin_unlock_irqrestore(&h->scan_lock, flags);
		wait_event(h->scan_wait_queue, h->scan_finished);
		/* Note: We don't need to worry about a race between this
		 * thread and driver unload because the midlayer will
		 * have incremented the reference count, so unload won't
		 * happen if we're in here.
		 */
	}
	h->scan_finished = 0; /* mark scan as in progress */
	spin_unlock_irqrestore(&h->scan_lock, flags);

4563 4564
	if (unlikely(lockup_detected(h)))
		return hpsa_scan_complete(h);
4565

4566 4567
	hpsa_update_scsi_devices(h, h->scsi_host->host_no);

4568
	hpsa_scan_complete(h);
4569 4570
}

D
Don Brace 已提交
4571 4572
static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
{
4573 4574 4575 4576
	struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;

	if (!logical_drive)
		return -ENODEV;
D
Don Brace 已提交
4577 4578 4579

	if (qdepth < 1)
		qdepth = 1;
4580 4581 4582 4583
	else if (qdepth > logical_drive->queue_depth)
		qdepth = logical_drive->queue_depth;

	return scsi_change_queue_depth(sdev, qdepth);
D
Don Brace 已提交
4584 4585
}

4586 4587 4588 4589 4590 4591 4592 4593 4594 4595 4596 4597 4598
static int hpsa_scan_finished(struct Scsi_Host *sh,
	unsigned long elapsed_time)
{
	struct ctlr_info *h = shost_to_hba(sh);
	unsigned long flags;
	int finished;

	spin_lock_irqsave(&h->scan_lock, flags);
	finished = h->scan_finished;
	spin_unlock_irqrestore(&h->scan_lock, flags);
	return finished;
}

4599 4600 4601 4602 4603 4604 4605 4606 4607 4608
static void hpsa_unregister_scsi(struct ctlr_info *h)
{
	/* we are being forcibly unloaded, and may not refuse. */
	scsi_remove_host(h->scsi_host);
	scsi_host_put(h->scsi_host);
	h->scsi_host = NULL;
}

static int hpsa_register_scsi(struct ctlr_info *h)
{
4609 4610
	struct Scsi_Host *sh;
	int error;
4611

4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622
	sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
	if (sh == NULL)
		goto fail;

	sh->io_port = 0;
	sh->n_io_port = 0;
	sh->this_id = -1;
	sh->max_channel = 3;
	sh->max_cmd_len = MAX_COMMAND_SIZE;
	sh->max_lun = HPSA_MAX_LUN;
	sh->max_id = HPSA_MAX_LUN;
4623
	sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
4624
	sh->cmd_per_lun = sh->can_queue;
4625 4626 4627 4628 4629 4630 4631 4632 4633 4634 4635 4636 4637 4638 4639 4640 4641 4642 4643 4644
	sh->sg_tablesize = h->maxsgentries;
	h->scsi_host = sh;
	sh->hostdata[0] = (unsigned long) h;
	sh->irq = h->intr[h->intr_mode];
	sh->unique_id = sh->irq;
	error = scsi_add_host(sh, &h->pdev->dev);
	if (error)
		goto fail_host_put;
	scsi_scan_host(sh);
	return 0;

 fail_host_put:
	dev_err(&h->pdev->dev, "%s: scsi_add_host"
		" failed for controller %d\n", __func__, h->ctlr);
	scsi_host_put(sh);
	return error;
 fail:
	dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
		" failed for controller %d\n", __func__, h->ctlr);
	return -ENOMEM;
4645 4646 4647 4648 4649
}

static int wait_for_device_to_become_ready(struct ctlr_info *h,
	unsigned char lunaddr[])
{
4650
	int rc;
4651 4652 4653 4654
	int count = 0;
	int waittime = 1; /* seconds */
	struct CommandList *c;

4655
	c = cmd_alloc(h);
4656 4657 4658 4659 4660 4661 4662 4663 4664 4665 4666 4667 4668 4669
	if (!c) {
		dev_warn(&h->pdev->dev, "out of memory in "
			"wait_for_device_to_become_ready.\n");
		return IO_ERROR;
	}

	/* Send test unit ready until device ready, or give up. */
	while (count < HPSA_TUR_RETRY_LIMIT) {

		/* Wait for a bit.  do this first, because if we send
		 * the TUR right away, the reset will just abort it.
		 */
		msleep(1000 * waittime);
		count++;
4670
		rc = 0; /* Device ready. */
4671 4672 4673 4674 4675

		/* Increase wait time with each try, up to a point. */
		if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
			waittime = waittime * 2;

4676 4677 4678
		/* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
		(void) fill_cmd(c, TEST_UNIT_READY, h,
				NULL, 0, 0, lunaddr, TYPE_CMD);
4679 4680 4681 4682
		rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
						NO_TIMEOUT);
		if (rc)
			goto do_it_again;
4683 4684 4685 4686 4687 4688 4689 4690 4691 4692
		/* no unmap needed here because no data xfer. */

		if (c->err_info->CommandStatus == CMD_SUCCESS)
			break;

		if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
			c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
			(c->err_info->SenseInfo[2] == NO_SENSE ||
			c->err_info->SenseInfo[2] == UNIT_ATTENTION))
			break;
4693
do_it_again:
4694 4695 4696 4697 4698 4699 4700 4701 4702 4703
		dev_warn(&h->pdev->dev, "waiting %d secs "
			"for device to become ready.\n", waittime);
		rc = 1; /* device not ready. */
	}

	if (rc)
		dev_warn(&h->pdev->dev, "giving up on device.\n");
	else
		dev_warn(&h->pdev->dev, "device is ready.\n");

4704
	cmd_free(h, c);
4705 4706 4707 4708 4709 4710 4711 4712 4713 4714 4715 4716 4717 4718 4719 4720
	return rc;
}

/* Need at least one of these error handlers to keep ../scsi/hosts.c from
 * complaining.  Doing a host- or bus-reset can't do anything good here.
 */
static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
{
	int rc;
	struct ctlr_info *h;
	struct hpsa_scsi_dev_t *dev;

	/* find the controller to which the command to be aborted was sent */
	h = sdev_to_hba(scsicmd->device);
	if (h == NULL) /* paranoia */
		return FAILED;
4721 4722 4723 4724

	if (lockup_detected(h))
		return FAILED;

4725 4726 4727 4728 4729 4730
	dev = scsicmd->device->hostdata;
	if (!dev) {
		dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
			"device lookup failed.\n");
		return FAILED;
	}
4731 4732 4733 4734 4735 4736 4737 4738 4739 4740 4741 4742 4743 4744 4745 4746 4747 4748 4749 4750 4751

	/* if controller locked up, we can guarantee command won't complete */
	if (lockup_detected(h)) {
		dev_warn(&h->pdev->dev,
			"scsi %d:%d:%d:%d RESET FAILED, lockup detected\n",
			h->scsi_host->host_no, dev->bus, dev->target,
			dev->lun);
		return FAILED;
	}

	/* this reset request might be the result of a lockup; check */
	if (detect_controller_lockup(h)) {
		dev_warn(&h->pdev->dev,
			 "scsi %d:%d:%d:%d RESET FAILED, new lockup detected\n",
			 h->scsi_host->host_no, dev->bus, dev->target,
			 dev->lun);
		return FAILED;
	}

	hpsa_show_dev_msg(KERN_WARNING, h, dev, "resetting");

4752
	/* send a reset to the SCSI LUN which the command was sent to */
4753 4754
	rc = hpsa_send_reset(h, dev->scsi3addr, HPSA_RESET_TYPE_LUN,
			     DEFAULT_REPLY_QUEUE);
4755 4756 4757
	if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
		return SUCCESS;

4758 4759 4760
	dev_warn(&h->pdev->dev,
		"scsi %d:%d:%d:%d reset failed\n",
		h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4761 4762 4763
	return FAILED;
}

4764 4765 4766 4767 4768 4769 4770 4771 4772 4773 4774 4775 4776 4777 4778
static void swizzle_abort_tag(u8 *tag)
{
	u8 original_tag[8];

	memcpy(original_tag, tag, 8);
	tag[0] = original_tag[3];
	tag[1] = original_tag[2];
	tag[2] = original_tag[1];
	tag[3] = original_tag[0];
	tag[4] = original_tag[7];
	tag[5] = original_tag[6];
	tag[6] = original_tag[5];
	tag[7] = original_tag[4];
}

4779
static void hpsa_get_tag(struct ctlr_info *h,
D
Don Brace 已提交
4780
	struct CommandList *c, __le32 *taglower, __le32 *tagupper)
4781
{
D
Don Brace 已提交
4782
	u64 tag;
4783 4784 4785
	if (c->cmd_type == CMD_IOACCEL1) {
		struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
			&h->ioaccel_cmd_pool[c->cmdindex];
D
Don Brace 已提交
4786 4787 4788
		tag = le64_to_cpu(cm1->tag);
		*tagupper = cpu_to_le32(tag >> 32);
		*taglower = cpu_to_le32(tag);
4789 4790 4791 4792 4793
		return;
	}
	if (c->cmd_type == CMD_IOACCEL2) {
		struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
			&h->ioaccel2_cmd_pool[c->cmdindex];
4794 4795 4796
		/* upper tag not used in ioaccel2 mode */
		memset(tagupper, 0, sizeof(*tagupper));
		*taglower = cm2->Tag;
4797
		return;
4798
	}
D
Don Brace 已提交
4799 4800 4801
	tag = le64_to_cpu(c->Header.tag);
	*tagupper = cpu_to_le32(tag >> 32);
	*taglower = cpu_to_le32(tag);
4802 4803
}

4804
static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
S
Stephen Cameron 已提交
4805
	struct CommandList *abort, int reply_queue)
4806 4807 4808 4809
{
	int rc = IO_OK;
	struct CommandList *c;
	struct ErrorInfo *ei;
D
Don Brace 已提交
4810
	__le32 tagupper, taglower;
4811

4812
	c = cmd_alloc(h);
4813
	if (c == NULL) {	/* trouble... */
4814
		dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
4815 4816 4817
		return -ENOMEM;
	}

4818
	/* fill_cmd can't fail here, no buffer to map */
S
Stephen Cameron 已提交
4819
	(void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
4820
		0, 0, scsi3addr, TYPE_MSG);
S
Stephen Cameron 已提交
4821
	if (h->needs_abort_tags_swizzled)
4822
		swizzle_abort_tag(&c->Request.CDB[4]);
4823
	(void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
4824
	hpsa_get_tag(h, abort, &taglower, &tagupper);
4825
	dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
4826
		__func__, tagupper, taglower);
4827 4828 4829 4830 4831 4832
	/* no unmap needed here because no data xfer. */

	ei = c->err_info;
	switch (ei->CommandStatus) {
	case CMD_SUCCESS:
		break;
4833 4834 4835
	case CMD_TMF_STATUS:
		rc = hpsa_evaluate_tmf_status(h, c);
		break;
4836 4837 4838 4839 4840
	case CMD_UNABORTABLE: /* Very common, don't make noise. */
		rc = -1;
		break;
	default:
		dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
4841
			__func__, tagupper, taglower);
4842
		hpsa_scsi_interpret_error(h, c);
4843 4844 4845
		rc = -1;
		break;
	}
4846
	cmd_free(h, c);
4847 4848
	dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
		__func__, tagupper, taglower);
4849 4850 4851
	return rc;
}

4852 4853 4854 4855 4856 4857 4858 4859
/* ioaccel2 path firmware cannot handle abort task requests.
 * Change abort requests to physical target reset, and send to the
 * address of the physical disk used for the ioaccel 2 command.
 * Return 0 on success (IO_OK)
 *	 -1 on failure
 */

static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
4860
	unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
4861 4862 4863 4864 4865 4866 4867 4868
{
	int rc = IO_OK;
	struct scsi_cmnd *scmd; /* scsi command within request being aborted */
	struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
	unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
	unsigned char *psa = &phys_scsi3addr[0];

	/* Get a pointer to the hpsa logical device. */
4869
	scmd = abort->scsi_cmd;
4870 4871 4872 4873 4874 4875 4876
	dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
	if (dev == NULL) {
		dev_warn(&h->pdev->dev,
			"Cannot abort: no device pointer for command.\n");
			return -1; /* not abortable */
	}

4877 4878
	if (h->raid_offload_debug > 0)
		dev_info(&h->pdev->dev,
4879
			"scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4880
			h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
4881
			"Reset as abort",
4882 4883 4884
			scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
			scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);

4885 4886 4887 4888 4889 4890 4891 4892 4893 4894 4895 4896 4897
	if (!dev->offload_enabled) {
		dev_warn(&h->pdev->dev,
			"Can't abort: device is not operating in HP SSD Smart Path mode.\n");
		return -1; /* not abortable */
	}

	/* Incoming scsi3addr is logical addr. We need physical disk addr. */
	if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
		dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
		return -1; /* not abortable */
	}

	/* send the reset */
4898 4899 4900 4901 4902
	if (h->raid_offload_debug > 0)
		dev_info(&h->pdev->dev,
			"Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
			psa[0], psa[1], psa[2], psa[3],
			psa[4], psa[5], psa[6], psa[7]);
4903
	rc = hpsa_send_reset(h, psa, HPSA_RESET_TYPE_TARGET, reply_queue);
4904 4905 4906 4907 4908 4909 4910 4911 4912 4913 4914 4915 4916 4917 4918 4919 4920 4921 4922 4923 4924 4925 4926 4927 4928 4929
	if (rc != 0) {
		dev_warn(&h->pdev->dev,
			"Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
			psa[0], psa[1], psa[2], psa[3],
			psa[4], psa[5], psa[6], psa[7]);
		return rc; /* failed to reset */
	}

	/* wait for device to recover */
	if (wait_for_device_to_become_ready(h, psa) != 0) {
		dev_warn(&h->pdev->dev,
			"Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
			psa[0], psa[1], psa[2], psa[3],
			psa[4], psa[5], psa[6], psa[7]);
		return -1;  /* failed to recover */
	}

	/* device recovered */
	dev_info(&h->pdev->dev,
		"Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
		psa[0], psa[1], psa[2], psa[3],
		psa[4], psa[5], psa[6], psa[7]);

	return rc; /* success */
}

4930
static int hpsa_send_abort_both_ways(struct ctlr_info *h,
4931
	unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
4932
{
4933 4934 4935 4936 4937 4938
	/* ioccelerator mode 2 commands should be aborted via the
	 * accelerated path, since RAID path is unaware of these commands,
	 * but underlying firmware can't handle abort TMF.
	 * Change abort to physical device reset.
	 */
	if (abort->cmd_type == CMD_IOACCEL2)
4939 4940
		return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr,
							abort, reply_queue);
S
Stephen Cameron 已提交
4941
	return hpsa_send_abort(h, scsi3addr, abort, reply_queue);
4942
}
4943

4944 4945 4946 4947 4948 4949 4950
/* Find out which reply queue a command was meant to return on */
static int hpsa_extract_reply_queue(struct ctlr_info *h,
					struct CommandList *c)
{
	if (c->cmd_type == CMD_IOACCEL2)
		return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
	return c->Header.ReplyQueue;
4951 4952
}

S
Stephen Cameron 已提交
4953 4954 4955 4956 4957 4958 4959 4960 4961 4962 4963 4964
/*
 * Limit concurrency of abort commands to prevent
 * over-subscription of commands
 */
static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
{
#define ABORT_CMD_WAIT_MSECS 5000
	return !wait_event_timeout(h->abort_cmd_wait_queue,
			atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
			msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
}

4965 4966 4967 4968 4969 4970 4971 4972 4973 4974 4975 4976 4977 4978
/* Send an abort for the specified command.
 *	If the device and controller support it,
 *		send a task abort request.
 */
static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
{

	int i, rc;
	struct ctlr_info *h;
	struct hpsa_scsi_dev_t *dev;
	struct CommandList *abort; /* pointer to command to be aborted */
	struct scsi_cmnd *as;	/* ptr to scsi cmd inside aborted command. */
	char msg[256];		/* For debug messaging. */
	int ml = 0;
D
Don Brace 已提交
4979
	__le32 tagupper, taglower;
4980 4981 4982 4983
	int refcount, reply_queue;

	if (sc == NULL)
		return FAILED;
4984

S
Stephen Cameron 已提交
4985 4986 4987
	if (sc->device == NULL)
		return FAILED;

4988 4989
	/* Find the controller of the command to be aborted */
	h = sdev_to_hba(sc->device);
S
Stephen Cameron 已提交
4990
	if (h == NULL)
4991 4992
		return FAILED;

4993 4994 4995 4996 4997
	/* Find the device of the command to be aborted */
	dev = sc->device->hostdata;
	if (!dev) {
		dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
				msg);
4998
		return FAILED;
4999 5000 5001 5002 5003 5004 5005 5006 5007 5008 5009 5010 5011 5012 5013
	}

	/* If controller locked up, we can guarantee command won't complete */
	if (lockup_detected(h)) {
		hpsa_show_dev_msg(KERN_WARNING, h, dev,
					"ABORT FAILED, lockup detected");
		return FAILED;
	}

	/* This is a good time to check if controller lockup has occurred */
	if (detect_controller_lockup(h)) {
		hpsa_show_dev_msg(KERN_WARNING, h, dev,
					"ABORT FAILED, new lockup detected");
		return FAILED;
	}
5014

5015 5016 5017 5018 5019 5020
	/* Check that controller supports some kind of task abort */
	if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
		!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
		return FAILED;

	memset(msg, 0, sizeof(msg));
5021
	ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s",
5022
		h->scsi_host->host_no, sc->device->channel,
5023 5024
		sc->device->id, sc->device->lun,
		"Aborting command");
5025 5026 5027 5028

	/* Get SCSI command to be aborted */
	abort = (struct CommandList *) sc->host_scribble;
	if (abort == NULL) {
5029 5030 5031 5032 5033 5034 5035
		/* This can happen if the command already completed. */
		return SUCCESS;
	}
	refcount = atomic_inc_return(&abort->refcount);
	if (refcount == 1) { /* Command is done already. */
		cmd_free(h, abort);
		return SUCCESS;
5036
	}
S
Stephen Cameron 已提交
5037 5038 5039 5040 5041 5042 5043 5044

	/* Don't bother trying the abort if we know it won't work. */
	if (abort->cmd_type != CMD_IOACCEL2 &&
		abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
		cmd_free(h, abort);
		return FAILED;
	}

5045
	hpsa_get_tag(h, abort, &taglower, &tagupper);
5046
	reply_queue = hpsa_extract_reply_queue(h, abort);
5047
	ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
5048
	as  = abort->scsi_cmd;
5049 5050 5051 5052
	if (as != NULL)
		ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
			as->cmnd[0], as->serial_number);
	dev_dbg(&h->pdev->dev, "%s\n", msg);
5053
	hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
5054 5055 5056 5057 5058
	/*
	 * Command is in flight, or possibly already completed
	 * by the firmware (but not to the scsi mid layer) but we can't
	 * distinguish which.  Send the abort down.
	 */
S
Stephen Cameron 已提交
5059 5060 5061 5062 5063 5064
	if (wait_for_available_abort_cmd(h)) {
		dev_warn(&h->pdev->dev,
			"Timed out waiting for an abort command to become available.\n");
		cmd_free(h, abort);
		return FAILED;
	}
5065
	rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort, reply_queue);
S
Stephen Cameron 已提交
5066 5067
	atomic_inc(&h->abort_cmds_available);
	wake_up_all(&h->abort_cmd_wait_queue);
5068
	if (rc != 0) {
5069 5070
		hpsa_show_dev_msg(KERN_WARNING, h, dev,
					"FAILED to abort command");
5071
		cmd_free(h, abort);
5072 5073 5074 5075 5076 5077 5078 5079 5080 5081 5082
		return FAILED;
	}
	dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);

	/* If the abort(s) above completed and actually aborted the
	 * command, then the command to be aborted should already be
	 * completed.  If not, wait around a bit more to see if they
	 * manage to complete normally.
	 */
#define ABORT_COMPLETE_WAIT_SECS 30
	for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
5083 5084 5085
		refcount = atomic_read(&abort->refcount);
		if (refcount < 2) {
			cmd_free(h, abort);
5086
			return SUCCESS;
5087 5088 5089
		} else {
			msleep(100);
		}
5090 5091 5092
	}
	dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
		msg, ABORT_COMPLETE_WAIT_SECS);
5093
	cmd_free(h, abort);
5094 5095 5096
	return FAILED;
}

5097 5098 5099 5100 5101 5102
/*
 * For operations that cannot sleep, a command block is allocated at init,
 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
 * which ones are free or in use.  Lock must be held when calling this.
 * cmd_free() is the complement.
 */
5103

5104 5105 5106
static struct CommandList *cmd_alloc(struct ctlr_info *h)
{
	struct CommandList *c;
5107
	int refcount, i;
5108
	unsigned long offset;
5109

5110 5111
	/*
	 * There is some *extremely* small but non-zero chance that that
5112 5113 5114 5115 5116 5117 5118 5119 5120
	 * multiple threads could get in here, and one thread could
	 * be scanning through the list of bits looking for a free
	 * one, but the free ones are always behind him, and other
	 * threads sneak in behind him and eat them before he can
	 * get to them, so that while there is always a free one, a
	 * very unlucky thread might be starved anyway, never able to
	 * beat the other threads.  In reality, this happens so
	 * infrequently as to be indistinguishable from never.
	 */
5121

5122
	offset = h->last_allocation; /* benignly racy */
5123 5124 5125 5126 5127 5128 5129 5130 5131 5132 5133 5134 5135 5136 5137 5138 5139
	for (;;) {
		i = find_next_zero_bit(h->cmd_pool_bits, h->nr_cmds, offset);
		if (unlikely(i == h->nr_cmds)) {
			offset = 0;
			continue;
		}
		c = h->cmd_pool + i;
		refcount = atomic_inc_return(&c->refcount);
		if (unlikely(refcount > 1)) {
			cmd_free(h, c); /* already in use */
			offset = (i + 1) % h->nr_cmds;
			continue;
		}
		set_bit(i & (BITS_PER_LONG - 1),
			h->cmd_pool_bits + (i / BITS_PER_LONG));
		break; /* it's ours now. */
	}
5140
	h->last_allocation = i; /* benignly racy */
5141
	hpsa_cmd_partial_init(h, i, c);
5142 5143 5144 5145 5146
	return c;
}

static void cmd_free(struct ctlr_info *h, struct CommandList *c)
{
5147 5148
	if (atomic_dec_and_test(&c->refcount)) {
		int i;
5149

5150 5151 5152 5153
		i = c - h->cmd_pool;
		clear_bit(i & (BITS_PER_LONG - 1),
			  h->cmd_pool_bits + (i / BITS_PER_LONG));
	}
5154 5155 5156 5157
}

#ifdef CONFIG_COMPAT

D
Don Brace 已提交
5158 5159
static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
	void __user *arg)
5160 5161 5162 5163 5164 5165 5166 5167
{
	IOCTL32_Command_struct __user *arg32 =
	    (IOCTL32_Command_struct __user *) arg;
	IOCTL_Command_struct arg64;
	IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
	int err;
	u32 cp;

5168
	memset(&arg64, 0, sizeof(arg64));
5169 5170 5171 5172 5173 5174 5175 5176 5177 5178 5179 5180 5181 5182 5183
	err = 0;
	err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
			   sizeof(arg64.LUN_info));
	err |= copy_from_user(&arg64.Request, &arg32->Request,
			   sizeof(arg64.Request));
	err |= copy_from_user(&arg64.error_info, &arg32->error_info,
			   sizeof(arg64.error_info));
	err |= get_user(arg64.buf_size, &arg32->buf_size);
	err |= get_user(cp, &arg32->buf);
	arg64.buf = compat_ptr(cp);
	err |= copy_to_user(p, &arg64, sizeof(arg64));

	if (err)
		return -EFAULT;

D
Don Brace 已提交
5184
	err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
5185 5186 5187 5188 5189 5190 5191 5192 5193 5194
	if (err)
		return err;
	err |= copy_in_user(&arg32->error_info, &p->error_info,
			 sizeof(arg32->error_info));
	if (err)
		return -EFAULT;
	return err;
}

static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
D
Don Brace 已提交
5195
	int cmd, void __user *arg)
5196 5197 5198 5199 5200 5201 5202 5203 5204
{
	BIG_IOCTL32_Command_struct __user *arg32 =
	    (BIG_IOCTL32_Command_struct __user *) arg;
	BIG_IOCTL_Command_struct arg64;
	BIG_IOCTL_Command_struct __user *p =
	    compat_alloc_user_space(sizeof(arg64));
	int err;
	u32 cp;

5205
	memset(&arg64, 0, sizeof(arg64));
5206 5207 5208 5209 5210 5211 5212 5213 5214 5215 5216 5217 5218 5219 5220 5221
	err = 0;
	err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
			   sizeof(arg64.LUN_info));
	err |= copy_from_user(&arg64.Request, &arg32->Request,
			   sizeof(arg64.Request));
	err |= copy_from_user(&arg64.error_info, &arg32->error_info,
			   sizeof(arg64.error_info));
	err |= get_user(arg64.buf_size, &arg32->buf_size);
	err |= get_user(arg64.malloc_size, &arg32->malloc_size);
	err |= get_user(cp, &arg32->buf);
	arg64.buf = compat_ptr(cp);
	err |= copy_to_user(p, &arg64, sizeof(arg64));

	if (err)
		return -EFAULT;

D
Don Brace 已提交
5222
	err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
5223 5224 5225 5226 5227 5228 5229 5230
	if (err)
		return err;
	err |= copy_in_user(&arg32->error_info, &p->error_info,
			 sizeof(arg32->error_info));
	if (err)
		return -EFAULT;
	return err;
}
5231

D
Don Brace 已提交
5232
static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5233 5234 5235 5236 5237 5238 5239 5240 5241 5242 5243 5244 5245 5246 5247 5248 5249 5250 5251 5252 5253 5254 5255 5256 5257 5258 5259 5260
{
	switch (cmd) {
	case CCISS_GETPCIINFO:
	case CCISS_GETINTINFO:
	case CCISS_SETINTINFO:
	case CCISS_GETNODENAME:
	case CCISS_SETNODENAME:
	case CCISS_GETHEARTBEAT:
	case CCISS_GETBUSTYPES:
	case CCISS_GETFIRMVER:
	case CCISS_GETDRIVVER:
	case CCISS_REVALIDVOLS:
	case CCISS_DEREGDISK:
	case CCISS_REGNEWDISK:
	case CCISS_REGNEWD:
	case CCISS_RESCANDISK:
	case CCISS_GETLUNINFO:
		return hpsa_ioctl(dev, cmd, arg);

	case CCISS_PASSTHRU32:
		return hpsa_ioctl32_passthru(dev, cmd, arg);
	case CCISS_BIG_PASSTHRU32:
		return hpsa_ioctl32_big_passthru(dev, cmd, arg);

	default:
		return -ENOIOCTLCMD;
	}
}
5261 5262 5263 5264 5265 5266 5267 5268 5269 5270 5271 5272 5273 5274 5275 5276 5277 5278 5279 5280 5281 5282 5283 5284 5285 5286 5287 5288 5289 5290 5291 5292 5293 5294 5295 5296 5297 5298 5299 5300 5301 5302 5303 5304 5305
#endif

static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
{
	struct hpsa_pci_info pciinfo;

	if (!argp)
		return -EINVAL;
	pciinfo.domain = pci_domain_nr(h->pdev->bus);
	pciinfo.bus = h->pdev->bus->number;
	pciinfo.dev_fn = h->pdev->devfn;
	pciinfo.board_id = h->board_id;
	if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
		return -EFAULT;
	return 0;
}

static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
{
	DriverVer_type DriverVer;
	unsigned char vmaj, vmin, vsubmin;
	int rc;

	rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
		&vmaj, &vmin, &vsubmin);
	if (rc != 3) {
		dev_info(&h->pdev->dev, "driver version string '%s' "
			"unrecognized.", HPSA_DRIVER_VERSION);
		vmaj = 0;
		vmin = 0;
		vsubmin = 0;
	}
	DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
	if (!argp)
		return -EINVAL;
	if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
		return -EFAULT;
	return 0;
}

static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
{
	IOCTL_Command_struct iocommand;
	struct CommandList *c;
	char *buff = NULL;
5306
	u64 temp64;
5307
	int rc = 0;
5308 5309 5310 5311 5312 5313 5314 5315 5316 5317 5318 5319 5320 5321 5322

	if (!argp)
		return -EINVAL;
	if (!capable(CAP_SYS_RAWIO))
		return -EPERM;
	if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
		return -EFAULT;
	if ((iocommand.buf_size < 1) &&
	    (iocommand.Request.Type.Direction != XFER_NONE)) {
		return -EINVAL;
	}
	if (iocommand.buf_size > 0) {
		buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
		if (buff == NULL)
			return -EFAULT;
5323
		if (iocommand.Request.Type.Direction & XFER_WRITE) {
5324 5325 5326
			/* Copy the data into the buffer we created */
			if (copy_from_user(buff, iocommand.buf,
				iocommand.buf_size)) {
5327 5328
				rc = -EFAULT;
				goto out_kfree;
5329 5330 5331
			}
		} else {
			memset(buff, 0, iocommand.buf_size);
5332
		}
5333
	}
5334
	c = cmd_alloc(h);
5335
	if (c == NULL) {
5336 5337
		rc = -ENOMEM;
		goto out_kfree;
5338 5339 5340 5341 5342 5343 5344
	}
	/* Fill in the command type */
	c->cmd_type = CMD_IOCTL_PEND;
	/* Fill in Command Header */
	c->Header.ReplyQueue = 0; /* unused in simple mode */
	if (iocommand.buf_size > 0) {	/* buffer to fill */
		c->Header.SGList = 1;
5345
		c->Header.SGTotal = cpu_to_le16(1);
5346 5347
	} else	{ /* no buffers to fill */
		c->Header.SGList = 0;
5348
		c->Header.SGTotal = cpu_to_le16(0);
5349 5350 5351 5352 5353 5354 5355 5356 5357
	}
	memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));

	/* Fill in Request block */
	memcpy(&c->Request, &iocommand.Request,
		sizeof(c->Request));

	/* Fill in the scatter gather information */
	if (iocommand.buf_size > 0) {
5358
		temp64 = pci_map_single(h->pdev, buff,
5359
			iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
5360 5361 5362
		if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
			c->SG[0].Addr = cpu_to_le64(0);
			c->SG[0].Len = cpu_to_le32(0);
5363 5364 5365
			rc = -ENOMEM;
			goto out;
		}
5366 5367 5368
		c->SG[0].Addr = cpu_to_le64(temp64);
		c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
		c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
5369
	}
5370
	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
5371 5372
	if (iocommand.buf_size > 0)
		hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
5373
	check_ioctl_unit_attention(h, c);
5374 5375 5376 5377
	if (rc) {
		rc = -EIO;
		goto out;
	}
5378 5379 5380 5381 5382

	/* Copy the error information out */
	memcpy(&iocommand.error_info, c->err_info,
		sizeof(iocommand.error_info));
	if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
5383 5384
		rc = -EFAULT;
		goto out;
5385
	}
5386
	if ((iocommand.Request.Type.Direction & XFER_READ) &&
5387
		iocommand.buf_size > 0) {
5388 5389
		/* Copy the data out of the buffer we created */
		if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
5390 5391
			rc = -EFAULT;
			goto out;
5392 5393
		}
	}
5394
out:
5395
	cmd_free(h, c);
5396 5397 5398
out_kfree:
	kfree(buff);
	return rc;
5399 5400 5401 5402 5403 5404 5405 5406
}

static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
{
	BIG_IOCTL_Command_struct *ioc;
	struct CommandList *c;
	unsigned char **buff = NULL;
	int *buff_size = NULL;
5407
	u64 temp64;
5408 5409
	BYTE sg_used = 0;
	int status = 0;
5410 5411
	u32 left;
	u32 sz;
5412 5413 5414 5415 5416 5417 5418 5419 5420 5421 5422 5423 5424 5425 5426 5427 5428 5429 5430 5431 5432 5433 5434 5435 5436 5437
	BYTE __user *data_ptr;

	if (!argp)
		return -EINVAL;
	if (!capable(CAP_SYS_RAWIO))
		return -EPERM;
	ioc = (BIG_IOCTL_Command_struct *)
	    kmalloc(sizeof(*ioc), GFP_KERNEL);
	if (!ioc) {
		status = -ENOMEM;
		goto cleanup1;
	}
	if (copy_from_user(ioc, argp, sizeof(*ioc))) {
		status = -EFAULT;
		goto cleanup1;
	}
	if ((ioc->buf_size < 1) &&
	    (ioc->Request.Type.Direction != XFER_NONE)) {
		status = -EINVAL;
		goto cleanup1;
	}
	/* Check kmalloc limits  using all SGs */
	if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
		status = -EINVAL;
		goto cleanup1;
	}
5438
	if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
5439 5440 5441
		status = -EINVAL;
		goto cleanup1;
	}
5442
	buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
5443 5444 5445 5446
	if (!buff) {
		status = -ENOMEM;
		goto cleanup1;
	}
5447
	buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
5448 5449 5450 5451 5452 5453 5454 5455 5456 5457 5458 5459 5460 5461
	if (!buff_size) {
		status = -ENOMEM;
		goto cleanup1;
	}
	left = ioc->buf_size;
	data_ptr = ioc->buf;
	while (left) {
		sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
		buff_size[sg_used] = sz;
		buff[sg_used] = kmalloc(sz, GFP_KERNEL);
		if (buff[sg_used] == NULL) {
			status = -ENOMEM;
			goto cleanup1;
		}
5462
		if (ioc->Request.Type.Direction & XFER_WRITE) {
5463
			if (copy_from_user(buff[sg_used], data_ptr, sz)) {
5464
				status = -EFAULT;
5465 5466 5467 5468 5469 5470 5471 5472
				goto cleanup1;
			}
		} else
			memset(buff[sg_used], 0, sz);
		left -= sz;
		data_ptr += sz;
		sg_used++;
	}
5473
	c = cmd_alloc(h);
5474 5475 5476 5477 5478 5479
	if (c == NULL) {
		status = -ENOMEM;
		goto cleanup1;
	}
	c->cmd_type = CMD_IOCTL_PEND;
	c->Header.ReplyQueue = 0;
5480 5481
	c->Header.SGList = (u8) sg_used;
	c->Header.SGTotal = cpu_to_le16(sg_used);
5482 5483 5484 5485 5486
	memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
	memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
	if (ioc->buf_size > 0) {
		int i;
		for (i = 0; i < sg_used; i++) {
5487
			temp64 = pci_map_single(h->pdev, buff[i],
5488
				    buff_size[i], PCI_DMA_BIDIRECTIONAL);
5489 5490 5491 5492
			if (dma_mapping_error(&h->pdev->dev,
							(dma_addr_t) temp64)) {
				c->SG[i].Addr = cpu_to_le64(0);
				c->SG[i].Len = cpu_to_le32(0);
5493 5494 5495
				hpsa_pci_unmap(h->pdev, c, i,
					PCI_DMA_BIDIRECTIONAL);
				status = -ENOMEM;
5496
				goto cleanup0;
5497
			}
5498 5499 5500
			c->SG[i].Addr = cpu_to_le64(temp64);
			c->SG[i].Len = cpu_to_le32(buff_size[i]);
			c->SG[i].Ext = cpu_to_le32(0);
5501
		}
5502
		c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
5503
	}
5504
	status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
5505 5506
	if (sg_used)
		hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
5507
	check_ioctl_unit_attention(h, c);
5508 5509 5510 5511 5512
	if (status) {
		status = -EIO;
		goto cleanup0;
	}

5513 5514 5515 5516
	/* Copy the error information out */
	memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
	if (copy_to_user(argp, ioc, sizeof(*ioc))) {
		status = -EFAULT;
5517
		goto cleanup0;
5518
	}
5519
	if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
D
Don Brace 已提交
5520 5521
		int i;

5522 5523 5524 5525 5526
		/* Copy the data out of the buffer we created */
		BYTE __user *ptr = ioc->buf;
		for (i = 0; i < sg_used; i++) {
			if (copy_to_user(ptr, buff[i], buff_size[i])) {
				status = -EFAULT;
5527
				goto cleanup0;
5528 5529 5530 5531 5532
			}
			ptr += buff_size[i];
		}
	}
	status = 0;
5533
cleanup0:
5534
	cmd_free(h, c);
5535 5536
cleanup1:
	if (buff) {
D
Don Brace 已提交
5537 5538
		int i;

5539 5540 5541 5542 5543 5544 5545 5546 5547 5548 5549 5550 5551 5552 5553 5554
		for (i = 0; i < sg_used; i++)
			kfree(buff[i]);
		kfree(buff);
	}
	kfree(buff_size);
	kfree(ioc);
	return status;
}

static void check_ioctl_unit_attention(struct ctlr_info *h,
	struct CommandList *c)
{
	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
			c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
		(void) check_for_unit_attention(h, c);
}
5555

5556 5557 5558
/*
 * ioctl
 */
D
Don Brace 已提交
5559
static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5560 5561 5562
{
	struct ctlr_info *h;
	void __user *argp = (void __user *)arg;
5563
	int rc;
5564 5565 5566 5567 5568 5569 5570

	h = sdev_to_hba(dev);

	switch (cmd) {
	case CCISS_DEREGDISK:
	case CCISS_REGNEWDISK:
	case CCISS_REGNEWD:
5571
		hpsa_scan_start(h->scsi_host);
5572 5573 5574 5575 5576 5577
		return 0;
	case CCISS_GETPCIINFO:
		return hpsa_getpciinfo_ioctl(h, argp);
	case CCISS_GETDRIVVER:
		return hpsa_getdrivver_ioctl(h, argp);
	case CCISS_PASSTHRU:
5578
		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
5579 5580
			return -EAGAIN;
		rc = hpsa_passthru_ioctl(h, argp);
5581
		atomic_inc(&h->passthru_cmds_avail);
5582
		return rc;
5583
	case CCISS_BIG_PASSTHRU:
5584
		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
5585 5586
			return -EAGAIN;
		rc = hpsa_big_passthru_ioctl(h, argp);
5587
		atomic_inc(&h->passthru_cmds_avail);
5588
		return rc;
5589 5590 5591 5592 5593
	default:
		return -ENOTTY;
	}
}

5594 5595
static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
				u8 reset_type)
5596 5597 5598 5599 5600 5601
{
	struct CommandList *c;

	c = cmd_alloc(h);
	if (!c)
		return -ENOMEM;
5602 5603
	/* fill_cmd can't fail here, no data buffer to map */
	(void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
5604 5605 5606 5607 5608 5609 5610 5611 5612 5613 5614
		RAID_CTLR_LUNID, TYPE_MSG);
	c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
	c->waiting = NULL;
	enqueue_cmd_and_start_io(h, c);
	/* Don't wait for completion, the reset won't complete.  Don't free
	 * the command either.  This is the last command we will send before
	 * re-initializing everything, so it doesn't matter and won't leak.
	 */
	return 0;
}

5615
static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
5616
	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
5617 5618 5619
	int cmd_type)
{
	int pci_dir = XFER_NONE;
S
Stephen Cameron 已提交
5620
	u64 tag; /* for commands to be aborted */
5621 5622 5623 5624 5625

	c->cmd_type = CMD_IOCTL_PEND;
	c->Header.ReplyQueue = 0;
	if (buff != NULL && size > 0) {
		c->Header.SGList = 1;
5626
		c->Header.SGTotal = cpu_to_le16(1);
5627 5628
	} else {
		c->Header.SGList = 0;
5629
		c->Header.SGTotal = cpu_to_le16(0);
5630 5631 5632 5633 5634 5635 5636
	}
	memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);

	if (cmd_type == TYPE_CMD) {
		switch (cmd) {
		case HPSA_INQUIRY:
			/* are we trying to read a vital product page */
5637
			if (page_code & VPD_PAGE) {
5638
				c->Request.CDB[1] = 0x01;
5639
				c->Request.CDB[2] = (page_code & 0xff);
5640 5641
			}
			c->Request.CDBLen = 6;
5642 5643
			c->Request.type_attr_dir =
				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5644 5645 5646 5647 5648 5649 5650 5651 5652 5653
			c->Request.Timeout = 0;
			c->Request.CDB[0] = HPSA_INQUIRY;
			c->Request.CDB[4] = size & 0xFF;
			break;
		case HPSA_REPORT_LOG:
		case HPSA_REPORT_PHYS:
			/* Talking to controller so It's a physical command
			   mode = 00 target = 0.  Nothing to write.
			 */
			c->Request.CDBLen = 12;
5654 5655
			c->Request.type_attr_dir =
				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5656 5657 5658 5659 5660 5661 5662 5663 5664
			c->Request.Timeout = 0;
			c->Request.CDB[0] = cmd;
			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
			c->Request.CDB[7] = (size >> 16) & 0xFF;
			c->Request.CDB[8] = (size >> 8) & 0xFF;
			c->Request.CDB[9] = size & 0xFF;
			break;
		case HPSA_CACHE_FLUSH:
			c->Request.CDBLen = 12;
5665 5666 5667
			c->Request.type_attr_dir =
					TYPE_ATTR_DIR(cmd_type,
						ATTR_SIMPLE, XFER_WRITE);
5668 5669 5670
			c->Request.Timeout = 0;
			c->Request.CDB[0] = BMIC_WRITE;
			c->Request.CDB[6] = BMIC_CACHE_FLUSH;
5671 5672
			c->Request.CDB[7] = (size >> 8) & 0xFF;
			c->Request.CDB[8] = size & 0xFF;
5673 5674 5675
			break;
		case TEST_UNIT_READY:
			c->Request.CDBLen = 6;
5676 5677
			c->Request.type_attr_dir =
				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5678 5679
			c->Request.Timeout = 0;
			break;
5680 5681
		case HPSA_GET_RAID_MAP:
			c->Request.CDBLen = 12;
5682 5683
			c->Request.type_attr_dir =
				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5684 5685 5686 5687 5688 5689 5690 5691
			c->Request.Timeout = 0;
			c->Request.CDB[0] = HPSA_CISS_READ;
			c->Request.CDB[1] = cmd;
			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
			c->Request.CDB[7] = (size >> 16) & 0xFF;
			c->Request.CDB[8] = (size >> 8) & 0xFF;
			c->Request.CDB[9] = size & 0xFF;
			break;
5692 5693
		case BMIC_SENSE_CONTROLLER_PARAMETERS:
			c->Request.CDBLen = 10;
5694 5695
			c->Request.type_attr_dir =
				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5696 5697 5698 5699 5700 5701
			c->Request.Timeout = 0;
			c->Request.CDB[0] = BMIC_READ;
			c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
			c->Request.CDB[7] = (size >> 16) & 0xFF;
			c->Request.CDB[8] = (size >> 8) & 0xFF;
			break;
5702 5703 5704 5705 5706 5707 5708 5709 5710 5711
		case BMIC_IDENTIFY_PHYSICAL_DEVICE:
			c->Request.CDBLen = 10;
			c->Request.type_attr_dir =
				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
			c->Request.Timeout = 0;
			c->Request.CDB[0] = BMIC_READ;
			c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
			c->Request.CDB[7] = (size >> 16) & 0xFF;
			c->Request.CDB[8] = (size >> 8) & 0XFF;
			break;
5712 5713 5714
		default:
			dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
			BUG();
5715
			return -1;
5716 5717 5718 5719 5720 5721
		}
	} else if (cmd_type == TYPE_MSG) {
		switch (cmd) {

		case  HPSA_DEVICE_RESET_MSG:
			c->Request.CDBLen = 16;
5722 5723
			c->Request.type_attr_dir =
				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5724
			c->Request.Timeout = 0; /* Don't time out */
5725 5726
			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
			c->Request.CDB[0] =  cmd;
5727
			c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
5728 5729 5730 5731 5732 5733
			/* If bytes 4-7 are zero, it means reset the */
			/* LunID device */
			c->Request.CDB[4] = 0x00;
			c->Request.CDB[5] = 0x00;
			c->Request.CDB[6] = 0x00;
			c->Request.CDB[7] = 0x00;
5734 5735
			break;
		case  HPSA_ABORT_MSG:
S
Stephen Cameron 已提交
5736
			memcpy(&tag, buff, sizeof(tag));
D
Don Brace 已提交
5737
			dev_dbg(&h->pdev->dev,
S
Stephen Cameron 已提交
5738 5739
				"Abort Tag:0x%016llx using rqst Tag:0x%016llx",
				tag, c->Header.tag);
5740
			c->Request.CDBLen = 16;
5741 5742 5743
			c->Request.type_attr_dir =
					TYPE_ATTR_DIR(cmd_type,
						ATTR_SIMPLE, XFER_WRITE);
5744 5745 5746 5747 5748 5749
			c->Request.Timeout = 0; /* Don't time out */
			c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
			c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
			c->Request.CDB[2] = 0x00; /* reserved */
			c->Request.CDB[3] = 0x00; /* reserved */
			/* Tag to abort goes in CDB[4]-CDB[11] */
S
Stephen Cameron 已提交
5750
			memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
5751 5752 5753 5754
			c->Request.CDB[12] = 0x00; /* reserved */
			c->Request.CDB[13] = 0x00; /* reserved */
			c->Request.CDB[14] = 0x00; /* reserved */
			c->Request.CDB[15] = 0x00; /* reserved */
5755 5756 5757 5758 5759 5760 5761 5762 5763 5764 5765
		break;
		default:
			dev_warn(&h->pdev->dev, "unknown message type %d\n",
				cmd);
			BUG();
		}
	} else {
		dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
		BUG();
	}

5766
	switch (GET_DIR(c->Request.type_attr_dir)) {
5767 5768 5769 5770 5771 5772 5773 5774 5775 5776 5777 5778
	case XFER_READ:
		pci_dir = PCI_DMA_FROMDEVICE;
		break;
	case XFER_WRITE:
		pci_dir = PCI_DMA_TODEVICE;
		break;
	case XFER_NONE:
		pci_dir = PCI_DMA_NONE;
		break;
	default:
		pci_dir = PCI_DMA_BIDIRECTIONAL;
	}
5779 5780 5781
	if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
		return -1;
	return 0;
5782 5783 5784 5785 5786 5787 5788 5789 5790
}

/*
 * Map (physical) PCI mem into (virtual) kernel space
 */
static void __iomem *remap_pci_mem(ulong base, ulong size)
{
	ulong page_base = ((ulong) base) & PAGE_MASK;
	ulong page_offs = ((ulong) base) - page_base;
5791 5792
	void __iomem *page_remapped = ioremap_nocache(page_base,
		page_offs + size);
5793 5794 5795 5796

	return page_remapped ? (page_remapped + page_offs) : NULL;
}

5797
static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
5798
{
5799
	return h->access.command_completed(h, q);
5800 5801
}

5802
static inline bool interrupt_pending(struct ctlr_info *h)
5803 5804 5805 5806 5807 5808
{
	return h->access.intr_pending(h);
}

static inline long interrupt_not_for_us(struct ctlr_info *h)
{
5809 5810
	return (h->access.intr_pending(h) == 0) ||
		(h->interrupts_enabled == 0);
5811 5812
}

5813 5814
static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
	u32 raw_tag)
5815 5816 5817 5818 5819 5820 5821 5822
{
	if (unlikely(tag_index >= h->nr_cmds)) {
		dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
		return 1;
	}
	return 0;
}

5823
static inline void finish_cmd(struct CommandList *c)
5824
{
5825
	dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
5826 5827
	if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
			|| c->cmd_type == CMD_IOACCEL2))
5828
		complete_scsi_command(c);
5829 5830
	else if (c->cmd_type == CMD_IOCTL_PEND)
		complete(c->waiting);
5831 5832
}

5833 5834

static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
5835
{
5836 5837
#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
#define HPSA_SIMPLE_ERROR_BITS 0x03
5838
	if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
5839 5840
		return tag & ~HPSA_SIMPLE_ERROR_BITS;
	return tag & ~HPSA_PERF_ERROR_BITS;
5841 5842
}

5843
/* process completion of an indexed ("direct lookup") command */
5844
static inline void process_indexed_cmd(struct ctlr_info *h,
5845 5846 5847 5848 5849
	u32 raw_tag)
{
	u32 tag_index;
	struct CommandList *c;

5850
	tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
5851 5852 5853 5854
	if (!bad_tag(h, tag_index, raw_tag)) {
		c = h->cmd_pool + tag_index;
		finish_cmd(c);
	}
5855 5856
}

5857 5858 5859 5860 5861 5862 5863 5864 5865 5866 5867 5868 5869 5870 5871 5872 5873 5874 5875
/* Some controllers, like p400, will give us one interrupt
 * after a soft reset, even if we turned interrupts off.
 * Only need to check for this in the hpsa_xxx_discard_completions
 * functions.
 */
static int ignore_bogus_interrupt(struct ctlr_info *h)
{
	if (likely(!reset_devices))
		return 0;

	if (likely(h->interrupts_enabled))
		return 0;

	dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
		"(known firmware bug.)  Ignoring.\n");

	return 1;
}

5876 5877 5878 5879 5880 5881
/*
 * Convert &h->q[x] (passed to interrupt handlers) back to h.
 * Relies on (h-q[x] == x) being true for x such that
 * 0 <= x < MAX_REPLY_QUEUES.
 */
static struct ctlr_info *queue_to_hba(u8 *queue)
5882
{
5883 5884 5885 5886 5887 5888 5889
	return container_of((queue - *queue), struct ctlr_info, q[0]);
}

static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
{
	struct ctlr_info *h = queue_to_hba(queue);
	u8 q = *(u8 *) queue;
5890 5891 5892 5893 5894 5895 5896
	u32 raw_tag;

	if (ignore_bogus_interrupt(h))
		return IRQ_NONE;

	if (interrupt_not_for_us(h))
		return IRQ_NONE;
5897
	h->last_intr_timestamp = get_jiffies_64();
5898
	while (interrupt_pending(h)) {
5899
		raw_tag = get_next_completion(h, q);
5900
		while (raw_tag != FIFO_EMPTY)
5901
			raw_tag = next_command(h, q);
5902 5903 5904 5905
	}
	return IRQ_HANDLED;
}

5906
static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
5907
{
5908
	struct ctlr_info *h = queue_to_hba(queue);
5909
	u32 raw_tag;
5910
	u8 q = *(u8 *) queue;
5911 5912 5913 5914

	if (ignore_bogus_interrupt(h))
		return IRQ_NONE;

5915
	h->last_intr_timestamp = get_jiffies_64();
5916
	raw_tag = get_next_completion(h, q);
5917
	while (raw_tag != FIFO_EMPTY)
5918
		raw_tag = next_command(h, q);
5919 5920 5921
	return IRQ_HANDLED;
}

5922
static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
5923
{
5924
	struct ctlr_info *h = queue_to_hba((u8 *) queue);
5925
	u32 raw_tag;
5926
	u8 q = *(u8 *) queue;
5927 5928 5929

	if (interrupt_not_for_us(h))
		return IRQ_NONE;
5930
	h->last_intr_timestamp = get_jiffies_64();
5931
	while (interrupt_pending(h)) {
5932
		raw_tag = get_next_completion(h, q);
5933
		while (raw_tag != FIFO_EMPTY) {
5934
			process_indexed_cmd(h, raw_tag);
5935
			raw_tag = next_command(h, q);
5936 5937 5938 5939 5940
		}
	}
	return IRQ_HANDLED;
}

5941
static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
5942
{
5943
	struct ctlr_info *h = queue_to_hba(queue);
5944
	u32 raw_tag;
5945
	u8 q = *(u8 *) queue;
5946

5947
	h->last_intr_timestamp = get_jiffies_64();
5948
	raw_tag = get_next_completion(h, q);
5949
	while (raw_tag != FIFO_EMPTY) {
5950
		process_indexed_cmd(h, raw_tag);
5951
		raw_tag = next_command(h, q);
5952 5953 5954 5955
	}
	return IRQ_HANDLED;
}

5956 5957 5958 5959
/* Send a message CDB to the firmware. Careful, this only works
 * in simple mode, not performant mode due to the tag lookup.
 * We only ever use this immediately after a controller reset.
 */
5960 5961
static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
			unsigned char type)
5962 5963 5964 5965 5966 5967 5968 5969 5970 5971
{
	struct Command {
		struct CommandListHeader CommandHeader;
		struct RequestBlock Request;
		struct ErrDescriptor ErrorDescriptor;
	};
	struct Command *cmd;
	static const size_t cmd_sz = sizeof(*cmd) +
					sizeof(cmd->ErrorDescriptor);
	dma_addr_t paddr64;
D
Don Brace 已提交
5972 5973
	__le32 paddr32;
	u32 tag;
5974 5975 5976 5977 5978 5979 5980 5981 5982 5983 5984 5985 5986 5987
	void __iomem *vaddr;
	int i, err;

	vaddr = pci_ioremap_bar(pdev, 0);
	if (vaddr == NULL)
		return -ENOMEM;

	/* The Inbound Post Queue only accepts 32-bit physical addresses for the
	 * CCISS commands, so they must be allocated from the lower 4GiB of
	 * memory.
	 */
	err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
	if (err) {
		iounmap(vaddr);
5988
		return err;
5989 5990 5991 5992 5993 5994 5995 5996 5997 5998 5999 6000
	}

	cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
	if (cmd == NULL) {
		iounmap(vaddr);
		return -ENOMEM;
	}

	/* This must fit, because of the 32-bit consistent DMA mask.  Also,
	 * although there's no guarantee, we assume that the address is at
	 * least 4-byte aligned (most likely, it's page-aligned).
	 */
D
Don Brace 已提交
6001
	paddr32 = cpu_to_le32(paddr64);
6002 6003 6004

	cmd->CommandHeader.ReplyQueue = 0;
	cmd->CommandHeader.SGList = 0;
6005
	cmd->CommandHeader.SGTotal = cpu_to_le16(0);
D
Don Brace 已提交
6006
	cmd->CommandHeader.tag = cpu_to_le64(paddr64);
6007 6008 6009
	memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);

	cmd->Request.CDBLen = 16;
6010 6011
	cmd->Request.type_attr_dir =
			TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
6012 6013 6014 6015
	cmd->Request.Timeout = 0; /* Don't time out */
	cmd->Request.CDB[0] = opcode;
	cmd->Request.CDB[1] = type;
	memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
6016
	cmd->ErrorDescriptor.Addr =
D
Don Brace 已提交
6017
			cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
6018
	cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
6019

D
Don Brace 已提交
6020
	writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
6021 6022 6023

	for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
		tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
D
Don Brace 已提交
6024
		if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
6025 6026 6027 6028 6029 6030 6031 6032 6033 6034 6035 6036 6037 6038 6039 6040 6041 6042 6043 6044 6045 6046 6047 6048 6049 6050 6051 6052 6053 6054
			break;
		msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
	}

	iounmap(vaddr);

	/* we leak the DMA buffer here ... no choice since the controller could
	 *  still complete the command.
	 */
	if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
		dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
			opcode, type);
		return -ETIMEDOUT;
	}

	pci_free_consistent(pdev, cmd_sz, cmd, paddr64);

	if (tag & HPSA_ERROR_BIT) {
		dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
			opcode, type);
		return -EIO;
	}

	dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
		opcode, type);
	return 0;
}

#define hpsa_noop(p) hpsa_message(p, 3, 0)

6055
static int hpsa_controller_hard_reset(struct pci_dev *pdev,
D
Don Brace 已提交
6056
	void __iomem *vaddr, u32 use_doorbell)
6057 6058 6059 6060 6061 6062 6063 6064
{

	if (use_doorbell) {
		/* For everything after the P600, the PCI power state method
		 * of resetting the controller doesn't work, so we have this
		 * other way using the doorbell register.
		 */
		dev_info(&pdev->dev, "using doorbell to reset controller\n");
6065
		writel(use_doorbell, vaddr + SA5_DOORBELL);
6066

6067
		/* PMC hardware guys tell us we need a 10 second delay after
6068 6069 6070 6071
		 * doorbell reset and before any attempt to talk to the board
		 * at all to ensure that this actually works and doesn't fall
		 * over in some weird corner cases.
		 */
6072
		msleep(10000);
6073 6074 6075 6076 6077 6078 6079 6080 6081
	} else { /* Try to do it the PCI power state way */

		/* Quoting from the Open CISS Specification: "The Power
		 * Management Control/Status Register (CSR) controls the power
		 * state of the device.  The normal operating state is D0,
		 * CSR=00h.  The software off state is D3, CSR=03h.  To reset
		 * the controller, place the interface device in D3 then to D0,
		 * this causes a secondary PCI reset which will reset the
		 * controller." */
6082 6083 6084

		int rc = 0;

6085
		dev_info(&pdev->dev, "using PCI PM to reset controller\n");
6086

6087
		/* enter the D3hot power management state */
6088 6089 6090
		rc = pci_set_power_state(pdev, PCI_D3hot);
		if (rc)
			return rc;
6091 6092 6093 6094

		msleep(500);

		/* enter the D0 power management state */
6095 6096 6097
		rc = pci_set_power_state(pdev, PCI_D0);
		if (rc)
			return rc;
6098 6099 6100 6101 6102 6103 6104

		/*
		 * The P600 requires a small delay when changing states.
		 * Otherwise we may think the board did not reset and we bail.
		 * This for kdump only and is particular to the P600.
		 */
		msleep(500);
6105 6106 6107 6108
	}
	return 0;
}

6109
static void init_driver_version(char *driver_version, int len)
6110 6111
{
	memset(driver_version, 0, len);
6112
	strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
6113 6114
}

6115
static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
6116 6117 6118 6119 6120 6121 6122 6123 6124 6125 6126 6127 6128 6129 6130
{
	char *driver_version;
	int i, size = sizeof(cfgtable->driver_version);

	driver_version = kmalloc(size, GFP_KERNEL);
	if (!driver_version)
		return -ENOMEM;

	init_driver_version(driver_version, size);
	for (i = 0; i < size; i++)
		writeb(driver_version[i], &cfgtable->driver_version[i]);
	kfree(driver_version);
	return 0;
}

6131 6132
static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
					  unsigned char *driver_ver)
6133 6134 6135 6136 6137 6138 6139
{
	int i;

	for (i = 0; i < sizeof(cfgtable->driver_version); i++)
		driver_ver[i] = readb(&cfgtable->driver_version[i]);
}

6140
static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
6141 6142 6143 6144 6145 6146 6147 6148 6149 6150 6151 6152 6153 6154 6155 6156 6157 6158 6159
{

	char *driver_ver, *old_driver_ver;
	int rc, size = sizeof(cfgtable->driver_version);

	old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
	if (!old_driver_ver)
		return -ENOMEM;
	driver_ver = old_driver_ver + size;

	/* After a reset, the 32 bytes of "driver version" in the cfgtable
	 * should have been changed, otherwise we know the reset failed.
	 */
	init_driver_version(old_driver_ver, size);
	read_driver_ver_from_cfgtable(cfgtable, driver_ver);
	rc = !memcmp(driver_ver, old_driver_ver, size);
	kfree(old_driver_ver);
	return rc;
}
6160
/* This does a hard reset of the controller using PCI power management
6161
 * states or the using the doorbell register.
6162
 */
6163
static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
6164
{
6165 6166 6167 6168 6169
	u64 cfg_offset;
	u32 cfg_base_addr;
	u64 cfg_base_addr_index;
	void __iomem *vaddr;
	unsigned long paddr;
6170
	u32 misc_fw_support;
6171
	int rc;
6172
	struct CfgTable __iomem *cfgtable;
6173
	u32 use_doorbell;
6174
	u16 command_register;
6175

6176 6177
	/* For controllers as old as the P600, this is very nearly
	 * the same thing as
6178 6179 6180 6181 6182 6183
	 *
	 * pci_save_state(pci_dev);
	 * pci_set_power_state(pci_dev, PCI_D3hot);
	 * pci_set_power_state(pci_dev, PCI_D0);
	 * pci_restore_state(pci_dev);
	 *
6184 6185 6186
	 * For controllers newer than the P600, the pci power state
	 * method of resetting doesn't work so we have another way
	 * using the doorbell register.
6187
	 */
6188

6189 6190
	if (!ctlr_is_resettable(board_id)) {
		dev_warn(&pdev->dev, "Controller not resettable\n");
6191 6192
		return -ENODEV;
	}
6193 6194 6195 6196

	/* if controller is soft- but not hard resettable... */
	if (!ctlr_is_hard_resettable(board_id))
		return -ENOTSUPP; /* try soft reset later. */
6197

6198 6199 6200
	/* Save the PCI command register */
	pci_read_config_word(pdev, 4, &command_register);
	pci_save_state(pdev);
6201

6202 6203 6204 6205 6206 6207 6208
	/* find the first memory BAR, so we can find the cfg table */
	rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
	if (rc)
		return rc;
	vaddr = remap_pci_mem(paddr, 0x250);
	if (!vaddr)
		return -ENOMEM;
6209

6210 6211 6212 6213 6214 6215 6216 6217 6218 6219 6220
	/* find cfgtable in order to check if reset via doorbell is supported */
	rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
					&cfg_base_addr_index, &cfg_offset);
	if (rc)
		goto unmap_vaddr;
	cfgtable = remap_pci_mem(pci_resource_start(pdev,
		       cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
	if (!cfgtable) {
		rc = -ENOMEM;
		goto unmap_vaddr;
	}
6221 6222
	rc = write_driver_ver_to_cfgtable(cfgtable);
	if (rc)
6223
		goto unmap_cfgtable;
6224

6225 6226 6227
	/* If reset via doorbell register is supported, use that.
	 * There are two such methods.  Favor the newest method.
	 */
6228
	misc_fw_support = readl(&cfgtable->misc_fw_support);
6229 6230 6231 6232 6233 6234
	use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
	if (use_doorbell) {
		use_doorbell = DOORBELL_CTLR_RESET2;
	} else {
		use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
		if (use_doorbell) {
6235 6236
			dev_warn(&pdev->dev,
				"Soft reset not supported. Firmware update is required.\n");
6237
			rc = -ENOTSUPP; /* try soft reset */
6238 6239 6240
			goto unmap_cfgtable;
		}
	}
6241

6242 6243 6244
	rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
	if (rc)
		goto unmap_cfgtable;
6245

6246 6247
	pci_restore_state(pdev);
	pci_write_config_word(pdev, 4, command_register);
6248

6249 6250 6251 6252
	/* Some devices (notably the HP Smart Array 5i Controller)
	   need a little pause here */
	msleep(HPSA_POST_RESET_PAUSE_MSECS);

6253 6254 6255
	rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
	if (rc) {
		dev_warn(&pdev->dev,
6256
			"Failed waiting for board to become ready after hard reset\n");
6257 6258 6259
		goto unmap_cfgtable;
	}

6260 6261 6262 6263
	rc = controller_reset_failed(vaddr);
	if (rc < 0)
		goto unmap_cfgtable;
	if (rc) {
6264 6265 6266
		dev_warn(&pdev->dev, "Unable to successfully reset "
			"controller. Will try soft reset.\n");
		rc = -ENOTSUPP;
6267
	} else {
6268
		dev_info(&pdev->dev, "board ready after hard reset.\n");
6269 6270 6271 6272 6273 6274 6275 6276
	}

unmap_cfgtable:
	iounmap(cfgtable);

unmap_vaddr:
	iounmap(vaddr);
	return rc;
6277 6278 6279 6280 6281 6282 6283
}

/*
 *  We cannot read the structure directly, for portability we must use
 *   the io functions.
 *   This is for debug only.
 */
D
Don Brace 已提交
6284
static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
6285
{
6286
#ifdef HPSA_DEBUG
6287 6288 6289 6290 6291 6292 6293 6294 6295 6296 6297 6298 6299 6300 6301 6302 6303 6304 6305 6306
	int i;
	char temp_name[17];

	dev_info(dev, "Controller Configuration information\n");
	dev_info(dev, "------------------------------------\n");
	for (i = 0; i < 4; i++)
		temp_name[i] = readb(&(tb->Signature[i]));
	temp_name[4] = '\0';
	dev_info(dev, "   Signature = %s\n", temp_name);
	dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
	dev_info(dev, "   Transport methods supported = 0x%x\n",
	       readl(&(tb->TransportSupport)));
	dev_info(dev, "   Transport methods active = 0x%x\n",
	       readl(&(tb->TransportActive)));
	dev_info(dev, "   Requested transport Method = 0x%x\n",
	       readl(&(tb->HostWrite.TransportRequest)));
	dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
	       readl(&(tb->HostWrite.CoalIntDelay)));
	dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
	       readl(&(tb->HostWrite.CoalIntCount)));
6307
	dev_info(dev, "   Max outstanding commands = %d\n",
6308 6309 6310 6311 6312 6313 6314 6315 6316
	       readl(&(tb->CmdsOutMax)));
	dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
	for (i = 0; i < 16; i++)
		temp_name[i] = readb(&(tb->ServerName[i]));
	temp_name[16] = '\0';
	dev_info(dev, "   Server Name = %s\n", temp_name);
	dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
		readl(&(tb->HeartBeat)));
#endif				/* HPSA_DEBUG */
6317
}
6318 6319 6320 6321 6322 6323 6324 6325 6326 6327 6328 6329 6330 6331 6332 6333 6334 6335 6336 6337 6338 6339 6340 6341 6342 6343 6344 6345 6346 6347 6348 6349 6350 6351 6352 6353

static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
{
	int i, offset, mem_type, bar_type;

	if (pci_bar_addr == PCI_BASE_ADDRESS_0)	/* looking for BAR zero? */
		return 0;
	offset = 0;
	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
		bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
		if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
			offset += 4;
		else {
			mem_type = pci_resource_flags(pdev, i) &
			    PCI_BASE_ADDRESS_MEM_TYPE_MASK;
			switch (mem_type) {
			case PCI_BASE_ADDRESS_MEM_TYPE_32:
			case PCI_BASE_ADDRESS_MEM_TYPE_1M:
				offset += 4;	/* 32 bit */
				break;
			case PCI_BASE_ADDRESS_MEM_TYPE_64:
				offset += 8;
				break;
			default:	/* reserved in PCI 2.2 */
				dev_warn(&pdev->dev,
				       "base address is invalid\n");
				return -1;
				break;
			}
		}
		if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
			return i + 1;
	}
	return -1;
}

6354 6355 6356 6357 6358 6359 6360 6361 6362 6363 6364
static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
{
	if (h->msix_vector) {
		if (h->pdev->msix_enabled)
			pci_disable_msix(h->pdev);
	} else if (h->msi_vector) {
		if (h->pdev->msi_enabled)
			pci_disable_msi(h->pdev);
	}
}

6365
/* If MSI/MSI-X is supported by the kernel we will try to enable it on
6366
 * controllers that are capable. If not, we use legacy INTx mode.
6367
 */
6368
static void hpsa_interrupt_mode(struct ctlr_info *h)
6369 6370
{
#ifdef CONFIG_PCI_MSI
6371 6372 6373 6374 6375 6376 6377
	int err, i;
	struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];

	for (i = 0; i < MAX_REPLY_QUEUES; i++) {
		hpsa_msix_entries[i].vector = 0;
		hpsa_msix_entries[i].entry = i;
	}
6378 6379

	/* Some boards advertise MSI but don't really support it */
6380 6381
	if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
	    (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
6382
		goto default_int_mode;
6383
	if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
6384
		dev_info(&h->pdev->dev, "MSI-X capable controller\n");
6385
		h->msix_vector = MAX_REPLY_QUEUES;
6386 6387
		if (h->msix_vector > num_online_cpus())
			h->msix_vector = num_online_cpus();
6388 6389 6390 6391 6392 6393 6394
		err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
					    1, h->msix_vector);
		if (err < 0) {
			dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
			h->msix_vector = 0;
			goto single_msi_mode;
		} else if (err < h->msix_vector) {
6395
			dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
6396 6397
			       "available\n", err);
		}
6398 6399 6400 6401
		h->msix_vector = err;
		for (i = 0; i < h->msix_vector; i++)
			h->intr[i] = hpsa_msix_entries[i].vector;
		return;
6402
	}
6403
single_msi_mode:
6404
	if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
6405
		dev_info(&h->pdev->dev, "MSI capable controller\n");
6406
		if (!pci_enable_msi(h->pdev))
6407 6408
			h->msi_vector = 1;
		else
6409
			dev_warn(&h->pdev->dev, "MSI init failed\n");
6410 6411 6412 6413
	}
default_int_mode:
#endif				/* CONFIG_PCI_MSI */
	/* if we get here we're going to use the default interrupt mode */
6414
	h->intr[h->intr_mode] = h->pdev->irq;
6415 6416
}

6417
static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
6418 6419 6420 6421 6422 6423 6424 6425 6426 6427 6428 6429 6430
{
	int i;
	u32 subsystem_vendor_id, subsystem_device_id;

	subsystem_vendor_id = pdev->subsystem_vendor;
	subsystem_device_id = pdev->subsystem_device;
	*board_id = ((subsystem_device_id << 16) & 0xffff0000) |
		    subsystem_vendor_id;

	for (i = 0; i < ARRAY_SIZE(products); i++)
		if (*board_id == products[i].board_id)
			return i;

6431 6432 6433
	if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
		subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
		!hpsa_allow_any) {
6434 6435 6436 6437 6438 6439 6440
		dev_warn(&pdev->dev, "unrecognized board ID: "
			"0x%08x, ignoring.\n", *board_id);
			return -ENODEV;
	}
	return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
}

6441 6442
static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
				    unsigned long *memory_bar)
6443 6444 6445 6446
{
	int i;

	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
6447
		if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
6448
			/* addressing mode bits already removed */
6449 6450
			*memory_bar = pci_resource_start(pdev, i);
			dev_dbg(&pdev->dev, "memory BAR = %lx\n",
6451 6452 6453
				*memory_bar);
			return 0;
		}
6454
	dev_warn(&pdev->dev, "no memory BAR found\n");
6455 6456 6457
	return -ENODEV;
}

6458 6459
static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
				     int wait_for_ready)
6460
{
6461
	int i, iterations;
6462
	u32 scratchpad;
6463 6464 6465 6466
	if (wait_for_ready)
		iterations = HPSA_BOARD_READY_ITERATIONS;
	else
		iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
6467

6468 6469 6470 6471 6472 6473 6474 6475 6476
	for (i = 0; i < iterations; i++) {
		scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
		if (wait_for_ready) {
			if (scratchpad == HPSA_FIRMWARE_READY)
				return 0;
		} else {
			if (scratchpad != HPSA_FIRMWARE_READY)
				return 0;
		}
6477 6478
		msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
	}
6479
	dev_warn(&pdev->dev, "board not ready, timed out.\n");
6480 6481 6482
	return -ENODEV;
}

6483 6484 6485
static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
			       u64 *cfg_offset)
6486 6487 6488 6489 6490 6491 6492 6493 6494 6495 6496 6497
{
	*cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
	*cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
	*cfg_base_addr &= (u32) 0x0000ffff;
	*cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
	if (*cfg_base_addr_index == -1) {
		dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
		return -ENODEV;
	}
	return 0;
}

6498
static int hpsa_find_cfgtables(struct ctlr_info *h)
6499
{
6500 6501 6502
	u64 cfg_offset;
	u32 cfg_base_addr;
	u64 cfg_base_addr_index;
6503
	u32 trans_offset;
6504
	int rc;
6505

6506 6507 6508 6509
	rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
		&cfg_base_addr_index, &cfg_offset);
	if (rc)
		return rc;
6510
	h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
6511
		       cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
6512 6513
	if (!h->cfgtable) {
		dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
6514
		return -ENOMEM;
6515
	}
6516 6517 6518
	rc = write_driver_ver_to_cfgtable(h->cfgtable);
	if (rc)
		return rc;
6519
	/* Find performant mode table. */
6520
	trans_offset = readl(&h->cfgtable->TransMethodOffset);
6521 6522 6523 6524 6525 6526 6527 6528
	h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
				cfg_base_addr_index)+cfg_offset+trans_offset,
				sizeof(*h->transtable));
	if (!h->transtable)
		return -ENOMEM;
	return 0;
}

6529
static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
6530
{
6531 6532 6533 6534
#define MIN_MAX_COMMANDS 16
	BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);

	h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
6535 6536 6537 6538 6539

	/* Limit commands in memory limited kdump scenario. */
	if (reset_devices && h->max_commands > 32)
		h->max_commands = 32;

6540 6541 6542 6543 6544 6545
	if (h->max_commands < MIN_MAX_COMMANDS) {
		dev_warn(&h->pdev->dev,
			"Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
			h->max_commands,
			MIN_MAX_COMMANDS);
		h->max_commands = MIN_MAX_COMMANDS;
6546 6547 6548
	}
}

6549 6550 6551 6552 6553 6554 6555 6556 6557
/* If the controller reports that the total max sg entries is greater than 512,
 * then we know that chained SG blocks work.  (Original smart arrays did not
 * support chained SG blocks and would return zero for max sg entries.)
 */
static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
{
	return h->maxsgentries > 512;
}

6558 6559 6560 6561
/* Interrogate the hardware for some limits:
 * max commands, max SG elements without chaining, and with chaining,
 * SG chain block size, etc.
 */
6562
static void hpsa_find_board_params(struct ctlr_info *h)
6563
{
6564
	hpsa_get_max_perf_mode_cmds(h);
6565
	h->nr_cmds = h->max_commands;
6566
	h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
6567
	h->fw_support = readl(&(h->cfgtable->misc_fw_support));
6568 6569
	if (hpsa_supports_chained_sg_blocks(h)) {
		/* Limit in-command s/g elements to 32 save dma'able memory. */
6570
		h->max_cmd_sg_entries = 32;
6571
		h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
6572 6573
		h->maxsgentries--; /* save one for chain pointer */
	} else {
6574 6575 6576 6577 6578 6579
		/*
		 * Original smart arrays supported at most 31 s/g entries
		 * embedded inline in the command (trying to use more
		 * would lock up the controller)
		 */
		h->max_cmd_sg_entries = 31;
6580
		h->maxsgentries = 31; /* default to traditional values */
6581
		h->chainsize = 0;
6582
	}
6583 6584 6585

	/* Find out what task management functions are supported and cache */
	h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
6586 6587 6588 6589
	if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
		dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
	if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
		dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
6590 6591
}

6592 6593
static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
{
A
Akinobu Mita 已提交
6594
	if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
6595
		dev_err(&h->pdev->dev, "not a valid CISS config table\n");
6596 6597 6598 6599 6600
		return false;
	}
	return true;
}

6601
static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
6602
{
6603
	u32 driver_support;
6604

6605
	driver_support = readl(&(h->cfgtable->driver_support));
A
Arnd Bergmann 已提交
6606 6607
	/* Need to enable prefetch in the SCSI core for 6400 in x86 */
#ifdef CONFIG_X86
6608
	driver_support |= ENABLE_SCSI_PREFETCH;
6609
#endif
6610 6611
	driver_support |= ENABLE_UNIT_ATTN;
	writel(driver_support, &(h->cfgtable->driver_support));
6612 6613
}

6614 6615 6616 6617 6618 6619 6620 6621 6622 6623 6624 6625 6626 6627
/* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
 * in a prefetch beyond physical memory.
 */
static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
{
	u32 dma_prefetch;

	if (h->board_id != 0x3225103C)
		return;
	dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
	dma_prefetch |= 0x8000;
	writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
}

6628
static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
6629 6630 6631 6632 6633
{
	int i;
	u32 doorbell_value;
	unsigned long flags;
	/* wait until the clear_event_notify bit 6 is cleared by controller. */
6634
	for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
6635 6636 6637 6638
		spin_lock_irqsave(&h->lock, flags);
		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
		spin_unlock_irqrestore(&h->lock, flags);
		if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
6639
			goto done;
6640
		/* delay and try again */
6641
		msleep(CLEAR_EVENT_WAIT_INTERVAL);
6642
	}
6643 6644 6645
	return -ENODEV;
done:
	return 0;
6646 6647
}

6648
static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
6649 6650
{
	int i;
6651 6652
	u32 doorbell_value;
	unsigned long flags;
6653 6654 6655 6656 6657

	/* under certain very rare conditions, this can take awhile.
	 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
	 * as we enter this code.)
	 */
6658
	for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
6659 6660
		if (h->remove_in_progress)
			goto done;
6661 6662 6663
		spin_lock_irqsave(&h->lock, flags);
		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
		spin_unlock_irqrestore(&h->lock, flags);
D
Dan Carpenter 已提交
6664
		if (!(doorbell_value & CFGTBL_ChangeReq))
6665
			goto done;
6666
		/* delay and try again */
6667
		msleep(MODE_CHANGE_WAIT_INTERVAL);
6668
	}
6669 6670 6671
	return -ENODEV;
done:
	return 0;
6672 6673
}

6674
/* return -ENODEV or other reason on error, 0 on success */
6675
static int hpsa_enter_simple_mode(struct ctlr_info *h)
6676 6677 6678 6679 6680 6681 6682 6683
{
	u32 trans_support;

	trans_support = readl(&(h->cfgtable->TransportSupport));
	if (!(trans_support & SIMPLE_MODE))
		return -ENOTSUPP;

	h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
6684

6685 6686
	/* Update the field, and then ring the doorbell */
	writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
6687
	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
6688
	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6689 6690
	if (hpsa_wait_for_mode_change_ack(h))
		goto error;
6691
	print_cfg_table(&h->pdev->dev, h->cfgtable);
6692 6693
	if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
		goto error;
6694
	h->transMethod = CFGTBL_Trans_Simple;
6695
	return 0;
6696
error:
6697
	dev_err(&h->pdev->dev, "failed to enter simple mode\n");
6698
	return -ENODEV;
6699 6700
}

6701
static int hpsa_pci_init(struct ctlr_info *h)
6702
{
6703
	int prod_index, err;
6704

6705 6706
	prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
	if (prod_index < 0)
6707
		return prod_index;
6708 6709
	h->product_name = products[prod_index].product_name;
	h->access = *(products[prod_index].access);
6710

S
Stephen Cameron 已提交
6711 6712 6713
	h->needs_abort_tags_swizzled =
		ctlr_needs_abort_tags_swizzled(h->board_id);

M
Matthew Garrett 已提交
6714 6715 6716
	pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
			       PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);

6717
	err = pci_enable_device(h->pdev);
6718
	if (err) {
6719
		dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
6720 6721 6722
		return err;
	}

6723
	err = pci_request_regions(h->pdev, HPSA);
6724
	if (err) {
6725 6726
		dev_err(&h->pdev->dev,
			"cannot obtain PCI resources, aborting\n");
6727 6728
		return err;
	}
6729 6730 6731

	pci_set_master(h->pdev);

6732
	hpsa_interrupt_mode(h);
6733
	err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
6734
	if (err)
6735 6736
		goto err_out_free_res;
	h->vaddr = remap_pci_mem(h->paddr, 0x250);
6737 6738 6739 6740
	if (!h->vaddr) {
		err = -ENOMEM;
		goto err_out_free_res;
	}
6741
	err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
6742
	if (err)
6743
		goto err_out_free_res;
6744 6745
	err = hpsa_find_cfgtables(h);
	if (err)
6746
		goto err_out_free_res;
6747
	hpsa_find_board_params(h);
6748

6749
	if (!hpsa_CISS_signature_present(h)) {
6750 6751 6752
		err = -ENODEV;
		goto err_out_free_res;
	}
6753
	hpsa_set_driver_support_bits(h);
6754
	hpsa_p600_dma_prefetch_quirk(h);
6755 6756
	err = hpsa_enter_simple_mode(h);
	if (err)
6757 6758 6759 6760
		goto err_out_free_res;
	return 0;

err_out_free_res:
6761 6762 6763 6764 6765 6766
	if (h->transtable)
		iounmap(h->transtable);
	if (h->cfgtable)
		iounmap(h->cfgtable);
	if (h->vaddr)
		iounmap(h->vaddr);
6767
	pci_disable_device(h->pdev);
6768
	pci_release_regions(h->pdev);
6769 6770 6771
	return err;
}

6772
static void hpsa_hba_inquiry(struct ctlr_info *h)
6773 6774 6775 6776 6777 6778 6779 6780 6781 6782 6783 6784 6785 6786 6787
{
	int rc;

#define HBA_INQUIRY_BYTE_COUNT 64
	h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
	if (!h->hba_inquiry_data)
		return;
	rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
		h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
	if (rc != 0) {
		kfree(h->hba_inquiry_data);
		h->hba_inquiry_data = NULL;
	}
}

6788
static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
6789
{
6790
	int rc, i;
6791
	void __iomem *vaddr;
6792 6793 6794 6795

	if (!reset_devices)
		return 0;

6796 6797 6798 6799 6800 6801 6802 6803 6804 6805 6806 6807 6808 6809 6810 6811
	/* kdump kernel is loading, we don't know in which state is
	 * the pci interface. The dev->enable_cnt is equal zero
	 * so we call enable+disable, wait a while and switch it on.
	 */
	rc = pci_enable_device(pdev);
	if (rc) {
		dev_warn(&pdev->dev, "Failed to enable PCI device\n");
		return -ENODEV;
	}
	pci_disable_device(pdev);
	msleep(260);			/* a randomly chosen number */
	rc = pci_enable_device(pdev);
	if (rc) {
		dev_warn(&pdev->dev, "failed to enable device.\n");
		return -ENODEV;
	}
6812

6813
	pci_set_master(pdev);
6814

6815 6816 6817 6818 6819 6820 6821 6822
	vaddr = pci_ioremap_bar(pdev, 0);
	if (vaddr == NULL) {
		rc = -ENOMEM;
		goto out_disable;
	}
	writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
	iounmap(vaddr);

6823
	/* Reset the controller with a PCI power-cycle or via doorbell */
6824
	rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
6825

6826 6827
	/* -ENOTSUPP here means we cannot reset the controller
	 * but it's already (and still) up and running in
6828 6829
	 * "performant mode".  Or, it might be 640x, which can't reset
	 * due to concerns about shared bbwc between 6402/6404 pair.
6830
	 */
6831
	if (rc)
6832
		goto out_disable;
6833 6834

	/* Now try to get the controller to respond to a no-op */
6835
	dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
6836 6837 6838 6839 6840 6841 6842
	for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
		if (hpsa_noop(pdev) == 0)
			break;
		else
			dev_warn(&pdev->dev, "no-op failed%s\n",
					(i < 11 ? "; re-trying" : ""));
	}
6843 6844 6845 6846 6847

out_disable:

	pci_disable_device(pdev);
	return rc;
6848 6849
}

6850
static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
6851 6852 6853 6854 6855 6856 6857 6858 6859 6860 6861 6862 6863 6864
{
	h->cmd_pool_bits = kzalloc(
		DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
		sizeof(unsigned long), GFP_KERNEL);
	h->cmd_pool = pci_alloc_consistent(h->pdev,
		    h->nr_cmds * sizeof(*h->cmd_pool),
		    &(h->cmd_pool_dhandle));
	h->errinfo_pool = pci_alloc_consistent(h->pdev,
		    h->nr_cmds * sizeof(*h->errinfo_pool),
		    &(h->errinfo_pool_dhandle));
	if ((h->cmd_pool_bits == NULL)
	    || (h->cmd_pool == NULL)
	    || (h->errinfo_pool == NULL)) {
		dev_err(&h->pdev->dev, "out of memory in %s", __func__);
6865
		goto clean_up;
6866
	}
6867
	hpsa_preinitialize_commands(h);
6868
	return 0;
6869 6870 6871
clean_up:
	hpsa_free_cmd_pool(h);
	return -ENOMEM;
6872 6873 6874 6875 6876 6877 6878 6879 6880
}

static void hpsa_free_cmd_pool(struct ctlr_info *h)
{
	kfree(h->cmd_pool_bits);
	if (h->cmd_pool)
		pci_free_consistent(h->pdev,
			    h->nr_cmds * sizeof(struct CommandList),
			    h->cmd_pool, h->cmd_pool_dhandle);
6881 6882 6883 6884
	if (h->ioaccel2_cmd_pool)
		pci_free_consistent(h->pdev,
			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
			h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
6885 6886 6887 6888 6889
	if (h->errinfo_pool)
		pci_free_consistent(h->pdev,
			    h->nr_cmds * sizeof(struct ErrorInfo),
			    h->errinfo_pool,
			    h->errinfo_pool_dhandle);
6890 6891 6892 6893
	if (h->ioaccel_cmd_pool)
		pci_free_consistent(h->pdev,
			h->nr_cmds * sizeof(struct io_accel1_cmd),
			h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
6894 6895
}

6896 6897
static void hpsa_irq_affinity_hints(struct ctlr_info *h)
{
6898
	int i, cpu;
6899 6900 6901

	cpu = cpumask_first(cpu_online_mask);
	for (i = 0; i < h->msix_vector; i++) {
6902
		irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
6903 6904 6905 6906
		cpu = cpumask_next(cpu, cpu_online_mask);
	}
}

6907 6908 6909 6910 6911 6912 6913 6914 6915 6916 6917 6918 6919 6920 6921 6922 6923
/* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
static void hpsa_free_irqs(struct ctlr_info *h)
{
	int i;

	if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
		/* Single reply queue, only one irq to free */
		i = h->intr_mode;
		irq_set_affinity_hint(h->intr[i], NULL);
		free_irq(h->intr[i], &h->q[i]);
		return;
	}

	for (i = 0; i < h->msix_vector; i++) {
		irq_set_affinity_hint(h->intr[i], NULL);
		free_irq(h->intr[i], &h->q[i]);
	}
6924 6925
	for (; i < MAX_REPLY_QUEUES; i++)
		h->q[i] = 0;
6926 6927
}

6928 6929
/* returns 0 on success; cleans up and returns -Enn on error */
static int hpsa_request_irqs(struct ctlr_info *h,
6930 6931 6932
	irqreturn_t (*msixhandler)(int, void *),
	irqreturn_t (*intxhandler)(int, void *))
{
6933
	int rc, i;
6934

6935 6936 6937 6938 6939 6940 6941
	/*
	 * initialize h->q[x] = x so that interrupt handlers know which
	 * queue to process.
	 */
	for (i = 0; i < MAX_REPLY_QUEUES; i++)
		h->q[i] = (u8) i;

6942
	if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
6943
		/* If performant mode and MSI-X, use multiple reply queues */
6944
		for (i = 0; i < h->msix_vector; i++) {
6945 6946 6947
			rc = request_irq(h->intr[i], msixhandler,
					0, h->devname,
					&h->q[i]);
6948 6949 6950 6951 6952 6953 6954 6955 6956 6957 6958 6959 6960 6961 6962
			if (rc) {
				int j;

				dev_err(&h->pdev->dev,
					"failed to get irq %d for %s\n",
				       h->intr[i], h->devname);
				for (j = 0; j < i; j++) {
					free_irq(h->intr[j], &h->q[j]);
					h->q[j] = 0;
				}
				for (; j < MAX_REPLY_QUEUES; j++)
					h->q[j] = 0;
				return rc;
			}
		}
6963
		hpsa_irq_affinity_hints(h);
6964 6965
	} else {
		/* Use single reply pool */
6966
		if (h->msix_vector > 0 || h->msi_vector) {
6967 6968 6969 6970 6971 6972 6973 6974 6975
			rc = request_irq(h->intr[h->intr_mode],
				msixhandler, 0, h->devname,
				&h->q[h->intr_mode]);
		} else {
			rc = request_irq(h->intr[h->intr_mode],
				intxhandler, IRQF_SHARED, h->devname,
				&h->q[h->intr_mode]);
		}
	}
6976 6977 6978 6979 6980 6981 6982 6983
	if (rc) {
		dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
		       h->intr[h->intr_mode], h->devname);
		return -ENODEV;
	}
	return 0;
}

6984
static int hpsa_kdump_soft_reset(struct ctlr_info *h)
6985 6986 6987 6988 6989 6990 6991 6992 6993 6994 6995 6996 6997 6998 6999 7000 7001 7002 7003 7004 7005 7006 7007
{
	if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
		HPSA_RESET_TYPE_CONTROLLER)) {
		dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
		return -EIO;
	}

	dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
	if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
		dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
		return -1;
	}

	dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
	if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
		dev_warn(&h->pdev->dev, "Board failed to become ready "
			"after soft reset.\n");
		return -1;
	}

	return 0;
}

7008 7009 7010 7011 7012 7013 7014 7015 7016 7017 7018 7019 7020 7021
static void hpsa_free_reply_queues(struct ctlr_info *h)
{
	int i;

	for (i = 0; i < h->nreply_queues; i++) {
		if (!h->reply_queue[i].head)
			continue;
		pci_free_consistent(h->pdev, h->reply_queue_size,
			h->reply_queue[i].head, h->reply_queue[i].busaddr);
		h->reply_queue[i].head = NULL;
		h->reply_queue[i].busaddr = 0;
	}
}

7022 7023
static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
{
7024
	hpsa_free_irqs(h);
7025 7026
	hpsa_free_sg_chain_blocks(h);
	hpsa_free_cmd_pool(h);
7027
	kfree(h->ioaccel1_blockFetchTable);
7028
	kfree(h->blockFetchTable);
7029
	hpsa_free_reply_queues(h);
7030 7031 7032 7033 7034 7035
	if (h->vaddr)
		iounmap(h->vaddr);
	if (h->transtable)
		iounmap(h->transtable);
	if (h->cfgtable)
		iounmap(h->cfgtable);
7036
	hpsa_disable_interrupt_mode(h);
7037
	pci_disable_device(h->pdev);
7038 7039 7040 7041
	pci_release_regions(h->pdev);
	kfree(h);
}

7042
/* Called when controller lockup detected. */
7043
static void fail_all_outstanding_cmds(struct ctlr_info *h)
7044
{
7045 7046
	int i, refcount;
	struct CommandList *c;
7047
	int failcount = 0;
7048

7049
	flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
7050 7051
	for (i = 0; i < h->nr_cmds; i++) {
		c = h->cmd_pool + i;
7052 7053
		refcount = atomic_inc_return(&c->refcount);
		if (refcount > 1) {
7054
			c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
7055
			finish_cmd(c);
7056
			atomic_dec(&h->commands_outstanding);
7057
			failcount++;
7058 7059
		}
		cmd_free(h, c);
7060
	}
7061 7062
	dev_warn(&h->pdev->dev,
		"failed %d commands in fail_all\n", failcount);
7063 7064
}

7065 7066
static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
{
7067
	int cpu;
7068

7069
	for_each_online_cpu(cpu) {
7070 7071 7072 7073 7074 7075 7076
		u32 *lockup_detected;
		lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
		*lockup_detected = value;
	}
	wmb(); /* be sure the per-cpu variables are out to memory */
}

7077 7078 7079
static void controller_lockup_detected(struct ctlr_info *h)
{
	unsigned long flags;
7080
	u32 lockup_detected;
7081 7082 7083

	h->access.set_intr_mask(h, HPSA_INTR_OFF);
	spin_lock_irqsave(&h->lock, flags);
7084 7085 7086 7087
	lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
	if (!lockup_detected) {
		/* no heartbeat, but controller gave us a zero. */
		dev_warn(&h->pdev->dev,
7088 7089
			"lockup detected after %d but scratchpad register is zero\n",
			h->heartbeat_sample_interval / HZ);
7090 7091 7092
		lockup_detected = 0xffffffff;
	}
	set_lockup_detected_for_all_cpus(h, lockup_detected);
7093
	spin_unlock_irqrestore(&h->lock, flags);
7094 7095
	dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
			lockup_detected, h->heartbeat_sample_interval / HZ);
7096
	pci_disable_device(h->pdev);
7097
	fail_all_outstanding_cmds(h);
7098 7099
}

7100
static int detect_controller_lockup(struct ctlr_info *h)
7101 7102 7103 7104 7105 7106 7107 7108
{
	u64 now;
	u32 heartbeat;
	unsigned long flags;

	now = get_jiffies_64();
	/* If we've received an interrupt recently, we're ok. */
	if (time_after64(h->last_intr_timestamp +
7109
				(h->heartbeat_sample_interval), now))
7110
		return false;
7111 7112 7113 7114 7115 7116 7117

	/*
	 * If we've already checked the heartbeat recently, we're ok.
	 * This could happen if someone sends us a signal. We
	 * otherwise don't care about signals in this thread.
	 */
	if (time_after64(h->last_heartbeat_timestamp +
7118
				(h->heartbeat_sample_interval), now))
7119
		return false;
7120 7121 7122 7123 7124 7125 7126

	/* If heartbeat has not changed since we last looked, we're not ok. */
	spin_lock_irqsave(&h->lock, flags);
	heartbeat = readl(&h->cfgtable->HeartBeat);
	spin_unlock_irqrestore(&h->lock, flags);
	if (h->last_heartbeat == heartbeat) {
		controller_lockup_detected(h);
7127
		return true;
7128 7129 7130 7131 7132
	}

	/* We're ok. */
	h->last_heartbeat = heartbeat;
	h->last_heartbeat_timestamp = now;
7133
	return false;
7134 7135
}

7136
static void hpsa_ack_ctlr_events(struct ctlr_info *h)
7137 7138 7139 7140
{
	int i;
	char *event_type;

7141 7142 7143
	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
		return;

7144
	/* Ask the controller to clear the events we're handling. */
7145 7146
	if ((h->transMethod & (CFGTBL_Trans_io_accel1
			| CFGTBL_Trans_io_accel2)) &&
7147 7148 7149 7150 7151 7152 7153 7154 7155 7156 7157
		(h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
		 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {

		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
			event_type = "state change";
		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
			event_type = "configuration change";
		/* Stop sending new RAID offload reqs via the IO accelerator */
		scsi_block_requests(h->scsi_host);
		for (i = 0; i < h->ndevices; i++)
			h->dev[i]->offload_enabled = 0;
7158
		hpsa_drain_accel_commands(h);
7159 7160 7161 7162 7163 7164 7165 7166 7167 7168 7169 7170 7171 7172 7173 7174 7175 7176 7177 7178
		/* Set 'accelerator path config change' bit */
		dev_warn(&h->pdev->dev,
			"Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
			h->events, event_type);
		writel(h->events, &(h->cfgtable->clear_event_notify));
		/* Set the "clear event notify field update" bit 6 */
		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
		/* Wait until ctlr clears 'clear event notify field', bit 6 */
		hpsa_wait_for_clear_event_notify_ack(h);
		scsi_unblock_requests(h->scsi_host);
	} else {
		/* Acknowledge controller notification events. */
		writel(h->events, &(h->cfgtable->clear_event_notify));
		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
		hpsa_wait_for_clear_event_notify_ack(h);
#if 0
		writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
		hpsa_wait_for_mode_change_ack(h);
#endif
	}
7179
	return;
7180 7181 7182 7183
}

/* Check a register on the controller to see if there are configuration
 * changes (added/changed/removed logical drives, etc.) which mean that
7184 7185
 * we should rescan the controller for devices.
 * Also check flag for driver-initiated rescan.
7186
 */
7187
static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
7188 7189
{
	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7190
		return 0;
7191 7192

	h->events = readl(&(h->cfgtable->event_notify));
7193 7194
	return h->events & RESCAN_REQUIRED_EVENT_BITS;
}
7195

7196 7197 7198 7199 7200 7201 7202 7203 7204 7205 7206 7207 7208 7209
/*
 * Check if any of the offline devices have become ready
 */
static int hpsa_offline_devices_ready(struct ctlr_info *h)
{
	unsigned long flags;
	struct offline_device_entry *d;
	struct list_head *this, *tmp;

	spin_lock_irqsave(&h->offline_device_lock, flags);
	list_for_each_safe(this, tmp, &h->offline_device_list) {
		d = list_entry(this, struct offline_device_entry,
				offline_list);
		spin_unlock_irqrestore(&h->offline_device_lock, flags);
7210 7211 7212 7213
		if (!hpsa_volume_offline(h, d->scsi3addr)) {
			spin_lock_irqsave(&h->offline_device_lock, flags);
			list_del(&d->offline_list);
			spin_unlock_irqrestore(&h->offline_device_lock, flags);
7214
			return 1;
7215
		}
7216 7217 7218 7219
		spin_lock_irqsave(&h->offline_device_lock, flags);
	}
	spin_unlock_irqrestore(&h->offline_device_lock, flags);
	return 0;
7220 7221
}

7222
static void hpsa_rescan_ctlr_worker(struct work_struct *work)
7223 7224
{
	unsigned long flags;
7225
	struct ctlr_info *h = container_of(to_delayed_work(work),
7226 7227 7228 7229
					struct ctlr_info, rescan_ctlr_work);


	if (h->remove_in_progress)
7230
		return;
7231 7232 7233 7234 7235 7236 7237

	if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
		scsi_host_get(h->scsi_host);
		hpsa_ack_ctlr_events(h);
		hpsa_scan_start(h->scsi_host);
		scsi_host_put(h->scsi_host);
	}
7238
	spin_lock_irqsave(&h->lock, flags);
7239 7240 7241 7242 7243 7244 7245 7246 7247 7248 7249 7250 7251 7252
	if (!h->remove_in_progress)
		queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
				h->heartbeat_sample_interval);
	spin_unlock_irqrestore(&h->lock, flags);
}

static void hpsa_monitor_ctlr_worker(struct work_struct *work)
{
	unsigned long flags;
	struct ctlr_info *h = container_of(to_delayed_work(work),
					struct ctlr_info, monitor_ctlr_work);

	detect_controller_lockup(h);
	if (lockup_detected(h))
7253
		return;
7254 7255 7256 7257

	spin_lock_irqsave(&h->lock, flags);
	if (!h->remove_in_progress)
		schedule_delayed_work(&h->monitor_ctlr_work,
7258 7259
				h->heartbeat_sample_interval);
	spin_unlock_irqrestore(&h->lock, flags);
7260 7261
}

7262 7263 7264 7265 7266
static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
						char *name)
{
	struct workqueue_struct *wq = NULL;

7267
	wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
7268 7269 7270 7271 7272 7273
	if (!wq)
		dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);

	return wq;
}

7274
static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
7275
{
7276
	int dac, rc;
7277
	struct ctlr_info *h;
7278 7279
	int try_soft_reset = 0;
	unsigned long flags;
7280
	u32 board_id;
7281 7282 7283 7284

	if (number_of_controllers == 0)
		printk(KERN_INFO DRIVER_NAME "\n");

7285 7286 7287 7288 7289 7290 7291
	rc = hpsa_lookup_board_id(pdev, &board_id);
	if (rc < 0) {
		dev_warn(&pdev->dev, "Board ID not found\n");
		return rc;
	}

	rc = hpsa_init_reset_devices(pdev, board_id);
7292 7293 7294 7295 7296 7297 7298 7299 7300 7301 7302 7303 7304
	if (rc) {
		if (rc != -ENOTSUPP)
			return rc;
		/* If the reset fails in a particular way (it has no way to do
		 * a proper hard reset, so returns -ENOTSUPP) we can try to do
		 * a soft reset once we get the controller configured up to the
		 * point that it can accept a command.
		 */
		try_soft_reset = 1;
		rc = 0;
	}

reinit_after_soft_reset:
7305

7306 7307 7308 7309 7310
	/* Command structures must be aligned on a 32-byte boundary because
	 * the 5 lower bits of the address are used by the hardware. and by
	 * the driver.  See comments in hpsa.h for more info.
	 */
	BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
7311 7312
	h = kzalloc(sizeof(*h), GFP_KERNEL);
	if (!h)
7313
		return -ENOMEM;
7314

7315
	h->pdev = pdev;
7316
	h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
7317
	INIT_LIST_HEAD(&h->offline_device_list);
7318
	spin_lock_init(&h->lock);
7319
	spin_lock_init(&h->offline_device_lock);
7320
	spin_lock_init(&h->scan_lock);
7321
	atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
S
Stephen Cameron 已提交
7322
	atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
7323

7324 7325 7326 7327 7328 7329 7330
	h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
	if (!h->rescan_ctlr_wq) {
		rc = -ENOMEM;
		goto clean1;
	}

	h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
7331 7332 7333 7334
	if (!h->resubmit_wq) {
		rc = -ENOMEM;
		goto clean1;
	}
7335

7336 7337
	/* Allocate and clear per-cpu variable lockup_detected */
	h->lockup_detected = alloc_percpu(u32);
7338 7339
	if (!h->lockup_detected) {
		rc = -ENOMEM;
7340
		goto clean1;
7341
	}
7342 7343
	set_lockup_detected_for_all_cpus(h, 0);

7344
	rc = hpsa_pci_init(h);
7345
	if (rc != 0)
7346 7347
		goto clean1;

7348
	sprintf(h->devname, HPSA "%d", number_of_controllers);
7349 7350 7351 7352
	h->ctlr = number_of_controllers;
	number_of_controllers++;

	/* configure PCI DMA stuff */
7353 7354
	rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
	if (rc == 0) {
7355
		dac = 1;
7356 7357 7358 7359 7360 7361 7362 7363
	} else {
		rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
		if (rc == 0) {
			dac = 0;
		} else {
			dev_err(&pdev->dev, "no suitable DMA available\n");
			goto clean1;
		}
7364 7365 7366 7367
	}

	/* make sure the board interrupts are off */
	h->access.set_intr_mask(h, HPSA_INTR_OFF);
7368

7369
	if (hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
7370
		goto clean2;
7371 7372
	dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
	       h->devname, pdev->device,
7373
	       h->intr[h->intr_mode], dac ? "" : " not");
7374
	rc = hpsa_alloc_cmd_pool(h);
7375 7376
	if (rc)
		goto clean2_and_free_irqs;
7377 7378
	if (hpsa_allocate_sg_chain_blocks(h))
		goto clean4;
7379
	init_waitqueue_head(&h->scan_wait_queue);
S
Stephen Cameron 已提交
7380
	init_waitqueue_head(&h->abort_cmd_wait_queue);
7381
	h->scan_finished = 1; /* no scan currently in progress */
7382 7383

	pci_set_drvdata(pdev, h);
7384
	h->ndevices = 0;
7385
	h->hba_mode_enabled = 0;
7386 7387
	h->scsi_host = NULL;
	spin_lock_init(&h->devlock);
7388 7389 7390 7391 7392 7393 7394 7395 7396 7397 7398 7399 7400 7401 7402 7403 7404 7405
	hpsa_put_ctlr_into_performant_mode(h);

	/* At this point, the controller is ready to take commands.
	 * Now, if reset_devices and the hard reset didn't work, try
	 * the soft reset and see if that works.
	 */
	if (try_soft_reset) {

		/* This is kind of gross.  We may or may not get a completion
		 * from the soft reset command, and if we do, then the value
		 * from the fifo may or may not be valid.  So, we wait 10 secs
		 * after the reset throwing away any completions we get during
		 * that time.  Unregister the interrupt handler and register
		 * fake ones to scoop up any residual completions.
		 */
		spin_lock_irqsave(&h->lock, flags);
		h->access.set_intr_mask(h, HPSA_INTR_OFF);
		spin_unlock_irqrestore(&h->lock, flags);
7406
		hpsa_free_irqs(h);
7407
		rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
7408 7409
					hpsa_intx_discard_completions);
		if (rc) {
7410 7411
			dev_warn(&h->pdev->dev,
				"Failed to request_irq after soft reset.\n");
7412 7413 7414 7415 7416 7417 7418 7419 7420 7421 7422 7423 7424 7425 7426 7427 7428 7429 7430 7431 7432 7433 7434 7435 7436 7437 7438 7439 7440 7441 7442 7443
			goto clean4;
		}

		rc = hpsa_kdump_soft_reset(h);
		if (rc)
			/* Neither hard nor soft reset worked, we're hosed. */
			goto clean4;

		dev_info(&h->pdev->dev, "Board READY.\n");
		dev_info(&h->pdev->dev,
			"Waiting for stale completions to drain.\n");
		h->access.set_intr_mask(h, HPSA_INTR_ON);
		msleep(10000);
		h->access.set_intr_mask(h, HPSA_INTR_OFF);

		rc = controller_reset_failed(h->cfgtable);
		if (rc)
			dev_info(&h->pdev->dev,
				"Soft reset appears to have failed.\n");

		/* since the controller's reset, we have to go back and re-init
		 * everything.  Easiest to just forget what we've done and do it
		 * all over again.
		 */
		hpsa_undo_allocations_after_kdump_soft_reset(h);
		try_soft_reset = 0;
		if (rc)
			/* don't go to clean4, we already unallocated */
			return -ENODEV;

		goto reinit_after_soft_reset;
	}
7444

7445 7446
		/* Enable Accelerated IO path at driver layer */
		h->acciopath_status = 1;
7447

7448

7449 7450 7451
	/* Turn the interrupts on so we can service requests */
	h->access.set_intr_mask(h, HPSA_INTR_ON);

7452
	hpsa_hba_inquiry(h);
7453 7454 7455
	rc = hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
	if (rc)
		goto clean4;
7456 7457 7458 7459 7460 7461

	/* Monitor the controller for firmware lockups */
	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
	INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
	schedule_delayed_work(&h->monitor_ctlr_work,
				h->heartbeat_sample_interval);
7462 7463 7464
	INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
	queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
				h->heartbeat_sample_interval);
7465
	return 0;
7466 7467

clean4:
7468
	hpsa_free_sg_chain_blocks(h);
7469
	hpsa_free_cmd_pool(h);
7470
clean2_and_free_irqs:
7471
	hpsa_free_irqs(h);
7472 7473
clean2:
clean1:
7474 7475
	if (h->resubmit_wq)
		destroy_workqueue(h->resubmit_wq);
7476 7477
	if (h->rescan_ctlr_wq)
		destroy_workqueue(h->rescan_ctlr_wq);
7478 7479
	if (h->lockup_detected)
		free_percpu(h->lockup_detected);
7480
	kfree(h);
7481
	return rc;
7482 7483 7484 7485 7486 7487
}

static void hpsa_flush_cache(struct ctlr_info *h)
{
	char *flush_buf;
	struct CommandList *c;
7488
	int rc;
7489 7490

	/* Don't bother trying to flush the cache if locked up */
7491
	/* FIXME not necessary if do_simple_cmd does the check */
7492
	if (unlikely(lockup_detected(h)))
7493
		return;
7494 7495 7496 7497
	flush_buf = kzalloc(4, GFP_KERNEL);
	if (!flush_buf)
		return;

7498
	c = cmd_alloc(h);
7499
	if (!c) {
7500
		dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
7501 7502
		goto out_of_memory;
	}
7503 7504 7505 7506
	if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
		RAID_CTLR_LUNID, TYPE_CMD)) {
		goto out;
	}
7507 7508 7509 7510
	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
					PCI_DMA_TODEVICE, NO_TIMEOUT);
	if (rc)
		goto out;
7511
	if (c->err_info->CommandStatus != 0)
7512
out:
7513 7514
		dev_warn(&h->pdev->dev,
			"error flushing cache on controller\n");
7515
	cmd_free(h, c);
7516 7517 7518 7519 7520 7521 7522 7523 7524 7525 7526 7527 7528 7529 7530
out_of_memory:
	kfree(flush_buf);
}

static void hpsa_shutdown(struct pci_dev *pdev)
{
	struct ctlr_info *h;

	h = pci_get_drvdata(pdev);
	/* Turn board interrupts off  and send the flush cache command
	 * sendcmd will turn off interrupt, and send the flush...
	 * To write all data in the battery backed cache to disks
	 */
	hpsa_flush_cache(h);
	h->access.set_intr_mask(h, HPSA_INTR_OFF);
7531 7532
	hpsa_free_irqs(h);
	hpsa_disable_interrupt_mode(h);		/* pci_init 2 */
7533 7534
}

7535
static void hpsa_free_device_info(struct ctlr_info *h)
7536 7537 7538 7539 7540 7541 7542
{
	int i;

	for (i = 0; i < h->ndevices; i++)
		kfree(h->dev[i]);
}

7543
static void hpsa_remove_one(struct pci_dev *pdev)
7544 7545
{
	struct ctlr_info *h;
7546
	unsigned long flags;
7547 7548

	if (pci_get_drvdata(pdev) == NULL) {
7549
		dev_err(&pdev->dev, "unable to remove device\n");
7550 7551 7552
		return;
	}
	h = pci_get_drvdata(pdev);
7553 7554 7555 7556 7557

	/* Get rid of any controller monitoring work items */
	spin_lock_irqsave(&h->lock, flags);
	h->remove_in_progress = 1;
	spin_unlock_irqrestore(&h->lock, flags);
7558 7559 7560 7561
	cancel_delayed_work_sync(&h->monitor_ctlr_work);
	cancel_delayed_work_sync(&h->rescan_ctlr_work);
	destroy_workqueue(h->rescan_ctlr_wq);
	destroy_workqueue(h->resubmit_wq);
7562
	hpsa_unregister_scsi(h);	/* unhook from SCSI subsystem */
7563 7564

	/* includes hpsa_free_irqs and hpsa_disable_interrupt_mode */
7565
	hpsa_shutdown(pdev);
7566

7567
	iounmap(h->vaddr);
7568 7569
	iounmap(h->transtable);
	iounmap(h->cfgtable);
7570
	hpsa_free_device_info(h);
7571
	hpsa_free_sg_chain_blocks(h);
7572 7573 7574 7575 7576 7577
	pci_free_consistent(h->pdev,
		h->nr_cmds * sizeof(struct CommandList),
		h->cmd_pool, h->cmd_pool_dhandle);
	pci_free_consistent(h->pdev,
		h->nr_cmds * sizeof(struct ErrorInfo),
		h->errinfo_pool, h->errinfo_pool_dhandle);
7578
	hpsa_free_reply_queues(h);
7579
	kfree(h->cmd_pool_bits);
7580
	kfree(h->blockFetchTable);
7581
	kfree(h->ioaccel1_blockFetchTable);
7582
	kfree(h->ioaccel2_blockFetchTable);
7583
	kfree(h->hba_inquiry_data);
7584
	pci_disable_device(pdev);
7585
	pci_release_regions(pdev);
7586
	free_percpu(h->lockup_detected);
7587 7588 7589 7590 7591 7592 7593 7594 7595 7596 7597 7598 7599 7600 7601
	kfree(h);
}

static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
	__attribute__((unused)) pm_message_t state)
{
	return -ENOSYS;
}

static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
{
	return -ENOSYS;
}

static struct pci_driver hpsa_pci_driver = {
7602
	.name = HPSA,
7603
	.probe = hpsa_init_one,
7604
	.remove = hpsa_remove_one,
7605 7606 7607 7608 7609 7610
	.id_table = hpsa_pci_device_id,	/* id_table */
	.shutdown = hpsa_shutdown,
	.suspend = hpsa_suspend,
	.resume = hpsa_resume,
};

7611 7612 7613 7614 7615 7616 7617 7618 7619 7620 7621 7622 7623
/* Fill in bucket_map[], given nsgs (the max number of
 * scatter gather elements supported) and bucket[],
 * which is an array of 8 integers.  The bucket[] array
 * contains 8 different DMA transfer sizes (in 16
 * byte increments) which the controller uses to fetch
 * commands.  This function fills in bucket_map[], which
 * maps a given number of scatter gather elements to one of
 * the 8 DMA transfer sizes.  The point of it is to allow the
 * controller to only do as much DMA as needed to fetch the
 * command, with the DMA transfer size encoded in the lower
 * bits of the command address.
 */
static void  calc_bucket_map(int bucket[], int num_buckets,
D
Don Brace 已提交
7624
	int nsgs, int min_blocks, u32 *bucket_map)
7625 7626 7627 7628 7629 7630
{
	int i, j, b, size;

	/* Note, bucket_map must have nsgs+1 entries. */
	for (i = 0; i <= nsgs; i++) {
		/* Compute size of a command with i SG entries */
7631
		size = i + min_blocks;
7632 7633
		b = num_buckets; /* Assume the biggest bucket */
		/* Find the bucket that is just big enough */
7634
		for (j = 0; j < num_buckets; j++) {
7635 7636 7637 7638 7639 7640 7641 7642 7643 7644
			if (bucket[j] >= size) {
				b = j;
				break;
			}
		}
		/* for a command with i SG entries, use bucket b. */
		bucket_map[i] = b;
	}
}

7645 7646
/* return -ENODEV or other reason on error, 0 on success */
static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
7647
{
7648 7649
	int i;
	unsigned long register_value;
7650 7651
	unsigned long transMethod = CFGTBL_Trans_Performant |
			(trans_support & CFGTBL_Trans_use_short_tags) |
7652 7653 7654
				CFGTBL_Trans_enable_directed_msix |
			(trans_support & (CFGTBL_Trans_io_accel1 |
				CFGTBL_Trans_io_accel2));
7655
	struct access_method access = SA5_performant_access;
7656 7657 7658 7659 7660 7661 7662 7663 7664 7665 7666

	/* This is a bit complicated.  There are 8 registers on
	 * the controller which we write to to tell it 8 different
	 * sizes of commands which there may be.  It's a way of
	 * reducing the DMA done to fetch each command.  Encoded into
	 * each command's tag are 3 bits which communicate to the controller
	 * which of the eight sizes that command fits within.  The size of
	 * each command depends on how many scatter gather entries there are.
	 * Each SG entry requires 16 bytes.  The eight registers are programmed
	 * with the number of 16-byte blocks a command of that size requires.
	 * The smallest command possible requires 5 such 16 byte blocks.
7667
	 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
7668 7669 7670 7671 7672 7673
	 * blocks.  Note, this only extends to the SG entries contained
	 * within the command block, and does not extend to chained blocks
	 * of SG elements.   bft[] contains the eight values we write to
	 * the registers.  They are not evenly distributed, but have more
	 * sizes for small commands, and fewer sizes for larger commands.
	 */
7674
	int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
7675 7676 7677 7678 7679 7680 7681 7682 7683 7684
#define MIN_IOACCEL2_BFT_ENTRY 5
#define HPSA_IOACCEL2_HEADER_SZ 4
	int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
			13, 14, 15, 16, 17, 18, 19,
			HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
	BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
	BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
				 16 * MIN_IOACCEL2_BFT_ENTRY);
	BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
7685
	BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
7686 7687 7688 7689 7690 7691
	/*  5 = 1 s/g entry or 4k
	 *  6 = 2 s/g entry or 8k
	 *  8 = 4 s/g entry or 16k
	 * 10 = 6 s/g entry or 24k
	 */

7692 7693 7694 7695 7696 7697 7698
	/* If the controller supports either ioaccel method then
	 * we can also use the RAID stack submit path that does not
	 * perform the superfluous readl() after each command submission.
	 */
	if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
		access = SA5_performant_access_no_read;

7699
	/* Controller spec: zero out this buffer. */
7700 7701
	for (i = 0; i < h->nreply_queues; i++)
		memset(h->reply_queue[i].head, 0, h->reply_queue_size);
7702

7703 7704
	bft[7] = SG_ENTRIES_IN_CMD + 4;
	calc_bucket_map(bft, ARRAY_SIZE(bft),
7705
				SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
7706 7707 7708 7709 7710
	for (i = 0; i < 8; i++)
		writel(bft[i], &h->transtable->BlockFetch[i]);

	/* size of controller ring buffer */
	writel(h->max_commands, &h->transtable->RepQSize);
7711
	writel(h->nreply_queues, &h->transtable->RepQCount);
7712 7713
	writel(0, &h->transtable->RepQCtrAddrLow32);
	writel(0, &h->transtable->RepQCtrAddrHigh32);
7714 7715 7716

	for (i = 0; i < h->nreply_queues; i++) {
		writel(0, &h->transtable->RepQAddr[i].upper);
7717
		writel(h->reply_queue[i].busaddr,
7718 7719 7720
			&h->transtable->RepQAddr[i].lower);
	}

7721
	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7722 7723 7724 7725 7726 7727 7728 7729
	writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
	/*
	 * enable outbound interrupt coalescing in accelerator mode;
	 */
	if (trans_support & CFGTBL_Trans_io_accel1) {
		access = SA5_ioaccel_mode1_access;
		writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
		writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7730 7731 7732 7733 7734 7735
	} else {
		if (trans_support & CFGTBL_Trans_io_accel2) {
			access = SA5_ioaccel_mode2_access;
			writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
			writel(4, &h->cfgtable->HostWrite.CoalIntCount);
		}
7736
	}
7737
	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7738 7739 7740 7741 7742
	if (hpsa_wait_for_mode_change_ack(h)) {
		dev_err(&h->pdev->dev,
			"performant mode problem - doorbell timeout\n");
		return -ENODEV;
	}
7743 7744
	register_value = readl(&(h->cfgtable->TransportActive));
	if (!(register_value & CFGTBL_Trans_Performant)) {
7745 7746
		dev_err(&h->pdev->dev,
			"performant mode problem - transport not active\n");
7747
		return -ENODEV;
7748
	}
7749
	/* Change the access methods to the performant access methods */
7750 7751 7752
	h->access = access;
	h->transMethod = transMethod;

7753 7754
	if (!((trans_support & CFGTBL_Trans_io_accel1) ||
		(trans_support & CFGTBL_Trans_io_accel2)))
7755
		return 0;
7756

7757 7758 7759 7760 7761 7762 7763 7764 7765 7766
	if (trans_support & CFGTBL_Trans_io_accel1) {
		/* Set up I/O accelerator mode */
		for (i = 0; i < h->nreply_queues; i++) {
			writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
			h->reply_queue[i].current_entry =
				readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
		}
		bft[7] = h->ioaccel_maxsg + 8;
		calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
				h->ioaccel1_blockFetchTable);
7767

7768
		/* initialize all reply queue entries to unused */
7769 7770 7771 7772
		for (i = 0; i < h->nreply_queues; i++)
			memset(h->reply_queue[i].head,
				(u8) IOACCEL_MODE1_REPLY_UNUSED,
				h->reply_queue_size);
7773

7774 7775 7776 7777 7778 7779 7780 7781 7782 7783 7784
		/* set all the constant fields in the accelerator command
		 * frames once at init time to save CPU cycles later.
		 */
		for (i = 0; i < h->nr_cmds; i++) {
			struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];

			cp->function = IOACCEL1_FUNCTION_SCSIIO;
			cp->err_info = (u32) (h->errinfo_pool_dhandle +
					(i * sizeof(struct ErrorInfo)));
			cp->err_info_len = sizeof(struct ErrorInfo);
			cp->sgl_offset = IOACCEL1_SGLOFFSET;
D
Don Brace 已提交
7785 7786
			cp->host_context_flags =
				cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
7787 7788
			cp->timeout_sec = 0;
			cp->ReplyQueue = 0;
7789
			cp->tag =
7790
				cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
7791 7792
			cp->host_addr =
				cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
7793 7794 7795 7796 7797 7798 7799 7800 7801 7802 7803 7804 7805 7806 7807 7808 7809 7810 7811 7812 7813 7814 7815 7816
					(i * sizeof(struct io_accel1_cmd)));
		}
	} else if (trans_support & CFGTBL_Trans_io_accel2) {
		u64 cfg_offset, cfg_base_addr_index;
		u32 bft2_offset, cfg_base_addr;
		int rc;

		rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
			&cfg_base_addr_index, &cfg_offset);
		BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
		bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
		calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
				4, h->ioaccel2_blockFetchTable);
		bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
		BUILD_BUG_ON(offsetof(struct CfgTable,
				io_accel_request_size_offset) != 0xb8);
		h->ioaccel2_bft2_regs =
			remap_pci_mem(pci_resource_start(h->pdev,
					cfg_base_addr_index) +
					cfg_offset + bft2_offset,
					ARRAY_SIZE(bft2) *
					sizeof(*h->ioaccel2_bft2_regs));
		for (i = 0; i < ARRAY_SIZE(bft2); i++)
			writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
7817
	}
7818
	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7819 7820 7821 7822 7823 7824
	if (hpsa_wait_for_mode_change_ack(h)) {
		dev_err(&h->pdev->dev,
			"performant mode problem - enabling ioaccel mode\n");
		return -ENODEV;
	}
	return 0;
7825 7826
}

7827 7828
/* Allocate ioaccel1 mode command blocks and block fetch table */
static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
7829
{
7830 7831 7832 7833 7834
	h->ioaccel_maxsg =
		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
	if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
		h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;

7835 7836 7837 7838 7839 7840 7841 7842 7843 7844 7845 7846
	/* Command structures must be aligned on a 128-byte boundary
	 * because the 7 lower bits of the address are used by the
	 * hardware.
	 */
	BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
			IOACCEL1_COMMANDLIST_ALIGNMENT);
	h->ioaccel_cmd_pool =
		pci_alloc_consistent(h->pdev,
			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
			&(h->ioaccel_cmd_pool_dhandle));

	h->ioaccel1_blockFetchTable =
7847
		kmalloc(((h->ioaccel_maxsg + 1) *
7848 7849 7850 7851 7852 7853 7854 7855 7856 7857 7858 7859 7860 7861 7862 7863 7864
				sizeof(u32)), GFP_KERNEL);

	if ((h->ioaccel_cmd_pool == NULL) ||
		(h->ioaccel1_blockFetchTable == NULL))
		goto clean_up;

	memset(h->ioaccel_cmd_pool, 0,
		h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
	return 0;

clean_up:
	if (h->ioaccel_cmd_pool)
		pci_free_consistent(h->pdev,
			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
			h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
	kfree(h->ioaccel1_blockFetchTable);
	return 1;
7865 7866
}

7867 7868
/* Allocate ioaccel2 mode command blocks and block fetch table */
static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
7869 7870 7871 7872 7873 7874 7875 7876 7877 7878 7879 7880 7881 7882 7883 7884 7885 7886 7887 7888 7889 7890 7891 7892 7893 7894 7895 7896 7897 7898 7899 7900 7901 7902 7903 7904
{
	/* Allocate ioaccel2 mode command blocks and block fetch table */

	h->ioaccel_maxsg =
		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
	if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
		h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;

	BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
			IOACCEL2_COMMANDLIST_ALIGNMENT);
	h->ioaccel2_cmd_pool =
		pci_alloc_consistent(h->pdev,
			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
			&(h->ioaccel2_cmd_pool_dhandle));

	h->ioaccel2_blockFetchTable =
		kmalloc(((h->ioaccel_maxsg + 1) *
				sizeof(u32)), GFP_KERNEL);

	if ((h->ioaccel2_cmd_pool == NULL) ||
		(h->ioaccel2_blockFetchTable == NULL))
		goto clean_up;

	memset(h->ioaccel2_cmd_pool, 0,
		h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
	return 0;

clean_up:
	if (h->ioaccel2_cmd_pool)
		pci_free_consistent(h->pdev,
			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
			h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
	kfree(h->ioaccel2_blockFetchTable);
	return 1;
}

7905
static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
7906 7907
{
	u32 trans_support;
7908 7909
	unsigned long transMethod = CFGTBL_Trans_Performant |
					CFGTBL_Trans_use_short_tags;
7910
	int i;
7911

7912 7913 7914
	if (hpsa_simple_mode)
		return;

7915 7916 7917 7918
	trans_support = readl(&(h->cfgtable->TransportSupport));
	if (!(trans_support & PERFORMANT_MODE))
		return;

7919 7920 7921 7922
	/* Check for I/O accelerator mode support */
	if (trans_support & CFGTBL_Trans_io_accel1) {
		transMethod |= CFGTBL_Trans_io_accel1 |
				CFGTBL_Trans_enable_directed_msix;
7923
		if (hpsa_alloc_ioaccel1_cmd_and_bft(h))
7924
			goto clean_up;
7925 7926 7927 7928
	} else {
		if (trans_support & CFGTBL_Trans_io_accel2) {
				transMethod |= CFGTBL_Trans_io_accel2 |
				CFGTBL_Trans_enable_directed_msix;
7929
		if (hpsa_alloc_ioaccel2_cmd_and_bft(h))
7930 7931
			goto clean_up;
		}
7932 7933
	}

7934
	h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
7935
	hpsa_get_max_perf_mode_cmds(h);
7936
	/* Performant mode ring buffer and supporting data structures */
7937
	h->reply_queue_size = h->max_commands * sizeof(u64);
7938

7939
	for (i = 0; i < h->nreply_queues; i++) {
7940 7941 7942 7943 7944
		h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
						h->reply_queue_size,
						&(h->reply_queue[i].busaddr));
		if (!h->reply_queue[i].head)
			goto clean_up;
7945 7946 7947 7948 7949
		h->reply_queue[i].size = h->max_commands;
		h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
		h->reply_queue[i].current_entry = 0;
	}

7950
	/* Need a block fetch table for performant mode */
7951
	h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
7952
				sizeof(u32)), GFP_KERNEL);
7953
	if (!h->blockFetchTable)
7954 7955
		goto clean_up;

7956
	hpsa_enter_performant_mode(h, trans_support);
7957 7958 7959
	return;

clean_up:
7960
	hpsa_free_reply_queues(h);
7961 7962 7963
	kfree(h->blockFetchTable);
}

7964
static int is_accelerated_cmd(struct CommandList *c)
7965
{
7966 7967 7968 7969 7970 7971
	return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
}

static void hpsa_drain_accel_commands(struct ctlr_info *h)
{
	struct CommandList *c = NULL;
7972
	int i, accel_cmds_out;
7973
	int refcount;
7974

7975
	do { /* wait for all outstanding ioaccel commands to drain out */
7976
		accel_cmds_out = 0;
7977 7978
		for (i = 0; i < h->nr_cmds; i++) {
			c = h->cmd_pool + i;
7979 7980 7981 7982
			refcount = atomic_inc_return(&c->refcount);
			if (refcount > 1) /* Command is allocated */
				accel_cmds_out += is_accelerated_cmd(c);
			cmd_free(h, c);
7983
		}
7984
		if (accel_cmds_out <= 0)
7985
			break;
7986 7987 7988 7989
		msleep(100);
	} while (1);
}

7990 7991 7992 7993 7994 7995
/*
 *  This is it.  Register the PCI driver information for the cards we control
 *  the OS will call our registered routines when it finds one of our cards.
 */
static int __init hpsa_init(void)
{
M
Mike Miller 已提交
7996
	return pci_register_driver(&hpsa_pci_driver);
7997 7998 7999 8000 8001 8002 8003
}

static void __exit hpsa_cleanup(void)
{
	pci_unregister_driver(&hpsa_pci_driver);
}

8004 8005
static void __attribute__((unused)) verify_offsets(void)
{
8006 8007 8008 8009 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 8020 8021 8022 8023 8024 8025 8026 8027
#define VERIFY_OFFSET(member, offset) \
	BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)

	VERIFY_OFFSET(structure_size, 0);
	VERIFY_OFFSET(volume_blk_size, 4);
	VERIFY_OFFSET(volume_blk_cnt, 8);
	VERIFY_OFFSET(phys_blk_shift, 16);
	VERIFY_OFFSET(parity_rotation_shift, 17);
	VERIFY_OFFSET(strip_size, 18);
	VERIFY_OFFSET(disk_starting_blk, 20);
	VERIFY_OFFSET(disk_blk_cnt, 28);
	VERIFY_OFFSET(data_disks_per_row, 36);
	VERIFY_OFFSET(metadata_disks_per_row, 38);
	VERIFY_OFFSET(row_cnt, 40);
	VERIFY_OFFSET(layout_map_count, 42);
	VERIFY_OFFSET(flags, 44);
	VERIFY_OFFSET(dekindex, 46);
	/* VERIFY_OFFSET(reserved, 48 */
	VERIFY_OFFSET(data, 64);

#undef VERIFY_OFFSET

8028 8029 8030 8031 8032 8033 8034 8035 8036 8037 8038 8039 8040 8041 8042 8043 8044 8045 8046 8047 8048 8049
#define VERIFY_OFFSET(member, offset) \
	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)

	VERIFY_OFFSET(IU_type, 0);
	VERIFY_OFFSET(direction, 1);
	VERIFY_OFFSET(reply_queue, 2);
	/* VERIFY_OFFSET(reserved1, 3);  */
	VERIFY_OFFSET(scsi_nexus, 4);
	VERIFY_OFFSET(Tag, 8);
	VERIFY_OFFSET(cdb, 16);
	VERIFY_OFFSET(cciss_lun, 32);
	VERIFY_OFFSET(data_len, 40);
	VERIFY_OFFSET(cmd_priority_task_attr, 44);
	VERIFY_OFFSET(sg_count, 45);
	/* VERIFY_OFFSET(reserved3 */
	VERIFY_OFFSET(err_ptr, 48);
	VERIFY_OFFSET(err_len, 56);
	/* VERIFY_OFFSET(reserved4  */
	VERIFY_OFFSET(sg, 64);

#undef VERIFY_OFFSET

8050 8051 8052 8053 8054 8055 8056 8057 8058 8059 8060 8061 8062 8063 8064 8065 8066 8067 8068 8069 8070 8071 8072 8073 8074
#define VERIFY_OFFSET(member, offset) \
	BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)

	VERIFY_OFFSET(dev_handle, 0x00);
	VERIFY_OFFSET(reserved1, 0x02);
	VERIFY_OFFSET(function, 0x03);
	VERIFY_OFFSET(reserved2, 0x04);
	VERIFY_OFFSET(err_info, 0x0C);
	VERIFY_OFFSET(reserved3, 0x10);
	VERIFY_OFFSET(err_info_len, 0x12);
	VERIFY_OFFSET(reserved4, 0x13);
	VERIFY_OFFSET(sgl_offset, 0x14);
	VERIFY_OFFSET(reserved5, 0x15);
	VERIFY_OFFSET(transfer_len, 0x1C);
	VERIFY_OFFSET(reserved6, 0x20);
	VERIFY_OFFSET(io_flags, 0x24);
	VERIFY_OFFSET(reserved7, 0x26);
	VERIFY_OFFSET(LUN, 0x34);
	VERIFY_OFFSET(control, 0x3C);
	VERIFY_OFFSET(CDB, 0x40);
	VERIFY_OFFSET(reserved8, 0x50);
	VERIFY_OFFSET(host_context_flags, 0x60);
	VERIFY_OFFSET(timeout_sec, 0x62);
	VERIFY_OFFSET(ReplyQueue, 0x64);
	VERIFY_OFFSET(reserved9, 0x65);
8075
	VERIFY_OFFSET(tag, 0x68);
8076 8077 8078 8079 8080 8081
	VERIFY_OFFSET(host_addr, 0x70);
	VERIFY_OFFSET(CISS_LUN, 0x78);
	VERIFY_OFFSET(SG, 0x78 + 8);
#undef VERIFY_OFFSET
}

8082 8083
module_init(hpsa_init);
module_exit(hpsa_cleanup);