hpsa.c 216.5 KB
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/*
 *    Disk Array driver for HP Smart Array SAS controllers
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 *    Copyright 2000, 2014 Hewlett-Packard Development Company, L.P.
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 *
 *    This program is free software; you can redistribute it and/or modify
 *    it under the terms of the GNU General Public License as published by
 *    the Free Software Foundation; version 2 of the License.
 *
 *    This program is distributed in the hope that it will be useful,
 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
 *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 *    NON INFRINGEMENT.  See the GNU General Public License for more details.
 *
 *    You should have received a copy of the GNU General Public License
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
 *
 */

#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/types.h>
#include <linux/pci.h>
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#include <linux/pci-aspm.h>
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#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/fs.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/compat.h>
#include <linux/blktrace_api.h>
#include <linux/uaccess.h>
#include <linux/io.h>
#include <linux/dma-mapping.h>
#include <linux/completion.h>
#include <linux/moduleparam.h>
#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_host.h>
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#include <scsi/scsi_tcq.h>
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#include <linux/cciss_ioctl.h>
#include <linux/string.h>
#include <linux/bitmap.h>
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#include <linux/atomic.h>
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#include <linux/jiffies.h>
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#include <linux/percpu-defs.h>
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#include <linux/percpu.h>
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#include <asm/unaligned.h>
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#include <asm/div64.h>
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#include "hpsa_cmd.h"
#include "hpsa.h"

/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
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#define HPSA_DRIVER_VERSION "3.4.4-1"
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#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
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#define HPSA "hpsa"
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/* How long to wait (in milliseconds) for board to go into simple mode */
#define MAX_CONFIG_WAIT 30000
#define MAX_IOCTL_CONFIG_WAIT 1000

/*define how many times we will try a command because of bus resets */
#define MAX_CMD_RETRIES 3

/* Embedded module documentation macros - see modules.h */
MODULE_AUTHOR("Hewlett-Packard Company");
MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
	HPSA_DRIVER_VERSION);
MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
MODULE_VERSION(HPSA_DRIVER_VERSION);
MODULE_LICENSE("GPL");

static int hpsa_allow_any;
module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(hpsa_allow_any,
		"Allow hpsa driver to access unknown HP Smart Array hardware");
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static int hpsa_simple_mode;
module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(hpsa_simple_mode,
	"Use 'simple mode' rather than 'performant mode'");
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/* define the PCI info for the cards we can control */
static const struct pci_device_id hpsa_pci_device_id[] = {
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
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	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
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	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
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	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
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	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
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	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
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	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
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	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
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	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
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	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
	{PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
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	{PCI_VENDOR_ID_HP,     PCI_ANY_ID,	PCI_ANY_ID, PCI_ANY_ID,
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		PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
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	{0,}
};

MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);

/*  board_id = Subsystem Device ID & Vendor ID
 *  product = Marketing Name for the board
 *  access = Address of the struct of function pointers
 */
static struct board_type products[] = {
	{0x3241103C, "Smart Array P212", &SA5_access},
	{0x3243103C, "Smart Array P410", &SA5_access},
	{0x3245103C, "Smart Array P410i", &SA5_access},
	{0x3247103C, "Smart Array P411", &SA5_access},
	{0x3249103C, "Smart Array P812", &SA5_access},
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	{0x324A103C, "Smart Array P712m", &SA5_access},
	{0x324B103C, "Smart Array P711m", &SA5_access},
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	{0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
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	{0x3350103C, "Smart Array P222", &SA5_access},
	{0x3351103C, "Smart Array P420", &SA5_access},
	{0x3352103C, "Smart Array P421", &SA5_access},
	{0x3353103C, "Smart Array P822", &SA5_access},
	{0x3354103C, "Smart Array P420i", &SA5_access},
	{0x3355103C, "Smart Array P220i", &SA5_access},
	{0x3356103C, "Smart Array P721m", &SA5_access},
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	{0x1921103C, "Smart Array P830i", &SA5_access},
	{0x1922103C, "Smart Array P430", &SA5_access},
	{0x1923103C, "Smart Array P431", &SA5_access},
	{0x1924103C, "Smart Array P830", &SA5_access},
	{0x1926103C, "Smart Array P731m", &SA5_access},
	{0x1928103C, "Smart Array P230i", &SA5_access},
	{0x1929103C, "Smart Array P530", &SA5_access},
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	{0x21BD103C, "Smart Array", &SA5_access},
	{0x21BE103C, "Smart Array", &SA5_access},
	{0x21BF103C, "Smart Array", &SA5_access},
	{0x21C0103C, "Smart Array", &SA5_access},
	{0x21C1103C, "Smart Array", &SA5_access},
	{0x21C2103C, "Smart Array", &SA5_access},
	{0x21C3103C, "Smart Array", &SA5_access},
	{0x21C4103C, "Smart Array", &SA5_access},
	{0x21C5103C, "Smart Array", &SA5_access},
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	{0x21C6103C, "Smart Array", &SA5_access},
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	{0x21C7103C, "Smart Array", &SA5_access},
	{0x21C8103C, "Smart Array", &SA5_access},
	{0x21C9103C, "Smart Array", &SA5_access},
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	{0x21CA103C, "Smart Array", &SA5_access},
	{0x21CB103C, "Smart Array", &SA5_access},
	{0x21CC103C, "Smart Array", &SA5_access},
	{0x21CD103C, "Smart Array", &SA5_access},
	{0x21CE103C, "Smart Array", &SA5_access},
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	{0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
	{0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
	{0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
	{0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
	{0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
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	{0xFFFF103C, "Unknown Smart Array", &SA5_access},
};

static int number_of_controllers;

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static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
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static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
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#ifdef CONFIG_COMPAT
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static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
	void __user *arg);
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#endif

static void cmd_free(struct ctlr_info *h, struct CommandList *c);
static struct CommandList *cmd_alloc(struct ctlr_info *h);
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static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
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	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
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	int cmd_type);
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static void hpsa_free_cmd_pool(struct ctlr_info *h);
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#define VPD_PAGE (1 << 8)
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static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
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static void hpsa_scan_start(struct Scsi_Host *);
static int hpsa_scan_finished(struct Scsi_Host *sh,
	unsigned long elapsed_time);
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static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
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static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
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static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
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static int hpsa_slave_alloc(struct scsi_device *sdev);
static void hpsa_slave_destroy(struct scsi_device *sdev);

static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
static int check_for_unit_attention(struct ctlr_info *h,
	struct CommandList *c);
static void check_ioctl_unit_attention(struct ctlr_info *h,
	struct CommandList *c);
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/* performant mode helper functions */
static void calc_bucket_map(int *bucket, int num_buckets,
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	int nsgs, int min_blocks, u32 *bucket_map);
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static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
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static inline u32 next_command(struct ctlr_info *h, u8 q);
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static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
			       u64 *cfg_offset);
static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
				    unsigned long *memory_bar);
static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
				     int wait_for_ready);
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static inline void finish_cmd(struct CommandList *c);
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static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
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#define BOARD_NOT_READY 0
#define BOARD_READY 1
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static void hpsa_drain_accel_commands(struct ctlr_info *h);
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static void hpsa_flush_cache(struct ctlr_info *h);
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static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
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	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
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static void hpsa_command_resubmit_worker(struct work_struct *work);
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static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
{
	unsigned long *priv = shost_priv(sdev->host);
	return (struct ctlr_info *) *priv;
}

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static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
{
	unsigned long *priv = shost_priv(sh);
	return (struct ctlr_info *) *priv;
}

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static int check_for_unit_attention(struct ctlr_info *h,
	struct CommandList *c)
{
	if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
		return 0;

	switch (c->err_info->SenseInfo[12]) {
	case STATE_CHANGED:
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		dev_warn(&h->pdev->dev, HPSA "%d: a state change "
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			"detected, command retried\n", h->ctlr);
		break;
	case LUN_FAILED:
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		dev_warn(&h->pdev->dev,
			HPSA "%d: LUN failure detected\n", h->ctlr);
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		break;
	case REPORT_LUNS_CHANGED:
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		dev_warn(&h->pdev->dev,
			HPSA "%d: report LUN data changed\n", h->ctlr);
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	/*
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	 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
	 * target (array) devices.
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	 */
		break;
	case POWER_OR_RESET:
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		dev_warn(&h->pdev->dev, HPSA "%d: a power on "
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			"or device reset detected\n", h->ctlr);
		break;
	case UNIT_ATTENTION_CLEARED:
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		dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
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		    "cleared by another initiator\n", h->ctlr);
		break;
	default:
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		dev_warn(&h->pdev->dev, HPSA "%d: unknown "
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			"unit attention detected\n", h->ctlr);
		break;
	}
	return 1;
}

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static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
{
	if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
		(c->err_info->ScsiStatus != SAM_STAT_BUSY &&
		 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
		return 0;
	dev_warn(&h->pdev->dev, HPSA "device busy");
	return 1;
}

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static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
					 struct device_attribute *attr,
					 const char *buf, size_t count)
{
	int status, len;
	struct ctlr_info *h;
	struct Scsi_Host *shost = class_to_shost(dev);
	char tmpbuf[10];

	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
		return -EACCES;
	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
	strncpy(tmpbuf, buf, len);
	tmpbuf[len] = '\0';
	if (sscanf(tmpbuf, "%d", &status) != 1)
		return -EINVAL;
	h = shost_to_hba(shost);
	h->acciopath_status = !!status;
	dev_warn(&h->pdev->dev,
		"hpsa: HP SSD Smart Path %s via sysfs update.\n",
		h->acciopath_status ? "enabled" : "disabled");
	return count;
}

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static ssize_t host_store_raid_offload_debug(struct device *dev,
					 struct device_attribute *attr,
					 const char *buf, size_t count)
{
	int debug_level, len;
	struct ctlr_info *h;
	struct Scsi_Host *shost = class_to_shost(dev);
	char tmpbuf[10];

	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
		return -EACCES;
	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
	strncpy(tmpbuf, buf, len);
	tmpbuf[len] = '\0';
	if (sscanf(tmpbuf, "%d", &debug_level) != 1)
		return -EINVAL;
	if (debug_level < 0)
		debug_level = 0;
	h = shost_to_hba(shost);
	h->raid_offload_debug = debug_level;
	dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
		h->raid_offload_debug);
	return count;
}

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static ssize_t host_store_rescan(struct device *dev,
				 struct device_attribute *attr,
				 const char *buf, size_t count)
{
	struct ctlr_info *h;
	struct Scsi_Host *shost = class_to_shost(dev);
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	h = shost_to_hba(shost);
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	hpsa_scan_start(h->scsi_host);
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	return count;
}

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static ssize_t host_show_firmware_revision(struct device *dev,
	     struct device_attribute *attr, char *buf)
{
	struct ctlr_info *h;
	struct Scsi_Host *shost = class_to_shost(dev);
	unsigned char *fwrev;

	h = shost_to_hba(shost);
	if (!h->hba_inquiry_data)
		return 0;
	fwrev = &h->hba_inquiry_data[32];
	return snprintf(buf, 20, "%c%c%c%c\n",
		fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
}

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static ssize_t host_show_commands_outstanding(struct device *dev,
	     struct device_attribute *attr, char *buf)
{
	struct Scsi_Host *shost = class_to_shost(dev);
	struct ctlr_info *h = shost_to_hba(shost);

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	return snprintf(buf, 20, "%d\n",
			atomic_read(&h->commands_outstanding));
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}

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static ssize_t host_show_transport_mode(struct device *dev,
	struct device_attribute *attr, char *buf)
{
	struct ctlr_info *h;
	struct Scsi_Host *shost = class_to_shost(dev);

	h = shost_to_hba(shost);
	return snprintf(buf, 20, "%s\n",
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		h->transMethod & CFGTBL_Trans_Performant ?
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			"performant" : "simple");
}

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static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
	struct device_attribute *attr, char *buf)
{
	struct ctlr_info *h;
	struct Scsi_Host *shost = class_to_shost(dev);

	h = shost_to_hba(shost);
	return snprintf(buf, 30, "HP SSD Smart Path %s\n",
		(h->acciopath_status == 1) ?  "enabled" : "disabled");
}

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/* List of controllers which cannot be hard reset on kexec with reset_devices */
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static u32 unresettable_controller[] = {
	0x324a103C, /* Smart Array P712m */
	0x324b103C, /* SmartArray P711m */
	0x3223103C, /* Smart Array P800 */
	0x3234103C, /* Smart Array P400 */
	0x3235103C, /* Smart Array P400i */
	0x3211103C, /* Smart Array E200i */
	0x3212103C, /* Smart Array E200 */
	0x3213103C, /* Smart Array E200i */
	0x3214103C, /* Smart Array E200i */
	0x3215103C, /* Smart Array E200i */
	0x3237103C, /* Smart Array E500 */
	0x323D103C, /* Smart Array P700m */
436
	0x40800E11, /* Smart Array 5i */
437 438
	0x409C0E11, /* Smart Array 6400 */
	0x409D0E11, /* Smart Array 6400 EM */
439 440 441 442 443 444
	0x40700E11, /* Smart Array 5300 */
	0x40820E11, /* Smart Array 532 */
	0x40830E11, /* Smart Array 5312 */
	0x409A0E11, /* Smart Array 641 */
	0x409B0E11, /* Smart Array 642 */
	0x40910E11, /* Smart Array 6i */
445 446
};

447 448
/* List of controllers which cannot even be soft reset */
static u32 soft_unresettable_controller[] = {
449
	0x40800E11, /* Smart Array 5i */
450 451 452 453 454 455
	0x40700E11, /* Smart Array 5300 */
	0x40820E11, /* Smart Array 532 */
	0x40830E11, /* Smart Array 5312 */
	0x409A0E11, /* Smart Array 641 */
	0x409B0E11, /* Smart Array 642 */
	0x40910E11, /* Smart Array 6i */
456 457 458 459 460 461 462 463 464 465 466 467
	/* Exclude 640x boards.  These are two pci devices in one slot
	 * which share a battery backed cache module.  One controls the
	 * cache, the other accesses the cache through the one that controls
	 * it.  If we reset the one controlling the cache, the other will
	 * likely not be happy.  Just forbid resetting this conjoined mess.
	 * The 640x isn't really supported by hpsa anyway.
	 */
	0x409C0E11, /* Smart Array 6400 */
	0x409D0E11, /* Smart Array 6400 EM */
};

static int ctlr_is_hard_resettable(u32 board_id)
468 469 470 471
{
	int i;

	for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
472 473 474 475 476 477 478 479 480 481 482
		if (unresettable_controller[i] == board_id)
			return 0;
	return 1;
}

static int ctlr_is_soft_resettable(u32 board_id)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
		if (soft_unresettable_controller[i] == board_id)
483 484 485 486
			return 0;
	return 1;
}

487 488 489 490 491 492
static int ctlr_is_resettable(u32 board_id)
{
	return ctlr_is_hard_resettable(board_id) ||
		ctlr_is_soft_resettable(board_id);
}

493 494 495 496 497 498 499
static ssize_t host_show_resettable(struct device *dev,
	struct device_attribute *attr, char *buf)
{
	struct ctlr_info *h;
	struct Scsi_Host *shost = class_to_shost(dev);

	h = shost_to_hba(shost);
500
	return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
501 502
}

503 504 505 506 507
static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
{
	return (scsi3addr[3] & 0xC0) == 0x40;
}

508 509
static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
	"1(+0)ADM", "UNKNOWN"
510
};
511 512 513 514 515 516 517
#define HPSA_RAID_0	0
#define HPSA_RAID_4	1
#define HPSA_RAID_1	2	/* also used for RAID 10 */
#define HPSA_RAID_5	3	/* also used for RAID 50 */
#define HPSA_RAID_51	4
#define HPSA_RAID_6	5	/* also used for RAID 60 */
#define HPSA_RAID_ADM	6	/* also used for RAID 1+0 ADM */
518 519 520 521 522 523
#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)

static ssize_t raid_level_show(struct device *dev,
	     struct device_attribute *attr, char *buf)
{
	ssize_t l = 0;
524
	unsigned char rlevel;
525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547
	struct ctlr_info *h;
	struct scsi_device *sdev;
	struct hpsa_scsi_dev_t *hdev;
	unsigned long flags;

	sdev = to_scsi_device(dev);
	h = sdev_to_hba(sdev);
	spin_lock_irqsave(&h->lock, flags);
	hdev = sdev->hostdata;
	if (!hdev) {
		spin_unlock_irqrestore(&h->lock, flags);
		return -ENODEV;
	}

	/* Is this even a logical drive? */
	if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
		spin_unlock_irqrestore(&h->lock, flags);
		l = snprintf(buf, PAGE_SIZE, "N/A\n");
		return l;
	}

	rlevel = hdev->raid_level;
	spin_unlock_irqrestore(&h->lock, flags);
548
	if (rlevel > RAID_UNKNOWN)
549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605
		rlevel = RAID_UNKNOWN;
	l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
	return l;
}

static ssize_t lunid_show(struct device *dev,
	     struct device_attribute *attr, char *buf)
{
	struct ctlr_info *h;
	struct scsi_device *sdev;
	struct hpsa_scsi_dev_t *hdev;
	unsigned long flags;
	unsigned char lunid[8];

	sdev = to_scsi_device(dev);
	h = sdev_to_hba(sdev);
	spin_lock_irqsave(&h->lock, flags);
	hdev = sdev->hostdata;
	if (!hdev) {
		spin_unlock_irqrestore(&h->lock, flags);
		return -ENODEV;
	}
	memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
	spin_unlock_irqrestore(&h->lock, flags);
	return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
		lunid[0], lunid[1], lunid[2], lunid[3],
		lunid[4], lunid[5], lunid[6], lunid[7]);
}

static ssize_t unique_id_show(struct device *dev,
	     struct device_attribute *attr, char *buf)
{
	struct ctlr_info *h;
	struct scsi_device *sdev;
	struct hpsa_scsi_dev_t *hdev;
	unsigned long flags;
	unsigned char sn[16];

	sdev = to_scsi_device(dev);
	h = sdev_to_hba(sdev);
	spin_lock_irqsave(&h->lock, flags);
	hdev = sdev->hostdata;
	if (!hdev) {
		spin_unlock_irqrestore(&h->lock, flags);
		return -ENODEV;
	}
	memcpy(sn, hdev->device_id, sizeof(sn));
	spin_unlock_irqrestore(&h->lock, flags);
	return snprintf(buf, 16 * 2 + 2,
			"%02X%02X%02X%02X%02X%02X%02X%02X"
			"%02X%02X%02X%02X%02X%02X%02X%02X\n",
			sn[0], sn[1], sn[2], sn[3],
			sn[4], sn[5], sn[6], sn[7],
			sn[8], sn[9], sn[10], sn[11],
			sn[12], sn[13], sn[14], sn[15]);
}

606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627
static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
	     struct device_attribute *attr, char *buf)
{
	struct ctlr_info *h;
	struct scsi_device *sdev;
	struct hpsa_scsi_dev_t *hdev;
	unsigned long flags;
	int offload_enabled;

	sdev = to_scsi_device(dev);
	h = sdev_to_hba(sdev);
	spin_lock_irqsave(&h->lock, flags);
	hdev = sdev->hostdata;
	if (!hdev) {
		spin_unlock_irqrestore(&h->lock, flags);
		return -ENODEV;
	}
	offload_enabled = hdev->offload_enabled;
	spin_unlock_irqrestore(&h->lock, flags);
	return snprintf(buf, 20, "%d\n", offload_enabled);
}

628 629 630 631
static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
632 633
static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
			host_show_hp_ssd_smart_path_enabled, NULL);
634 635 636
static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
		host_show_hp_ssd_smart_path_status,
		host_store_hp_ssd_smart_path_status);
637 638
static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
			host_store_raid_offload_debug);
639 640 641 642 643 644
static DEVICE_ATTR(firmware_revision, S_IRUGO,
	host_show_firmware_revision, NULL);
static DEVICE_ATTR(commands_outstanding, S_IRUGO,
	host_show_commands_outstanding, NULL);
static DEVICE_ATTR(transport_mode, S_IRUGO,
	host_show_transport_mode, NULL);
645 646
static DEVICE_ATTR(resettable, S_IRUGO,
	host_show_resettable, NULL);
647 648 649 650 651

static struct device_attribute *hpsa_sdev_attrs[] = {
	&dev_attr_raid_level,
	&dev_attr_lunid,
	&dev_attr_unique_id,
652
	&dev_attr_hp_ssd_smart_path_enabled,
653 654 655 656 657 658 659 660
	NULL,
};

static struct device_attribute *hpsa_shost_attrs[] = {
	&dev_attr_rescan,
	&dev_attr_firmware_revision,
	&dev_attr_commands_outstanding,
	&dev_attr_transport_mode,
661
	&dev_attr_resettable,
662
	&dev_attr_hp_ssd_smart_path_status,
663
	&dev_attr_raid_offload_debug,
664 665 666 667 668
	NULL,
};

static struct scsi_host_template hpsa_driver_template = {
	.module			= THIS_MODULE,
669 670
	.name			= HPSA,
	.proc_name		= HPSA,
671 672 673
	.queuecommand		= hpsa_scsi_queue_command,
	.scan_start		= hpsa_scan_start,
	.scan_finished		= hpsa_scan_finished,
D
Don Brace 已提交
674
	.change_queue_depth	= hpsa_change_queue_depth,
675 676
	.this_id		= -1,
	.use_clustering		= ENABLE_CLUSTERING,
677
	.eh_abort_handler	= hpsa_eh_abort_handler,
678 679 680 681 682 683 684 685 686
	.eh_device_reset_handler = hpsa_eh_device_reset_handler,
	.ioctl			= hpsa_ioctl,
	.slave_alloc		= hpsa_slave_alloc,
	.slave_destroy		= hpsa_slave_destroy,
#ifdef CONFIG_COMPAT
	.compat_ioctl		= hpsa_compat_ioctl,
#endif
	.sdev_attrs = hpsa_sdev_attrs,
	.shost_attrs = hpsa_shost_attrs,
687
	.max_sectors = 8192,
688
	.no_write_same = 1,
689 690
};

691
static inline u32 next_command(struct ctlr_info *h, u8 q)
692 693
{
	u32 a;
694
	struct reply_queue_buffer *rq = &h->reply_queue[q];
695

696 697 698
	if (h->transMethod & CFGTBL_Trans_io_accel1)
		return h->access.command_completed(h, q);

699
	if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
700
		return h->access.command_completed(h, q);
701

702 703 704
	if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
		a = rq->head[rq->current_entry];
		rq->current_entry++;
705
		atomic_dec(&h->commands_outstanding);
706 707 708 709
	} else {
		a = FIFO_EMPTY;
	}
	/* Check for wraparound */
710 711 712
	if (rq->current_entry == h->max_commands) {
		rq->current_entry = 0;
		rq->wraparound ^= 1;
713 714 715 716
	}
	return a;
}

717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742
/*
 * There are some special bits in the bus address of the
 * command that we have to set for the controller to know
 * how to process the command:
 *
 * Normal performant mode:
 * bit 0: 1 means performant mode, 0 means simple mode.
 * bits 1-3 = block fetch table entry
 * bits 4-6 = command type (== 0)
 *
 * ioaccel1 mode:
 * bit 0 = "performant mode" bit.
 * bits 1-3 = block fetch table entry
 * bits 4-6 = command type (== 110)
 * (command type is needed because ioaccel1 mode
 * commands are submitted through the same register as normal
 * mode commands, so this is how the controller knows whether
 * the command is normal mode or ioaccel1 mode.)
 *
 * ioaccel2 mode:
 * bit 0 = "performant mode" bit.
 * bits 1-4 = block fetch table entry (note extra bit)
 * bits 4-6 = not needed, because ioaccel2 mode has
 * a separate special register for submitting commands.
 */

743 744 745 746 747 748
/* set_performant_mode: Modify the tag for cciss performant
 * set bit 0 for pull model, bits 3-1 for block fetch
 * register number
 */
static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
{
749
	if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
750
		c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
751
		if (likely(h->msix_vector > 0))
752
			c->Header.ReplyQueue =
753
				raw_smp_processor_id() % h->nreply_queues;
754
	}
755 756
}

757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791
static void set_ioaccel1_performant_mode(struct ctlr_info *h,
						struct CommandList *c)
{
	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];

	/* Tell the controller to post the reply to the queue for this
	 * processor.  This seems to give the best I/O throughput.
	 */
	cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
	/* Set the bits in the address sent down to include:
	 *  - performant mode bit (bit 0)
	 *  - pull count (bits 1-3)
	 *  - command type (bits 4-6)
	 */
	c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
					IOACCEL1_BUSADDR_CMDTYPE;
}

static void set_ioaccel2_performant_mode(struct ctlr_info *h,
						struct CommandList *c)
{
	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];

	/* Tell the controller to post the reply to the queue for this
	 * processor.  This seems to give the best I/O throughput.
	 */
	cp->reply_queue = smp_processor_id() % h->nreply_queues;
	/* Set the bits in the address sent down to include:
	 *  - performant mode bit not used in ioaccel mode 2
	 *  - pull count (bits 0-3)
	 *  - command type isn't needed for ioaccel2
	 */
	c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
}

792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820
static int is_firmware_flash_cmd(u8 *cdb)
{
	return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
}

/*
 * During firmware flash, the heartbeat register may not update as frequently
 * as it should.  So we dial down lockup detection during firmware flash. and
 * dial it back up when firmware flash completes.
 */
#define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
#define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
		struct CommandList *c)
{
	if (!is_firmware_flash_cmd(c->Request.CDB))
		return;
	atomic_inc(&h->firmware_flash_in_progress);
	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
}

static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
		struct CommandList *c)
{
	if (is_firmware_flash_cmd(c->Request.CDB) &&
		atomic_dec_and_test(&h->firmware_flash_in_progress))
		h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
}

821 822 823
static void enqueue_cmd_and_start_io(struct ctlr_info *h,
	struct CommandList *c)
{
824 825
	dial_down_lockup_detection_during_fw_flash(h, c);
	atomic_inc(&h->commands_outstanding);
826 827 828
	switch (c->cmd_type) {
	case CMD_IOACCEL1:
		set_ioaccel1_performant_mode(h, c);
829
		writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
830 831 832
		break;
	case CMD_IOACCEL2:
		set_ioaccel2_performant_mode(h, c);
833
		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
834 835 836
		break;
	default:
		set_performant_mode(h, c);
837
		h->access.submit_command(h, c);
838
	}
839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854
}

static inline int is_hba_lunid(unsigned char scsi3addr[])
{
	return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
}

static inline int is_scsi_rev_5(struct ctlr_info *h)
{
	if (!h->hba_inquiry_data)
		return 0;
	if ((h->hba_inquiry_data[2] & 0x07) == 5)
		return 1;
	return 0;
}

855 856 857 858 859 860 861
static int hpsa_find_target_lun(struct ctlr_info *h,
	unsigned char scsi3addr[], int bus, int *target, int *lun)
{
	/* finds an unused bus, target, lun for a new physical device
	 * assumes h->devlock is held
	 */
	int i, found = 0;
862
	DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
863

864
	bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
865 866 867

	for (i = 0; i < h->ndevices; i++) {
		if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
868
			__set_bit(h->dev[i]->target, lun_taken);
869 870
	}

871 872 873 874 875 876
	i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
	if (i < HPSA_MAX_DEVICES) {
		/* *bus = 1; */
		*target = i;
		*lun = 0;
		found = 1;
877 878 879 880 881 882 883 884 885 886 887 888 889 890 891
	}
	return !found;
}

/* Add an entry into h->dev[] array. */
static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
		struct hpsa_scsi_dev_t *device,
		struct hpsa_scsi_dev_t *added[], int *nadded)
{
	/* assumes h->devlock is held */
	int n = h->ndevices;
	int i;
	unsigned char addr1[8], addr2[8];
	struct hpsa_scsi_dev_t *sd;

892
	if (n >= HPSA_MAX_DEVICES) {
893 894 895 896 897 898 899 900 901 902 903 904
		dev_err(&h->pdev->dev, "too many devices, some will be "
			"inaccessible.\n");
		return -1;
	}

	/* physical devices do not have lun or target assigned until now. */
	if (device->lun != -1)
		/* Logical device, lun is already assigned. */
		goto lun_assigned;

	/* If this device a non-zero lun of a multi-lun device
	 * byte 4 of the 8-byte LUN addr will contain the logical
D
Don Brace 已提交
905
	 * unit no, zero otherwise.
906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959
	 */
	if (device->scsi3addr[4] == 0) {
		/* This is not a non-zero lun of a multi-lun device */
		if (hpsa_find_target_lun(h, device->scsi3addr,
			device->bus, &device->target, &device->lun) != 0)
			return -1;
		goto lun_assigned;
	}

	/* This is a non-zero lun of a multi-lun device.
	 * Search through our list and find the device which
	 * has the same 8 byte LUN address, excepting byte 4.
	 * Assign the same bus and target for this new LUN.
	 * Use the logical unit number from the firmware.
	 */
	memcpy(addr1, device->scsi3addr, 8);
	addr1[4] = 0;
	for (i = 0; i < n; i++) {
		sd = h->dev[i];
		memcpy(addr2, sd->scsi3addr, 8);
		addr2[4] = 0;
		/* differ only in byte 4? */
		if (memcmp(addr1, addr2, 8) == 0) {
			device->bus = sd->bus;
			device->target = sd->target;
			device->lun = device->scsi3addr[4];
			break;
		}
	}
	if (device->lun == -1) {
		dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
			" suspect firmware bug or unsupported hardware "
			"configuration.\n");
			return -1;
	}

lun_assigned:

	h->dev[n] = device;
	h->ndevices++;
	added[*nadded] = device;
	(*nadded)++;

	/* initially, (before registering with scsi layer) we don't
	 * know our hostno and we don't want to print anything first
	 * time anyway (the scsi layer's inquiries will show that info)
	 */
	/* if (hostno != -1) */
		dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
			scsi_device_type(device->devtype), hostno,
			device->bus, device->target, device->lun);
	return 0;
}

960 961 962 963 964 965 966 967 968
/* Update an entry in h->dev[] array. */
static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
	int entry, struct hpsa_scsi_dev_t *new_entry)
{
	/* assumes h->devlock is held */
	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);

	/* Raid level changed. */
	h->dev[entry]->raid_level = new_entry->raid_level;
969

970 971 972 973 974 975 976 977 978 979 980 981 982 983
	/* Raid offload parameters changed.  Careful about the ordering. */
	if (new_entry->offload_config && new_entry->offload_enabled) {
		/*
		 * if drive is newly offload_enabled, we want to copy the
		 * raid map data first.  If previously offload_enabled and
		 * offload_config were set, raid map data had better be
		 * the same as it was before.  if raid map data is changed
		 * then it had better be the case that
		 * h->dev[entry]->offload_enabled is currently 0.
		 */
		h->dev[entry]->raid_map = new_entry->raid_map;
		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
		wmb(); /* ensure raid map updated prior to ->offload_enabled */
	}
984
	h->dev[entry]->offload_config = new_entry->offload_config;
985
	h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
986 987
	h->dev[entry]->offload_enabled = new_entry->offload_enabled;
	h->dev[entry]->queue_depth = new_entry->queue_depth;
988

989 990 991 992 993
	dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
		scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
		new_entry->target, new_entry->lun);
}

994 995 996 997 998 999 1000
/* Replace an entry from h->dev[] array. */
static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
	int entry, struct hpsa_scsi_dev_t *new_entry,
	struct hpsa_scsi_dev_t *added[], int *nadded,
	struct hpsa_scsi_dev_t *removed[], int *nremoved)
{
	/* assumes h->devlock is held */
1001
	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1002 1003
	removed[*nremoved] = h->dev[entry];
	(*nremoved)++;
1004 1005 1006 1007 1008 1009 1010 1011 1012 1013

	/*
	 * New physical devices won't have target/lun assigned yet
	 * so we need to preserve the values in the slot we are replacing.
	 */
	if (new_entry->target == -1) {
		new_entry->target = h->dev[entry]->target;
		new_entry->lun = h->dev[entry]->lun;
	}

1014 1015 1016 1017 1018 1019 1020 1021
	h->dev[entry] = new_entry;
	added[*nadded] = new_entry;
	(*nadded)++;
	dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
		scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
			new_entry->target, new_entry->lun);
}

1022 1023 1024 1025 1026 1027 1028 1029
/* Remove an entry from h->dev[] array. */
static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
	struct hpsa_scsi_dev_t *removed[], int *nremoved)
{
	/* assumes h->devlock is held */
	int i;
	struct hpsa_scsi_dev_t *sd;

1030
	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099

	sd = h->dev[entry];
	removed[*nremoved] = h->dev[entry];
	(*nremoved)++;

	for (i = entry; i < h->ndevices-1; i++)
		h->dev[i] = h->dev[i+1];
	h->ndevices--;
	dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
		scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
		sd->lun);
}

#define SCSI3ADDR_EQ(a, b) ( \
	(a)[7] == (b)[7] && \
	(a)[6] == (b)[6] && \
	(a)[5] == (b)[5] && \
	(a)[4] == (b)[4] && \
	(a)[3] == (b)[3] && \
	(a)[2] == (b)[2] && \
	(a)[1] == (b)[1] && \
	(a)[0] == (b)[0])

static void fixup_botched_add(struct ctlr_info *h,
	struct hpsa_scsi_dev_t *added)
{
	/* called when scsi_add_device fails in order to re-adjust
	 * h->dev[] to match the mid layer's view.
	 */
	unsigned long flags;
	int i, j;

	spin_lock_irqsave(&h->lock, flags);
	for (i = 0; i < h->ndevices; i++) {
		if (h->dev[i] == added) {
			for (j = i; j < h->ndevices-1; j++)
				h->dev[j] = h->dev[j+1];
			h->ndevices--;
			break;
		}
	}
	spin_unlock_irqrestore(&h->lock, flags);
	kfree(added);
}

static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
	struct hpsa_scsi_dev_t *dev2)
{
	/* we compare everything except lun and target as these
	 * are not yet assigned.  Compare parts likely
	 * to differ first
	 */
	if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
		sizeof(dev1->scsi3addr)) != 0)
		return 0;
	if (memcmp(dev1->device_id, dev2->device_id,
		sizeof(dev1->device_id)) != 0)
		return 0;
	if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
		return 0;
	if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
		return 0;
	if (dev1->devtype != dev2->devtype)
		return 0;
	if (dev1->bus != dev2->bus)
		return 0;
	return 1;
}

1100 1101 1102 1103 1104 1105 1106 1107 1108
static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
	struct hpsa_scsi_dev_t *dev2)
{
	/* Device attributes that can change, but don't mean
	 * that the device is a different device, nor that the OS
	 * needs to be told anything about the change.
	 */
	if (dev1->raid_level != dev2->raid_level)
		return 1;
1109 1110 1111 1112
	if (dev1->offload_config != dev2->offload_config)
		return 1;
	if (dev1->offload_enabled != dev2->offload_enabled)
		return 1;
1113 1114
	if (dev1->queue_depth != dev2->queue_depth)
		return 1;
1115 1116 1117
	return 0;
}

1118 1119 1120
/* Find needle in haystack.  If exact match found, return DEVICE_SAME,
 * and return needle location in *index.  If scsi3addr matches, but not
 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1121 1122 1123 1124
 * location in *index.
 * In the case of a minor device attribute change, such as RAID level, just
 * return DEVICE_UPDATED, along with the updated device's location in index.
 * If needle not found, return DEVICE_NOT_FOUND.
1125 1126 1127 1128 1129 1130 1131 1132 1133
 */
static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
	struct hpsa_scsi_dev_t *haystack[], int haystack_size,
	int *index)
{
	int i;
#define DEVICE_NOT_FOUND 0
#define DEVICE_CHANGED 1
#define DEVICE_SAME 2
1134
#define DEVICE_UPDATED 3
1135
	for (i = 0; i < haystack_size; i++) {
1136 1137
		if (haystack[i] == NULL) /* previously removed. */
			continue;
1138 1139
		if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
			*index = i;
1140 1141 1142
			if (device_is_the_same(needle, haystack[i])) {
				if (device_updated(needle, haystack[i]))
					return DEVICE_UPDATED;
1143
				return DEVICE_SAME;
1144
			} else {
1145 1146 1147
				/* Keep offline devices offline */
				if (needle->volume_offline)
					return DEVICE_NOT_FOUND;
1148
				return DEVICE_CHANGED;
1149
			}
1150 1151 1152 1153 1154 1155
		}
	}
	*index = -1;
	return DEVICE_NOT_FOUND;
}

1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259
static void hpsa_monitor_offline_device(struct ctlr_info *h,
					unsigned char scsi3addr[])
{
	struct offline_device_entry *device;
	unsigned long flags;

	/* Check to see if device is already on the list */
	spin_lock_irqsave(&h->offline_device_lock, flags);
	list_for_each_entry(device, &h->offline_device_list, offline_list) {
		if (memcmp(device->scsi3addr, scsi3addr,
			sizeof(device->scsi3addr)) == 0) {
			spin_unlock_irqrestore(&h->offline_device_lock, flags);
			return;
		}
	}
	spin_unlock_irqrestore(&h->offline_device_lock, flags);

	/* Device is not on the list, add it. */
	device = kmalloc(sizeof(*device), GFP_KERNEL);
	if (!device) {
		dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
		return;
	}
	memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
	spin_lock_irqsave(&h->offline_device_lock, flags);
	list_add_tail(&device->offline_list, &h->offline_device_list);
	spin_unlock_irqrestore(&h->offline_device_lock, flags);
}

/* Print a message explaining various offline volume states */
static void hpsa_show_volume_status(struct ctlr_info *h,
	struct hpsa_scsi_dev_t *sd)
{
	if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
	switch (sd->volume_offline) {
	case HPSA_LV_OK:
		break;
	case HPSA_LV_UNDERGOING_ERASE:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_UNDERGOING_RPI:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is undergoing rapid parity initialization process.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_PENDING_RPI:
		dev_info(&h->pdev->dev,
				"C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
				h->scsi_host->host_no,
				sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_ENCRYPTED_NO_KEY:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_UNDERGOING_ENCRYPTION:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_PENDING_ENCRYPTION:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
		dev_info(&h->pdev->dev,
			"C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
			h->scsi_host->host_no,
			sd->bus, sd->target, sd->lun);
		break;
	}
}

1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338
/*
 * Figure the list of physical drive pointers for a logical drive with
 * raid offload configured.
 */
static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
				struct hpsa_scsi_dev_t *dev[], int ndevices,
				struct hpsa_scsi_dev_t *logical_drive)
{
	struct raid_map_data *map = &logical_drive->raid_map;
	struct raid_map_disk_data *dd = &map->data[0];
	int i, j;
	int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
				le16_to_cpu(map->metadata_disks_per_row);
	int nraid_map_entries = le16_to_cpu(map->row_cnt) *
				le16_to_cpu(map->layout_map_count) *
				total_disks_per_row;
	int nphys_disk = le16_to_cpu(map->layout_map_count) *
				total_disks_per_row;
	int qdepth;

	if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
		nraid_map_entries = RAID_MAP_MAX_ENTRIES;

	qdepth = 0;
	for (i = 0; i < nraid_map_entries; i++) {
		logical_drive->phys_disk[i] = NULL;
		if (!logical_drive->offload_config)
			continue;
		for (j = 0; j < ndevices; j++) {
			if (dev[j]->devtype != TYPE_DISK)
				continue;
			if (is_logical_dev_addr_mode(dev[j]->scsi3addr))
				continue;
			if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
				continue;

			logical_drive->phys_disk[i] = dev[j];
			if (i < nphys_disk)
				qdepth = min(h->nr_cmds, qdepth +
				    logical_drive->phys_disk[i]->queue_depth);
			break;
		}

		/*
		 * This can happen if a physical drive is removed and
		 * the logical drive is degraded.  In that case, the RAID
		 * map data will refer to a physical disk which isn't actually
		 * present.  And in that case offload_enabled should already
		 * be 0, but we'll turn it off here just in case
		 */
		if (!logical_drive->phys_disk[i]) {
			logical_drive->offload_enabled = 0;
			logical_drive->queue_depth = h->nr_cmds;
		}
	}
	if (nraid_map_entries)
		/*
		 * This is correct for reads, too high for full stripe writes,
		 * way too high for partial stripe writes
		 */
		logical_drive->queue_depth = qdepth;
	else
		logical_drive->queue_depth = h->nr_cmds;
}

static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
				struct hpsa_scsi_dev_t *dev[], int ndevices)
{
	int i;

	for (i = 0; i < ndevices; i++) {
		if (dev[i]->devtype != TYPE_DISK)
			continue;
		if (!is_logical_dev_addr_mode(dev[i]->scsi3addr))
			continue;
		hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
	}
}

1339
static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352
	struct hpsa_scsi_dev_t *sd[], int nsds)
{
	/* sd contains scsi3 addresses and devtypes, and inquiry
	 * data.  This function takes what's in sd to be the current
	 * reality and updates h->dev[] to reflect that reality.
	 */
	int i, entry, device_change, changes = 0;
	struct hpsa_scsi_dev_t *csd;
	unsigned long flags;
	struct hpsa_scsi_dev_t **added, **removed;
	int nadded, nremoved;
	struct Scsi_Host *sh = NULL;

1353 1354
	added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
	removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367

	if (!added || !removed) {
		dev_warn(&h->pdev->dev, "out of memory in "
			"adjust_hpsa_scsi_table\n");
		goto free_and_out;
	}

	spin_lock_irqsave(&h->devlock, flags);

	/* find any devices in h->dev[] that are not in
	 * sd[] and remove them from h->dev[], and for any
	 * devices which have changed, remove the old device
	 * info and add the new device info.
1368 1369
	 * If minor device attributes change, just update
	 * the existing device structure.
1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383
	 */
	i = 0;
	nremoved = 0;
	nadded = 0;
	while (i < h->ndevices) {
		csd = h->dev[i];
		device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
		if (device_change == DEVICE_NOT_FOUND) {
			changes++;
			hpsa_scsi_remove_entry(h, hostno, i,
				removed, &nremoved);
			continue; /* remove ^^^, hence i not incremented */
		} else if (device_change == DEVICE_CHANGED) {
			changes++;
1384 1385
			hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
				added, &nadded, removed, &nremoved);
1386 1387 1388 1389
			/* Set it to NULL to prevent it from being freed
			 * at the bottom of hpsa_update_scsi_devices()
			 */
			sd[entry] = NULL;
1390 1391
		} else if (device_change == DEVICE_UPDATED) {
			hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402
		}
		i++;
	}

	/* Now, make sure every device listed in sd[] is also
	 * listed in h->dev[], adding them if they aren't found
	 */

	for (i = 0; i < nsds; i++) {
		if (!sd[i]) /* if already added above. */
			continue;
1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416

		/* Don't add devices which are NOT READY, FORMAT IN PROGRESS
		 * as the SCSI mid-layer does not handle such devices well.
		 * It relentlessly loops sending TUR at 3Hz, then READ(10)
		 * at 160Hz, and prevents the system from coming up.
		 */
		if (sd[i]->volume_offline) {
			hpsa_show_volume_status(h, sd[i]);
			dev_info(&h->pdev->dev, "c%db%dt%dl%d: temporarily offline\n",
				h->scsi_host->host_no,
				sd[i]->bus, sd[i]->target, sd[i]->lun);
			continue;
		}

1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434
		device_change = hpsa_scsi_find_entry(sd[i], h->dev,
					h->ndevices, &entry);
		if (device_change == DEVICE_NOT_FOUND) {
			changes++;
			if (hpsa_scsi_add_entry(h, hostno, sd[i],
				added, &nadded) != 0)
				break;
			sd[i] = NULL; /* prevent from being freed later. */
		} else if (device_change == DEVICE_CHANGED) {
			/* should never happen... */
			changes++;
			dev_warn(&h->pdev->dev,
				"device unexpectedly changed.\n");
			/* but if it does happen, we just ignore that device */
		}
	}
	spin_unlock_irqrestore(&h->devlock, flags);

1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445
	/* Monitor devices which are in one of several NOT READY states to be
	 * brought online later. This must be done without holding h->devlock,
	 * so don't touch h->dev[]
	 */
	for (i = 0; i < nsds; i++) {
		if (!sd[i]) /* if already added above. */
			continue;
		if (sd[i]->volume_offline)
			hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
	}

1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494
	/* Don't notify scsi mid layer of any changes the first time through
	 * (or if there are no changes) scsi_scan_host will do it later the
	 * first time through.
	 */
	if (hostno == -1 || !changes)
		goto free_and_out;

	sh = h->scsi_host;
	/* Notify scsi mid layer of any removed devices */
	for (i = 0; i < nremoved; i++) {
		struct scsi_device *sdev =
			scsi_device_lookup(sh, removed[i]->bus,
				removed[i]->target, removed[i]->lun);
		if (sdev != NULL) {
			scsi_remove_device(sdev);
			scsi_device_put(sdev);
		} else {
			/* We don't expect to get here.
			 * future cmds to this device will get selection
			 * timeout as if the device was gone.
			 */
			dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
				" for removal.", hostno, removed[i]->bus,
				removed[i]->target, removed[i]->lun);
		}
		kfree(removed[i]);
		removed[i] = NULL;
	}

	/* Notify scsi mid layer of any added devices */
	for (i = 0; i < nadded; i++) {
		if (scsi_add_device(sh, added[i]->bus,
			added[i]->target, added[i]->lun) == 0)
			continue;
		dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
			"device not added.\n", hostno, added[i]->bus,
			added[i]->target, added[i]->lun);
		/* now we have to remove it from h->dev,
		 * since it didn't get added to scsi mid layer
		 */
		fixup_botched_add(h, added[i]);
	}

free_and_out:
	kfree(added);
	kfree(removed);
}

/*
1495
 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522
 * Assume's h->devlock is held.
 */
static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
	int bus, int target, int lun)
{
	int i;
	struct hpsa_scsi_dev_t *sd;

	for (i = 0; i < h->ndevices; i++) {
		sd = h->dev[i];
		if (sd->bus == bus && sd->target == target && sd->lun == lun)
			return sd;
	}
	return NULL;
}

/* link sdev->hostdata to our per-device structure. */
static int hpsa_slave_alloc(struct scsi_device *sdev)
{
	struct hpsa_scsi_dev_t *sd;
	unsigned long flags;
	struct ctlr_info *h;

	h = sdev_to_hba(sdev);
	spin_lock_irqsave(&h->devlock, flags);
	sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
		sdev_id(sdev), sdev->lun);
1523
	if (sd != NULL) {
1524
		sdev->hostdata = sd;
1525 1526 1527 1528
		if (sd->queue_depth)
			scsi_change_queue_depth(sdev, sd->queue_depth);
		atomic_set(&sd->ioaccel_cmds_out, 0);
	}
1529 1530 1531 1532 1533 1534
	spin_unlock_irqrestore(&h->devlock, flags);
	return 0;
}

static void hpsa_slave_destroy(struct scsi_device *sdev)
{
1535
	/* nothing to do. */
1536 1537
}

1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560
static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
{
	int i;

	if (!h->cmd_sg_list)
		return;
	for (i = 0; i < h->nr_cmds; i++) {
		kfree(h->cmd_sg_list[i]);
		h->cmd_sg_list[i] = NULL;
	}
	kfree(h->cmd_sg_list);
	h->cmd_sg_list = NULL;
}

static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
{
	int i;

	if (h->chainsize <= 0)
		return 0;

	h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
				GFP_KERNEL);
1561 1562
	if (!h->cmd_sg_list) {
		dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
1563
		return -ENOMEM;
1564
	}
1565 1566 1567
	for (i = 0; i < h->nr_cmds; i++) {
		h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
						h->chainsize, GFP_KERNEL);
1568 1569
		if (!h->cmd_sg_list[i]) {
			dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
1570
			goto clean;
1571
		}
1572 1573 1574 1575 1576 1577 1578 1579
	}
	return 0;

clean:
	hpsa_free_sg_chain_blocks(h);
	return -ENOMEM;
}

1580
static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1581 1582 1583 1584
	struct CommandList *c)
{
	struct SGDescriptor *chain_sg, *chain_block;
	u64 temp64;
1585
	u32 chain_len;
1586 1587 1588

	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
	chain_block = h->cmd_sg_list[c->cmdindex];
1589 1590
	chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
	chain_len = sizeof(*chain_sg) *
D
Don Brace 已提交
1591
		(le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
1592 1593
	chain_sg->Len = cpu_to_le32(chain_len);
	temp64 = pci_map_single(h->pdev, chain_block, chain_len,
1594
				PCI_DMA_TODEVICE);
1595 1596
	if (dma_mapping_error(&h->pdev->dev, temp64)) {
		/* prevent subsequent unmapping */
1597
		chain_sg->Addr = cpu_to_le64(0);
1598 1599
		return -1;
	}
1600
	chain_sg->Addr = cpu_to_le64(temp64);
1601
	return 0;
1602 1603 1604 1605 1606 1607 1608
}

static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
	struct CommandList *c)
{
	struct SGDescriptor *chain_sg;

1609
	if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
1610 1611 1612
		return;

	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1613 1614
	pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
			le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
1615 1616
}

1617 1618 1619 1620 1621 1622

/* Decode the various types of errors on ioaccel2 path.
 * Return 1 for any error that should generate a RAID path retry.
 * Return 0 for errors that don't require a RAID path retry.
 */
static int handle_ioaccel_mode2_error(struct ctlr_info *h,
1623 1624 1625 1626 1627
					struct CommandList *c,
					struct scsi_cmnd *cmd,
					struct io_accel2_cmd *c2)
{
	int data_len;
1628
	int retry = 0;
1629 1630 1631 1632 1633 1634 1635 1636 1637 1638

	switch (c2->error_data.serv_response) {
	case IOACCEL2_SERV_RESPONSE_COMPLETE:
		switch (c2->error_data.status) {
		case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
			break;
		case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
			dev_warn(&h->pdev->dev,
				"%s: task complete with check condition.\n",
				"HP SSD Smart Path");
1639
			cmd->result |= SAM_STAT_CHECK_CONDITION;
1640
			if (c2->error_data.data_present !=
1641 1642 1643
					IOACCEL2_SENSE_DATA_PRESENT) {
				memset(cmd->sense_buffer, 0,
					SCSI_SENSE_BUFFERSIZE);
1644
				break;
1645
			}
1646 1647 1648 1649 1650 1651 1652 1653 1654
			/* copy the sense data */
			data_len = c2->error_data.sense_data_len;
			if (data_len > SCSI_SENSE_BUFFERSIZE)
				data_len = SCSI_SENSE_BUFFERSIZE;
			if (data_len > sizeof(c2->error_data.sense_data_buff))
				data_len =
					sizeof(c2->error_data.sense_data_buff);
			memcpy(cmd->sense_buffer,
				c2->error_data.sense_data_buff, data_len);
1655
			retry = 1;
1656 1657 1658 1659 1660
			break;
		case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
			dev_warn(&h->pdev->dev,
				"%s: task complete with BUSY status.\n",
				"HP SSD Smart Path");
1661
			retry = 1;
1662 1663 1664 1665 1666
			break;
		case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
			dev_warn(&h->pdev->dev,
				"%s: task complete with reservation conflict.\n",
				"HP SSD Smart Path");
1667
			retry = 1;
1668 1669 1670 1671 1672 1673 1674 1675 1676
			break;
		case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
			/* Make scsi midlayer do unlimited retries */
			cmd->result = DID_IMM_RETRY << 16;
			break;
		case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
			dev_warn(&h->pdev->dev,
				"%s: task complete with aborted status.\n",
				"HP SSD Smart Path");
1677
			retry = 1;
1678 1679 1680 1681 1682
			break;
		default:
			dev_warn(&h->pdev->dev,
				"%s: task complete with unrecognized status: 0x%02x\n",
				"HP SSD Smart Path", c2->error_data.status);
1683
			retry = 1;
1684 1685 1686 1687 1688 1689 1690 1691
			break;
		}
		break;
	case IOACCEL2_SERV_RESPONSE_FAILURE:
		/* don't expect to get here. */
		dev_warn(&h->pdev->dev,
			"unexpected delivery or target failure, status = 0x%02x\n",
			c2->error_data.status);
1692
		retry = 1;
1693 1694 1695 1696 1697 1698 1699
		break;
	case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
		break;
	case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
		break;
	case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
		dev_warn(&h->pdev->dev, "task management function rejected.\n");
1700
		retry = 1;
1701 1702 1703 1704 1705 1706 1707
		break;
	case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
		dev_warn(&h->pdev->dev, "task management function invalid LUN\n");
		break;
	default:
		dev_warn(&h->pdev->dev,
			"%s: Unrecognized server response: 0x%02x\n",
1708 1709 1710
			"HP SSD Smart Path",
			c2->error_data.serv_response);
		retry = 1;
1711 1712
		break;
	}
1713 1714

	return retry;	/* retry on raid path? */
1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737
}

static void process_ioaccel2_completion(struct ctlr_info *h,
		struct CommandList *c, struct scsi_cmnd *cmd,
		struct hpsa_scsi_dev_t *dev)
{
	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];

	/* check for good status */
	if (likely(c2->error_data.serv_response == 0 &&
			c2->error_data.status == 0)) {
		cmd_free(h, c);
		cmd->scsi_done(cmd);
		return;
	}

	/* Any RAID offload error results in retry which will use
	 * the normal I/O path so the controller can handle whatever's
	 * wrong.
	 */
	if (is_logical_dev_addr_mode(dev->scsi3addr) &&
		c2->error_data.serv_response ==
			IOACCEL2_SERV_RESPONSE_FAILURE) {
1738 1739 1740 1741
		if (c2->error_data.status ==
			IOACCEL2_STATUS_SR_IOACCEL_DISABLED)
			dev->offload_enabled = 0;
		goto retry_cmd;
1742
	}
1743 1744 1745 1746

	if (handle_ioaccel_mode2_error(h, c, cmd, c2))
		goto retry_cmd;

1747 1748
	cmd_free(h, c);
	cmd->scsi_done(cmd);
1749 1750 1751 1752 1753
	return;

retry_cmd:
	INIT_WORK(&c->work, hpsa_command_resubmit_worker);
	queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
1754 1755
}

1756
static void complete_scsi_command(struct CommandList *cp)
1757 1758 1759 1760
{
	struct scsi_cmnd *cmd;
	struct ctlr_info *h;
	struct ErrorInfo *ei;
1761
	struct hpsa_scsi_dev_t *dev;
1762 1763 1764 1765

	unsigned char sense_key;
	unsigned char asc;      /* additional sense code */
	unsigned char ascq;     /* additional sense code qualifier */
1766
	unsigned long sense_data_size;
1767 1768

	ei = cp->err_info;
1769
	cmd = cp->scsi_cmd;
1770
	h = cp->h;
1771
	dev = cmd->device->hostdata;
1772 1773

	scsi_dma_unmap(cmd); /* undo the DMA mappings */
1774
	if ((cp->cmd_type == CMD_SCSI) &&
D
Don Brace 已提交
1775
		(le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
1776
		hpsa_unmap_sg_chain_block(h, cp);
1777 1778 1779

	cmd->result = (DID_OK << 16); 		/* host byte */
	cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */
1780

1781 1782 1783
	if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1)
		atomic_dec(&cp->phys_disk->ioaccel_cmds_out);

1784 1785 1786
	if (cp->cmd_type == CMD_IOACCEL2)
		return process_ioaccel2_completion(h, cp, cmd, dev);

1787
	cmd->result |= ei->ScsiStatus;
1788

1789 1790
	scsi_set_resid(cmd, ei->ResidualCnt);
	if (ei->CommandStatus == 0) {
1791 1792
		if (cp->cmd_type == CMD_IOACCEL1)
			atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
1793 1794 1795 1796 1797 1798
		cmd_free(h, cp);
		cmd->scsi_done(cmd);
		return;
	}

	/* copy the sense data */
1799 1800 1801 1802 1803 1804 1805 1806
	if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
		sense_data_size = SCSI_SENSE_BUFFERSIZE;
	else
		sense_data_size = sizeof(ei->SenseInfo);
	if (ei->SenseLen < sense_data_size)
		sense_data_size = ei->SenseLen;

	memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
1807

1808 1809 1810 1811 1812
	/* For I/O accelerator commands, copy over some fields to the normal
	 * CISS header used below for error handling.
	 */
	if (cp->cmd_type == CMD_IOACCEL1) {
		struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
D
Don Brace 已提交
1813 1814 1815 1816
		cp->Header.SGList = scsi_sg_count(cmd);
		cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
		cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
			IOACCEL1_IOFLAGS_CDBLEN_MASK;
1817
		cp->Header.tag = c->tag;
1818 1819
		memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
		memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
1820 1821 1822 1823 1824 1825 1826 1827

		/* Any RAID offload error results in retry which will use
		 * the normal I/O path so the controller can handle whatever's
		 * wrong.
		 */
		if (is_logical_dev_addr_mode(dev->scsi3addr)) {
			if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
				dev->offload_enabled = 0;
1828 1829 1830
			INIT_WORK(&cp->work, hpsa_command_resubmit_worker);
			queue_work_on(raw_smp_processor_id(),
					h->resubmit_wq, &cp->work);
1831 1832
			return;
		}
1833 1834
	}

1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847
	/* an error has occurred */
	switch (ei->CommandStatus) {

	case CMD_TARGET_STATUS:
		if (ei->ScsiStatus) {
			/* Get sense key */
			sense_key = 0xf & ei->SenseInfo[2];
			/* Get additional sense code */
			asc = ei->SenseInfo[12];
			/* Get addition sense code qualifier */
			ascq = ei->SenseInfo[13];
		}
		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1848
			if (sense_key == ABORTED_COMMAND) {
1849
				cmd->result |= DID_SOFT_ERROR << 16;
1850 1851
				break;
			}
1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886
			break;
		}
		/* Problem was not a check condition
		 * Pass it up to the upper layers...
		 */
		if (ei->ScsiStatus) {
			dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
				"Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
				"Returning result: 0x%x\n",
				cp, ei->ScsiStatus,
				sense_key, asc, ascq,
				cmd->result);
		} else {  /* scsi status is zero??? How??? */
			dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
				"Returning no connection.\n", cp),

			/* Ordinarily, this case should never happen,
			 * but there is a bug in some released firmware
			 * revisions that allows it to happen if, for
			 * example, a 4100 backplane loses power and
			 * the tape drive is in it.  We assume that
			 * it's a fatal error of some kind because we
			 * can't show that it wasn't. We will make it
			 * look like selection timeout since that is
			 * the most common reason for this to occur,
			 * and it's severe enough.
			 */

			cmd->result = DID_NO_CONNECT << 16;
		}
		break;

	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
		break;
	case CMD_DATA_OVERRUN:
1887 1888
		dev_warn(&h->pdev->dev,
			"CDB %16phN data overrun\n", cp->Request.CDB);
1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902
		break;
	case CMD_INVALID: {
		/* print_bytes(cp, sizeof(*cp), 1, 0);
		print_cmd(cp); */
		/* We get CMD_INVALID if you address a non-existent device
		 * instead of a selection timeout (no response).  You will
		 * see this if you yank out a drive, then try to access it.
		 * This is kind of a shame because it means that any other
		 * CMD_INVALID (e.g. driver bug) will get interpreted as a
		 * missing target. */
		cmd->result = DID_NO_CONNECT << 16;
	}
		break;
	case CMD_PROTOCOL_ERR:
1903
		cmd->result = DID_ERROR << 16;
1904 1905
		dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
				cp->Request.CDB);
1906 1907 1908
		break;
	case CMD_HARDWARE_ERR:
		cmd->result = DID_ERROR << 16;
1909 1910
		dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
			cp->Request.CDB);
1911 1912 1913
		break;
	case CMD_CONNECTION_LOST:
		cmd->result = DID_ERROR << 16;
1914 1915
		dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
			cp->Request.CDB);
1916 1917 1918
		break;
	case CMD_ABORTED:
		cmd->result = DID_ABORT << 16;
1919 1920
		dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
				cp->Request.CDB, ei->ScsiStatus);
1921 1922 1923
		break;
	case CMD_ABORT_FAILED:
		cmd->result = DID_ERROR << 16;
1924 1925
		dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
			cp->Request.CDB);
1926 1927
		break;
	case CMD_UNSOLICITED_ABORT:
1928
		cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1929 1930
		dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
			cp->Request.CDB);
1931 1932 1933
		break;
	case CMD_TIMEOUT:
		cmd->result = DID_TIME_OUT << 16;
1934 1935
		dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
			cp->Request.CDB);
1936
		break;
1937 1938 1939 1940
	case CMD_UNABORTABLE:
		cmd->result = DID_ERROR << 16;
		dev_warn(&h->pdev->dev, "Command unabortable\n");
		break;
1941 1942 1943 1944 1945 1946 1947 1948
	case CMD_IOACCEL_DISABLED:
		/* This only handles the direct pass-through case since RAID
		 * offload is handled above.  Just attempt a retry.
		 */
		cmd->result = DID_SOFT_ERROR << 16;
		dev_warn(&h->pdev->dev,
				"cp %p had HP SSD Smart Path error\n", cp);
		break;
1949 1950 1951 1952 1953 1954
	default:
		cmd->result = DID_ERROR << 16;
		dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
				cp, ei->CommandStatus);
	}
	cmd_free(h, cp);
1955
	cmd->scsi_done(cmd);
1956 1957 1958 1959 1960 1961 1962
}

static void hpsa_pci_unmap(struct pci_dev *pdev,
	struct CommandList *c, int sg_used, int data_direction)
{
	int i;

1963 1964 1965 1966
	for (i = 0; i < sg_used; i++)
		pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
				le32_to_cpu(c->SG[i].Len),
				data_direction);
1967 1968
}

1969
static int hpsa_map_one(struct pci_dev *pdev,
1970 1971 1972 1973 1974
		struct CommandList *cp,
		unsigned char *buf,
		size_t buflen,
		int data_direction)
{
1975
	u64 addr64;
1976 1977 1978

	if (buflen == 0 || data_direction == PCI_DMA_NONE) {
		cp->Header.SGList = 0;
1979
		cp->Header.SGTotal = cpu_to_le16(0);
1980
		return 0;
1981 1982
	}

1983
	addr64 = pci_map_single(pdev, buf, buflen, data_direction);
1984
	if (dma_mapping_error(&pdev->dev, addr64)) {
1985
		/* Prevent subsequent unmap of something never mapped */
1986
		cp->Header.SGList = 0;
1987
		cp->Header.SGTotal = cpu_to_le16(0);
1988
		return -1;
1989
	}
1990 1991 1992 1993 1994
	cp->SG[0].Addr = cpu_to_le64(addr64);
	cp->SG[0].Len = cpu_to_le32(buflen);
	cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
	cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
	cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
1995
	return 0;
1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007
}

static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
	struct CommandList *c)
{
	DECLARE_COMPLETION_ONSTACK(wait);

	c->waiting = &wait;
	enqueue_cmd_and_start_io(h, c);
	wait_for_completion(&wait);
}

2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019
static u32 lockup_detected(struct ctlr_info *h)
{
	int cpu;
	u32 rc, *lockup_detected;

	cpu = get_cpu();
	lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
	rc = *lockup_detected;
	put_cpu();
	return rc;
}

2020 2021 2022 2023
static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
	struct CommandList *c)
{
	/* If controller lockup detected, fake a hardware error. */
2024
	if (unlikely(lockup_detected(h)))
2025
		c->err_info->CommandStatus = CMD_HARDWARE_ERR;
2026
	else
2027 2028 2029
		hpsa_scsi_do_simple_cmd_core(h, c);
}

2030
#define MAX_DRIVER_CMD_RETRIES 25
2031 2032 2033
static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
	struct CommandList *c, int data_direction)
{
2034
	int backoff_time = 10, retry_count = 0;
2035 2036

	do {
2037
		memset(c->err_info, 0, sizeof(*c->err_info));
2038 2039
		hpsa_scsi_do_simple_cmd_core(h, c);
		retry_count++;
2040 2041 2042 2043 2044
		if (retry_count > 3) {
			msleep(backoff_time);
			if (backoff_time < 1000)
				backoff_time *= 2;
		}
2045
	} while ((check_for_unit_attention(h, c) ||
2046 2047
			check_for_busy(h, c)) &&
			retry_count <= MAX_DRIVER_CMD_RETRIES);
2048 2049 2050
	hpsa_pci_unmap(h->pdev, c, 1, data_direction);
}

2051 2052
static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
				struct CommandList *c)
2053
{
2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070
	const u8 *cdb = c->Request.CDB;
	const u8 *lun = c->Header.LUN.LunAddrBytes;

	dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
	" CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
		txt, lun[0], lun[1], lun[2], lun[3],
		lun[4], lun[5], lun[6], lun[7],
		cdb[0], cdb[1], cdb[2], cdb[3],
		cdb[4], cdb[5], cdb[6], cdb[7],
		cdb[8], cdb[9], cdb[10], cdb[11],
		cdb[12], cdb[13], cdb[14], cdb[15]);
}

static void hpsa_scsi_interpret_error(struct ctlr_info *h,
			struct CommandList *cp)
{
	const struct ErrorInfo *ei = cp->err_info;
2071
	struct device *d = &cp->h->pdev->dev;
2072
	const u8 *sd = ei->SenseInfo;
2073 2074 2075

	switch (ei->CommandStatus) {
	case CMD_TARGET_STATUS:
2076 2077 2078 2079 2080 2081
		hpsa_print_cmd(h, "SCSI status", cp);
		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
			dev_warn(d, "SCSI Status = 02, Sense key = %02x, ASC = %02x, ASCQ = %02x\n",
				sd[2] & 0x0f, sd[12], sd[13]);
		else
			dev_warn(d, "SCSI Status = %02x\n", ei->ScsiStatus);
2082 2083 2084 2085 2086 2087 2088 2089 2090
		if (ei->ScsiStatus == 0)
			dev_warn(d, "SCSI status is abnormally zero.  "
			"(probably indicates selection timeout "
			"reported incorrectly due to a known "
			"firmware bug, circa July, 2001.)\n");
		break;
	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
		break;
	case CMD_DATA_OVERRUN:
2091
		hpsa_print_cmd(h, "overrun condition", cp);
2092 2093 2094 2095 2096
		break;
	case CMD_INVALID: {
		/* controller unfortunately reports SCSI passthru's
		 * to non-existent targets as invalid commands.
		 */
2097 2098
		hpsa_print_cmd(h, "invalid command", cp);
		dev_warn(d, "probably means device no longer present\n");
2099 2100 2101
		}
		break;
	case CMD_PROTOCOL_ERR:
2102
		hpsa_print_cmd(h, "protocol error", cp);
2103 2104
		break;
	case CMD_HARDWARE_ERR:
2105
		hpsa_print_cmd(h, "hardware error", cp);
2106 2107
		break;
	case CMD_CONNECTION_LOST:
2108
		hpsa_print_cmd(h, "connection lost", cp);
2109 2110
		break;
	case CMD_ABORTED:
2111
		hpsa_print_cmd(h, "aborted", cp);
2112 2113
		break;
	case CMD_ABORT_FAILED:
2114
		hpsa_print_cmd(h, "abort failed", cp);
2115 2116
		break;
	case CMD_UNSOLICITED_ABORT:
2117
		hpsa_print_cmd(h, "unsolicited abort", cp);
2118 2119
		break;
	case CMD_TIMEOUT:
2120
		hpsa_print_cmd(h, "timed out", cp);
2121
		break;
2122
	case CMD_UNABORTABLE:
2123
		hpsa_print_cmd(h, "unabortable", cp);
2124
		break;
2125
	default:
2126 2127
		hpsa_print_cmd(h, "unknown status", cp);
		dev_warn(d, "Unknown command status %x\n",
2128 2129 2130 2131 2132
				ei->CommandStatus);
	}
}

static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2133
			u16 page, unsigned char *buf,
2134 2135 2136 2137 2138 2139
			unsigned char bufsize)
{
	int rc = IO_OK;
	struct CommandList *c;
	struct ErrorInfo *ei;

2140
	c = cmd_alloc(h);
2141

2142
	if (c == NULL) {
2143
		dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2144
		return -ENOMEM;
2145 2146
	}

2147 2148 2149 2150 2151
	if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
			page, scsi3addr, TYPE_CMD)) {
		rc = -1;
		goto out;
	}
2152 2153 2154
	hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
	ei = c->err_info;
	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2155
		hpsa_scsi_interpret_error(h, c);
2156 2157
		rc = -1;
	}
2158
out:
2159
	cmd_free(h, c);
2160 2161 2162
	return rc;
}

2163 2164 2165 2166 2167 2168 2169 2170
static int hpsa_bmic_ctrl_mode_sense(struct ctlr_info *h,
		unsigned char *scsi3addr, unsigned char page,
		struct bmic_controller_parameters *buf, size_t bufsize)
{
	int rc = IO_OK;
	struct CommandList *c;
	struct ErrorInfo *ei;

2171
	c = cmd_alloc(h);
2172
	if (c == NULL) {			/* trouble... */
2173
		dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188
		return -ENOMEM;
	}

	if (fill_cmd(c, BMIC_SENSE_CONTROLLER_PARAMETERS, h, buf, bufsize,
			page, scsi3addr, TYPE_CMD)) {
		rc = -1;
		goto out;
	}
	hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
	ei = c->err_info;
	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
		hpsa_scsi_interpret_error(h, c);
		rc = -1;
	}
out:
2189
	cmd_free(h, c);
2190 2191 2192
	return rc;
	}

2193 2194
static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
	u8 reset_type)
2195 2196 2197 2198 2199
{
	int rc = IO_OK;
	struct CommandList *c;
	struct ErrorInfo *ei;

2200
	c = cmd_alloc(h);
2201 2202

	if (c == NULL) {			/* trouble... */
2203
		dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2204
		return -ENOMEM;
2205 2206
	}

2207
	/* fill_cmd can't fail here, no data buffer to map. */
2208 2209 2210
	(void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
			scsi3addr, TYPE_MSG);
	c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2211 2212 2213 2214 2215
	hpsa_scsi_do_simple_cmd_core(h, c);
	/* no unmap needed here because no data xfer. */

	ei = c->err_info;
	if (ei->CommandStatus != 0) {
2216
		hpsa_scsi_interpret_error(h, c);
2217 2218
		rc = -1;
	}
2219
	cmd_free(h, c);
2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232
	return rc;
}

static void hpsa_get_raid_level(struct ctlr_info *h,
	unsigned char *scsi3addr, unsigned char *raid_level)
{
	int rc;
	unsigned char *buf;

	*raid_level = RAID_UNKNOWN;
	buf = kzalloc(64, GFP_KERNEL);
	if (!buf)
		return;
2233
	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2234 2235 2236 2237 2238 2239 2240 2241
	if (rc == 0)
		*raid_level = buf[8];
	if (*raid_level > RAID_UNKNOWN)
		*raid_level = RAID_UNKNOWN;
	kfree(buf);
	return;
}

2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253
#define HPSA_MAP_DEBUG
#ifdef HPSA_MAP_DEBUG
static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
				struct raid_map_data *map_buff)
{
	struct raid_map_disk_data *dd = &map_buff->data[0];
	int map, row, col;
	u16 map_cnt, row_cnt, disks_per_row;

	if (rc != 0)
		return;

2254 2255 2256 2257
	/* Show details only if debugging has been activated. */
	if (h->raid_offload_debug < 2)
		return;

2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281
	dev_info(&h->pdev->dev, "structure_size = %u\n",
				le32_to_cpu(map_buff->structure_size));
	dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
			le32_to_cpu(map_buff->volume_blk_size));
	dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
			le64_to_cpu(map_buff->volume_blk_cnt));
	dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
			map_buff->phys_blk_shift);
	dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
			map_buff->parity_rotation_shift);
	dev_info(&h->pdev->dev, "strip_size = %u\n",
			le16_to_cpu(map_buff->strip_size));
	dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
			le64_to_cpu(map_buff->disk_starting_blk));
	dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
			le64_to_cpu(map_buff->disk_blk_cnt));
	dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
			le16_to_cpu(map_buff->data_disks_per_row));
	dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
			le16_to_cpu(map_buff->metadata_disks_per_row));
	dev_info(&h->pdev->dev, "row_cnt = %u\n",
			le16_to_cpu(map_buff->row_cnt));
	dev_info(&h->pdev->dev, "layout_map_count = %u\n",
			le16_to_cpu(map_buff->layout_map_count));
D
Don Brace 已提交
2282
	dev_info(&h->pdev->dev, "flags = 0x%x\n",
2283
			le16_to_cpu(map_buff->flags));
D
Don Brace 已提交
2284 2285 2286
	dev_info(&h->pdev->dev, "encrypytion = %s\n",
			le16_to_cpu(map_buff->flags) &
			RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
2287 2288
	dev_info(&h->pdev->dev, "dekindex = %u\n",
			le16_to_cpu(map_buff->dekindex));
2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326
	map_cnt = le16_to_cpu(map_buff->layout_map_count);
	for (map = 0; map < map_cnt; map++) {
		dev_info(&h->pdev->dev, "Map%u:\n", map);
		row_cnt = le16_to_cpu(map_buff->row_cnt);
		for (row = 0; row < row_cnt; row++) {
			dev_info(&h->pdev->dev, "  Row%u:\n", row);
			disks_per_row =
				le16_to_cpu(map_buff->data_disks_per_row);
			for (col = 0; col < disks_per_row; col++, dd++)
				dev_info(&h->pdev->dev,
					"    D%02u: h=0x%04x xor=%u,%u\n",
					col, dd->ioaccel_handle,
					dd->xor_mult[0], dd->xor_mult[1]);
			disks_per_row =
				le16_to_cpu(map_buff->metadata_disks_per_row);
			for (col = 0; col < disks_per_row; col++, dd++)
				dev_info(&h->pdev->dev,
					"    M%02u: h=0x%04x xor=%u,%u\n",
					col, dd->ioaccel_handle,
					dd->xor_mult[0], dd->xor_mult[1]);
		}
	}
}
#else
static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
			__attribute__((unused)) int rc,
			__attribute__((unused)) struct raid_map_data *map_buff)
{
}
#endif

static int hpsa_get_raid_map(struct ctlr_info *h,
	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
{
	int rc = 0;
	struct CommandList *c;
	struct ErrorInfo *ei;

2327
	c = cmd_alloc(h);
2328
	if (c == NULL) {
2329
		dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2330 2331 2332 2333 2334 2335
		return -ENOMEM;
	}
	if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
			sizeof(this_device->raid_map), 0,
			scsi3addr, TYPE_CMD)) {
		dev_warn(&h->pdev->dev, "Out of memory in hpsa_get_raid_map()\n");
2336
		cmd_free(h, c);
2337 2338 2339 2340 2341
		return -ENOMEM;
	}
	hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
	ei = c->err_info;
	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2342
		hpsa_scsi_interpret_error(h, c);
2343
		cmd_free(h, c);
2344 2345
		return -1;
	}
2346
	cmd_free(h, c);
2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357

	/* @todo in the future, dynamically allocate RAID map memory */
	if (le32_to_cpu(this_device->raid_map.structure_size) >
				sizeof(this_device->raid_map)) {
		dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
		rc = -1;
	}
	hpsa_debug_map_buff(h, rc, &this_device->raid_map);
	return rc;
}

2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372 2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385
static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
		unsigned char scsi3addr[], u16 bmic_device_index,
		struct bmic_identify_physical_device *buf, size_t bufsize)
{
	int rc = IO_OK;
	struct CommandList *c;
	struct ErrorInfo *ei;

	c = cmd_alloc(h);
	rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
		0, RAID_CTLR_LUNID, TYPE_CMD);
	if (rc)
		goto out;

	c->Request.CDB[2] = bmic_device_index & 0xff;
	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;

	hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
	ei = c->err_info;
	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
		hpsa_scsi_interpret_error(h, c);
		rc = -1;
	}
out:
	cmd_free(h, c);
	return rc;
}

2386 2387 2388 2389 2390 2391 2392 2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420 2421 2422 2423 2424 2425 2426 2427 2428
static int hpsa_vpd_page_supported(struct ctlr_info *h,
	unsigned char scsi3addr[], u8 page)
{
	int rc;
	int i;
	int pages;
	unsigned char *buf, bufsize;

	buf = kzalloc(256, GFP_KERNEL);
	if (!buf)
		return 0;

	/* Get the size of the page list first */
	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
				buf, HPSA_VPD_HEADER_SZ);
	if (rc != 0)
		goto exit_unsupported;
	pages = buf[3];
	if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
		bufsize = pages + HPSA_VPD_HEADER_SZ;
	else
		bufsize = 255;

	/* Get the whole VPD page list */
	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
				buf, bufsize);
	if (rc != 0)
		goto exit_unsupported;

	pages = buf[3];
	for (i = 1; i <= pages; i++)
		if (buf[3 + i] == page)
			goto exit_supported;
exit_unsupported:
	kfree(buf);
	return 0;
exit_supported:
	kfree(buf);
	return 1;
}

2429 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439 2440 2441
static void hpsa_get_ioaccel_status(struct ctlr_info *h,
	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
{
	int rc;
	unsigned char *buf;
	u8 ioaccel_status;

	this_device->offload_config = 0;
	this_device->offload_enabled = 0;

	buf = kzalloc(64, GFP_KERNEL);
	if (!buf)
		return;
2442 2443
	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
		goto out;
2444
	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2445
			VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
2446 2447 2448 2449 2450 2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465
	if (rc != 0)
		goto out;

#define IOACCEL_STATUS_BYTE 4
#define OFFLOAD_CONFIGURED_BIT 0x01
#define OFFLOAD_ENABLED_BIT 0x02
	ioaccel_status = buf[IOACCEL_STATUS_BYTE];
	this_device->offload_config =
		!!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
	if (this_device->offload_config) {
		this_device->offload_enabled =
			!!(ioaccel_status & OFFLOAD_ENABLED_BIT);
		if (hpsa_get_raid_map(h, scsi3addr, this_device))
			this_device->offload_enabled = 0;
	}
out:
	kfree(buf);
	return;
}

2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476
/* Get the device id from inquiry page 0x83 */
static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
	unsigned char *device_id, int buflen)
{
	int rc;
	unsigned char *buf;

	if (buflen > 16)
		buflen = 16;
	buf = kzalloc(64, GFP_KERNEL);
	if (!buf)
2477
		return -ENOMEM;
2478
	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
2479 2480 2481 2482 2483 2484 2485
	if (rc == 0)
		memcpy(device_id, &buf[8], buflen);
	kfree(buf);
	return rc != 0;
}

static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
2486
		void *buf, int bufsize,
2487 2488 2489 2490 2491 2492 2493
		int extended_response)
{
	int rc = IO_OK;
	struct CommandList *c;
	unsigned char scsi3addr[8];
	struct ErrorInfo *ei;

2494
	c = cmd_alloc(h);
2495
	if (c == NULL) {			/* trouble... */
2496
		dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2497 2498
		return -1;
	}
2499 2500
	/* address the controller */
	memset(scsi3addr, 0, sizeof(scsi3addr));
2501 2502 2503 2504 2505
	if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
		buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
		rc = -1;
		goto out;
	}
2506 2507 2508 2509 2510 2511
	if (extended_response)
		c->Request.CDB[1] = extended_response;
	hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
	ei = c->err_info;
	if (ei->CommandStatus != 0 &&
	    ei->CommandStatus != CMD_DATA_UNDERRUN) {
2512
		hpsa_scsi_interpret_error(h, c);
2513
		rc = -1;
2514
	} else {
2515 2516 2517
		struct ReportLUNdata *rld = buf;

		if (rld->extended_response_flag != extended_response) {
2518 2519 2520
			dev_err(&h->pdev->dev,
				"report luns requested format %u, got %u\n",
				extended_response,
2521
				rld->extended_response_flag);
2522 2523
			rc = -1;
		}
2524
	}
2525
out:
2526
	cmd_free(h, c);
2527 2528 2529 2530
	return rc;
}

static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
2531
		struct ReportExtendedLUNdata *buf, int bufsize)
2532
{
2533 2534
	return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
						HPSA_REPORT_PHYS_EXTENDED);
2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550
}

static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
		struct ReportLUNdata *buf, int bufsize)
{
	return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
}

static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
	int bus, int target, int lun)
{
	device->bus = bus;
	device->target = target;
	device->lun = lun;
}

2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564
/* Use VPD inquiry to get details of volume status */
static int hpsa_get_volume_status(struct ctlr_info *h,
					unsigned char scsi3addr[])
{
	int rc;
	int status;
	int size;
	unsigned char *buf;

	buf = kzalloc(64, GFP_KERNEL);
	if (!buf)
		return HPSA_VPD_LV_STATUS_UNSUPPORTED;

	/* Does controller have VPD for logical volume status? */
2565
	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
2566 2567 2568 2569 2570
		goto exit_failed;

	/* Get the size of the VPD return buffer */
	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
					buf, HPSA_VPD_HEADER_SZ);
2571
	if (rc != 0)
2572 2573 2574 2575 2576 2577
		goto exit_failed;
	size = buf[3];

	/* Now get the whole VPD buffer */
	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
					buf, size + HPSA_VPD_HEADER_SZ);
2578
	if (rc != 0)
2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591
		goto exit_failed;
	status = buf[4]; /* status byte */

	kfree(buf);
	return status;
exit_failed:
	kfree(buf);
	return HPSA_VPD_LV_STATUS_UNSUPPORTED;
}

/* Determine offline status of a volume.
 * Return either:
 *  0 (not offline)
2592
 *  0xff (offline for unknown reasons)
2593 2594 2595
 *  # (integer code indicating one of several NOT READY states
 *     describing why a volume is to be kept offline)
 */
2596
static int hpsa_volume_offline(struct ctlr_info *h,
2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655
					unsigned char scsi3addr[])
{
	struct CommandList *c;
	unsigned char *sense, sense_key, asc, ascq;
	int ldstat = 0;
	u16 cmd_status;
	u8 scsi_status;
#define ASC_LUN_NOT_READY 0x04
#define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
#define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02

	c = cmd_alloc(h);
	if (!c)
		return 0;
	(void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
	hpsa_scsi_do_simple_cmd_core(h, c);
	sense = c->err_info->SenseInfo;
	sense_key = sense[2];
	asc = sense[12];
	ascq = sense[13];
	cmd_status = c->err_info->CommandStatus;
	scsi_status = c->err_info->ScsiStatus;
	cmd_free(h, c);
	/* Is the volume 'not ready'? */
	if (cmd_status != CMD_TARGET_STATUS ||
		scsi_status != SAM_STAT_CHECK_CONDITION ||
		sense_key != NOT_READY ||
		asc != ASC_LUN_NOT_READY)  {
		return 0;
	}

	/* Determine the reason for not ready state */
	ldstat = hpsa_get_volume_status(h, scsi3addr);

	/* Keep volume offline in certain cases: */
	switch (ldstat) {
	case HPSA_LV_UNDERGOING_ERASE:
	case HPSA_LV_UNDERGOING_RPI:
	case HPSA_LV_PENDING_RPI:
	case HPSA_LV_ENCRYPTED_NO_KEY:
	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
	case HPSA_LV_UNDERGOING_ENCRYPTION:
	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
		return ldstat;
	case HPSA_VPD_LV_STATUS_UNSUPPORTED:
		/* If VPD status page isn't available,
		 * use ASC/ASCQ to determine state
		 */
		if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
			(ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
			return ldstat;
		break;
	default:
		break;
	}
	return 0;
}

2656
static int hpsa_update_device_info(struct ctlr_info *h,
2657 2658
	unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
	unsigned char *is_OBDR_device)
2659
{
2660 2661 2662 2663 2664 2665

#define OBDR_SIG_OFFSET 43
#define OBDR_TAPE_SIG "$DR-10"
#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)

2666
	unsigned char *inq_buff;
2667
	unsigned char *obdr_sig;
2668

2669
	inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
2670 2671 2672 2673 2674 2675 2676 2677 2678 2679 2680 2681 2682 2683 2684 2685 2686 2687 2688 2689 2690 2691 2692 2693
	if (!inq_buff)
		goto bail_out;

	/* Do an inquiry to the device to see what it is. */
	if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
		(unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
		/* Inquiry failed (msg printed already) */
		dev_err(&h->pdev->dev,
			"hpsa_update_device_info: inquiry failed\n");
		goto bail_out;
	}

	this_device->devtype = (inq_buff[0] & 0x1f);
	memcpy(this_device->scsi3addr, scsi3addr, 8);
	memcpy(this_device->vendor, &inq_buff[8],
		sizeof(this_device->vendor));
	memcpy(this_device->model, &inq_buff[16],
		sizeof(this_device->model));
	memset(this_device->device_id, 0,
		sizeof(this_device->device_id));
	hpsa_get_device_id(h, scsi3addr, this_device->device_id,
		sizeof(this_device->device_id));

	if (this_device->devtype == TYPE_DISK &&
2694
		is_logical_dev_addr_mode(scsi3addr)) {
2695 2696
		int volume_offline;

2697
		hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
2698 2699
		if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
			hpsa_get_ioaccel_status(h, scsi3addr, this_device);
2700 2701 2702 2703
		volume_offline = hpsa_volume_offline(h, scsi3addr);
		if (volume_offline < 0 || volume_offline > 0xff)
			volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
		this_device->volume_offline = volume_offline & 0xff;
2704
	} else {
2705
		this_device->raid_level = RAID_UNKNOWN;
2706 2707
		this_device->offload_config = 0;
		this_device->offload_enabled = 0;
2708
		this_device->volume_offline = 0;
2709
		this_device->queue_depth = h->nr_cmds;
2710
	}
2711

2712 2713 2714 2715 2716 2717 2718 2719 2720 2721
	if (is_OBDR_device) {
		/* See if this is a One-Button-Disaster-Recovery device
		 * by looking for "$DR-10" at offset 43 in inquiry data.
		 */
		obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
		*is_OBDR_device = (this_device->devtype == TYPE_ROM &&
					strncmp(obdr_sig, OBDR_TAPE_SIG,
						OBDR_SIG_LEN) == 0);
	}

2722 2723 2724 2725 2726 2727 2728 2729
	kfree(inq_buff);
	return 0;

bail_out:
	kfree(inq_buff);
	return 1;
}

2730
static unsigned char *ext_target_model[] = {
2731 2732 2733 2734
	"MSA2012",
	"MSA2024",
	"MSA2312",
	"MSA2324",
2735
	"P2000 G3 SAS",
2736
	"MSA 2040 SAS",
2737 2738 2739
	NULL,
};

2740
static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
2741 2742 2743
{
	int i;

2744 2745 2746
	for (i = 0; ext_target_model[i]; i++)
		if (strncmp(device->model, ext_target_model[i],
			strlen(ext_target_model[i])) == 0)
2747 2748 2749 2750 2751
			return 1;
	return 0;
}

/* Helper function to assign bus, target, lun mapping of devices.
2752
 * Puts non-external target logical volumes on bus 0, external target logical
2753 2754 2755 2756 2757 2758
 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
 * Logical drive target and lun are assigned at this time, but
 * physical device lun and target assignment are deferred (assigned
 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
 */
static void figure_bus_target_lun(struct ctlr_info *h,
2759
	u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
2760
{
2761 2762 2763 2764
	u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));

	if (!is_logical_dev_addr_mode(lunaddrbytes)) {
		/* physical device, target and lun filled in later */
2765
		if (is_hba_lunid(lunaddrbytes))
2766
			hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
2767
		else
2768 2769 2770 2771 2772
			/* defer target, lun assignment for physical devices */
			hpsa_set_bus_target_lun(device, 2, -1, -1);
		return;
	}
	/* It's a logical device */
2773 2774
	if (is_ext_target(h, device)) {
		/* external target way, put logicals on bus 1
2775 2776 2777 2778 2779 2780
		 * and match target/lun numbers box
		 * reports, other smart array, bus 0, target 0, match lunid
		 */
		hpsa_set_bus_target_lun(device,
			1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
		return;
2781
	}
2782
	hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
2783 2784 2785 2786
}

/*
 * If there is no lun 0 on a target, linux won't find any devices.
2787
 * For the external targets (arrays), we have to manually detect the enclosure
2788 2789 2790 2791 2792 2793 2794 2795
 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
 * it for some reason.  *tmpdevice is the target we're adding,
 * this_device is a pointer into the current element of currentsd[]
 * that we're building up in update_scsi_devices(), below.
 * lunzerobits is a bitmap that tracks which targets already have a
 * lun 0 assigned.
 * Returns 1 if an enclosure was added, 0 if not.
 */
2796
static int add_ext_target_dev(struct ctlr_info *h,
2797
	struct hpsa_scsi_dev_t *tmpdevice,
2798
	struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
2799
	unsigned long lunzerobits[], int *n_ext_target_devs)
2800 2801 2802
{
	unsigned char scsi3addr[8];

2803
	if (test_bit(tmpdevice->target, lunzerobits))
2804 2805 2806 2807 2808
		return 0; /* There is already a lun 0 on this target. */

	if (!is_logical_dev_addr_mode(lunaddrbytes))
		return 0; /* It's the logical targets that may lack lun 0. */

2809 2810
	if (!is_ext_target(h, tmpdevice))
		return 0; /* Only external target devices have this problem. */
2811

2812
	if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
2813 2814
		return 0;

2815
	memset(scsi3addr, 0, 8);
2816
	scsi3addr[3] = tmpdevice->target;
2817 2818 2819
	if (is_hba_lunid(scsi3addr))
		return 0; /* Don't add the RAID controller here. */

2820 2821 2822
	if (is_scsi_rev_5(h))
		return 0; /* p1210m doesn't need to do this. */

2823
	if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
2824 2825
		dev_warn(&h->pdev->dev, "Maximum number of external "
			"target devices exceeded.  Check your hardware "
2826 2827 2828 2829
			"configuration.");
		return 0;
	}

2830
	if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
2831
		return 0;
2832
	(*n_ext_target_devs)++;
2833 2834 2835
	hpsa_set_bus_target_lun(this_device,
				tmpdevice->bus, tmpdevice->target, 0);
	set_bit(tmpdevice->target, lunzerobits);
2836 2837 2838
	return 1;
}

2839 2840 2841 2842 2843 2844 2845 2846 2847 2848 2849 2850 2851 2852 2853 2854 2855 2856 2857 2858 2859
/*
 * Get address of physical disk used for an ioaccel2 mode command:
 *	1. Extract ioaccel2 handle from the command.
 *	2. Find a matching ioaccel2 handle from list of physical disks.
 *	3. Return:
 *		1 and set scsi3addr to address of matching physical
 *		0 if no matching physical disk was found.
 */
static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
	struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
{
	struct ReportExtendedLUNdata *physicals = NULL;
	int responsesize = 24;	/* size of physical extended response */
	int reportsize = sizeof(*physicals) + HPSA_MAX_PHYS_LUN * responsesize;
	u32 nphysicals = 0;	/* number of reported physical devs */
	int found = 0;		/* found match (1) or not (0) */
	u32 find;		/* handle we need to match */
	int i;
	struct scsi_cmnd *scmd;	/* scsi command within request being aborted */
	struct hpsa_scsi_dev_t *d; /* device of request being aborted */
	struct io_accel2_cmd *c2a; /* ioaccel2 command to abort */
D
Don Brace 已提交
2860 2861
	__le32 it_nexus;	/* 4 byte device handle for the ioaccel2 cmd */
	__le32 scsi_nexus;	/* 4 byte device handle for the ioaccel2 cmd */
2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872 2873 2874 2875 2876 2877 2878

	if (ioaccel2_cmd_to_abort->cmd_type != CMD_IOACCEL2)
		return 0; /* no match */

	/* point to the ioaccel2 device handle */
	c2a = &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
	if (c2a == NULL)
		return 0; /* no match */

	scmd = (struct scsi_cmnd *) ioaccel2_cmd_to_abort->scsi_cmd;
	if (scmd == NULL)
		return 0; /* no match */

	d = scmd->device->hostdata;
	if (d == NULL)
		return 0; /* no match */

2879
	it_nexus = cpu_to_le32(d->ioaccel_handle);
D
Don Brace 已提交
2880 2881
	scsi_nexus = c2a->scsi_nexus;
	find = le32_to_cpu(c2a->scsi_nexus);
2882

2883 2884 2885 2886 2887 2888 2889 2890 2891 2892 2893
	if (h->raid_offload_debug > 0)
		dev_info(&h->pdev->dev,
			"%s: scsi_nexus:0x%08x device id: 0x%02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n",
			__func__, scsi_nexus,
			d->device_id[0], d->device_id[1], d->device_id[2],
			d->device_id[3], d->device_id[4], d->device_id[5],
			d->device_id[6], d->device_id[7], d->device_id[8],
			d->device_id[9], d->device_id[10], d->device_id[11],
			d->device_id[12], d->device_id[13], d->device_id[14],
			d->device_id[15]);

2894 2895
	/* Get the list of physical devices */
	physicals = kzalloc(reportsize, GFP_KERNEL);
2896 2897
	if (physicals == NULL)
		return 0;
2898
	if (hpsa_scsi_do_report_phys_luns(h, physicals, reportsize)) {
2899 2900 2901 2902 2903 2904 2905 2906 2907 2908 2909
		dev_err(&h->pdev->dev,
			"Can't lookup %s device handle: report physical LUNs failed.\n",
			"HP SSD Smart Path");
		kfree(physicals);
		return 0;
	}
	nphysicals = be32_to_cpu(*((__be32 *)physicals->LUNListLength)) /
							responsesize;

	/* find ioaccel2 handle in list of physicals: */
	for (i = 0; i < nphysicals; i++) {
2910 2911
		struct ext_report_lun_entry *entry = &physicals->LUN[i];

2912
		/* handle is in bytes 28-31 of each lun */
2913
		if (entry->ioaccel_handle != find)
2914 2915
			continue; /* didn't match */
		found = 1;
2916
		memcpy(scsi3addr, entry->lunid, 8);
2917 2918
		if (h->raid_offload_debug > 0)
			dev_info(&h->pdev->dev,
2919
				"%s: Searched h=0x%08x, Found h=0x%08x, scsiaddr 0x%8phN\n",
2920
				__func__, find,
2921
				entry->ioaccel_handle, scsi3addr);
2922 2923 2924 2925 2926 2927 2928 2929 2930 2931
		break; /* found it */
	}

	kfree(physicals);
	if (found)
		return 1;
	else
		return 0;

}
2932 2933 2934 2935 2936 2937 2938
/*
 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
 * logdev.  The number of luns in physdev and logdev are returned in
 * *nphysicals and *nlogicals, respectively.
 * Returns 0 on success, -1 otherwise.
 */
static int hpsa_gather_lun_info(struct ctlr_info *h,
2939
	struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
2940
	struct ReportLUNdata *logdev, u32 *nlogicals)
2941
{
2942
	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
2943 2944 2945
		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
		return -1;
	}
2946
	*nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
2947
	if (*nphysicals > HPSA_MAX_PHYS_LUN) {
2948 2949
		dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
			HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
2950 2951
		*nphysicals = HPSA_MAX_PHYS_LUN;
	}
2952
	if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
2953 2954 2955
		dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
		return -1;
	}
2956
	*nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
2957 2958 2959 2960 2961 2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972 2973 2974
	/* Reject Logicals in excess of our max capability. */
	if (*nlogicals > HPSA_MAX_LUN) {
		dev_warn(&h->pdev->dev,
			"maximum logical LUNs (%d) exceeded.  "
			"%d LUNs ignored.\n", HPSA_MAX_LUN,
			*nlogicals - HPSA_MAX_LUN);
			*nlogicals = HPSA_MAX_LUN;
	}
	if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
		dev_warn(&h->pdev->dev,
			"maximum logical + physical LUNs (%d) exceeded. "
			"%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
			*nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
		*nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
	}
	return 0;
}

D
Don Brace 已提交
2975 2976
static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
	int i, int nphysicals, int nlogicals,
2977
	struct ReportExtendedLUNdata *physdev_list,
2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991
	struct ReportLUNdata *logdev_list)
{
	/* Helper function, figure out where the LUN ID info is coming from
	 * given index i, lists of physical and logical devices, where in
	 * the list the raid controller is supposed to appear (first or last)
	 */

	int logicals_start = nphysicals + (raid_ctlr_position == 0);
	int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);

	if (i == raid_ctlr_position)
		return RAID_CTLR_LUNID;

	if (i < logicals_start)
2992 2993
		return &physdev_list->LUN[i -
				(raid_ctlr_position == 0)].lunid[0];
2994 2995 2996 2997 2998 2999 3000 3001

	if (i < last_device)
		return &logdev_list->LUN[i - nphysicals -
			(raid_ctlr_position == 0)][0];
	BUG();
	return NULL;
}

3002 3003 3004
static int hpsa_hba_mode_enabled(struct ctlr_info *h)
{
	int rc;
3005
	int hba_mode_enabled;
3006 3007 3008 3009 3010
	struct bmic_controller_parameters *ctlr_params;
	ctlr_params = kzalloc(sizeof(struct bmic_controller_parameters),
		GFP_KERNEL);

	if (!ctlr_params)
3011
		return -ENOMEM;
3012 3013
	rc = hpsa_bmic_ctrl_mode_sense(h, RAID_CTLR_LUNID, 0, ctlr_params,
		sizeof(struct bmic_controller_parameters));
3014
	if (rc) {
3015
		kfree(ctlr_params);
3016
		return rc;
3017
	}
3018 3019 3020 3021 3022

	hba_mode_enabled =
		((ctlr_params->nvram_flags & HBA_MODE_ENABLED_FLAG) != 0);
	kfree(ctlr_params);
	return hba_mode_enabled;
3023 3024
}

3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051
/* get physical drive ioaccel handle and queue depth */
static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
		struct hpsa_scsi_dev_t *dev,
		u8 *lunaddrbytes,
		struct bmic_identify_physical_device *id_phys)
{
	int rc;
	struct ext_report_lun_entry *rle =
		(struct ext_report_lun_entry *) lunaddrbytes;

	dev->ioaccel_handle = rle->ioaccel_handle;
	memset(id_phys, 0, sizeof(*id_phys));
	rc = hpsa_bmic_id_physical_device(h, lunaddrbytes,
			GET_BMIC_DRIVE_NUMBER(lunaddrbytes), id_phys,
			sizeof(*id_phys));
	if (!rc)
		/* Reserve space for FW operations */
#define DRIVE_CMDS_RESERVED_FOR_FW 2
#define DRIVE_QUEUE_DEPTH 7
		dev->queue_depth =
			le16_to_cpu(id_phys->current_queue_depth_limit) -
				DRIVE_CMDS_RESERVED_FOR_FW;
	else
		dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
	atomic_set(&dev->ioaccel_cmds_out, 0);
}

3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063
static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
{
	/* the idea here is we could get notified
	 * that some devices have changed, so we do a report
	 * physical luns and report logical luns cmd, and adjust
	 * our list of devices accordingly.
	 *
	 * The scsi3addr's of devices won't change so long as the
	 * adapter is not reset.  That means we can rescan and
	 * tell which devices we already know about, vs. new
	 * devices, vs.  disappearing devices.
	 */
3064
	struct ReportExtendedLUNdata *physdev_list = NULL;
3065
	struct ReportLUNdata *logdev_list = NULL;
3066
	struct bmic_identify_physical_device *id_phys = NULL;
3067 3068 3069
	u32 nphysicals = 0;
	u32 nlogicals = 0;
	u32 ndev_allocated = 0;
3070 3071
	struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
	int ncurrent = 0;
3072
	int i, n_ext_target_devs, ndevs_to_allocate;
3073
	int raid_ctlr_position;
3074
	int rescan_hba_mode;
3075
	DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3076

3077
	currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3078 3079
	physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
	logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
3080
	tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3081
	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3082

3083 3084
	if (!currentsd || !physdev_list || !logdev_list ||
		!tmpdevice || !id_phys) {
3085 3086 3087 3088 3089
		dev_err(&h->pdev->dev, "out of memory\n");
		goto out;
	}
	memset(lunzerobits, 0, sizeof(lunzerobits));

3090
	rescan_hba_mode = hpsa_hba_mode_enabled(h);
3091 3092
	if (rescan_hba_mode < 0)
		goto out;
3093 3094 3095 3096 3097 3098 3099 3100

	if (!h->hba_mode_enabled && rescan_hba_mode)
		dev_warn(&h->pdev->dev, "HBA mode enabled\n");
	else if (h->hba_mode_enabled && !rescan_hba_mode)
		dev_warn(&h->pdev->dev, "HBA mode disabled\n");

	h->hba_mode_enabled = rescan_hba_mode;

3101 3102
	if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
			logdev_list, &nlogicals))
3103 3104
		goto out;

3105 3106 3107
	/* We might see up to the maximum number of logical and physical disks
	 * plus external target devices, and a device for the local RAID
	 * controller.
3108
	 */
3109
	ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3110 3111 3112

	/* Allocate the per device structures */
	for (i = 0; i < ndevs_to_allocate; i++) {
3113 3114 3115 3116 3117 3118 3119
		if (i >= HPSA_MAX_DEVICES) {
			dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
				"  %d devices ignored.\n", HPSA_MAX_DEVICES,
				ndevs_to_allocate - HPSA_MAX_DEVICES);
			break;
		}

3120 3121 3122 3123 3124 3125 3126 3127 3128
		currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
		if (!currentsd[i]) {
			dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
				__FILE__, __LINE__);
			goto out;
		}
		ndev_allocated++;
	}

3129
	if (is_scsi_rev_5(h))
3130 3131 3132 3133
		raid_ctlr_position = 0;
	else
		raid_ctlr_position = nphysicals + nlogicals;

3134
	/* adjust our table of devices */
3135
	n_ext_target_devs = 0;
3136
	for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3137
		u8 *lunaddrbytes, is_OBDR = 0;
3138 3139

		/* Figure out where the LUN ID info is coming from */
3140 3141
		lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
			i, nphysicals, nlogicals, physdev_list, logdev_list);
3142
		/* skip masked physical devices. */
3143 3144
		if (lunaddrbytes[3] & 0xC0 &&
			i < nphysicals + (raid_ctlr_position == 0))
3145 3146 3147
			continue;

		/* Get device type, vendor, model, device id */
3148 3149
		if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
							&is_OBDR))
3150
			continue; /* skip it if we can't talk to it. */
3151
		figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3152 3153 3154
		this_device = currentsd[ncurrent];

		/*
3155
		 * For external target devices, we have to insert a LUN 0 which
3156 3157 3158 3159 3160
		 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
		 * is nonetheless an enclosure device there.  We have to
		 * present that otherwise linux won't find anything if
		 * there is no lun 0.
		 */
3161
		if (add_ext_target_dev(h, tmpdevice, this_device,
3162
				lunaddrbytes, lunzerobits,
3163
				&n_ext_target_devs)) {
3164 3165 3166 3167 3168 3169 3170
			ncurrent++;
			this_device = currentsd[ncurrent];
		}

		*this_device = *tmpdevice;

		switch (this_device->devtype) {
3171
		case TYPE_ROM:
3172 3173 3174 3175 3176 3177 3178
			/* We don't *really* support actual CD-ROM devices,
			 * just "One Button Disaster Recovery" tape drive
			 * which temporarily pretends to be a CD-ROM drive.
			 * So we check that the device is really an OBDR tape
			 * device by checking for "$DR-10" in bytes 43-48 of
			 * the inquiry data.
			 */
3179 3180
			if (is_OBDR)
				ncurrent++;
3181 3182
			break;
		case TYPE_DISK:
3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195
			if (h->hba_mode_enabled) {
				/* never use raid mapper in HBA mode */
				this_device->offload_enabled = 0;
				ncurrent++;
				break;
			} else if (h->acciopath_status) {
				if (i >= nphysicals) {
					ncurrent++;
					break;
				}
			} else {
				if (i < nphysicals)
					break;
3196
				ncurrent++;
3197
				break;
3198
			}
3199 3200 3201 3202 3203
			if (h->transMethod & CFGTBL_Trans_io_accel1 ||
				h->transMethod & CFGTBL_Trans_io_accel2) {
				hpsa_get_ioaccel_drive_info(h, this_device,
							lunaddrbytes, id_phys);
				atomic_set(&this_device->ioaccel_cmds_out, 0);
3204 3205
				ncurrent++;
			}
3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223
			break;
		case TYPE_TAPE:
		case TYPE_MEDIUM_CHANGER:
			ncurrent++;
			break;
		case TYPE_RAID:
			/* Only present the Smartarray HBA as a RAID controller.
			 * If it's a RAID controller other than the HBA itself
			 * (an external RAID controller, MSA500 or similar)
			 * don't present it.
			 */
			if (!is_hba_lunid(lunaddrbytes))
				break;
			ncurrent++;
			break;
		default:
			break;
		}
3224
		if (ncurrent >= HPSA_MAX_DEVICES)
3225 3226
			break;
	}
3227
	hpsa_update_log_drive_phys_drive_ptrs(h, currentsd, ncurrent);
3228 3229 3230 3231 3232 3233 3234 3235
	adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
out:
	kfree(tmpdevice);
	for (i = 0; i < ndev_allocated; i++)
		kfree(currentsd[i]);
	kfree(currentsd);
	kfree(physdev_list);
	kfree(logdev_list);
3236
	kfree(id_phys);
3237 3238
}

3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249
static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
				   struct scatterlist *sg)
{
	u64 addr64 = (u64) sg_dma_address(sg);
	unsigned int len = sg_dma_len(sg);

	desc->Addr = cpu_to_le64(addr64);
	desc->Len = cpu_to_le32(len);
	desc->Ext = 0;
}

3250 3251
/*
 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3252 3253 3254
 * dma mapping  and fills in the scatter gather entries of the
 * hpsa command, cp.
 */
3255
static int hpsa_scatter_gather(struct ctlr_info *h,
3256 3257 3258 3259
		struct CommandList *cp,
		struct scsi_cmnd *cmd)
{
	struct scatterlist *sg;
3260 3261
	int use_sg, i, sg_index, chained;
	struct SGDescriptor *curr_sg;
3262

3263
	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3264 3265 3266 3267 3268 3269 3270 3271

	use_sg = scsi_dma_map(cmd);
	if (use_sg < 0)
		return use_sg;

	if (!use_sg)
		goto sglist_finished;

3272 3273 3274
	curr_sg = cp->SG;
	chained = 0;
	sg_index = 0;
3275
	scsi_for_each_sg(cmd, sg, use_sg, i) {
3276 3277 3278 3279 3280 3281
		if (i == h->max_cmd_sg_entries - 1 &&
			use_sg > h->max_cmd_sg_entries) {
			chained = 1;
			curr_sg = h->cmd_sg_list[cp->cmdindex];
			sg_index = 0;
		}
3282
		hpsa_set_sg_descriptor(curr_sg, sg);
3283 3284
		curr_sg++;
	}
3285 3286

	/* Back the pointer up to the last entry and mark it as "last". */
3287
	(--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3288 3289 3290 3291 3292 3293

	if (use_sg + chained > h->maxSG)
		h->maxSG = use_sg + chained;

	if (chained) {
		cp->Header.SGList = h->max_cmd_sg_entries;
3294
		cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
3295 3296 3297 3298
		if (hpsa_map_sg_chain_block(h, cp)) {
			scsi_dma_unmap(cmd);
			return -1;
		}
3299
		return 0;
3300 3301 3302 3303
	}

sglist_finished:

3304
	cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
3305
	cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
3306 3307 3308
	return 0;
}

3309 3310 3311 3312 3313 3314 3315 3316 3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356
#define IO_ACCEL_INELIGIBLE (1)
static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
{
	int is_write = 0;
	u32 block;
	u32 block_cnt;

	/* Perform some CDB fixups if needed using 10 byte reads/writes only */
	switch (cdb[0]) {
	case WRITE_6:
	case WRITE_12:
		is_write = 1;
	case READ_6:
	case READ_12:
		if (*cdb_len == 6) {
			block = (((u32) cdb[2]) << 8) | cdb[3];
			block_cnt = cdb[4];
		} else {
			BUG_ON(*cdb_len != 12);
			block = (((u32) cdb[2]) << 24) |
				(((u32) cdb[3]) << 16) |
				(((u32) cdb[4]) << 8) |
				cdb[5];
			block_cnt =
				(((u32) cdb[6]) << 24) |
				(((u32) cdb[7]) << 16) |
				(((u32) cdb[8]) << 8) |
				cdb[9];
		}
		if (block_cnt > 0xffff)
			return IO_ACCEL_INELIGIBLE;

		cdb[0] = is_write ? WRITE_10 : READ_10;
		cdb[1] = 0;
		cdb[2] = (u8) (block >> 24);
		cdb[3] = (u8) (block >> 16);
		cdb[4] = (u8) (block >> 8);
		cdb[5] = (u8) (block);
		cdb[6] = 0;
		cdb[7] = (u8) (block_cnt >> 8);
		cdb[8] = (u8) (block_cnt);
		cdb[9] = 0;
		*cdb_len = 10;
		break;
	}
	return 0;
}

3357
static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
3358
	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3359
	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3360 3361 3362 3363 3364 3365 3366 3367 3368 3369 3370
{
	struct scsi_cmnd *cmd = c->scsi_cmd;
	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
	unsigned int len;
	unsigned int total_len = 0;
	struct scatterlist *sg;
	u64 addr64;
	int use_sg, i;
	struct SGDescriptor *curr_sg;
	u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;

3371
	/* TODO: implement chaining support */
3372 3373
	if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
		atomic_dec(&phys_disk->ioaccel_cmds_out);
3374
		return IO_ACCEL_INELIGIBLE;
3375
	}
3376

3377 3378
	BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);

3379 3380
	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
		atomic_dec(&phys_disk->ioaccel_cmds_out);
3381
		return IO_ACCEL_INELIGIBLE;
3382
	}
3383

3384 3385 3386 3387 3388 3389 3390 3391
	c->cmd_type = CMD_IOACCEL1;

	/* Adjust the DMA address to point to the accelerated command buffer */
	c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
				(c->cmdindex * sizeof(*cp));
	BUG_ON(c->busaddr & 0x0000007F);

	use_sg = scsi_dma_map(cmd);
3392 3393
	if (use_sg < 0) {
		atomic_dec(&phys_disk->ioaccel_cmds_out);
3394
		return use_sg;
3395
	}
3396 3397 3398 3399 3400 3401 3402

	if (use_sg) {
		curr_sg = cp->SG;
		scsi_for_each_sg(cmd, sg, use_sg, i) {
			addr64 = (u64) sg_dma_address(sg);
			len  = sg_dma_len(sg);
			total_len += len;
3403 3404 3405
			curr_sg->Addr = cpu_to_le64(addr64);
			curr_sg->Len = cpu_to_le32(len);
			curr_sg->Ext = cpu_to_le32(0);
3406 3407
			curr_sg++;
		}
3408
		(--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3409 3410 3411 3412 3413 3414 3415 3416 3417 3418 3419 3420 3421 3422 3423 3424 3425 3426 3427 3428 3429

		switch (cmd->sc_data_direction) {
		case DMA_TO_DEVICE:
			control |= IOACCEL1_CONTROL_DATA_OUT;
			break;
		case DMA_FROM_DEVICE:
			control |= IOACCEL1_CONTROL_DATA_IN;
			break;
		case DMA_NONE:
			control |= IOACCEL1_CONTROL_NODATAXFER;
			break;
		default:
			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
			cmd->sc_data_direction);
			BUG();
			break;
		}
	} else {
		control |= IOACCEL1_CONTROL_NODATAXFER;
	}

3430
	c->Header.SGList = use_sg;
3431
	/* Fill out the command structure to submit */
D
Don Brace 已提交
3432 3433 3434 3435 3436
	cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
	cp->transfer_len = cpu_to_le32(total_len);
	cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
			(cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
	cp->control = cpu_to_le32(control);
3437 3438
	memcpy(cp->CDB, cdb, cdb_len);
	memcpy(cp->CISS_LUN, scsi3addr, 8);
3439
	/* Tag was already set at init time. */
3440
	enqueue_cmd_and_start_io(h, c);
3441 3442
	return 0;
}
3443

3444 3445 3446 3447 3448 3449 3450 3451 3452 3453
/*
 * Queue a command directly to a device behind the controller using the
 * I/O accelerator path.
 */
static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
	struct CommandList *c)
{
	struct scsi_cmnd *cmd = c->scsi_cmd;
	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;

3454 3455
	c->phys_disk = dev;

3456
	return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
3457
		cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
3458 3459
}

3460 3461 3462 3463 3464 3465 3466 3467 3468 3469 3470 3471
/*
 * Set encryption parameters for the ioaccel2 request
 */
static void set_encrypt_ioaccel2(struct ctlr_info *h,
	struct CommandList *c, struct io_accel2_cmd *cp)
{
	struct scsi_cmnd *cmd = c->scsi_cmd;
	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
	struct raid_map_data *map = &dev->raid_map;
	u64 first_block;

	/* Are we doing encryption on this device */
D
Don Brace 已提交
3472
	if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
3473 3474 3475 3476 3477 3478 3479 3480 3481 3482 3483 3484 3485 3486 3487
		return;
	/* Set the data encryption key index. */
	cp->dekindex = map->dekindex;

	/* Set the encryption enable flag, encoded into direction field. */
	cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;

	/* Set encryption tweak values based on logical block address
	 * If block size is 512, tweak value is LBA.
	 * For other block sizes, tweak is (LBA * block size)/ 512)
	 */
	switch (cmd->cmnd[0]) {
	/* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
	case WRITE_6:
	case READ_6:
D
Don Brace 已提交
3488
		first_block = get_unaligned_be16(&cmd->cmnd[2]);
3489 3490 3491 3492 3493 3494
		break;
	case WRITE_10:
	case READ_10:
	/* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
	case WRITE_12:
	case READ_12:
D
Don Brace 已提交
3495
		first_block = get_unaligned_be32(&cmd->cmnd[2]);
3496 3497 3498
		break;
	case WRITE_16:
	case READ_16:
D
Don Brace 已提交
3499
		first_block = get_unaligned_be64(&cmd->cmnd[2]);
3500 3501 3502
		break;
	default:
		dev_err(&h->pdev->dev,
D
Don Brace 已提交
3503 3504
			"ERROR: %s: size (0x%x) not supported for encryption\n",
			__func__, cmd->cmnd[0]);
3505 3506 3507
		BUG();
		break;
	}
D
Don Brace 已提交
3508 3509 3510 3511 3512 3513 3514

	if (le32_to_cpu(map->volume_blk_size) != 512)
		first_block = first_block *
				le32_to_cpu(map->volume_blk_size)/512;

	cp->tweak_lower = cpu_to_le32(first_block);
	cp->tweak_upper = cpu_to_le32(first_block >> 32);
3515 3516
}

3517 3518
static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3519
	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3520 3521 3522 3523 3524 3525 3526 3527 3528 3529
{
	struct scsi_cmnd *cmd = c->scsi_cmd;
	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
	struct ioaccel2_sg_element *curr_sg;
	int use_sg, i;
	struct scatterlist *sg;
	u64 addr64;
	u32 len;
	u32 total_len = 0;

3530 3531
	if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
		atomic_dec(&phys_disk->ioaccel_cmds_out);
3532
		return IO_ACCEL_INELIGIBLE;
3533
	}
3534

3535 3536
	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
		atomic_dec(&phys_disk->ioaccel_cmds_out);
3537
		return IO_ACCEL_INELIGIBLE;
3538 3539
	}

3540 3541 3542 3543 3544 3545 3546 3547 3548 3549
	c->cmd_type = CMD_IOACCEL2;
	/* Adjust the DMA address to point to the accelerated command buffer */
	c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
				(c->cmdindex * sizeof(*cp));
	BUG_ON(c->busaddr & 0x0000007F);

	memset(cp, 0, sizeof(*cp));
	cp->IU_type = IOACCEL2_IU_TYPE;

	use_sg = scsi_dma_map(cmd);
3550 3551
	if (use_sg < 0) {
		atomic_dec(&phys_disk->ioaccel_cmds_out);
3552
		return use_sg;
3553
	}
3554 3555 3556 3557 3558 3559 3560 3561 3562 3563 3564 3565 3566 3567 3568 3569 3570 3571 3572

	if (use_sg) {
		BUG_ON(use_sg > IOACCEL2_MAXSGENTRIES);
		curr_sg = cp->sg;
		scsi_for_each_sg(cmd, sg, use_sg, i) {
			addr64 = (u64) sg_dma_address(sg);
			len  = sg_dma_len(sg);
			total_len += len;
			curr_sg->address = cpu_to_le64(addr64);
			curr_sg->length = cpu_to_le32(len);
			curr_sg->reserved[0] = 0;
			curr_sg->reserved[1] = 0;
			curr_sg->reserved[2] = 0;
			curr_sg->chain_indicator = 0;
			curr_sg++;
		}

		switch (cmd->sc_data_direction) {
		case DMA_TO_DEVICE:
3573 3574
			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
			cp->direction |= IOACCEL2_DIR_DATA_OUT;
3575 3576
			break;
		case DMA_FROM_DEVICE:
3577 3578
			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
			cp->direction |= IOACCEL2_DIR_DATA_IN;
3579 3580
			break;
		case DMA_NONE:
3581 3582
			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
			cp->direction |= IOACCEL2_DIR_NO_DATA;
3583 3584 3585 3586 3587 3588 3589 3590
			break;
		default:
			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
				cmd->sc_data_direction);
			BUG();
			break;
		}
	} else {
3591 3592
		cp->direction &= ~IOACCEL2_DIRECTION_MASK;
		cp->direction |= IOACCEL2_DIR_NO_DATA;
3593
	}
3594 3595 3596 3597

	/* Set encryption parameters, if necessary */
	set_encrypt_ioaccel2(h, c, cp);

D
Don Brace 已提交
3598
	cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
3599
	cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
3600 3601 3602 3603 3604 3605 3606 3607
	memcpy(cp->cdb, cdb, sizeof(cp->cdb));

	/* fill in sg elements */
	cp->sg_count = (u8) use_sg;

	cp->data_len = cpu_to_le32(total_len);
	cp->err_ptr = cpu_to_le64(c->busaddr +
			offsetof(struct io_accel2_cmd, error_data));
3608
	cp->err_len = cpu_to_le32(sizeof(cp->error_data));
3609 3610 3611 3612 3613 3614 3615 3616 3617 3618

	enqueue_cmd_and_start_io(h, c);
	return 0;
}

/*
 * Queue a command to the correct I/O accelerator path.
 */
static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3619
	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3620
{
3621 3622 3623 3624 3625 3626
	/* Try to honor the device's queue depth */
	if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
					phys_disk->queue_depth) {
		atomic_dec(&phys_disk->ioaccel_cmds_out);
		return IO_ACCEL_INELIGIBLE;
	}
3627 3628
	if (h->transMethod & CFGTBL_Trans_io_accel1)
		return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
3629 3630
						cdb, cdb_len, scsi3addr,
						phys_disk);
3631 3632
	else
		return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
3633 3634
						cdb, cdb_len, scsi3addr,
						phys_disk);
3635 3636
}

3637 3638 3639 3640 3641
static void raid_map_helper(struct raid_map_data *map,
		int offload_to_mirror, u32 *map_index, u32 *current_group)
{
	if (offload_to_mirror == 0)  {
		/* use physical disk in the first mirrored group. */
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3642
		*map_index %= le16_to_cpu(map->data_disks_per_row);
3643 3644 3645 3646
		return;
	}
	do {
		/* determine mirror group that *map_index indicates */
D
Don Brace 已提交
3647 3648
		*current_group = *map_index /
			le16_to_cpu(map->data_disks_per_row);
3649 3650
		if (offload_to_mirror == *current_group)
			continue;
D
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3651
		if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
3652
			/* select map index from next group */
D
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3653
			*map_index += le16_to_cpu(map->data_disks_per_row);
3654 3655 3656
			(*current_group)++;
		} else {
			/* select map index from first group */
D
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3657
			*map_index %= le16_to_cpu(map->data_disks_per_row);
3658 3659 3660 3661 3662
			*current_group = 0;
		}
	} while (offload_to_mirror != *current_group);
}

3663 3664 3665 3666 3667 3668 3669 3670 3671 3672 3673 3674 3675 3676 3677 3678 3679 3680
/*
 * Attempt to perform offload RAID mapping for a logical volume I/O.
 */
static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
	struct CommandList *c)
{
	struct scsi_cmnd *cmd = c->scsi_cmd;
	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
	struct raid_map_data *map = &dev->raid_map;
	struct raid_map_disk_data *dd = &map->data[0];
	int is_write = 0;
	u32 map_index;
	u64 first_block, last_block;
	u32 block_cnt;
	u32 blocks_per_row;
	u64 first_row, last_row;
	u32 first_row_offset, last_row_offset;
	u32 first_column, last_column;
3681 3682 3683 3684 3685 3686 3687 3688
	u64 r0_first_row, r0_last_row;
	u32 r5or6_blocks_per_row;
	u64 r5or6_first_row, r5or6_last_row;
	u32 r5or6_first_row_offset, r5or6_last_row_offset;
	u32 r5or6_first_column, r5or6_last_column;
	u32 total_disks_per_row;
	u32 stripesize;
	u32 first_group, last_group, current_group;
3689 3690 3691 3692 3693 3694
	u32 map_row;
	u32 disk_handle;
	u64 disk_block;
	u32 disk_block_cnt;
	u8 cdb[16];
	u8 cdb_len;
D
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3695
	u16 strip_size;
3696 3697 3698
#if BITS_PER_LONG == 32
	u64 tmpdiv;
#endif
3699
	int offload_to_mirror;
3700 3701 3702 3703 3704 3705 3706 3707 3708 3709

	/* check for valid opcode, get LBA and block count */
	switch (cmd->cmnd[0]) {
	case WRITE_6:
		is_write = 1;
	case READ_6:
		first_block =
			(((u64) cmd->cmnd[2]) << 8) |
			cmd->cmnd[3];
		block_cnt = cmd->cmnd[4];
3710 3711
		if (block_cnt == 0)
			block_cnt = 256;
3712 3713 3714 3715 3716 3717 3718 3719 3720 3721 3722 3723 3724 3725 3726 3727 3728 3729 3730 3731 3732 3733 3734 3735 3736 3737 3738 3739 3740 3741 3742 3743 3744 3745 3746 3747 3748 3749 3750 3751 3752 3753 3754 3755 3756 3757 3758 3759 3760 3761 3762 3763 3764 3765 3766
		break;
	case WRITE_10:
		is_write = 1;
	case READ_10:
		first_block =
			(((u64) cmd->cmnd[2]) << 24) |
			(((u64) cmd->cmnd[3]) << 16) |
			(((u64) cmd->cmnd[4]) << 8) |
			cmd->cmnd[5];
		block_cnt =
			(((u32) cmd->cmnd[7]) << 8) |
			cmd->cmnd[8];
		break;
	case WRITE_12:
		is_write = 1;
	case READ_12:
		first_block =
			(((u64) cmd->cmnd[2]) << 24) |
			(((u64) cmd->cmnd[3]) << 16) |
			(((u64) cmd->cmnd[4]) << 8) |
			cmd->cmnd[5];
		block_cnt =
			(((u32) cmd->cmnd[6]) << 24) |
			(((u32) cmd->cmnd[7]) << 16) |
			(((u32) cmd->cmnd[8]) << 8) |
		cmd->cmnd[9];
		break;
	case WRITE_16:
		is_write = 1;
	case READ_16:
		first_block =
			(((u64) cmd->cmnd[2]) << 56) |
			(((u64) cmd->cmnd[3]) << 48) |
			(((u64) cmd->cmnd[4]) << 40) |
			(((u64) cmd->cmnd[5]) << 32) |
			(((u64) cmd->cmnd[6]) << 24) |
			(((u64) cmd->cmnd[7]) << 16) |
			(((u64) cmd->cmnd[8]) << 8) |
			cmd->cmnd[9];
		block_cnt =
			(((u32) cmd->cmnd[10]) << 24) |
			(((u32) cmd->cmnd[11]) << 16) |
			(((u32) cmd->cmnd[12]) << 8) |
			cmd->cmnd[13];
		break;
	default:
		return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
	}
	last_block = first_block + block_cnt - 1;

	/* check for write to non-RAID-0 */
	if (is_write && dev->raid_level != 0)
		return IO_ACCEL_INELIGIBLE;

	/* check for invalid block or wraparound */
D
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3767 3768
	if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
		last_block < first_block)
3769 3770 3771
		return IO_ACCEL_INELIGIBLE;

	/* calculate stripe information for the request */
D
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3772 3773 3774
	blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
				le16_to_cpu(map->strip_size);
	strip_size = le16_to_cpu(map->strip_size);
3775 3776 3777 3778 3779 3780 3781 3782 3783 3784
#if BITS_PER_LONG == 32
	tmpdiv = first_block;
	(void) do_div(tmpdiv, blocks_per_row);
	first_row = tmpdiv;
	tmpdiv = last_block;
	(void) do_div(tmpdiv, blocks_per_row);
	last_row = tmpdiv;
	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
	tmpdiv = first_row_offset;
D
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3785
	(void) do_div(tmpdiv, strip_size);
3786 3787
	first_column = tmpdiv;
	tmpdiv = last_row_offset;
D
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3788
	(void) do_div(tmpdiv, strip_size);
3789 3790 3791 3792 3793 3794
	last_column = tmpdiv;
#else
	first_row = first_block / blocks_per_row;
	last_row = last_block / blocks_per_row;
	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
D
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3795 3796
	first_column = first_row_offset / strip_size;
	last_column = last_row_offset / strip_size;
3797 3798 3799 3800 3801 3802 3803
#endif

	/* if this isn't a single row/column then give to the controller */
	if ((first_row != last_row) || (first_column != last_column))
		return IO_ACCEL_INELIGIBLE;

	/* proceeding with driver mapping */
D
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3804 3805
	total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
				le16_to_cpu(map->metadata_disks_per_row);
3806
	map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
D
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3807
				le16_to_cpu(map->row_cnt);
3808 3809 3810 3811 3812 3813 3814 3815 3816
	map_index = (map_row * total_disks_per_row) + first_column;

	switch (dev->raid_level) {
	case HPSA_RAID_0:
		break; /* nothing special to do */
	case HPSA_RAID_1:
		/* Handles load balance across RAID 1 members.
		 * (2-drive R1 and R10 with even # of drives.)
		 * Appropriate for SSDs, not optimal for HDDs
3817
		 */
D
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3818
		BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
3819
		if (dev->offload_to_mirror)
D
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3820
			map_index += le16_to_cpu(map->data_disks_per_row);
3821
		dev->offload_to_mirror = !dev->offload_to_mirror;
3822 3823 3824 3825 3826
		break;
	case HPSA_RAID_ADM:
		/* Handles N-way mirrors  (R1-ADM)
		 * and R10 with # of drives divisible by 3.)
		 */
D
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3827
		BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
3828 3829 3830 3831 3832 3833

		offload_to_mirror = dev->offload_to_mirror;
		raid_map_helper(map, offload_to_mirror,
				&map_index, &current_group);
		/* set mirror group to use next time */
		offload_to_mirror =
D
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3834 3835
			(offload_to_mirror >=
			le16_to_cpu(map->layout_map_count) - 1)
3836 3837 3838 3839 3840 3841 3842 3843 3844
			? 0 : offload_to_mirror + 1;
		dev->offload_to_mirror = offload_to_mirror;
		/* Avoid direct use of dev->offload_to_mirror within this
		 * function since multiple threads might simultaneously
		 * increment it beyond the range of dev->layout_map_count -1.
		 */
		break;
	case HPSA_RAID_5:
	case HPSA_RAID_6:
D
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3845
		if (le16_to_cpu(map->layout_map_count) <= 1)
3846 3847 3848 3849
			break;

		/* Verify first and last block are in same RAID group */
		r5or6_blocks_per_row =
D
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3850 3851
			le16_to_cpu(map->strip_size) *
			le16_to_cpu(map->data_disks_per_row);
3852
		BUG_ON(r5or6_blocks_per_row == 0);
D
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3853 3854
		stripesize = r5or6_blocks_per_row *
			le16_to_cpu(map->layout_map_count);
3855 3856 3857 3858 3859 3860 3861 3862 3863 3864 3865 3866 3867 3868 3869
#if BITS_PER_LONG == 32
		tmpdiv = first_block;
		first_group = do_div(tmpdiv, stripesize);
		tmpdiv = first_group;
		(void) do_div(tmpdiv, r5or6_blocks_per_row);
		first_group = tmpdiv;
		tmpdiv = last_block;
		last_group = do_div(tmpdiv, stripesize);
		tmpdiv = last_group;
		(void) do_div(tmpdiv, r5or6_blocks_per_row);
		last_group = tmpdiv;
#else
		first_group = (first_block % stripesize) / r5or6_blocks_per_row;
		last_group = (last_block % stripesize) / r5or6_blocks_per_row;
#endif
3870
		if (first_group != last_group)
3871 3872 3873 3874 3875 3876 3877 3878 3879 3880 3881 3882 3883 3884 3885 3886 3887 3888 3889 3890 3891 3892 3893 3894 3895 3896 3897 3898 3899 3900 3901 3902 3903 3904 3905 3906 3907 3908 3909 3910 3911 3912 3913 3914 3915 3916
			return IO_ACCEL_INELIGIBLE;

		/* Verify request is in a single row of RAID 5/6 */
#if BITS_PER_LONG == 32
		tmpdiv = first_block;
		(void) do_div(tmpdiv, stripesize);
		first_row = r5or6_first_row = r0_first_row = tmpdiv;
		tmpdiv = last_block;
		(void) do_div(tmpdiv, stripesize);
		r5or6_last_row = r0_last_row = tmpdiv;
#else
		first_row = r5or6_first_row = r0_first_row =
						first_block / stripesize;
		r5or6_last_row = r0_last_row = last_block / stripesize;
#endif
		if (r5or6_first_row != r5or6_last_row)
			return IO_ACCEL_INELIGIBLE;


		/* Verify request is in a single column */
#if BITS_PER_LONG == 32
		tmpdiv = first_block;
		first_row_offset = do_div(tmpdiv, stripesize);
		tmpdiv = first_row_offset;
		first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
		r5or6_first_row_offset = first_row_offset;
		tmpdiv = last_block;
		r5or6_last_row_offset = do_div(tmpdiv, stripesize);
		tmpdiv = r5or6_last_row_offset;
		r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
		tmpdiv = r5or6_first_row_offset;
		(void) do_div(tmpdiv, map->strip_size);
		first_column = r5or6_first_column = tmpdiv;
		tmpdiv = r5or6_last_row_offset;
		(void) do_div(tmpdiv, map->strip_size);
		r5or6_last_column = tmpdiv;
#else
		first_row_offset = r5or6_first_row_offset =
			(u32)((first_block % stripesize) %
						r5or6_blocks_per_row);

		r5or6_last_row_offset =
			(u32)((last_block % stripesize) %
						r5or6_blocks_per_row);

		first_column = r5or6_first_column =
D
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3917
			r5or6_first_row_offset / le16_to_cpu(map->strip_size);
3918
		r5or6_last_column =
D
Don Brace 已提交
3919
			r5or6_last_row_offset / le16_to_cpu(map->strip_size);
3920 3921 3922 3923 3924 3925
#endif
		if (r5or6_first_column != r5or6_last_column)
			return IO_ACCEL_INELIGIBLE;

		/* Request is eligible */
		map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
D
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3926
			le16_to_cpu(map->row_cnt);
3927 3928

		map_index = (first_group *
D
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3929
			(le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
3930 3931 3932 3933
			(map_row * total_disks_per_row) + first_column;
		break;
	default:
		return IO_ACCEL_INELIGIBLE;
3934
	}
3935

3936 3937 3938
	if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
		return IO_ACCEL_INELIGIBLE;

3939 3940
	c->phys_disk = dev->phys_disk[map_index];

3941
	disk_handle = dd[map_index].ioaccel_handle;
D
Don Brace 已提交
3942 3943 3944 3945
	disk_block = le64_to_cpu(map->disk_starting_blk) +
			first_row * le16_to_cpu(map->strip_size) +
			(first_row_offset - first_column *
			le16_to_cpu(map->strip_size));
3946 3947 3948 3949 3950 3951 3952 3953 3954 3955 3956 3957 3958 3959 3960 3961 3962 3963 3964 3965 3966 3967 3968 3969 3970 3971 3972 3973 3974 3975 3976 3977 3978 3979 3980 3981 3982 3983 3984 3985 3986 3987
	disk_block_cnt = block_cnt;

	/* handle differing logical/physical block sizes */
	if (map->phys_blk_shift) {
		disk_block <<= map->phys_blk_shift;
		disk_block_cnt <<= map->phys_blk_shift;
	}
	BUG_ON(disk_block_cnt > 0xffff);

	/* build the new CDB for the physical disk I/O */
	if (disk_block > 0xffffffff) {
		cdb[0] = is_write ? WRITE_16 : READ_16;
		cdb[1] = 0;
		cdb[2] = (u8) (disk_block >> 56);
		cdb[3] = (u8) (disk_block >> 48);
		cdb[4] = (u8) (disk_block >> 40);
		cdb[5] = (u8) (disk_block >> 32);
		cdb[6] = (u8) (disk_block >> 24);
		cdb[7] = (u8) (disk_block >> 16);
		cdb[8] = (u8) (disk_block >> 8);
		cdb[9] = (u8) (disk_block);
		cdb[10] = (u8) (disk_block_cnt >> 24);
		cdb[11] = (u8) (disk_block_cnt >> 16);
		cdb[12] = (u8) (disk_block_cnt >> 8);
		cdb[13] = (u8) (disk_block_cnt);
		cdb[14] = 0;
		cdb[15] = 0;
		cdb_len = 16;
	} else {
		cdb[0] = is_write ? WRITE_10 : READ_10;
		cdb[1] = 0;
		cdb[2] = (u8) (disk_block >> 24);
		cdb[3] = (u8) (disk_block >> 16);
		cdb[4] = (u8) (disk_block >> 8);
		cdb[5] = (u8) (disk_block);
		cdb[6] = 0;
		cdb[7] = (u8) (disk_block_cnt >> 8);
		cdb[8] = (u8) (disk_block_cnt);
		cdb[9] = 0;
		cdb_len = 10;
	}
	return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
3988 3989
						dev->scsi3addr,
						dev->phys_disk[map_index]);
3990 3991
}

3992 3993 3994 3995
/* Submit commands down the "normal" RAID stack path */
static int hpsa_ciss_submit(struct ctlr_info *h,
	struct CommandList *c, struct scsi_cmnd *cmd,
	unsigned char scsi3addr[])
3996 3997 3998 3999 4000 4001
{
	cmd->host_scribble = (unsigned char *) c;
	c->cmd_type = CMD_SCSI;
	c->scsi_cmd = cmd;
	c->Header.ReplyQueue = 0;  /* unused in simple mode */
	memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
4002
	c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
4003 4004 4005 4006 4007 4008 4009 4010 4011 4012

	/* Fill in the request block... */

	c->Request.Timeout = 0;
	memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
	BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
	c->Request.CDBLen = cmd->cmd_len;
	memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
	switch (cmd->sc_data_direction) {
	case DMA_TO_DEVICE:
4013 4014
		c->Request.type_attr_dir =
			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
4015 4016
		break;
	case DMA_FROM_DEVICE:
4017 4018
		c->Request.type_attr_dir =
			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
4019 4020
		break;
	case DMA_NONE:
4021 4022
		c->Request.type_attr_dir =
			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
4023 4024 4025 4026 4027 4028 4029
		break;
	case DMA_BIDIRECTIONAL:
		/* This can happen if a buggy application does a scsi passthru
		 * and sets both inlen and outlen to non-zero. ( see
		 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
		 */

4030 4031
		c->Request.type_attr_dir =
			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
4032 4033 4034 4035 4036 4037 4038 4039 4040 4041 4042 4043 4044 4045 4046 4047 4048
		/* This is technically wrong, and hpsa controllers should
		 * reject it with CMD_INVALID, which is the most correct
		 * response, but non-fibre backends appear to let it
		 * slide by, and give the same results as if this field
		 * were set correctly.  Either way is acceptable for
		 * our purposes here.
		 */

		break;

	default:
		dev_err(&h->pdev->dev, "unknown data direction: %d\n",
			cmd->sc_data_direction);
		BUG();
		break;
	}

4049
	if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4050 4051 4052 4053 4054 4055 4056 4057
		cmd_free(h, c);
		return SCSI_MLQUEUE_HOST_BUSY;
	}
	enqueue_cmd_and_start_io(h, c);
	/* the cmd'll come back via intr handler in complete_scsi_command()  */
	return 0;
}

4058 4059 4060 4061 4062 4063 4064 4065 4066 4067 4068 4069 4070 4071 4072 4073 4074 4075 4076 4077 4078 4079 4080 4081 4082
static void hpsa_command_resubmit_worker(struct work_struct *work)
{
	struct scsi_cmnd *cmd;
	struct hpsa_scsi_dev_t *dev;
	struct CommandList *c =
			container_of(work, struct CommandList, work);

	cmd = c->scsi_cmd;
	dev = cmd->device->hostdata;
	if (!dev) {
		cmd->result = DID_NO_CONNECT << 16;
		cmd->scsi_done(cmd);
		return;
	}
	if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
		/*
		 * If we get here, it means dma mapping failed. Try
		 * again via scsi mid layer, which will then get
		 * SCSI_MLQUEUE_HOST_BUSY.
		 */
		cmd->result = DID_IMM_RETRY << 16;
		cmd->scsi_done(cmd);
	}
}

4083 4084 4085 4086 4087 4088 4089 4090 4091 4092 4093 4094 4095 4096 4097 4098 4099 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 4110 4111
/* Running in struct Scsi_Host->host_lock less mode */
static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
{
	struct ctlr_info *h;
	struct hpsa_scsi_dev_t *dev;
	unsigned char scsi3addr[8];
	struct CommandList *c;
	int rc = 0;

	/* Get the ptr to our adapter structure out of cmd->host. */
	h = sdev_to_hba(cmd->device);
	dev = cmd->device->hostdata;
	if (!dev) {
		cmd->result = DID_NO_CONNECT << 16;
		cmd->scsi_done(cmd);
		return 0;
	}
	memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));

	if (unlikely(lockup_detected(h))) {
		cmd->result = DID_ERROR << 16;
		cmd->scsi_done(cmd);
		return 0;
	}
	c = cmd_alloc(h);
	if (c == NULL) {			/* trouble... */
		dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
		return SCSI_MLQUEUE_HOST_BUSY;
	}
4112 4113 4114 4115 4116 4117
	if (unlikely(lockup_detected(h))) {
		cmd->result = DID_ERROR << 16;
		cmd_free(h, c);
		cmd->scsi_done(cmd);
		return 0;
	}
4118

4119 4120
	/*
	 * Call alternate submit routine for I/O accelerated commands.
4121 4122 4123 4124 4125 4126 4127 4128 4129 4130 4131 4132 4133 4134 4135 4136 4137 4138 4139 4140 4141 4142 4143 4144 4145 4146 4147 4148 4149 4150 4151
	 * Retries always go down the normal I/O path.
	 */
	if (likely(cmd->retries == 0 &&
		cmd->request->cmd_type == REQ_TYPE_FS &&
		h->acciopath_status)) {

		cmd->host_scribble = (unsigned char *) c;
		c->cmd_type = CMD_SCSI;
		c->scsi_cmd = cmd;

		if (dev->offload_enabled) {
			rc = hpsa_scsi_ioaccel_raid_map(h, c);
			if (rc == 0)
				return 0; /* Sent on ioaccel path */
			if (rc < 0) {   /* scsi_dma_map failed. */
				cmd_free(h, c);
				return SCSI_MLQUEUE_HOST_BUSY;
			}
		} else if (dev->ioaccel_handle) {
			rc = hpsa_scsi_ioaccel_direct_map(h, c);
			if (rc == 0)
				return 0; /* Sent on direct map path */
			if (rc < 0) {   /* scsi_dma_map failed. */
				cmd_free(h, c);
				return SCSI_MLQUEUE_HOST_BUSY;
			}
		}
	}
	return hpsa_ciss_submit(h, c, cmd, scsi3addr);
}

4152
static void hpsa_scan_complete(struct ctlr_info *h)
4153 4154 4155
{
	unsigned long flags;

4156 4157 4158 4159
	spin_lock_irqsave(&h->scan_lock, flags);
	h->scan_finished = 1;
	wake_up_all(&h->scan_wait_queue);
	spin_unlock_irqrestore(&h->scan_lock, flags);
4160 4161
}

4162 4163 4164 4165 4166
static void hpsa_scan_start(struct Scsi_Host *sh)
{
	struct ctlr_info *h = shost_to_hba(sh);
	unsigned long flags;

4167 4168 4169 4170 4171 4172 4173 4174
	/*
	 * Don't let rescans be initiated on a controller known to be locked
	 * up.  If the controller locks up *during* a rescan, that thread is
	 * probably hosed, but at least we can prevent new rescan threads from
	 * piling up on a locked up controller.
	 */
	if (unlikely(lockup_detected(h)))
		return hpsa_scan_complete(h);
4175

4176 4177 4178 4179 4180 4181 4182 4183 4184 4185 4186 4187 4188 4189 4190 4191
	/* wait until any scan already in progress is finished. */
	while (1) {
		spin_lock_irqsave(&h->scan_lock, flags);
		if (h->scan_finished)
			break;
		spin_unlock_irqrestore(&h->scan_lock, flags);
		wait_event(h->scan_wait_queue, h->scan_finished);
		/* Note: We don't need to worry about a race between this
		 * thread and driver unload because the midlayer will
		 * have incremented the reference count, so unload won't
		 * happen if we're in here.
		 */
	}
	h->scan_finished = 0; /* mark scan as in progress */
	spin_unlock_irqrestore(&h->scan_lock, flags);

4192 4193
	if (unlikely(lockup_detected(h)))
		return hpsa_scan_complete(h);
4194

4195 4196
	hpsa_update_scsi_devices(h, h->scsi_host->host_no);

4197
	hpsa_scan_complete(h);
4198 4199
}

D
Don Brace 已提交
4200 4201
static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
{
4202 4203 4204 4205
	struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;

	if (!logical_drive)
		return -ENODEV;
D
Don Brace 已提交
4206 4207 4208

	if (qdepth < 1)
		qdepth = 1;
4209 4210 4211 4212
	else if (qdepth > logical_drive->queue_depth)
		qdepth = logical_drive->queue_depth;

	return scsi_change_queue_depth(sdev, qdepth);
D
Don Brace 已提交
4213 4214
}

4215 4216 4217 4218 4219 4220 4221 4222 4223 4224 4225 4226 4227
static int hpsa_scan_finished(struct Scsi_Host *sh,
	unsigned long elapsed_time)
{
	struct ctlr_info *h = shost_to_hba(sh);
	unsigned long flags;
	int finished;

	spin_lock_irqsave(&h->scan_lock, flags);
	finished = h->scan_finished;
	spin_unlock_irqrestore(&h->scan_lock, flags);
	return finished;
}

4228 4229 4230 4231 4232 4233 4234 4235 4236 4237
static void hpsa_unregister_scsi(struct ctlr_info *h)
{
	/* we are being forcibly unloaded, and may not refuse. */
	scsi_remove_host(h->scsi_host);
	scsi_host_put(h->scsi_host);
	h->scsi_host = NULL;
}

static int hpsa_register_scsi(struct ctlr_info *h)
{
4238 4239
	struct Scsi_Host *sh;
	int error;
4240

4241 4242 4243 4244 4245 4246 4247 4248 4249 4250 4251
	sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
	if (sh == NULL)
		goto fail;

	sh->io_port = 0;
	sh->n_io_port = 0;
	sh->this_id = -1;
	sh->max_channel = 3;
	sh->max_cmd_len = MAX_COMMAND_SIZE;
	sh->max_lun = HPSA_MAX_LUN;
	sh->max_id = HPSA_MAX_LUN;
4252 4253 4254 4255
	sh->can_queue = h->nr_cmds -
			HPSA_CMDS_RESERVED_FOR_ABORTS -
			HPSA_CMDS_RESERVED_FOR_DRIVER -
			HPSA_MAX_CONCURRENT_PASSTHRUS;
4256
	sh->cmd_per_lun = sh->can_queue;
4257 4258 4259 4260 4261 4262 4263 4264 4265 4266 4267 4268 4269 4270 4271 4272 4273 4274 4275 4276
	sh->sg_tablesize = h->maxsgentries;
	h->scsi_host = sh;
	sh->hostdata[0] = (unsigned long) h;
	sh->irq = h->intr[h->intr_mode];
	sh->unique_id = sh->irq;
	error = scsi_add_host(sh, &h->pdev->dev);
	if (error)
		goto fail_host_put;
	scsi_scan_host(sh);
	return 0;

 fail_host_put:
	dev_err(&h->pdev->dev, "%s: scsi_add_host"
		" failed for controller %d\n", __func__, h->ctlr);
	scsi_host_put(sh);
	return error;
 fail:
	dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
		" failed for controller %d\n", __func__, h->ctlr);
	return -ENOMEM;
4277 4278 4279 4280 4281
}

static int wait_for_device_to_become_ready(struct ctlr_info *h,
	unsigned char lunaddr[])
{
4282
	int rc;
4283 4284 4285 4286
	int count = 0;
	int waittime = 1; /* seconds */
	struct CommandList *c;

4287
	c = cmd_alloc(h);
4288 4289 4290 4291 4292 4293 4294 4295 4296 4297 4298 4299 4300 4301
	if (!c) {
		dev_warn(&h->pdev->dev, "out of memory in "
			"wait_for_device_to_become_ready.\n");
		return IO_ERROR;
	}

	/* Send test unit ready until device ready, or give up. */
	while (count < HPSA_TUR_RETRY_LIMIT) {

		/* Wait for a bit.  do this first, because if we send
		 * the TUR right away, the reset will just abort it.
		 */
		msleep(1000 * waittime);
		count++;
4302
		rc = 0; /* Device ready. */
4303 4304 4305 4306 4307

		/* Increase wait time with each try, up to a point. */
		if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
			waittime = waittime * 2;

4308 4309 4310
		/* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
		(void) fill_cmd(c, TEST_UNIT_READY, h,
				NULL, 0, 0, lunaddr, TYPE_CMD);
4311 4312 4313 4314 4315 4316 4317 4318 4319 4320 4321 4322 4323 4324 4325 4326 4327 4328 4329 4330 4331 4332
		hpsa_scsi_do_simple_cmd_core(h, c);
		/* no unmap needed here because no data xfer. */

		if (c->err_info->CommandStatus == CMD_SUCCESS)
			break;

		if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
			c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
			(c->err_info->SenseInfo[2] == NO_SENSE ||
			c->err_info->SenseInfo[2] == UNIT_ATTENTION))
			break;

		dev_warn(&h->pdev->dev, "waiting %d secs "
			"for device to become ready.\n", waittime);
		rc = 1; /* device not ready. */
	}

	if (rc)
		dev_warn(&h->pdev->dev, "giving up on device.\n");
	else
		dev_warn(&h->pdev->dev, "device is ready.\n");

4333
	cmd_free(h, c);
4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344 4345 4346 4347 4348 4349
	return rc;
}

/* Need at least one of these error handlers to keep ../scsi/hosts.c from
 * complaining.  Doing a host- or bus-reset can't do anything good here.
 */
static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
{
	int rc;
	struct ctlr_info *h;
	struct hpsa_scsi_dev_t *dev;

	/* find the controller to which the command to be aborted was sent */
	h = sdev_to_hba(scsicmd->device);
	if (h == NULL) /* paranoia */
		return FAILED;
4350 4351 4352 4353

	if (lockup_detected(h))
		return FAILED;

4354 4355 4356 4357 4358 4359
	dev = scsicmd->device->hostdata;
	if (!dev) {
		dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
			"device lookup failed.\n");
		return FAILED;
	}
4360 4361
	dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
		h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4362
	/* send a reset to the SCSI LUN which the command was sent to */
4363
	rc = hpsa_send_reset(h, dev->scsi3addr, HPSA_RESET_TYPE_LUN);
4364 4365 4366 4367 4368 4369 4370
	if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
		return SUCCESS;

	dev_warn(&h->pdev->dev, "resetting device failed.\n");
	return FAILED;
}

4371 4372 4373 4374 4375 4376 4377 4378 4379 4380 4381 4382 4383 4384 4385
static void swizzle_abort_tag(u8 *tag)
{
	u8 original_tag[8];

	memcpy(original_tag, tag, 8);
	tag[0] = original_tag[3];
	tag[1] = original_tag[2];
	tag[2] = original_tag[1];
	tag[3] = original_tag[0];
	tag[4] = original_tag[7];
	tag[5] = original_tag[6];
	tag[6] = original_tag[5];
	tag[7] = original_tag[4];
}

4386
static void hpsa_get_tag(struct ctlr_info *h,
D
Don Brace 已提交
4387
	struct CommandList *c, __le32 *taglower, __le32 *tagupper)
4388
{
D
Don Brace 已提交
4389
	u64 tag;
4390 4391 4392
	if (c->cmd_type == CMD_IOACCEL1) {
		struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
			&h->ioaccel_cmd_pool[c->cmdindex];
D
Don Brace 已提交
4393 4394 4395
		tag = le64_to_cpu(cm1->tag);
		*tagupper = cpu_to_le32(tag >> 32);
		*taglower = cpu_to_le32(tag);
4396 4397 4398 4399 4400
		return;
	}
	if (c->cmd_type == CMD_IOACCEL2) {
		struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
			&h->ioaccel2_cmd_pool[c->cmdindex];
4401 4402 4403
		/* upper tag not used in ioaccel2 mode */
		memset(tagupper, 0, sizeof(*tagupper));
		*taglower = cm2->Tag;
4404
		return;
4405
	}
D
Don Brace 已提交
4406 4407 4408
	tag = le64_to_cpu(c->Header.tag);
	*tagupper = cpu_to_le32(tag >> 32);
	*taglower = cpu_to_le32(tag);
4409 4410
}

4411
static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
4412
	struct CommandList *abort, int swizzle)
4413 4414 4415 4416
{
	int rc = IO_OK;
	struct CommandList *c;
	struct ErrorInfo *ei;
D
Don Brace 已提交
4417
	__le32 tagupper, taglower;
4418

4419
	c = cmd_alloc(h);
4420
	if (c == NULL) {	/* trouble... */
4421
		dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
4422 4423 4424
		return -ENOMEM;
	}

4425 4426 4427
	/* fill_cmd can't fail here, no buffer to map */
	(void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
		0, 0, scsi3addr, TYPE_MSG);
4428 4429
	if (swizzle)
		swizzle_abort_tag(&c->Request.CDB[4]);
4430
	hpsa_scsi_do_simple_cmd_core(h, c);
4431
	hpsa_get_tag(h, abort, &taglower, &tagupper);
4432
	dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
4433
		__func__, tagupper, taglower);
4434 4435 4436 4437 4438 4439 4440 4441 4442 4443 4444
	/* no unmap needed here because no data xfer. */

	ei = c->err_info;
	switch (ei->CommandStatus) {
	case CMD_SUCCESS:
		break;
	case CMD_UNABORTABLE: /* Very common, don't make noise. */
		rc = -1;
		break;
	default:
		dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
4445
			__func__, tagupper, taglower);
4446
		hpsa_scsi_interpret_error(h, c);
4447 4448 4449
		rc = -1;
		break;
	}
4450
	cmd_free(h, c);
4451 4452
	dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
		__func__, tagupper, taglower);
4453 4454 4455
	return rc;
}

4456 4457 4458 4459 4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472
/* ioaccel2 path firmware cannot handle abort task requests.
 * Change abort requests to physical target reset, and send to the
 * address of the physical disk used for the ioaccel 2 command.
 * Return 0 on success (IO_OK)
 *	 -1 on failure
 */

static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
	unsigned char *scsi3addr, struct CommandList *abort)
{
	int rc = IO_OK;
	struct scsi_cmnd *scmd; /* scsi command within request being aborted */
	struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
	unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
	unsigned char *psa = &phys_scsi3addr[0];

	/* Get a pointer to the hpsa logical device. */
4473
	scmd = abort->scsi_cmd;
4474 4475 4476 4477 4478 4479 4480
	dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
	if (dev == NULL) {
		dev_warn(&h->pdev->dev,
			"Cannot abort: no device pointer for command.\n");
			return -1; /* not abortable */
	}

4481 4482 4483 4484 4485 4486 4487
	if (h->raid_offload_debug > 0)
		dev_info(&h->pdev->dev,
			"Reset as abort: Abort requested on C%d:B%d:T%d:L%d scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
			h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
			scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
			scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);

4488 4489 4490 4491 4492 4493 4494 4495 4496 4497 4498 4499 4500
	if (!dev->offload_enabled) {
		dev_warn(&h->pdev->dev,
			"Can't abort: device is not operating in HP SSD Smart Path mode.\n");
		return -1; /* not abortable */
	}

	/* Incoming scsi3addr is logical addr. We need physical disk addr. */
	if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
		dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
		return -1; /* not abortable */
	}

	/* send the reset */
4501 4502 4503 4504 4505
	if (h->raid_offload_debug > 0)
		dev_info(&h->pdev->dev,
			"Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
			psa[0], psa[1], psa[2], psa[3],
			psa[4], psa[5], psa[6], psa[7]);
4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519 4520 4521 4522 4523 4524 4525 4526 4527 4528 4529 4530 4531 4532
	rc = hpsa_send_reset(h, psa, HPSA_RESET_TYPE_TARGET);
	if (rc != 0) {
		dev_warn(&h->pdev->dev,
			"Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
			psa[0], psa[1], psa[2], psa[3],
			psa[4], psa[5], psa[6], psa[7]);
		return rc; /* failed to reset */
	}

	/* wait for device to recover */
	if (wait_for_device_to_become_ready(h, psa) != 0) {
		dev_warn(&h->pdev->dev,
			"Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
			psa[0], psa[1], psa[2], psa[3],
			psa[4], psa[5], psa[6], psa[7]);
		return -1;  /* failed to recover */
	}

	/* device recovered */
	dev_info(&h->pdev->dev,
		"Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
		psa[0], psa[1], psa[2], psa[3],
		psa[4], psa[5], psa[6], psa[7]);

	return rc; /* success */
}

4533 4534 4535 4536 4537 4538 4539 4540 4541
/* Some Smart Arrays need the abort tag swizzled, and some don't.  It's hard to
 * tell which kind we're dealing with, so we send the abort both ways.  There
 * shouldn't be any collisions between swizzled and unswizzled tags due to the
 * way we construct our tags but we check anyway in case the assumptions which
 * make this true someday become false.
 */
static int hpsa_send_abort_both_ways(struct ctlr_info *h,
	unsigned char *scsi3addr, struct CommandList *abort)
{
4542 4543 4544 4545 4546 4547 4548 4549
	/* ioccelerator mode 2 commands should be aborted via the
	 * accelerated path, since RAID path is unaware of these commands,
	 * but underlying firmware can't handle abort TMF.
	 * Change abort to physical device reset.
	 */
	if (abort->cmd_type == CMD_IOACCEL2)
		return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr, abort);

4550 4551
	return hpsa_send_abort(h, scsi3addr, abort, 0) &&
			hpsa_send_abort(h, scsi3addr, abort, 1);
4552 4553
}

4554 4555 4556 4557 4558 4559 4560 4561 4562 4563 4564 4565 4566 4567
/* Send an abort for the specified command.
 *	If the device and controller support it,
 *		send a task abort request.
 */
static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
{

	int i, rc;
	struct ctlr_info *h;
	struct hpsa_scsi_dev_t *dev;
	struct CommandList *abort; /* pointer to command to be aborted */
	struct scsi_cmnd *as;	/* ptr to scsi cmd inside aborted command. */
	char msg[256];		/* For debug messaging. */
	int ml = 0;
D
Don Brace 已提交
4568
	__le32 tagupper, taglower;
4569
	int refcount;
4570 4571 4572 4573 4574 4575 4576

	/* Find the controller of the command to be aborted */
	h = sdev_to_hba(sc->device);
	if (WARN(h == NULL,
			"ABORT REQUEST FAILED, Controller lookup failed.\n"))
		return FAILED;

4577 4578 4579
	if (lockup_detected(h))
		return FAILED;

4580 4581 4582 4583 4584 4585
	/* Check that controller supports some kind of task abort */
	if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
		!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
		return FAILED;

	memset(msg, 0, sizeof(msg));
H
Hannes Reinecke 已提交
4586
	ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%llu ",
4587 4588 4589 4590 4591 4592 4593 4594 4595 4596 4597 4598 4599 4600
		h->scsi_host->host_no, sc->device->channel,
		sc->device->id, sc->device->lun);

	/* Find the device of the command to be aborted */
	dev = sc->device->hostdata;
	if (!dev) {
		dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
				msg);
		return FAILED;
	}

	/* Get SCSI command to be aborted */
	abort = (struct CommandList *) sc->host_scribble;
	if (abort == NULL) {
4601 4602 4603 4604 4605 4606 4607
		/* This can happen if the command already completed. */
		return SUCCESS;
	}
	refcount = atomic_inc_return(&abort->refcount);
	if (refcount == 1) { /* Command is done already. */
		cmd_free(h, abort);
		return SUCCESS;
4608
	}
4609 4610
	hpsa_get_tag(h, abort, &taglower, &tagupper);
	ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
4611
	as  = abort->scsi_cmd;
4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622
	if (as != NULL)
		ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
			as->cmnd[0], as->serial_number);
	dev_dbg(&h->pdev->dev, "%s\n", msg);
	dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
		h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
	/*
	 * Command is in flight, or possibly already completed
	 * by the firmware (but not to the scsi mid layer) but we can't
	 * distinguish which.  Send the abort down.
	 */
4623
	rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
4624 4625 4626 4627 4628
	if (rc != 0) {
		dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
		dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
			h->scsi_host->host_no,
			dev->bus, dev->target, dev->lun);
4629
		cmd_free(h, abort);
4630 4631 4632 4633 4634 4635 4636 4637 4638 4639 4640
		return FAILED;
	}
	dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);

	/* If the abort(s) above completed and actually aborted the
	 * command, then the command to be aborted should already be
	 * completed.  If not, wait around a bit more to see if they
	 * manage to complete normally.
	 */
#define ABORT_COMPLETE_WAIT_SECS 30
	for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
4641 4642 4643
		refcount = atomic_read(&abort->refcount);
		if (refcount < 2) {
			cmd_free(h, abort);
4644
			return SUCCESS;
4645 4646 4647
		} else {
			msleep(100);
		}
4648 4649 4650
	}
	dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
		msg, ABORT_COMPLETE_WAIT_SECS);
4651
	cmd_free(h, abort);
4652 4653 4654
	return FAILED;
}

4655 4656 4657 4658 4659 4660
/*
 * For operations that cannot sleep, a command block is allocated at init,
 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
 * which ones are free or in use.  Lock must be held when calling this.
 * cmd_free() is the complement.
 */
4661

4662 4663 4664 4665 4666 4667
static struct CommandList *cmd_alloc(struct ctlr_info *h)
{
	struct CommandList *c;
	int i;
	union u64bit temp64;
	dma_addr_t cmd_dma_handle, err_dma_handle;
4668
	int refcount;
4669
	unsigned long offset;
4670

4671 4672
	/*
	 * There is some *extremely* small but non-zero chance that that
4673 4674 4675 4676 4677 4678 4679 4680 4681
	 * multiple threads could get in here, and one thread could
	 * be scanning through the list of bits looking for a free
	 * one, but the free ones are always behind him, and other
	 * threads sneak in behind him and eat them before he can
	 * get to them, so that while there is always a free one, a
	 * very unlucky thread might be starved anyway, never able to
	 * beat the other threads.  In reality, this happens so
	 * infrequently as to be indistinguishable from never.
	 */
4682

4683
	offset = h->last_allocation; /* benignly racy */
4684 4685 4686 4687 4688 4689 4690 4691 4692 4693 4694 4695 4696 4697 4698 4699 4700
	for (;;) {
		i = find_next_zero_bit(h->cmd_pool_bits, h->nr_cmds, offset);
		if (unlikely(i == h->nr_cmds)) {
			offset = 0;
			continue;
		}
		c = h->cmd_pool + i;
		refcount = atomic_inc_return(&c->refcount);
		if (unlikely(refcount > 1)) {
			cmd_free(h, c); /* already in use */
			offset = (i + 1) % h->nr_cmds;
			continue;
		}
		set_bit(i & (BITS_PER_LONG - 1),
			h->cmd_pool_bits + (i / BITS_PER_LONG));
		break; /* it's ours now. */
	}
4701
	h->last_allocation = i; /* benignly racy */
4702 4703 4704 4705

	/* Zero out all of commandlist except the last field, refcount */
	memset(c, 0, offsetof(struct CommandList, refcount));
	c->Header.tag = cpu_to_le64((u64) (i << DIRECT_LOOKUP_SHIFT));
4706
	cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(*c);
4707 4708 4709 4710 4711 4712 4713
	c->err_info = h->errinfo_pool + i;
	memset(c->err_info, 0, sizeof(*c->err_info));
	err_dma_handle = h->errinfo_pool_dhandle
	    + i * sizeof(*c->err_info);

	c->cmdindex = i;

4714 4715
	c->busaddr = (u32) cmd_dma_handle;
	temp64.val = (u64) err_dma_handle;
4716 4717
	c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
	c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
4718 4719 4720 4721 4722 4723 4724

	c->h = h;
	return c;
}

static void cmd_free(struct ctlr_info *h, struct CommandList *c)
{
4725 4726
	if (atomic_dec_and_test(&c->refcount)) {
		int i;
4727

4728 4729 4730 4731
		i = c - h->cmd_pool;
		clear_bit(i & (BITS_PER_LONG - 1),
			  h->cmd_pool_bits + (i / BITS_PER_LONG));
	}
4732 4733 4734 4735
}

#ifdef CONFIG_COMPAT

D
Don Brace 已提交
4736 4737
static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
	void __user *arg)
4738 4739 4740 4741 4742 4743 4744 4745
{
	IOCTL32_Command_struct __user *arg32 =
	    (IOCTL32_Command_struct __user *) arg;
	IOCTL_Command_struct arg64;
	IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
	int err;
	u32 cp;

4746
	memset(&arg64, 0, sizeof(arg64));
4747 4748 4749 4750 4751 4752 4753 4754 4755 4756 4757 4758 4759 4760 4761
	err = 0;
	err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
			   sizeof(arg64.LUN_info));
	err |= copy_from_user(&arg64.Request, &arg32->Request,
			   sizeof(arg64.Request));
	err |= copy_from_user(&arg64.error_info, &arg32->error_info,
			   sizeof(arg64.error_info));
	err |= get_user(arg64.buf_size, &arg32->buf_size);
	err |= get_user(cp, &arg32->buf);
	arg64.buf = compat_ptr(cp);
	err |= copy_to_user(p, &arg64, sizeof(arg64));

	if (err)
		return -EFAULT;

D
Don Brace 已提交
4762
	err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
4763 4764 4765 4766 4767 4768 4769 4770 4771 4772
	if (err)
		return err;
	err |= copy_in_user(&arg32->error_info, &p->error_info,
			 sizeof(arg32->error_info));
	if (err)
		return -EFAULT;
	return err;
}

static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
D
Don Brace 已提交
4773
	int cmd, void __user *arg)
4774 4775 4776 4777 4778 4779 4780 4781 4782
{
	BIG_IOCTL32_Command_struct __user *arg32 =
	    (BIG_IOCTL32_Command_struct __user *) arg;
	BIG_IOCTL_Command_struct arg64;
	BIG_IOCTL_Command_struct __user *p =
	    compat_alloc_user_space(sizeof(arg64));
	int err;
	u32 cp;

4783
	memset(&arg64, 0, sizeof(arg64));
4784 4785 4786 4787 4788 4789 4790 4791 4792 4793 4794 4795 4796 4797 4798 4799
	err = 0;
	err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
			   sizeof(arg64.LUN_info));
	err |= copy_from_user(&arg64.Request, &arg32->Request,
			   sizeof(arg64.Request));
	err |= copy_from_user(&arg64.error_info, &arg32->error_info,
			   sizeof(arg64.error_info));
	err |= get_user(arg64.buf_size, &arg32->buf_size);
	err |= get_user(arg64.malloc_size, &arg32->malloc_size);
	err |= get_user(cp, &arg32->buf);
	arg64.buf = compat_ptr(cp);
	err |= copy_to_user(p, &arg64, sizeof(arg64));

	if (err)
		return -EFAULT;

D
Don Brace 已提交
4800
	err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
4801 4802 4803 4804 4805 4806 4807 4808
	if (err)
		return err;
	err |= copy_in_user(&arg32->error_info, &p->error_info,
			 sizeof(arg32->error_info));
	if (err)
		return -EFAULT;
	return err;
}
4809

D
Don Brace 已提交
4810
static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
4811 4812 4813 4814 4815 4816 4817 4818 4819 4820 4821 4822 4823 4824 4825 4826 4827 4828 4829 4830 4831 4832 4833 4834 4835 4836 4837 4838
{
	switch (cmd) {
	case CCISS_GETPCIINFO:
	case CCISS_GETINTINFO:
	case CCISS_SETINTINFO:
	case CCISS_GETNODENAME:
	case CCISS_SETNODENAME:
	case CCISS_GETHEARTBEAT:
	case CCISS_GETBUSTYPES:
	case CCISS_GETFIRMVER:
	case CCISS_GETDRIVVER:
	case CCISS_REVALIDVOLS:
	case CCISS_DEREGDISK:
	case CCISS_REGNEWDISK:
	case CCISS_REGNEWD:
	case CCISS_RESCANDISK:
	case CCISS_GETLUNINFO:
		return hpsa_ioctl(dev, cmd, arg);

	case CCISS_PASSTHRU32:
		return hpsa_ioctl32_passthru(dev, cmd, arg);
	case CCISS_BIG_PASSTHRU32:
		return hpsa_ioctl32_big_passthru(dev, cmd, arg);

	default:
		return -ENOIOCTLCMD;
	}
}
4839 4840 4841 4842 4843 4844 4845 4846 4847 4848 4849 4850 4851 4852 4853 4854 4855 4856 4857 4858 4859 4860 4861 4862 4863 4864 4865 4866 4867 4868 4869 4870 4871 4872 4873 4874 4875 4876 4877 4878 4879 4880 4881 4882 4883
#endif

static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
{
	struct hpsa_pci_info pciinfo;

	if (!argp)
		return -EINVAL;
	pciinfo.domain = pci_domain_nr(h->pdev->bus);
	pciinfo.bus = h->pdev->bus->number;
	pciinfo.dev_fn = h->pdev->devfn;
	pciinfo.board_id = h->board_id;
	if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
		return -EFAULT;
	return 0;
}

static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
{
	DriverVer_type DriverVer;
	unsigned char vmaj, vmin, vsubmin;
	int rc;

	rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
		&vmaj, &vmin, &vsubmin);
	if (rc != 3) {
		dev_info(&h->pdev->dev, "driver version string '%s' "
			"unrecognized.", HPSA_DRIVER_VERSION);
		vmaj = 0;
		vmin = 0;
		vsubmin = 0;
	}
	DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
	if (!argp)
		return -EINVAL;
	if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
		return -EFAULT;
	return 0;
}

static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
{
	IOCTL_Command_struct iocommand;
	struct CommandList *c;
	char *buff = NULL;
4884
	u64 temp64;
4885
	int rc = 0;
4886 4887 4888 4889 4890 4891 4892 4893 4894 4895 4896 4897 4898 4899 4900

	if (!argp)
		return -EINVAL;
	if (!capable(CAP_SYS_RAWIO))
		return -EPERM;
	if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
		return -EFAULT;
	if ((iocommand.buf_size < 1) &&
	    (iocommand.Request.Type.Direction != XFER_NONE)) {
		return -EINVAL;
	}
	if (iocommand.buf_size > 0) {
		buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
		if (buff == NULL)
			return -EFAULT;
4901
		if (iocommand.Request.Type.Direction & XFER_WRITE) {
4902 4903 4904
			/* Copy the data into the buffer we created */
			if (copy_from_user(buff, iocommand.buf,
				iocommand.buf_size)) {
4905 4906
				rc = -EFAULT;
				goto out_kfree;
4907 4908 4909
			}
		} else {
			memset(buff, 0, iocommand.buf_size);
4910
		}
4911
	}
4912
	c = cmd_alloc(h);
4913
	if (c == NULL) {
4914 4915
		rc = -ENOMEM;
		goto out_kfree;
4916 4917 4918 4919 4920 4921 4922
	}
	/* Fill in the command type */
	c->cmd_type = CMD_IOCTL_PEND;
	/* Fill in Command Header */
	c->Header.ReplyQueue = 0; /* unused in simple mode */
	if (iocommand.buf_size > 0) {	/* buffer to fill */
		c->Header.SGList = 1;
4923
		c->Header.SGTotal = cpu_to_le16(1);
4924 4925
	} else	{ /* no buffers to fill */
		c->Header.SGList = 0;
4926
		c->Header.SGTotal = cpu_to_le16(0);
4927 4928 4929 4930 4931 4932 4933 4934 4935
	}
	memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));

	/* Fill in Request block */
	memcpy(&c->Request, &iocommand.Request,
		sizeof(c->Request));

	/* Fill in the scatter gather information */
	if (iocommand.buf_size > 0) {
4936
		temp64 = pci_map_single(h->pdev, buff,
4937
			iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
4938 4939 4940
		if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
			c->SG[0].Addr = cpu_to_le64(0);
			c->SG[0].Len = cpu_to_le32(0);
4941 4942 4943
			rc = -ENOMEM;
			goto out;
		}
4944 4945 4946
		c->SG[0].Addr = cpu_to_le64(temp64);
		c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
		c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
4947
	}
4948
	hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
4949 4950
	if (iocommand.buf_size > 0)
		hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
4951 4952 4953 4954 4955 4956
	check_ioctl_unit_attention(h, c);

	/* Copy the error information out */
	memcpy(&iocommand.error_info, c->err_info,
		sizeof(iocommand.error_info));
	if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
4957 4958
		rc = -EFAULT;
		goto out;
4959
	}
4960
	if ((iocommand.Request.Type.Direction & XFER_READ) &&
4961
		iocommand.buf_size > 0) {
4962 4963
		/* Copy the data out of the buffer we created */
		if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
4964 4965
			rc = -EFAULT;
			goto out;
4966 4967
		}
	}
4968
out:
4969
	cmd_free(h, c);
4970 4971 4972
out_kfree:
	kfree(buff);
	return rc;
4973 4974 4975 4976 4977 4978 4979 4980
}

static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
{
	BIG_IOCTL_Command_struct *ioc;
	struct CommandList *c;
	unsigned char **buff = NULL;
	int *buff_size = NULL;
4981
	u64 temp64;
4982 4983
	BYTE sg_used = 0;
	int status = 0;
4984 4985
	u32 left;
	u32 sz;
4986 4987 4988 4989 4990 4991 4992 4993 4994 4995 4996 4997 4998 4999 5000 5001 5002 5003 5004 5005 5006 5007 5008 5009 5010 5011
	BYTE __user *data_ptr;

	if (!argp)
		return -EINVAL;
	if (!capable(CAP_SYS_RAWIO))
		return -EPERM;
	ioc = (BIG_IOCTL_Command_struct *)
	    kmalloc(sizeof(*ioc), GFP_KERNEL);
	if (!ioc) {
		status = -ENOMEM;
		goto cleanup1;
	}
	if (copy_from_user(ioc, argp, sizeof(*ioc))) {
		status = -EFAULT;
		goto cleanup1;
	}
	if ((ioc->buf_size < 1) &&
	    (ioc->Request.Type.Direction != XFER_NONE)) {
		status = -EINVAL;
		goto cleanup1;
	}
	/* Check kmalloc limits  using all SGs */
	if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
		status = -EINVAL;
		goto cleanup1;
	}
5012
	if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
5013 5014 5015
		status = -EINVAL;
		goto cleanup1;
	}
5016
	buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
5017 5018 5019 5020
	if (!buff) {
		status = -ENOMEM;
		goto cleanup1;
	}
5021
	buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
5022 5023 5024 5025 5026 5027 5028 5029 5030 5031 5032 5033 5034 5035
	if (!buff_size) {
		status = -ENOMEM;
		goto cleanup1;
	}
	left = ioc->buf_size;
	data_ptr = ioc->buf;
	while (left) {
		sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
		buff_size[sg_used] = sz;
		buff[sg_used] = kmalloc(sz, GFP_KERNEL);
		if (buff[sg_used] == NULL) {
			status = -ENOMEM;
			goto cleanup1;
		}
5036
		if (ioc->Request.Type.Direction & XFER_WRITE) {
5037
			if (copy_from_user(buff[sg_used], data_ptr, sz)) {
5038
				status = -EFAULT;
5039 5040 5041 5042 5043 5044 5045 5046
				goto cleanup1;
			}
		} else
			memset(buff[sg_used], 0, sz);
		left -= sz;
		data_ptr += sz;
		sg_used++;
	}
5047
	c = cmd_alloc(h);
5048 5049 5050 5051 5052 5053
	if (c == NULL) {
		status = -ENOMEM;
		goto cleanup1;
	}
	c->cmd_type = CMD_IOCTL_PEND;
	c->Header.ReplyQueue = 0;
5054 5055
	c->Header.SGList = (u8) sg_used;
	c->Header.SGTotal = cpu_to_le16(sg_used);
5056 5057 5058 5059 5060
	memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
	memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
	if (ioc->buf_size > 0) {
		int i;
		for (i = 0; i < sg_used; i++) {
5061
			temp64 = pci_map_single(h->pdev, buff[i],
5062
				    buff_size[i], PCI_DMA_BIDIRECTIONAL);
5063 5064 5065 5066
			if (dma_mapping_error(&h->pdev->dev,
							(dma_addr_t) temp64)) {
				c->SG[i].Addr = cpu_to_le64(0);
				c->SG[i].Len = cpu_to_le32(0);
5067 5068 5069
				hpsa_pci_unmap(h->pdev, c, i,
					PCI_DMA_BIDIRECTIONAL);
				status = -ENOMEM;
5070
				goto cleanup0;
5071
			}
5072 5073 5074
			c->SG[i].Addr = cpu_to_le64(temp64);
			c->SG[i].Len = cpu_to_le32(buff_size[i]);
			c->SG[i].Ext = cpu_to_le32(0);
5075
		}
5076
		c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
5077
	}
5078
	hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
5079 5080
	if (sg_used)
		hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
5081 5082 5083 5084 5085
	check_ioctl_unit_attention(h, c);
	/* Copy the error information out */
	memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
	if (copy_to_user(argp, ioc, sizeof(*ioc))) {
		status = -EFAULT;
5086
		goto cleanup0;
5087
	}
5088
	if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
D
Don Brace 已提交
5089 5090
		int i;

5091 5092 5093 5094 5095
		/* Copy the data out of the buffer we created */
		BYTE __user *ptr = ioc->buf;
		for (i = 0; i < sg_used; i++) {
			if (copy_to_user(ptr, buff[i], buff_size[i])) {
				status = -EFAULT;
5096
				goto cleanup0;
5097 5098 5099 5100 5101
			}
			ptr += buff_size[i];
		}
	}
	status = 0;
5102
cleanup0:
5103
	cmd_free(h, c);
5104 5105
cleanup1:
	if (buff) {
D
Don Brace 已提交
5106 5107
		int i;

5108 5109 5110 5111 5112 5113 5114 5115 5116 5117 5118 5119 5120 5121 5122 5123
		for (i = 0; i < sg_used; i++)
			kfree(buff[i]);
		kfree(buff);
	}
	kfree(buff_size);
	kfree(ioc);
	return status;
}

static void check_ioctl_unit_attention(struct ctlr_info *h,
	struct CommandList *c)
{
	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
			c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
		(void) check_for_unit_attention(h, c);
}
5124

5125 5126 5127
/*
 * ioctl
 */
D
Don Brace 已提交
5128
static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5129 5130 5131
{
	struct ctlr_info *h;
	void __user *argp = (void __user *)arg;
5132
	int rc;
5133 5134 5135 5136 5137 5138 5139

	h = sdev_to_hba(dev);

	switch (cmd) {
	case CCISS_DEREGDISK:
	case CCISS_REGNEWDISK:
	case CCISS_REGNEWD:
5140
		hpsa_scan_start(h->scsi_host);
5141 5142 5143 5144 5145 5146
		return 0;
	case CCISS_GETPCIINFO:
		return hpsa_getpciinfo_ioctl(h, argp);
	case CCISS_GETDRIVVER:
		return hpsa_getdrivver_ioctl(h, argp);
	case CCISS_PASSTHRU:
5147
		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
5148 5149
			return -EAGAIN;
		rc = hpsa_passthru_ioctl(h, argp);
5150
		atomic_inc(&h->passthru_cmds_avail);
5151
		return rc;
5152
	case CCISS_BIG_PASSTHRU:
5153
		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
5154 5155
			return -EAGAIN;
		rc = hpsa_big_passthru_ioctl(h, argp);
5156
		atomic_inc(&h->passthru_cmds_avail);
5157
		return rc;
5158 5159 5160 5161 5162
	default:
		return -ENOTTY;
	}
}

5163 5164
static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
				u8 reset_type)
5165 5166 5167 5168 5169 5170
{
	struct CommandList *c;

	c = cmd_alloc(h);
	if (!c)
		return -ENOMEM;
5171 5172
	/* fill_cmd can't fail here, no data buffer to map */
	(void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
5173 5174 5175 5176 5177 5178 5179 5180 5181 5182 5183
		RAID_CTLR_LUNID, TYPE_MSG);
	c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
	c->waiting = NULL;
	enqueue_cmd_and_start_io(h, c);
	/* Don't wait for completion, the reset won't complete.  Don't free
	 * the command either.  This is the last command we will send before
	 * re-initializing everything, so it doesn't matter and won't leak.
	 */
	return 0;
}

5184
static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
5185
	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
5186 5187 5188
	int cmd_type)
{
	int pci_dir = XFER_NONE;
5189
	struct CommandList *a; /* for commands to be aborted */
5190 5191 5192 5193 5194

	c->cmd_type = CMD_IOCTL_PEND;
	c->Header.ReplyQueue = 0;
	if (buff != NULL && size > 0) {
		c->Header.SGList = 1;
5195
		c->Header.SGTotal = cpu_to_le16(1);
5196 5197
	} else {
		c->Header.SGList = 0;
5198
		c->Header.SGTotal = cpu_to_le16(0);
5199 5200 5201 5202 5203 5204 5205
	}
	memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);

	if (cmd_type == TYPE_CMD) {
		switch (cmd) {
		case HPSA_INQUIRY:
			/* are we trying to read a vital product page */
5206
			if (page_code & VPD_PAGE) {
5207
				c->Request.CDB[1] = 0x01;
5208
				c->Request.CDB[2] = (page_code & 0xff);
5209 5210
			}
			c->Request.CDBLen = 6;
5211 5212
			c->Request.type_attr_dir =
				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5213 5214 5215 5216 5217 5218 5219 5220 5221 5222
			c->Request.Timeout = 0;
			c->Request.CDB[0] = HPSA_INQUIRY;
			c->Request.CDB[4] = size & 0xFF;
			break;
		case HPSA_REPORT_LOG:
		case HPSA_REPORT_PHYS:
			/* Talking to controller so It's a physical command
			   mode = 00 target = 0.  Nothing to write.
			 */
			c->Request.CDBLen = 12;
5223 5224
			c->Request.type_attr_dir =
				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5225 5226 5227 5228 5229 5230 5231 5232 5233
			c->Request.Timeout = 0;
			c->Request.CDB[0] = cmd;
			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
			c->Request.CDB[7] = (size >> 16) & 0xFF;
			c->Request.CDB[8] = (size >> 8) & 0xFF;
			c->Request.CDB[9] = size & 0xFF;
			break;
		case HPSA_CACHE_FLUSH:
			c->Request.CDBLen = 12;
5234 5235 5236
			c->Request.type_attr_dir =
					TYPE_ATTR_DIR(cmd_type,
						ATTR_SIMPLE, XFER_WRITE);
5237 5238 5239
			c->Request.Timeout = 0;
			c->Request.CDB[0] = BMIC_WRITE;
			c->Request.CDB[6] = BMIC_CACHE_FLUSH;
5240 5241
			c->Request.CDB[7] = (size >> 8) & 0xFF;
			c->Request.CDB[8] = size & 0xFF;
5242 5243 5244
			break;
		case TEST_UNIT_READY:
			c->Request.CDBLen = 6;
5245 5246
			c->Request.type_attr_dir =
				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5247 5248
			c->Request.Timeout = 0;
			break;
5249 5250
		case HPSA_GET_RAID_MAP:
			c->Request.CDBLen = 12;
5251 5252
			c->Request.type_attr_dir =
				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5253 5254 5255 5256 5257 5258 5259 5260
			c->Request.Timeout = 0;
			c->Request.CDB[0] = HPSA_CISS_READ;
			c->Request.CDB[1] = cmd;
			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
			c->Request.CDB[7] = (size >> 16) & 0xFF;
			c->Request.CDB[8] = (size >> 8) & 0xFF;
			c->Request.CDB[9] = size & 0xFF;
			break;
5261 5262
		case BMIC_SENSE_CONTROLLER_PARAMETERS:
			c->Request.CDBLen = 10;
5263 5264
			c->Request.type_attr_dir =
				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5265 5266 5267 5268 5269 5270
			c->Request.Timeout = 0;
			c->Request.CDB[0] = BMIC_READ;
			c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
			c->Request.CDB[7] = (size >> 16) & 0xFF;
			c->Request.CDB[8] = (size >> 8) & 0xFF;
			break;
5271 5272 5273 5274 5275 5276 5277 5278 5279 5280
		case BMIC_IDENTIFY_PHYSICAL_DEVICE:
			c->Request.CDBLen = 10;
			c->Request.type_attr_dir =
				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
			c->Request.Timeout = 0;
			c->Request.CDB[0] = BMIC_READ;
			c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
			c->Request.CDB[7] = (size >> 16) & 0xFF;
			c->Request.CDB[8] = (size >> 8) & 0XFF;
			break;
5281 5282 5283
		default:
			dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
			BUG();
5284
			return -1;
5285 5286 5287 5288 5289 5290
		}
	} else if (cmd_type == TYPE_MSG) {
		switch (cmd) {

		case  HPSA_DEVICE_RESET_MSG:
			c->Request.CDBLen = 16;
5291 5292
			c->Request.type_attr_dir =
				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5293
			c->Request.Timeout = 0; /* Don't time out */
5294 5295
			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
			c->Request.CDB[0] =  cmd;
5296
			c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
5297 5298 5299 5300 5301 5302
			/* If bytes 4-7 are zero, it means reset the */
			/* LunID device */
			c->Request.CDB[4] = 0x00;
			c->Request.CDB[5] = 0x00;
			c->Request.CDB[6] = 0x00;
			c->Request.CDB[7] = 0x00;
5303 5304 5305
			break;
		case  HPSA_ABORT_MSG:
			a = buff;       /* point to command to be aborted */
D
Don Brace 已提交
5306 5307
			dev_dbg(&h->pdev->dev,
				"Abort Tag:0x%016llx request Tag:0x%016llx",
5308
				a->Header.tag, c->Header.tag);
5309
			c->Request.CDBLen = 16;
5310 5311 5312
			c->Request.type_attr_dir =
					TYPE_ATTR_DIR(cmd_type,
						ATTR_SIMPLE, XFER_WRITE);
5313 5314 5315 5316 5317 5318
			c->Request.Timeout = 0; /* Don't time out */
			c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
			c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
			c->Request.CDB[2] = 0x00; /* reserved */
			c->Request.CDB[3] = 0x00; /* reserved */
			/* Tag to abort goes in CDB[4]-CDB[11] */
D
Don Brace 已提交
5319 5320
			memcpy(&c->Request.CDB[4], &a->Header.tag,
				sizeof(a->Header.tag));
5321 5322 5323 5324
			c->Request.CDB[12] = 0x00; /* reserved */
			c->Request.CDB[13] = 0x00; /* reserved */
			c->Request.CDB[14] = 0x00; /* reserved */
			c->Request.CDB[15] = 0x00; /* reserved */
5325 5326 5327 5328 5329 5330 5331 5332 5333 5334 5335
		break;
		default:
			dev_warn(&h->pdev->dev, "unknown message type %d\n",
				cmd);
			BUG();
		}
	} else {
		dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
		BUG();
	}

5336
	switch (GET_DIR(c->Request.type_attr_dir)) {
5337 5338 5339 5340 5341 5342 5343 5344 5345 5346 5347 5348
	case XFER_READ:
		pci_dir = PCI_DMA_FROMDEVICE;
		break;
	case XFER_WRITE:
		pci_dir = PCI_DMA_TODEVICE;
		break;
	case XFER_NONE:
		pci_dir = PCI_DMA_NONE;
		break;
	default:
		pci_dir = PCI_DMA_BIDIRECTIONAL;
	}
5349 5350 5351
	if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
		return -1;
	return 0;
5352 5353 5354 5355 5356 5357 5358 5359 5360
}

/*
 * Map (physical) PCI mem into (virtual) kernel space
 */
static void __iomem *remap_pci_mem(ulong base, ulong size)
{
	ulong page_base = ((ulong) base) & PAGE_MASK;
	ulong page_offs = ((ulong) base) - page_base;
5361 5362
	void __iomem *page_remapped = ioremap_nocache(page_base,
		page_offs + size);
5363 5364 5365 5366

	return page_remapped ? (page_remapped + page_offs) : NULL;
}

5367
static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
5368
{
5369
	return h->access.command_completed(h, q);
5370 5371
}

5372
static inline bool interrupt_pending(struct ctlr_info *h)
5373 5374 5375 5376 5377 5378
{
	return h->access.intr_pending(h);
}

static inline long interrupt_not_for_us(struct ctlr_info *h)
{
5379 5380
	return (h->access.intr_pending(h) == 0) ||
		(h->interrupts_enabled == 0);
5381 5382
}

5383 5384
static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
	u32 raw_tag)
5385 5386 5387 5388 5389 5390 5391 5392
{
	if (unlikely(tag_index >= h->nr_cmds)) {
		dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
		return 1;
	}
	return 0;
}

5393
static inline void finish_cmd(struct CommandList *c)
5394
{
5395
	dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
5396 5397
	if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
			|| c->cmd_type == CMD_IOACCEL2))
5398
		complete_scsi_command(c);
5399 5400
	else if (c->cmd_type == CMD_IOCTL_PEND)
		complete(c->waiting);
5401 5402
}

5403 5404

static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
5405
{
5406 5407
#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
#define HPSA_SIMPLE_ERROR_BITS 0x03
5408
	if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
5409 5410
		return tag & ~HPSA_SIMPLE_ERROR_BITS;
	return tag & ~HPSA_PERF_ERROR_BITS;
5411 5412
}

5413
/* process completion of an indexed ("direct lookup") command */
5414
static inline void process_indexed_cmd(struct ctlr_info *h,
5415 5416 5417 5418 5419
	u32 raw_tag)
{
	u32 tag_index;
	struct CommandList *c;

5420
	tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
5421 5422 5423 5424
	if (!bad_tag(h, tag_index, raw_tag)) {
		c = h->cmd_pool + tag_index;
		finish_cmd(c);
	}
5425 5426
}

5427 5428 5429 5430 5431 5432 5433 5434 5435 5436 5437 5438 5439 5440 5441 5442 5443 5444 5445
/* Some controllers, like p400, will give us one interrupt
 * after a soft reset, even if we turned interrupts off.
 * Only need to check for this in the hpsa_xxx_discard_completions
 * functions.
 */
static int ignore_bogus_interrupt(struct ctlr_info *h)
{
	if (likely(!reset_devices))
		return 0;

	if (likely(h->interrupts_enabled))
		return 0;

	dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
		"(known firmware bug.)  Ignoring.\n");

	return 1;
}

5446 5447 5448 5449 5450 5451
/*
 * Convert &h->q[x] (passed to interrupt handlers) back to h.
 * Relies on (h-q[x] == x) being true for x such that
 * 0 <= x < MAX_REPLY_QUEUES.
 */
static struct ctlr_info *queue_to_hba(u8 *queue)
5452
{
5453 5454 5455 5456 5457 5458 5459
	return container_of((queue - *queue), struct ctlr_info, q[0]);
}

static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
{
	struct ctlr_info *h = queue_to_hba(queue);
	u8 q = *(u8 *) queue;
5460 5461 5462 5463 5464 5465 5466
	u32 raw_tag;

	if (ignore_bogus_interrupt(h))
		return IRQ_NONE;

	if (interrupt_not_for_us(h))
		return IRQ_NONE;
5467
	h->last_intr_timestamp = get_jiffies_64();
5468
	while (interrupt_pending(h)) {
5469
		raw_tag = get_next_completion(h, q);
5470
		while (raw_tag != FIFO_EMPTY)
5471
			raw_tag = next_command(h, q);
5472 5473 5474 5475
	}
	return IRQ_HANDLED;
}

5476
static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
5477
{
5478
	struct ctlr_info *h = queue_to_hba(queue);
5479
	u32 raw_tag;
5480
	u8 q = *(u8 *) queue;
5481 5482 5483 5484

	if (ignore_bogus_interrupt(h))
		return IRQ_NONE;

5485
	h->last_intr_timestamp = get_jiffies_64();
5486
	raw_tag = get_next_completion(h, q);
5487
	while (raw_tag != FIFO_EMPTY)
5488
		raw_tag = next_command(h, q);
5489 5490 5491
	return IRQ_HANDLED;
}

5492
static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
5493
{
5494
	struct ctlr_info *h = queue_to_hba((u8 *) queue);
5495
	u32 raw_tag;
5496
	u8 q = *(u8 *) queue;
5497 5498 5499

	if (interrupt_not_for_us(h))
		return IRQ_NONE;
5500
	h->last_intr_timestamp = get_jiffies_64();
5501
	while (interrupt_pending(h)) {
5502
		raw_tag = get_next_completion(h, q);
5503
		while (raw_tag != FIFO_EMPTY) {
5504
			process_indexed_cmd(h, raw_tag);
5505
			raw_tag = next_command(h, q);
5506 5507 5508 5509 5510
		}
	}
	return IRQ_HANDLED;
}

5511
static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
5512
{
5513
	struct ctlr_info *h = queue_to_hba(queue);
5514
	u32 raw_tag;
5515
	u8 q = *(u8 *) queue;
5516

5517
	h->last_intr_timestamp = get_jiffies_64();
5518
	raw_tag = get_next_completion(h, q);
5519
	while (raw_tag != FIFO_EMPTY) {
5520
		process_indexed_cmd(h, raw_tag);
5521
		raw_tag = next_command(h, q);
5522 5523 5524 5525
	}
	return IRQ_HANDLED;
}

5526 5527 5528 5529
/* Send a message CDB to the firmware. Careful, this only works
 * in simple mode, not performant mode due to the tag lookup.
 * We only ever use this immediately after a controller reset.
 */
5530 5531
static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
			unsigned char type)
5532 5533 5534 5535 5536 5537 5538 5539 5540 5541
{
	struct Command {
		struct CommandListHeader CommandHeader;
		struct RequestBlock Request;
		struct ErrDescriptor ErrorDescriptor;
	};
	struct Command *cmd;
	static const size_t cmd_sz = sizeof(*cmd) +
					sizeof(cmd->ErrorDescriptor);
	dma_addr_t paddr64;
D
Don Brace 已提交
5542 5543
	__le32 paddr32;
	u32 tag;
5544 5545 5546 5547 5548 5549 5550 5551 5552 5553 5554 5555 5556 5557
	void __iomem *vaddr;
	int i, err;

	vaddr = pci_ioremap_bar(pdev, 0);
	if (vaddr == NULL)
		return -ENOMEM;

	/* The Inbound Post Queue only accepts 32-bit physical addresses for the
	 * CCISS commands, so they must be allocated from the lower 4GiB of
	 * memory.
	 */
	err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
	if (err) {
		iounmap(vaddr);
5558
		return err;
5559 5560 5561 5562 5563 5564 5565 5566 5567 5568 5569 5570
	}

	cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
	if (cmd == NULL) {
		iounmap(vaddr);
		return -ENOMEM;
	}

	/* This must fit, because of the 32-bit consistent DMA mask.  Also,
	 * although there's no guarantee, we assume that the address is at
	 * least 4-byte aligned (most likely, it's page-aligned).
	 */
D
Don Brace 已提交
5571
	paddr32 = cpu_to_le32(paddr64);
5572 5573 5574

	cmd->CommandHeader.ReplyQueue = 0;
	cmd->CommandHeader.SGList = 0;
5575
	cmd->CommandHeader.SGTotal = cpu_to_le16(0);
D
Don Brace 已提交
5576
	cmd->CommandHeader.tag = cpu_to_le64(paddr64);
5577 5578 5579
	memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);

	cmd->Request.CDBLen = 16;
5580 5581
	cmd->Request.type_attr_dir =
			TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
5582 5583 5584 5585
	cmd->Request.Timeout = 0; /* Don't time out */
	cmd->Request.CDB[0] = opcode;
	cmd->Request.CDB[1] = type;
	memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
5586
	cmd->ErrorDescriptor.Addr =
D
Don Brace 已提交
5587
			cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
5588
	cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
5589

D
Don Brace 已提交
5590
	writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
5591 5592 5593

	for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
		tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
D
Don Brace 已提交
5594
		if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
5595 5596 5597 5598 5599 5600 5601 5602 5603 5604 5605 5606 5607 5608 5609 5610 5611 5612 5613 5614 5615 5616 5617 5618 5619 5620 5621 5622 5623 5624
			break;
		msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
	}

	iounmap(vaddr);

	/* we leak the DMA buffer here ... no choice since the controller could
	 *  still complete the command.
	 */
	if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
		dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
			opcode, type);
		return -ETIMEDOUT;
	}

	pci_free_consistent(pdev, cmd_sz, cmd, paddr64);

	if (tag & HPSA_ERROR_BIT) {
		dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
			opcode, type);
		return -EIO;
	}

	dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
		opcode, type);
	return 0;
}

#define hpsa_noop(p) hpsa_message(p, 3, 0)

5625
static int hpsa_controller_hard_reset(struct pci_dev *pdev,
D
Don Brace 已提交
5626
	void __iomem *vaddr, u32 use_doorbell)
5627 5628 5629 5630 5631 5632 5633 5634
{

	if (use_doorbell) {
		/* For everything after the P600, the PCI power state method
		 * of resetting the controller doesn't work, so we have this
		 * other way using the doorbell register.
		 */
		dev_info(&pdev->dev, "using doorbell to reset controller\n");
5635
		writel(use_doorbell, vaddr + SA5_DOORBELL);
5636

5637
		/* PMC hardware guys tell us we need a 10 second delay after
5638 5639 5640 5641
		 * doorbell reset and before any attempt to talk to the board
		 * at all to ensure that this actually works and doesn't fall
		 * over in some weird corner cases.
		 */
5642
		msleep(10000);
5643 5644 5645 5646 5647 5648 5649 5650 5651
	} else { /* Try to do it the PCI power state way */

		/* Quoting from the Open CISS Specification: "The Power
		 * Management Control/Status Register (CSR) controls the power
		 * state of the device.  The normal operating state is D0,
		 * CSR=00h.  The software off state is D3, CSR=03h.  To reset
		 * the controller, place the interface device in D3 then to D0,
		 * this causes a secondary PCI reset which will reset the
		 * controller." */
5652 5653 5654

		int rc = 0;

5655
		dev_info(&pdev->dev, "using PCI PM to reset controller\n");
5656

5657
		/* enter the D3hot power management state */
5658 5659 5660
		rc = pci_set_power_state(pdev, PCI_D3hot);
		if (rc)
			return rc;
5661 5662 5663 5664

		msleep(500);

		/* enter the D0 power management state */
5665 5666 5667
		rc = pci_set_power_state(pdev, PCI_D0);
		if (rc)
			return rc;
5668 5669 5670 5671 5672 5673 5674

		/*
		 * The P600 requires a small delay when changing states.
		 * Otherwise we may think the board did not reset and we bail.
		 * This for kdump only and is particular to the P600.
		 */
		msleep(500);
5675 5676 5677 5678
	}
	return 0;
}

5679
static void init_driver_version(char *driver_version, int len)
5680 5681
{
	memset(driver_version, 0, len);
5682
	strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
5683 5684
}

5685
static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
5686 5687 5688 5689 5690 5691 5692 5693 5694 5695 5696 5697 5698 5699 5700
{
	char *driver_version;
	int i, size = sizeof(cfgtable->driver_version);

	driver_version = kmalloc(size, GFP_KERNEL);
	if (!driver_version)
		return -ENOMEM;

	init_driver_version(driver_version, size);
	for (i = 0; i < size; i++)
		writeb(driver_version[i], &cfgtable->driver_version[i]);
	kfree(driver_version);
	return 0;
}

5701 5702
static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
					  unsigned char *driver_ver)
5703 5704 5705 5706 5707 5708 5709
{
	int i;

	for (i = 0; i < sizeof(cfgtable->driver_version); i++)
		driver_ver[i] = readb(&cfgtable->driver_version[i]);
}

5710
static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
5711 5712 5713 5714 5715 5716 5717 5718 5719 5720 5721 5722 5723 5724 5725 5726 5727 5728 5729
{

	char *driver_ver, *old_driver_ver;
	int rc, size = sizeof(cfgtable->driver_version);

	old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
	if (!old_driver_ver)
		return -ENOMEM;
	driver_ver = old_driver_ver + size;

	/* After a reset, the 32 bytes of "driver version" in the cfgtable
	 * should have been changed, otherwise we know the reset failed.
	 */
	init_driver_version(old_driver_ver, size);
	read_driver_ver_from_cfgtable(cfgtable, driver_ver);
	rc = !memcmp(driver_ver, old_driver_ver, size);
	kfree(old_driver_ver);
	return rc;
}
5730
/* This does a hard reset of the controller using PCI power management
5731
 * states or the using the doorbell register.
5732
 */
5733
static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
5734
{
5735 5736 5737 5738 5739
	u64 cfg_offset;
	u32 cfg_base_addr;
	u64 cfg_base_addr_index;
	void __iomem *vaddr;
	unsigned long paddr;
5740
	u32 misc_fw_support;
5741
	int rc;
5742
	struct CfgTable __iomem *cfgtable;
5743
	u32 use_doorbell;
5744
	u32 board_id;
5745
	u16 command_register;
5746

5747 5748
	/* For controllers as old as the P600, this is very nearly
	 * the same thing as
5749 5750 5751 5752 5753 5754
	 *
	 * pci_save_state(pci_dev);
	 * pci_set_power_state(pci_dev, PCI_D3hot);
	 * pci_set_power_state(pci_dev, PCI_D0);
	 * pci_restore_state(pci_dev);
	 *
5755 5756 5757
	 * For controllers newer than the P600, the pci power state
	 * method of resetting doesn't work so we have another way
	 * using the doorbell register.
5758
	 */
5759

5760
	rc = hpsa_lookup_board_id(pdev, &board_id);
5761 5762 5763 5764 5765 5766
	if (rc < 0) {
		dev_warn(&pdev->dev, "Board ID not found\n");
		return rc;
	}
	if (!ctlr_is_resettable(board_id)) {
		dev_warn(&pdev->dev, "Controller not resettable\n");
5767 5768
		return -ENODEV;
	}
5769 5770 5771 5772

	/* if controller is soft- but not hard resettable... */
	if (!ctlr_is_hard_resettable(board_id))
		return -ENOTSUPP; /* try soft reset later. */
5773

5774 5775 5776
	/* Save the PCI command register */
	pci_read_config_word(pdev, 4, &command_register);
	pci_save_state(pdev);
5777

5778 5779 5780 5781 5782 5783 5784
	/* find the first memory BAR, so we can find the cfg table */
	rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
	if (rc)
		return rc;
	vaddr = remap_pci_mem(paddr, 0x250);
	if (!vaddr)
		return -ENOMEM;
5785

5786 5787 5788 5789 5790 5791 5792 5793 5794 5795 5796
	/* find cfgtable in order to check if reset via doorbell is supported */
	rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
					&cfg_base_addr_index, &cfg_offset);
	if (rc)
		goto unmap_vaddr;
	cfgtable = remap_pci_mem(pci_resource_start(pdev,
		       cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
	if (!cfgtable) {
		rc = -ENOMEM;
		goto unmap_vaddr;
	}
5797 5798
	rc = write_driver_ver_to_cfgtable(cfgtable);
	if (rc)
5799
		goto unmap_cfgtable;
5800

5801 5802 5803
	/* If reset via doorbell register is supported, use that.
	 * There are two such methods.  Favor the newest method.
	 */
5804
	misc_fw_support = readl(&cfgtable->misc_fw_support);
5805 5806 5807 5808 5809 5810
	use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
	if (use_doorbell) {
		use_doorbell = DOORBELL_CTLR_RESET2;
	} else {
		use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
		if (use_doorbell) {
5811 5812
			dev_warn(&pdev->dev,
				"Soft reset not supported. Firmware update is required.\n");
5813
			rc = -ENOTSUPP; /* try soft reset */
5814 5815 5816
			goto unmap_cfgtable;
		}
	}
5817

5818 5819 5820
	rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
	if (rc)
		goto unmap_cfgtable;
5821

5822 5823
	pci_restore_state(pdev);
	pci_write_config_word(pdev, 4, command_register);
5824

5825 5826 5827 5828
	/* Some devices (notably the HP Smart Array 5i Controller)
	   need a little pause here */
	msleep(HPSA_POST_RESET_PAUSE_MSECS);

5829 5830 5831
	rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
	if (rc) {
		dev_warn(&pdev->dev,
5832
			"Failed waiting for board to become ready after hard reset\n");
5833 5834 5835
		goto unmap_cfgtable;
	}

5836 5837 5838 5839
	rc = controller_reset_failed(vaddr);
	if (rc < 0)
		goto unmap_cfgtable;
	if (rc) {
5840 5841 5842
		dev_warn(&pdev->dev, "Unable to successfully reset "
			"controller. Will try soft reset.\n");
		rc = -ENOTSUPP;
5843
	} else {
5844
		dev_info(&pdev->dev, "board ready after hard reset.\n");
5845 5846 5847 5848 5849 5850 5851 5852
	}

unmap_cfgtable:
	iounmap(cfgtable);

unmap_vaddr:
	iounmap(vaddr);
	return rc;
5853 5854 5855 5856 5857 5858 5859
}

/*
 *  We cannot read the structure directly, for portability we must use
 *   the io functions.
 *   This is for debug only.
 */
D
Don Brace 已提交
5860
static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
5861
{
5862
#ifdef HPSA_DEBUG
5863 5864 5865 5866 5867 5868 5869 5870 5871 5872 5873 5874 5875 5876 5877 5878 5879 5880 5881 5882
	int i;
	char temp_name[17];

	dev_info(dev, "Controller Configuration information\n");
	dev_info(dev, "------------------------------------\n");
	for (i = 0; i < 4; i++)
		temp_name[i] = readb(&(tb->Signature[i]));
	temp_name[4] = '\0';
	dev_info(dev, "   Signature = %s\n", temp_name);
	dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
	dev_info(dev, "   Transport methods supported = 0x%x\n",
	       readl(&(tb->TransportSupport)));
	dev_info(dev, "   Transport methods active = 0x%x\n",
	       readl(&(tb->TransportActive)));
	dev_info(dev, "   Requested transport Method = 0x%x\n",
	       readl(&(tb->HostWrite.TransportRequest)));
	dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
	       readl(&(tb->HostWrite.CoalIntDelay)));
	dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
	       readl(&(tb->HostWrite.CoalIntCount)));
5883
	dev_info(dev, "   Max outstanding commands = %d\n",
5884 5885 5886 5887 5888 5889 5890 5891 5892
	       readl(&(tb->CmdsOutMax)));
	dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
	for (i = 0; i < 16; i++)
		temp_name[i] = readb(&(tb->ServerName[i]));
	temp_name[16] = '\0';
	dev_info(dev, "   Server Name = %s\n", temp_name);
	dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
		readl(&(tb->HeartBeat)));
#endif				/* HPSA_DEBUG */
5893
}
5894 5895 5896 5897 5898 5899 5900 5901 5902 5903 5904 5905 5906 5907 5908 5909 5910 5911 5912 5913 5914 5915 5916 5917 5918 5919 5920 5921 5922 5923 5924 5925 5926 5927 5928 5929 5930

static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
{
	int i, offset, mem_type, bar_type;

	if (pci_bar_addr == PCI_BASE_ADDRESS_0)	/* looking for BAR zero? */
		return 0;
	offset = 0;
	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
		bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
		if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
			offset += 4;
		else {
			mem_type = pci_resource_flags(pdev, i) &
			    PCI_BASE_ADDRESS_MEM_TYPE_MASK;
			switch (mem_type) {
			case PCI_BASE_ADDRESS_MEM_TYPE_32:
			case PCI_BASE_ADDRESS_MEM_TYPE_1M:
				offset += 4;	/* 32 bit */
				break;
			case PCI_BASE_ADDRESS_MEM_TYPE_64:
				offset += 8;
				break;
			default:	/* reserved in PCI 2.2 */
				dev_warn(&pdev->dev,
				       "base address is invalid\n");
				return -1;
				break;
			}
		}
		if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
			return i + 1;
	}
	return -1;
}

/* If MSI/MSI-X is supported by the kernel we will try to enable it on
5931
 * controllers that are capable. If not, we use legacy INTx mode.
5932 5933
 */

5934
static void hpsa_interrupt_mode(struct ctlr_info *h)
5935 5936
{
#ifdef CONFIG_PCI_MSI
5937 5938 5939 5940 5941 5942 5943
	int err, i;
	struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];

	for (i = 0; i < MAX_REPLY_QUEUES; i++) {
		hpsa_msix_entries[i].vector = 0;
		hpsa_msix_entries[i].entry = i;
	}
5944 5945

	/* Some boards advertise MSI but don't really support it */
5946 5947
	if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
	    (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
5948
		goto default_int_mode;
5949
	if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
5950
		dev_info(&h->pdev->dev, "MSI-X capable controller\n");
5951
		h->msix_vector = MAX_REPLY_QUEUES;
5952 5953
		if (h->msix_vector > num_online_cpus())
			h->msix_vector = num_online_cpus();
5954 5955 5956 5957 5958 5959 5960
		err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
					    1, h->msix_vector);
		if (err < 0) {
			dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
			h->msix_vector = 0;
			goto single_msi_mode;
		} else if (err < h->msix_vector) {
5961
			dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
5962 5963
			       "available\n", err);
		}
5964 5965 5966 5967
		h->msix_vector = err;
		for (i = 0; i < h->msix_vector; i++)
			h->intr[i] = hpsa_msix_entries[i].vector;
		return;
5968
	}
5969
single_msi_mode:
5970
	if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
5971
		dev_info(&h->pdev->dev, "MSI capable controller\n");
5972
		if (!pci_enable_msi(h->pdev))
5973 5974
			h->msi_vector = 1;
		else
5975
			dev_warn(&h->pdev->dev, "MSI init failed\n");
5976 5977 5978 5979
	}
default_int_mode:
#endif				/* CONFIG_PCI_MSI */
	/* if we get here we're going to use the default interrupt mode */
5980
	h->intr[h->intr_mode] = h->pdev->irq;
5981 5982
}

5983
static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
5984 5985 5986 5987 5988 5989 5990 5991 5992 5993 5994 5995 5996
{
	int i;
	u32 subsystem_vendor_id, subsystem_device_id;

	subsystem_vendor_id = pdev->subsystem_vendor;
	subsystem_device_id = pdev->subsystem_device;
	*board_id = ((subsystem_device_id << 16) & 0xffff0000) |
		    subsystem_vendor_id;

	for (i = 0; i < ARRAY_SIZE(products); i++)
		if (*board_id == products[i].board_id)
			return i;

5997 5998 5999
	if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
		subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
		!hpsa_allow_any) {
6000 6001 6002 6003 6004 6005 6006
		dev_warn(&pdev->dev, "unrecognized board ID: "
			"0x%08x, ignoring.\n", *board_id);
			return -ENODEV;
	}
	return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
}

6007 6008
static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
				    unsigned long *memory_bar)
6009 6010 6011 6012
{
	int i;

	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
6013
		if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
6014
			/* addressing mode bits already removed */
6015 6016
			*memory_bar = pci_resource_start(pdev, i);
			dev_dbg(&pdev->dev, "memory BAR = %lx\n",
6017 6018 6019
				*memory_bar);
			return 0;
		}
6020
	dev_warn(&pdev->dev, "no memory BAR found\n");
6021 6022 6023
	return -ENODEV;
}

6024 6025
static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
				     int wait_for_ready)
6026
{
6027
	int i, iterations;
6028
	u32 scratchpad;
6029 6030 6031 6032
	if (wait_for_ready)
		iterations = HPSA_BOARD_READY_ITERATIONS;
	else
		iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
6033

6034 6035 6036 6037 6038 6039 6040 6041 6042
	for (i = 0; i < iterations; i++) {
		scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
		if (wait_for_ready) {
			if (scratchpad == HPSA_FIRMWARE_READY)
				return 0;
		} else {
			if (scratchpad != HPSA_FIRMWARE_READY)
				return 0;
		}
6043 6044
		msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
	}
6045
	dev_warn(&pdev->dev, "board not ready, timed out.\n");
6046 6047 6048
	return -ENODEV;
}

6049 6050 6051
static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
			       u64 *cfg_offset)
6052 6053 6054 6055 6056 6057 6058 6059 6060 6061 6062 6063
{
	*cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
	*cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
	*cfg_base_addr &= (u32) 0x0000ffff;
	*cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
	if (*cfg_base_addr_index == -1) {
		dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
		return -ENODEV;
	}
	return 0;
}

6064
static int hpsa_find_cfgtables(struct ctlr_info *h)
6065
{
6066 6067 6068
	u64 cfg_offset;
	u32 cfg_base_addr;
	u64 cfg_base_addr_index;
6069
	u32 trans_offset;
6070
	int rc;
6071

6072 6073 6074 6075
	rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
		&cfg_base_addr_index, &cfg_offset);
	if (rc)
		return rc;
6076
	h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
6077
		       cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
6078 6079
	if (!h->cfgtable) {
		dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
6080
		return -ENOMEM;
6081
	}
6082 6083 6084
	rc = write_driver_ver_to_cfgtable(h->cfgtable);
	if (rc)
		return rc;
6085
	/* Find performant mode table. */
6086
	trans_offset = readl(&h->cfgtable->TransMethodOffset);
6087 6088 6089 6090 6091 6092 6093 6094
	h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
				cfg_base_addr_index)+cfg_offset+trans_offset,
				sizeof(*h->transtable));
	if (!h->transtable)
		return -ENOMEM;
	return 0;
}

6095
static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
6096 6097
{
	h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
6098 6099 6100 6101 6102

	/* Limit commands in memory limited kdump scenario. */
	if (reset_devices && h->max_commands > 32)
		h->max_commands = 32;

6103 6104 6105 6106 6107 6108 6109 6110 6111
	if (h->max_commands < 16) {
		dev_warn(&h->pdev->dev, "Controller reports "
			"max supported commands of %d, an obvious lie. "
			"Using 16.  Ensure that firmware is up to date.\n",
			h->max_commands);
		h->max_commands = 16;
	}
}

6112 6113 6114 6115 6116 6117 6118 6119 6120
/* If the controller reports that the total max sg entries is greater than 512,
 * then we know that chained SG blocks work.  (Original smart arrays did not
 * support chained SG blocks and would return zero for max sg entries.)
 */
static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
{
	return h->maxsgentries > 512;
}

6121 6122 6123 6124
/* Interrogate the hardware for some limits:
 * max commands, max SG elements without chaining, and with chaining,
 * SG chain block size, etc.
 */
6125
static void hpsa_find_board_params(struct ctlr_info *h)
6126
{
6127
	hpsa_get_max_perf_mode_cmds(h);
6128
	h->nr_cmds = h->max_commands;
6129
	h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
6130
	h->fw_support = readl(&(h->cfgtable->misc_fw_support));
6131 6132
	if (hpsa_supports_chained_sg_blocks(h)) {
		/* Limit in-command s/g elements to 32 save dma'able memory. */
6133
		h->max_cmd_sg_entries = 32;
6134
		h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
6135 6136
		h->maxsgentries--; /* save one for chain pointer */
	} else {
6137 6138 6139 6140 6141 6142
		/*
		 * Original smart arrays supported at most 31 s/g entries
		 * embedded inline in the command (trying to use more
		 * would lock up the controller)
		 */
		h->max_cmd_sg_entries = 31;
6143
		h->maxsgentries = 31; /* default to traditional values */
6144
		h->chainsize = 0;
6145
	}
6146 6147 6148

	/* Find out what task management functions are supported and cache */
	h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
6149 6150 6151 6152
	if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
		dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
	if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
		dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
6153 6154
}

6155 6156
static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
{
A
Akinobu Mita 已提交
6157
	if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
6158
		dev_err(&h->pdev->dev, "not a valid CISS config table\n");
6159 6160 6161 6162 6163
		return false;
	}
	return true;
}

6164
static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
6165
{
6166
	u32 driver_support;
6167

6168
	driver_support = readl(&(h->cfgtable->driver_support));
A
Arnd Bergmann 已提交
6169 6170
	/* Need to enable prefetch in the SCSI core for 6400 in x86 */
#ifdef CONFIG_X86
6171
	driver_support |= ENABLE_SCSI_PREFETCH;
6172
#endif
6173 6174
	driver_support |= ENABLE_UNIT_ATTN;
	writel(driver_support, &(h->cfgtable->driver_support));
6175 6176
}

6177 6178 6179 6180 6181 6182 6183 6184 6185 6186 6187 6188 6189 6190
/* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
 * in a prefetch beyond physical memory.
 */
static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
{
	u32 dma_prefetch;

	if (h->board_id != 0x3225103C)
		return;
	dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
	dma_prefetch |= 0x8000;
	writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
}

6191 6192 6193 6194 6195 6196 6197 6198 6199 6200 6201 6202 6203 6204 6205 6206 6207
static void hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
{
	int i;
	u32 doorbell_value;
	unsigned long flags;
	/* wait until the clear_event_notify bit 6 is cleared by controller. */
	for (i = 0; i < MAX_CONFIG_WAIT; i++) {
		spin_lock_irqsave(&h->lock, flags);
		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
		spin_unlock_irqrestore(&h->lock, flags);
		if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
			break;
		/* delay and try again */
		msleep(20);
	}
}

6208
static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
6209 6210
{
	int i;
6211 6212
	u32 doorbell_value;
	unsigned long flags;
6213 6214 6215 6216 6217 6218

	/* under certain very rare conditions, this can take awhile.
	 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
	 * as we enter this code.)
	 */
	for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6219 6220 6221
		spin_lock_irqsave(&h->lock, flags);
		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
		spin_unlock_irqrestore(&h->lock, flags);
D
Dan Carpenter 已提交
6222
		if (!(doorbell_value & CFGTBL_ChangeReq))
6223 6224
			break;
		/* delay and try again */
6225
		usleep_range(10000, 20000);
6226
	}
6227 6228
}

6229
static int hpsa_enter_simple_mode(struct ctlr_info *h)
6230 6231 6232 6233 6234 6235 6236 6237
{
	u32 trans_support;

	trans_support = readl(&(h->cfgtable->TransportSupport));
	if (!(trans_support & SIMPLE_MODE))
		return -ENOTSUPP;

	h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
6238

6239 6240
	/* Update the field, and then ring the doorbell */
	writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
6241
	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
6242 6243
	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
	hpsa_wait_for_mode_change_ack(h);
6244
	print_cfg_table(&h->pdev->dev, h->cfgtable);
6245 6246
	if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
		goto error;
6247
	h->transMethod = CFGTBL_Trans_Simple;
6248
	return 0;
6249
error:
6250
	dev_err(&h->pdev->dev, "failed to enter simple mode\n");
6251
	return -ENODEV;
6252 6253
}

6254
static int hpsa_pci_init(struct ctlr_info *h)
6255
{
6256
	int prod_index, err;
6257

6258 6259
	prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
	if (prod_index < 0)
6260
		return prod_index;
6261 6262
	h->product_name = products[prod_index].product_name;
	h->access = *(products[prod_index].access);
6263

M
Matthew Garrett 已提交
6264 6265 6266
	pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
			       PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);

6267
	err = pci_enable_device(h->pdev);
6268
	if (err) {
6269
		dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
6270 6271 6272
		return err;
	}

6273
	err = pci_request_regions(h->pdev, HPSA);
6274
	if (err) {
6275 6276
		dev_err(&h->pdev->dev,
			"cannot obtain PCI resources, aborting\n");
6277 6278
		return err;
	}
6279 6280 6281

	pci_set_master(h->pdev);

6282
	hpsa_interrupt_mode(h);
6283
	err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
6284
	if (err)
6285 6286
		goto err_out_free_res;
	h->vaddr = remap_pci_mem(h->paddr, 0x250);
6287 6288 6289 6290
	if (!h->vaddr) {
		err = -ENOMEM;
		goto err_out_free_res;
	}
6291
	err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
6292
	if (err)
6293
		goto err_out_free_res;
6294 6295
	err = hpsa_find_cfgtables(h);
	if (err)
6296
		goto err_out_free_res;
6297
	hpsa_find_board_params(h);
6298

6299
	if (!hpsa_CISS_signature_present(h)) {
6300 6301 6302
		err = -ENODEV;
		goto err_out_free_res;
	}
6303
	hpsa_set_driver_support_bits(h);
6304
	hpsa_p600_dma_prefetch_quirk(h);
6305 6306
	err = hpsa_enter_simple_mode(h);
	if (err)
6307 6308 6309 6310
		goto err_out_free_res;
	return 0;

err_out_free_res:
6311 6312 6313 6314 6315 6316
	if (h->transtable)
		iounmap(h->transtable);
	if (h->cfgtable)
		iounmap(h->cfgtable);
	if (h->vaddr)
		iounmap(h->vaddr);
6317
	pci_disable_device(h->pdev);
6318
	pci_release_regions(h->pdev);
6319 6320 6321
	return err;
}

6322
static void hpsa_hba_inquiry(struct ctlr_info *h)
6323 6324 6325 6326 6327 6328 6329 6330 6331 6332 6333 6334 6335 6336 6337
{
	int rc;

#define HBA_INQUIRY_BYTE_COUNT 64
	h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
	if (!h->hba_inquiry_data)
		return;
	rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
		h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
	if (rc != 0) {
		kfree(h->hba_inquiry_data);
		h->hba_inquiry_data = NULL;
	}
}

6338
static int hpsa_init_reset_devices(struct pci_dev *pdev)
6339
{
6340
	int rc, i;
6341
	void __iomem *vaddr;
6342 6343 6344 6345

	if (!reset_devices)
		return 0;

6346 6347 6348 6349 6350 6351 6352 6353 6354 6355 6356 6357 6358 6359 6360 6361
	/* kdump kernel is loading, we don't know in which state is
	 * the pci interface. The dev->enable_cnt is equal zero
	 * so we call enable+disable, wait a while and switch it on.
	 */
	rc = pci_enable_device(pdev);
	if (rc) {
		dev_warn(&pdev->dev, "Failed to enable PCI device\n");
		return -ENODEV;
	}
	pci_disable_device(pdev);
	msleep(260);			/* a randomly chosen number */
	rc = pci_enable_device(pdev);
	if (rc) {
		dev_warn(&pdev->dev, "failed to enable device.\n");
		return -ENODEV;
	}
6362

6363
	pci_set_master(pdev);
6364

6365 6366 6367 6368 6369 6370 6371 6372
	vaddr = pci_ioremap_bar(pdev, 0);
	if (vaddr == NULL) {
		rc = -ENOMEM;
		goto out_disable;
	}
	writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
	iounmap(vaddr);

6373 6374
	/* Reset the controller with a PCI power-cycle or via doorbell */
	rc = hpsa_kdump_hard_reset_controller(pdev);
6375

6376 6377
	/* -ENOTSUPP here means we cannot reset the controller
	 * but it's already (and still) up and running in
6378 6379
	 * "performant mode".  Or, it might be 640x, which can't reset
	 * due to concerns about shared bbwc between 6402/6404 pair.
6380
	 */
6381
	if (rc)
6382
		goto out_disable;
6383 6384

	/* Now try to get the controller to respond to a no-op */
6385
	dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
6386 6387 6388 6389 6390 6391 6392
	for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
		if (hpsa_noop(pdev) == 0)
			break;
		else
			dev_warn(&pdev->dev, "no-op failed%s\n",
					(i < 11 ? "; re-trying" : ""));
	}
6393 6394 6395 6396 6397

out_disable:

	pci_disable_device(pdev);
	return rc;
6398 6399
}

6400
static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
6401 6402 6403 6404 6405 6406 6407 6408 6409 6410 6411 6412 6413 6414
{
	h->cmd_pool_bits = kzalloc(
		DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
		sizeof(unsigned long), GFP_KERNEL);
	h->cmd_pool = pci_alloc_consistent(h->pdev,
		    h->nr_cmds * sizeof(*h->cmd_pool),
		    &(h->cmd_pool_dhandle));
	h->errinfo_pool = pci_alloc_consistent(h->pdev,
		    h->nr_cmds * sizeof(*h->errinfo_pool),
		    &(h->errinfo_pool_dhandle));
	if ((h->cmd_pool_bits == NULL)
	    || (h->cmd_pool == NULL)
	    || (h->errinfo_pool == NULL)) {
		dev_err(&h->pdev->dev, "out of memory in %s", __func__);
6415
		goto clean_up;
6416 6417
	}
	return 0;
6418 6419 6420
clean_up:
	hpsa_free_cmd_pool(h);
	return -ENOMEM;
6421 6422 6423 6424 6425 6426 6427 6428 6429
}

static void hpsa_free_cmd_pool(struct ctlr_info *h)
{
	kfree(h->cmd_pool_bits);
	if (h->cmd_pool)
		pci_free_consistent(h->pdev,
			    h->nr_cmds * sizeof(struct CommandList),
			    h->cmd_pool, h->cmd_pool_dhandle);
6430 6431 6432 6433
	if (h->ioaccel2_cmd_pool)
		pci_free_consistent(h->pdev,
			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
			h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
6434 6435 6436 6437 6438
	if (h->errinfo_pool)
		pci_free_consistent(h->pdev,
			    h->nr_cmds * sizeof(struct ErrorInfo),
			    h->errinfo_pool,
			    h->errinfo_pool_dhandle);
6439 6440 6441 6442
	if (h->ioaccel_cmd_pool)
		pci_free_consistent(h->pdev,
			h->nr_cmds * sizeof(struct io_accel1_cmd),
			h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
6443 6444
}

6445 6446
static void hpsa_irq_affinity_hints(struct ctlr_info *h)
{
6447
	int i, cpu;
6448 6449 6450

	cpu = cpumask_first(cpu_online_mask);
	for (i = 0; i < h->msix_vector; i++) {
6451
		irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
6452 6453 6454 6455
		cpu = cpumask_next(cpu, cpu_online_mask);
	}
}

6456 6457 6458 6459 6460 6461 6462 6463 6464 6465 6466 6467 6468 6469 6470 6471 6472
/* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
static void hpsa_free_irqs(struct ctlr_info *h)
{
	int i;

	if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
		/* Single reply queue, only one irq to free */
		i = h->intr_mode;
		irq_set_affinity_hint(h->intr[i], NULL);
		free_irq(h->intr[i], &h->q[i]);
		return;
	}

	for (i = 0; i < h->msix_vector; i++) {
		irq_set_affinity_hint(h->intr[i], NULL);
		free_irq(h->intr[i], &h->q[i]);
	}
6473 6474
	for (; i < MAX_REPLY_QUEUES; i++)
		h->q[i] = 0;
6475 6476
}

6477 6478
/* returns 0 on success; cleans up and returns -Enn on error */
static int hpsa_request_irqs(struct ctlr_info *h,
6479 6480 6481
	irqreturn_t (*msixhandler)(int, void *),
	irqreturn_t (*intxhandler)(int, void *))
{
6482
	int rc, i;
6483

6484 6485 6486 6487 6488 6489 6490
	/*
	 * initialize h->q[x] = x so that interrupt handlers know which
	 * queue to process.
	 */
	for (i = 0; i < MAX_REPLY_QUEUES; i++)
		h->q[i] = (u8) i;

6491
	if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
6492
		/* If performant mode and MSI-X, use multiple reply queues */
6493
		for (i = 0; i < h->msix_vector; i++) {
6494 6495 6496
			rc = request_irq(h->intr[i], msixhandler,
					0, h->devname,
					&h->q[i]);
6497 6498 6499 6500 6501 6502 6503 6504 6505 6506 6507 6508 6509 6510 6511
			if (rc) {
				int j;

				dev_err(&h->pdev->dev,
					"failed to get irq %d for %s\n",
				       h->intr[i], h->devname);
				for (j = 0; j < i; j++) {
					free_irq(h->intr[j], &h->q[j]);
					h->q[j] = 0;
				}
				for (; j < MAX_REPLY_QUEUES; j++)
					h->q[j] = 0;
				return rc;
			}
		}
6512
		hpsa_irq_affinity_hints(h);
6513 6514
	} else {
		/* Use single reply pool */
6515
		if (h->msix_vector > 0 || h->msi_vector) {
6516 6517 6518 6519 6520 6521 6522 6523 6524
			rc = request_irq(h->intr[h->intr_mode],
				msixhandler, 0, h->devname,
				&h->q[h->intr_mode]);
		} else {
			rc = request_irq(h->intr[h->intr_mode],
				intxhandler, IRQF_SHARED, h->devname,
				&h->q[h->intr_mode]);
		}
	}
6525 6526 6527 6528 6529 6530 6531 6532
	if (rc) {
		dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
		       h->intr[h->intr_mode], h->devname);
		return -ENODEV;
	}
	return 0;
}

6533
static int hpsa_kdump_soft_reset(struct ctlr_info *h)
6534 6535 6536 6537 6538 6539 6540 6541 6542 6543 6544 6545 6546 6547 6548 6549 6550 6551 6552 6553 6554 6555 6556
{
	if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
		HPSA_RESET_TYPE_CONTROLLER)) {
		dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
		return -EIO;
	}

	dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
	if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
		dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
		return -1;
	}

	dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
	if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
		dev_warn(&h->pdev->dev, "Board failed to become ready "
			"after soft reset.\n");
		return -1;
	}

	return 0;
}

6557
static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
6558
{
6559
	hpsa_free_irqs(h);
6560
#ifdef CONFIG_PCI_MSI
6561 6562 6563 6564 6565 6566 6567
	if (h->msix_vector) {
		if (h->pdev->msix_enabled)
			pci_disable_msix(h->pdev);
	} else if (h->msi_vector) {
		if (h->pdev->msi_enabled)
			pci_disable_msi(h->pdev);
	}
6568
#endif /* CONFIG_PCI_MSI */
6569 6570
}

6571 6572 6573 6574 6575 6576 6577 6578 6579 6580 6581 6582 6583 6584
static void hpsa_free_reply_queues(struct ctlr_info *h)
{
	int i;

	for (i = 0; i < h->nreply_queues; i++) {
		if (!h->reply_queue[i].head)
			continue;
		pci_free_consistent(h->pdev, h->reply_queue_size,
			h->reply_queue[i].head, h->reply_queue[i].busaddr);
		h->reply_queue[i].head = NULL;
		h->reply_queue[i].busaddr = 0;
	}
}

6585 6586 6587
static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
{
	hpsa_free_irqs_and_disable_msix(h);
6588 6589
	hpsa_free_sg_chain_blocks(h);
	hpsa_free_cmd_pool(h);
6590
	kfree(h->ioaccel1_blockFetchTable);
6591
	kfree(h->blockFetchTable);
6592
	hpsa_free_reply_queues(h);
6593 6594 6595 6596 6597 6598
	if (h->vaddr)
		iounmap(h->vaddr);
	if (h->transtable)
		iounmap(h->transtable);
	if (h->cfgtable)
		iounmap(h->cfgtable);
6599
	pci_disable_device(h->pdev);
6600 6601 6602 6603
	pci_release_regions(h->pdev);
	kfree(h);
}

6604
/* Called when controller lockup detected. */
6605
static void fail_all_outstanding_cmds(struct ctlr_info *h)
6606
{
6607 6608
	int i, refcount;
	struct CommandList *c;
6609

6610
	flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
6611 6612
	for (i = 0; i < h->nr_cmds; i++) {
		c = h->cmd_pool + i;
6613 6614 6615 6616 6617 6618
		refcount = atomic_inc_return(&c->refcount);
		if (refcount > 1) {
			c->err_info->CommandStatus = CMD_HARDWARE_ERR;
			finish_cmd(c);
		}
		cmd_free(h, c);
6619 6620 6621
	}
}

6622 6623 6624 6625 6626 6627 6628 6629 6630 6631 6632 6633 6634 6635
static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
{
	int i, cpu;

	cpu = cpumask_first(cpu_online_mask);
	for (i = 0; i < num_online_cpus(); i++) {
		u32 *lockup_detected;
		lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
		*lockup_detected = value;
		cpu = cpumask_next(cpu, cpu_online_mask);
	}
	wmb(); /* be sure the per-cpu variables are out to memory */
}

6636 6637 6638
static void controller_lockup_detected(struct ctlr_info *h)
{
	unsigned long flags;
6639
	u32 lockup_detected;
6640 6641 6642

	h->access.set_intr_mask(h, HPSA_INTR_OFF);
	spin_lock_irqsave(&h->lock, flags);
6643 6644 6645 6646 6647 6648 6649 6650
	lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
	if (!lockup_detected) {
		/* no heartbeat, but controller gave us a zero. */
		dev_warn(&h->pdev->dev,
			"lockup detected but scratchpad register is zero\n");
		lockup_detected = 0xffffffff;
	}
	set_lockup_detected_for_all_cpus(h, lockup_detected);
6651 6652
	spin_unlock_irqrestore(&h->lock, flags);
	dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
6653
			lockup_detected);
6654
	pci_disable_device(h->pdev);
6655
	fail_all_outstanding_cmds(h);
6656 6657 6658 6659 6660 6661 6662 6663 6664 6665 6666
}

static void detect_controller_lockup(struct ctlr_info *h)
{
	u64 now;
	u32 heartbeat;
	unsigned long flags;

	now = get_jiffies_64();
	/* If we've received an interrupt recently, we're ok. */
	if (time_after64(h->last_intr_timestamp +
6667
				(h->heartbeat_sample_interval), now))
6668 6669 6670 6671 6672 6673 6674 6675
		return;

	/*
	 * If we've already checked the heartbeat recently, we're ok.
	 * This could happen if someone sends us a signal. We
	 * otherwise don't care about signals in this thread.
	 */
	if (time_after64(h->last_heartbeat_timestamp +
6676
				(h->heartbeat_sample_interval), now))
6677 6678 6679 6680 6681 6682 6683 6684 6685 6686 6687 6688 6689 6690 6691 6692
		return;

	/* If heartbeat has not changed since we last looked, we're not ok. */
	spin_lock_irqsave(&h->lock, flags);
	heartbeat = readl(&h->cfgtable->HeartBeat);
	spin_unlock_irqrestore(&h->lock, flags);
	if (h->last_heartbeat == heartbeat) {
		controller_lockup_detected(h);
		return;
	}

	/* We're ok. */
	h->last_heartbeat = heartbeat;
	h->last_heartbeat_timestamp = now;
}

6693
static void hpsa_ack_ctlr_events(struct ctlr_info *h)
6694 6695 6696 6697
{
	int i;
	char *event_type;

6698 6699 6700
	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
		return;

6701
	/* Ask the controller to clear the events we're handling. */
6702 6703
	if ((h->transMethod & (CFGTBL_Trans_io_accel1
			| CFGTBL_Trans_io_accel2)) &&
6704 6705 6706 6707 6708 6709 6710 6711 6712 6713 6714
		(h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
		 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {

		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
			event_type = "state change";
		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
			event_type = "configuration change";
		/* Stop sending new RAID offload reqs via the IO accelerator */
		scsi_block_requests(h->scsi_host);
		for (i = 0; i < h->ndevices; i++)
			h->dev[i]->offload_enabled = 0;
6715
		hpsa_drain_accel_commands(h);
6716 6717 6718 6719 6720 6721 6722 6723 6724 6725 6726 6727 6728 6729 6730 6731 6732 6733 6734 6735
		/* Set 'accelerator path config change' bit */
		dev_warn(&h->pdev->dev,
			"Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
			h->events, event_type);
		writel(h->events, &(h->cfgtable->clear_event_notify));
		/* Set the "clear event notify field update" bit 6 */
		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
		/* Wait until ctlr clears 'clear event notify field', bit 6 */
		hpsa_wait_for_clear_event_notify_ack(h);
		scsi_unblock_requests(h->scsi_host);
	} else {
		/* Acknowledge controller notification events. */
		writel(h->events, &(h->cfgtable->clear_event_notify));
		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
		hpsa_wait_for_clear_event_notify_ack(h);
#if 0
		writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
		hpsa_wait_for_mode_change_ack(h);
#endif
	}
6736
	return;
6737 6738 6739 6740
}

/* Check a register on the controller to see if there are configuration
 * changes (added/changed/removed logical drives, etc.) which mean that
6741 6742
 * we should rescan the controller for devices.
 * Also check flag for driver-initiated rescan.
6743
 */
6744
static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
6745 6746
{
	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
6747
		return 0;
6748 6749

	h->events = readl(&(h->cfgtable->event_notify));
6750 6751
	return h->events & RESCAN_REQUIRED_EVENT_BITS;
}
6752

6753 6754 6755 6756 6757 6758 6759 6760 6761 6762 6763 6764 6765 6766
/*
 * Check if any of the offline devices have become ready
 */
static int hpsa_offline_devices_ready(struct ctlr_info *h)
{
	unsigned long flags;
	struct offline_device_entry *d;
	struct list_head *this, *tmp;

	spin_lock_irqsave(&h->offline_device_lock, flags);
	list_for_each_safe(this, tmp, &h->offline_device_list) {
		d = list_entry(this, struct offline_device_entry,
				offline_list);
		spin_unlock_irqrestore(&h->offline_device_lock, flags);
6767 6768 6769 6770
		if (!hpsa_volume_offline(h, d->scsi3addr)) {
			spin_lock_irqsave(&h->offline_device_lock, flags);
			list_del(&d->offline_list);
			spin_unlock_irqrestore(&h->offline_device_lock, flags);
6771
			return 1;
6772
		}
6773 6774 6775 6776
		spin_lock_irqsave(&h->offline_device_lock, flags);
	}
	spin_unlock_irqrestore(&h->offline_device_lock, flags);
	return 0;
6777 6778
}

6779

6780
static void hpsa_monitor_ctlr_worker(struct work_struct *work)
6781 6782
{
	unsigned long flags;
6783 6784 6785
	struct ctlr_info *h = container_of(to_delayed_work(work),
					struct ctlr_info, monitor_ctlr_work);
	detect_controller_lockup(h);
6786
	if (lockup_detected(h))
6787
		return;
6788 6789 6790 6791 6792 6793 6794 6795

	if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
		scsi_host_get(h->scsi_host);
		hpsa_ack_ctlr_events(h);
		hpsa_scan_start(h->scsi_host);
		scsi_host_put(h->scsi_host);
	}

6796 6797 6798
	spin_lock_irqsave(&h->lock, flags);
	if (h->remove_in_progress) {
		spin_unlock_irqrestore(&h->lock, flags);
6799 6800
		return;
	}
6801 6802 6803
	schedule_delayed_work(&h->monitor_ctlr_work,
				h->heartbeat_sample_interval);
	spin_unlock_irqrestore(&h->lock, flags);
6804 6805
}

6806
static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
6807
{
6808
	int dac, rc;
6809
	struct ctlr_info *h;
6810 6811
	int try_soft_reset = 0;
	unsigned long flags;
6812 6813 6814 6815

	if (number_of_controllers == 0)
		printk(KERN_INFO DRIVER_NAME "\n");

6816
	rc = hpsa_init_reset_devices(pdev);
6817 6818 6819 6820 6821 6822 6823 6824 6825 6826 6827 6828 6829
	if (rc) {
		if (rc != -ENOTSUPP)
			return rc;
		/* If the reset fails in a particular way (it has no way to do
		 * a proper hard reset, so returns -ENOTSUPP) we can try to do
		 * a soft reset once we get the controller configured up to the
		 * point that it can accept a command.
		 */
		try_soft_reset = 1;
		rc = 0;
	}

reinit_after_soft_reset:
6830

6831 6832 6833 6834 6835
	/* Command structures must be aligned on a 32-byte boundary because
	 * the 5 lower bits of the address are used by the hardware. and by
	 * the driver.  See comments in hpsa.h for more info.
	 */
	BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
6836 6837
	h = kzalloc(sizeof(*h), GFP_KERNEL);
	if (!h)
6838
		return -ENOMEM;
6839

6840
	h->pdev = pdev;
6841
	h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
6842
	INIT_LIST_HEAD(&h->offline_device_list);
6843
	spin_lock_init(&h->lock);
6844
	spin_lock_init(&h->offline_device_lock);
6845
	spin_lock_init(&h->scan_lock);
6846
	atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
6847

6848 6849 6850 6851 6852 6853
	h->resubmit_wq = alloc_workqueue("hpsa", WQ_MEM_RECLAIM, 0);
	if (!h->resubmit_wq) {
		dev_err(&h->pdev->dev, "Failed to allocate work queue\n");
		rc = -ENOMEM;
		goto clean1;
	}
6854 6855
	/* Allocate and clear per-cpu variable lockup_detected */
	h->lockup_detected = alloc_percpu(u32);
6856 6857
	if (!h->lockup_detected) {
		rc = -ENOMEM;
6858
		goto clean1;
6859
	}
6860 6861
	set_lockup_detected_for_all_cpus(h, 0);

6862
	rc = hpsa_pci_init(h);
6863
	if (rc != 0)
6864 6865
		goto clean1;

6866
	sprintf(h->devname, HPSA "%d", number_of_controllers);
6867 6868 6869 6870
	h->ctlr = number_of_controllers;
	number_of_controllers++;

	/* configure PCI DMA stuff */
6871 6872
	rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
	if (rc == 0) {
6873
		dac = 1;
6874 6875 6876 6877 6878 6879 6880 6881
	} else {
		rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
		if (rc == 0) {
			dac = 0;
		} else {
			dev_err(&pdev->dev, "no suitable DMA available\n");
			goto clean1;
		}
6882 6883 6884 6885
	}

	/* make sure the board interrupts are off */
	h->access.set_intr_mask(h, HPSA_INTR_OFF);
6886

6887
	if (hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
6888
		goto clean2;
6889 6890
	dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
	       h->devname, pdev->device,
6891
	       h->intr[h->intr_mode], dac ? "" : " not");
6892 6893 6894
	rc = hpsa_allocate_cmd_pool(h);
	if (rc)
		goto clean2_and_free_irqs;
6895 6896
	if (hpsa_allocate_sg_chain_blocks(h))
		goto clean4;
6897 6898
	init_waitqueue_head(&h->scan_wait_queue);
	h->scan_finished = 1; /* no scan currently in progress */
6899 6900

	pci_set_drvdata(pdev, h);
6901
	h->ndevices = 0;
6902
	h->hba_mode_enabled = 0;
6903 6904
	h->scsi_host = NULL;
	spin_lock_init(&h->devlock);
6905 6906 6907 6908 6909 6910 6911 6912 6913 6914 6915 6916 6917 6918 6919 6920 6921 6922
	hpsa_put_ctlr_into_performant_mode(h);

	/* At this point, the controller is ready to take commands.
	 * Now, if reset_devices and the hard reset didn't work, try
	 * the soft reset and see if that works.
	 */
	if (try_soft_reset) {

		/* This is kind of gross.  We may or may not get a completion
		 * from the soft reset command, and if we do, then the value
		 * from the fifo may or may not be valid.  So, we wait 10 secs
		 * after the reset throwing away any completions we get during
		 * that time.  Unregister the interrupt handler and register
		 * fake ones to scoop up any residual completions.
		 */
		spin_lock_irqsave(&h->lock, flags);
		h->access.set_intr_mask(h, HPSA_INTR_OFF);
		spin_unlock_irqrestore(&h->lock, flags);
6923
		hpsa_free_irqs(h);
6924
		rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
6925 6926
					hpsa_intx_discard_completions);
		if (rc) {
6927 6928
			dev_warn(&h->pdev->dev,
				"Failed to request_irq after soft reset.\n");
6929 6930 6931 6932 6933 6934 6935 6936 6937 6938 6939 6940 6941 6942 6943 6944 6945 6946 6947 6948 6949 6950 6951 6952 6953 6954 6955 6956 6957 6958 6959 6960
			goto clean4;
		}

		rc = hpsa_kdump_soft_reset(h);
		if (rc)
			/* Neither hard nor soft reset worked, we're hosed. */
			goto clean4;

		dev_info(&h->pdev->dev, "Board READY.\n");
		dev_info(&h->pdev->dev,
			"Waiting for stale completions to drain.\n");
		h->access.set_intr_mask(h, HPSA_INTR_ON);
		msleep(10000);
		h->access.set_intr_mask(h, HPSA_INTR_OFF);

		rc = controller_reset_failed(h->cfgtable);
		if (rc)
			dev_info(&h->pdev->dev,
				"Soft reset appears to have failed.\n");

		/* since the controller's reset, we have to go back and re-init
		 * everything.  Easiest to just forget what we've done and do it
		 * all over again.
		 */
		hpsa_undo_allocations_after_kdump_soft_reset(h);
		try_soft_reset = 0;
		if (rc)
			/* don't go to clean4, we already unallocated */
			return -ENODEV;

		goto reinit_after_soft_reset;
	}
6961

6962 6963
		/* Enable Accelerated IO path at driver layer */
		h->acciopath_status = 1;
6964

6965

6966 6967 6968
	/* Turn the interrupts on so we can service requests */
	h->access.set_intr_mask(h, HPSA_INTR_ON);

6969
	hpsa_hba_inquiry(h);
6970
	hpsa_register_scsi(h);	/* hook ourselves into SCSI subsystem */
6971 6972 6973 6974 6975 6976

	/* Monitor the controller for firmware lockups */
	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
	INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
	schedule_delayed_work(&h->monitor_ctlr_work,
				h->heartbeat_sample_interval);
6977
	return 0;
6978 6979

clean4:
6980
	hpsa_free_sg_chain_blocks(h);
6981
	hpsa_free_cmd_pool(h);
6982
clean2_and_free_irqs:
6983
	hpsa_free_irqs(h);
6984 6985
clean2:
clean1:
6986 6987
	if (h->resubmit_wq)
		destroy_workqueue(h->resubmit_wq);
6988 6989
	if (h->lockup_detected)
		free_percpu(h->lockup_detected);
6990
	kfree(h);
6991
	return rc;
6992 6993 6994 6995 6996 6997
}

static void hpsa_flush_cache(struct ctlr_info *h)
{
	char *flush_buf;
	struct CommandList *c;
6998 6999

	/* Don't bother trying to flush the cache if locked up */
7000
	if (unlikely(lockup_detected(h)))
7001
		return;
7002 7003 7004 7005
	flush_buf = kzalloc(4, GFP_KERNEL);
	if (!flush_buf)
		return;

7006
	c = cmd_alloc(h);
7007
	if (!c) {
7008
		dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
7009 7010
		goto out_of_memory;
	}
7011 7012 7013 7014
	if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
		RAID_CTLR_LUNID, TYPE_CMD)) {
		goto out;
	}
7015 7016
	hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
	if (c->err_info->CommandStatus != 0)
7017
out:
7018 7019
		dev_warn(&h->pdev->dev,
			"error flushing cache on controller\n");
7020
	cmd_free(h, c);
7021 7022 7023 7024 7025 7026 7027 7028 7029 7030 7031 7032 7033 7034 7035
out_of_memory:
	kfree(flush_buf);
}

static void hpsa_shutdown(struct pci_dev *pdev)
{
	struct ctlr_info *h;

	h = pci_get_drvdata(pdev);
	/* Turn board interrupts off  and send the flush cache command
	 * sendcmd will turn off interrupt, and send the flush...
	 * To write all data in the battery backed cache to disks
	 */
	hpsa_flush_cache(h);
	h->access.set_intr_mask(h, HPSA_INTR_OFF);
7036
	hpsa_free_irqs_and_disable_msix(h);
7037 7038
}

7039
static void hpsa_free_device_info(struct ctlr_info *h)
7040 7041 7042 7043 7044 7045 7046
{
	int i;

	for (i = 0; i < h->ndevices; i++)
		kfree(h->dev[i]);
}

7047
static void hpsa_remove_one(struct pci_dev *pdev)
7048 7049
{
	struct ctlr_info *h;
7050
	unsigned long flags;
7051 7052

	if (pci_get_drvdata(pdev) == NULL) {
7053
		dev_err(&pdev->dev, "unable to remove device\n");
7054 7055 7056
		return;
	}
	h = pci_get_drvdata(pdev);
7057 7058 7059 7060 7061 7062

	/* Get rid of any controller monitoring work items */
	spin_lock_irqsave(&h->lock, flags);
	h->remove_in_progress = 1;
	cancel_delayed_work(&h->monitor_ctlr_work);
	spin_unlock_irqrestore(&h->lock, flags);
7063 7064
	hpsa_unregister_scsi(h);	/* unhook from SCSI subsystem */
	hpsa_shutdown(pdev);
7065
	destroy_workqueue(h->resubmit_wq);
7066
	iounmap(h->vaddr);
7067 7068
	iounmap(h->transtable);
	iounmap(h->cfgtable);
7069
	hpsa_free_device_info(h);
7070
	hpsa_free_sg_chain_blocks(h);
7071 7072 7073 7074 7075 7076
	pci_free_consistent(h->pdev,
		h->nr_cmds * sizeof(struct CommandList),
		h->cmd_pool, h->cmd_pool_dhandle);
	pci_free_consistent(h->pdev,
		h->nr_cmds * sizeof(struct ErrorInfo),
		h->errinfo_pool, h->errinfo_pool_dhandle);
7077
	hpsa_free_reply_queues(h);
7078
	kfree(h->cmd_pool_bits);
7079
	kfree(h->blockFetchTable);
7080
	kfree(h->ioaccel1_blockFetchTable);
7081
	kfree(h->ioaccel2_blockFetchTable);
7082
	kfree(h->hba_inquiry_data);
7083
	pci_disable_device(pdev);
7084
	pci_release_regions(pdev);
7085
	free_percpu(h->lockup_detected);
7086 7087 7088 7089 7090 7091 7092 7093 7094 7095 7096 7097 7098 7099 7100
	kfree(h);
}

static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
	__attribute__((unused)) pm_message_t state)
{
	return -ENOSYS;
}

static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
{
	return -ENOSYS;
}

static struct pci_driver hpsa_pci_driver = {
7101
	.name = HPSA,
7102
	.probe = hpsa_init_one,
7103
	.remove = hpsa_remove_one,
7104 7105 7106 7107 7108 7109
	.id_table = hpsa_pci_device_id,	/* id_table */
	.shutdown = hpsa_shutdown,
	.suspend = hpsa_suspend,
	.resume = hpsa_resume,
};

7110 7111 7112 7113 7114 7115 7116 7117 7118 7119 7120 7121 7122
/* Fill in bucket_map[], given nsgs (the max number of
 * scatter gather elements supported) and bucket[],
 * which is an array of 8 integers.  The bucket[] array
 * contains 8 different DMA transfer sizes (in 16
 * byte increments) which the controller uses to fetch
 * commands.  This function fills in bucket_map[], which
 * maps a given number of scatter gather elements to one of
 * the 8 DMA transfer sizes.  The point of it is to allow the
 * controller to only do as much DMA as needed to fetch the
 * command, with the DMA transfer size encoded in the lower
 * bits of the command address.
 */
static void  calc_bucket_map(int bucket[], int num_buckets,
D
Don Brace 已提交
7123
	int nsgs, int min_blocks, u32 *bucket_map)
7124 7125 7126 7127 7128 7129
{
	int i, j, b, size;

	/* Note, bucket_map must have nsgs+1 entries. */
	for (i = 0; i <= nsgs; i++) {
		/* Compute size of a command with i SG entries */
7130
		size = i + min_blocks;
7131 7132
		b = num_buckets; /* Assume the biggest bucket */
		/* Find the bucket that is just big enough */
7133
		for (j = 0; j < num_buckets; j++) {
7134 7135 7136 7137 7138 7139 7140 7141 7142 7143
			if (bucket[j] >= size) {
				b = j;
				break;
			}
		}
		/* for a command with i SG entries, use bucket b. */
		bucket_map[i] = b;
	}
}

7144
static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
7145
{
7146 7147
	int i;
	unsigned long register_value;
7148 7149
	unsigned long transMethod = CFGTBL_Trans_Performant |
			(trans_support & CFGTBL_Trans_use_short_tags) |
7150 7151 7152
				CFGTBL_Trans_enable_directed_msix |
			(trans_support & (CFGTBL_Trans_io_accel1 |
				CFGTBL_Trans_io_accel2));
7153
	struct access_method access = SA5_performant_access;
7154 7155 7156 7157 7158 7159 7160 7161 7162 7163 7164

	/* This is a bit complicated.  There are 8 registers on
	 * the controller which we write to to tell it 8 different
	 * sizes of commands which there may be.  It's a way of
	 * reducing the DMA done to fetch each command.  Encoded into
	 * each command's tag are 3 bits which communicate to the controller
	 * which of the eight sizes that command fits within.  The size of
	 * each command depends on how many scatter gather entries there are.
	 * Each SG entry requires 16 bytes.  The eight registers are programmed
	 * with the number of 16-byte blocks a command of that size requires.
	 * The smallest command possible requires 5 such 16 byte blocks.
7165
	 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
7166 7167 7168 7169 7170 7171
	 * blocks.  Note, this only extends to the SG entries contained
	 * within the command block, and does not extend to chained blocks
	 * of SG elements.   bft[] contains the eight values we write to
	 * the registers.  They are not evenly distributed, but have more
	 * sizes for small commands, and fewer sizes for larger commands.
	 */
7172
	int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
7173 7174 7175 7176 7177 7178 7179 7180 7181 7182
#define MIN_IOACCEL2_BFT_ENTRY 5
#define HPSA_IOACCEL2_HEADER_SZ 4
	int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
			13, 14, 15, 16, 17, 18, 19,
			HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
	BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
	BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
				 16 * MIN_IOACCEL2_BFT_ENTRY);
	BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
7183
	BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
7184 7185 7186 7187 7188 7189
	/*  5 = 1 s/g entry or 4k
	 *  6 = 2 s/g entry or 8k
	 *  8 = 4 s/g entry or 16k
	 * 10 = 6 s/g entry or 24k
	 */

7190 7191 7192 7193 7194 7195 7196
	/* If the controller supports either ioaccel method then
	 * we can also use the RAID stack submit path that does not
	 * perform the superfluous readl() after each command submission.
	 */
	if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
		access = SA5_performant_access_no_read;

7197
	/* Controller spec: zero out this buffer. */
7198 7199
	for (i = 0; i < h->nreply_queues; i++)
		memset(h->reply_queue[i].head, 0, h->reply_queue_size);
7200

7201 7202
	bft[7] = SG_ENTRIES_IN_CMD + 4;
	calc_bucket_map(bft, ARRAY_SIZE(bft),
7203
				SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
7204 7205 7206 7207 7208
	for (i = 0; i < 8; i++)
		writel(bft[i], &h->transtable->BlockFetch[i]);

	/* size of controller ring buffer */
	writel(h->max_commands, &h->transtable->RepQSize);
7209
	writel(h->nreply_queues, &h->transtable->RepQCount);
7210 7211
	writel(0, &h->transtable->RepQCtrAddrLow32);
	writel(0, &h->transtable->RepQCtrAddrHigh32);
7212 7213 7214

	for (i = 0; i < h->nreply_queues; i++) {
		writel(0, &h->transtable->RepQAddr[i].upper);
7215
		writel(h->reply_queue[i].busaddr,
7216 7217 7218
			&h->transtable->RepQAddr[i].lower);
	}

7219
	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7220 7221 7222 7223 7224 7225 7226 7227
	writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
	/*
	 * enable outbound interrupt coalescing in accelerator mode;
	 */
	if (trans_support & CFGTBL_Trans_io_accel1) {
		access = SA5_ioaccel_mode1_access;
		writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
		writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7228 7229 7230 7231 7232 7233
	} else {
		if (trans_support & CFGTBL_Trans_io_accel2) {
			access = SA5_ioaccel_mode2_access;
			writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
			writel(4, &h->cfgtable->HostWrite.CoalIntCount);
		}
7234
	}
7235
	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7236
	hpsa_wait_for_mode_change_ack(h);
7237 7238
	register_value = readl(&(h->cfgtable->TransportActive));
	if (!(register_value & CFGTBL_Trans_Performant)) {
7239 7240
		dev_err(&h->pdev->dev,
			"performant mode problem - transport not active\n");
7241 7242
		return;
	}
7243
	/* Change the access methods to the performant access methods */
7244 7245 7246
	h->access = access;
	h->transMethod = transMethod;

7247 7248
	if (!((trans_support & CFGTBL_Trans_io_accel1) ||
		(trans_support & CFGTBL_Trans_io_accel2)))
7249 7250
		return;

7251 7252 7253 7254 7255 7256 7257 7258 7259 7260
	if (trans_support & CFGTBL_Trans_io_accel1) {
		/* Set up I/O accelerator mode */
		for (i = 0; i < h->nreply_queues; i++) {
			writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
			h->reply_queue[i].current_entry =
				readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
		}
		bft[7] = h->ioaccel_maxsg + 8;
		calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
				h->ioaccel1_blockFetchTable);
7261

7262
		/* initialize all reply queue entries to unused */
7263 7264 7265 7266
		for (i = 0; i < h->nreply_queues; i++)
			memset(h->reply_queue[i].head,
				(u8) IOACCEL_MODE1_REPLY_UNUSED,
				h->reply_queue_size);
7267

7268 7269 7270 7271 7272 7273 7274 7275 7276 7277 7278
		/* set all the constant fields in the accelerator command
		 * frames once at init time to save CPU cycles later.
		 */
		for (i = 0; i < h->nr_cmds; i++) {
			struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];

			cp->function = IOACCEL1_FUNCTION_SCSIIO;
			cp->err_info = (u32) (h->errinfo_pool_dhandle +
					(i * sizeof(struct ErrorInfo)));
			cp->err_info_len = sizeof(struct ErrorInfo);
			cp->sgl_offset = IOACCEL1_SGLOFFSET;
D
Don Brace 已提交
7279 7280
			cp->host_context_flags =
				cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
7281 7282
			cp->timeout_sec = 0;
			cp->ReplyQueue = 0;
7283
			cp->tag =
7284
				cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
7285 7286
			cp->host_addr =
				cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
7287 7288 7289 7290 7291 7292 7293 7294 7295 7296 7297 7298 7299 7300 7301 7302 7303 7304 7305 7306 7307 7308 7309 7310
					(i * sizeof(struct io_accel1_cmd)));
		}
	} else if (trans_support & CFGTBL_Trans_io_accel2) {
		u64 cfg_offset, cfg_base_addr_index;
		u32 bft2_offset, cfg_base_addr;
		int rc;

		rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
			&cfg_base_addr_index, &cfg_offset);
		BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
		bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
		calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
				4, h->ioaccel2_blockFetchTable);
		bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
		BUILD_BUG_ON(offsetof(struct CfgTable,
				io_accel_request_size_offset) != 0xb8);
		h->ioaccel2_bft2_regs =
			remap_pci_mem(pci_resource_start(h->pdev,
					cfg_base_addr_index) +
					cfg_offset + bft2_offset,
					ARRAY_SIZE(bft2) *
					sizeof(*h->ioaccel2_bft2_regs));
		for (i = 0; i < ARRAY_SIZE(bft2); i++)
			writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
7311
	}
7312 7313
	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
	hpsa_wait_for_mode_change_ack(h);
7314 7315 7316 7317
}

static int hpsa_alloc_ioaccel_cmd_and_bft(struct ctlr_info *h)
{
7318 7319 7320 7321 7322
	h->ioaccel_maxsg =
		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
	if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
		h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;

7323 7324 7325 7326 7327 7328 7329 7330 7331 7332 7333 7334
	/* Command structures must be aligned on a 128-byte boundary
	 * because the 7 lower bits of the address are used by the
	 * hardware.
	 */
	BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
			IOACCEL1_COMMANDLIST_ALIGNMENT);
	h->ioaccel_cmd_pool =
		pci_alloc_consistent(h->pdev,
			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
			&(h->ioaccel_cmd_pool_dhandle));

	h->ioaccel1_blockFetchTable =
7335
		kmalloc(((h->ioaccel_maxsg + 1) *
7336 7337 7338 7339 7340 7341 7342 7343 7344 7345 7346 7347 7348 7349 7350 7351 7352
				sizeof(u32)), GFP_KERNEL);

	if ((h->ioaccel_cmd_pool == NULL) ||
		(h->ioaccel1_blockFetchTable == NULL))
		goto clean_up;

	memset(h->ioaccel_cmd_pool, 0,
		h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
	return 0;

clean_up:
	if (h->ioaccel_cmd_pool)
		pci_free_consistent(h->pdev,
			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
			h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
	kfree(h->ioaccel1_blockFetchTable);
	return 1;
7353 7354
}

7355 7356 7357 7358 7359 7360 7361 7362 7363 7364 7365 7366 7367 7368 7369 7370 7371 7372 7373 7374 7375 7376 7377 7378 7379 7380 7381 7382 7383 7384 7385 7386 7387 7388 7389 7390 7391
static int ioaccel2_alloc_cmds_and_bft(struct ctlr_info *h)
{
	/* Allocate ioaccel2 mode command blocks and block fetch table */

	h->ioaccel_maxsg =
		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
	if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
		h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;

	BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
			IOACCEL2_COMMANDLIST_ALIGNMENT);
	h->ioaccel2_cmd_pool =
		pci_alloc_consistent(h->pdev,
			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
			&(h->ioaccel2_cmd_pool_dhandle));

	h->ioaccel2_blockFetchTable =
		kmalloc(((h->ioaccel_maxsg + 1) *
				sizeof(u32)), GFP_KERNEL);

	if ((h->ioaccel2_cmd_pool == NULL) ||
		(h->ioaccel2_blockFetchTable == NULL))
		goto clean_up;

	memset(h->ioaccel2_cmd_pool, 0,
		h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
	return 0;

clean_up:
	if (h->ioaccel2_cmd_pool)
		pci_free_consistent(h->pdev,
			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
			h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
	kfree(h->ioaccel2_blockFetchTable);
	return 1;
}

7392
static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
7393 7394
{
	u32 trans_support;
7395 7396
	unsigned long transMethod = CFGTBL_Trans_Performant |
					CFGTBL_Trans_use_short_tags;
7397
	int i;
7398

7399 7400 7401
	if (hpsa_simple_mode)
		return;

7402 7403 7404 7405
	trans_support = readl(&(h->cfgtable->TransportSupport));
	if (!(trans_support & PERFORMANT_MODE))
		return;

7406 7407 7408 7409 7410 7411
	/* Check for I/O accelerator mode support */
	if (trans_support & CFGTBL_Trans_io_accel1) {
		transMethod |= CFGTBL_Trans_io_accel1 |
				CFGTBL_Trans_enable_directed_msix;
		if (hpsa_alloc_ioaccel_cmd_and_bft(h))
			goto clean_up;
7412 7413 7414 7415 7416 7417 7418
	} else {
		if (trans_support & CFGTBL_Trans_io_accel2) {
				transMethod |= CFGTBL_Trans_io_accel2 |
				CFGTBL_Trans_enable_directed_msix;
		if (ioaccel2_alloc_cmds_and_bft(h))
			goto clean_up;
		}
7419 7420
	}

7421
	h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
7422
	hpsa_get_max_perf_mode_cmds(h);
7423
	/* Performant mode ring buffer and supporting data structures */
7424
	h->reply_queue_size = h->max_commands * sizeof(u64);
7425

7426
	for (i = 0; i < h->nreply_queues; i++) {
7427 7428 7429 7430 7431
		h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
						h->reply_queue_size,
						&(h->reply_queue[i].busaddr));
		if (!h->reply_queue[i].head)
			goto clean_up;
7432 7433 7434 7435 7436
		h->reply_queue[i].size = h->max_commands;
		h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
		h->reply_queue[i].current_entry = 0;
	}

7437
	/* Need a block fetch table for performant mode */
7438
	h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
7439
				sizeof(u32)), GFP_KERNEL);
7440
	if (!h->blockFetchTable)
7441 7442
		goto clean_up;

7443
	hpsa_enter_performant_mode(h, trans_support);
7444 7445 7446
	return;

clean_up:
7447
	hpsa_free_reply_queues(h);
7448 7449 7450
	kfree(h->blockFetchTable);
}

7451
static int is_accelerated_cmd(struct CommandList *c)
7452
{
7453 7454 7455 7456 7457 7458
	return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
}

static void hpsa_drain_accel_commands(struct ctlr_info *h)
{
	struct CommandList *c = NULL;
7459
	int i, accel_cmds_out;
7460
	int refcount;
7461

7462
	do { /* wait for all outstanding ioaccel commands to drain out */
7463
		accel_cmds_out = 0;
7464 7465
		for (i = 0; i < h->nr_cmds; i++) {
			c = h->cmd_pool + i;
7466 7467 7468 7469
			refcount = atomic_inc_return(&c->refcount);
			if (refcount > 1) /* Command is allocated */
				accel_cmds_out += is_accelerated_cmd(c);
			cmd_free(h, c);
7470
		}
7471
		if (accel_cmds_out <= 0)
7472
			break;
7473 7474 7475 7476
		msleep(100);
	} while (1);
}

7477 7478 7479 7480 7481 7482
/*
 *  This is it.  Register the PCI driver information for the cards we control
 *  the OS will call our registered routines when it finds one of our cards.
 */
static int __init hpsa_init(void)
{
M
Mike Miller 已提交
7483
	return pci_register_driver(&hpsa_pci_driver);
7484 7485 7486 7487 7488 7489 7490
}

static void __exit hpsa_cleanup(void)
{
	pci_unregister_driver(&hpsa_pci_driver);
}

7491 7492
static void __attribute__((unused)) verify_offsets(void)
{
7493 7494 7495 7496 7497 7498 7499 7500 7501 7502 7503 7504 7505 7506 7507 7508 7509 7510 7511 7512 7513 7514
#define VERIFY_OFFSET(member, offset) \
	BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)

	VERIFY_OFFSET(structure_size, 0);
	VERIFY_OFFSET(volume_blk_size, 4);
	VERIFY_OFFSET(volume_blk_cnt, 8);
	VERIFY_OFFSET(phys_blk_shift, 16);
	VERIFY_OFFSET(parity_rotation_shift, 17);
	VERIFY_OFFSET(strip_size, 18);
	VERIFY_OFFSET(disk_starting_blk, 20);
	VERIFY_OFFSET(disk_blk_cnt, 28);
	VERIFY_OFFSET(data_disks_per_row, 36);
	VERIFY_OFFSET(metadata_disks_per_row, 38);
	VERIFY_OFFSET(row_cnt, 40);
	VERIFY_OFFSET(layout_map_count, 42);
	VERIFY_OFFSET(flags, 44);
	VERIFY_OFFSET(dekindex, 46);
	/* VERIFY_OFFSET(reserved, 48 */
	VERIFY_OFFSET(data, 64);

#undef VERIFY_OFFSET

7515 7516 7517 7518 7519 7520 7521 7522 7523 7524 7525 7526 7527 7528 7529 7530 7531 7532 7533 7534 7535 7536
#define VERIFY_OFFSET(member, offset) \
	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)

	VERIFY_OFFSET(IU_type, 0);
	VERIFY_OFFSET(direction, 1);
	VERIFY_OFFSET(reply_queue, 2);
	/* VERIFY_OFFSET(reserved1, 3);  */
	VERIFY_OFFSET(scsi_nexus, 4);
	VERIFY_OFFSET(Tag, 8);
	VERIFY_OFFSET(cdb, 16);
	VERIFY_OFFSET(cciss_lun, 32);
	VERIFY_OFFSET(data_len, 40);
	VERIFY_OFFSET(cmd_priority_task_attr, 44);
	VERIFY_OFFSET(sg_count, 45);
	/* VERIFY_OFFSET(reserved3 */
	VERIFY_OFFSET(err_ptr, 48);
	VERIFY_OFFSET(err_len, 56);
	/* VERIFY_OFFSET(reserved4  */
	VERIFY_OFFSET(sg, 64);

#undef VERIFY_OFFSET

7537 7538 7539 7540 7541 7542 7543 7544 7545 7546 7547 7548 7549 7550 7551 7552 7553 7554 7555 7556 7557 7558 7559 7560 7561
#define VERIFY_OFFSET(member, offset) \
	BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)

	VERIFY_OFFSET(dev_handle, 0x00);
	VERIFY_OFFSET(reserved1, 0x02);
	VERIFY_OFFSET(function, 0x03);
	VERIFY_OFFSET(reserved2, 0x04);
	VERIFY_OFFSET(err_info, 0x0C);
	VERIFY_OFFSET(reserved3, 0x10);
	VERIFY_OFFSET(err_info_len, 0x12);
	VERIFY_OFFSET(reserved4, 0x13);
	VERIFY_OFFSET(sgl_offset, 0x14);
	VERIFY_OFFSET(reserved5, 0x15);
	VERIFY_OFFSET(transfer_len, 0x1C);
	VERIFY_OFFSET(reserved6, 0x20);
	VERIFY_OFFSET(io_flags, 0x24);
	VERIFY_OFFSET(reserved7, 0x26);
	VERIFY_OFFSET(LUN, 0x34);
	VERIFY_OFFSET(control, 0x3C);
	VERIFY_OFFSET(CDB, 0x40);
	VERIFY_OFFSET(reserved8, 0x50);
	VERIFY_OFFSET(host_context_flags, 0x60);
	VERIFY_OFFSET(timeout_sec, 0x62);
	VERIFY_OFFSET(ReplyQueue, 0x64);
	VERIFY_OFFSET(reserved9, 0x65);
7562
	VERIFY_OFFSET(tag, 0x68);
7563 7564 7565 7566 7567 7568
	VERIFY_OFFSET(host_addr, 0x70);
	VERIFY_OFFSET(CISS_LUN, 0x78);
	VERIFY_OFFSET(SG, 0x78 + 8);
#undef VERIFY_OFFSET
}

7569 7570
module_init(hpsa_init);
module_exit(hpsa_cleanup);