sh-sci.c 83.3 KB
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// SPDX-License-Identifier: GPL-2.0
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/*
 * SuperH on-chip serial module support.  (SCI with no FIFO / with FIFO)
 *
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 *  Copyright (C) 2002 - 2011  Paul Mundt
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 *  Copyright (C) 2015 Glider bvba
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 *  Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
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 *
 * based off of the old drivers/char/sh-sci.c by:
 *
 *   Copyright (C) 1999, 2000  Niibe Yutaka
 *   Copyright (C) 2000  Sugioka Toshinobu
 *   Modified to support multiple serial ports. Stuart Menefy (May 2000).
 *   Modified to support SecureEdge. David McCullough (2002)
 *   Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
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 *   Removed SH7300 support (Jul 2007).
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 */
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#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
#endif
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#undef DEBUG

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#include <linux/clk.h>
#include <linux/console.h>
#include <linux/ctype.h>
#include <linux/cpufreq.h>
#include <linux/delay.h>
#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
#include <linux/ioport.h>
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#include <linux/ktime.h>
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#include <linux/major.h>
#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/scatterlist.h>
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#include <linux/serial.h>
#include <linux/serial_sci.h>
#include <linux/sh_dma.h>
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#include <linux/slab.h>
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#include <linux/string.h>
#include <linux/sysrq.h>
#include <linux/timer.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
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#ifdef CONFIG_SUPERH
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#include <asm/sh_bios.h>
#endif

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#include "serial_mctrl_gpio.h"
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#include "sh-sci.h"

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/* Offsets into the sci_port->irqs array */
enum {
	SCIx_ERI_IRQ,
	SCIx_RXI_IRQ,
	SCIx_TXI_IRQ,
	SCIx_BRI_IRQ,
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	SCIx_DRI_IRQ,
	SCIx_TEI_IRQ,
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	SCIx_NR_IRQS,

	SCIx_MUX_IRQ = SCIx_NR_IRQS,	/* special case */
};

#define SCIx_IRQ_IS_MUXED(port)			\
	((port)->irqs[SCIx_ERI_IRQ] ==	\
	 (port)->irqs[SCIx_RXI_IRQ]) ||	\
	((port)->irqs[SCIx_ERI_IRQ] &&	\
	 ((port)->irqs[SCIx_RXI_IRQ] < 0))

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enum SCI_CLKS {
	SCI_FCK,		/* Functional Clock */
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	SCI_SCK,		/* Optional External Clock */
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	SCI_BRG_INT,		/* Optional BRG Internal Clock Source */
	SCI_SCIF_CLK,		/* Optional BRG External Clock Source */
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	SCI_NUM_CLKS
};

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/* Bit x set means sampling rate x + 1 is supported */
#define SCI_SR(x)		BIT((x) - 1)
#define SCI_SR_RANGE(x, y)	GENMASK((y) - 1, (x) - 1)

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#define SCI_SR_SCIFAB		SCI_SR(5) | SCI_SR(7) | SCI_SR(11) | \
				SCI_SR(13) | SCI_SR(16) | SCI_SR(17) | \
				SCI_SR(19) | SCI_SR(27)

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#define min_sr(_port)		ffs((_port)->sampling_rate_mask)
#define max_sr(_port)		fls((_port)->sampling_rate_mask)

/* Iterate over all supported sampling rates, from high to low */
#define for_each_sr(_sr, _port)						\
	for ((_sr) = max_sr(_port); (_sr) >= min_sr(_port); (_sr)--)	\
		if ((_port)->sampling_rate_mask & SCI_SR((_sr)))

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struct plat_sci_reg {
	u8 offset, size;
};

struct sci_port_params {
	const struct plat_sci_reg regs[SCIx_NR_REGS];
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	unsigned int fifosize;
	unsigned int overrun_reg;
	unsigned int overrun_mask;
	unsigned int sampling_rate_mask;
	unsigned int error_mask;
	unsigned int error_clear;
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};

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struct sci_port {
	struct uart_port	port;

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	/* Platform configuration */
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	const struct sci_port_params *params;
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	const struct plat_sci_port *cfg;
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	unsigned int		sampling_rate_mask;
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	resource_size_t		reg_size;
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	struct mctrl_gpios	*gpios;
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	/* Clocks */
	struct clk		*clks[SCI_NUM_CLKS];
	unsigned long		clk_rates[SCI_NUM_CLKS];
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	int			irqs[SCIx_NR_IRQS];
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	char			*irqstr[SCIx_NR_IRQS];

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	struct dma_chan			*chan_tx;
	struct dma_chan			*chan_rx;
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#ifdef CONFIG_SERIAL_SH_SCI_DMA
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	struct dma_chan			*chan_tx_saved;
	struct dma_chan			*chan_rx_saved;
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	dma_cookie_t			cookie_tx;
	dma_cookie_t			cookie_rx[2];
	dma_cookie_t			active_rx;
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	dma_addr_t			tx_dma_addr;
	unsigned int			tx_dma_len;
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	struct scatterlist		sg_rx[2];
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	void				*rx_buf[2];
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	size_t				buf_len_rx;
	struct work_struct		work_tx;
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	struct hrtimer			rx_timer;
	unsigned int			rx_timeout;	/* microseconds */
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#endif
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	unsigned int			rx_frame;
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	int				rx_trigger;
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	struct timer_list		rx_fifo_timer;
	int				rx_fifo_timeout;
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	u16				hscif_tot;
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	bool has_rtscts;
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	bool autorts;
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};

#define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
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static struct sci_port sci_ports[SCI_NPORTS];
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static unsigned long sci_ports_in_use;
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static struct uart_driver sci_uart_driver;
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static inline struct sci_port *
to_sci_port(struct uart_port *uart)
{
	return container_of(uart, struct sci_port, port);
}

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static const struct sci_port_params sci_port_params[SCIx_NR_REGTYPES] = {
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	/*
	 * Common SCI definitions, dependent on the port's regshift
	 * value.
	 */
	[SCIx_SCI_REGTYPE] = {
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		.regs = {
			[SCSMR]		= { 0x00,  8 },
			[SCBRR]		= { 0x01,  8 },
			[SCSCR]		= { 0x02,  8 },
			[SCxTDR]	= { 0x03,  8 },
			[SCxSR]		= { 0x04,  8 },
			[SCxRDR]	= { 0x05,  8 },
		},
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		.fifosize = 1,
		.overrun_reg = SCxSR,
		.overrun_mask = SCI_ORER,
		.sampling_rate_mask = SCI_SR(32),
		.error_mask = SCI_DEFAULT_ERROR_MASK | SCI_ORER,
		.error_clear = SCI_ERROR_CLEAR & ~SCI_ORER,
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	},

	/*
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	 * Common definitions for legacy IrDA ports.
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	 */
	[SCIx_IRDA_REGTYPE] = {
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		.regs = {
			[SCSMR]		= { 0x00,  8 },
			[SCBRR]		= { 0x02,  8 },
			[SCSCR]		= { 0x04,  8 },
			[SCxTDR]	= { 0x06,  8 },
			[SCxSR]		= { 0x08, 16 },
			[SCxRDR]	= { 0x0a,  8 },
			[SCFCR]		= { 0x0c,  8 },
			[SCFDR]		= { 0x0e, 16 },
		},
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		.fifosize = 1,
		.overrun_reg = SCxSR,
		.overrun_mask = SCI_ORER,
		.sampling_rate_mask = SCI_SR(32),
		.error_mask = SCI_DEFAULT_ERROR_MASK | SCI_ORER,
		.error_clear = SCI_ERROR_CLEAR & ~SCI_ORER,
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	},

	/*
	 * Common SCIFA definitions.
	 */
	[SCIx_SCIFA_REGTYPE] = {
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		.regs = {
			[SCSMR]		= { 0x00, 16 },
			[SCBRR]		= { 0x04,  8 },
			[SCSCR]		= { 0x08, 16 },
			[SCxTDR]	= { 0x20,  8 },
			[SCxSR]		= { 0x14, 16 },
			[SCxRDR]	= { 0x24,  8 },
			[SCFCR]		= { 0x18, 16 },
			[SCFDR]		= { 0x1c, 16 },
			[SCPCR]		= { 0x30, 16 },
			[SCPDR]		= { 0x34, 16 },
		},
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		.fifosize = 64,
		.overrun_reg = SCxSR,
		.overrun_mask = SCIFA_ORER,
		.sampling_rate_mask = SCI_SR_SCIFAB,
		.error_mask = SCIF_DEFAULT_ERROR_MASK | SCIFA_ORER,
		.error_clear = SCIF_ERROR_CLEAR & ~SCIFA_ORER,
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	},

	/*
	 * Common SCIFB definitions.
	 */
	[SCIx_SCIFB_REGTYPE] = {
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		.regs = {
			[SCSMR]		= { 0x00, 16 },
			[SCBRR]		= { 0x04,  8 },
			[SCSCR]		= { 0x08, 16 },
			[SCxTDR]	= { 0x40,  8 },
			[SCxSR]		= { 0x14, 16 },
			[SCxRDR]	= { 0x60,  8 },
			[SCFCR]		= { 0x18, 16 },
			[SCTFDR]	= { 0x38, 16 },
			[SCRFDR]	= { 0x3c, 16 },
			[SCPCR]		= { 0x30, 16 },
			[SCPDR]		= { 0x34, 16 },
		},
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		.fifosize = 256,
		.overrun_reg = SCxSR,
		.overrun_mask = SCIFA_ORER,
		.sampling_rate_mask = SCI_SR_SCIFAB,
		.error_mask = SCIF_DEFAULT_ERROR_MASK | SCIFA_ORER,
		.error_clear = SCIF_ERROR_CLEAR & ~SCIFA_ORER,
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	},

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	/*
	 * Common SH-2(A) SCIF definitions for ports with FIFO data
	 * count registers.
	 */
	[SCIx_SH2_SCIF_FIFODATA_REGTYPE] = {
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		.regs = {
			[SCSMR]		= { 0x00, 16 },
			[SCBRR]		= { 0x04,  8 },
			[SCSCR]		= { 0x08, 16 },
			[SCxTDR]	= { 0x0c,  8 },
			[SCxSR]		= { 0x10, 16 },
			[SCxRDR]	= { 0x14,  8 },
			[SCFCR]		= { 0x18, 16 },
			[SCFDR]		= { 0x1c, 16 },
			[SCSPTR]	= { 0x20, 16 },
			[SCLSR]		= { 0x24, 16 },
		},
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		.fifosize = 16,
		.overrun_reg = SCLSR,
		.overrun_mask = SCLSR_ORER,
		.sampling_rate_mask = SCI_SR(32),
		.error_mask = SCIF_DEFAULT_ERROR_MASK,
		.error_clear = SCIF_ERROR_CLEAR,
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	},

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	/*
	 * The "SCIFA" that is in RZ/T and RZ/A2.
	 * It looks like a normal SCIF with FIFO data, but with a
	 * compressed address space. Also, the break out of interrupts
	 * are different: ERI/BRI, RXI, TXI, TEI, DRI.
	 */
	[SCIx_RZ_SCIFA_REGTYPE] = {
		.regs = {
			[SCSMR]		= { 0x00, 16 },
			[SCBRR]		= { 0x02,  8 },
			[SCSCR]		= { 0x04, 16 },
			[SCxTDR]	= { 0x06,  8 },
			[SCxSR]		= { 0x08, 16 },
			[SCxRDR]	= { 0x0A,  8 },
			[SCFCR]		= { 0x0C, 16 },
			[SCFDR]		= { 0x0E, 16 },
			[SCSPTR]	= { 0x10, 16 },
			[SCLSR]		= { 0x12, 16 },
		},
		.fifosize = 16,
		.overrun_reg = SCLSR,
		.overrun_mask = SCLSR_ORER,
		.sampling_rate_mask = SCI_SR(32),
		.error_mask = SCIF_DEFAULT_ERROR_MASK,
		.error_clear = SCIF_ERROR_CLEAR,
	},

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	/*
	 * Common SH-3 SCIF definitions.
	 */
	[SCIx_SH3_SCIF_REGTYPE] = {
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		.regs = {
			[SCSMR]		= { 0x00,  8 },
			[SCBRR]		= { 0x02,  8 },
			[SCSCR]		= { 0x04,  8 },
			[SCxTDR]	= { 0x06,  8 },
			[SCxSR]		= { 0x08, 16 },
			[SCxRDR]	= { 0x0a,  8 },
			[SCFCR]		= { 0x0c,  8 },
			[SCFDR]		= { 0x0e, 16 },
		},
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		.fifosize = 16,
		.overrun_reg = SCLSR,
		.overrun_mask = SCLSR_ORER,
		.sampling_rate_mask = SCI_SR(32),
		.error_mask = SCIF_DEFAULT_ERROR_MASK,
		.error_clear = SCIF_ERROR_CLEAR,
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	},

	/*
	 * Common SH-4(A) SCIF(B) definitions.
	 */
	[SCIx_SH4_SCIF_REGTYPE] = {
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		.regs = {
			[SCSMR]		= { 0x00, 16 },
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			[SCBRR]		= { 0x04,  8 },
			[SCSCR]		= { 0x08, 16 },
			[SCxTDR]	= { 0x0c,  8 },
			[SCxSR]		= { 0x10, 16 },
			[SCxRDR]	= { 0x14,  8 },
			[SCFCR]		= { 0x18, 16 },
			[SCFDR]		= { 0x1c, 16 },
			[SCSPTR]	= { 0x20, 16 },
			[SCLSR]		= { 0x24, 16 },
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		},
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		.fifosize = 16,
		.overrun_reg = SCLSR,
		.overrun_mask = SCLSR_ORER,
		.sampling_rate_mask = SCI_SR(32),
		.error_mask = SCIF_DEFAULT_ERROR_MASK,
		.error_clear = SCIF_ERROR_CLEAR,
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	},

	/*
	 * Common SCIF definitions for ports with a Baud Rate Generator for
	 * External Clock (BRG).
	 */
	[SCIx_SH4_SCIF_BRG_REGTYPE] = {
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		.regs = {
			[SCSMR]		= { 0x00, 16 },
			[SCBRR]		= { 0x04,  8 },
			[SCSCR]		= { 0x08, 16 },
			[SCxTDR]	= { 0x0c,  8 },
			[SCxSR]		= { 0x10, 16 },
			[SCxRDR]	= { 0x14,  8 },
			[SCFCR]		= { 0x18, 16 },
			[SCFDR]		= { 0x1c, 16 },
			[SCSPTR]	= { 0x20, 16 },
			[SCLSR]		= { 0x24, 16 },
			[SCDL]		= { 0x30, 16 },
			[SCCKS]		= { 0x34, 16 },
		},
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		.fifosize = 16,
		.overrun_reg = SCLSR,
		.overrun_mask = SCLSR_ORER,
		.sampling_rate_mask = SCI_SR(32),
		.error_mask = SCIF_DEFAULT_ERROR_MASK,
		.error_clear = SCIF_ERROR_CLEAR,
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	},

	/*
	 * Common HSCIF definitions.
	 */
	[SCIx_HSCIF_REGTYPE] = {
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		.regs = {
			[SCSMR]		= { 0x00, 16 },
			[SCBRR]		= { 0x04,  8 },
			[SCSCR]		= { 0x08, 16 },
			[SCxTDR]	= { 0x0c,  8 },
			[SCxSR]		= { 0x10, 16 },
			[SCxRDR]	= { 0x14,  8 },
			[SCFCR]		= { 0x18, 16 },
			[SCFDR]		= { 0x1c, 16 },
			[SCSPTR]	= { 0x20, 16 },
			[SCLSR]		= { 0x24, 16 },
			[HSSRR]		= { 0x40, 16 },
			[SCDL]		= { 0x30, 16 },
			[SCCKS]		= { 0x34, 16 },
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			[HSRTRGR]	= { 0x54, 16 },
			[HSTTRGR]	= { 0x58, 16 },
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		},
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		.fifosize = 128,
		.overrun_reg = SCLSR,
		.overrun_mask = SCLSR_ORER,
		.sampling_rate_mask = SCI_SR_RANGE(8, 32),
		.error_mask = SCIF_DEFAULT_ERROR_MASK,
		.error_clear = SCIF_ERROR_CLEAR,
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	},

	/*
	 * Common SH-4(A) SCIF(B) definitions for ports without an SCSPTR
	 * register.
	 */
	[SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE] = {
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		.regs = {
			[SCSMR]		= { 0x00, 16 },
			[SCBRR]		= { 0x04,  8 },
			[SCSCR]		= { 0x08, 16 },
			[SCxTDR]	= { 0x0c,  8 },
			[SCxSR]		= { 0x10, 16 },
			[SCxRDR]	= { 0x14,  8 },
			[SCFCR]		= { 0x18, 16 },
			[SCFDR]		= { 0x1c, 16 },
			[SCLSR]		= { 0x24, 16 },
		},
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		.fifosize = 16,
		.overrun_reg = SCLSR,
		.overrun_mask = SCLSR_ORER,
		.sampling_rate_mask = SCI_SR(32),
		.error_mask = SCIF_DEFAULT_ERROR_MASK,
		.error_clear = SCIF_ERROR_CLEAR,
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	},

	/*
	 * Common SH-4(A) SCIF(B) definitions for ports with FIFO data
	 * count registers.
	 */
	[SCIx_SH4_SCIF_FIFODATA_REGTYPE] = {
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		.regs = {
			[SCSMR]		= { 0x00, 16 },
			[SCBRR]		= { 0x04,  8 },
			[SCSCR]		= { 0x08, 16 },
			[SCxTDR]	= { 0x0c,  8 },
			[SCxSR]		= { 0x10, 16 },
			[SCxRDR]	= { 0x14,  8 },
			[SCFCR]		= { 0x18, 16 },
			[SCFDR]		= { 0x1c, 16 },
			[SCTFDR]	= { 0x1c, 16 },	/* aliased to SCFDR */
			[SCRFDR]	= { 0x20, 16 },
			[SCSPTR]	= { 0x24, 16 },
			[SCLSR]		= { 0x28, 16 },
		},
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		.fifosize = 16,
		.overrun_reg = SCLSR,
		.overrun_mask = SCLSR_ORER,
		.sampling_rate_mask = SCI_SR(32),
		.error_mask = SCIF_DEFAULT_ERROR_MASK,
		.error_clear = SCIF_ERROR_CLEAR,
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	},

	/*
	 * SH7705-style SCIF(B) ports, lacking both SCSPTR and SCLSR
	 * registers.
	 */
	[SCIx_SH7705_SCIF_REGTYPE] = {
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		.regs = {
			[SCSMR]		= { 0x00, 16 },
			[SCBRR]		= { 0x04,  8 },
			[SCSCR]		= { 0x08, 16 },
			[SCxTDR]	= { 0x20,  8 },
			[SCxSR]		= { 0x14, 16 },
			[SCxRDR]	= { 0x24,  8 },
			[SCFCR]		= { 0x18, 16 },
			[SCFDR]		= { 0x1c, 16 },
		},
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		.fifosize = 64,
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		.overrun_reg = SCxSR,
		.overrun_mask = SCIFA_ORER,
		.sampling_rate_mask = SCI_SR(16),
		.error_mask = SCIF_DEFAULT_ERROR_MASK | SCIFA_ORER,
		.error_clear = SCIF_ERROR_CLEAR & ~SCIFA_ORER,
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	},
};

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#define sci_getreg(up, offset)		(&to_sci_port(up)->params->regs[offset])
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/*
 * The "offset" here is rather misleading, in that it refers to an enum
 * value relative to the port mapping rather than the fixed offset
 * itself, which needs to be manually retrieved from the platform's
 * register map for the given port.
 */
static unsigned int sci_serial_in(struct uart_port *p, int offset)
{
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	const struct plat_sci_reg *reg = sci_getreg(p, offset);
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	if (reg->size == 8)
		return ioread8(p->membase + (reg->offset << p->regshift));
	else if (reg->size == 16)
		return ioread16(p->membase + (reg->offset << p->regshift));
	else
		WARN(1, "Invalid register access\n");

	return 0;
}

static void sci_serial_out(struct uart_port *p, int offset, int value)
{
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	const struct plat_sci_reg *reg = sci_getreg(p, offset);
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	if (reg->size == 8)
		iowrite8(value, p->membase + (reg->offset << p->regshift));
	else if (reg->size == 16)
		iowrite16(value, p->membase + (reg->offset << p->regshift));
	else
		WARN(1, "Invalid register access\n");
}

532 533
static void sci_port_enable(struct sci_port *sci_port)
{
534 535
	unsigned int i;

536 537 538 539 540
	if (!sci_port->port.dev)
		return;

	pm_runtime_get_sync(sci_port->port.dev);

541 542 543 544 545
	for (i = 0; i < SCI_NUM_CLKS; i++) {
		clk_prepare_enable(sci_port->clks[i]);
		sci_port->clk_rates[i] = clk_get_rate(sci_port->clks[i]);
	}
	sci_port->port.uartclk = sci_port->clk_rates[SCI_FCK];
546 547 548 549
}

static void sci_port_disable(struct sci_port *sci_port)
{
550 551
	unsigned int i;

552 553 554
	if (!sci_port->port.dev)
		return;

555 556
	for (i = SCI_NUM_CLKS; i-- > 0; )
		clk_disable_unprepare(sci_port->clks[i]);
557 558 559 560

	pm_runtime_put_sync(sci_port->port.dev);
}

561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643
static inline unsigned long port_rx_irq_mask(struct uart_port *port)
{
	/*
	 * Not all ports (such as SCIFA) will support REIE. Rather than
	 * special-casing the port type, we check the port initialization
	 * IRQ enable mask to see whether the IRQ is desired at all. If
	 * it's unset, it's logically inferred that there's no point in
	 * testing for it.
	 */
	return SCSCR_RIE | (to_sci_port(port)->cfg->scscr & SCSCR_REIE);
}

static void sci_start_tx(struct uart_port *port)
{
	struct sci_port *s = to_sci_port(port);
	unsigned short ctrl;

#ifdef CONFIG_SERIAL_SH_SCI_DMA
	if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
		u16 new, scr = serial_port_in(port, SCSCR);
		if (s->chan_tx)
			new = scr | SCSCR_TDRQE;
		else
			new = scr & ~SCSCR_TDRQE;
		if (new != scr)
			serial_port_out(port, SCSCR, new);
	}

	if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) &&
	    dma_submit_error(s->cookie_tx)) {
		s->cookie_tx = 0;
		schedule_work(&s->work_tx);
	}
#endif

	if (!s->chan_tx || port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
		/* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
		ctrl = serial_port_in(port, SCSCR);
		serial_port_out(port, SCSCR, ctrl | SCSCR_TIE);
	}
}

static void sci_stop_tx(struct uart_port *port)
{
	unsigned short ctrl;

	/* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
	ctrl = serial_port_in(port, SCSCR);

	if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
		ctrl &= ~SCSCR_TDRQE;

	ctrl &= ~SCSCR_TIE;

	serial_port_out(port, SCSCR, ctrl);
}

static void sci_start_rx(struct uart_port *port)
{
	unsigned short ctrl;

	ctrl = serial_port_in(port, SCSCR) | port_rx_irq_mask(port);

	if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
		ctrl &= ~SCSCR_RDRQE;

	serial_port_out(port, SCSCR, ctrl);
}

static void sci_stop_rx(struct uart_port *port)
{
	unsigned short ctrl;

	ctrl = serial_port_in(port, SCSCR);

	if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
		ctrl &= ~SCSCR_RDRQE;

	ctrl &= ~port_rx_irq_mask(port);

	serial_port_out(port, SCSCR, ctrl);
}

644 645 646 647 648
static void sci_clear_SCxSR(struct uart_port *port, unsigned int mask)
{
	if (port->type == PORT_SCI) {
		/* Just store the mask */
		serial_port_out(port, SCxSR, mask);
649
	} else if (to_sci_port(port)->params->overrun_mask == SCIFA_ORER) {
650 651 652 653 654 655 656 657 658 659
		/* SCIFA/SCIFB and SCIF on SH7705/SH7720/SH7721 */
		/* Only clear the status bits we want to clear */
		serial_port_out(port, SCxSR,
				serial_port_in(port, SCxSR) & mask);
	} else {
		/* Store the mask, clear parity/framing errors */
		serial_port_out(port, SCxSR, mask & ~(SCIF_FERC | SCIF_PERC));
	}
}

660 661
#if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || \
    defined(CONFIG_SERIAL_SH_SCI_EARLYCON)
662 663

#ifdef CONFIG_CONSOLE_POLL
664
static int sci_poll_get_char(struct uart_port *port)
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{
	unsigned short status;
	int c;

669
	do {
670
		status = serial_port_in(port, SCxSR);
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		if (status & SCxSR_ERRORS(port)) {
672
			sci_clear_SCxSR(port, SCxSR_ERROR_CLEAR(port));
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			continue;
		}
675 676 677 678 679
		break;
	} while (1);

	if (!(status & SCxSR_RDxF(port)))
		return NO_POLL_CHAR;
680

681
	c = serial_port_in(port, SCxRDR);
682

683
	/* Dummy read */
684
	serial_port_in(port, SCxSR);
685
	sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port));
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686 687 688

	return c;
}
689
#endif
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691
static void sci_poll_put_char(struct uart_port *port, unsigned char c)
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692 693 694 695
{
	unsigned short status;

	do {
696
		status = serial_port_in(port, SCxSR);
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697 698
	} while (!(status & SCxSR_TDxE(port)));

699
	serial_port_out(port, SCxTDR, c);
700
	sci_clear_SCxSR(port, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port));
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}
702 703
#endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE ||
	  CONFIG_SERIAL_SH_SCI_EARLYCON */
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705
static void sci_init_pins(struct uart_port *port, unsigned int cflag)
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706
{
707
	struct sci_port *s = to_sci_port(port);
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709 710 711 712 713 714
	/*
	 * Use port-specific handler if provided.
	 */
	if (s->cfg->ops && s->cfg->ops->init_pins) {
		s->cfg->ops->init_pins(port, cflag);
		return;
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	}
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716

717
	if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
718
		u16 data = serial_port_in(port, SCPDR);
719 720 721 722
		u16 ctrl = serial_port_in(port, SCPCR);

		/* Enable RXD and TXD pin functions */
		ctrl &= ~(SCPCR_RXDC | SCPCR_TXDC);
723
		if (to_sci_port(port)->has_rtscts) {
724 725 726 727 728 729 730 731 732 733 734
			/* RTS# is output, active low, unless autorts */
			if (!(port->mctrl & TIOCM_RTS)) {
				ctrl |= SCPCR_RTSC;
				data |= SCPDR_RTSD;
			} else if (!s->autorts) {
				ctrl |= SCPCR_RTSC;
				data &= ~SCPDR_RTSD;
			} else {
				/* Enable RTS# pin function */
				ctrl &= ~SCPCR_RTSC;
			}
735 736 737
			/* Enable CTS# pin function */
			ctrl &= ~SCPCR_CTSC;
		}
738
		serial_port_out(port, SCPDR, data);
739 740
		serial_port_out(port, SCPCR, ctrl);
	} else if (sci_getreg(port, SCSPTR)->size) {
741 742
		u16 status = serial_port_in(port, SCSPTR);

743 744 745 746 747 748
		/* RTS# is always output; and active low, unless autorts */
		status |= SCSPTR_RTSIO;
		if (!(port->mctrl & TIOCM_RTS))
			status |= SCSPTR_RTSDT;
		else if (!s->autorts)
			status &= ~SCSPTR_RTSDT;
749 750 751
		/* CTS# and SCK are inputs */
		status &= ~(SCSPTR_CTSIO | SCSPTR_SCKIO);
		serial_port_out(port, SCSPTR, status);
752
	}
753
}
754

755
static int sci_txfill(struct uart_port *port)
756
{
757 758
	struct sci_port *s = to_sci_port(port);
	unsigned int fifo_mask = (s->params->fifosize << 1) - 1;
759
	const struct plat_sci_reg *reg;
760

761 762
	reg = sci_getreg(port, SCTFDR);
	if (reg->size)
763
		return serial_port_in(port, SCTFDR) & fifo_mask;
764

765 766
	reg = sci_getreg(port, SCFDR);
	if (reg->size)
767
		return serial_port_in(port, SCFDR) >> 8;
768

769
	return !(serial_port_in(port, SCxSR) & SCI_TDRE);
770 771
}

772 773
static int sci_txroom(struct uart_port *port)
{
774
	return port->fifosize - sci_txfill(port);
775 776 777
}

static int sci_rxfill(struct uart_port *port)
778
{
779 780
	struct sci_port *s = to_sci_port(port);
	unsigned int fifo_mask = (s->params->fifosize << 1) - 1;
781
	const struct plat_sci_reg *reg;
782 783 784

	reg = sci_getreg(port, SCRFDR);
	if (reg->size)
785
		return serial_port_in(port, SCRFDR) & fifo_mask;
786 787 788

	reg = sci_getreg(port, SCFDR);
	if (reg->size)
789
		return serial_port_in(port, SCFDR) & fifo_mask;
790

791
	return (serial_port_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
792 793
}

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/* ********************************************************************** *
 *                   the interrupt related routines                       *
 * ********************************************************************** */

static void sci_transmit_chars(struct uart_port *port)
{
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	struct circ_buf *xmit = &port->state->xmit;
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	unsigned int stopped = uart_tx_stopped(port);
	unsigned short status;
	unsigned short ctrl;
804
	int count;
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805

806
	status = serial_port_in(port, SCxSR);
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	if (!(status & SCxSR_TDxE(port))) {
808
		ctrl = serial_port_in(port, SCSCR);
809
		if (uart_circ_empty(xmit))
810
			ctrl &= ~SCSCR_TIE;
811
		else
812
			ctrl |= SCSCR_TIE;
813
		serial_port_out(port, SCSCR, ctrl);
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		return;
	}

817
	count = sci_txroom(port);
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	do {
		unsigned char c;

		if (port->x_char) {
			c = port->x_char;
			port->x_char = 0;
		} else if (!uart_circ_empty(xmit) && !stopped) {
			c = xmit->buf[xmit->tail];
			xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
		} else {
			break;
		}

832
		serial_port_out(port, SCxTDR, c);
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		port->icount.tx++;
	} while (--count > 0);

837
	sci_clear_SCxSR(port, SCxSR_TDxE_CLEAR(port));
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	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(port);
	if (uart_circ_empty(xmit)) {
842
		sci_stop_tx(port);
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843
	} else {
844
		ctrl = serial_port_in(port, SCSCR);
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845

846
		if (port->type != PORT_SCI) {
847
			serial_port_in(port, SCxSR); /* Dummy read */
848
			sci_clear_SCxSR(port, SCxSR_TDxE_CLEAR(port));
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849 850
		}

851
		ctrl |= SCSCR_TIE;
852
		serial_port_out(port, SCSCR, ctrl);
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	}
}

/* On SH3, SCIF may read end-of-break as a space->mark char */
857
#define STEPFN(c)  ({int __c = (c); (((__c-1)|(__c)) == -1); })
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858

859
static void sci_receive_chars(struct uart_port *port)
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860
{
861
	struct tty_port *tport = &port->state->port;
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862 863
	int i, count, copied = 0;
	unsigned short status;
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864
	unsigned char flag;
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865

866
	status = serial_port_in(port, SCxSR);
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867 868 869 870 871
	if (!(status & SCxSR_RDxF(port)))
		return;

	while (1) {
		/* Don't copy more bytes than there is room for in the buffer */
872
		count = tty_buffer_request_room(tport, sci_rxfill(port));
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873 874 875 876 877 878

		/* If for any reason we can't copy more data, we're done! */
		if (count == 0)
			break;

		if (port->type == PORT_SCI) {
879
			char c = serial_port_in(port, SCxRDR);
880
			if (uart_handle_sysrq_char(port, c))
L
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881
				count = 0;
882
			else
J
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883
				tty_insert_flip_char(tport, c, TTY_NORMAL);
L
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884
		} else {
885
			for (i = 0; i < count; i++) {
886
				char c = serial_port_in(port, SCxRDR);
887

888
				status = serial_port_in(port, SCxSR);
889
				if (uart_handle_sysrq_char(port, c)) {
L
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890 891 892 893 894
					count--; i--;
					continue;
				}

				/* Store data and status */
895
				if (status & SCxSR_FER(port)) {
A
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896
					flag = TTY_FRAME;
897
					port->icount.frame++;
898
					dev_notice(port->dev, "frame error\n");
899
				} else if (status & SCxSR_PER(port)) {
A
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900
					flag = TTY_PARITY;
901
					port->icount.parity++;
902
					dev_notice(port->dev, "parity error\n");
A
Alan Cox 已提交
903 904
				} else
					flag = TTY_NORMAL;
905

J
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906
				tty_insert_flip_char(tport, c, flag);
L
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907 908 909
			}
		}

910
		serial_port_in(port, SCxSR); /* dummy read */
911
		sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port));
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912 913 914 915 916 917 918

		copied += count;
		port->icount.rx += count;
	}

	if (copied) {
		/* Tell the rest of the system the news. New characters! */
J
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919
		tty_flip_buffer_push(tport);
L
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920
	} else {
921 922
		/* TTY buffers full; read from RX reg to prevent lockup */
		serial_port_in(port, SCxRDR);
923
		serial_port_in(port, SCxSR); /* dummy read */
924
		sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port));
L
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925 926 927
	}
}

928
static int sci_handle_errors(struct uart_port *port)
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929 930
{
	int copied = 0;
931
	unsigned short status = serial_port_in(port, SCxSR);
J
Jiri Slaby 已提交
932
	struct tty_port *tport = &port->state->port;
933
	struct sci_port *s = to_sci_port(port);
L
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934

935
	/* Handle overruns */
936
	if (status & s->params->overrun_mask) {
937
		port->icount.overrun++;
938

939 940 941
		/* overrun error */
		if (tty_insert_flip_char(tport, 0, TTY_OVERRUN))
			copied++;
942

943
		dev_notice(port->dev, "overrun error\n");
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944 945
	}

946
	if (status & SCxSR_FER(port)) {
947 948
		/* frame error */
		port->icount.frame++;
949

950 951
		if (tty_insert_flip_char(tport, 0, TTY_FRAME))
			copied++;
952

953
		dev_notice(port->dev, "frame error\n");
L
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954 955
	}

956
	if (status & SCxSR_PER(port)) {
L
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957
		/* parity error */
958 959
		port->icount.parity++;

J
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960
		if (tty_insert_flip_char(tport, 0, TTY_PARITY))
961
			copied++;
962

963
		dev_notice(port->dev, "parity error\n");
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964 965
	}

A
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966
	if (copied)
J
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967
		tty_flip_buffer_push(tport);
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968 969 970 971

	return copied;
}

972
static int sci_handle_fifo_overrun(struct uart_port *port)
973
{
J
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974
	struct tty_port *tport = &port->state->port;
975
	struct sci_port *s = to_sci_port(port);
976
	const struct plat_sci_reg *reg;
977
	int copied = 0;
978
	u16 status;
979

980
	reg = sci_getreg(port, s->params->overrun_reg);
981
	if (!reg->size)
982 983
		return 0;

984 985 986 987
	status = serial_port_in(port, s->params->overrun_reg);
	if (status & s->params->overrun_mask) {
		status &= ~s->params->overrun_mask;
		serial_port_out(port, s->params->overrun_reg, status);
988

989 990
		port->icount.overrun++;

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991
		tty_insert_flip_char(tport, 0, TTY_OVERRUN);
J
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992
		tty_flip_buffer_push(tport);
993

994
		dev_dbg(port->dev, "overrun error\n");
995 996 997 998 999 1000
		copied++;
	}

	return copied;
}

1001
static int sci_handle_breaks(struct uart_port *port)
L
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1002 1003
{
	int copied = 0;
1004
	unsigned short status = serial_port_in(port, SCxSR);
J
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1005
	struct tty_port *tport = &port->state->port;
L
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1006

1007 1008 1009
	if (uart_handle_break(port))
		return 0;

1010
	if (status & SCxSR_BRK(port)) {
1011 1012
		port->icount.brk++;

L
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1013
		/* Notify of BREAK */
J
Jiri Slaby 已提交
1014
		if (tty_insert_flip_char(tport, 0, TTY_BREAK))
A
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1015
			copied++;
1016 1017

		dev_dbg(port->dev, "BREAK detected\n");
L
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1018 1019
	}

A
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1020
	if (copied)
J
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1021
		tty_flip_buffer_push(tport);
1022

1023 1024
	copied += sci_handle_fifo_overrun(port);

L
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1025 1026 1027
	return copied;
}

1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086
static int scif_set_rtrg(struct uart_port *port, int rx_trig)
{
	unsigned int bits;

	if (rx_trig < 1)
		rx_trig = 1;
	if (rx_trig >= port->fifosize)
		rx_trig = port->fifosize;

	/* HSCIF can be set to an arbitrary level. */
	if (sci_getreg(port, HSRTRGR)->size) {
		serial_port_out(port, HSRTRGR, rx_trig);
		return rx_trig;
	}

	switch (port->type) {
	case PORT_SCIF:
		if (rx_trig < 4) {
			bits = 0;
			rx_trig = 1;
		} else if (rx_trig < 8) {
			bits = SCFCR_RTRG0;
			rx_trig = 4;
		} else if (rx_trig < 14) {
			bits = SCFCR_RTRG1;
			rx_trig = 8;
		} else {
			bits = SCFCR_RTRG0 | SCFCR_RTRG1;
			rx_trig = 14;
		}
		break;
	case PORT_SCIFA:
	case PORT_SCIFB:
		if (rx_trig < 16) {
			bits = 0;
			rx_trig = 1;
		} else if (rx_trig < 32) {
			bits = SCFCR_RTRG0;
			rx_trig = 16;
		} else if (rx_trig < 48) {
			bits = SCFCR_RTRG1;
			rx_trig = 32;
		} else {
			bits = SCFCR_RTRG0 | SCFCR_RTRG1;
			rx_trig = 48;
		}
		break;
	default:
		WARN(1, "unknown FIFO configuration");
		return 1;
	}

	serial_port_out(port, SCFCR,
		(serial_port_in(port, SCFCR) &
		~(SCFCR_RTRG1 | SCFCR_RTRG0)) | bits);

	return rx_trig;
}

1087 1088 1089 1090 1091 1092 1093 1094 1095
static int scif_rtrg_enabled(struct uart_port *port)
{
	if (sci_getreg(port, HSRTRGR)->size)
		return serial_port_in(port, HSRTRGR) != 0;
	else
		return (serial_port_in(port, SCFCR) &
			(SCFCR_RTRG0 | SCFCR_RTRG1)) != 0;
}

1096
static void rx_fifo_timer_fn(struct timer_list *t)
1097
{
1098
	struct sci_port *s = from_timer(s, t, rx_fifo_timer);
1099 1100 1101 1102 1103 1104
	struct uart_port *port = &s->port;

	dev_dbg(port->dev, "Rx timed out\n");
	scif_set_rtrg(port, 1);
}

1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121
static ssize_t rx_trigger_show(struct device *dev,
			       struct device_attribute *attr,
			       char *buf)
{
	struct uart_port *port = dev_get_drvdata(dev);
	struct sci_port *sci = to_sci_port(port);

	return sprintf(buf, "%d\n", sci->rx_trigger);
}

static ssize_t rx_trigger_store(struct device *dev,
				struct device_attribute *attr,
				const char *buf,
				size_t count)
{
	struct uart_port *port = dev_get_drvdata(dev);
	struct sci_port *sci = to_sci_port(port);
1122
	int ret;
1123 1124
	long r;

1125 1126 1127
	ret = kstrtol(buf, 0, &r);
	if (ret)
		return ret;
1128

1129
	sci->rx_trigger = scif_set_rtrg(port, r);
1130 1131 1132
	if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
		scif_set_rtrg(port, 1);

1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143
	return count;
}

static DEVICE_ATTR(rx_fifo_trigger, 0644, rx_trigger_show, rx_trigger_store);

static ssize_t rx_fifo_timeout_show(struct device *dev,
			       struct device_attribute *attr,
			       char *buf)
{
	struct uart_port *port = dev_get_drvdata(dev);
	struct sci_port *sci = to_sci_port(port);
1144
	int v;
1145

1146 1147 1148 1149 1150 1151
	if (port->type == PORT_HSCIF)
		v = sci->hscif_tot >> HSSCR_TOT_SHIFT;
	else
		v = sci->rx_fifo_timeout;

	return sprintf(buf, "%d\n", v);
1152 1153 1154 1155 1156 1157 1158 1159 1160
}

static ssize_t rx_fifo_timeout_store(struct device *dev,
				struct device_attribute *attr,
				const char *buf,
				size_t count)
{
	struct uart_port *port = dev_get_drvdata(dev);
	struct sci_port *sci = to_sci_port(port);
1161
	int ret;
1162 1163
	long r;

1164 1165 1166
	ret = kstrtol(buf, 0, &r);
	if (ret)
		return ret;
1167 1168 1169 1170 1171 1172 1173 1174 1175

	if (port->type == PORT_HSCIF) {
		if (r < 0 || r > 3)
			return -EINVAL;
		sci->hscif_tot = r << HSSCR_TOT_SHIFT;
	} else {
		sci->rx_fifo_timeout = r;
		scif_set_rtrg(port, 1);
		if (r > 0)
1176
			timer_setup(&sci->rx_fifo_timer, rx_fifo_timer_fn, 0);
1177 1178
	}

1179 1180 1181
	return count;
}

J
Joe Perches 已提交
1182
static DEVICE_ATTR_RW(rx_fifo_timeout);
1183 1184


1185
#ifdef CONFIG_SERIAL_SH_SCI_DMA
1186 1187 1188 1189 1190 1191
static void sci_dma_tx_complete(void *arg)
{
	struct sci_port *s = arg;
	struct uart_port *port = &s->port;
	struct circ_buf *xmit = &port->state->xmit;
	unsigned long flags;
1192

1193
	dev_dbg(port->dev, "%s(%d)\n", __func__, port->line);
1194

1195
	spin_lock_irqsave(&port->lock, flags);
1196

1197 1198
	xmit->tail += s->tx_dma_len;
	xmit->tail &= UART_XMIT_SIZE - 1;
1199

1200
	port->icount.tx += s->tx_dma_len;
L
Linus Torvalds 已提交
1201

1202 1203
	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(port);
L
Linus Torvalds 已提交
1204

1205 1206 1207 1208 1209 1210 1211 1212 1213 1214
	if (!uart_circ_empty(xmit)) {
		s->cookie_tx = 0;
		schedule_work(&s->work_tx);
	} else {
		s->cookie_tx = -EINVAL;
		if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
			u16 ctrl = serial_port_in(port, SCSCR);
			serial_port_out(port, SCSCR, ctrl & ~SCSCR_TIE);
		}
	}
L
Linus Torvalds 已提交
1215

1216
	spin_unlock_irqrestore(&port->lock, flags);
L
Linus Torvalds 已提交
1217 1218
}

1219 1220
/* Locking: called with port lock held */
static int sci_dma_rx_push(struct sci_port *s, void *buf, size_t count)
L
Linus Torvalds 已提交
1221
{
1222 1223 1224
	struct uart_port *port = &s->port;
	struct tty_port *tport = &port->state->port;
	int copied;
L
Linus Torvalds 已提交
1225

1226
	copied = tty_insert_flip_string(tport, buf, count);
1227
	if (copied < count)
1228
		port->icount.buf_overrun++;
L
Linus Torvalds 已提交
1229

1230
	port->icount.rx += copied;
L
Linus Torvalds 已提交
1231

1232
	return copied;
L
Linus Torvalds 已提交
1233 1234
}

1235
static int sci_dma_rx_find_active(struct sci_port *s)
L
Linus Torvalds 已提交
1236
{
1237
	unsigned int i;
L
Linus Torvalds 已提交
1238

1239 1240 1241
	for (i = 0; i < ARRAY_SIZE(s->cookie_rx); i++)
		if (s->active_rx == s->cookie_rx[i])
			return i;
L
Linus Torvalds 已提交
1242

1243
	return -1;
L
Linus Torvalds 已提交
1244 1245
}

1246
static void sci_rx_dma_release(struct sci_port *s)
P
Paul Mundt 已提交
1247
{
1248
	struct dma_chan *chan = s->chan_rx_saved;
1249

1250
	s->chan_rx_saved = s->chan_rx = NULL;
1251
	s->cookie_rx[0] = s->cookie_rx[1] = -EINVAL;
1252
	dmaengine_terminate_sync(chan);
1253 1254 1255
	dma_free_coherent(chan->device->dev, s->buf_len_rx * 2, s->rx_buf[0],
			  sg_dma_address(&s->sg_rx[0]));
	dma_release_channel(chan);
P
Paul Mundt 已提交
1256 1257
}

1258 1259 1260 1261 1262 1263 1264 1265 1266
static void start_hrtimer_us(struct hrtimer *hrt, unsigned long usec)
{
	long sec = usec / 1000000;
	long nsec = (usec % 1000000) * 1000;
	ktime_t t = ktime_set(sec, nsec);

	hrtimer_start(hrt, t, HRTIMER_MODE_REL);
}

1267
static void sci_dma_rx_complete(void *arg)
L
Linus Torvalds 已提交
1268
{
1269
	struct sci_port *s = arg;
1270
	struct dma_chan *chan = s->chan_rx;
1271
	struct uart_port *port = &s->port;
1272
	struct dma_async_tx_descriptor *desc;
1273 1274
	unsigned long flags;
	int active, count = 0;
L
Linus Torvalds 已提交
1275

1276 1277
	dev_dbg(port->dev, "%s(%d) active cookie %d\n", __func__, port->line,
		s->active_rx);
1278

1279
	spin_lock_irqsave(&port->lock, flags);
L
Linus Torvalds 已提交
1280

1281 1282 1283
	active = sci_dma_rx_find_active(s);
	if (active >= 0)
		count = sci_dma_rx_push(s, s->rx_buf[active], s->buf_len_rx);
P
Paul Mundt 已提交
1284

1285
	start_hrtimer_us(&s->rx_timer, s->rx_timeout);
P
Paul Mundt 已提交
1286

1287 1288
	if (count)
		tty_flip_buffer_push(&port->state->port);
1289

1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303
	desc = dmaengine_prep_slave_sg(s->chan_rx, &s->sg_rx[active], 1,
				       DMA_DEV_TO_MEM,
				       DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
	if (!desc)
		goto fail;

	desc->callback = sci_dma_rx_complete;
	desc->callback_param = s;
	s->cookie_rx[active] = dmaengine_submit(desc);
	if (dma_submit_error(s->cookie_rx[active]))
		goto fail;

	s->active_rx = s->cookie_rx[!active];

1304 1305
	dma_async_issue_pending(chan);

1306
	spin_unlock_irqrestore(&port->lock, flags);
1307 1308 1309 1310 1311 1312 1313
	dev_dbg(port->dev, "%s: cookie %d #%d, new active cookie %d\n",
		__func__, s->cookie_rx[active], active, s->active_rx);
	return;

fail:
	spin_unlock_irqrestore(&port->lock, flags);
	dev_warn(port->dev, "Failed submitting Rx DMA descriptor\n");
1314 1315 1316 1317 1318
	/* Switch to PIO */
	spin_lock_irqsave(&port->lock, flags);
	s->chan_rx = NULL;
	sci_start_rx(port);
	spin_unlock_irqrestore(&port->lock, flags);
L
Linus Torvalds 已提交
1319 1320
}

1321
static void sci_tx_dma_release(struct sci_port *s)
L
Linus Torvalds 已提交
1322
{
1323
	struct dma_chan *chan = s->chan_tx_saved;
L
Linus Torvalds 已提交
1324

1325
	cancel_work_sync(&s->work_tx);
1326
	s->chan_tx_saved = s->chan_tx = NULL;
1327
	s->cookie_tx = -EINVAL;
1328
	dmaengine_terminate_sync(chan);
1329 1330 1331 1332
	dma_unmap_single(chan->device->dev, s->tx_dma_addr, UART_XMIT_SIZE,
			 DMA_TO_DEVICE);
	dma_release_channel(chan);
}
1333

1334
static int sci_submit_rx(struct sci_port *s, bool port_lock_held)
1335 1336
{
	struct dma_chan *chan = s->chan_rx;
1337 1338
	struct uart_port *port = &s->port;
	unsigned long flags;
1339
	int i;
1340

1341 1342 1343
	for (i = 0; i < 2; i++) {
		struct scatterlist *sg = &s->sg_rx[i];
		struct dma_async_tx_descriptor *desc;
L
Linus Torvalds 已提交
1344

1345 1346 1347 1348 1349
		desc = dmaengine_prep_slave_sg(chan,
			sg, 1, DMA_DEV_TO_MEM,
			DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
		if (!desc)
			goto fail;
1350

1351 1352 1353 1354 1355
		desc->callback = sci_dma_rx_complete;
		desc->callback_param = s;
		s->cookie_rx[i] = dmaengine_submit(desc);
		if (dma_submit_error(s->cookie_rx[i]))
			goto fail;
1356

1357
	}
1358

1359
	s->active_rx = s->cookie_rx[0];
1360

1361
	dma_async_issue_pending(chan);
1362
	return 0;
1363

1364
fail:
1365 1366 1367
	/* Switch to PIO */
	if (!port_lock_held)
		spin_lock_irqsave(&port->lock, flags);
1368
	if (i)
1369
		dmaengine_terminate_async(chan);
1370 1371
	for (i = 0; i < 2; i++)
		s->cookie_rx[i] = -EINVAL;
1372
	s->active_rx = 0;
1373 1374
	s->chan_rx = NULL;
	sci_start_rx(port);
1375 1376
	if (!port_lock_held)
		spin_unlock_irqrestore(&port->lock, flags);
1377
	return -EAGAIN;
1378
}
1379

1380
static void work_fn_tx(struct work_struct *work)
L
Linus Torvalds 已提交
1381
{
1382 1383 1384 1385 1386
	struct sci_port *s = container_of(work, struct sci_port, work_tx);
	struct dma_async_tx_descriptor *desc;
	struct dma_chan *chan = s->chan_tx;
	struct uart_port *port = &s->port;
	struct circ_buf *xmit = &port->state->xmit;
1387
	unsigned long flags;
1388
	dma_addr_t buf;
L
Linus Torvalds 已提交
1389

1390
	/*
1391 1392 1393 1394 1395
	 * DMA is idle now.
	 * Port xmit buffer is already mapped, and it is one page... Just adjust
	 * offsets and lengths. Since it is a circular buffer, we have to
	 * transmit till the end, and then the rest. Take the port lock to get a
	 * consistent xmit buffer state.
1396
	 */
1397 1398 1399 1400 1401 1402
	spin_lock_irq(&port->lock);
	buf = s->tx_dma_addr + (xmit->tail & (UART_XMIT_SIZE - 1));
	s->tx_dma_len = min_t(unsigned int,
		CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE),
		CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE));
	spin_unlock_irq(&port->lock);
1403

1404 1405 1406 1407 1408
	desc = dmaengine_prep_slave_single(chan, buf, s->tx_dma_len,
					   DMA_MEM_TO_DEV,
					   DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
	if (!desc) {
		dev_warn(port->dev, "Failed preparing Tx DMA descriptor\n");
1409
		goto switch_to_pio;
1410
	}
1411

1412 1413
	dma_sync_single_for_device(chan->device->dev, buf, s->tx_dma_len,
				   DMA_TO_DEVICE);
L
Linus Torvalds 已提交
1414

1415 1416 1417 1418 1419 1420 1421
	spin_lock_irq(&port->lock);
	desc->callback = sci_dma_tx_complete;
	desc->callback_param = s;
	spin_unlock_irq(&port->lock);
	s->cookie_tx = dmaengine_submit(desc);
	if (dma_submit_error(s->cookie_tx)) {
		dev_warn(port->dev, "Failed submitting Tx DMA descriptor\n");
1422
		goto switch_to_pio;
L
Linus Torvalds 已提交
1423 1424
	}

1425 1426
	dev_dbg(port->dev, "%s: %p: %d...%d, cookie %d\n",
		__func__, xmit->buf, xmit->tail, xmit->head, s->cookie_tx);
1427

1428
	dma_async_issue_pending(chan);
1429 1430 1431 1432 1433 1434 1435 1436
	return;

switch_to_pio:
	spin_lock_irqsave(&port->lock, flags);
	s->chan_tx = NULL;
	sci_start_tx(port);
	spin_unlock_irqrestore(&port->lock, flags);
	return;
L
Linus Torvalds 已提交
1437 1438
}

1439
static enum hrtimer_restart rx_timer_fn(struct hrtimer *t)
L
Linus Torvalds 已提交
1440
{
1441
	struct sci_port *s = container_of(t, struct sci_port, rx_timer);
1442
	struct dma_chan *chan = s->chan_rx;
1443
	struct uart_port *port = &s->port;
1444 1445 1446 1447 1448 1449 1450 1451 1452
	struct dma_tx_state state;
	enum dma_status status;
	unsigned long flags;
	unsigned int read;
	int active, count;
	u16 scr;

	dev_dbg(port->dev, "DMA Rx timed out\n");

1453 1454
	spin_lock_irqsave(&port->lock, flags);

1455 1456 1457
	active = sci_dma_rx_find_active(s);
	if (active < 0) {
		spin_unlock_irqrestore(&port->lock, flags);
1458
		return HRTIMER_NORESTART;
1459 1460 1461
	}

	status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state);
1462
	if (status == DMA_COMPLETE) {
1463
		spin_unlock_irqrestore(&port->lock, flags);
1464 1465
		dev_dbg(port->dev, "Cookie %d #%d has already completed\n",
			s->active_rx, active);
1466 1467

		/* Let packet complete handler take care of the packet */
1468
		return HRTIMER_NORESTART;
1469
	}
1470

1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482
	dmaengine_pause(chan);

	/*
	 * sometimes DMA transfer doesn't stop even if it is stopped and
	 * data keeps on coming until transaction is complete so check
	 * for DMA_COMPLETE again
	 * Let packet complete handler take care of the packet
	 */
	status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state);
	if (status == DMA_COMPLETE) {
		spin_unlock_irqrestore(&port->lock, flags);
		dev_dbg(port->dev, "Transaction complete after DMA engine was stopped");
1483
		return HRTIMER_NORESTART;
1484 1485
	}

1486
	/* Handle incomplete DMA receive */
1487
	dmaengine_terminate_async(s->chan_rx);
1488 1489 1490 1491 1492 1493 1494 1495
	read = sg_dma_len(&s->sg_rx[active]) - state.residue;

	if (read) {
		count = sci_dma_rx_push(s, s->rx_buf[active], read);
		if (count)
			tty_flip_buffer_push(&port->state->port);
	}

1496
	if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
1497
		sci_submit_rx(s, true);
1498 1499 1500 1501 1502 1503 1504 1505 1506 1507

	/* Direct new serial port interrupts back to CPU */
	scr = serial_port_in(port, SCSCR);
	if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
		scr &= ~SCSCR_RDRQE;
		enable_irq(s->irqs[SCIx_RXI_IRQ]);
	}
	serial_port_out(port, SCSCR, scr | SCSCR_RIE);

	spin_unlock_irqrestore(&port->lock, flags);
1508 1509

	return HRTIMER_NORESTART;
L
Linus Torvalds 已提交
1510 1511
}

1512
static struct dma_chan *sci_request_dma_chan(struct uart_port *port,
1513
					     enum dma_transfer_direction dir)
1514 1515 1516 1517 1518
{
	struct dma_chan *chan;
	struct dma_slave_config cfg;
	int ret;

1519 1520
	chan = dma_request_slave_channel(port->dev,
					 dir == DMA_MEM_TO_DEV ? "tx" : "rx");
1521
	if (!chan) {
1522
		dev_dbg(port->dev, "dma_request_slave_channel failed\n");
1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547
		return NULL;
	}

	memset(&cfg, 0, sizeof(cfg));
	cfg.direction = dir;
	if (dir == DMA_MEM_TO_DEV) {
		cfg.dst_addr = port->mapbase +
			(sci_getreg(port, SCxTDR)->offset << port->regshift);
		cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
	} else {
		cfg.src_addr = port->mapbase +
			(sci_getreg(port, SCxRDR)->offset << port->regshift);
		cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
	}

	ret = dmaengine_slave_config(chan, &cfg);
	if (ret) {
		dev_warn(port->dev, "dmaengine_slave_config failed %d\n", ret);
		dma_release_channel(chan);
		return NULL;
	}

	return chan;
}

1548
static void sci_request_dma(struct uart_port *port)
1549
{
1550 1551
	struct sci_port *s = to_sci_port(port);
	struct dma_chan *chan;
1552

1553
	dev_dbg(port->dev, "%s: port %d\n", __func__, port->line);
1554

1555
	if (!port->dev->of_node)
1556
		return;
1557

1558
	s->cookie_tx = -EINVAL;
1559 1560 1561 1562 1563 1564 1565 1566

	/*
	 * Don't request a dma channel if no channel was specified
	 * in the device tree.
	 */
	if (!of_find_property(port->dev->of_node, "dmas", NULL))
		return;

1567
	chan = sci_request_dma_chan(port, DMA_MEM_TO_DEV);
1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581
	dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan);
	if (chan) {
		/* UART circular tx buffer is an aligned page. */
		s->tx_dma_addr = dma_map_single(chan->device->dev,
						port->state->xmit.buf,
						UART_XMIT_SIZE,
						DMA_TO_DEVICE);
		if (dma_mapping_error(chan->device->dev, s->tx_dma_addr)) {
			dev_warn(port->dev, "Failed mapping Tx DMA descriptor\n");
			dma_release_channel(chan);
		} else {
			dev_dbg(port->dev, "%s: mapped %lu@%p to %pad\n",
				__func__, UART_XMIT_SIZE,
				port->state->xmit.buf, &s->tx_dma_addr);
1582

1583
			INIT_WORK(&s->work_tx, work_fn_tx);
1584
			s->chan_tx_saved = s->chan_tx = chan;
1585
		}
1586 1587
	}

1588
	chan = sci_request_dma_chan(port, DMA_DEV_TO_MEM);
1589 1590 1591 1592 1593
	dev_dbg(port->dev, "%s: RX: got channel %p\n", __func__, chan);
	if (chan) {
		unsigned int i;
		dma_addr_t dma;
		void *buf;
1594

1595 1596 1597 1598 1599 1600 1601 1602 1603
		s->buf_len_rx = 2 * max_t(size_t, 16, port->fifosize);
		buf = dma_alloc_coherent(chan->device->dev, s->buf_len_rx * 2,
					 &dma, GFP_KERNEL);
		if (!buf) {
			dev_warn(port->dev,
				 "Failed to allocate Rx dma buffer, using PIO\n");
			dma_release_channel(chan);
			return;
		}
1604

1605 1606
		for (i = 0; i < 2; i++) {
			struct scatterlist *sg = &s->sg_rx[i];
1607

1608 1609 1610
			sg_init_table(sg, 1);
			s->rx_buf[i] = buf;
			sg_dma_address(sg) = dma;
1611
			sg_dma_len(sg) = s->buf_len_rx;
1612

1613 1614 1615 1616
			buf += s->buf_len_rx;
			dma += s->buf_len_rx;
		}

1617 1618
		hrtimer_init(&s->rx_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
		s->rx_timer.function = rx_timer_fn;
1619

1620 1621
		s->chan_rx_saved = s->chan_rx = chan;

1622
		if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
1623
			sci_submit_rx(s, false);
1624
	}
1625 1626
}

1627
static void sci_free_dma(struct uart_port *port)
1628
{
1629
	struct sci_port *s = to_sci_port(port);
1630

1631 1632 1633 1634
	if (s->chan_tx_saved)
		sci_tx_dma_release(s);
	if (s->chan_rx_saved)
		sci_rx_dma_release(s);
1635
}
1636 1637 1638 1639 1640 1641 1642 1643 1644 1645

static void sci_flush_buffer(struct uart_port *port)
{
	/*
	 * In uart_flush_buffer(), the xmit circular buffer has just been
	 * cleared, so we have to reset tx_dma_len accordingly.
	 */
	to_sci_port(port)->tx_dma_len = 0;
}
#else /* !CONFIG_SERIAL_SH_SCI_DMA */
1646 1647 1648
static inline void sci_request_dma(struct uart_port *port)
{
}
1649

1650 1651 1652
static inline void sci_free_dma(struct uart_port *port)
{
}
1653 1654 1655

#define sci_flush_buffer	NULL
#endif /* !CONFIG_SERIAL_SH_SCI_DMA */
1656

1657 1658 1659 1660
static irqreturn_t sci_rx_interrupt(int irq, void *ptr)
{
	struct uart_port *port = ptr;
	struct sci_port *s = to_sci_port(port);
1661

1662
#ifdef CONFIG_SERIAL_SH_SCI_DMA
1663 1664 1665
	if (s->chan_rx) {
		u16 scr = serial_port_in(port, SCSCR);
		u16 ssr = serial_port_in(port, SCxSR);
1666

1667 1668 1669 1670 1671
		/* Disable future Rx interrupts */
		if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
			disable_irq_nosync(irq);
			scr |= SCSCR_RDRQE;
		} else {
1672 1673 1674
			if (sci_submit_rx(s, false) < 0)
				goto handle_pio;

1675 1676 1677 1678 1679 1680
			scr &= ~SCSCR_RIE;
		}
		serial_port_out(port, SCSCR, scr);
		/* Clear current interrupt */
		serial_port_out(port, SCxSR,
				ssr & ~(SCIF_DR | SCxSR_RDxF(port)));
1681
		dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u us\n",
1682
			jiffies, s->rx_timeout);
1683
		start_hrtimer_us(&s->rx_timer, s->rx_timeout);
1684

1685 1686
		return IRQ_HANDLED;
	}
1687 1688

handle_pio:
1689
#endif
1690

1691 1692 1693 1694 1695
	if (s->rx_trigger > 1 && s->rx_fifo_timeout > 0) {
		if (!scif_rtrg_enabled(port))
			scif_set_rtrg(port, s->rx_trigger);

		mod_timer(&s->rx_fifo_timer, jiffies + DIV_ROUND_UP(
1696
			  s->rx_frame * HZ * s->rx_fifo_timeout, 1000000));
1697 1698
	}

1699 1700 1701 1702
	/* I think sci_receive_chars has to be called irrespective
	 * of whether the I_IXOFF is set, otherwise, how is the interrupt
	 * to be disabled?
	 */
1703
	sci_receive_chars(port);
1704 1705

	return IRQ_HANDLED;
1706 1707
}

1708
static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
1709
{
1710
	struct uart_port *port = ptr;
1711
	unsigned long flags;
1712

1713
	spin_lock_irqsave(&port->lock, flags);
1714
	sci_transmit_chars(port);
1715
	spin_unlock_irqrestore(&port->lock, flags);
1716 1717

	return IRQ_HANDLED;
1718 1719
}

1720 1721 1722 1723 1724 1725 1726 1727 1728 1729
static irqreturn_t sci_br_interrupt(int irq, void *ptr)
{
	struct uart_port *port = ptr;

	/* Handle BREAKs */
	sci_handle_breaks(port);
	sci_clear_SCxSR(port, SCxSR_BREAK_CLEAR(port));

	return IRQ_HANDLED;
}
1730

1731
static irqreturn_t sci_er_interrupt(int irq, void *ptr)
1732
{
1733 1734
	struct uart_port *port = ptr;
	struct sci_port *s = to_sci_port(port);
1735

1736
	if (s->irqs[SCIx_ERI_IRQ] == s->irqs[SCIx_BRI_IRQ]) {
1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748
		/* Break and Error interrupts are muxed */
		unsigned short ssr_status = serial_port_in(port, SCxSR);

		/* Break Interrupt */
		if (ssr_status & SCxSR_BRK(port))
			sci_br_interrupt(irq, ptr);

		/* Break only? */
		if (!(ssr_status & SCxSR_ERRORS(port)))
			return IRQ_HANDLED;
	}

1749 1750 1751 1752 1753 1754 1755 1756 1757 1758
	/* Handle errors */
	if (port->type == PORT_SCI) {
		if (sci_handle_errors(port)) {
			/* discard character in rx buffer */
			serial_port_in(port, SCxSR);
			sci_clear_SCxSR(port, SCxSR_RDxF_CLEAR(port));
		}
	} else {
		sci_handle_fifo_overrun(port);
		if (!s->chan_rx)
1759
			sci_receive_chars(port);
1760 1761 1762 1763 1764 1765 1766 1767 1768
	}

	sci_clear_SCxSR(port, SCxSR_ERROR_CLEAR(port));

	/* Kick the transmission */
	if (!s->chan_tx)
		sci_tx_interrupt(irq, ptr);

	return IRQ_HANDLED;
1769 1770
}

1771 1772 1773 1774 1775 1776
static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
{
	unsigned short ssr_status, scr_status, err_enabled, orer_status = 0;
	struct uart_port *port = ptr;
	struct sci_port *s = to_sci_port(port);
	irqreturn_t ret = IRQ_NONE;
1777

1778 1779
	ssr_status = serial_port_in(port, SCxSR);
	scr_status = serial_port_in(port, SCSCR);
1780
	if (s->params->overrun_reg == SCxSR)
1781
		orer_status = ssr_status;
1782 1783
	else if (sci_getreg(port, s->params->overrun_reg)->size)
		orer_status = serial_port_in(port, s->params->overrun_reg);
1784

1785
	err_enabled = scr_status & port_rx_irq_mask(port);
1786

1787 1788 1789 1790
	/* Tx Interrupt */
	if ((ssr_status & SCxSR_TDxE(port)) && (scr_status & SCSCR_TIE) &&
	    !s->chan_tx)
		ret = sci_tx_interrupt(irq, ptr);
1791

1792 1793 1794 1795 1796 1797 1798
	/*
	 * Rx Interrupt: if we're using DMA, the DMA controller clears RDF /
	 * DR flags
	 */
	if (((ssr_status & SCxSR_RDxF(port)) || s->chan_rx) &&
	    (scr_status & SCSCR_RIE))
		ret = sci_rx_interrupt(irq, ptr);
1799

1800 1801 1802
	/* Error Interrupt */
	if ((ssr_status & SCxSR_ERRORS(port)) && err_enabled)
		ret = sci_er_interrupt(irq, ptr);
1803

1804 1805 1806 1807 1808
	/* Break Interrupt */
	if ((ssr_status & SCxSR_BRK(port)) && err_enabled)
		ret = sci_br_interrupt(irq, ptr);

	/* Overrun Interrupt */
1809
	if (orer_status & s->params->overrun_mask) {
1810 1811
		sci_handle_fifo_overrun(port);
		ret = IRQ_HANDLED;
1812 1813
	}

1814 1815
	return ret;
}
1816

1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827
static const struct sci_irq_desc {
	const char	*desc;
	irq_handler_t	handler;
} sci_irq_desc[] = {
	/*
	 * Split out handlers, the default case.
	 */
	[SCIx_ERI_IRQ] = {
		.desc = "rx err",
		.handler = sci_er_interrupt,
	},
1828

1829 1830 1831 1832
	[SCIx_RXI_IRQ] = {
		.desc = "rx full",
		.handler = sci_rx_interrupt,
	},
1833

1834 1835 1836 1837
	[SCIx_TXI_IRQ] = {
		.desc = "tx empty",
		.handler = sci_tx_interrupt,
	},
1838

1839 1840 1841 1842
	[SCIx_BRI_IRQ] = {
		.desc = "break",
		.handler = sci_br_interrupt,
	},
1843

1844 1845 1846 1847 1848 1849 1850 1851 1852 1853
	[SCIx_DRI_IRQ] = {
		.desc = "rx ready",
		.handler = sci_rx_interrupt,
	},

	[SCIx_TEI_IRQ] = {
		.desc = "tx end",
		.handler = sci_tx_interrupt,
	},

1854
	/*
1855
	 * Special muxed handler.
1856
	 */
1857 1858 1859 1860 1861
	[SCIx_MUX_IRQ] = {
		.desc = "mux",
		.handler = sci_mpxed_interrupt,
	},
};
1862

1863 1864 1865
static int sci_request_irq(struct sci_port *port)
{
	struct uart_port *up = &port->port;
1866
	int i, j, w, ret = 0;
1867

1868 1869 1870
	for (i = j = 0; i < SCIx_NR_IRQS; i++, j++) {
		const struct sci_irq_desc *desc;
		int irq;
1871

1872 1873 1874 1875 1876 1877 1878
		/* Check if already registered (muxed) */
		for (w = 0; w < i; w++)
			if (port->irqs[w] == port->irqs[i])
				w = i + 1;
		if (w > i)
			continue;

1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893
		if (SCIx_IRQ_IS_MUXED(port)) {
			i = SCIx_MUX_IRQ;
			irq = up->irq;
		} else {
			irq = port->irqs[i];

			/*
			 * Certain port types won't support all of the
			 * available interrupt sources.
			 */
			if (unlikely(irq < 0))
				continue;
		}

		desc = sci_irq_desc + i;
1894 1895
		port->irqstr[j] = kasprintf(GFP_KERNEL, "%s:%s",
					    dev_name(up->dev), desc->desc);
1896 1897
		if (!port->irqstr[j]) {
			ret = -ENOMEM;
1898
			goto out_nomem;
1899
		}
1900 1901 1902 1903 1904 1905 1906

		ret = request_irq(irq, desc->handler, up->irqflags,
				  port->irqstr[j], port);
		if (unlikely(ret)) {
			dev_err(up->dev, "Can't allocate %s IRQ\n", desc->desc);
			goto out_noirq;
		}
1907 1908
	}

1909
	return 0;
L
Linus Torvalds 已提交
1910

1911 1912 1913
out_noirq:
	while (--i >= 0)
		free_irq(port->irqs[i], port);
P
Paul Mundt 已提交
1914

1915 1916 1917
out_nomem:
	while (--j >= 0)
		kfree(port->irqstr[j]);
P
Paul Mundt 已提交
1918

1919
	return ret;
L
Linus Torvalds 已提交
1920 1921
}

1922
static void sci_free_irq(struct sci_port *port)
L
Linus Torvalds 已提交
1923
{
1924
	int i;
L
Linus Torvalds 已提交
1925

1926 1927 1928 1929 1930 1931
	/*
	 * Intentionally in reverse order so we iterate over the muxed
	 * IRQ first.
	 */
	for (i = 0; i < SCIx_NR_IRQS; i++) {
		int irq = port->irqs[i];
P
Paul Mundt 已提交
1932

1933 1934 1935 1936 1937 1938
		/*
		 * Certain port types won't support all of the available
		 * interrupt sources.
		 */
		if (unlikely(irq < 0))
			continue;
P
Paul Mundt 已提交
1939

1940 1941
		free_irq(port->irqs[i], port);
		kfree(port->irqstr[i]);
P
Paul Mundt 已提交
1942

1943 1944 1945 1946 1947
		if (SCIx_IRQ_IS_MUXED(port)) {
			/* If there's only one IRQ, we're done. */
			return;
		}
	}
L
Linus Torvalds 已提交
1948 1949
}

1950
static unsigned int sci_tx_empty(struct uart_port *port)
L
Linus Torvalds 已提交
1951
{
1952 1953
	unsigned short status = serial_port_in(port, SCxSR);
	unsigned short in_tx_fifo = sci_txfill(port);
P
Paul Mundt 已提交
1954

1955
	return (status & SCxSR_TEND(port)) && !in_tx_fifo ? TIOCSER_TEMT : 0;
L
Linus Torvalds 已提交
1956 1957
}

1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997
static void sci_set_rts(struct uart_port *port, bool state)
{
	if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
		u16 data = serial_port_in(port, SCPDR);

		/* Active low */
		if (state)
			data &= ~SCPDR_RTSD;
		else
			data |= SCPDR_RTSD;
		serial_port_out(port, SCPDR, data);

		/* RTS# is output */
		serial_port_out(port, SCPCR,
				serial_port_in(port, SCPCR) | SCPCR_RTSC);
	} else if (sci_getreg(port, SCSPTR)->size) {
		u16 ctrl = serial_port_in(port, SCSPTR);

		/* Active low */
		if (state)
			ctrl &= ~SCSPTR_RTSDT;
		else
			ctrl |= SCSPTR_RTSDT;
		serial_port_out(port, SCSPTR, ctrl);
	}
}

static bool sci_get_cts(struct uart_port *port)
{
	if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
		/* Active low */
		return !(serial_port_in(port, SCPDR) & SCPDR_CTSD);
	} else if (sci_getreg(port, SCSPTR)->size) {
		/* Active low */
		return !(serial_port_in(port, SCSPTR) & SCSPTR_CTSDT);
	}

	return true;
}

1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010
/*
 * Modem control is a bit of a mixed bag for SCI(F) ports. Generally
 * CTS/RTS is supported in hardware by at least one port and controlled
 * via SCSPTR (SCxPCR for SCIFA/B parts), or external pins (presently
 * handled via the ->init_pins() op, which is a bit of a one-way street,
 * lacking any ability to defer pin control -- this will later be
 * converted over to the GPIO framework).
 *
 * Other modes (such as loopback) are supported generically on certain
 * port types, but not others. For these it's sufficient to test for the
 * existence of the support register and simply ignore the port type.
 */
static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
L
Linus Torvalds 已提交
2011
{
2012 2013
	struct sci_port *s = to_sci_port(port);

2014 2015
	if (mctrl & TIOCM_LOOP) {
		const struct plat_sci_reg *reg;
P
Paul Mundt 已提交
2016

2017 2018 2019 2020 2021 2022 2023 2024 2025
		/*
		 * Standard loopback mode for SCFCR ports.
		 */
		reg = sci_getreg(port, SCFCR);
		if (reg->size)
			serial_port_out(port, SCFCR,
					serial_port_in(port, SCFCR) |
					SCFCR_LOOP);
	}
2026 2027

	mctrl_gpio_set(s->gpios, mctrl);
2028

2029
	if (!s->has_rtscts)
2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052
		return;

	if (!(mctrl & TIOCM_RTS)) {
		/* Disable Auto RTS */
		serial_port_out(port, SCFCR,
				serial_port_in(port, SCFCR) & ~SCFCR_MCE);

		/* Clear RTS */
		sci_set_rts(port, 0);
	} else if (s->autorts) {
		if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
			/* Enable RTS# pin function */
			serial_port_out(port, SCPCR,
				serial_port_in(port, SCPCR) & ~SCPCR_RTSC);
		}

		/* Enable Auto RTS */
		serial_port_out(port, SCFCR,
				serial_port_in(port, SCFCR) | SCFCR_MCE);
	} else {
		/* Set RTS */
		sci_set_rts(port, 1);
	}
2053
}
P
Paul Mundt 已提交
2054

2055 2056
static unsigned int sci_get_mctrl(struct uart_port *port)
{
2057 2058 2059 2060 2061 2062
	struct sci_port *s = to_sci_port(port);
	struct mctrl_gpios *gpios = s->gpios;
	unsigned int mctrl = 0;

	mctrl_gpio_get(gpios, &mctrl);

2063 2064
	/*
	 * CTS/RTS is handled in hardware when supported, while nothing
2065
	 * else is wired up.
2066
	 */
2067 2068 2069 2070
	if (s->autorts) {
		if (sci_get_cts(port))
			mctrl |= TIOCM_CTS;
	} else if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(gpios, UART_GPIO_CTS))) {
2071
		mctrl |= TIOCM_CTS;
2072
	}
2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083
	if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(gpios, UART_GPIO_DSR)))
		mctrl |= TIOCM_DSR;
	if (IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(gpios, UART_GPIO_DCD)))
		mctrl |= TIOCM_CAR;

	return mctrl;
}

static void sci_enable_ms(struct uart_port *port)
{
	mctrl_gpio_enable_ms(to_sci_port(port)->gpios);
L
Linus Torvalds 已提交
2084 2085 2086 2087
}

static void sci_break_ctl(struct uart_port *port, int break_state)
{
2088
	unsigned short scscr, scsptr;
2089
	unsigned long flags;
2090

2091
	/* check wheter the port has SCSPTR */
2092
	if (!sci_getreg(port, SCSPTR)->size) {
2093 2094 2095 2096
		/*
		 * Not supported by hardware. Most parts couple break and rx
		 * interrupts together, with break detection always enabled.
		 */
2097
		return;
2098
	}
2099

2100
	spin_lock_irqsave(&port->lock, flags);
2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113
	scsptr = serial_port_in(port, SCSPTR);
	scscr = serial_port_in(port, SCSCR);

	if (break_state == -1) {
		scsptr = (scsptr | SCSPTR_SPB2IO) & ~SCSPTR_SPB2DT;
		scscr &= ~SCSCR_TE;
	} else {
		scsptr = (scsptr | SCSPTR_SPB2DT) & ~SCSPTR_SPB2IO;
		scscr |= SCSCR_TE;
	}

	serial_port_out(port, SCSPTR, scsptr);
	serial_port_out(port, SCSCR, scscr);
2114
	spin_unlock_irqrestore(&port->lock, flags);
L
Linus Torvalds 已提交
2115 2116 2117 2118
}

static int sci_startup(struct uart_port *port)
{
2119
	struct sci_port *s = to_sci_port(port);
2120
	int ret;
L
Linus Torvalds 已提交
2121

2122 2123
	dev_dbg(port->dev, "%s(%d)\n", __func__, port->line);

2124 2125
	sci_request_dma(port);

2126
	ret = sci_request_irq(s);
2127 2128
	if (unlikely(ret < 0)) {
		sci_free_dma(port);
2129
		return ret;
2130
	}
2131

L
Linus Torvalds 已提交
2132 2133 2134 2135 2136
	return 0;
}

static void sci_shutdown(struct uart_port *port)
{
2137
	struct sci_port *s = to_sci_port(port);
2138
	unsigned long flags;
2139
	u16 scr;
L
Linus Torvalds 已提交
2140

2141 2142
	dev_dbg(port->dev, "%s(%d)\n", __func__, port->line);

2143
	s->autorts = false;
2144 2145
	mctrl_gpio_disable_ms(to_sci_port(port)->gpios);

2146
	spin_lock_irqsave(&port->lock, flags);
L
Linus Torvalds 已提交
2147
	sci_stop_rx(port);
2148
	sci_stop_tx(port);
2149 2150 2151 2152
	/*
	 * Stop RX and TX, disable related interrupts, keep clock source
	 * and HSCIF TOT bits
	 */
2153
	scr = serial_port_in(port, SCSCR);
2154 2155
	serial_port_out(port, SCSCR, scr &
			(SCSCR_CKE1 | SCSCR_CKE0 | s->hscif_tot));
2156
	spin_unlock_irqrestore(&port->lock, flags);
2157

2158
#ifdef CONFIG_SERIAL_SH_SCI_DMA
2159
	if (s->chan_rx_saved) {
2160 2161
		dev_dbg(port->dev, "%s(%d) deleting rx_timer\n", __func__,
			port->line);
2162
		hrtimer_cancel(&s->rx_timer);
2163 2164 2165
	}
#endif

2166 2167
	if (s->rx_trigger > 1 && s->rx_fifo_timeout > 0)
		del_timer_sync(&s->rx_fifo_timer);
L
Linus Torvalds 已提交
2168
	sci_free_irq(s);
2169
	sci_free_dma(port);
L
Linus Torvalds 已提交
2170 2171
}

2172 2173
static int sci_sck_calc(struct sci_port *s, unsigned int bps,
			unsigned int *srr)
2174
{
2175 2176
	unsigned long freq = s->clk_rates[SCI_SCK];
	int err, min_err = INT_MAX;
2177
	unsigned int sr;
2178

2179 2180
	if (s->port.type != PORT_HSCIF)
		freq *= 2;
2181

2182
	for_each_sr(sr, s) {
2183 2184 2185 2186 2187 2188
		err = DIV_ROUND_CLOSEST(freq, sr) - bps;
		if (abs(err) >= abs(min_err))
			continue;

		min_err = err;
		*srr = sr - 1;
2189

2190 2191 2192
		if (!err)
			break;
	}
2193

2194 2195 2196
	dev_dbg(s->port.dev, "SCK: %u%+d bps using SR %u\n", bps, min_err,
		*srr + 1);
	return min_err;
2197 2198
}

2199 2200 2201
static int sci_brg_calc(struct sci_port *s, unsigned int bps,
			unsigned long freq, unsigned int *dlr,
			unsigned int *srr)
2202
{
2203
	int err, min_err = INT_MAX;
2204
	unsigned int sr, dl;
2205

2206 2207
	if (s->port.type != PORT_HSCIF)
		freq *= 2;
2208

2209
	for_each_sr(sr, s) {
2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223
		dl = DIV_ROUND_CLOSEST(freq, sr * bps);
		dl = clamp(dl, 1U, 65535U);

		err = DIV_ROUND_CLOSEST(freq, sr * dl) - bps;
		if (abs(err) >= abs(min_err))
			continue;

		min_err = err;
		*dlr = dl;
		*srr = sr - 1;

		if (!err)
			break;
	}
2224

2225 2226 2227 2228
	dev_dbg(s->port.dev, "BRG: %u%+d bps using DL %u SR %u\n", bps,
		min_err, *dlr, *srr + 1);
	return min_err;
}
2229

2230
/* calculate sample rate, BRR, and clock select */
2231 2232 2233
static int sci_scbrr_calc(struct sci_port *s, unsigned int bps,
			  unsigned int *brr, unsigned int *srr,
			  unsigned int *cks)
U
Ulrich Hecht 已提交
2234
{
2235
	unsigned long freq = s->clk_rates[SCI_FCK];
2236
	unsigned int sr, br, prediv, scrate, c;
2237
	int err, min_err = INT_MAX;
U
Ulrich Hecht 已提交
2238

2239 2240
	if (s->port.type != PORT_HSCIF)
		freq *= 2;
2241

2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256
	/*
	 * Find the combination of sample rate and clock select with the
	 * smallest deviation from the desired baud rate.
	 * Prefer high sample rates to maximise the receive margin.
	 *
	 * M: Receive margin (%)
	 * N: Ratio of bit rate to clock (N = sampling rate)
	 * D: Clock duty (D = 0 to 1.0)
	 * L: Frame length (L = 9 to 12)
	 * F: Absolute value of clock frequency deviation
	 *
	 *  M = |(0.5 - 1 / 2 * N) - ((L - 0.5) * F) -
	 *      (|D - 0.5| / N * (1 + F))|
	 *  NOTE: Usually, treat D for 0.5, F is 0 by this calculation.
	 */
2257
	for_each_sr(sr, s) {
U
Ulrich Hecht 已提交
2258 2259
		for (c = 0; c <= 3; c++) {
			/* integerized formulas from HSCIF documentation */
2260
			prediv = sr * (1 << (2 * c + 1));
2261 2262 2263 2264 2265

			/*
			 * We need to calculate:
			 *
			 *     br = freq / (prediv * bps) clamped to [1..256]
2266
			 *     err = freq / (br * prediv) - bps
2267
			 *
2268 2269
			 * Watch out for overflow when calculating the desired
			 * sampling clock rate!
2270
			 */
2271 2272 2273 2274 2275
			if (bps > UINT_MAX / prediv)
				break;

			scrate = prediv * bps;
			br = DIV_ROUND_CLOSEST(freq, scrate);
2276
			br = clamp(br, 1U, 256U);
2277

2278
			err = DIV_ROUND_CLOSEST(freq, br * prediv) - bps;
2279
			if (abs(err) >= abs(min_err))
2280 2281
				continue;

2282
			min_err = err;
2283
			*brr = br - 1;
2284 2285
			*srr = sr - 1;
			*cks = c;
2286 2287 2288

			if (!err)
				goto found;
U
Ulrich Hecht 已提交
2289 2290 2291
		}
	}

2292
found:
2293 2294
	dev_dbg(s->port.dev, "BRR: %u%+d bps using N %u SR %u cks %u\n", bps,
		min_err, *brr, *srr + 1, *cks);
2295
	return min_err;
U
Ulrich Hecht 已提交
2296 2297
}

2298 2299
static void sci_reset(struct uart_port *port)
{
2300
	const struct plat_sci_reg *reg;
2301
	unsigned int status;
2302
	struct sci_port *s = to_sci_port(port);
2303

2304
	serial_port_out(port, SCSCR, s->hscif_tot);	/* TE=0, RE=0, CKE1=0 */
2305

2306 2307
	reg = sci_getreg(port, SCFCR);
	if (reg->size)
2308
		serial_port_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
2309 2310 2311 2312

	sci_clear_SCxSR(port,
			SCxSR_RDxF_CLEAR(port) & SCxSR_ERROR_CLEAR(port) &
			SCxSR_BREAK_CLEAR(port));
2313 2314 2315 2316 2317
	if (sci_getreg(port, SCLSR)->size) {
		status = serial_port_in(port, SCLSR);
		status &= ~(SCLSR_TO | SCLSR_ORER);
		serial_port_out(port, SCLSR, status);
	}
2318

2319 2320 2321
	if (s->rx_trigger > 1) {
		if (s->rx_fifo_timeout) {
			scif_set_rtrg(port, 1);
2322
			timer_setup(&s->rx_fifo_timer, rx_fifo_timer_fn, 0);
2323
		} else {
2324 2325 2326 2327 2328
			if (port->type == PORT_SCIFA ||
			    port->type == PORT_SCIFB)
				scif_set_rtrg(port, 1);
			else
				scif_set_rtrg(port, s->rx_trigger);
2329 2330
		}
	}
2331 2332
}

A
Alan Cox 已提交
2333 2334
static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
			    struct ktermios *old)
L
Linus Torvalds 已提交
2335
{
2336
	unsigned int baud, smr_val = SCSMR_ASYNC, scr_val = 0, i, bits;
2337 2338
	unsigned int brr = 255, cks = 0, srr = 15, dl = 0, sccks = 0;
	unsigned int brr1 = 255, cks1 = 0, srr1 = 15, dl1 = 0;
2339
	struct sci_port *s = to_sci_port(port);
2340
	const struct plat_sci_reg *reg;
2341 2342 2343
	int min_err = INT_MAX, err;
	unsigned long max_freq = 0;
	int best_clk = -1;
2344
	unsigned long flags;
L
Linus Torvalds 已提交
2345

2346 2347 2348 2349 2350 2351 2352 2353 2354
	if ((termios->c_cflag & CSIZE) == CS7)
		smr_val |= SCSMR_CHR;
	if (termios->c_cflag & PARENB)
		smr_val |= SCSMR_PE;
	if (termios->c_cflag & PARODD)
		smr_val |= SCSMR_PE | SCSMR_ODD;
	if (termios->c_cflag & CSTOPB)
		smr_val |= SCSMR_STOP;

2355 2356 2357 2358 2359 2360 2361 2362
	/*
	 * earlyprintk comes here early on with port->uartclk set to zero.
	 * the clock framework is not up and running at this point so here
	 * we assume that 115200 is the maximum baud rate. please note that
	 * the baud rate is not programmed during earlyprintk - it is assumed
	 * that the previous boot loader has enabled required clocks and
	 * setup the baud rate generator hardware for us already.
	 */
2363 2364 2365 2366
	if (!port->uartclk) {
		baud = uart_get_baud_rate(port, termios, old, 0, 115200);
		goto done;
	}
L
Linus Torvalds 已提交
2367

2368 2369 2370
	for (i = 0; i < SCI_NUM_CLKS; i++)
		max_freq = max(max_freq, s->clk_rates[i]);

2371
	baud = uart_get_baud_rate(port, termios, old, 0, max_freq / min_sr(s));
2372 2373 2374 2375 2376 2377 2378 2379
	if (!baud)
		goto done;

	/*
	 * There can be multiple sources for the sampling clock.  Find the one
	 * that gives us the smallest deviation from the desired baud rate.
	 */

2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390 2391 2392 2393 2394
	/* Optional Undivided External Clock */
	if (s->clk_rates[SCI_SCK] && port->type != PORT_SCIFA &&
	    port->type != PORT_SCIFB) {
		err = sci_sck_calc(s, baud, &srr1);
		if (abs(err) < abs(min_err)) {
			best_clk = SCI_SCK;
			scr_val = SCSCR_CKE1;
			sccks = SCCKS_CKS;
			min_err = err;
			srr = srr1;
			if (!err)
				goto done;
		}
	}

2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420 2421 2422 2423
	/* Optional BRG Frequency Divided External Clock */
	if (s->clk_rates[SCI_SCIF_CLK] && sci_getreg(port, SCDL)->size) {
		err = sci_brg_calc(s, baud, s->clk_rates[SCI_SCIF_CLK], &dl1,
				   &srr1);
		if (abs(err) < abs(min_err)) {
			best_clk = SCI_SCIF_CLK;
			scr_val = SCSCR_CKE1;
			sccks = 0;
			min_err = err;
			dl = dl1;
			srr = srr1;
			if (!err)
				goto done;
		}
	}

	/* Optional BRG Frequency Divided Internal Clock */
	if (s->clk_rates[SCI_BRG_INT] && sci_getreg(port, SCDL)->size) {
		err = sci_brg_calc(s, baud, s->clk_rates[SCI_BRG_INT], &dl1,
				   &srr1);
		if (abs(err) < abs(min_err)) {
			best_clk = SCI_BRG_INT;
			scr_val = SCSCR_CKE1;
			sccks = SCCKS_XIN;
			min_err = err;
			dl = dl1;
			srr = srr1;
			if (!min_err)
				goto done;
U
Ulrich Hecht 已提交
2424 2425
		}
	}
2426

2427 2428 2429 2430
	/* Divided Functional Clock using standard Bit Rate Register */
	err = sci_scbrr_calc(s, baud, &brr1, &srr1, &cks1);
	if (abs(err) < abs(min_err)) {
		best_clk = SCI_FCK;
2431
		scr_val = 0;
2432 2433 2434 2435 2436 2437 2438 2439 2440 2441
		min_err = err;
		brr = brr1;
		srr = srr1;
		cks = cks1;
	}

done:
	if (best_clk >= 0)
		dev_dbg(port->dev, "Using clk %pC for %u%+d bps\n",
			s->clks[best_clk], baud, min_err);
2442

2443
	sci_port_enable(s);
2444

2445 2446 2447 2448
	/*
	 * Program the optional External Baud Rate Generator (BRG) first.
	 * It controls the mux to select (H)SCK or frequency divided clock.
	 */
2449 2450
	if (best_clk >= 0 && sci_getreg(port, SCCKS)->size) {
		serial_port_out(port, SCDL, dl);
2451
		serial_port_out(port, SCCKS, sccks);
2452
	}
L
Linus Torvalds 已提交
2453

2454 2455
	spin_lock_irqsave(&port->lock, flags);

2456
	sci_reset(port);
L
Linus Torvalds 已提交
2457 2458 2459

	uart_update_timeout(port, termios->c_cflag, baud);

2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480
	/* byte size and parity */
	switch (termios->c_cflag & CSIZE) {
	case CS5:
		bits = 7;
		break;
	case CS6:
		bits = 8;
		break;
	case CS7:
		bits = 9;
		break;
	default:
		bits = 10;
		break;
	}

	if (termios->c_cflag & CSTOPB)
		bits++;
	if (termios->c_cflag & PARENB)
		bits++;

2481
	if (best_clk >= 0) {
2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492
		if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
			switch (srr + 1) {
			case 5:  smr_val |= SCSMR_SRC_5;  break;
			case 7:  smr_val |= SCSMR_SRC_7;  break;
			case 11: smr_val |= SCSMR_SRC_11; break;
			case 13: smr_val |= SCSMR_SRC_13; break;
			case 16: smr_val |= SCSMR_SRC_16; break;
			case 17: smr_val |= SCSMR_SRC_17; break;
			case 19: smr_val |= SCSMR_SRC_19; break;
			case 27: smr_val |= SCSMR_SRC_27; break;
			}
2493
		smr_val |= cks;
2494
		serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
2495 2496
		serial_port_out(port, SCSMR, smr_val);
		serial_port_out(port, SCBRR, brr);
2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517
		if (sci_getreg(port, HSSRR)->size) {
			unsigned int hssrr = srr | HSCIF_SRE;
			/* Calculate deviation from intended rate at the
			 * center of the last stop bit in sampling clocks.
			 */
			int last_stop = bits * 2 - 1;
			int deviation = min_err * srr * last_stop / 2 / baud;

			if (abs(deviation) >= 2) {
				/* At least two sampling clocks off at the
				 * last stop bit; we can increase the error
				 * margin by shifting the sampling point.
				 */
				int shift = min(-8, max(7, deviation / 2));

				hssrr |= (shift << HSCIF_SRHP_SHIFT) &
					 HSCIF_SRHP_MASK;
				hssrr |= HSCIF_SRDE;
			}
			serial_port_out(port, HSSRR, hssrr);
		}
2518 2519 2520 2521 2522 2523

		/* Wait one bit interval */
		udelay((1000000 + (baud - 1)) / baud);
	} else {
		/* Don't touch the bit rate configuration */
		scr_val = s->cfg->scscr & (SCSCR_CKE1 | SCSCR_CKE0);
2524 2525
		smr_val |= serial_port_in(port, SCSMR) &
			   (SCSMR_CKEDG | SCSMR_SRC_MASK | SCSMR_CKS);
2526
		serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
2527
		serial_port_out(port, SCSMR, smr_val);
2528
	}
L
Linus Torvalds 已提交
2529

2530
	sci_init_pins(port, termios->c_cflag);
2531

2532 2533
	port->status &= ~UPSTAT_AUTOCTS;
	s->autorts = false;
2534 2535
	reg = sci_getreg(port, SCFCR);
	if (reg->size) {
2536
		unsigned short ctrl = serial_port_in(port, SCFCR);
2537

2538 2539 2540 2541 2542 2543
		if ((port->flags & UPF_HARD_FLOW) &&
		    (termios->c_cflag & CRTSCTS)) {
			/* There is no CTS interrupt to restart the hardware */
			port->status |= UPSTAT_AUTOCTS;
			/* MCE is enabled when RTS is raised */
			s->autorts = true;
2544
		}
2545 2546 2547 2548 2549 2550 2551 2552

		/*
		 * As we've done a sci_reset() above, ensure we don't
		 * interfere with the FIFOs while toggling MCE. As the
		 * reset values could still be set, simply mask them out.
		 */
		ctrl &= ~(SCFCR_RFRST | SCFCR_TFRST);

2553
		serial_port_out(port, SCFCR, ctrl);
2554
	}
2555 2556 2557 2558
	if (port->flags & UPF_HARD_FLOW) {
		/* Refresh (Auto) RTS */
		sci_set_mctrl(port, port->mctrl);
	}
2559

2560 2561
	scr_val |= SCSCR_RE | SCSCR_TE |
		   (s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0));
2562
	serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
2563 2564 2565 2566 2567 2568 2569 2570 2571 2572
	if ((srr + 1 == 5) &&
	    (port->type == PORT_SCIFA || port->type == PORT_SCIFB)) {
		/*
		 * In asynchronous mode, when the sampling rate is 1/5, first
		 * received data may become invalid on some SCIFA and SCIFB.
		 * To avoid this problem wait more than 1 serial data time (1
		 * bit time x serial data number) after setting SCSCR.RE = 1.
		 */
		udelay(DIV_ROUND_UP(10 * 1000000, baud));
	}
L
Linus Torvalds 已提交
2573

2574
	/*
2575
	 * Calculate delay for 2 DMA buffers (4 FIFO).
2576 2577 2578 2579 2580 2581 2582
	 * See serial_core.c::uart_update_timeout().
	 * With 10 bits (CS8), 250Hz, 115200 baud and 64 bytes FIFO, the above
	 * function calculates 1 jiffie for the data plus 5 jiffies for the
	 * "slop(e)." Then below we calculate 5 jiffies (20ms) for 2 DMA
	 * buffers (4 FIFO sizes), but when performing a faster transfer, the
	 * value obtained by this formula is too small. Therefore, if the value
	 * is smaller than 20ms, use 20ms as the timeout value for DMA.
2583
	 */
2584
	s->rx_frame = (10000 * bits) / (baud / 100);
2585
#ifdef CONFIG_SERIAL_SH_SCI_DMA
2586 2587 2588
	s->rx_timeout = s->buf_len_rx * 2 * s->rx_frame;
	if (s->rx_timeout < 20)
		s->rx_timeout = 20;
2589 2590
#endif

L
Linus Torvalds 已提交
2591
	if ((termios->c_cflag & CREAD) != 0)
2592
		sci_start_rx(port);
2593

2594 2595
	spin_unlock_irqrestore(&port->lock, flags);

2596
	sci_port_disable(s);
2597 2598 2599

	if (UART_ENABLE_MS(port, termios->c_cflag))
		sci_enable_ms(port);
L
Linus Torvalds 已提交
2600 2601
}

2602 2603 2604 2605 2606 2607
static void sci_pm(struct uart_port *port, unsigned int state,
		   unsigned int oldstate)
{
	struct sci_port *sci_port = to_sci_port(port);

	switch (state) {
2608
	case UART_PM_STATE_OFF:
2609 2610 2611 2612 2613 2614 2615 2616
		sci_port_disable(sci_port);
		break;
	default:
		sci_port_enable(sci_port);
		break;
	}
}

L
Linus Torvalds 已提交
2617 2618 2619
static const char *sci_type(struct uart_port *port)
{
	switch (port->type) {
2620 2621 2622 2623 2624 2625 2626 2627
	case PORT_IRDA:
		return "irda";
	case PORT_SCI:
		return "sci";
	case PORT_SCIF:
		return "scif";
	case PORT_SCIFA:
		return "scifa";
2628 2629
	case PORT_SCIFB:
		return "scifb";
U
Ulrich Hecht 已提交
2630 2631
	case PORT_HSCIF:
		return "hscif";
L
Linus Torvalds 已提交
2632 2633
	}

P
Paul Mundt 已提交
2634
	return NULL;
L
Linus Torvalds 已提交
2635 2636
}

2637 2638
static int sci_remap_port(struct uart_port *port)
{
2639
	struct sci_port *sport = to_sci_port(port);
2640 2641 2642 2643 2644 2645 2646

	/*
	 * Nothing to do if there's already an established membase.
	 */
	if (port->membase)
		return 0;

2647
	if (port->dev->of_node || (port->flags & UPF_IOREMAP)) {
2648
		port->membase = ioremap_nocache(port->mapbase, sport->reg_size);
2649 2650 2651 2652 2653 2654 2655 2656 2657 2658
		if (unlikely(!port->membase)) {
			dev_err(port->dev, "can't remap port#%d\n", port->line);
			return -ENXIO;
		}
	} else {
		/*
		 * For the simple (and majority of) cases where we don't
		 * need to do any remapping, just cast the cookie
		 * directly.
		 */
J
Jingoo Han 已提交
2659
		port->membase = (void __iomem *)(uintptr_t)port->mapbase;
2660 2661 2662 2663 2664
	}

	return 0;
}

2665
static void sci_release_port(struct uart_port *port)
L
Linus Torvalds 已提交
2666
{
2667 2668
	struct sci_port *sport = to_sci_port(port);

2669
	if (port->dev->of_node || (port->flags & UPF_IOREMAP)) {
2670 2671 2672 2673
		iounmap(port->membase);
		port->membase = NULL;
	}

2674
	release_mem_region(port->mapbase, sport->reg_size);
L
Linus Torvalds 已提交
2675 2676
}

2677
static int sci_request_port(struct uart_port *port)
L
Linus Torvalds 已提交
2678
{
2679
	struct resource *res;
2680
	struct sci_port *sport = to_sci_port(port);
2681
	int ret;
L
Linus Torvalds 已提交
2682

2683 2684 2685 2686
	res = request_mem_region(port->mapbase, sport->reg_size,
				 dev_name(port->dev));
	if (unlikely(res == NULL)) {
		dev_err(port->dev, "request_mem_region failed.");
2687
		return -EBUSY;
2688
	}
L
Linus Torvalds 已提交
2689

2690 2691 2692 2693
	ret = sci_remap_port(port);
	if (unlikely(ret != 0)) {
		release_resource(res);
		return ret;
2694
	}
2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706

	return 0;
}

static void sci_config_port(struct uart_port *port, int flags)
{
	if (flags & UART_CONFIG_TYPE) {
		struct sci_port *sport = to_sci_port(port);

		port->type = sport->cfg->type;
		sci_request_port(port);
	}
L
Linus Torvalds 已提交
2707 2708 2709 2710 2711 2712 2713 2714 2715 2716 2717
}

static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
{
	if (ser->baud_base < 2400)
		/* No paper tape reader for Mitch.. */
		return -EINVAL;

	return 0;
}

2718
static const struct uart_ops sci_uart_ops = {
L
Linus Torvalds 已提交
2719 2720 2721 2722 2723 2724
	.tx_empty	= sci_tx_empty,
	.set_mctrl	= sci_set_mctrl,
	.get_mctrl	= sci_get_mctrl,
	.start_tx	= sci_start_tx,
	.stop_tx	= sci_stop_tx,
	.stop_rx	= sci_stop_rx,
2725
	.enable_ms	= sci_enable_ms,
L
Linus Torvalds 已提交
2726 2727 2728
	.break_ctl	= sci_break_ctl,
	.startup	= sci_startup,
	.shutdown	= sci_shutdown,
2729
	.flush_buffer	= sci_flush_buffer,
L
Linus Torvalds 已提交
2730
	.set_termios	= sci_set_termios,
2731
	.pm		= sci_pm,
L
Linus Torvalds 已提交
2732 2733 2734 2735 2736
	.type		= sci_type,
	.release_port	= sci_release_port,
	.request_port	= sci_request_port,
	.config_port	= sci_config_port,
	.verify_port	= sci_verify_port,
2737 2738 2739 2740
#ifdef CONFIG_CONSOLE_POLL
	.poll_get_char	= sci_poll_get_char,
	.poll_put_char	= sci_poll_put_char,
#endif
L
Linus Torvalds 已提交
2741 2742
};

2743 2744
static int sci_init_clocks(struct sci_port *sci_port, struct device *dev)
{
2745 2746
	const char *clk_names[] = {
		[SCI_FCK] = "fck",
2747
		[SCI_SCK] = "sck",
2748 2749
		[SCI_BRG_INT] = "brg_int",
		[SCI_SCIF_CLK] = "scif_clk",
2750 2751 2752
	};
	struct clk *clk;
	unsigned int i;
2753

2754 2755 2756
	if (sci_port->cfg->type == PORT_HSCIF)
		clk_names[SCI_SCK] = "hsck";

2757 2758 2759 2760
	for (i = 0; i < SCI_NUM_CLKS; i++) {
		clk = devm_clk_get(dev, clk_names[i]);
		if (PTR_ERR(clk) == -EPROBE_DEFER)
			return -EPROBE_DEFER;
2761

2762 2763 2764 2765 2766 2767 2768 2769
		if (IS_ERR(clk) && i == SCI_FCK) {
			/*
			 * "fck" used to be called "sci_ick", and we need to
			 * maintain DT backward compatibility.
			 */
			clk = devm_clk_get(dev, "sci_ick");
			if (PTR_ERR(clk) == -EPROBE_DEFER)
				return -EPROBE_DEFER;
2770

2771 2772
			if (!IS_ERR(clk))
				goto found;
2773

2774 2775 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785 2786 2787 2788 2789 2790 2791 2792
			/*
			 * Not all SH platforms declare a clock lookup entry
			 * for SCI devices, in which case we need to get the
			 * global "peripheral_clk" clock.
			 */
			clk = devm_clk_get(dev, "peripheral_clk");
			if (!IS_ERR(clk))
				goto found;

			dev_err(dev, "failed to get %s (%ld)\n", clk_names[i],
				PTR_ERR(clk));
			return PTR_ERR(clk);
		}

found:
		if (IS_ERR(clk))
			dev_dbg(dev, "failed to get %s (%ld)\n", clk_names[i],
				PTR_ERR(clk));
		else
2793 2794
			dev_dbg(dev, "clk %s is %pC rate %lu\n", clk_names[i],
				clk, clk_get_rate(clk));
2795 2796 2797
		sci_port->clks[i] = IS_ERR(clk) ? NULL : clk;
	}
	return 0;
2798 2799
}

2800 2801 2802 2803 2804 2805 2806 2807 2808 2809 2810 2811 2812 2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836 2837 2838 2839 2840
static const struct sci_port_params *
sci_probe_regmap(const struct plat_sci_port *cfg)
{
	unsigned int regtype;

	if (cfg->regtype != SCIx_PROBE_REGTYPE)
		return &sci_port_params[cfg->regtype];

	switch (cfg->type) {
	case PORT_SCI:
		regtype = SCIx_SCI_REGTYPE;
		break;
	case PORT_IRDA:
		regtype = SCIx_IRDA_REGTYPE;
		break;
	case PORT_SCIFA:
		regtype = SCIx_SCIFA_REGTYPE;
		break;
	case PORT_SCIFB:
		regtype = SCIx_SCIFB_REGTYPE;
		break;
	case PORT_SCIF:
		/*
		 * The SH-4 is a bit of a misnomer here, although that's
		 * where this particular port layout originated. This
		 * configuration (or some slight variation thereof)
		 * remains the dominant model for all SCIFs.
		 */
		regtype = SCIx_SH4_SCIF_REGTYPE;
		break;
	case PORT_HSCIF:
		regtype = SCIx_HSCIF_REGTYPE;
		break;
	default:
		pr_err("Can't probe register map for given port\n");
		return NULL;
	}

	return &sci_port_params[regtype];
}

B
Bill Pemberton 已提交
2841
static int sci_init_single(struct platform_device *dev,
2842
			   struct sci_port *sci_port, unsigned int index,
2843
			   const struct plat_sci_port *p, bool early)
2844
{
2845
	struct uart_port *port = &sci_port->port;
2846
	const struct resource *res;
2847
	unsigned int i;
2848
	int ret;
2849

2850 2851
	sci_port->cfg	= p;

2852 2853 2854
	port->ops	= &sci_uart_ops;
	port->iotype	= UPIO_MEM;
	port->line	= index;
2855

2856 2857 2858
	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
	if (res == NULL)
		return -ENOMEM;
2859

2860
	port->mapbase = res->start;
2861
	sci_port->reg_size = resource_size(res);
2862

2863 2864
	for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i)
		sci_port->irqs[i] = platform_get_irq(dev, i);
2865

2866 2867
	/* The SCI generates several interrupts. They can be muxed together or
	 * connected to different interrupt lines. In the muxed case only one
2868 2869 2870 2871
	 * interrupt resource is specified as there is only one interrupt ID.
	 * In the non-muxed case, up to 6 interrupt signals might be generated
	 * from the SCI, however those signals might have their own individual
	 * interrupt ID numbers, or muxed together with another interrupt.
2872 2873 2874
	 */
	if (sci_port->irqs[0] < 0)
		return -ENXIO;
2875

2876 2877 2878
	if (sci_port->irqs[1] < 0)
		for (i = 1; i < ARRAY_SIZE(sci_port->irqs); i++)
			sci_port->irqs[i] = sci_port->irqs[0];
2879

2880 2881 2882
	sci_port->params = sci_probe_regmap(p);
	if (unlikely(sci_port->params == NULL))
		return -EINVAL;
2883

2884 2885 2886 2887 2888 2889 2890 2891 2892 2893 2894 2895 2896 2897 2898 2899 2900 2901 2902 2903 2904 2905
	switch (p->type) {
	case PORT_SCIFB:
		sci_port->rx_trigger = 48;
		break;
	case PORT_HSCIF:
		sci_port->rx_trigger = 64;
		break;
	case PORT_SCIFA:
		sci_port->rx_trigger = 32;
		break;
	case PORT_SCIF:
		if (p->regtype == SCIx_SH7705_SCIF_REGTYPE)
			/* RX triggering not implemented for this IP */
			sci_port->rx_trigger = 1;
		else
			sci_port->rx_trigger = 8;
		break;
	default:
		sci_port->rx_trigger = 1;
		break;
	}

2906
	sci_port->rx_fifo_timeout = 0;
2907
	sci_port->hscif_tot = 0;
2908

2909 2910 2911
	/* SCIFA on sh7723 and sh7724 need a custom sampling rate that doesn't
	 * match the SoC datasheet, this should be investigated. Let platform
	 * data override the sampling rate for now.
2912
	 */
2913 2914 2915
	sci_port->sampling_rate_mask = p->sampling_rate
				     ? SCI_SR(p->sampling_rate)
				     : sci_port->params->sampling_rate_mask;
2916

2917
	if (!early) {
2918 2919 2920
		ret = sci_init_clocks(sci_port, &dev->dev);
		if (ret < 0)
			return ret;
2921

2922
		port->dev = &dev->dev;
M
Magnus Damm 已提交
2923 2924

		pm_runtime_enable(&dev->dev);
2925
	}
2926

2927
	port->type		= p->type;
2928
	port->flags		= UPF_FIXED_PORT | UPF_BOOT_AUTOCONF | p->flags;
2929
	port->fifosize		= sci_port->params->fifosize;
2930

2931 2932 2933 2934 2935 2936 2937
	if (port->type == PORT_SCI) {
		if (sci_port->reg_size >= 0x20)
			port->regshift = 2;
		else
			port->regshift = 1;
	}

2938
	/*
2939
	 * The UART port needs an IRQ value, so we peg this to the RX IRQ
2940 2941 2942 2943 2944
	 * for the multi-IRQ ports, which is where we are primarily
	 * concerned with the shutdown path synchronization.
	 *
	 * For the muxed case there's nothing more to do.
	 */
2945
	port->irq		= sci_port->irqs[SCIx_RXI_IRQ];
Y
Yong Zhang 已提交
2946
	port->irqflags		= 0;
2947

2948 2949 2950
	port->serial_in		= sci_serial_in;
	port->serial_out	= sci_serial_out;

2951
	return 0;
2952 2953
}

2954 2955 2956 2957 2958
static void sci_cleanup_single(struct sci_port *port)
{
	pm_runtime_disable(port->port.dev);
}

2959 2960
#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || \
    defined(CONFIG_SERIAL_SH_SCI_EARLYCON)
2961 2962 2963 2964 2965
static void serial_console_putchar(struct uart_port *port, int ch)
{
	sci_poll_put_char(port, ch);
}

L
Linus Torvalds 已提交
2966 2967 2968 2969 2970 2971 2972
/*
 *	Print a string to the serial port trying not to disturb
 *	any possible real use of the port...
 */
static void serial_console_write(struct console *co, const char *s,
				 unsigned count)
{
2973 2974
	struct sci_port *sci_port = &sci_ports[co->index];
	struct uart_port *port = &sci_port->port;
2975
	unsigned short bits, ctrl, ctrl_temp;
2976 2977 2978
	unsigned long flags;
	int locked = 1;

2979
#if defined(SUPPORT_SYSRQ)
2980 2981
	if (port->sysrq)
		locked = 0;
2982 2983 2984
	else
#endif
	if (oops_in_progress)
2985
		locked = spin_trylock_irqsave(&port->lock, flags);
2986
	else
2987
		spin_lock_irqsave(&port->lock, flags);
2988

2989
	/* first save SCSCR then disable interrupts, keep clock source */
2990
	ctrl = serial_port_in(port, SCSCR);
2991 2992
	ctrl_temp = SCSCR_RE | SCSCR_TE |
		    (sci_port->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)) |
2993
		    (ctrl & (SCSCR_CKE1 | SCSCR_CKE0));
2994
	serial_port_out(port, SCSCR, ctrl_temp | sci_port->hscif_tot);
2995

2996
	uart_console_write(port, s, count, serial_console_putchar);
M
Magnus Damm 已提交
2997 2998 2999

	/* wait until fifo is empty and last bit has been transmitted */
	bits = SCxSR_TDxE(port) | SCxSR_TEND(port);
3000
	while ((serial_port_in(port, SCxSR) & bits) != bits)
M
Magnus Damm 已提交
3001
		cpu_relax();
3002 3003 3004 3005 3006

	/* restore the SCSCR */
	serial_port_out(port, SCSCR, ctrl);

	if (locked)
3007
		spin_unlock_irqrestore(&port->lock, flags);
L
Linus Torvalds 已提交
3008 3009
}

B
Bill Pemberton 已提交
3010
static int serial_console_setup(struct console *co, char *options)
L
Linus Torvalds 已提交
3011
{
3012
	struct sci_port *sci_port;
L
Linus Torvalds 已提交
3013 3014 3015 3016 3017 3018 3019
	struct uart_port *port;
	int baud = 115200;
	int bits = 8;
	int parity = 'n';
	int flow = 'n';
	int ret;

3020
	/*
3021
	 * Refuse to handle any bogus ports.
L
Linus Torvalds 已提交
3022
	 */
3023
	if (co->index < 0 || co->index >= SCI_NPORTS)
3024 3025
		return -ENODEV;

3026 3027 3028
	sci_port = &sci_ports[co->index];
	port = &sci_port->port;

3029 3030 3031 3032 3033 3034
	/*
	 * Refuse to handle uninitialized ports.
	 */
	if (!port->ops)
		return -ENODEV;

3035 3036 3037
	ret = sci_remap_port(port);
	if (unlikely(ret != 0))
		return ret;
3038

L
Linus Torvalds 已提交
3039 3040 3041
	if (options)
		uart_parse_options(options, &baud, &parity, &bits, &flow);

3042
	return uart_set_options(port, co, baud, parity, bits, flow);
L
Linus Torvalds 已提交
3043 3044 3045 3046
}

static struct console serial_console = {
	.name		= "ttySC",
3047
	.device		= uart_console_device,
L
Linus Torvalds 已提交
3048 3049
	.write		= serial_console_write,
	.setup		= serial_console_setup,
P
Paul Mundt 已提交
3050
	.flags		= CON_PRINTBUFFER,
L
Linus Torvalds 已提交
3051
	.index		= -1,
3052
	.data		= &sci_uart_driver,
L
Linus Torvalds 已提交
3053 3054
};

3055 3056 3057 3058
static struct console early_serial_console = {
	.name           = "early_ttySC",
	.write          = serial_console_write,
	.flags          = CON_PRINTBUFFER,
3059
	.index		= -1,
3060
};
3061

3062 3063
static char early_serial_buf[32];

B
Bill Pemberton 已提交
3064
static int sci_probe_earlyprintk(struct platform_device *pdev)
3065
{
3066
	const struct plat_sci_port *cfg = dev_get_platdata(&pdev->dev);
3067 3068 3069 3070 3071 3072

	if (early_serial_console.data)
		return -EEXIST;

	early_serial_console.index = pdev->id;

3073
	sci_init_single(pdev, &sci_ports[pdev->id], pdev->id, cfg, true);
3074 3075 3076 3077 3078 3079 3080 3081 3082

	serial_console_setup(&early_serial_console, early_serial_buf);

	if (!strstr(early_serial_buf, "keep"))
		early_serial_console.flags |= CON_BOOT;

	register_console(&early_serial_console);
	return 0;
}
3083 3084 3085

#define SCI_CONSOLE	(&serial_console)

3086
#else
B
Bill Pemberton 已提交
3087
static inline int sci_probe_earlyprintk(struct platform_device *pdev)
3088 3089 3090
{
	return -EINVAL;
}
L
Linus Torvalds 已提交
3091

3092 3093
#define SCI_CONSOLE	NULL

3094
#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE || CONFIG_SERIAL_SH_SCI_EARLYCON */
L
Linus Torvalds 已提交
3095

3096
static const char banner[] __initconst = "SuperH (H)SCI(F) driver initialized";
L
Linus Torvalds 已提交
3097

3098
static DEFINE_MUTEX(sci_uart_registration_lock);
L
Linus Torvalds 已提交
3099 3100 3101 3102 3103 3104
static struct uart_driver sci_uart_driver = {
	.owner		= THIS_MODULE,
	.driver_name	= "sci",
	.dev_name	= "ttySC",
	.major		= SCI_MAJOR,
	.minor		= SCI_MINOR_START,
3105
	.nr		= SCI_NPORTS,
L
Linus Torvalds 已提交
3106 3107 3108
	.cons		= SCI_CONSOLE,
};

3109
static int sci_remove(struct platform_device *dev)
3110
{
3111
	struct sci_port *port = platform_get_drvdata(dev);
3112
	unsigned int type = port->port.type;	/* uart_remove_... clears it */
3113

3114
	sci_ports_in_use &= ~BIT(port->port.line);
3115 3116
	uart_remove_one_port(&sci_uart_driver, &port->port);

3117
	sci_cleanup_single(port);
3118

3119 3120 3121 3122
	if (port->port.fifosize > 1) {
		sysfs_remove_file(&dev->dev.kobj,
				  &dev_attr_rx_fifo_trigger.attr);
	}
3123
	if (type == PORT_SCIFA || type == PORT_SCIFB || type == PORT_HSCIF) {
3124 3125 3126 3127
		sysfs_remove_file(&dev->dev.kobj,
				  &dev_attr_rx_fifo_timeout.attr);
	}

3128 3129 3130
	return 0;
}

3131 3132 3133 3134

#define SCI_OF_DATA(type, regtype)	(void *)((type) << 16 | (regtype))
#define SCI_OF_TYPE(data)		((unsigned long)(data) >> 16)
#define SCI_OF_REGTYPE(data)		((unsigned long)(data) & 0xffff)
B
Bastian Hecht 已提交
3135 3136

static const struct of_device_id of_sci_match[] = {
3137 3138 3139 3140 3141
	/* SoC-specific types */
	{
		.compatible = "renesas,scif-r7s72100",
		.data = SCI_OF_DATA(PORT_SCIF, SCIx_SH2_SCIF_FIFODATA_REGTYPE),
	},
3142 3143 3144 3145
	{
		.compatible = "renesas,scif-r7s9210",
		.data = SCI_OF_DATA(PORT_SCIF, SCIx_RZ_SCIFA_REGTYPE),
	},
3146 3147 3148 3149 3150 3151 3152 3153 3154 3155 3156
	/* Family-specific types */
	{
		.compatible = "renesas,rcar-gen1-scif",
		.data = SCI_OF_DATA(PORT_SCIF, SCIx_SH4_SCIF_BRG_REGTYPE),
	}, {
		.compatible = "renesas,rcar-gen2-scif",
		.data = SCI_OF_DATA(PORT_SCIF, SCIx_SH4_SCIF_BRG_REGTYPE),
	}, {
		.compatible = "renesas,rcar-gen3-scif",
		.data = SCI_OF_DATA(PORT_SCIF, SCIx_SH4_SCIF_BRG_REGTYPE),
	},
3157
	/* Generic types */
B
Bastian Hecht 已提交
3158 3159
	{
		.compatible = "renesas,scif",
3160
		.data = SCI_OF_DATA(PORT_SCIF, SCIx_SH4_SCIF_REGTYPE),
B
Bastian Hecht 已提交
3161 3162
	}, {
		.compatible = "renesas,scifa",
3163
		.data = SCI_OF_DATA(PORT_SCIFA, SCIx_SCIFA_REGTYPE),
B
Bastian Hecht 已提交
3164 3165
	}, {
		.compatible = "renesas,scifb",
3166
		.data = SCI_OF_DATA(PORT_SCIFB, SCIx_SCIFB_REGTYPE),
B
Bastian Hecht 已提交
3167 3168
	}, {
		.compatible = "renesas,hscif",
3169
		.data = SCI_OF_DATA(PORT_HSCIF, SCIx_HSCIF_REGTYPE),
Y
Yoshinori Sato 已提交
3170 3171
	}, {
		.compatible = "renesas,sci",
3172
		.data = SCI_OF_DATA(PORT_SCI, SCIx_SCI_REGTYPE),
B
Bastian Hecht 已提交
3173 3174 3175 3176 3177 3178
	}, {
		/* Terminator */
	},
};
MODULE_DEVICE_TABLE(of, of_sci_match);

3179 3180
static struct plat_sci_port *sci_parse_dt(struct platform_device *pdev,
					  unsigned int *dev_id)
B
Bastian Hecht 已提交
3181 3182 3183
{
	struct device_node *np = pdev->dev.of_node;
	struct plat_sci_port *p;
3184
	struct sci_port *sp;
3185
	const void *data;
B
Bastian Hecht 已提交
3186 3187 3188 3189 3190
	int id;

	if (!IS_ENABLED(CONFIG_OF) || !np)
		return NULL;

3191
	data = of_device_get_match_data(&pdev->dev);
B
Bastian Hecht 已提交
3192 3193

	p = devm_kzalloc(&pdev->dev, sizeof(struct plat_sci_port), GFP_KERNEL);
3194
	if (!p)
B
Bastian Hecht 已提交
3195 3196
		return NULL;

3197
	/* Get the line number from the aliases node. */
B
Bastian Hecht 已提交
3198
	id = of_alias_get_id(np, "serial");
3199 3200
	if (id < 0 && ~sci_ports_in_use)
		id = ffz(sci_ports_in_use);
B
Bastian Hecht 已提交
3201 3202 3203 3204
	if (id < 0) {
		dev_err(&pdev->dev, "failed to get alias id (%d)\n", id);
		return NULL;
	}
3205 3206 3207 3208
	if (id >= ARRAY_SIZE(sci_ports)) {
		dev_err(&pdev->dev, "serial%d out of range\n", id);
		return NULL;
	}
B
Bastian Hecht 已提交
3209

3210
	sp = &sci_ports[id];
B
Bastian Hecht 已提交
3211 3212
	*dev_id = id;

3213 3214
	p->type = SCI_OF_TYPE(data);
	p->regtype = SCI_OF_REGTYPE(data);
B
Bastian Hecht 已提交
3215

3216
	sp->has_rtscts = of_property_read_bool(np, "uart-has-rtscts");
3217

B
Bastian Hecht 已提交
3218 3219 3220
	return p;
}

B
Bill Pemberton 已提交
3221
static int sci_probe_single(struct platform_device *dev,
3222 3223 3224 3225 3226 3227 3228 3229
				      unsigned int index,
				      struct plat_sci_port *p,
				      struct sci_port *sciport)
{
	int ret;

	/* Sanity check */
	if (unlikely(index >= SCI_NPORTS)) {
3230
		dev_notice(&dev->dev, "Attempting to register port %d when only %d are available\n",
3231
			   index+1, SCI_NPORTS);
3232
		dev_notice(&dev->dev, "Consider bumping CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
3233
		return -EINVAL;
3234
	}
3235 3236 3237
	BUILD_BUG_ON(SCI_NPORTS > sizeof(sci_ports_in_use) * 8);
	if (sci_ports_in_use & BIT(index))
		return -EBUSY;
3238

3239 3240 3241 3242 3243 3244 3245 3246 3247 3248
	mutex_lock(&sci_uart_registration_lock);
	if (!sci_uart_driver.state) {
		ret = uart_register_driver(&sci_uart_driver);
		if (ret) {
			mutex_unlock(&sci_uart_registration_lock);
			return ret;
		}
	}
	mutex_unlock(&sci_uart_registration_lock);

3249
	ret = sci_init_single(dev, sciport, index, p, false);
3250 3251
	if (ret)
		return ret;
3252

3253 3254 3255 3256
	sciport->gpios = mctrl_gpio_init(&sciport->port, 0);
	if (IS_ERR(sciport->gpios) && PTR_ERR(sciport->gpios) != -ENOSYS)
		return PTR_ERR(sciport->gpios);

3257
	if (sciport->has_rtscts) {
3258 3259 3260 3261 3262 3263 3264
		if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios,
							UART_GPIO_CTS)) ||
		    !IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios,
							UART_GPIO_RTS))) {
			dev_err(&dev->dev, "Conflicting RTS/CTS config\n");
			return -EINVAL;
		}
3265
		sciport->port.flags |= UPF_HARD_FLOW;
3266 3267
	}

3268 3269 3270 3271 3272 3273 3274
	ret = uart_add_one_port(&sci_uart_driver, &sciport->port);
	if (ret) {
		sci_cleanup_single(sciport);
		return ret;
	}

	return 0;
3275 3276
}

B
Bill Pemberton 已提交
3277
static int sci_probe(struct platform_device *dev)
L
Linus Torvalds 已提交
3278
{
B
Bastian Hecht 已提交
3279 3280 3281
	struct plat_sci_port *p;
	struct sci_port *sp;
	unsigned int dev_id;
3282
	int ret;
3283

3284 3285 3286 3287 3288 3289 3290
	/*
	 * If we've come here via earlyprintk initialization, head off to
	 * the special early probe. We don't have sufficient device state
	 * to make it beyond this yet.
	 */
	if (is_early_platform_device(dev))
		return sci_probe_earlyprintk(dev);
3291

B
Bastian Hecht 已提交
3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306
	if (dev->dev.of_node) {
		p = sci_parse_dt(dev, &dev_id);
		if (p == NULL)
			return -EINVAL;
	} else {
		p = dev->dev.platform_data;
		if (p == NULL) {
			dev_err(&dev->dev, "no platform data supplied\n");
			return -EINVAL;
		}

		dev_id = dev->id;
	}

	sp = &sci_ports[dev_id];
3307
	platform_set_drvdata(dev, sp);
3308

B
Bastian Hecht 已提交
3309
	ret = sci_probe_single(dev, dev_id, p, sp);
3310
	if (ret)
3311
		return ret;
3312

3313 3314 3315 3316 3317 3318
	if (sp->port.fifosize > 1) {
		ret = sysfs_create_file(&dev->dev.kobj,
				&dev_attr_rx_fifo_trigger.attr);
		if (ret)
			return ret;
	}
3319 3320
	if (sp->port.type == PORT_SCIFA || sp->port.type == PORT_SCIFB ||
	    sp->port.type == PORT_HSCIF) {
3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331
		ret = sysfs_create_file(&dev->dev.kobj,
				&dev_attr_rx_fifo_timeout.attr);
		if (ret) {
			if (sp->port.fifosize > 1) {
				sysfs_remove_file(&dev->dev.kobj,
					&dev_attr_rx_fifo_trigger.attr);
			}
			return ret;
		}
	}

L
Linus Torvalds 已提交
3332 3333 3334 3335
#ifdef CONFIG_SH_STANDARD_BIOS
	sh_bios_gdb_detach();
#endif

3336
	sci_ports_in_use |= BIT(dev_id);
3337
	return 0;
L
Linus Torvalds 已提交
3338 3339
}

S
Sergei Shtylyov 已提交
3340
static __maybe_unused int sci_suspend(struct device *dev)
L
Linus Torvalds 已提交
3341
{
3342
	struct sci_port *sport = dev_get_drvdata(dev);
3343

3344 3345
	if (sport)
		uart_suspend_port(&sci_uart_driver, &sport->port);
L
Linus Torvalds 已提交
3346

3347 3348
	return 0;
}
L
Linus Torvalds 已提交
3349

S
Sergei Shtylyov 已提交
3350
static __maybe_unused int sci_resume(struct device *dev)
3351
{
3352
	struct sci_port *sport = dev_get_drvdata(dev);
3353

3354 3355
	if (sport)
		uart_resume_port(&sci_uart_driver, &sport->port);
3356 3357 3358 3359

	return 0;
}

S
Sergei Shtylyov 已提交
3360
static SIMPLE_DEV_PM_OPS(sci_dev_pm_ops, sci_suspend, sci_resume);
3361

3362 3363
static struct platform_driver sci_driver = {
	.probe		= sci_probe,
3364
	.remove		= sci_remove,
3365 3366
	.driver		= {
		.name	= "sh-sci",
3367
		.pm	= &sci_dev_pm_ops,
B
Bastian Hecht 已提交
3368
		.of_match_table = of_match_ptr(of_sci_match),
3369 3370 3371 3372 3373
	},
};

static int __init sci_init(void)
{
3374
	pr_info("%s\n", banner);
3375

3376
	return platform_driver_register(&sci_driver);
3377 3378 3379 3380 3381
}

static void __exit sci_exit(void)
{
	platform_driver_unregister(&sci_driver);
3382 3383 3384

	if (sci_uart_driver.state)
		uart_unregister_driver(&sci_uart_driver);
L
Linus Torvalds 已提交
3385 3386
}

3387 3388 3389 3390
#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
early_platform_init_buffer("earlyprintk", &sci_driver,
			   early_serial_buf, ARRAY_SIZE(early_serial_buf));
#endif
3391
#ifdef CONFIG_SERIAL_SH_SCI_EARLYCON
3392
static struct plat_sci_port port_cfg __initdata;
3393 3394 3395 3396 3397 3398 3399 3400 3401 3402 3403

static int __init early_console_setup(struct earlycon_device *device,
				      int type)
{
	if (!device->port.membase)
		return -ENODEV;

	device->port.serial_in = sci_serial_in;
	device->port.serial_out	= sci_serial_out;
	device->port.type = type;
	memcpy(&sci_ports[0].port, &device->port, sizeof(struct uart_port));
3404
	port_cfg.type = type;
3405
	sci_ports[0].cfg = &port_cfg;
3406
	sci_ports[0].params = sci_probe_regmap(&port_cfg);
3407 3408 3409
	port_cfg.scscr = sci_serial_in(&sci_ports[0].port, SCSCR);
	sci_serial_out(&sci_ports[0].port, SCSCR,
		       SCSCR_RE | SCSCR_TE | port_cfg.scscr);
3410 3411 3412 3413 3414 3415 3416 3417 3418 3419 3420 3421 3422 3423

	device->con->write = serial_console_write;
	return 0;
}
static int __init sci_early_console_setup(struct earlycon_device *device,
					  const char *opt)
{
	return early_console_setup(device, PORT_SCI);
}
static int __init scif_early_console_setup(struct earlycon_device *device,
					  const char *opt)
{
	return early_console_setup(device, PORT_SCIF);
}
3424 3425 3426 3427 3428 3429
static int __init rzscifa_early_console_setup(struct earlycon_device *device,
					  const char *opt)
{
	port_cfg.regtype = SCIx_RZ_SCIFA_REGTYPE;
	return early_console_setup(device, PORT_SCIF);
}
3430 3431 3432 3433 3434 3435 3436 3437 3438 3439 3440 3441 3442 3443 3444 3445 3446 3447
static int __init scifa_early_console_setup(struct earlycon_device *device,
					  const char *opt)
{
	return early_console_setup(device, PORT_SCIFA);
}
static int __init scifb_early_console_setup(struct earlycon_device *device,
					  const char *opt)
{
	return early_console_setup(device, PORT_SCIFB);
}
static int __init hscif_early_console_setup(struct earlycon_device *device,
					  const char *opt)
{
	return early_console_setup(device, PORT_HSCIF);
}

OF_EARLYCON_DECLARE(sci, "renesas,sci", sci_early_console_setup);
OF_EARLYCON_DECLARE(scif, "renesas,scif", scif_early_console_setup);
3448
OF_EARLYCON_DECLARE(scif, "renesas,scif-r7s9210", rzscifa_early_console_setup);
3449 3450 3451 3452 3453
OF_EARLYCON_DECLARE(scifa, "renesas,scifa", scifa_early_console_setup);
OF_EARLYCON_DECLARE(scifb, "renesas,scifb", scifb_early_console_setup);
OF_EARLYCON_DECLARE(hscif, "renesas,hscif", hscif_early_console_setup);
#endif /* CONFIG_SERIAL_SH_SCI_EARLYCON */

L
Linus Torvalds 已提交
3454 3455 3456
module_init(sci_init);
module_exit(sci_exit);

3457
MODULE_LICENSE("GPL");
3458
MODULE_ALIAS("platform:sh-sci");
3459
MODULE_AUTHOR("Paul Mundt");
U
Ulrich Hecht 已提交
3460
MODULE_DESCRIPTION("SuperH (H)SCI(F) serial driver");