- 17 4月, 2018 1 次提交
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由 Joonwoo Park 提交于
Add support for the global clock controller found on MSM8998 based devices. This should allow most non-multimedia device drivers to probe and control their clocks. Signed-off-by: NJoonwoo Park <joonwoop@codeaurora.org> Signed-off-by: NImran Khan <kimran@codeaurora.org> Signed-off-by: NRajendra Nayak <rnayak@codeaurora.org> [bjorn: Specify regs for alpha_plls, fix white spaces and add binding] Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 07 4月, 2018 2 次提交
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由 Bai Ping 提交于
Add clock binding doc update for imx6sll. Signed-off-by: NBai Ping <ping.bai@nxp.com> Acked-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Dinh Nguyen 提交于
Document that Stratix10 clock bindings, and add the clock header file. The clock header is an enumeration of all the different clocks on the Stratix10 platform. Signed-off-by: NDinh Nguyen <dinguyen@kernel.org> Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 21 3月, 2018 1 次提交
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由 Icenowy Zheng 提交于
The Allwinner H6 CCU has a "HDMI Slow Clock", which is currently missing in the ccu-sun50i-h6 driver. Add this missing clock to the driver. Fixes: 542353ea ("clk: sunxi-ng: add support for the Allwinner H6 CCU") Signed-off-by: NIcenowy Zheng <icenowy@aosc.io> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>
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- 20 3月, 2018 6 次提交
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由 Srinivas Kandagatla 提交于
XO is onchip buffer clock to generate 19.2MHz. This patch adds support to 5 XO buffer clocks found on PMIC8921, these buffer clocks can be controlled from external pin or in manual mode. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Weiyi Lu 提交于
add new clocks according to ECO design change Signed-off-by: NWeiyi Lu <weiyi.lu@mediatek.com> Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Gabriel Fernandez 提交于
This patch adds DSI clock for STM32F469 board Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com> Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Gabriel Fernandez 提交于
Update of END_PRIMARY_CLK was missed, it should be after CLK_SYSCLK hsi and sysclk are overwritten by gpioa and gpiob. Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com> Tested-by: NPhilippe Cornu <philippe.cornu@st.com> Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Ryder Lee 提交于
Add missing clock data 'CLK_AUDIO_AFE_CONN' for MT7622 audsys. Signed-off-by: NRyder Lee <ryder.lee@mediatek.com> Reviewed-by: NRob Herring <robh@kernel.org> Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Sean Wang 提交于
Just add binding for a fixed-factor clock axisel_d4, which would be referenced by PWM devices on MT7623 or MT2701 SoC. Cc: stable@vger.kernel.org Fixes: 1de9b216 ("clk: mediatek: Add dt-bindings for MT2701 clocks") Signed-off-by: NSean Wang <sean.wang@mediatek.com> Reviewed-by: NRob Herring <robh@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 19 3月, 2018 1 次提交
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由 Icenowy Zheng 提交于
The Allwinner H6 SoC has a CCU which has been largely rearranged. Add support for it in the sunxi-ng CCU framework. Signed-off-by: NIcenowy Zheng <icenowy@aosc.io> Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>
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- 17 3月, 2018 1 次提交
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由 Chunyan Zhang 提交于
Added index of RTC gate clocks which are used by some devices on aon area of SC9860, for example the Watchdog timer. Signed-off-by: NChunyan Zhang <chunyan.zhang@spreadtrum.com> Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 13 3月, 2018 1 次提交
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由 Jerome Brunet 提交于
Add the new HIFI pll to axg clock bindings Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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- 12 3月, 2018 1 次提交
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由 Gabriel Fernandez 提交于
This patch introduces the mechanism to probe stm32mp1 driver. It also defines registers definition. This patch also introduces the generic mechanism to register a clock (a simple gate, divider and fixed factor). All clocks will be defined in one table. Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: NMichael Turquette <mturquette@baylibre.com>
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- 08 3月, 2018 2 次提交
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由 Peter De Schrijver 提交于
This clock is needed by the memory built-in self test work around. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: NJon Hunter <jonathanh@nvidia.com> Tested-by: NJon Hunter <jonathanh@nvidia.com> Tested-by: NHector Martin <marcan@marcan.st> Tested-by: NAndre Heider <a.heider@gmail.com> Tested-by: NMikko Perttunen <mperttunen@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Mikko Perttunen 提交于
Add the chip-level device tree, including binding headers, for the NVIDIA Tegra194 "Xavier" system-on-chip. Only a small subset of devices are initially available, enough to boot to UART console. Signed-off-by: NMikko Perttunen <mperttunen@nvidia.com> Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 02 3月, 2018 1 次提交
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由 Jernej Skrabec 提交于
CLK_PLL_VIDEO needs to be referenced in HDMI DT entry as a possible PHY clock parent. Export it so it can be used later in DT. Signed-off-by: NJernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>
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- 28 2月, 2018 2 次提交
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由 Stefan Agner 提交于
According to the i.MX7D Reference Manual, the Keypad Port module (KPP) requires this clock gate to be enabled. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Rui Miguel Silva 提交于
Add CAAM clock so that we could use the Cryptographic Acceleration and Assurance Module (CAAM) hardware block. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-clk@vger.kernel.org Cc: "Horia Geantă" <horia.geanta@nxp.com> Cc: Aymen Sghaier <aymen.sghaier@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NRui Miguel Silva <rui.silva@linaro.org> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 27 2月, 2018 2 次提交
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由 Jianguo Sun 提交于
The clock COMBPHY1 has already been supported by hi3798cv200 driver, but COMBPHY0 is missing. It adds COMBPHY0 clock support. Since the mux table is being shared by COMBPHY0 and COMBPHY1, it renames comphy1_mux_p and comphy1_mux_table a bit to drop instance number '1' from there. Signed-off-by: NJianguo Sun <sunjianguo1@huawei.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Shawn Guo 提交于
It's a coding-style fix, which corrects the indentation for all those clock definitions, so that the code looks nicer and new definitions can be added with a recommended indentation. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 26 2月, 2018 1 次提交
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由 Jacopo Mondi 提交于
Initial support for R-Car M3-N (r8a77965), including core and module clocks. Based on Table 8.2d of "R-Car Series, 3rd Generation User's Manual: Hardware (Rev. 0.80, Oct 31, 2017)". Signed-off-by: NJacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 22 2月, 2018 1 次提交
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由 Anson Huang 提交于
According to the i.MX7D Reference Manual, SNVS block has a clock gate, accessing SNVS block would need this clock gate to be enabled, add it into clock tree so that SNVS module driver can operate this clock gate. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Acked-by: NDong Aisheng <aisheng.dong@nxp.com> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 20 2月, 2018 1 次提交
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由 Sergei Shtylyov 提交于
Add macros usable by the device tree sources to reference the R8A77980 CPG core clocks by index. The data come from the table 8.2e of the R-Car Series, 3rd Generation User's Manual: Hardware (Rev. 0.80, Oct, 2017), however I had to add the Z2 clock which is somehow present only on the figure 8.1e... Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: NVladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: NRob Herring <robh@kernel.org> Reviewed-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 12 2月, 2018 1 次提交
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由 Heiko Stuebner 提交于
This clock is not hclk_vio but hclk_vio_niu, the clock for the interconnect output. The clock got fixed and the id was never used in this incorrect form, so remove it. Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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- 19 1月, 2018 1 次提交
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由 Paul Cercueil 提交于
This will be used from the devicetree bindings to specify the clocks that should be obtained from the jz4770-cgu driver. Signed-off-by: NPaul Cercueil <paul@crapouillou.net> Acked-by: NStephen Boyd <sboyd@codeaurora.org> Reviewed-by: NRob Herring <robh@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18481/Signed-off-by: NJames Hogan <jhogan@kernel.org>
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- 22 12月, 2017 3 次提交
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由 Abhishek Sahu 提交于
PCIE and NSS has MISC reset register in which single register has multiple reset bit. The patch adds the DT bindings for these MISC resets. Signed-off-by: NAbhishek Sahu <absahu@codeaurora.org> Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Abhishek Sahu 提交于
This patch adds the DT bindings for following IPQ8074 clocks - General PLL’s, NSS UBI PLL and NSS Crypto PLL. - 2 instances of PCIE, USB, SDCC. - 2 NSS UBI core and common NSS clocks. NSS is network switching system which accelerates the ethernet traffic. IPQ8074 NSS has two UBI cores. Some clocks are separate for each UBI core and remaining NSS clocks are common. - NSS ethernet port clocks. IPQ8074 has 6 ethernet ports and each port uses different TX and RX clocks. - Crypto engine clocks. - General purpose clocks which comes over GPIO. Signed-off-by: NAbhishek Sahu <absahu@codeaurora.org> Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Chunyan Zhang 提交于
This file defines all SC9860 clock indexes, it should be included in the device tree in which there's device using the clocks. Signed-off-by: NChunyan Zhang <chunyan.zhang@spreadtrum.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 21 12月, 2017 1 次提交
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由 Joel Stanley 提交于
These will be used by the clock driver and device trees. Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NJoel Stanley <joel@jms.id.au>
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- 14 12月, 2017 1 次提交
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由 Qiufang Dai 提交于
Add the required header for the clocks ID dt-bindings exported from various subsystem in the Meson-AXG SoC. Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NQiufang Dai <qiufang.dai@amlogic.com> Signed-off-by: NYixun Lan <yixun.lan@amlogic.com> Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
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- 07 12月, 2017 1 次提交
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由 Leo Yan 提交于
Document the DT binding for stub clock which is used for CPU, GPU and DDR frequency scaling. Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NLeo Yan <leo.yan@linaro.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 01 12月, 2017 6 次提交
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由 Tero Kristo 提交于
Contains offsets for all dm816 clkctrl main and optional clocks. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
Contains offsets for all dm814 clkctrl main and optional clocks. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
Contains offsets for all am43xx clkctrl main and optional clocks. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
Contains offsets for all am33xx clkctrl main and optional clocks. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
Contains offsets for all dra7 clkctrl main and optional clocks. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
Contains offsets for all omap5 clkctrl main and optional clocks. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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- 02 11月, 2017 2 次提交
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由 Greg Kroah-Hartman 提交于
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org> Reviewed-by: NPhilippe Ombredanne <pombredanne@nexb.com> Reviewed-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Chen Zhong 提交于
Add the required header for the entire clocks dt-bindings exported from topckgen, apmixedsys, infracfg, pericfg, ethsys, pciesys, ssusbsys and audsys which could be found on MT7622 SoC. Signed-off-by: NChen Zhong <chen.zhong@mediatek.com> Signed-off-by: NSean Wang <sean.wang@mediatek.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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